[all-commits] [llvm/llvm-project] 9fa517: [RISCV] Use inheritance to simplify usage of the U...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9fa517208fbf4d007694d5f2ba754356a40467e2
      https://github.com/llvm/llvm-project/commit/9fa517208fbf4d007694d5f2ba754356a40467e2
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-12-17 (Tue, 17 Dec 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSchedRocket.td
    M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR345.td
    M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
    M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
    M llvm/lib/Target/RISCV/RISCVSchedule.td

  Log Message:
  -----------
  [RISCV] Use inheritance to simplify usage of the UnsupportedSched* multiclasses. NFC (#120329)

Split UnsupportedSchedZfhmin from UnsupportedSchedZfh.
UnsupportedSchedZfhmin inherits from UnsupportedSchedZfh and should be
used when no F16 is supported. UnsupportedSchedZfh can be used direclty
for CPUs that support Zfhmin but not Zfh.

Make UnsupportedSchedF inherit from both UnsupportedSchedD and
UnsupportedSchedZfhmin so that CPUs with no FP only need to include
UnsupportedSchedF. This required some minor refactorings to
RISCVSchedSyntacoreSCR345.td. I've also switched to inheritance instead of
using defm.



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