[all-commits] [llvm/llvm-project] 4a7f60: [VPlan] Handle VPWidenCastRecipe without underlyin...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4a7f60d328dda709601e19678025f47f2e0a865b
      https://github.com/llvm/llvm-project/commit/4a7f60d328dda709601e19678025f47f2e0a865b
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-12-18 (Wed, 18 Dec 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    A llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll

  Log Message:
  -----------
  [VPlan] Handle VPWidenCastRecipe without underlying value in EVL transform (#120194)

This fixes a crash that shows up when building SPEC CPU 2017 with EVL
tail folding on RISC-V.

A VPWidenCastRecipe doesn't always have an underlying value, and in the
case of this crash this happens whenever a widened cast is created via
truncateToMinimalBitwidths.

Fix this by just using the opcode stored in the recipe itself.

I think a similar issue exists with VPWidenIntrinsicRecipe and how it's
widened, but I haven't run into any crashes with it just yet.



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