[all-commits] [llvm/llvm-project] 7ece56: [GISel] Support narrowing G_ICMP with more than 2 ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7ece560a50d09686bb384b309b8b05d8f63111e5
      https://github.com/llvm/llvm-project/commit/7ece560a50d09686bb384b309b8b05d8f63111e5
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-12-12 (Thu, 12 Dec 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
    M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2_lse128.ll
    M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
    M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
    M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
    M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll
    M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-threeway-cmp.mir
    M llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll
    M llvm/test/CodeGen/AArch64/icmp.ll
    M llvm/test/CodeGen/AArch64/scmp.ll
    M llvm/test/CodeGen/AArch64/ucmp.ll
    M llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
    M llvm/test/CodeGen/AMDGPU/div_i128.ll
    M llvm/test/CodeGen/Mips/GlobalISel/legalizer/icmp.mir
    M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-addo-subo-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-icmp-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-icmp-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-umax-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-umin-rv32.mir
    M llvm/test/CodeGen/X86/isel-select-cmov.ll

  Log Message:
  -----------
  [GISel] Support narrowing G_ICMP with more than 2 parts. (#119335)

This allows us to support i128 G_ICMP on RV32. I'm not sure how to test
the "left over" part of this as RISC-V always widens to a power of 2
before narrowing.



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