[all-commits] [llvm/llvm-project] 8db7a1: RegAlloc: Do not fatal error if there are no regis...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/regalloc-no-fatal-error-no-available-registers
  Home:   https://github.com/llvm/llvm-project
  Commit: 8db7a1695f5649131c65ad2026c5f00dae2c8dad
      https://github.com/llvm/llvm-project/commit/8db7a1695f5649131c65ad2026c5f00dae2c8dad
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-12-12 (Thu, 12 Dec 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineFunction.h
    M llvm/lib/CodeGen/MachineFunction.cpp
    M llvm/lib/CodeGen/RegAllocBase.cpp
    M llvm/lib/CodeGen/RegAllocBase.h
    M llvm/lib/CodeGen/RegAllocFast.cpp
    M llvm/lib/CodeGen/VirtRegMap.cpp
    M llvm/test/CodeGen/AMDGPU/alloc-all-regs-reserved-in-class.mir
    M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
    M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
    M llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll

  Log Message:
  -----------
  RegAlloc: Do not fatal error if there are no registers in the alloc order

Try to use DiagnosticInfo if every register in the class is reserved
by forcing assignment to a reserved register. Also reduces the number
of redundant errors emitted, particularly with fast.

This is still broken in the case of undef uses. There are additional
complications in greedy and fast, so leave it for a separate fix.



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