[all-commits] [llvm/llvm-project] 49abcd: [CodeGen][PM] Initialize analyses with isAnalysis=...
wanglei via All-commits
all-commits at lists.llvm.org
Tue Dec 10 22:23:27 PST 2024
Branch: refs/heads/users/wangleiat/spr/main.lldbprocess-introduce-loongarch64-hw-breakwatchpoint-support
Home: https://github.com/llvm/llvm-project
Commit: 49abcd207fe26ea0fc7170e66f1b0b22f1d853d3
https://github.com/llvm/llvm-project/commit/49abcd207fe26ea0fc7170e66f1b0b22f1d853d3
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/GCMetadata.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/LiveStacks.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
Log Message:
-----------
[CodeGen][PM] Initialize analyses with isAnalysis=true (#118779)
Analyses should be marked as analyses.
Otherwise they are prone to get ignored by the legacy analysis cache mechanism and get scheduled redundantly.
Commit: 82c93b6f19bf9db75ac6e4100b9f1b4f2a7df67f
https://github.com/llvm/llvm-project/commit/82c93b6f19bf9db75ac6e4100b9f1b4f2a7df67f
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/trip-count-phi-increment.ll
Log Message:
-----------
[SCEV] Simplify SCEVExpr for PHI to SCEV for operand if operands are identical (#115945)
Helps SCEV analyze some special phi nodes, allowing the computation of
loop trip count in cases like the following:
https://godbolt.org/z/xGs1d81TW
Commit: 3dbff90b16b5964b9fa468438ff40985be5c1ade
https://github.com/llvm/llvm-project/commit/3dbff90b16b5964b9fa468438ff40985be5c1ade
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] matchPMADDWD/matchPMADDWD_2 - update to use SDPatternMatch matching. NFCI.
Prep work for #118433
Commit: 1126bef609e7afa77105308406d74d4e459ee0a5
https://github.com/llvm/llvm-project/commit/1126bef609e7afa77105308406d74d4e459ee0a5
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
Log Message:
-----------
[AArch64][SVE] Only generate wide adds when SVE2 or StreamingSVE is available (#118838)
Commit: 2a4c74cc8451f0ba34baaee203afb941a498f6b3
https://github.com/llvm/llvm-project/commit/2a4c74cc8451f0ba34baaee203afb941a498f6b3
Author: David Green <david.green at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Processors.td
A llvm/test/tools/llvm-mca/AArch64/Cortex/X1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/X2-sve-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/X3-sve-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/X4-sve-instructions.s
Log Message:
-----------
[AArch64] Update the scheduling model for Cortex-X1/2/3/4 (#118826)
These Neoverse-V scheduling models more closely match the Cortex-X
series cpus with 4 vector pipelines, even if they do not match exactly.
Commit: 9a24f2198ec02960c9e9afedace96ba6afa9c5b1
https://github.com/llvm/llvm-project/commit/9a24f2198ec02960c9e9afedace96ba6afa9c5b1
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/FunctionComparator.h
M llvm/lib/Transforms/Utils/FunctionComparator.cpp
A llvm/test/Transforms/MergeFunc/initializes-attr.ll
Log Message:
-----------
[MergeFuncs] Handle ConstantRangeList attributes
Support comparison of ConstantRangeList attributes in
FunctionComparator.
Commit: f081ffe70165dc3a585279a74494497a48a65b15
https://github.com/llvm/llvm-project/commit/f081ffe70165dc3a585279a74494497a48a65b15
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Simplify & clarify bypass handling for IV resume values (NFC)
Split off NFC part refactoring from
https://github.com/llvm/llvm-project/pull/110577. This simplifies and
clarifies induction resume value creation for bypass blocks.
Commit: ce4801d373df1c2ddcc602add133066640c7073d
https://github.com/llvm/llvm-project/commit/ce4801d373df1c2ddcc602add133066640c7073d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/test/CodeGen/X86/vpdpwssd.ll
Log Message:
-----------
[X86] vpdpwssd.ll - add test coverage for #118443
Commit: 9d2351ab9aff3741e3f4e10ab7ebabc77a6079d6
https://github.com/llvm/llvm-project/commit/9d2351ab9aff3741e3f4e10ab7ebabc77a6079d6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vpdpwssd.ll
Log Message:
-----------
[X86] matchPMADDWD - add matching for (add (X, (pmaddwd Y, Z)) reassociation patterns.
Allows us to match pmaddwd accumulation patterns, and folding to vpdpwssd instructions on VNNI targets
Fixes #118433
Commit: 76db47335903cb65d3027c0a77658f488d8ce659
https://github.com/llvm/llvm-project/commit/76db47335903cb65d3027c0a77658f488d8ce659
Author: David Green <david.green at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/bf16-instructions.ll
A llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
A llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64] Add bf16 instruction coverage. NFC
These are the same tests as fp16-instructions.ll, fp16-v4-instructions.ll and
fp16-v8-instruction.ll ported to bf16.
Commit: 99dc3967595c472b6edbe789a1346b0350294567
https://github.com/llvm/llvm-project/commit/99dc3967595c472b6edbe789a1346b0350294567
Author: John Brawn <john.brawn at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/fpcast.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
Log Message:
-----------
[InstCombine] Make fptrunc combine use intersection of fast math flags (#118808)
These combines involve swapping the fptrunc with its operand, and using
the intersection of fast math flags is the safest option as e.g. if we
have (fptrunc (fneg ninf x)) then (fneg ninf (fptrunc x)) will not be
correct as if x is a not within the range of the destination type the
result of (fptrunc x) will be inf.
Commit: 0678e2058364ec10b94560d27ec7138dfa003287
https://github.com/llvm/llvm-project/commit/0678e2058364ec10b94560d27ec7138dfa003287
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/reduction-align.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
Log Message:
-----------
[VPlan] Update scalar induction resume values in VPlan. (#110577)
Updated ILV.createInductionResumeValues (now createInductionResumeVPValue)
to directly update the VPIRInstructions wrapping the original phis with the
created resume values.
This is the first step towards modeling them completely in VPlan.
Subsequent patches will move creation of the resume values completely
into VPlan.
Depends on https://github.com/llvm/llvm-project/pull/109975.
PR: https://github.com/llvm/llvm-project/pull/110577
Commit: a202a35e79b2885061e744bd551814560c4bef14
https://github.com/llvm/llvm-project/commit/a202a35e79b2885061e744bd551814560c4bef14
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Utils] Remove DebugInfoFinder parameter from CloneBasicBlock (#118620)
Summary:
There was a single usage of CloneBasicBlock with non-default
DebugInfoFinder inside CloneFunctionInto which has been refactored in
more focused.
Test Plan:
ninja check-llvm-unit check-llvm
Commit: 8bc9551d9b01f02a1b720063cee80174c27dac1b
https://github.com/llvm/llvm-project/commit/8bc9551d9b01f02a1b720063cee80174c27dac1b
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-crash.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
A llvm/test/CodeGen/AArch64/sink-mul-exts.ll
M llvm/test/CodeGen/AArch64/sinksplat.ll
Log Message:
-----------
[AArch64] Improve operand sinking for mul instructions (#116604)
- Sink splat operands to mul instructions for types where we can use the
lane-indexed variants.
- When sinking operands for [su]mull, also sink the ext instruction.
Commit: 6bb5d6ae23cace42bd108ca14e17e863c73bbb5c
https://github.com/llvm/llvm-project/commit/6bb5d6ae23cace42bd108ca14e17e863c73bbb5c
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
Log Message:
-----------
[NFC] Use a move instead of a copy to optimize performance. (#118699)
This is an issue detected by a static analysis tool,
Commit: 7c523601188922964964f3b763f908ba035b1038
https://github.com/llvm/llvm-project/commit/7c523601188922964964f3b763f908ba035b1038
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/test/MC/ARM/invalid-barrier.s
Log Message:
-----------
[ARM] Error on invalid tokens in barrier insts (#118849)
These operand parser functions for barrier instructions were returning
ParseStatus::Failure for unexpected token kinds, but not outputting an
error message, so these instructions with invalid operands were being
rejected without an error being printed.
Fixes #67949
Commit: 452efb35df641bac80a901c867ddfdd4de6ad2f4
https://github.com/llvm/llvm-project/commit/452efb35df641bac80a901c867ddfdd4de6ad2f4
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
A llvm/test/CodeGen/AArch64/memtag-merge-writeback.mir
Log Message:
-----------
[AArch64] Fix LDR/STR folding causing memtag failures (#118821)
When generating code with sanitize_memtag, we make use of the fact that
the sp+imm forms of many load and store instructions are not
tag-checked, so we can use SP directly instead of needing a register
holding the tagged pointer. However, this isn't true for the writeback
versions of the instructions, so we can't fold ADDs and SUBs into them
in AArch64LoadStoreOptimizer. This would be possible in cases where the
loads/stores only access untagged stack slots, but that information
isn't easily available after frame index elimination.
Commit: 89e919fb0df391da42dbfd48cd8de268335fe672
https://github.com/llvm/llvm-project/commit/89e919fb0df391da42dbfd48cd8de268335fe672
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Fix warnings while compiling SLPVectorizer.cpp (#118051)
Towards #118048
I was building llvm (clang and lld) for webassembly and came across
these warnings. Not sure if they are seen in our builds too.
```
/Users/anutosh491/work/llvm-project/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:6924:67: warning: comparison of integers of different signs: 'typename iterator_traits<user_iterator_impl<User>>::difference_type' (aka 'long') and 'unsigned int' [-Wsign-compare]
6924 | if (std::distance(LI->user_begin(), LI->user_end()) !=
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
6925 | LI->getNumUses())
| ~~~~~~~~~~~~~~~~
[ 79%] Building CXX object lib/Transforms/Instrumentation/CMakeFiles/LLVMInstrumentation.dir/PGOInstrumentation.cpp.o
/Users/anutosh491/work/llvm-project/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:9754:43: warning: comparison of integers of different signs: 'typename iterator_traits<Value *const *>::difference_type' (aka 'long') and 'unsigned int' [-Wsign-compare]
9754 | count(Slice, Slice.front()) ==
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
9755 | (isa<UndefValue>(Slice.front()) ? VF - 1 : 1)) {
```
This PR tries to address those warnings.
Commit: 6307e4b31efee4b5a396da1df2e0939ab9009f11
https://github.com/llvm/llvm-project/commit/6307e4b31efee4b5a396da1df2e0939ab9009f11
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Revert "[SLP] NFC. Replace TreeEntry::setOperandsInOrder with VLOperands. (#113880)"
This reverts commit 94fbe7e3ae7c0ce4e9a7d801e7700457a36f731d.
Causes a crash when linking mafft in ReleaseLTO-g config.
Commit: 1885886b3f42922ed76812c3b1a1b81f3532bbc9
https://github.com/llvm/llvm-project/commit/1885886b3f42922ed76812c3b1a1b81f3532bbc9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/pr118934.ll
Log Message:
-----------
[X86] matchIndexRecursively - fix incorrect signed/unsigned constant creation
Fixes #118934
Commit: ae73bc8e94b3174e2b495eee544cf843b6e51899
https://github.com/llvm/llvm-project/commit/ae73bc8e94b3174e2b495eee544cf843b6e51899
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
Reapply [InstCombine] Support gep nuw in icmp folds (#118472)
The profile runtime test failure this caused has been addressed in:
https://github.com/llvm/llvm-project/pull/118782
-----
Unsigned icmp of gep nuw folds to unsigned icmp of offsets. Unsigned
icmp of gep nusw nuw folds to unsigned samesign icmp of offsets.
Proofs: https://alive2.llvm.org/ce/z/VEwQY8
Commit: 384e69a914558899a35f13349965966de2d635ac
https://github.com/llvm/llvm-project/commit/384e69a914558899a35f13349965966de2d635ac
Author: cmtice <cmtice at google.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M libcxx/include/__memory/allocator_traits.h
M libcxx/include/__type_traits/detected_or.h
Log Message:
-----------
[libc++] Add _LIBCPP_NODEBUG on internal allocator trait aliases (#118835)
Put _LIBCPP_NODEBUG on the new allocator trait aliases introduced in
https://github.com/llvm/llvm-project/pull/115654. This prevents a large
increase in the gdb_index size that was introduced by that PR.
Commit: 952c5156e65d15e0f8692ec55e2874657150259e
https://github.com/llvm/llvm-project/commit/952c5156e65d15e0f8692ec55e2874657150259e
Author: Jefferson Le Quellec <jefferson.lequellec at codeplay.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/openmp-offload.c
Log Message:
-----------
[Driver][OpenMP] Fix OpenMP target-toolchain-option parser (#115375)
## Description
This PR fixes a segmentation fault that occurs when passing options
requiring arguments via `-Xopenmp-target=<triple>`. The issue was that
the function `Driver::getOffloadArchs` did not properly parse the
extracted option, but instead assumed it was valid, leading to a crash
when incomplete arguments were provided.
## Backtrace
```sh
llvm-project/build/bin/clang++ main.cpp -fopenmp=libomp -fopenmp-targets=powerpc64le-ibm-linux-gnu -Xopenmp-target=powerpc64le-ibm-linux-gnu -o
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace, preprocessed source, and associated run script.
Stack dump:
0. Program arguments: llvm-project/build/bin/clang++ main.cpp -fopenmp=libomp -fopenmp-targets=powerpc64le-ibm-linux-gnu -Xopenmp-target=powerpc64le-ibm-linux-gnu -o
1. Compilation construction
2. Building compilation actions
#0 0x0000562fb21c363b llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (llvm-project/build/bin/clang+++0x392f63b)
#1 0x0000562fb21c0e3c SignalHandler(int) Signals.cpp:0:0
#2 0x00007fcbf6c81420 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14420)
#3 0x0000562fb1fa5d70 llvm::opt::Option::matches(llvm::opt::OptSpecifier) const (llvm-project/build/bin/clang+++0x3711d70)
#4 0x0000562fb2a78e7d clang::driver::Driver::getOffloadArchs(clang::driver::Compilation&, llvm::opt::DerivedArgList const&, clang::driver::Action::OffloadKind, clang::driver::ToolChain const*, bool) const (llvm-project/build/bin/clang+++0x41e4e7d)
#5 0x0000562fb2a7a9aa clang::driver::Driver::BuildOffloadingActions(clang::driver::Compilation&, llvm::opt::DerivedArgList&, std::pair<clang::driver::types::ID, llvm::opt::Arg const*> const&, clang::driver::Action*) const (.part.1164) Driver.cpp:0:0
#6 0x0000562fb2a7c093 clang::driver::Driver::BuildActions(clang::driver::Compilation&, llvm::opt::DerivedArgList&, llvm::SmallVector<std::pair<clang::driver::types::ID, llvm::opt::Arg const*>, 16u> const&, llvm::SmallVector<clang::driver::Action*, 3u>&) const (llvm-project/build/bin/clang+++0x41e8093)
#7 0x0000562fb2a8395d clang::driver::Driver::BuildCompilation(llvm::ArrayRef<char const*>) (llvm-project/build/bin/clang+++0x41ef95d)
#8 0x0000562faf92684c clang_main(int, char**, llvm::ToolContext const&) (llvm-project/build/bin/clang+++0x109284c)
#9 0x0000562faf826cc6 main (llvm-project/build/bin/clang+++0xf92cc6)
#10 0x00007fcbf6699083 __libc_start_main /build/glibc-LcI20x/glibc-2.31/csu/../csu/libc-start.c:342:3
#11 0x0000562faf923a5e _start (llvm-project/build/bin/clang+++0x108fa5e)
[1] 2628042 segmentation fault (core dumped) main.cpp -fopenmp=libomp -fopenmp-targets=powerpc64le-ibm-linux-gnu -o
```
Commit: 37797d3e802f9e740b05556cdaa3bb1f6cdef5e0
https://github.com/llvm/llvm-project/commit/37797d3e802f9e740b05556cdaa3bb1f6cdef5e0
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M libcxx/test/std/containers/sequences/vector/common.h
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
Log Message:
-----------
[libc++][test] Fix and refactor exception tests for std::vector constructors (#117662)
The existing exceptions tests for `vector<T>` have several issues: some
tests did not throw exceptions at all, making them not useful for
exception-safety testing, and some tests did not throw exceptions at the
intended points, failing to serve their expected purpose. This PR fixes
those tests for vector's constructors. Morever, this PR extracted common
classes and utilities into a separate header file, and renamed those
classes using more descriptive names.
Commit: 2f4eac62879f9ccf6fda53e4e083e8eed46a9119
https://github.com/llvm/llvm-project/commit/2f4eac62879f9ccf6fda53e4e083e8eed46a9119
Author: Ties Stuij <ties.stuij at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/frame-pointer-elim.c
Log Message:
-----------
[clang][ARM] disable frame pointers by default for bare metal ARM targets (#117140)
because:
- This brings Clang in line with GCC for which this is the default for ARM
- It frees up a register, so performance increase, especially on Thumb/6-M
- It will decrease code size
Commit: 92376c3ff5453cb954a614d368fa3d52d6d0fa99
https://github.com/llvm/llvm-project/commit/92376c3ff5453cb954a614d368fa3d52d6d0fa99
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/src/interface.cpp
M offload/src/omptarget.cpp
M offload/test/api/omp_env_vars.c
M offload/test/offloading/info.c
M offload/test/offloading/ompx_bare.c
A offload/test/offloading/ompx_bare_multi_dim.cpp
M offload/test/offloading/small_trip_count.c
M offload/test/offloading/small_trip_count_thread_limit.cpp
Log Message:
-----------
[Offload][OMPX] Add the runtime support for multi-dim grid and block (#118042)
Commit: 1801fb4bd358cd6be0d085f9b74aacbeea951a17
https://github.com/llvm/llvm-project/commit/1801fb4bd358cd6be0d085f9b74aacbeea951a17
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[MLIR] Fixes arith.sub folder crash on dynamically shaped tensors (#118908)
We can't create a constant for a value with dynamic shape.
Fixes #118772
Commit: c91ba04328e1ded6f284469a7828d181324d4e30
https://github.com/llvm/llvm-project/commit/c91ba04328e1ded6f284469a7828d181324d4e30
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M flang/include/flang/Lower/Allocatable.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/MutableBox.h
M flang/include/flang/Optimizer/CodeGen/DescriptorModel.h
M flang/include/flang/Runtime/CUDA/allocatable.h
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/include/flang/Runtime/CUDA/memory.h
A flang/include/flang/Runtime/allocator-registry-consts.h
M flang/include/flang/Runtime/allocator-registry.h
A flang/include/flang/Runtime/array-constructor-consts.h
M flang/include/flang/Runtime/array-constructor.h
A flang/include/flang/Runtime/descriptor-consts.h
M flang/include/flang/Runtime/descriptor.h
A flang/include/flang/Runtime/io-api-consts.h
M flang/include/flang/Runtime/io-api.h
A flang/include/flang/Runtime/iostat-consts.h
M flang/include/flang/Runtime/iostat.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/ArrayConstructor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Semantics/compute-offsets.cpp
M flang/runtime/array-constructor.cpp
M flang/runtime/environment-default-list.h
M flang/runtime/internal-unit.cpp
M flang/test/Lower/HLFIR/array-ctor-as-runtime-temp.f90
M flang/test/Lower/HLFIR/array-ctor-character.f90
M flang/test/Lower/HLFIR/array-ctor-derived.f90
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/unittests/Optimizer/Builder/Runtime/AllocatableTest.cpp
M flang/unittests/Runtime/ArrayConstructor.cpp
M flang/unittests/Runtime/ExternalIOTest.cpp
M flang/unittests/Runtime/ListInputTest.cpp
M flang/unittests/Runtime/LogicalFormatTest.cpp
M flang/unittests/Runtime/Namelist.cpp
M flang/unittests/Runtime/NumericalFormatTest.cpp
M flang/unittests/Runtime/RuntimeCrashTest.cpp
Log Message:
-----------
[Flang][NFC] Split runtime headers in preparation for cross-compilation. (#112188)
Split some headers into headers for public and private declarations in
preparation for #110217. Moving the runtime-private headers in
runtime-private include directory will occur in #110298.
* Do not use `sizeof(Descriptor)` in the compiler. The size of the
descriptor is target-dependent while `sizeof(Descriptor)` is the size of
the Descriptor for the host platform which might be too small when
cross-compiling to a different platform. Another problem is that the
emitted assembly ((cross-)compiling to the same target) is not identical
between Flang's running on different systems. Moving the declaration of
`class Descriptor` out of the included header will also reduce the
amount of #included sources.
* Do not use `sizeof(ArrayConstructorVector)` and
`alignof(ArrayConstructorVector)` in the compiler. Same reason as with
`Descriptor`.
* Compute the descriptor's extra flags without instantiating a
Descriptor. `Fortran::runtime::Descriptor` is defined in the runtime
source, but not the compiler source.
* Move `InquiryKeywordHashDecode` into runtime-private header. The
function is defined in the runtime sources and trying to call it in the
compiler would lead to a link-error.
* Move allocator-kind magic numbers into common header. They are the
only declarations out of `allocator-registry.h` in the compiler as well.
This does not make Flang cross-compile ready yet, the main goal is to
avoid transitive header dependencies from Flang to clang-rt. There are
more assumptions that host platform is the same as the target platform.
Commit: d74214cc8c03159e5d1f1168a09368cf3b23fd5f
https://github.com/llvm/llvm-project/commit/d74214cc8c03159e5d1f1168a09368cf3b23fd5f
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/include/clang/Basic/Diagnostic.h
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
Log Message:
-----------
[clang][NFC] Change suppression mapping interfaces to use SourceLocation (#118960)
This way we can delay getting a presumed location even further, only
performing it for diagnostics that are mapped.
Commit: 2f9cd43a736008bdecdd920f84c702209ddbd20f
https://github.com/llvm/llvm-project/commit/2f9cd43a736008bdecdd920f84c702209ddbd20f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/BitcastBuffer.cpp
M clang/lib/AST/ByteCode/BitcastBuffer.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Check primitive bit casts for indeterminate bits (#118954)
Record bits ranges of initialized bits and check them in
allInitialized().
Commit: 1bdb0a408f1e2e9f6d5f43b23b4f87f87b3950ab
https://github.com/llvm/llvm-project/commit/1bdb0a408f1e2e9f6d5f43b23b4f87f87b3950ab
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
A libcxx/Maintainers.md
M llvm/Maintainers.md
Log Message:
-----------
[libcxx] Add Maintainers.md file
Commit: a43b2e13f9cc69ec7077ea9c74a972e178a2d8f7
https://github.com/llvm/llvm-project/commit/a43b2e13f9cc69ec7077ea9c74a972e178a2d8f7
Author: David Olsen <dolsen at nvidia.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
A clang/include/clang/CIR/Dialect/IR/CIRTypes.h
A clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
A clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR] Integral types; simple global variables (#118743)
Add integral types to ClangIR. These are the first ClangIR types, so the
change includes some infrastructure for managing ClangIR types.
So that the integral types can be used somewhere, generate ClangIR for
global variables using the new `cir.global` op. As with the current
support for functions, global variables are just a stub at the moment.
The only properties that global variables have are a name and a type.
Add a new ClangIR code gen test global-var-simple.cpp, which defines
global variables with most of the integral types.
(Part of upstreaming the ClangIR incubator project into LLVM.)
Commit: bb3eb0ca0cf0fe454f6845d429190cb30e6fa0f5
https://github.com/llvm/llvm-project/commit/bb3eb0ca0cf0fe454f6845d429190cb30e6fa0f5
Author: VladiKrapp-Arm <vladi.krapp at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
A llvm/test/Transforms/LoopUnroll/ARM/lob-unroll.ll
Log Message:
-----------
[ARM] Test unroll behaviour on machines with low overhead branching (#118692)
Add test for existing loop unroll behaviour.
Current behaviour is the single loop with fmul gets runtime unrolled by
count of 4, with the loop remainder unrolled as the 3 for.body9.us.prol
sections. This is quite a lot of compare and branch, negating the
benefits of the low overhead loop mechanism.
Commit: 5fa59edfa73a69ab146d7b9cc115de5770d11dca
https://github.com/llvm/llvm-project/commit/5fa59edfa73a69ab146d7b9cc115de5770d11dca
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/trunc.ll
Log Message:
-----------
[ConstraintElim] Add support for `trunc nsw/nuw` (#118745)
Proof for `trunc nsw nneg X -> trunc nuw X`:
https://alive2.llvm.org/ce/z/ooP6Mt
Commit: c74e2232f226b95d1cf73b9835ec1691a2022010
https://github.com/llvm/llvm-project/commit/c74e2232f226b95d1cf73b9835ec1691a2022010
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/test/Transforms/InstCombine/AMDGPU/lane-index-simplify-demanded-bits.ll
Log Message:
-----------
AMDGPU: Simplify demanded bits on readlane/writeline index arguments (#117963)
The main goal is to fold away wave64 code when compiled for wave32.
If we have out of bounds indexing, these will now clamp down to
a low bit which may CSE with the operations on the low half of the
wave.
Commit: 3f3bcac53ee492fd1c020be3690e87f5b0b8a41f
https://github.com/llvm/llvm-project/commit/3f3bcac53ee492fd1c020be3690e87f5b0b8a41f
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
A llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
A llvm/test/MC/AMDGPU/gfx11_asm_vinterp_alias.s
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
Log Message:
-----------
[AMDGPU] New alias v_interp_p2_new_f32 (#118968)
This is for compatibility with SP3. Also add basic testing for the new
GFX11 VINTERP encoding.
Commit: 807726fce4b44bffb1e6e853aae51ca74da3589c
https://github.com/llvm/llvm-project/commit/807726fce4b44bffb1e6e853aae51ca74da3589c
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
Log Message:
-----------
[AMDGPU] New aliases v_add3_nc_u32 and v_xor_add_u32 (#118970)
This is for compatibility with SP3.
Commit: 33f4f3972531badc1cece78d3ed5eaf969ff4709
https://github.com/llvm/llvm-project/commit/33f4f3972531badc1cece78d3ed5eaf969ff4709
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
A llvm/test/MC/AMDGPU/gfx11_asm_vopc_alias.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopcx_alias.s
Log Message:
-----------
[AMDGPU] New GFX11 v_cmp_tru_* aliases for integer comparisons (#118976)
This is for compatibility with SP3. It only affects GFX11 because the
v_cmp_t_* instructions were removed in GFX12.
Commit: e68a3e4d0dd349a34c02471438d2e97c2b29e846
https://github.com/llvm/llvm-project/commit/e68a3e4d0dd349a34c02471438d2e97c2b29e846
Author: Ping Charoenwet <wachiraph.c at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/source/Target/StackFrame.cpp
Log Message:
-----------
[lldb] Fix typos in `StackFrame.cpp` (#118991)
Commit: d6ec7c82f383ae4268f350f4d2e267af45fae8c0
https://github.com/llvm/llvm-project/commit/d6ec7c82f383ae4268f350f4d2e267af45fae8c0
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M flang/runtime/CUDA/descriptor.cpp
Log Message:
-----------
[flang][CUF] fix missing header after #112188 (#118993)
Otherwise, builds with `-DFLANG_CUF_RUNTIME` hits:
```
runtime/CUDA/descriptor.cpp:44:24: error: invalid use of incomplete type 'const class Fortran::runtime::Descriptor'
44 | std::size_t count{src->SizeInBytes()};
```
Commit: 140680c5c8560f03b7a4b3f7db5a7f3c158b938a
https://github.com/llvm/llvm-project/commit/140680c5c8560f03b7a4b3f7db5a7f3c158b938a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vpdpwssd.ll
Log Message:
-----------
[X86] Add peephole for (add (concat_vectors vpmaddwd, vpmaddwd)) -> vpdpwssd on VNNI targets
Cleanup for #118433
Commit: 6bc3c9ee6bfbace7275dedfddef1cb8f177aa491
https://github.com/llvm/llvm-project/commit/6bc3c9ee6bfbace7275dedfddef1cb8f177aa491
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
Log Message:
-----------
[X86] combineX86ShuffleChain - always create VPERMV3 nodes if started from a VPERMV3 node
If the root shuffle node was a VPERMV3 node, then we can always replace it with a new VPERMV3 node - it doesn't matter if other variable shuffles in the chain had multiple uses.
Commit: 9ad22cf0ee9eb686ea9fd76fd9cc41f4c006ccbc
https://github.com/llvm/llvm-project/commit/9ad22cf0ee9eb686ea9fd76fd9cc41f4c006ccbc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] lowerV32I16Shuffle - attempt to fold unary shuffle to lane permute + repeated mask
Fixes #79799
Commit: 4f7f71b7bccdc38f37b82981e8fa9ceb536a7016
https://github.com/llvm/llvm-project/commit/4f7f71b7bccdc38f37b82981e8fa9ceb536a7016
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
A llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
Log Message:
-----------
[VPlan] Compare APInt instead of getSExtValue to fix crash in unroll.
getSExtValue assumes the result fits in 64 bits, but this may not be the
case for indcutions with wider types. Instead, directly perform the
compare on the APInt for the ConstantInt.
Fixes https://github.com/llvm/llvm-project/issues/118850.
Commit: a46ee733d244333785c0896ce399341fe30240b0
https://github.com/llvm/llvm-project/commit/a46ee733d244333785c0896ce399341fe30240b0
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
Log Message:
-----------
[lldb] Fix off by one in array index check in Objective C runtime plugin (#118995)
Reported in #116944 / https://pvs-studio.com/en/blog/posts/cpp/1188/.
Commit: 1091fad31a83d5ab87eb6fa11fe3bdb3f0d152ea
https://github.com/llvm/llvm-project/commit/1091fad31a83d5ab87eb6fa11fe3bdb3f0d152ea
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Fix stack-use-after-scope in VPInstruction::generate (NFC).
Fix stack-use-after-scope introduced in 0678e2058364ec by pulling out
the vector to a dedicated variable.
Should fix ASan/MSan failures, including
https://lab.llvm.org/buildbot/#/builders/169/builds/6111.
Commit: f09b16e2671cbcdf7cb7dc7ed705db092a9deda1
https://github.com/llvm/llvm-project/commit/f09b16e2671cbcdf7cb7dc7ed705db092a9deda1
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/reduction-align.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
Log Message:
-----------
Revert "[VPlan] Update scalar induction resume values in VPlan. (#110577)"
This reverts commit 0678e2058364ec10b94560d27ec7138dfa003287.
This reverts commit 1091fad31a83d5ab87eb6fa11fe3bdb3f0d152ea.
Causes crashes in llvm-test-suite when using stage 2 clang.
Commit: 009b5e8e5915910d172f6660ceb69784c18e7ac7
https://github.com/llvm/llvm-project/commit/009b5e8e5915910d172f6660ceb69784c18e7ac7
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
A clang/test/SemaOpenACC/combined-construct-vector-ast.cpp
A clang/test/SemaOpenACC/combined-construct-vector-clause.cpp
M clang/test/SemaOpenACC/loop-construct-vector-clause.cpp
Log Message:
-----------
[OpenACC] 'vector' clause implementation for combined constructs
Similar to 'worker', the 'vector' clause has some rules that needed to
be applied on its argument legality that for combined constructs need to
look at the current construct, not the 'effective' parent construct.
Additionally, it has some interaction with `vector_length` that needed
to be encoded as well. This patch implements it.
Commit: dff47d944dc626eb2d1b846710a18cad6cc1fb22
https://github.com/llvm/llvm-project/commit/dff47d944dc626eb2d1b846710a18cad6cc1fb22
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
Log Message:
-----------
[RISCV] Add coverage for deinterleave with only subvector used
Commit: d42ab5d0f02bd7ac6fa50c7e393ba5848160b327
https://github.com/llvm/llvm-project/commit/d42ab5d0f02bd7ac6fa50c7e393ba5848160b327
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/regcoal-subranges-update-remat.mir
M llvm/test/CodeGen/SystemZ/regcoal-subranges-update.mir
M llvm/test/CodeGen/SystemZ/regcoal-undef-lane-4-rm-cp-commuting-def.mir
M llvm/test/CodeGen/SystemZ/regcoal_undefsrc.mir
Log Message:
-----------
SystemZ: Regenerate baseline checks for some coalescer tests (#118322)
These were missing -NEXT checks and also had some dead checks.
Also switch a test to actually check the output.
Commit: 2e33ed9ecc52fcec27eac2efb2615d1efcf6fd32
https://github.com/llvm/llvm-project/commit/2e33ed9ecc52fcec27eac2efb2615d1efcf6fd32
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M compiler-rt/include/sanitizer/memprof_interface.h
M compiler-rt/lib/memprof/memprof_flags.cpp
M compiler-rt/lib/memprof/memprof_flags.h
M compiler-rt/lib/memprof/memprof_interface_internal.h
M compiler-rt/lib/memprof/memprof_rtl.cpp
M compiler-rt/lib/memprof/weak_symbols.txt
M compiler-rt/test/memprof/TestCases/default_options.cpp
A compiler-rt/test/memprof/TestCases/set_options.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
A llvm/test/Instrumentation/HeapProfiler/memprof-options.ll
Log Message:
-----------
[memprof] Use -memprof-runtime-default-options to set options during compile time (#118874)
Add the `__memprof_default_options_str` variable, initialized via the
`-memprof-runtime-default-options` LLVM flag, to hold the default options string
for memprof. This allows us to set these options during compile time in
the clang invocation.
Also update the docs to describe the various ways to set these options.
Commit: b9aa155d26935c058449f4ac116201de000fd7bf
https://github.com/llvm/llvm-project/commit/b9aa155d26935c058449f4ac116201de000fd7bf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Analysis/CostModel/X86/shuffle-splat-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
Log Message:
-----------
[TTI][X86]Fix detection of the shuffles from the second shuffle operand only
If the shuffle mask uses only indices from the second shuffle operand,
processShuffleMasks function misses it currently, which prevents correct
cost estimation in this corner case. To fix this, need to raise the
limit to 2 * VF rather than just VF and adjust processing
correspondingly. Will allow future improvements for 2 sources
permutations.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/118972
Commit: bded8890149e55b9abc9c32cb4a9c883c3daad91
https://github.com/llvm/llvm-project/commit/bded8890149e55b9abc9c32cb4a9c883c3daad91
Author: Benjamin Maxwell <macdue at dueutil.tech>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenCXX/aarch64-sve-vector-init.cpp
Log Message:
-----------
[clang][AArch64] Fix C++11 style initialization of typedef'd vectors (#118956)
Previously, this hit an `llvm_unreachable()` assertion as the type of
`vec_t` did not exactly match `__SVInt8_t`, as it was wrapped in a
typedef.
Comparing the canonical types instead allows the types to match
correctly and avoids the crash.
Fixes #107609
Commit: 39451e45f5905b5b3f8f6b6eb1d71005e6bcdd6a
https://github.com/llvm/llvm-project/commit/39451e45f5905b5b3f8f6b6eb1d71005e6bcdd6a
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M libc/src/__support/CPP/atomic.h
M libc/src/__support/CPP/type_traits.h
A libc/src/__support/CPP/type_traits/is_copy_assignable.h
A libc/src/__support/CPP/type_traits/is_copy_constructible.h
A libc/src/__support/CPP/type_traits/is_move_assignable.h
A libc/src/__support/CPP/type_traits/is_move_constructible.h
M libc/src/__support/CPP/type_traits/is_trivially_copyable.h
M libc/test/src/__support/CPP/atomic_test.cpp
Log Message:
-----------
[libc][CPP] clean up and generalize atomic implementation (#118996)
Commit: 7f4414b2a1a4d9f802a03f56894c406f0fe3e9a9
https://github.com/llvm/llvm-project/commit/7f4414b2a1a4d9f802a03f56894c406f0fe3e9a9
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-fcvtzsu.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (4/11) (#116830)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`FCVTZS`, and `FCVTZU` instructions.
Commit: 02db35a1d644b559d3841f31e9167d12458f8efc
https://github.com/llvm/llvm-project/commit/02db35a1d644b559d3841f31e9167d12458f8efc
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Semantics/OpenMP/from-clause-v45.f90
M flang/test/Semantics/OpenMP/reduction04.f90
M flang/test/Semantics/OpenMP/reduction06.f90
M flang/test/Semantics/OpenMP/reduction12.f90
A flang/test/Semantics/OpenMP/reduction15.f90
A flang/test/Semantics/OpenMP/reduction16.f90
M flang/test/Semantics/OpenMP/to-clause-v45.f90
M flang/test/Semantics/OpenMP/use_device_addr1.f90
M flang/test/Semantics/OpenMP/use_device_ptr1.f90
Log Message:
-----------
[flang][OpenMP] Implement `CheckReductionObjects` for all reduction c… (#118689)
…lauses
Currently we only do semantic checks for REDUCTION. There are two other
clauses, IN_REDUCTION, and TASK_REDUCTION which will also need those
checks. Implement a function that checks the common list-item
requirements for all those clauses.
Commit: e73ec1a74af3a390af5a77dea64022019a2a5686
https://github.com/llvm/llvm-project/commit/e73ec1a74af3a390af5a77dea64022019a2a5686
Author: Thirumalai Shaktivel <74826228+Thirumalai-Shaktivel at users.noreply.github.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Examples/omp-declarative-directive.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
A flang/test/Semantics/OpenMP/linear-clause01.f90
Log Message:
-----------
[Flang][OpenMP] Add some semantic checks for Linear clause (#111354)
This PR adds all the missing semantics for the Linear clause based on
the OpenMP 5.2 restrictions. The restriction details are mentioned
below.
OpenMP 5.2:
5.4.6 linear Clause restrictions
- A linear-modifier may be specified as ref or uval only on a declare
simd directive.
- If linear-modifier is not ref, all list items must be of type integer.
- If linear-modifier is ref or uval, all list items must be dummy
arguments without the VALUE attribute.
- List items must not be Cray pointers or variables that have the
POINTER attribute. Cray pointer support has been deprecated.
- If linear-modifier is ref, list items must be polymorphic variables,
assumed-shape arrays, or variables with the ALLOCATABLE attribute.
- A common block name must not appear in a linear clause.
- The list-item cannot appear more than once
4.4.4 ordered Clause restriction
- If n is explicitly specified, a linear clause must not be specified on
the same directive.
5.11 aligned Clause restriction
- Each list item must have C_PTR or Cray pointer type or have the
POINTER or ALLOCATABLE attribute. Cray pointer support has been
deprecated.
Commit: 4a44e4b192db0bb38d3eb7ff20c767e2c747d745
https://github.com/llvm/llvm-project/commit/4a44e4b192db0bb38d3eb7ff20c767e2c747d745
Author: Michał Górny <mgorny at gentoo.org>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M offload/cmake/OpenMPTesting.cmake
Log Message:
-----------
[offload] Remove bogus offload-tblgen check for standalone build (#119004)
fd3907ccb583df99e9c19d2fe84e4e7c52d75de9 introduced a check for system
offload-tblgen executable when doing a standalone build. This check is
bogus, since offload-tblgen is built as part of offload and not some
other preinstalled component. The path is also overwritten below, so the
check only causes tests to be disabled unnecessarily.
Commit: 12bdeba76eef1c7adf004a280036a7fb690ba573
https://github.com/llvm/llvm-project/commit/12bdeba76eef1c7adf004a280036a7fb690ba573
Author: Haowei Wu <haowei at google.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/ExternalASTSource.h
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderInternals.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/CMakeLists.txt
R clang/lib/Serialization/TemplateArgumentHasher.cpp
R clang/lib/Serialization/TemplateArgumentHasher.h
M clang/test/Modules/odr_hash.cpp
R clang/test/Modules/recursive-instantiations.cppm
M clang/test/OpenMP/target_parallel_ast_print.cpp
M clang/test/OpenMP/target_teams_ast_print.cpp
M clang/test/OpenMP/task_ast_print.cpp
M clang/test/OpenMP/teams_ast_print.cpp
M clang/unittests/Serialization/CMakeLists.txt
R clang/unittests/Serialization/LoadSpecLazilyTest.cpp
Log Message:
-----------
Revert "[Serialization] Support load lazy specialization lazily"
This reverts commit b5bd19211118c6d43bc525a4e3fb65d2c750d61e.
It brokes multiple llvm bots including clang-x64-windows-msvc
Commit: 1d95825d4d168a17a4f27401dec3f2977a59a70e
https://github.com/llvm/llvm-project/commit/1d95825d4d168a17a4f27401dec3f2977a59a70e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Serialization/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Serialization/BUILD.gn
Log Message:
-----------
[gn build] Port 12bdeba76eef
Commit: 84efad0b471543003c0724c85f158f66fccfdc0f
https://github.com/llvm/llvm-project/commit/84efad0b471543003c0724c85f158f66fccfdc0f
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
A llvm/test/CodeGen/RISCV/fixed-csr.ll
Log Message:
-----------
[RISCV][MRI] Account for fixed registers when determining callee saved regs (#115756)
This fixes
https://discourse.llvm.org/t/fixed-register-being-spill-and-restored-in-clang/83058.
We need to do it in `MachineRegisterInfo::getCalleeSavedRegs` instead of
`RISCVRegisterInfo::getCalleeSavedRegs` since the MF argument of
`TargetRegisterInfo:::getCalleeSavedRegs` is `const`, so we can't call
`MF->getRegInfo().disableCalleeSavedRegister` there.
So to put it in `MachineRegisterInfo::getCalleeSavedRegs`, we move
`isRegisterReservedByUser` into `TargetSubtargetInfo`.
Commit: 3c83054bec3326ccf338eeda56e67e8cd83a3b2a
https://github.com/llvm/llvm-project/commit/3c83054bec3326ccf338eeda56e67e8cd83a3b2a
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Add tests for suboptimal interleave patterns
Upcoming changes will improve codegen in these cases per the included
TOOOs.
Commit: ca3180ad6e39304177deac112bd78739d85fe32b
https://github.com/llvm/llvm-project/commit/ca3180ad6e39304177deac112bd78739d85fe32b
Author: Chris Apple <cja-private at pm.me>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Transforms/Instrumentation/RealtimeSanitizer.h
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Instrumentation/RealtimeSanitizer.cpp
M llvm/test/Instrumentation/RealtimeSanitizer/rtsan.ll
Log Message:
-----------
[LLVM][rtsan] Add module pass to initialize rtsan (#118989)
This allows shared libraries instrumented with RTSan to be initialized.
This approach directly mirrors the approach in Tsan, Asan and many of
the other sanitizers
Commit: 7f7f540a48982d7901412502d045d7863d951ffe
https://github.com/llvm/llvm-project/commit/7f7f540a48982d7901412502d045d7863d951ffe
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/reduction-align.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
Log Message:
-----------
Reapply "[VPlan] Update scalar induction resume values in VPlan. (#110577)"
This reverts commit f09b16e2671cbcdf7cb7dc7ed705db092a9deda1.
The crash when building llvm-test-suite with stage2 should have been
fixed by 1091fad31a83d5ab87eb6fa11fe3bdb3f0d152ea.
Commit: ab0dc290bca14b8a13540a846724dcd034397f5d
https://github.com/llvm/llvm-project/commit/ab0dc290bca14b8a13540a846724dcd034397f5d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-phi-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/phi.ll
Log Message:
-----------
[RISCV][GISel] Allow s32 G_PHI for RV64 to support f32 phis.
Commit: 131b7fe2b108fb33efd031371f0f8a993e374860
https://github.com/llvm/llvm-project/commit/131b7fe2b108fb33efd031371f0f8a993e374860
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
Log Message:
-----------
[RISCV][VLOPT] Add support for widening integer mul-add instructions (#112219)
This adds support for these instructions and also tests getOperandInfo
for these instructions as well. I think the VL on the using add
instruction can be optimized further, once we add support for optimizing
non-vlmax.
Commit: c5e4e8f87da8156108716b0e24e9ef40682562e8
https://github.com/llvm/llvm-project/commit/c5e4e8f87da8156108716b0e24e9ef40682562e8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Add IndexedMemProfData::addCallStack (#118920)
This patch adds a helper function to replace an idiom like:
CallStackId CSId = hashCallStack(CallStack)
MemProfData.CallStacks.try_emplace(CSId, CallStack);
// Do something with CSId.
Commit: 1df28554bd6264d44aa2ce12e5a2fc29f61bb027
https://github.com/llvm/llvm-project/commit/1df28554bd6264d44aa2ce12e5a2fc29f61bb027
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
A clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
A clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
Log Message:
-----------
[HLSL] Add ByteAddressBuffer, RWByteAddressBuffer and RasterizerOrderedByteAddressBuffer definitions to HLSLExternalSemaSource #113477 (#116699)
This is the first one in a series of PRs adding the requirements for
#58654
This PR adds `ByteAddressBuffer`, `RWByteAddressBuffer ` and
`RasterizerOrderedByteAddressBuffer ` definitions as well as their
handle lowering to `dx.RawBuffer`.
closes #58654
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: b23fc2c5bf92ae3bcd2ac4c784ead0ffba159f5a
https://github.com/llvm/llvm-project/commit/b23fc2c5bf92ae3bcd2ac4c784ead0ffba159f5a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M libcxxabi/src/cxa_guard_impl.h
Log Message:
-----------
[libc++abi] Fix broken check for _LIBCPP_HAS_THREAD_API_PTHREAD (#118999)
We were still using the old `defined(_LIBCPP_HAS_THREAD_API_PTHREAD)`
check, which is always true.
Commit: cd74ebaec606e35485f007e3dcf2609f4cf9bef6
https://github.com/llvm/llvm-project/commit/cd74ebaec606e35485f007e3dcf2609f4cf9bef6
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M libcxx/test/std/containers/sequences/vector/common.h
Log Message:
-----------
[libc++] Make a few test helper constructors explicit (#118975)
Commit: 516d6ede122086027baa2288623605a423375e87
https://github.com/llvm/llvm-project/commit/516d6ede122086027baa2288623605a423375e87
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/test/Dialect/GPU/outlining.mlir
Log Message:
-----------
[mlir][gpu] Add optional attributes of kernelModule and kernelFunc for outlining kernels. (#118861)
Adding optional attributes so we can specify the kernel function names
and the kernel module names generated.
Commit: 5d9c321e8d3b543c7da44f1b0447d4d09570ddbb
https://github.com/llvm/llvm-project/commit/5d9c321e8d3b543c7da44f1b0447d4d09570ddbb
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/vscale-memset.ll
Log Message:
-----------
Handle scalable store size in MemCpyOptimizer (#118957)
The compiler crashes with an ICE when it tries to create a `memset` with
scalable size.
Commit: 6cb339f9c1009d94925ec3b8138cac35cbe50bf3
https://github.com/llvm/llvm-project/commit/6cb339f9c1009d94925ec3b8138cac35cbe50bf3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M libcxx/test/benchmarks/allocation.bench.cpp
R libcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp
M libcxx/test/libcxx/memory/shared_ptr_array.pass.cpp
M libcxx/test/std/language.support/support.dynamic/align_val_t.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.pass.cpp
A libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array.pass.cpp
R libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
R libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array_fsizeddeallocation.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.pass.cpp
A libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete.pass.cpp
R libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
R libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete_fsizeddeallocation.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/types.h
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++] Refactor tests for aligned allocation and sized deallocation (#117915)
This patch refactors the tests around aligned allocation and sized
deallocation to avoid relying on passing the -fsized-deallocation or
-faligned-allocation flags by default. Since both of these features are
enabled by default in >= C++14 mode, it now makes sense to make that
assumption in the test suite.
A notable exception is MinGW and some older compilers, where sized
deallocation is still not enabled by default. We treat that as a "bug"
in the test suite and we work around it by explicitly adding
-fsized-deallocation, but only under those configurations.
Commit: 7ff89294b63f8f15c650fe314cff5c576978c489
https://github.com/llvm/llvm-project/commit/7ff89294b63f8f15c650fe314cff5c576978c489
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M libc/src/__support/CPP/atomic.h
Log Message:
-----------
[libc] Update fence to use scoped fence now that it's supported (#119018)
Summary:
Adds support for scoped fences now that the NVPTX backend doesn't break
on them.
Commit: 4b24ab4be9351ef822fd8fd546237eabd8c3ba57
https://github.com/llvm/llvm-project/commit/4b24ab4be9351ef822fd8fd546237eabd8c3ba57
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
M llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
Log Message:
-----------
Reland "[NVPTX] Add folding for cvt.rn.bf16x2.f32" (#116417)
Reland https://github.com/llvm/llvm-project/pull/116109.
Fixes issue where operands were flipped.
Per the PTX spec, a mov instruction packs the first operand as low, and
the second operand as high:
> ```
> // pack two 16-bit elements into .b32
> d = a.x | (a.y << 16)
> ```
On the other hand cvt.rn.f16x2.f32 instructions take high, than low
operands:
> For .f16x2 and .bf16x2 instruction type, two inputs a and b of .f32
type are converted into .f16 or .bf16 type and the converted values are
packed in the destination register d, such that the value converted from
input a is stored in the upper half of d and the value converted from
input b is stored in the lower half of d
Commit: 6797b0f0c002c9f3dda7a2b502ddf33e2c8f6777
https://github.com/llvm/llvm-project/commit/6797b0f0c002c9f3dda7a2b502ddf33e2c8f6777
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[VPlan] Use RPOT for VPlan codegen and printing.
This split off changes for more complex CFGs in VPlan from both
https://github.com/llvm/llvm-project/pull/114292
https://github.com/llvm/llvm-project/pull/112138
This simplifies their respective diffs.
Commit: 376dad72abb4960cd93e37e3e98de3950b5c3dfe
https://github.com/llvm/llvm-project/commit/376dad72abb4960cd93e37e3e98de3950b5c3dfe
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/perfect-matched-reused-bv.ll
Log Message:
-----------
[SLP]Move resulting vector before inert point, if the late generated buildvector fully matched
If the perfect diamond match was detected for the postponed buildvectors
and the vector for the previous node comes after the current node, need
to move the vector register before the current inserting point to
prevent compiler crash.
Fixes #119002
Commit: f9e11501841fc602488fea78b88910eab7d4d396
https://github.com/llvm/llvm-project/commit/f9e11501841fc602488fea78b88910eab7d4d396
Author: Petr Hosek <phosek at google.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/test/Driver/baremetal-multilib.yaml
M clang/test/Driver/baremetal-sysroot.cpp
M clang/test/Driver/baremetal.cpp
Log Message:
-----------
[Driver] Normalize the baremetal handling of libc++ and runtimes (#101259)
The handling of libc++ and other runtime libraries in the baremetal
driver is different from other targets for no particular reason. This
change removes the custom in the baremetal driver logic and replaces it
with the generic logic to improve consistency and reduce maintenance
overhead while also handling additional flags the current logic doesn't.
Commit: 01d8e0fc75a897a6a9c2ce634645457a895ed505
https://github.com/llvm/llvm-project/commit/01d8e0fc75a897a6a9c2ce634645457a895ed505
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/include/lldb/Target/Platform.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
Log Message:
-----------
[lldb] Add a per-CU API to read the SDK (#119022)
The Swift plugin would find this useful.
Commit: 030bbc92a705758f1131fb29cab5be6d6a27dd1f
https://github.com/llvm/llvm-project/commit/030bbc92a705758f1131fb29cab5be6d6a27dd1f
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/SystemZ/builtin-setjmp-logjmp.c
M llvm/docs/ExceptionHandling.rst
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
A llvm/test/CodeGen/SystemZ/builtin-longjmp.ll
A llvm/test/CodeGen/SystemZ/builtin-setjmp-alloca.ll
A llvm/test/CodeGen/SystemZ/builtin-setjmp-spills.ll
A llvm/test/CodeGen/SystemZ/builtin-setjmp.ll
Log Message:
-----------
[SystemZ] Add support for __builtin_setjmp and __builtin_longjmp (#116642)
Implementation for __builtin_setjmp and __builtin_longjmp for SystemZ.
Commit: 832ccfe55275b1561b2548bfac075447037d6663
https://github.com/llvm/llvm-project/commit/832ccfe55275b1561b2548bfac075447037d6663
Author: Christopher Bate <cbate at nvidia.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M mlir/lib/Analysis/Presburger/PWMAFunction.cpp
Log Message:
-----------
[mlir][presburger] NFC: Add missing definition for 'MultiAffineFunction::dump' (#118397)
Commit: 3c47e63723b1aa9e76f30fc8d1acef9caf4ea783
https://github.com/llvm/llvm-project/commit/3c47e63723b1aa9e76f30fc8d1acef9caf4ea783
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Log Message:
-----------
[SystemZ] Fix a warning
This patch fixes:
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp:953:30: error:
unused variable 'TRI' [-Werror,-Wunused-variable]
Commit: 83ad90d851f9e32a51d56193125ab596cc3636b6
https://github.com/llvm/llvm-project/commit/83ad90d851f9e32a51d56193125ab596cc3636b6
Author: Siu Chi Chan <siuchi.chan at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
A llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging-weak_odr.ll
Log Message:
-----------
[AMDGPU] Fix module split's assumption on kernels
Module split assumes that a kernel function must have an external
linkage; however, that isn't the case. For example, a static kernel
function will have a weak_odr linkage
Change-Id: I1e5dee0de1fd866b365f4090a574e1b2961f8dca
Commit: 8fc6fca9f28ce20d76066be66fcc41aa38f7dc3d
https://github.com/llvm/llvm-project/commit/8fc6fca9f28ce20d76066be66fcc41aa38f7dc3d
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
A clang/test/CodeGen/AArch64/fixed-register-global.c
R clang/test/Driver/aarch64-fixed-register-global.c
M clang/test/Sema/aarch64-fixed-global-register.c
Log Message:
-----------
[clang][AArch64] Avoid a crash when a non-reserved register is used (#117419)
Fixes #76426, #109778 (for AArch64)
The previous patch for this issue, #94271, generated an error message if
a register and a global variable did not have the same size. This patch
checks if the register is reserved.
Commit: da65fe1c16308cdb71b2fd26aaedc0ce52521ab4
https://github.com/llvm/llvm-project/commit/da65fe1c16308cdb71b2fd26aaedc0ce52521ab4
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
R clang/test/CodeGen/AArch64/fixed-register-global.c
A clang/test/Driver/aarch64-fixed-register-global.c
M clang/test/Sema/aarch64-fixed-global-register.c
Log Message:
-----------
Revert "[clang][AArch64] Avoid a crash when a non-reserved register is used (#117419)"
This reverts commit 8fc6fca9f28ce20d76066be66fcc41aa38f7dc3d.
Commit: 0ee364d2a28104aaa36e246fc8a316f86de32aae
https://github.com/llvm/llvm-project/commit/0ee364d2a28104aaa36e246fc8a316f86de32aae
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/docs/index.rst
A lldb/docs/resources/formatterbytecode.rst
A lldb/examples/python/formatter_bytecode.py
A lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/MyOptional.cpp
A lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/formatter.py
A lldb/test/Shell/ScriptInterpreter/Python/bytecode.test
Log Message:
-----------
[lldb] Add a compiler/interpreter of LLDB data formatter bytecode to lldb/examples (#113398)
This PR adds a proof-of-concept for a bytecode designed to ship and run
LLDB data formatters. More motivation and context can be found in the
`formatter-bytecode.md` file and on discourse.
https://discourse.llvm.org/t/a-bytecode-for-lldb-data-formatters/82696
Commit: 9ac52ce8d6cb7adcb5f3981952e39207c5b9588a
https://github.com/llvm/llvm-project/commit/9ac52ce8d6cb7adcb5f3981952e39207c5b9588a
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.simple.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
Log Message:
-----------
[AMDGPU] Add iglp_opt(3) for simple mfma / exp interleaving (#117269)
Adds a minimal iglp_opt to do simple exp / mfma interleaving.
Commit: 8ab76a47b242addc82109a3b3b6de9c3d6426eca
https://github.com/llvm/llvm-project/commit/8ab76a47b242addc82109a3b3b6de9c3d6426eca
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/docs/index.rst
R lldb/docs/resources/formatterbytecode.rst
R lldb/examples/python/formatter_bytecode.py
R lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/MyOptional.cpp
R lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/formatter.py
R lldb/test/Shell/ScriptInterpreter/Python/bytecode.test
Log Message:
-----------
Revert "[lldb] Add a compiler/interpreter of LLDB data formatter bytecode to examples"
This reverts commit 7e3da87ca896484a11ac09df297183147154ac91.
I managed to break the bots.
Commit: 50c0e679b9e23787a4fc5a6a7c04571e4b0bb3f1
https://github.com/llvm/llvm-project/commit/50c0e679b9e23787a4fc5a6a7c04571e4b0bb3f1
Author: Alexander Yermolovich <43973793+ayermolo at users.noreply.github.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M bolt/lib/Core/DebugNames.cpp
A bolt/test/X86/dwarf5-debug-names-union.test
Log Message:
-----------
[BOLT][DWARF] Add support for DW_TAG_union_type to DebugNames. (#119023)
Adding support for DW_TAG_union_type for DebugNames acceleration tables.
Commit: 9f430bd415f462c2b7e32d895eab02c5c2207657
https://github.com/llvm/llvm-project/commit/9f430bd415f462c2b7e32d895eab02c5c2207657
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Log Message:
-----------
Revert "[SystemZ] Fix a warning"
This reverts commit 3c47e63723b1aa9e76f30fc8d1acef9caf4ea783.
Commit: 8787bc72a61aa43a6e937647b6797ddb2ff287d2
https://github.com/llvm/llvm-project/commit/8787bc72a61aa43a6e937647b6797ddb2ff287d2
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/CodeGen/CGBuiltin.cpp
R clang/test/CodeGen/SystemZ/builtin-setjmp-logjmp.c
M llvm/docs/ExceptionHandling.rst
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
R llvm/test/CodeGen/SystemZ/builtin-longjmp.ll
R llvm/test/CodeGen/SystemZ/builtin-setjmp-alloca.ll
R llvm/test/CodeGen/SystemZ/builtin-setjmp-spills.ll
R llvm/test/CodeGen/SystemZ/builtin-setjmp.ll
Log Message:
-----------
Revert "[SystemZ] Add support for __builtin_setjmp and __builtin_longjmp (#116642)"
This reverts commit 030bbc92a705758f1131fb29cab5be6d6a27dd1f.
Commit: 17a7f20685de2a275fc2e53a38c5818797fe8a44
https://github.com/llvm/llvm-project/commit/17a7f20685de2a275fc2e53a38c5818797fe8a44
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] merge same part matchers in return-const-ref-from-parameter (#118985)
Commit: 60380cd27c6fa5ed6e39866c51b18a64bc4d566a
https://github.com/llvm/llvm-project/commit/60380cd27c6fa5ed6e39866c51b18a64bc4d566a
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/docs/index.rst
A lldb/docs/resources/formatterbytecode.rst
A lldb/examples/python/formatter_bytecode.py
A lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/MyOptional.cpp
A lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/formatter.py
A lldb/test/Shell/ScriptInterpreter/Python/bytecode.test
Log Message:
-----------
[lldb] Add a compiler/interpreter of LLDB data formatter bytecode to examples
This PR adds a proof-of-concept for a bytecode designed to ship and
run LLDB data formatters. More motivation and context can be found in
the formatter-bytecode.rst file and on discourse.
https://discourse.llvm.org/t/a-bytecode-for-lldb-data-formatters/82696
Relanding with a fix for a case-sensitive path.
Commit: afa2fbf87a8e3fff609fd325c938929c48e94280
https://github.com/llvm/llvm-project/commit/afa2fbf87a8e3fff609fd325c938929c48e94280
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
A clang/test/CodeGen/AArch64/fixed-register-global.c
R clang/test/Driver/aarch64-fixed-register-global.c
M clang/test/Sema/aarch64-fixed-global-register.c
Log Message:
-----------
[Reland][clang][AArch64] Avoid a crash when a non-reserved register is used (#117419)
Relanding the patch with a fix for a test failure on build bots that do
not build LLVM for AArch64.
Fixes #76426, #109778 (for AArch64)
The previous patch for this issue, #94271, generated an error message if
a register and a global variable did not have the same size. This patch
checks if the register is reserved.
Commit: 509893b58ff444a6f080946bd368e9bde7668f13
https://github.com/llvm/llvm-project/commit/509893b58ff444a6f080946bd368e9bde7668f13
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
Reapply "[AMDGPU] prevent shrinking udiv/urem if either operand is in… (#118928)
… (SignedMax,UnsignedMax] (#116733)"
This reverts commit 905e831f8c8341e53e7e3adc57fd20b8e08eb999.
Handle signed and unsigned path differently in getDivNumBits. Using
computeKnownBits, this rejects shrinking unsigned div/rem if operands
exceed signed max since we know NumSignBits will be always 0.
Rebased and re-attempt after first one was reverted due to unrelated
failure in LibC (should be fixed by now I'm told).
Commit: b504c8771f238883ef6c7234d741c2dc1d885ae3
https://github.com/llvm/llvm-project/commit/b504c8771f238883ef6c7234d741c2dc1d885ae3
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/docs/index.rst
R lldb/docs/resources/formatterbytecode.rst
R lldb/examples/python/formatter_bytecode.py
R lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/MyOptional.cpp
R lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/formatter.py
R lldb/test/Shell/ScriptInterpreter/Python/bytecode.test
Log Message:
-----------
Revert "[lldb] Add a compiler/interpreter of LLDB data formatter bytecode to examples"
This reverts commit 60380cd27c6fa5ed6e39866c51b18a64bc4d566a.
Commit: fffe8c668461e73055182f229765cb7de908e295
https://github.com/llvm/llvm-project/commit/fffe8c668461e73055182f229765cb7de908e295
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/docs/index.rst
A lldb/docs/resources/formatterbytecode.rst
A lldb/examples/python/formatter_bytecode.py
A lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/MyOptional.cpp
A lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/formatter.py
A lldb/test/Shell/ScriptInterpreter/Python/bytecode.test
Log Message:
-----------
[lldb] Add a compiler/interpreter of LLDB data formatter bytecode to examples
This PR adds a proof-of-concept for a bytecode designed to ship and
run LLDB data formatters. More motivation and context can be found in
the formatter-bytecode.rst file and on discourse.
https://discourse.llvm.org/t/a-bytecode-for-lldb-data-formatters/82696
Relanding with a fix for a case-sensitive path.
Commit: a07e8cdae7727583e20c9dec632a376365a6e209
https://github.com/llvm/llvm-project/commit/a07e8cdae7727583e20c9dec632a376365a6e209
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/return-const-ref-from-parameter.cpp
Log Message:
-----------
[clang-tidy] fix false positive in lambda expr for return-const-ref-from-parameter (#118990)
We should bind the node in `hasAncestor` matcher and `equalsBoundNode`
in the other matcher because `hasAncestor` will visit the ancestor until
to find the matched result.
Commit: 02ad623bb560afa1a789b49f715c9a0e48ea9b16
https://github.com/llvm/llvm-project/commit/02ad623bb560afa1a789b49f715c9a0e48ea9b16
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Prefer strided store for interleave store with one lane active (#119027)
If we're performing a segment store and all but one of the segments are
undefined, that's equivalent to performing a strided store of the one
active segment.
This is the store side of a905203b. As before, this only covers fixed
vectors.
Commit: 9f98949c9424addbc573fac7912cc164965b8994
https://github.com/llvm/llvm-project/commit/9f98949c9424addbc573fac7912cc164965b8994
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
Log Message:
-----------
[lldb] Move the python module import workaround further up
Commit: 9d64af9e52707cf548bf767e0010fc82feed4831
https://github.com/llvm/llvm-project/commit/9d64af9e52707cf548bf767e0010fc82feed4831
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/M68k/M68kSubtarget.h
Log Message:
-----------
[M68k] Fix -Winconsistent-missing-override after #115756
Commit: c49d809f2f54894ca8be4c037825a350e8131992
https://github.com/llvm/llvm-project/commit/c49d809f2f54894ca8be4c037825a350e8131992
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M .github/workflows/commit-access-review.py
Log Message:
-----------
workflows/commit-access-review: Update label name (#118903)
We switched to using a new label name for tracking commit access
requests.
Commit: 0d5ae3632d6f1db0b0a308265fc3762679287a9b
https://github.com/llvm/llvm-project/commit/0d5ae3632d6f1db0b0a308265fc3762679287a9b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M .github/workflows/commit-access-review.py
M llvm/utils/git/requirements.txt
M llvm/utils/git/requirements.txt.in
Log Message:
-----------
workflows/commit-access-review: Use Python APIs for graphql queries (#108903)
Commit: 18af3fc1bf8855e1e166e64a9210ed07d610aa54
https://github.com/llvm/llvm-project/commit/18af3fc1bf8855e1e166e64a9210ed07d610aa54
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
[Clang][perf-training] Fix clean command in perf-helper.py (#118978)
The first path argument was always being ignored, and since most calls
to this command only passed one path, it wasn't actually doing anything
in most cases.
This bug was introduced by dd0356d741aefa25ece973d6cc4b55dcb73b84b4.
Commit: bcf6f84763ea01d0a22022d0d64442e774fe86ab
https://github.com/llvm/llvm-project/commit/bcf6f84763ea01d0a22022d0d64442e774fe86ab
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/new-delete.cpp
Log Message:
-----------
Revert "[Clang] Deleting an incomplete enum type is not an error (#118455) (#118980)
This reverts commit 8271195de05742ed7079d7882fbebc2daecbd7e2.
Commit: 943cc71a6cfc52a88a413ab093c2d1e3f12d55e0
https://github.com/llvm/llvm-project/commit/943cc71a6cfc52a88a413ab093c2d1e3f12d55e0
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/cfcmov.ll
Log Message:
-----------
[X86][APX] Convert store(cmov(load(x), y), x) to cstore(y, x) (#118946)
Commit: 3d6b37e3c3e135f5f25f4f4f1cdb1ffbc6d13c89
https://github.com/llvm/llvm-project/commit/3d6b37e3c3e135f5f25f4f4f1cdb1ffbc6d13c89
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/test/CodeGen/RISCV/fp128.ll
Log Message:
-----------
[RuntimeLibcalls] Fix spelling fminmum->fminimum fmaxmum->fmaximum. (#118728)
Commit: 52646d087cdecd217436b2714f94b84c46b5720a
https://github.com/llvm/llvm-project/commit/52646d087cdecd217436b2714f94b84c46b5720a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/knownbits-copy-crash.mir
Log Message:
-----------
[GISel] Teach computeKnownBitsImpl to handle COPY instructions that change bit width. (#118924)
The sexti32 ComplexRenderFn on RISCV calls computeNumSignBits which
calls computeKnownBits.
I encountered a case where we looked through a G_PHI and found a COPY
that was created from an already selected G_TRUNC from s64 to s32. s32
and s64 integers on RISC-V end up in the same register class. s32 G_PHI
is legal to allow f32 phis on RV64. The COPY inherited the types from the
original G_TRUNC so the source and destination virtual registers have
different widths.
This patch uses KnownBits::anyextOrTrunc to adjust the width when they
mismatch.
Commit: 495816cbc83b0760442568da18317df0955a289f
https://github.com/llvm/llvm-project/commit/495816cbc83b0760442568da18317df0955a289f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV] Add i16->i32 G_ZEXT/G_SEXT patterns for RV64.
Because we support s16 and s32 types for FP some operations like
G_PHI, G_SELECT, G_FREEZE can exist with s16 and s32 operands
even when they will be assigned to the GPR reg bank. These
instructions can be surrounded with G_ZEXT and G_SEXT that convert
from s16 to s32 so we need to be able to select them.
Commit: 00090ac0b9d391acb07c0099311987671c2cac1c
https://github.com/llvm/llvm-project/commit/00090ac0b9d391acb07c0099311987671c2cac1c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Use IndexedMemProfData in tests (NFC) (#119049)
This patch replaces FrameIdMap and CallStackIdMap with
IndexedMemProfData, which comes with recently introduced methods like
addFrame and addCallStack.
Commit: 32f7f0010bca99ee4bd917f57272733fb2bf3bd9
https://github.com/llvm/llvm-project/commit/32f7f0010bca99ee4bd917f57272733fb2bf3bd9
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Use gtest matchers at more places (#119050)
These gtest matchers reduce the number of times we mention the
variables under examined.
Commit: 37606b4c22654ab66eee8f89448a117f3534f2f4
https://github.com/llvm/llvm-project/commit/37606b4c22654ab66eee8f89448a117f3534f2f4
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
A 0001-Reland-Add-a-pass-to-collect-dropped-var-stats-for-M.patch
A 0001-Reland-NFC-Move-DroppedVariableStats-to-its-own-file.patch
A llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
A llvm/unittests/CodeGen/DroppedVariableStatsIRTest.cpp
M llvm/unittests/IR/CMakeLists.txt
R llvm/unittests/IR/DroppedVariableStatsTest.cpp
Log Message:
-----------
Reland "[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible (#118546)" (#119048)
Move the virtual destructor definition to the cpp file and see if that
gets rid of the undefined vtable error.
Commit: e0ed0333f0fed2e73f805afd58b61176a87aa3ad
https://github.com/llvm/llvm-project/commit/e0ed0333f0fed2e73f805afd58b61176a87aa3ad
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrFormats.td
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/test/CodeGen/ARM/add-like-or.ll
A llvm/test/CodeGen/ARM/and-cmpz-to-shift.ll
M llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
M llvm/test/CodeGen/ARM/atomic-64bit.ll
M llvm/test/CodeGen/ARM/atomic-ops-v8.ll
M llvm/test/CodeGen/ARM/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/ARM/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
M llvm/test/CodeGen/ARM/bfi.ll
M llvm/test/CodeGen/ARM/cmov_fp16.ll
M llvm/test/CodeGen/ARM/cse-call.ll
M llvm/test/CodeGen/ARM/cttz.ll
M llvm/test/CodeGen/ARM/fadd-select-fneg-combine.ll
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fpclamptosat.ll
M llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/fpscr-multi-use.ll
M llvm/test/CodeGen/ARM/fptoi-sat-store.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/funnel-shift-rot.ll
M llvm/test/CodeGen/ARM/funnel-shift.ll
M llvm/test/CodeGen/ARM/ifcvt1.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/neon_vabd.ll
M llvm/test/CodeGen/ARM/overflow-intrinsic-optimizations.ll
M llvm/test/CodeGen/ARM/sadd_sat.ll
M llvm/test/CodeGen/ARM/sadd_sat_plus.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/ARM/select_const.ll
M llvm/test/CodeGen/ARM/shift-i64.ll
M llvm/test/CodeGen/ARM/ssub_sat.ll
M llvm/test/CodeGen/ARM/ssub_sat_plus.ll
M llvm/test/CodeGen/ARM/sub-cmp-peephole.ll
M llvm/test/CodeGen/ARM/uadd_sat.ll
M llvm/test/CodeGen/ARM/uadd_sat_plus.ll
M llvm/test/CodeGen/ARM/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/ARM/umulo-64-legalisation-lowering.ll
M llvm/test/CodeGen/ARM/usub_sat.ll
M llvm/test/CodeGen/ARM/usub_sat_plus.ll
M llvm/test/CodeGen/ARM/vselect_imax.ll
M llvm/test/CodeGen/ARM/wide-compares.ll
M llvm/test/CodeGen/Thumb/arm_q15_to_q31.ll
M llvm/test/CodeGen/Thumb/select.ll
M llvm/test/CodeGen/Thumb/smul_fix_sat.ll
M llvm/test/CodeGen/Thumb/stack-guard-xo.ll
M llvm/test/CodeGen/Thumb/umul_fix_sat.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/arm_cmplx_dot_prod_f32.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/exitcount.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
M llvm/test/CodeGen/Thumb2/float-ops.ll
M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
M llvm/test/CodeGen/Thumb2/mve-doublereduct.ll
M llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
M llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fpclamptosat_vec.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-gather-scatter-ptr-address.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-minmaxi.ll
M llvm/test/CodeGen/Thumb2/mve-pipelineloops.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-pred-or.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vselect.ll
M llvm/test/CodeGen/Thumb2/mve-pred-xor.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
M llvm/test/CodeGen/Thumb2/mve-vmaxv-vminv-scalar.ll
M llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
M llvm/test/CodeGen/Thumb2/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/Thumb2/umulo-64-legalisation-lowering.ll
Log Message:
-----------
Reland "[ARM] Stop gluing ALU nodes to branches / selects" (#118887)
Re-landing #116970 after fixing miscompilation error.
The original change made it possible for CMPZ to have multiple uses;
`ARMDAGToDAGISel::SelectCMPZ` was not prepared for this.
Pull Request: https://github.com/llvm/llvm-project/pull/118887
Original commit message:
Following #116547 and #116676, this PR changes the type of results and
operands of some nodes to accept / return a normal type instead of Glue.
Unfortunately, changing the result type of one node requires changing
the operand types of all potential consumer nodes, which in turn
requires changing the result types of all other possible producer nodes.
So this is a bulk change.
Commit: abc4183c731e0a352ebebc96106e3622e6ad5029
https://github.com/llvm/llvm-project/commit/abc4183c731e0a352ebebc96106e3622e6ad5029
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-12-06 (Fri, 06 Dec 2024)
Changed paths:
R 0001-Reland-Add-a-pass-to-collect-dropped-var-stats-for-M.patch
R 0001-Reland-NFC-Move-DroppedVariableStats-to-its-own-file.patch
R llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
R llvm/unittests/CodeGen/DroppedVariableStatsIRTest.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/DroppedVariableStatsTest.cpp
Log Message:
-----------
Revert "Reland "[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible (#118546)" (#119048)"
This reverts commit 37606b4c22654ab66eee8f89448a117f3534f2f4.
Broke the llvm-nvptx-nvidia-ubuntu bot with error: the vtable symbol may
be undefined because the class is missing its key function
Commit: d76650bced1de20cb79d1b4a0c1732339a5d0099
https://github.com/llvm/llvm-project/commit/d76650bced1de20cb79d1b4a0c1732339a5d0099
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/lib/Format/CMakeLists.txt
Log Message:
-----------
[clang-format] Clean up cmake target clang-format-check-format
Commit: 156da986834700890d606b9bd14d3e748c0a82b0
https://github.com/llvm/llvm-project/commit/156da986834700890d606b9bd14d3e748c0a82b0
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-select-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
Log Message:
-----------
[VPlan] Move printing final VPlan to ::execute (NFC).
This moves printing of the final VPlan to ::execute. This ensures the
final VPlan is printed, including recipes that get introduced by late,
lowering transforms and skeleton construction.
Split off from https://github.com/llvm/llvm-project/pull/114292, to
simplify the diff.
Commit: 570ecdcf8b44aec853ce381a5f6b77222b041afa
https://github.com/llvm/llvm-project/commit/570ecdcf8b44aec853ce381a5f6b77222b041afa
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M compiler-rt/lib/orc/CMakeLists.txt
A compiler-rt/lib/orc/sysv_reentry.arm64.S
A compiler-rt/lib/orc/sysv_resolve.cpp
A compiler-rt/test/orc/TestCases/Generic/Inputs/foo-ret-42.ll
A compiler-rt/test/orc/TestCases/Generic/Inputs/var-x-42.ll
A compiler-rt/test/orc/TestCases/Generic/lazy-link.ll
R compiler-rt/test/orc/TestCases/Generic/orc-rt-executor-usage.test
M compiler-rt/test/orc/lit.cfg.py
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkReentryTrampolines.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Core.cpp
A llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
[ORC] Introduce LazyReexportsManager, JITLinkTrampolines, ORC-RT base… (#118923)
…d reentry.
These utilities provide new, more generic and easier to use support for
lazy compilation in ORC.
LazyReexportsManager is an alternative to LazyCallThroughManager. It
takes requests for lazy re-entry points in the form of an alias map:
lazy-reexports = {
( <entry point symbol #1>, <implementation symbol #1> ),
( <entry point symbol #2>, <implementation symbol #2> ),
...
( <entry point symbol #n>, <implementation symbol #n> )
}
LazyReexportsManager then:
1. binds the entry points to the implementation names in an internal
table.
2. creates a JIT re-entry trampoline for each entry point.
3. creates a redirectable symbol for each of the entry point name and
binds redirectable symbol to the corresponding reentry trampoline.
When an entry point symbol is first called at runtime (which may be on
any thread of the JIT'd program) it will re-enter the JIT via the
trampoline and trigger a lookup for the implementation symbol stored in
LazyReexportsManager's internal table. When the lookup completes the
entry point symbol will be updated (via the RedirectableSymbolManager)
to point at the implementation symbol, and execution will proceed to the
implementation symbol.
Actual construction of the re-entry trampolines and redirectable symbols
is delegated to an EmitTrampolines functor and the
RedirectableSymbolsManager respectively.
JITLinkReentryTrampolines.h provides a JITLink-based implementation of
the EmitTrampolines functor. (AArch64 only in this patch, but other
architectures will be added in the near future).
Register state save and reentry functionality is added to the ORC
runtime in the __orc_rt_sysv_resolve and __orc_rt_resolve_implementation
functions (the latter is generic, the former will need custom
implementations for each ABI and architecture to be supported, however
this should be much less effort than the existing OrcABISupport
approach, since the ORC runtime allows this code to be written as native
assembly).
The resulting system:
1. Works equally well for in-process and out-of-process JIT'd code.
2. Requires less boilerplate to set up.
Given an ObjectLinkingLayer and PlatformJD (JITDylib containing the ORC
runtime), setup is just:
```c++
auto RSMgr = JITLinkRedirectableSymbolManager::Create(OLL);
if (!RSMgr)
return RSMgr.takeError();
auto LRMgr = createJITLinkLazyReexportsManager(OLL, **RSMgr, PlatformJD);
if (!LRMgr)
return LRMgr.takeError();
```
after which lazy reexports can be introduced with:
```c++
JD.define(lazyReexports(LRMgr, <alias map>));
```
LazyObectLinkingLayer is updated to use this new method, but the LLVM-IR
level CompileOnDemandLayer will continue to use LazyCallThroughManager
and OrcABISupport until the new system supports a wider range of
architectures and ABIs.
The llvm-jitlink utility's -lazy option now uses the new scheme. Since
it depends on the ORC runtime, the lazy-link.ll testcase and associated
helpers are moved to the ORC runtime.
Commit: 5c8ed3a1d9e2d275b8853aea561a258653c8fa7d
https://github.com/llvm/llvm-project/commit/5c8ed3a1d9e2d275b8853aea561a258653c8fa7d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 570ecdcf8b44
Commit: ec22b1ab47828677b1a5fe035e13d3c8ccd50998
https://github.com/llvm/llvm-project/commit/ec22b1ab47828677b1a5fe035e13d3c8ccd50998
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Iterate over blocks in VPlan::execute in RPOT (NFC).
This prepares for more complex CFGs in VPlan, as in
https://github.com/llvm/llvm-project/pull/114292
https://github.com/llvm/llvm-project/pull/112138
Commit: bc624a56c731702d0834e4641e59c532eda04d2e
https://github.com/llvm/llvm-project/commit/bc624a56c731702d0834e4641e59c532eda04d2e
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector][nfc] Update vector-to-llvm.mlir (#118112)
* Adds extra comments to group Ops
* Unifies the test function naming, i.e.
* `@vector_{op_name}_{variant}` -> `@{op_name}_{variant}`
* Unifies input variable names (`%input` -> `%arg0`)
* Capitalises LIT variable names (e.g. `%[[insert]]` --> `%[[INSERT]]`)
* Moves `@step_scalable()` _below_ its "fixed-width" counterpart
(to follow the existing consistency within this file).
There's still some inconsistencies within this file - I'm happy to send
more updates if folks find it useful. But I'd definitely recommend
splitting across multiple PRs (otherwise it's hard to review).
Commit: 6073dd923b82a526803d1f85f3531bc0a0721a88
https://github.com/llvm/llvm-project/commit/6073dd923b82a526803d1f85f3531bc0a0721a88
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M compiler-rt/lib/orc/CMakeLists.txt
R compiler-rt/lib/orc/sysv_reentry.arm64.S
R compiler-rt/lib/orc/sysv_resolve.cpp
R compiler-rt/test/orc/TestCases/Generic/Inputs/foo-ret-42.ll
R compiler-rt/test/orc/TestCases/Generic/Inputs/var-x-42.ll
R compiler-rt/test/orc/TestCases/Generic/lazy-link.ll
A compiler-rt/test/orc/TestCases/Generic/orc-rt-executor-usage.test
M compiler-rt/test/orc/lit.cfg.py
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
R llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
R llvm/include/llvm/ExecutionEngine/Orc/JITLinkReentryTrampolines.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Core.cpp
R llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
Revert "[ORC] Introduce LazyReexportsManager, JITLinkTrampolines, … (#118923)"
This reverts commit 570ecdcf8b44aec853ce381a5f6b77222b041afa while I investigate
bot failures, e.g. https://lab.llvm.org/buildbot/#/builders/17/builds/4446.
Commit: 755519f7f661375be05750001ff11e106e6b7f87
https://github.com/llvm/llvm-project/commit/755519f7f661375be05750001ff11e106e6b7f87
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/docs/UsersManual.rst
M clang/include/clang/Driver/Driver.h
M clang/lib/Driver/Driver.cpp
A clang/test/Driver/Inputs/config-l.cfg
M clang/test/Driver/config-file.c
A flang/test/Driver/Inputs/config-l.cfg
M flang/test/Driver/config-file.f90
Log Message:
-----------
[clang][driver] Use $ prefix with config file options to have them added after all of the command line options (#117573)
Currently, if a -l (or -Wl,) flag is added into a config file
(e.g. clang.cfg), it is situated before any object file in the
effective command line. If the library requested by given -l flag is
static, its symbols will not be made visible to any of the object
files provided by the user. Also, the presence of any of the linker
flags in a config file confuses the driver whenever the user invokes
clang without any parameters (see issue #67209).
This patch attempts to solve both of the problems, by allowing a split
of the arguments list into two parts. The head part of the list will
be used as before, but the tail part will be appended after the
command line flags provided by the user and only when it is known
that the linking should occur. The $-prefixed arguments will be added
to the tail part.
Commit: 66424b16ea4b3a154b97036fafed9b4aeb9b5ef8
https://github.com/llvm/llvm-project/commit/66424b16ea4b3a154b97036fafed9b4aeb9b5ef8
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 6073dd923b82
Commit: 0cedb8f215965fe25812094a9e2970b56d86a56e
https://github.com/llvm/llvm-project/commit/0cedb8f215965fe25812094a9e2970b56d86a56e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
Log Message:
-----------
[LV] Update checks to actually check VPlan for correct function.
The checks should apply to test_getVectorCallCost, which doesn't have a
wide add.
Commit: b4150ed128a136409a2510ee00003bd318f703fb
https://github.com/llvm/llvm-project/commit/b4150ed128a136409a2510ee00003bd318f703fb
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/BitcastBuffer.cpp
M clang/lib/AST/ByteCode/BitcastBuffer.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
Log Message:
-----------
[clang][bytecode] Check composite bitcasts for indeterminate bits (#118988)
Commit: 416e4cd332c7421b187844ac9aaf6fe28b575a7d
https://github.com/llvm/llvm-project/commit/416e4cd332c7421b187844ac9aaf6fe28b575a7d
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove leftover debug output
Commit: 94c6dd62faaea33e891ad789c937613a5255f452
https://github.com/llvm/llvm-project/commit/94c6dd62faaea33e891ad789c937613a5255f452
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M lld/docs/ReleaseNotes.rst
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[docs] Update release notes for APX relocation types (#118575)
Commit: 4bdac0851f4d613890558a8254043e21b0479b1e
https://github.com/llvm/llvm-project/commit/4bdac0851f4d613890558a8254043e21b0479b1e
Author: Chris Apple <cja-private at pm.me>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_main.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
A compiler-rt/test/rtsan/Darwin/dlopen.cpp
Log Message:
-----------
[rtsan] Warn if instrumented rtsan library opened via dlopen and interceptors are not working (#119029)
Commit: ccdd2845c37994d84ae3531e5436c1030b8d5ddf
https://github.com/llvm/llvm-project/commit/ccdd2845c37994d84ae3531e5436c1030b8d5ddf
Author: David Green <david.green at arm.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-reverseshuffle.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for reverse shuffles. NFC
Commit: 69227a11fe1d00b2fc6f93b2a985abbe888d0876
https://github.com/llvm/llvm-project/commit/69227a11fe1d00b2fc6f93b2a985abbe888d0876
Author: Michał Górny <mgorny at gentoo.org>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M offload/DeviceRTL/CMakeLists.txt
Log Message:
-----------
[offload] Support LIBOMPTARGET_DEVICE_ARCHITECTURES={amdgpu|nvptx} (#119070)
Add two more special values for LIBOMPTARGET_DEVICE_ARCHITECTURES:
`amdgpu` and `nvptx`, to support building for all AMDGPU and NVPTX
targets respectively. This can be used in place of `all` when offload is
built with one of the GPU plugins only.
Commit: 342c8db381129e908116f1059e97d235b62bcaf2
https://github.com/llvm/llvm-project/commit/342c8db381129e908116f1059e97d235b62bcaf2
Author: Chris Apple <cja-private at pm.me>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/docs/RealtimeSanitizer.rst
Log Message:
-----------
[rtsan] NFC: Docs update adding links to Disabling, adding a few ` marks (#119075)
Commit: 3f458cd9abbf99cddcded076b5e7b4049607b7b4
https://github.com/llvm/llvm-project/commit/3f458cd9abbf99cddcded076b5e7b4049607b7b4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/misc/redundant-expression.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/warn-stringcompare.c
M clang/test/SemaCXX/warn-array-comparion.cpp
M clang/test/SemaCXX/warn-self-comparisons.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Warning as error Array Comparisons from C++26 (#118872)
Starting from C++26 the array comparison warning should converted to an
error.
Fixes: #117859
Commit: 427172a861f6a1ff1d00771b896d2b2a2ac34494
https://github.com/llvm/llvm-project/commit/427172a861f6a1ff1d00771b896d2b2a2ac34494
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Remove a stale comment in a unit test (#119060)
We've removed IndexedAllocationInfo::CallStack, so we don't need to
mention it.
Commit: 4cf0bd89eed3ca08fc00c38a0419ae514075ee7c
https://github.com/llvm/llvm-project/commit/4cf0bd89eed3ca08fc00c38a0419ae514075ee7c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Add getMemProfDataForTest for unit tests (#119061)
We always call getFrameMapping and getCallStackMapping together in
InstrProfTest.cpp. This patch combines the two functions into new
function getMemProfDataForTest.
Commit: 8eb5baf5ea52edd0b8df38ffca2a65e21610f3ad
https://github.com/llvm/llvm-project/commit/8eb5baf5ea52edd0b8df38ffca2a65e21610f3ad
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Use IndexedMemProfData in a unit test (NFC) (#119062)
IndexedMemProfData eliminates the need for the "using" directives.
Also, we do not need to declare maps for individual components of the
MemProf profile.
Commit: aebd3389a9e694f7087d55e159186734d4559ca6
https://github.com/llvm/llvm-project/commit/aebd3389a9e694f7087d55e159186734d4559ca6
Author: Austin Kerbow <Austin.Kerbow at amd.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Fix user SGPR alloc order in docs (#119092)
NFC. Preload kernarg SGPRs are allocated after the private segment size
SGPR. This patch updates AMDGPUUsage.rst to reflect this.
Commit: 66f9448b4b14a117141a3efd014e1240b30b741f
https://github.com/llvm/llvm-project/commit/66f9448b4b14a117141a3efd014e1240b30b741f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
A clang/test/CodeGen/allow-ubsan-check-inline.c
Log Message:
-----------
[NFC][ubsan] Pre-commit test with missed optimization (#119012)
Commit: 1f9f68a1cdbfaed813b35137a600bd76532f0c7e
https://github.com/llvm/llvm-project/commit/1f9f68a1cdbfaed813b35137a600bd76532f0c7e
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/lib/Support/BalancedPartitioning.cpp
Log Message:
-----------
[BalancedPartitioning] Fix -Wdeprecated-this-capture
Commit: e5480f57bbf95e4e7996ad7d2c260a109af6de6a
https://github.com/llvm/llvm-project/commit/e5480f57bbf95e4e7996ad7d2c260a109af6de6a
Author: Giordano Salvador <73959795+e3m3 at users.noreply.github.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
Log Message:
-----------
[mlir][docs] Fix typos in documentation for MLIR tensor dialect (#119095)
Fix typos in the tensor dialect documentation:
1. Typos/Copy-paste errors referencing invalid `memref` type for
`tensor.dim` op.
2. Miscellaneous typos across other tensor dialect ops.
Commit: 639e1fa255206c1e82246b49afbd8c1e44a22c11
https://github.com/llvm/llvm-project/commit/639e1fa255206c1e82246b49afbd8c1e44a22c11
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/include/llvm/ADT/IntervalMap.h
Log Message:
-----------
[IntervalMap] Fix -Wdeprecated-anon-enum-enum-conversion due to InstrProf.h
Commit: 7787328dd64c750c7acf30b86b31f0d7166c8f27
https://github.com/llvm/llvm-project/commit/7787328dd64c750c7acf30b86b31f0d7166c8f27
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/test/CodeGen/allow-ubsan-check-inline.c
Log Message:
-----------
[ubsan] Improve lowering of @llvm.allow.ubsan.check (#119013)
This fix the case, when single hot inlined callsite, prevent
checks for all other. This helps to reduce number of removed checks up
to 50% (deppedes on `cutoff-hot` value) .
`ScalarOptimizerLateEPCallback` was happening during
CGSCC walk, after each inlining, but this is effectively
after inlining.
Example, order in comments:
```
static void overflow() {
// 1. Inline get/set if possible
// 2. Simplify
// 3. LowerAllowCheckPass
set(get() + get());
}
void test() {
// 4. Inline
// 5. Nothing for LowerAllowCheckPass
overflow();
}
```
With this patch it will look like:
```
static void overflow() {
// 1. Inline get/set if possible
// 2. Simplify
set(get() + get());
}
void test() {
// 3. Inline
// 4. Simplify
overflow();
}
// Later, after inliner CGSCC walk complete:
// 5. LowerAllowCheckPass for `overflow`
// 6. LowerAllowCheckPass for `test`
```
Commit: 4153c2dc0537de926b786efebf1849f9986313ef
https://github.com/llvm/llvm-project/commit/4153c2dc0537de926b786efebf1849f9986313ef
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[ProfileData] Avoid deprecated is_pod
Commit: cb61a5e4209beef64b0a3b621c16010c53ed323a
https://github.com/llvm/llvm-project/commit/cb61a5e4209beef64b0a3b621c16010c53ed323a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix an assertion failure in RemoveSemicolon (#117472)
Fixes #117290.
Commit: 70c1764d7a223b14b38bb394e5020e753be9c869
https://github.com/llvm/llvm-project/commit/70c1764d7a223b14b38bb394e5020e753be9c869
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/AST/ast-dump-types-json.cpp
M clang/test/CXX/conv/conv.mem/p4.cpp
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg13xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/expr/expr.unary/expr.unary.op/p4.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p5.cpp
M clang/test/Index/print-type.cpp
M clang/test/Layout/ms-x86-member-pointers.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/SemaCXX/addr-of-overloaded-function.cpp
M clang/test/SemaCXX/calling-conv-compat.cpp
M clang/test/SemaCXX/static-cast.cpp
M clang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Log Message:
-----------
[clang] [Sema] Preserve nested name specifier prefix in MemberPointerType (#118236)
Fixes https://github.com/llvm/llvm-project/issues/118198
Fixes https://github.com/clangd/clangd/issues/2235
Commit: f0297ae552e1e5aacafc1ed43968041994dc8a6e
https://github.com/llvm/llvm-project/commit/f0297ae552e1e5aacafc1ed43968041994dc8a6e
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.h
M llvm/lib/IR/Intrinsics.cpp
M llvm/unittests/IR/IntrinsicsTest.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
Log Message:
-----------
Switch the intrinsic names to a string table (#118929)
This avoids the need to dynamically relocate each pointer in the table.
To make this work, this PR also moves the binary search of intrinsic
names to an internal function with an adjusted signature, and switches
the unittesting to test against actual intrinsics.
Commit: 16c2a1016e50051909091da078031a3a04b6c880
https://github.com/llvm/llvm-project/commit/16c2a1016e50051909091da078031a3a04b6c880
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/allocatable.h
M flang/include/flang/Runtime/allocator-registry.h
M flang/include/flang/Runtime/descriptor.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/runtime/CUDA/allocatable.cpp
M flang/runtime/CUDA/allocator.cpp
M flang/runtime/CUDA/descriptor.cpp
M flang/runtime/allocatable.cpp
M flang/runtime/array-constructor.cpp
M flang/runtime/descriptor.cpp
M flang/test/HLFIR/elemental-codegen.fir
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/allocatable-runtime.f90
M flang/test/Lower/allocate-mold.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Runtime/CUDA/Allocatable.cpp
M flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/unittests/Runtime/CUDA/Memory.cpp
Log Message:
-----------
Revert "[flang] Allow to pass an async id to allocate the descriptor (#118713)" (#119109)
This reverts commit 7d1c661381d36018fd105f4ad4c2d6dc45e7288b.
This commit breaks some device runtime builds. Need time to investigate.
Commit: 9a156f6b2b0c892d8713ba907f07f027b24953d8
https://github.com/llvm/llvm-project/commit/9a156f6b2b0c892d8713ba907f07f027b24953d8
Author: Stefan Schulze Frielinghaus <stefansf at linux.ibm.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_interceptors.h
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
M compiler-rt/lib/memprof/memprof_interceptors.cpp
M compiler-rt/lib/memprof/memprof_interceptors.h
M compiler-rt/lib/memprof/memprof_interceptors_memintrinsics.h
M compiler-rt/lib/msan/msan_interceptors.cpp
M compiler-rt/lib/msan/msan_poisoning.cpp
M compiler-rt/lib/nsan/nsan_allocator.cpp
M compiler-rt/lib/nsan/nsan_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Log Message:
-----------
[sanitizer] Replace uptr by usize/SIZE_T in interfaces
For some targets uptr is mapped to unsigned int and size_t to unsigned
long and sizeof(int)==sizeof(long) holds. Still, these are distinct
types and type checking may fail. Therefore, replace uptr by
usize/SIZE_T wherever a size_t is expected.
Part of #116957
Commit: 684e79f25415250afa51bfcd294d793720aa4bae
https://github.com/llvm/llvm-project/commit/684e79f25415250afa51bfcd294d793720aa4bae
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
A llvm/test/tools/llvm-profdata/memprof-yaml-invalid.test
A llvm/test/tools/llvm-profdata/memprof-yaml.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[memprof] Add YAML read/write support to llvm-profdata (#118915)
This patch adds YAML read/write support to llvm-profdata. The primary
intent is to accommodate MemProf profiles in test cases, thereby
avoiding the binary format.
The read support is via llvm-profdata merge. This is useful when we
want to verify that the compiler does the right thing on a given .ll
file and a MemProf profile in a test case. In the test case, we would
convert the MemProf profile in YAML to an indexed profile and invoke
the compiler on the .ll file along with the indexed profile.
The write support is via llvm-profdata show --memory. This is useful
when we wish to convert an indexed MemProf profile to YAML while
writing tests. We would compile a test case in C++, run it for an
indexed MemProf profile, and then convert it to the text format.
Commit: ae5fdaea43cbe7dd722f4fef84be005b2a41711d
https://github.com/llvm/llvm-project/commit/ae5fdaea43cbe7dd722f4fef84be005b2a41711d
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Simplify printLocation
sym.file is always non-null (since around #78944).
Commit: ce44640fe29550461120d22b0358e6cac4aed822
https://github.com/llvm/llvm-project/commit/ce44640fe29550461120d22b0358e6cac4aed822
Author: Stefan Schulze Frielinghaus <stefansf at linux.ibm.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M compiler-rt/lib/interception/interception.h
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
Log Message:
-----------
[sanitizer] Add type __sanitizer::ssize (#116957)
Since the sanitizer merge in commit r15-5164-gfa321004f3f628 of GCC
which entails LLVM commit 61a6439f35b6de28ff4aff4450d6fca970292fd5, GCCs
bootstrap is broken on s390 -m31. This is due to commit
ec68dc1ca4d967b599f1202855917d5ec9cae52f which introduces stricter type
checking which is why GCC bootstrap fails with
```
In file included from /gcc/src/libsanitizer/interception/interception.h:18,
from /gcc/src/libsanitizer/interception/interception_type_test.cpp:14:
/gcc/src/libsanitizer/interception/interception_type_test.cpp:30:61: error: static assertion failed
30 | COMPILER_CHECK((__sanitizer::is_same<::SSIZE_T, ::ssize_t>::value));
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
/gcc/src/libsanitizer/sanitizer_common/sanitizer_internal_defs.h:363:44: note: in definition of macro 'COMPILER_CHECK'
363 | #define COMPILER_CHECK(pred) static_assert(pred, "")
| ^~~~
make[8]: *** [Makefile:469: interception_type_test.lo] Error 1
```
The culprit seems to be that we don't check for equality of type sizes
anymore but rather whether the types are indeed the same. On s390 -m31
we have that `sizeof(int)==sizeof(long)` holds which is why previously
the checks succeeded. They fail now because
```
size_t => unsigned long
ssize_t => long
ptrdiff_t => int
::SSIZE_T => __sanitizer::sptr => int
::PTRDIFF_T => __sanitizer::sptr => int
```
This is fixed by mapping `SSIZE_T` to `long` in the end.
```
#if defined(__s390__) && !defined(__s390x__)
typedef long ssize;
#else
typedef sptr ssize;
#endif
#define SSIZE_T __sanitizer::ssize
```
Commit: 8669028c1898ac95a5b14a9eacb1d084ab7d7781
https://github.com/llvm/llvm-project/commit/8669028c1898ac95a5b14a9eacb1d084ab7d7781
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Remove unneeded sym->file check
After #78944 and some follow-ups, sym->file, unless in the initial
Placeholder stage, is guaranteed to be non-null.
Commit: 6dec33834d1fd89f16e271dde9607c1de9554144
https://github.com/llvm/llvm-project/commit/6dec33834d1fd89f16e271dde9607c1de9554144
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/memprof/memprof_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
Log Message:
-----------
[sanitizer] Fix few size types in memprof (#119114)
Fix type in a few related Min() calls.
Follow up to #116957.
Co-authored-by: Stefan Schulze Frielinghaus <stefansf at linux.ibm.com>
Commit: 118f7b95c8546826f222c13daea47cde4aa97bc9
https://github.com/llvm/llvm-project/commit/118f7b95c8546826f222c13daea47cde4aa97bc9
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M llvm/test/Instrumentation/SanitizerCoverage/missing_dbg.ll
Log Message:
-----------
[sancov] Regenerate test (#119115)
For #119097.
Commit: f4f6566e44566f3d8cf9517767d457227125ca93
https://github.com/llvm/llvm-project/commit/f4f6566e44566f3d8cf9517767d457227125ca93
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-or-of-select-with-zero.ll
Log Message:
-----------
[InstCombine] Fix type mismatch in `foldICmpBinOpEqualityWithConstant` (#119068)
Closes https://github.com/llvm/llvm-project/issues/119063.
Commit: 6b1c357acc312961743bef05f99120e7c68b2e25
https://github.com/llvm/llvm-project/commit/6b1c357acc312961743bef05f99120e7c68b2e25
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M clang/lib/Format/CMakeLists.txt
Log Message:
-----------
[clang-format] Add cmake target clang-format-help to update ClangFormat.rst
Commit: d31fb264821ceac90b55c87c3f777053ab30a9af
https://github.com/llvm/llvm-project/commit/d31fb264821ceac90b55c87c3f777053ab30a9af
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-07 (Sat, 07 Dec 2024)
Changed paths:
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Simplify includeInDynsym for --dynamic-list
Commit: eeadd0128df848eb858ae718984a13fa2c923775
https://github.com/llvm/llvm-project/commit/eeadd0128df848eb858ae718984a13fa2c923775
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M clang/docs/tools/dump_format_help.py
M clang/test/Format/docs_updated.test
Log Message:
-----------
[clang-format] Also check ClangFormat.rst is up to date in docs_updated.test
Commit: 7bad469182ff2f6423ea209d5a1e81acca600568
https://github.com/llvm/llvm-project/commit/7bad469182ff2f6423ea209d5a1e81acca600568
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Log Message:
-----------
[amdgpu][lds] Simplify error diag path - lds variable names are no longer special
Commit: 4e0ba801ea2267d80ff875bdc40984da32db774d
https://github.com/llvm/llvm-project/commit/4e0ba801ea2267d80ff875bdc40984da32db774d
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Log Message:
-----------
Revert "[amdgpu][lds] Simplify error diag path - lds variable names are no longer special"
Test case didn't run locally, investigating
This reverts commit 7bad469182ff2f6423ea209d5a1e81acca600568.
Commit: 25dcee40422097bbdc9fb01224c4b06df13bb6ea
https://github.com/llvm/llvm-project/commit/25dcee40422097bbdc9fb01224c4b06df13bb6ea
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[NFC] Pre commit test for fold trunc nuw X to i1 -> true IFF X != 0
Commit: 9eb4056144a9d2e940272ba9e9675acaa3fbb354
https://github.com/llvm/llvm-project/commit/9eb4056144a9d2e940272ba9e9675acaa3fbb354
Author: NimishMishra <42909663+NimishMishra at users.noreply.github.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[mlir][llvm] Translation support for task detach (#116601)
This PR adds translation support for task detach. Essentially, if the
`detach` clause is present on a task, emit a
`__kmpc_task_allow_completion_event` on it, and store its return (of
type `kmp_event_t*`) into the `event_handle`.
Commit: fc2cc018ec6112910d6e86585cd9ecdc5f5a3a7e
https://github.com/llvm/llvm-project/commit/fc2cc018ec6112910d6e86585cd9ecdc5f5a3a7e
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.rst
Log Message:
-----------
[GlobalISel] list undocumented opcodes in docs (#119089)
Commit: 6c062afc2e6ed4329e1e14cb011913195a5356fa
https://github.com/llvm/llvm-project/commit/6c062afc2e6ed4329e1e14cb011913195a5356fa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Compare Frames instead of FrameIds in a unit test (#119111)
When we call IndexedMemProfRecord::toMemProfRecord, we care about
getting the original (that is, non-indexed) MemProfRecord back, so we
should just verify that, not the hash values, which are
intermediaries.
There is a remote possibility of hash collisions where call stack
{F1, F2} might come back as {F1, F1} if F1.hash() == F2.hash() for
example. However, since FrameId uses BLAKE, the hash values should be
consistent across architectures. That is, if this test case works on
one architecture, it should work on others as well.
Commit: aedc81b9d8880a60877a53469aeb89ff62466f6f
https://github.com/llvm/llvm-project/commit/aedc81b9d8880a60877a53469aeb89ff62466f6f
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M lld/ELF/LTO.cpp
Log Message:
-----------
[ELF] Remove unneeded sym->inDynamicList check
Follow-up to d31fb264821ceac90b55c87c3f777053ab30a9af
Commit: c6508809585505ffb88f5f724da04bbc058eabf8
https://github.com/llvm/llvm-project/commit/c6508809585505ffb88f5f724da04bbc058eabf8
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
Log Message:
-----------
[ELF] Simplify handling of exportDynamic and canBeOmittedFromSymbolTable
When computing whether a defined symbol is exported, we set
`exportDynamic` in Defined and CommonSymbol's ctor and merge the bit in
symbol resolution. The complexity is for the LTO special case
canBeOmittedFromSymbolTable, which can be simplified by introducing a
new bit.
We might simplify the state by caching includeInDynsym in exportDynamic
in the future.
Commit: 8843d2b4695419caa774b40582146446f350a504
https://github.com/llvm/llvm-project/commit/8843d2b4695419caa774b40582146446f350a504
Author: Chris Apple <cja-private at pm.me>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M clang/docs/RealtimeSanitizer.rst
Log Message:
-----------
[rtsan] Add `verify_interceptors` flag to docs (#119074)
Commit: 1fbbf4c418bc4945839a70fe2849cbe6fbcc3d66
https://github.com/llvm/llvm-project/commit/1fbbf4c418bc4945839a70fe2849cbe6fbcc3d66
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/BitcastBuffer.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
Log Message:
-----------
[clang][bytecode] Pass (float) BitWidth to DoBitCast (#119119)
In certain cases (i.e. long double on x86), the bit with we get from the
floating point semantics is different than the type size we compute for
the BitCast instruction. Pass this along to DoBitCast, so in there we
can check only the relevant bits for being initialized.
This also fixes a weirdness we still had in DoBitCast.
Commit: b1d42465fc1485d46b4727e6830272f369fb6cb5
https://github.com/llvm/llvm-project/commit/b1d42465fc1485d46b4727e6830272f369fb6cb5
Author: Austin Kerbow <Austin.Kerbow at amd.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/invalid-hidden-kernarg-in-kernel-signature.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
Log Message:
-----------
[AMDGPU] Fix hidden kernarg preload count inconsistency (#116759)
It is possible that the number of hidden arguments that are selected to
be preloaded in AMDGPULowerKernel arguments and isel can differ. This
isn't an issue with explicit arguments since isel can lower the argument
correctly either way, but with hidden arguments we may have alignment
issues if we try to load these hidden arguments that were added to the
kernel signature.
The reason for the mismatch is that isel reserves an extra synthetic
user SGPR for module LDS.
Instead of teaching lowerFormalArguments how to handle these properly it
makes more sense and is less expensive to fix the mismatch and assert if
we ever run into this issue again. We should never be trying to lower
these in the normal way.
In a future change we probably want to revise how we track "synthetic"
user SGPRs and unify the handling in GCNUserSGPRUsageInfo. Sometimes
synthetic SGPRSs are considered user SGPRs and sometimes they are not.
Until then this patch resolves the inconsistency, fixes the bug, and is
otherwise a NFC.
Commit: 2ab687e205d44a17c81965a1861fa08a98078eaa
https://github.com/llvm/llvm-project/commit/2ab687e205d44a17c81965a1861fa08a98078eaa
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] fdopen/freopen(64) support. (#119100)
Commit: b0f06769e6e2ea2bc4ce3554ebf66384a1236106
https://github.com/llvm/llvm-project/commit/b0f06769e6e2ea2bc4ce3554ebf66384a1236106
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_cvt.c
M clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_cvt.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
Log Message:
-----------
[AArch64] Implement intrinsics for SME FP8 F1CVT/F2CVT and BF1CVT/BF2CVT (#118027)
This patch implements the following intrinsics:
8-bit floating-point convert to half-precision or BFloat16 (in-order).
``` c
// Variant is also available for: _bf16[_mf8]_x2
svfloat16x2_t svcvt1_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
svfloat16x2_t svcvt2_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
```
In accordance with https://github.com/ARM-software/acle/pull/323.
Co-authored-by: Marin Lukac marian.lukac at arm.com
Co-authored-by: Caroline Concatto caroline.concatto at arm.com
Commit: b6dfdd2b1ecc84c77ea4eec3713caa07a1cab198
https://github.com/llvm/llvm-project/commit/b6dfdd2b1ecc84c77ea4eec3713caa07a1cab198
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Drop memprof:: in unit tests (NFC) (#119113)
This patch replaces memprof::Foo with Foo if we have corresponding:
using llvm::memprof::Foo;
Commit: 2b129dacdde667137b5012d52f1d96e0ab26c749
https://github.com/llvm/llvm-project/commit/2b129dacdde667137b5012d52f1d96e0ab26c749
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/SymbolTable.cpp
M lld/test/ELF/symver.s
Log Message:
-----------
[ELF] Optimize parseSymbolVersion
We can just scan objectFiles and sharedFiles that have versioned symbols
to skip scanning the global symtab. While we won't suggest __wrap_foo
for undefined __wrap_foo at v1 when --wrap=foo at v1 is specified
(internalFile isn't scanned), this edge case difference is acceptable.
Commit: bd07e87082aec965820b1facc495a1363cbc243f
https://github.com/llvm/llvm-project/commit/bd07e87082aec965820b1facc495a1363cbc243f
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[NFC] Pre commit test for fold trunc nsw X to i1 -> true IFF X != 0
Commit: 47df46b1e7a397af428bc455b8e173fbdf4869af
https://github.com/llvm/llvm-project/commit/47df46b1e7a397af428bc455b8e173fbdf4869af
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
A llvm/test/Transforms/InstSimplify/sincos.ll
Log Message:
-----------
[InstSimplify] Add basic constant folding for `llvm.sincos` (#114527)
This calls into the existing constant folding for `llvm.sin` and
`llvm.cos`, which currently does not fold for any non-finite values, so
most tests are negative tests at the moment.
Note: The constant folding does not consider the `afn` fast-math flag
and will produce the same result regardless of if the flag is set.
Commit: afef545efab77a8f081cae72900c273af4d5c35c
https://github.com/llvm/llvm-project/commit/afef545efab77a8f081cae72900c273af4d5c35c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[VPlan] Address post-commit for #114305.
Apply suggested renaming and adjust placement as suggested in
https://github.com/llvm/llvm-project/pull/114305. Also drop unneeded
RPOT creation.
Commit: 855bc46bc810c4ae97ea9f427429a7efd8b9cc15
https://github.com/llvm/llvm-project/commit/855bc46bc810c4ae97ea9f427429a7efd8b9cc15
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Fold trunc nuw/nsw X to i1 -> true IFF X != 0 (#119131)
proof https://alive2.llvm.org/ce/z/prpPex
Commit: c4aa67e8661c7550dd2d014a991b08eb71566cf7
https://github.com/llvm/llvm-project/commit/c4aa67e8661c7550dd2d014a991b08eb71566cf7
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
R llvm/test/Transforms/InstSimplify/sincos.ll
Log Message:
-----------
Revert "[InstSimplify] Add basic constant folding for `llvm.sincos`" (#119149)
Reverts llvm/llvm-project#114527
Reverting due to buildbot failures (e.g.
https://lab.llvm.org/buildbot/#/builders/180/builds/9685)
Commit: eff0d8103c5e0db938550dd6e18230ea8ed9ff4b
https://github.com/llvm/llvm-project/commit/eff0d8103c5e0db938550dd6e18230ea8ed9ff4b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Adjust original position of convertToConcreteRecipes.
Restore the original position of the call before afef545efab77a8
to fix a number of crashes.
Commit: 1dfa34c8e1f28963f059e05ce89ebf1f76ebbddc
https://github.com/llvm/llvm-project/commit/1dfa34c8e1f28963f059e05ce89ebf1f76ebbddc
Author: David Green <david.green at arm.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-dup.ll
A llvm/test/CodeGen/AArch64/dup.ll
Log Message:
-----------
[AArch64] Extended Dup test coverage. NFC
Commit: fe0d0a9e627f606cd2356cc5b2ee0266e8e3ef38
https://github.com/llvm/llvm-project/commit/fe0d0a9e627f606cd2356cc5b2ee0266e8e3ef38
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
Log Message:
-----------
[ELF] Merge numSymbols and numELFSyms
Commit: a1197a2ca8a77c08a36445401a063a1c4efec6a9
https://github.com/llvm/llvm-project/commit/a1197a2ca8a77c08a36445401a063a1c4efec6a9
Author: Kinoshita Kotaro <k.kotaro at fujitsu.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
A clang/test/Driver/aarch64-fujitsu-monaka.c
A clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Misc/target-invalid-cpu-note/aarch64.c
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/test/CodeGen/AArch64/cpus.ll
M llvm/unittests/TargetParser/Host.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Add initial support for FUJITSU-MONAKA (#118432)
This patch adds initial support for FUJITSU-MONAKA CPU (-mcpu=fujitsu-monaka).
The scheduling model will be corrected in the future.
Commit: 41652c6c92958a87b8505b9b1e6f008856e392ac
https://github.com/llvm/llvm-project/commit/41652c6c92958a87b8505b9b1e6f008856e392ac
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M compiler-rt/lib/orc/CMakeLists.txt
A compiler-rt/lib/orc/sysv_reentry.arm64.S
A compiler-rt/lib/orc/sysv_resolve.cpp
A compiler-rt/test/orc/TestCases/Generic/Inputs/foo-ret-42.ll
A compiler-rt/test/orc/TestCases/Generic/Inputs/var-x-42.ll
A compiler-rt/test/orc/TestCases/Generic/lazy-link.ll
R compiler-rt/test/orc/TestCases/Generic/orc-rt-executor-usage.test
M compiler-rt/test/orc/lit.cfg.py
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkReentryTrampolines.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
A llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
Reapply "[ORC] Introduce LazyReexportsManager, … (#118923)" with fixes
This reapplies 570ecdcf8b4, which was reverted in 6073dd923b8 due to bot
failures.
The test failures on Linux were fixed by:
1. Removing an overly restrictive assertion (query dependence on a symbol no
longer implies a MaterializingInfo for that symbol)
2. Adding reentry and resolver files to the ORC runtime CMakeLists.txt for
Linux.
3. Adding the __orc_rt_reentry -> __orc_rt_sysv_reentry alias to ELFNixPlatform.
Commit: 8569b47063a6df1d47ae24a54a3a4af3f7a846c1
https://github.com/llvm/llvm-project/commit/8569b47063a6df1d47ae24a54a3a4af3f7a846c1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 41652c6c9295
Commit: f91a5fee53651d39eb9a610fcc25fb68915c64dc
https://github.com/llvm/llvm-project/commit/f91a5fee53651d39eb9a610fcc25fb68915c64dc
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
Log Message:
-----------
[libc] fix woa64 fenv implementation (#119155)
Changing name type to match x86-64. This resolves definition conflicts
with `core_crt` headers.
fix #119154
Commit: f145ff3f70d0c1a71d08613f692376003ab398b9
https://github.com/llvm/llvm-project/commit/f145ff3f70d0c1a71d08613f692376003ab398b9
Author: c8ef <c8ef at outlook.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in elementwise add_sat/sub_sat functions. (#119082)
Part of #51787.
This patch adds constexpr support for the built-in elementwise add_sat
and sub_sat functions.
Commit: 74e8a37ff32e599fd40858e0d6c7e531dcbe4e03
https://github.com/llvm/llvm-project/commit/74e8a37ff32e599fd40858e0d6c7e531dcbe4e03
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M compiler-rt/lib/orc/CMakeLists.txt
R compiler-rt/lib/orc/sysv_reentry.arm64.S
R compiler-rt/lib/orc/sysv_resolve.cpp
R compiler-rt/test/orc/TestCases/Generic/Inputs/foo-ret-42.ll
R compiler-rt/test/orc/TestCases/Generic/Inputs/var-x-42.ll
R compiler-rt/test/orc/TestCases/Generic/lazy-link.ll
A compiler-rt/test/orc/TestCases/Generic/orc-rt-executor-usage.test
M compiler-rt/test/orc/lit.cfg.py
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
R llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
R llvm/include/llvm/ExecutionEngine/Orc/JITLinkReentryTrampolines.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
R llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
Revert "Reapply "[ORC] Introduce LazyReexportsManager, … (#118923)" with fixes"
This reverts commit 41652c6c92958a87b8505b9b1e6f008856e392ac while I investigate
more bot failures.
Commit: a00eab6a48d70408f8a08654a4bbdd05401ac85e
https://github.com/llvm/llvm-project/commit/a00eab6a48d70408f8a08654a4bbdd05401ac85e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 74e8a37ff32e
Commit: 18538e213498281653fca5baefa2dec4ae51bf91
https://github.com/llvm/llvm-project/commit/18538e213498281653fca5baefa2dec4ae51bf91
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/SymbolTable.cpp
M lld/test/ELF/symver.s
Log Message:
-----------
Revert "[ELF] Optimize parseSymbolVersion"
This reverts commit 2b129dacdde667137b5012d52f1d96e0ab26c749.
parseSymbolVersion can be combined with computeIsPreemptible,
making hasVersionSyms unneeded.
Commit: 712264b83c736fac7a7f0d4296f84c1afbd93b1a
https://github.com/llvm/llvm-project/commit/712264b83c736fac7a7f0d4296f84c1afbd93b1a
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Merge parseSymbolVersion and computeIspreemptible
ICF needs isPreemptible, which can be combined with parseSymbolVersion.
Commit: a4506bb340c36d48d89afe5bd76a1a2f28f76fd9
https://github.com/llvm/llvm-project/commit/a4506bb340c36d48d89afe5bd76a1a2f28f76fd9
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseExpr.cpp
M clang/test/Parser/cxx2c-pack-indexing.cpp
Log Message:
-----------
[Clang] Recurse into parsing when using pack-indexing as a specifier (#119123)
Pack indexing type that introduces a scope, e.g. `T...[0]::value` would
be annotated as `annot_cxxscope`. This is something we didn't handle in
`ParseCastExpression`, causing it to mistakely fall through to the logic
for `raw_identifier`.
We should recurse into parsing the following specifiers for such cases.
Closes #119072
Commit: b33c807b39e2fa07977277d13552f3d773c6b61e
https://github.com/llvm/llvm-project/commit/b33c807b39e2fa07977277d13552f3d773c6b61e
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
A llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp-liveness-tracking.mir
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
Log Message:
-----------
[AMDGPU] Add MaxMemoryClauseSchedStrategy (#114957)
Also expose an option to choose custom scheduler strategy:
amdgpu-sched-strategy={max-ilp|max-memory-clause}
This can be set through either function attribute or command line option.
The major behaviors of the max memory clause schedule strategy includes:
1. Try to cluster memory instructions more aggressively.
2. Try to schedule long latency load earlier than short latency
instruction.
I tested locally against about 470 real shaders and got the perf
changes (only count perf changes over +/-10%):
About 15 shaders improved 10%~40%.
Only 3 shaders drops ~10%.
(This was tested together with another change which increases the
maximum clustered dword from 8 to 32).
I will make another change to make that threshold configurable.
Commit: f6c51ea84ac914454142ee76f317c5f66a088434
https://github.com/llvm/llvm-project/commit/f6c51ea84ac914454142ee76f317c5f66a088434
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M compiler-rt/lib/orc/tests/unit/CMakeLists.txt
A compiler-rt/lib/orc/tests/unit/common.cpp
Log Message:
-----------
[ORC-RT] Fix unit tests on Linux.
The unit tests may transiently depend on __orc_rt_log_error, which is usually
provided by an alias when loading the runtime through the JIT. The unit tests
statically link the runtime, so this patch provides a fixed definition.
Commit: be2df95e9281985b61270bb6420ea0eeeffbbe59
https://github.com/llvm/llvm-project/commit/be2df95e9281985b61270bb6420ea0eeeffbbe59
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARC.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/AVR.h
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/BPF.h
M clang/lib/Basic/Targets/CSKY.cpp
M clang/lib/Basic/Targets/CSKY.h
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M clang/lib/Basic/Targets/Lanai.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/M68k.cpp
M clang/lib/Basic/Targets/M68k.h
M clang/lib/Basic/Targets/MSP430.h
M clang/lib/Basic/Targets/Mips.cpp
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/PNaCl.h
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/VE.cpp
M clang/lib/Basic/Targets/VE.h
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Basic/Targets/XCore.cpp
M clang/lib/Basic/Targets/XCore.h
Log Message:
-----------
Switch builtin strings to use string tables (#118734)
The Clang binary (and any binary linking Clang as a library), when built
using PIE, ends up with a pretty shocking number of dynamic relocations
to apply to the executable image: roughly 400k.
Each of these takes up binary space in the executable, and perhaps most
interestingly takes start-up time to apply the relocations.
The largest pattern I identified were the strings used to describe
target builtins. The addresses of these string literals were stored into
huge arrays, each one requiring a dynamic relocation. The way to avoid
this is to design the target builtins to use a single large table of
strings and offsets within the table for the individual strings. This
switches the builtin management to such a scheme.
This saves over 100k dynamic relocations by my measurement, an over 25%
reduction. Just looking at byte size improvements, using the `bloaty`
tool to compare a newly built `clang` binary to an old one:
```
FILE SIZE VM SIZE
-------------- --------------
+1.4% +653Ki +1.4% +653Ki .rodata
+0.0% +960 +0.0% +960 .text
+0.0% +197 +0.0% +197 .dynstr
+0.0% +184 +0.0% +184 .eh_frame
+0.0% +96 +0.0% +96 .dynsym
+0.0% +40 +0.0% +40 .eh_frame_hdr
+114% +32 [ = ] 0 [Unmapped]
+0.0% +20 +0.0% +20 .gnu.hash
+0.0% +8 +0.0% +8 .gnu.version
+0.9% +7 +0.9% +7 [LOAD #2 [R]]
[ = ] 0 -75.4% -3.00Ki .relro_padding
-16.1% -802Ki -16.1% -802Ki .data.rel.ro
-27.3% -2.52Mi -27.3% -2.52Mi .rela.dyn
-1.6% -2.66Mi -1.6% -2.66Mi TOTAL
```
We get a 16% reduction in the `.data.rel.ro` section, and nearly 30%
reduction in `.rela.dyn` where those reloctaions are stored.
This is also visible in my benchmarking of binary start-up overhead at
least:
```
Benchmark 1: ./old_clang --version
Time (mean ± σ): 17.6 ms ± 1.5 ms [User: 4.1 ms, System: 13.3 ms]
Range (min … max): 14.2 ms … 22.8 ms 162 runs
Benchmark 2: ./new_clang --version
Time (mean ± σ): 15.5 ms ± 1.4 ms [User: 3.6 ms, System: 11.8 ms]
Range (min … max): 12.4 ms … 20.3 ms 216 runs
Summary
'./new_clang --version' ran
1.13 ± 0.14 times faster than './old_clang --version'
```
We get about 2ms faster `--version` runs. While there is a lot of noise
in binary execution time, this delta is pretty consistent, and
represents over 10% improvement. This is particularly interesting to me
because for very short source files, repeatedly starting the `clang`
binary is actually the dominant cost. For example, `configure` scripts
running against the `clang` compiler are slow in large part because of
binary start up time, not the time to process the actual inputs to the
compiler.
----
This PR implements the string tables using `constexpr` code and the
existing macro system. I understand that the builtins are moving towards
a TableGen model, and if complete that would provide more options for
modeling this. Unfortunately, that migration isn't complete, and even
the parts that are migrated still rely on the ability to break out of
the TableGen model and directly expand an X-macro style `BUILTIN(...)`
textually. I looked at trying to complete the move to TableGen, but it
would both require the difficult migration of the remaining targets, and
solving some tricky problems with how to move away from any macro-based
expansion.
I was also able to find a reasonably clean and effective way of doing
this with the existing macros and some `constexpr` code that I think is
clean enough to be a pretty good intermediate state, and maybe give a
good target for the eventual TableGen solution. I was also able to
factor the macros into set of consistent patterns that avoids a
significant regression in overall boilerplate.
Commit: 44c645fcc9c65bfe3f13813efd0998fac188987d
https://github.com/llvm/llvm-project/commit/44c645fcc9c65bfe3f13813efd0998fac188987d
Author: lntue <lntue at google.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M libc/hdr/fcntl_overlay.h
M libc/hdr/types/CMakeLists.txt
M libc/hdr/types/struct_f_owner_ex.h
M libc/hdr/types/struct_flock.h
M libc/hdr/types/struct_flock64.h
Log Message:
-----------
[libc] Fix overlay mode inclusion for fcntl.h header. (#119159)
Commit: f2d18a4d00c5f5dea436b4f7b62ec5c87b98eac2
https://github.com/llvm/llvm-project/commit/f2d18a4d00c5f5dea436b4f7b62ec5c87b98eac2
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M compiler-rt/lib/orc/CMakeLists.txt
A compiler-rt/lib/orc/resolve.cpp
A compiler-rt/lib/orc/sysv_reenter.arm64.S
A compiler-rt/test/orc/TestCases/Generic/Inputs/foo-ret-42.ll
A compiler-rt/test/orc/TestCases/Generic/Inputs/var-x-42.ll
A compiler-rt/test/orc/TestCases/Generic/lazy-link.ll
R compiler-rt/test/orc/TestCases/Generic/orc-rt-executor-usage.test
M compiler-rt/test/orc/lit.cfg.py
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkReentryTrampolines.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
A llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
Reapply "[ORC] Introduce LazyReexportsManager, ... (#118923)" with fixes.
This re-applies 570ecdcf8b4, which was reverted in 74e8a37ff32 due to bot
failures. This commit renames sysv_resolve.cpp to resolve.cpp, which was the
cause of the config errors.
Commit: 8b041faeef5edfe719883dcc20c4b28a10cf6419
https://github.com/llvm/llvm-project/commit/8b041faeef5edfe719883dcc20c4b28a10cf6419
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port f2d18a4d00c5
Commit: 170467eeab6a6e2834c706cc709652d7da74085d
https://github.com/llvm/llvm-project/commit/170467eeab6a6e2834c706cc709652d7da74085d
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M libc/test/src/__support/CPP/atomic_test.cpp
Log Message:
-----------
[libc] fix 32bit riscv atomic tests (#119087)
This patch fixes test build failures on rv32 platforms. For non-integral
data, it always limits the size and align to be the same as platform
pointer layout. This should avoid the emitting of call to external
`libatomic` symbols.
Commit: 4228a6ef2b41fe4c0c9f65839e2b7f4a0b4c6627
https://github.com/llvm/llvm-project/commit/4228a6ef2b41fe4c0c9f65839e2b7f4a0b4c6627
Author: Thurston Dang <thurston at google.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
Log Message:
-----------
[msan] Add test for Arm NEON vmul (#117935)
Commit: 4dcc2f5db9d3a9d317aa1acde7adbbe9ec467cb2
https://github.com/llvm/llvm-project/commit/4dcc2f5db9d3a9d317aa1acde7adbbe9ec467cb2
Author: lntue <lntue at google.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
Log Message:
-----------
[libc] Replace LLVM_COMPILER_IS_GCC_COMPATIBLE with a local check. (#119164)
Commit: d6501dc88d5e040b31ffb83ebcf02c941c7c964f
https://github.com/llvm/llvm-project/commit/d6501dc88d5e040b31ffb83ebcf02c941c7c964f
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx10_2-cmp.ll
Log Message:
-----------
[X86][AVX512] Check input-types to COMX (#118606)
Supported types for COMX are f16, f32 and f64.
Without this check there's a crash on f80 types.
Fixes: https://github.com/llvm/llvm-project/issues/118605
Commit: eaa1b05c48c88ed6da6b8fc21d07f8417575a051
https://github.com/llvm/llvm-project/commit/eaa1b05c48c88ed6da6b8fc21d07f8417575a051
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll
Log Message:
-----------
[LVI] Thread binop over select with constant arms (#110212)
Motivating case from https://github.com/delta-io/delta-rs:
https://alive2.llvm.org/ce/z/3mzr4C
Commit: 9514a7784e9bb57e2ebea5f578daf5cca451b2c3
https://github.com/llvm/llvm-project/commit/9514a7784e9bb57e2ebea5f578daf5cca451b2c3
Author: Viktoria Maximova <viktoria.maksimova at intel.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll
Log Message:
-----------
[SPIR-V] [NFC] Verify cl_intel_subgroup_local_block_io extension in SPIR-V BE (#118796)
This OpenCL extension extends the subgroup block read and write
functions defined by `cl_intel_subgroups` (and its `char`, `short`, and
`long` versions) to support reading from and writing to pointers to the`
__local` memory address space in addition to pointers to the `__global`
memory address space.
The builtins are translated to SPIR-V using `SPV_INTEL_subgroups`
extension.
Commit: 6b93a1ff82b5d3c9254cf67a5e1c7151f462a7d7
https://github.com/llvm/llvm-project/commit/6b93a1ff82b5d3c9254cf67a5e1c7151f462a7d7
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Log Message:
-----------
[compiler-rt] fix __sanitizer::struct_sock_fprog_sz availability (#118762)
Commit: 3733ed6f1c6b0eef1e13e175ac81ad309fc0b080
https://github.com/llvm/llvm-project/commit/3733ed6f1c6b0eef1e13e175ac81ad309fc0b080
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Introduce Symbol::isExported to cache includeInDynsym
isExported, intended to replace exportDynamic, is primarily set in two
locations, (a) after parseSymbolVersion and (b) during demoteSymbols.
In the future, we should try removing exportDynamic. Currently,
merging exportDynamic/isExported would cause
riscv-gp.s to fail:
* The first isExported computation considers the undefined symbol exported
* Defined as a linker-synthesized symbol
* isExported remains true, while it should be false
Commit: 6a137fbe64736d59f1813b572fe7d213fc5bd4f6
https://github.com/llvm/llvm-project/commit/6a137fbe64736d59f1813b572fe7d213fc5bd4f6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Use namespaces in a unit test (#119144)
MemProfTest.cpp is about MemProf, so mentioning llvm::memprof
everywhere is quite verbose.
Commit: 0b0d9a3bee47e9de05e869be306284fa66533f63
https://github.com/llvm/llvm-project/commit/0b0d9a3bee47e9de05e869be306284fa66533f63
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
Log Message:
-----------
[CodeGen] [AMDGPU] Attempt DAGCombine for fmul with select to ldexp (#111109)
The materialization cost of 32-bit non-inline in case of fmul is quite
relatively more, rather than if possible to combine it into ldexp
instruction for specific scenarios (for datatypes like f64, f32 and f16)
as this is being handled here :
The dag combine for any pair of select values which are exact exponent
of 2.
```
fmul x, select(y, A, B) -> ldexp (x, select i32 (y, a, b))
fmul x, select(y, -A, -B) -> ldexp ((fneg x), select i32 (y, a, b))
where, A=2^a & B=2^b ; a and b are integers.
```
This dagCombine is handled separately in fmulCombine (newly defined in
SIIselLowering), targeting fmul fusing it with select type operand into
ldexp.
Thus, it fixes #104900.
Commit: 26760c7b907c1012c44d15959319bfa06848e5cd
https://github.com/llvm/llvm-project/commit/26760c7b907c1012c44d15959319bfa06848e5cd
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/index/dex/Dex.h
Log Message:
-----------
[clangd] Add clarifying comment about when Dex::IdxContents is populated (#118906)
Commit: e0ea9fd6dc36f585e364d4e569095ebe063e2573
https://github.com/llvm/llvm-project/commit/e0ea9fd6dc36f585e364d4e569095ebe063e2573
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-08 (Sun, 08 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-threeway-cmp-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-threeway-cmp-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/scmp.ll
A llvm/test/CodeGen/RISCV/GlobalISel/ucmp.ll
Log Message:
-----------
[RISCV][GISel] Lower G_SCMP and G_UCMP. (#119112)
Codegen is not optimal for RISC-V yet. We should port the (sub (setgt X,
Y), (setlt X, Y)) lowering from SelectionDAG.
Commit: beea45611839c61915f7fd26a0cc91b631c71f42
https://github.com/llvm/llvm-project/commit/beea45611839c61915f7fd26a0cc91b631c71f42
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
Log Message:
-----------
[Mips] Fix result type of MAdd/MSub nodes (#117455)
They have one "untyped" result in `MipsInstrInfo.td`, and this type is
used in DAG patterns.
Commit: 9a415f6d6b2f91e4e8d24f88f577a58a0ed3b9e8
https://github.com/llvm/llvm-project/commit/9a415f6d6b2f91e4e8d24f88f577a58a0ed3b9e8
Author: David Green <david.green at arm.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
M llvm/test/CodeGen/AArch64/neon-reverseshuffle.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
Log Message:
-----------
[GlobalISel] Fold ptrtoint(undef) and inttoptr(undef) to undef. (#119073)
This helps with shuffles a little, and one of the amd gpu tests is now
equivalent to the SDAG version.
Commit: 411df3bb4941318a02a59b4cd7a898d4f9b788a3
https://github.com/llvm/llvm-project/commit/411df3bb4941318a02a59b4cd7a898d4f9b788a3
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M clang/docs/tools/dump_format_style.py
M clang/test/Format/docs_updated.test
Log Message:
-----------
[clang-format] Make command lines of dump_format_[style|help].py consistent
Commit: 6d759f83eb779cfdec02c1fe33344f3215bbdab1
https://github.com/llvm/llvm-project/commit/6d759f83eb779cfdec02c1fe33344f3215bbdab1
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/new-delete.cpp
Log Message:
-----------
[Clang] Deleting an incomplete enum type is not an error (#119077)
The changes introduced in #97733 accidentally prevented to delete an
incomplete enum
(the validity of which has been confirmed by CWG2925
Fixes #99278
Commit: 98b694b66032b8b66b800a9ff44089245b3786dd
https://github.com/llvm/llvm-project/commit/98b694b66032b8b66b800a9ff44089245b3786dd
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
A llvm/test/CodeGen/AArch64/stack-tagging-epilogue-fold.mir
Log Message:
-----------
[AArch64] Fix range check for STGPostIndex (#117146)
When generating function epilogues using AArch64 stack tagging, we can
fold an SP update into the tag-setting loop. The loop tags 32 bytes at a
time using ST2G, so the final SP update might be done either by a post
indexed STG which tags the final 16 bytes of the tagged region, or by an
ADD/SUB instruction after the loop. However, we were only considering
the range of the ADD/SUB instructions when deciding whether to do this,
and the valid immediate range for STG is slightly lower when the offset
is positive, because it is a signed immediate, and must include the
extra 16 bytes being tagged.
Commit: 01710aa345f2fb26e2312dd1c62bd0044fc75bed
https://github.com/llvm/llvm-project/commit/01710aa345f2fb26e2312dd1c62bd0044fc75bed
Author: Vladislav Belov <vladislav.belov at syntacore.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M clang/lib/AST/CXXInheritance.cpp
M clang/test/CXX/drs/cwg5xx.cpp
Log Message:
-----------
[clang] Fix cast for injected types in case name lookup for dependent bases (#119024)
An assertion failure occurs in Clang when attempting to compile such an
example:
```c++
template <typename, typename, bool> struct MozPromise {
class Private;
private:
int mMagic4 = 42;
};
template <typename ResolveValueT, typename RejectValueT, bool IsExclusive>
struct MozPromise<ResolveValueT, RejectValueT, IsExclusive>::Private : MozPromise {
void SetTaskPriority() { mMagic4 ; }
};
```
Output:
```
clang: llvm-project/llvm/include/llvm/Support/Casting.h:566: decltype(auto) llvm::cast(const From&) [with To = clang::RecordType; From = clang::QualType]: Assertion `isa<To>(Val) && "cast<Ty>() argument of incompatible type!"' failed.
```
The reason is in the incorrect way of casting types when searching for
names in base classes
```c++
return Specifier->getType()->castAs<RecordType>()->getDecl()->getCanonicalDecl() == BaseRecord;
```
It loses injected types for template class names.
This patch provides fix for such cases
Commit: 62a25a4c7c3b291f0805894926419f1a64cd83f8
https://github.com/llvm/llvm-project/commit/62a25a4c7c3b291f0805894926419f1a64cd83f8
Author: Yihang Liu <2654791554 at qq.com>
Date: 2024-12-09 (Mon, 09 Dec 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
A llvm/test/Transforms/InstCombine/select-and-cmp.ll
A llvm/test/Transforms/InstCombine/select-or-cmp.ll
R llvm/test/Transforms/InstSimplify/select-and-cmp.ll
R llvm/test/Transforms/InstSimplify/select-or-cmp.ll
Log Message:
-----------
[InstSimplify] Remove foldSelectWithBinaryOp (#118913)
As mentioned in https://github.com/llvm/llvm-project/issues/118815, the
purpose of this simplification is superseded by
https://github.com/llvm/llvm-project/pull/76621, so we should have it
deleted.
Commit: bfc304b9f37ca3623a49a1875d795d773c1b3e80
https://github.com/llvm/llvm-project/commit/bfc304b9f37ca3623a49a1875d795d773c1b3e80
Author: wanglei <wanglei at loongson.cn>
Date: 2024-12-11 (Wed, 11 Dec 2024)
Changed paths:
M .github/workflows/commit-access-review.py
M bolt/lib/Core/DebugNames.cpp
A bolt/test/X86/dwarf5-debug-names-union.test
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/index/dex/Dex.h
M clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/return-const-ref-from-parameter.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/redundant-expression.cpp
M clang/docs/LanguageExtensions.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/docs/tools/dump_format_help.py
M clang/docs/tools/dump_format_style.py
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/ExternalASTSource.h
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
A clang/include/clang/CIR/Dialect/IR/CIRTypes.h
A clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/AST/ByteCode/BitcastBuffer.cpp
M clang/lib/AST/ByteCode/BitcastBuffer.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARC.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/AVR.h
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/BPF.h
M clang/lib/Basic/Targets/CSKY.cpp
M clang/lib/Basic/Targets/CSKY.h
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M clang/lib/Basic/Targets/Lanai.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/M68k.cpp
M clang/lib/Basic/Targets/M68k.h
M clang/lib/Basic/Targets/MSP430.h
M clang/lib/Basic/Targets/Mips.cpp
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/PNaCl.h
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/VE.cpp
M clang/lib/Basic/Targets/VE.h
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Basic/Targets/XCore.cpp
M clang/lib/Basic/Targets/XCore.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Format/CMakeLists.txt
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderInternals.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/CMakeLists.txt
R clang/lib/Serialization/TemplateArgumentHasher.cpp
R clang/lib/Serialization/TemplateArgumentHasher.h
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
A clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/ast-dump-types-json.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
A clang/test/CIR/global-var-simple.cpp
M clang/test/CXX/conv/conv.mem/p4.cpp
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg13xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/expr/expr.unary/expr.unary.op/p4.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p5.cpp
A clang/test/CodeGen/AArch64/fixed-register-global.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_cvt.c
A clang/test/CodeGen/allow-ubsan-check-inline.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGenCXX/aarch64-sve-vector-init.cpp
A clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
A clang/test/Driver/Inputs/config-l.cfg
R clang/test/Driver/aarch64-fixed-register-global.c
A clang/test/Driver/aarch64-fujitsu-monaka.c
M clang/test/Driver/baremetal-multilib.yaml
M clang/test/Driver/baremetal-sysroot.cpp
M clang/test/Driver/baremetal.cpp
M clang/test/Driver/config-file.c
M clang/test/Driver/frame-pointer-elim.c
M clang/test/Driver/openmp-offload.c
A clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Format/docs_updated.test
M clang/test/Index/print-type.cpp
M clang/test/Layout/ms-x86-member-pointers.cpp
M clang/test/Misc/target-invalid-cpu-note/aarch64.c
M clang/test/Modules/odr_hash.cpp
R clang/test/Modules/recursive-instantiations.cppm
M clang/test/OpenMP/target_parallel_ast_print.cpp
M clang/test/OpenMP/target_teams_ast_print.cpp
M clang/test/OpenMP/task_ast_print.cpp
M clang/test/OpenMP/teams_ast_print.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/Parser/cxx2c-pack-indexing.cpp
M clang/test/Sema/aarch64-fixed-global-register.c
M clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_cvt.c
M clang/test/Sema/constant_builtins_vector.cpp
M clang/test/Sema/warn-stringcompare.c
M clang/test/SemaCXX/addr-of-overloaded-function.cpp
M clang/test/SemaCXX/calling-conv-compat.cpp
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaCXX/static-cast.cpp
M clang/test/SemaCXX/warn-array-comparion.cpp
M clang/test/SemaCXX/warn-self-comparisons.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
A clang/test/SemaOpenACC/combined-construct-vector-ast.cpp
A clang/test/SemaOpenACC/combined-construct-vector-clause.cpp
M clang/test/SemaOpenACC/loop-construct-vector-clause.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Serialization/CMakeLists.txt
R clang/unittests/Serialization/LoadSpecLazilyTest.cpp
M clang/unittests/Tooling/Syntax/BuildTreeTest.cpp
M clang/utils/perf-training/perf-helper.py
M clang/www/cxx_status.html
M compiler-rt/include/sanitizer/memprof_interface.h
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_interceptors.h
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
M compiler-rt/lib/interception/interception.h
M compiler-rt/lib/memprof/memprof_flags.cpp
M compiler-rt/lib/memprof/memprof_flags.h
M compiler-rt/lib/memprof/memprof_interceptors.cpp
M compiler-rt/lib/memprof/memprof_interceptors.h
M compiler-rt/lib/memprof/memprof_interceptors_memintrinsics.h
M compiler-rt/lib/memprof/memprof_interface_internal.h
M compiler-rt/lib/memprof/memprof_rtl.cpp
M compiler-rt/lib/memprof/weak_symbols.txt
M compiler-rt/lib/msan/msan_interceptors.cpp
M compiler-rt/lib/msan/msan_poisoning.cpp
M compiler-rt/lib/nsan/nsan_allocator.cpp
M compiler-rt/lib/nsan/nsan_interceptors.cpp
M compiler-rt/lib/orc/CMakeLists.txt
A compiler-rt/lib/orc/resolve.cpp
A compiler-rt/lib/orc/sysv_reenter.arm64.S
M compiler-rt/lib/orc/tests/unit/CMakeLists.txt
A compiler-rt/lib/orc/tests/unit/common.cpp
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_main.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/test/memprof/TestCases/default_options.cpp
A compiler-rt/test/memprof/TestCases/set_options.cpp
A compiler-rt/test/orc/TestCases/Generic/Inputs/foo-ret-42.ll
A compiler-rt/test/orc/TestCases/Generic/Inputs/var-x-42.ll
A compiler-rt/test/orc/TestCases/Generic/lazy-link.ll
R compiler-rt/test/orc/TestCases/Generic/orc-rt-executor-usage.test
M compiler-rt/test/orc/lit.cfg.py
A compiler-rt/test/rtsan/Darwin/dlopen.cpp
M flang/include/flang/Lower/Allocatable.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/MutableBox.h
M flang/include/flang/Optimizer/CodeGen/DescriptorModel.h
M flang/include/flang/Runtime/CUDA/allocatable.h
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/include/flang/Runtime/CUDA/memory.h
M flang/include/flang/Runtime/allocatable.h
A flang/include/flang/Runtime/allocator-registry-consts.h
M flang/include/flang/Runtime/allocator-registry.h
A flang/include/flang/Runtime/array-constructor-consts.h
M flang/include/flang/Runtime/array-constructor.h
A flang/include/flang/Runtime/descriptor-consts.h
M flang/include/flang/Runtime/descriptor.h
A flang/include/flang/Runtime/io-api-consts.h
M flang/include/flang/Runtime/io-api.h
A flang/include/flang/Runtime/iostat-consts.h
M flang/include/flang/Runtime/iostat.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/Builder/Runtime/ArrayConstructor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/compute-offsets.cpp
M flang/runtime/CUDA/allocatable.cpp
M flang/runtime/CUDA/allocator.cpp
M flang/runtime/CUDA/descriptor.cpp
M flang/runtime/allocatable.cpp
M flang/runtime/array-constructor.cpp
M flang/runtime/descriptor.cpp
M flang/runtime/environment-default-list.h
M flang/runtime/internal-unit.cpp
A flang/test/Driver/Inputs/config-l.cfg
M flang/test/Driver/config-file.f90
M flang/test/Examples/omp-declarative-directive.f90
M flang/test/HLFIR/elemental-codegen.fir
M flang/test/Lower/HLFIR/array-ctor-as-runtime-temp.f90
M flang/test/Lower/HLFIR/array-ctor-character.f90
M flang/test/Lower/HLFIR/array-ctor-derived.f90
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/allocatable-runtime.f90
M flang/test/Lower/allocate-mold.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/from-clause-v45.f90
A flang/test/Semantics/OpenMP/linear-clause01.f90
M flang/test/Semantics/OpenMP/reduction04.f90
M flang/test/Semantics/OpenMP/reduction06.f90
M flang/test/Semantics/OpenMP/reduction12.f90
A flang/test/Semantics/OpenMP/reduction15.f90
A flang/test/Semantics/OpenMP/reduction16.f90
M flang/test/Semantics/OpenMP/to-clause-v45.f90
M flang/test/Semantics/OpenMP/use_device_addr1.f90
M flang/test/Semantics/OpenMP/use_device_ptr1.f90
M flang/unittests/Optimizer/Builder/Runtime/AllocatableTest.cpp
M flang/unittests/Runtime/ArrayConstructor.cpp
M flang/unittests/Runtime/CUDA/Allocatable.cpp
M flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/unittests/Runtime/CUDA/Memory.cpp
M flang/unittests/Runtime/ExternalIOTest.cpp
M flang/unittests/Runtime/ListInputTest.cpp
M flang/unittests/Runtime/LogicalFormatTest.cpp
M flang/unittests/Runtime/Namelist.cpp
M flang/unittests/Runtime/NumericalFormatTest.cpp
M flang/unittests/Runtime/RuntimeCrashTest.cpp
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/hdr/fcntl_overlay.h
M libc/hdr/types/CMakeLists.txt
M libc/hdr/types/struct_f_owner_ex.h
M libc/hdr/types/struct_flock.h
M libc/hdr/types/struct_flock64.h
M libc/src/__support/CPP/atomic.h
M libc/src/__support/CPP/type_traits.h
A libc/src/__support/CPP/type_traits/is_copy_assignable.h
A libc/src/__support/CPP/type_traits/is_copy_constructible.h
A libc/src/__support/CPP/type_traits/is_move_assignable.h
A libc/src/__support/CPP/type_traits/is_move_constructible.h
M libc/src/__support/CPP/type_traits/is_trivially_copyable.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/test/src/__support/CPP/atomic_test.cpp
A libcxx/Maintainers.md
M libcxx/include/__memory/allocator_traits.h
M libcxx/include/__type_traits/detected_or.h
M libcxx/test/benchmarks/allocation.bench.cpp
R libcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp
M libcxx/test/libcxx/memory/shared_ptr_array.pass.cpp
M libcxx/test/std/containers/sequences/vector/common.h
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
M libcxx/test/std/language.support/support.dynamic/align_val_t.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.pass.cpp
A libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array.pass.cpp
R libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
R libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array_fsizeddeallocation.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.pass.cpp
A libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete.pass.cpp
R libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
R libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete_fsizeddeallocation.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/types.h
M libcxx/utils/libcxx/test/features.py
M libcxxabi/src/cxa_guard_impl.h
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LTO.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
M lldb/docs/index.rst
A lldb/docs/resources/formatterbytecode.rst
A lldb/examples/python/formatter_bytecode.py
M lldb/include/lldb/Target/Platform.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg.h
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.h
M lldb/source/Target/StackFrame.cpp
A lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/MyOptional.cpp
A lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/formatter.py
A lldb/test/Shell/ScriptInterpreter/Python/bytecode.test
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M llvm/Maintainers.md
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/IntervalMap.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkReentryTrampolines.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Transforms/Instrumentation/RealtimeSanitizer.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/FunctionComparator.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/GCMetadata.cpp
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/LiveStacks.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
A llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrFormats.td
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/M68k/M68kSubtarget.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/RealtimeSanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/FunctionComparator.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Analysis/CostModel/X86/shuffle-splat-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
A llvm/test/Analysis/ScalarEvolution/trip-count-phi-increment.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-crash.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/arm64-dup.ll
A llvm/test/CodeGen/AArch64/bf16-instructions.ll
A llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
A llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/cpus.ll
A llvm/test/CodeGen/AArch64/dup.ll
A llvm/test/CodeGen/AArch64/memtag-merge-writeback.mir
M llvm/test/CodeGen/AArch64/neon-reverseshuffle.ll
A llvm/test/CodeGen/AArch64/sink-mul-exts.ll
M llvm/test/CodeGen/AArch64/sinksplat.ll
M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
A llvm/test/CodeGen/AArch64/stack-tagging-epilogue-fold.mir
M llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-fcvtzsu.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
A llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
A llvm/test/CodeGen/AMDGPU/invalid-hidden-kernarg-in-kernel-signature.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.simple.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp-liveness-tracking.mir
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/ARM/add-like-or.ll
A llvm/test/CodeGen/ARM/and-cmpz-to-shift.ll
M llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
M llvm/test/CodeGen/ARM/atomic-64bit.ll
M llvm/test/CodeGen/ARM/atomic-ops-v8.ll
M llvm/test/CodeGen/ARM/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/ARM/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
M llvm/test/CodeGen/ARM/bfi.ll
M llvm/test/CodeGen/ARM/cmov_fp16.ll
M llvm/test/CodeGen/ARM/cse-call.ll
M llvm/test/CodeGen/ARM/cttz.ll
M llvm/test/CodeGen/ARM/fadd-select-fneg-combine.ll
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fpclamptosat.ll
M llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/fpscr-multi-use.ll
M llvm/test/CodeGen/ARM/fptoi-sat-store.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/funnel-shift-rot.ll
M llvm/test/CodeGen/ARM/funnel-shift.ll
M llvm/test/CodeGen/ARM/ifcvt1.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/neon_vabd.ll
M llvm/test/CodeGen/ARM/overflow-intrinsic-optimizations.ll
M llvm/test/CodeGen/ARM/sadd_sat.ll
M llvm/test/CodeGen/ARM/sadd_sat_plus.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/ARM/select_const.ll
M llvm/test/CodeGen/ARM/shift-i64.ll
M llvm/test/CodeGen/ARM/ssub_sat.ll
M llvm/test/CodeGen/ARM/ssub_sat_plus.ll
M llvm/test/CodeGen/ARM/sub-cmp-peephole.ll
M llvm/test/CodeGen/ARM/uadd_sat.ll
M llvm/test/CodeGen/ARM/uadd_sat_plus.ll
M llvm/test/CodeGen/ARM/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/ARM/umulo-64-legalisation-lowering.ll
M llvm/test/CodeGen/ARM/usub_sat.ll
M llvm/test/CodeGen/ARM/usub_sat_plus.ll
M llvm/test/CodeGen/ARM/vselect_imax.ll
M llvm/test/CodeGen/ARM/wide-compares.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
M llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
A llvm/test/CodeGen/RISCV/GlobalISel/knownbits-copy-crash.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-phi-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-threeway-cmp-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-threeway-cmp-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/phi.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/scmp.ll
A llvm/test/CodeGen/RISCV/GlobalISel/ucmp.ll
A llvm/test/CodeGen/RISCV/fixed-csr.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll
M llvm/test/CodeGen/SystemZ/regcoal-subranges-update-remat.mir
M llvm/test/CodeGen/SystemZ/regcoal-subranges-update.mir
M llvm/test/CodeGen/SystemZ/regcoal-undef-lane-4-rm-cp-commuting-def.mir
M llvm/test/CodeGen/SystemZ/regcoal_undefsrc.mir
M llvm/test/CodeGen/Thumb/arm_q15_to_q31.ll
M llvm/test/CodeGen/Thumb/select.ll
M llvm/test/CodeGen/Thumb/smul_fix_sat.ll
M llvm/test/CodeGen/Thumb/stack-guard-xo.ll
M llvm/test/CodeGen/Thumb/umul_fix_sat.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/arm_cmplx_dot_prod_f32.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/exitcount.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
M llvm/test/CodeGen/Thumb2/float-ops.ll
M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
M llvm/test/CodeGen/Thumb2/mve-doublereduct.ll
M llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
M llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fpclamptosat_vec.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-gather-scatter-ptr-address.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-minmaxi.ll
M llvm/test/CodeGen/Thumb2/mve-pipelineloops.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-pred-or.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vselect.ll
M llvm/test/CodeGen/Thumb2/mve-pred-xor.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
M llvm/test/CodeGen/Thumb2/mve-vmaxv-vminv-scalar.ll
M llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
M llvm/test/CodeGen/Thumb2/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/Thumb2/umulo-64-legalisation-lowering.ll
M llvm/test/CodeGen/X86/apx/cfcmov.ll
M llvm/test/CodeGen/X86/avx10_2-cmp.ll
A llvm/test/CodeGen/X86/pr118934.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vpdpwssd.ll
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
R llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
A llvm/test/Instrumentation/HeapProfiler/memprof-options.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
M llvm/test/Instrumentation/RealtimeSanitizer/rtsan.ll
M llvm/test/Instrumentation/SanitizerCoverage/missing_dbg.ll
A llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
A llvm/test/MC/AMDGPU/gfx11_asm_vinterp_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopc_alias.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopcx_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/ARM/invalid-barrier.s
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
A llvm/test/Transforms/ConstraintElimination/trunc.ll
M llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll
M llvm/test/Transforms/InstCombine/AMDGPU/lane-index-simplify-demanded-bits.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/icmp-or-of-select-with-zero.ll
A llvm/test/Transforms/InstCombine/select-and-cmp.ll
A llvm/test/Transforms/InstCombine/select-or-cmp.ll
M llvm/test/Transforms/InstCombine/trunc.ll
R llvm/test/Transforms/InstSimplify/select-and-cmp.ll
R llvm/test/Transforms/InstSimplify/select-or-cmp.ll
A llvm/test/Transforms/LoopUnroll/ARM/lob-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-select-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
A llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/reduction-align.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/MemCpyOpt/vscale-memset.ll
A llvm/test/Transforms/MergeFunc/initializes-attr.ll
A llvm/test/Transforms/SLPVectorizer/X86/perfect-matched-reused-bv.ll
A llvm/test/tools/llvm-mca/AArch64/Cortex/X1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/X2-sve-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/X3-sve-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/X4-sve-instructions.s
A llvm/test/tools/llvm-profdata/memprof-yaml-invalid.test
A llvm/test/tools/llvm-profdata/memprof-yaml.test
A llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging-weak_odr.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/IR/IntrinsicsTest.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
M llvm/unittests/TargetParser/Host.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/git/requirements.txt
M llvm/utils/git/requirements.txt.in
M llvm/utils/gn/secondary/clang/lib/Serialization/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Serialization/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/lib/Analysis/Presburger/PWMAFunction.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/GPU/outlining.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M offload/DeviceRTL/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/src/interface.cpp
M offload/src/omptarget.cpp
M offload/test/api/omp_env_vars.c
M offload/test/offloading/info.c
M offload/test/offloading/ompx_bare.c
A offload/test/offloading/ompx_bare_multi_dim.cpp
M offload/test/offloading/small_trip_count.c
M offload/test/offloading/small_trip_count_thread_limit.cpp
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.5-bogner
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/4f738a532551...bfc304b9f37c
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