[all-commits] [llvm/llvm-project] c3d151: [memprof] Move YAML traits to MemProf.h (NFC) (#11...
Krzysztof Parzyszek via All-commits
all-commits at lists.llvm.org
Thu Dec 5 04:51:50 PST 2024
Branch: refs/heads/users/kparzysz/spr/r01-reduction-objects
Home: https://github.com/llvm/llvm-project
Commit: c3d15188cfe243900895a4f2c4f36b84e14928b7
https://github.com/llvm/llvm-project/commit/c3d15188cfe243900895a4f2c4f36b84e14928b7
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[memprof] Move YAML traits to MemProf.h (NFC) (#118668)
This patch moves the MemProf YAML traits to MemProf.h so that the YAML
writer can access them from outside MemProfReader.cpp in the future.
Commit: a6e7749ea9e60f6b76b367d18ed90d09ea441581
https://github.com/llvm/llvm-project/commit/a6e7749ea9e60f6b76b367d18ed90d09ea441581
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
Log Message:
-----------
[RISCV] Improve lowering of spread(2) shuffles (#118658)
A spread(2) shuffle is just a interleave with an undef lane. The
existing lowering was reusing the even lane for the undef value. This
was entirely legal, but non-optimal.
Commit: 048fc2bc102cff806613592829ff275c0f2b826f
https://github.com/llvm/llvm-project/commit/048fc2bc102cff806613592829ff275c0f2b826f
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/MC/MCRegisterInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-addrmode.ll
M llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
Log Message:
-----------
[LiveIntervals] Ignore artificial regs when adding kill flags (#116963)
If parts of a physical register for a given liverange, as assigned by
the register allocator, can be used to store other values not
represented by this liverange, then `LiveIntervals::addKillFlags`
normally avoids adding a kill flag on the use of this register
when the value's liverange ends.
However, if all the other regunits are artificial, then we can
still safely add the kill flag, since those parts of the register
can never be accessed independently.
Commit: d57892a2a153ab71a796f07e39d939eae6910c21
https://github.com/llvm/llvm-project/commit/d57892a2a153ab71a796f07e39d939eae6910c21
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AArch64/dag-combine-concat-vectors.ll
R llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/X86/vselect.ll
Log Message:
-----------
Revert "[DAGCombiner] Add support for scalarising extracts of a vector setcc" (#118693)
Reverts llvm/llvm-project#117566
Breaks libc++ tests with HWASAN
https://lab.llvm.org/buildbot/#/builders/55/builds/3959
Commit: 5e769fb2342f2ff5986f62cc50550b8b4ab1985f
https://github.com/llvm/llvm-project/commit/5e769fb2342f2ff5986f62cc50550b8b4ab1985f
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
A libc/config/windows/headers.txt
Log Message:
-----------
[libc] add headers.txt for windows (#118675)
Link:
https://github.com/llvm/llvm-project/pull/117220#issuecomment-2518126598
---------
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: e84c918cb42f9f0d1f7fda44bfacdaae13723e64
https://github.com/llvm/llvm-project/commit/e84c918cb42f9f0d1f7fda44bfacdaae13723e64
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/VectorTypes.h
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
Log Message:
-----------
[mlir] Use new VectorType wrappers CommonTypeConstraints.td (#118645)
As a follow-on for #87986, moves the VectorType convenience wrappers
(`FixedVectorType` and `ScalableVectorType`) to BuiltinTypes.h. This
allows us to use the new wrappers in "CommonTypeConstraints.td".
Commit: e0f52538c9739d945e316eac0ddd92d26e4e380a
https://github.com/llvm/llvm-project/commit/e0f52538c9739d945e316eac0ddd92d26e4e380a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
Log Message:
-----------
AMDGPU: Change bitop3 intrinsic operand to i32 (#118647)
Commit: 431581b22a5269c2cd05c0a8e2155072d52f85a7
https://github.com/llvm/llvm-project/commit/431581b22a5269c2cd05c0a8e2155072d52f85a7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
Log Message:
-----------
AMDGPU: Simplify definition of bitop3 operand. NFC. (#118648)
Co-authored-by: Jay Foad <jay.foad at amd.com>
Commit: 7954a0514ba7de40dba6c598af830fd1b7a8bf0c
https://github.com/llvm/llvm-project/commit/7954a0514ba7de40dba6c598af830fd1b7a8bf0c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/tbaa-reference.cpp
M clang/test/CodeGenCXX/template-instantiation.cpp
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
M clang/unittests/CodeGen/TBAAMetadataTest.cpp
Log Message:
-----------
[Clang] Enable -fpointer-tbaa by default. (#117244)
Support for more precise TBAA metadata has been added a while ago
(behind the -fpointer-tbaa flag). The more precise TBAA metadata allows
treating accesses of different pointer types as no-alias.
This helps to remove more redundant loads and stores in a number of
workloads.
Some highlights on the impact across llvm-test-suite's MultiSource,
SPEC2006 & SPEC2017 include:
* +2% more NoAlias results for memory accesses
* +3% more stores removed by DSE,
* +4% more loops vectorized.
This closes a relatively big gap to GCC, which has been supporting
disambiguating based on pointer types for a long time.
(https://clang.godbolt.org/z/K7Wbhrz4q)
Pointer-TBAA support for pointers to builtin types has been added in
https://github.com/llvm/llvm-project/pull/76612.
Support for user-defined types has been added in
https://github.com/llvm/llvm-project/pull/110569.
There are 2 recent PRs with bug fixes for special cases uncovered during
testing:
* https://github.com/llvm/llvm-project/pull/116991
* https://github.com/llvm/llvm-project/pull/116596
PR: https://github.com/llvm/llvm-project/pull/117244
Commit: ce0f11325e0c62c5b81391589e9b93b412a85bc1
https://github.com/llvm/llvm-project/commit/ce0f11325e0c62c5b81391589e9b93b412a85bc1
Author: Augie Fackler <augie at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdLSPServer.h
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/ClangdServer.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/XRefs.h
M clang-tools-extra/clangd/index/Background.cpp
M clang-tools-extra/clangd/index/Background.h
M clang-tools-extra/clangd/index/FileIndex.cpp
M clang-tools-extra/clangd/index/FileIndex.h
M clang-tools-extra/clangd/index/Index.cpp
M clang-tools-extra/clangd/index/Index.h
M clang-tools-extra/clangd/index/MemIndex.cpp
M clang-tools-extra/clangd/index/MemIndex.h
M clang-tools-extra/clangd/index/Merge.cpp
M clang-tools-extra/clangd/index/Merge.h
M clang-tools-extra/clangd/index/ProjectAware.cpp
M clang-tools-extra/clangd/index/Ref.h
M clang-tools-extra/clangd/index/Serialization.cpp
M clang-tools-extra/clangd/index/Serialization.h
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/index/dex/Dex.cpp
M clang-tools-extra/clangd/index/dex/Dex.h
M clang-tools-extra/clangd/index/dex/dexp/Dexp.cpp
M clang-tools-extra/clangd/index/remote/Client.cpp
M clang-tools-extra/clangd/index/remote/Index.proto
M clang-tools-extra/clangd/index/remote/Service.proto
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.h
M clang-tools-extra/clangd/index/remote/server/Server.cpp
M clang-tools-extra/clangd/test/index-serialization/Inputs/sample.idx
M clang-tools-extra/clangd/test/type-hierarchy-ext.test
M clang-tools-extra/clangd/test/type-hierarchy.test
M clang-tools-extra/clangd/tool/Check.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/BackgroundIndexTests.cpp
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/clangd/unittests/DexTests.cpp
M clang-tools-extra/clangd/unittests/FileIndexTests.cpp
M clang-tools-extra/clangd/unittests/IndexTests.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
M clang-tools-extra/clangd/unittests/TestTU.cpp
M clang-tools-extra/clangd/unittests/TestWorkspace.cpp
Log Message:
-----------
Revert "[clangd] Re-land "support outgoing calls in call hierarchy" (#117673)"
This reverts commit 7be3326200ef382705d8e6b2d7dc5378af96b34a.
Per https://protobuf.dev/programming-guides/dos-donts/#add-required
this will re-land tomorrow without the required fields.
Commit: 2e425bf629f80c8f8582c266d25a384e7549198d
https://github.com/llvm/llvm-project/commit/2e425bf629f80c8f8582c266d25a384e7549198d
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
A lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
Reapply "[lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#117071)"
9de73b20404f0b2db1cbf70d164cfe0789d5bb94 lands a fix to DWARFTypePrinter that is used by lldb in this change.
Commit: ac5dd455caaf286625f61b604291f2eaed9702f0
https://github.com/llvm/llvm-project/commit/ac5dd455caaf286625f61b604291f2eaed9702f0
Author: George Stagg <georgestagg at gmail.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/MC/WasmObjectWriter.cpp
A llvm/test/MC/WebAssembly/init-array.s
Log Message:
-----------
[WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (#111008)
Commit: 6003be7ef14bd95647e1ea6ec9685c1310f8ce58
https://github.com/llvm/llvm-project/commit/6003be7ef14bd95647e1ea6ec9685c1310f8ce58
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M flang/include/flang/Evaluate/target.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Exceptions.h
M flang/include/flang/Runtime/exceptions.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/target.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/runtime/exceptions.cpp
M flang/test/Evaluate/fold-ieee.f90
M flang/test/Evaluate/folding18.f90
A flang/test/Lower/Intrinsics/ieee_underflow.f90
Log Message:
-----------
[flang] IEEE_GET_UNDERFLOW_MODE, IEEE_SET_UNDERFLOW_MODE (#118551)
Implement IEEE_GET_UNDERFLOW_MODE and IEEE_SET_UNDERFLOW_MODE. Update
IEEE_SUPPORT_UNDERFLOW_CONTROL to enable support for indvidual REAL
kinds.
Commit: e6bd00c0f7017cf9652fec573d6554a3a95d4e28
https://github.com/llvm/llvm-project/commit/e6bd00c0f7017cf9652fec573d6554a3a95d4e28
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/Analysis/InlineCost.cpp
Log Message:
-----------
[Inliner] Add a helper around `SimplifiedValues.lookup`. NFCI (#118646)
Commit: 7efd6139f2d1139e3b434a21992967531f469acc
https://github.com/llvm/llvm-project/commit/7efd6139f2d1139e3b434a21992967531f469acc
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
A flang/test/Fir/CUDA/cuda-global-addr.mlir
Log Message:
-----------
[flang][cuda] Get device address in fir.declare (#118591)
Add pattern that update fir.declare memref when it comes from a device
global and is not a descriptor. In that case, we recover the device
address that needs to be used in ops like `fir.array_coor` and so on.
Commit: a7da702377ef857a6b2dccf5f07f77b489be1dd1
https://github.com/llvm/llvm-project/commit/a7da702377ef857a6b2dccf5f07f77b489be1dd1
Author: lntue <lntue at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M libc/src/__support/macros/optimization.h
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/inv_trigf_utils.h
Log Message:
-----------
[libc][math] Add small code size options for atan2f. (#118532)
Commit: 35c7df1a219e99bc0e2aa2034e77f4e9c90566d3
https://github.com/llvm/llvm-project/commit/35c7df1a219e99bc0e2aa2034e77f4e9c90566d3
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/include/clang/Basic/BuiltinsARM.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/intrin0.h
M clang/test/CodeGen/ms-intrinsics.c
Log Message:
-----------
[aarch64][arm] Add support for the _Interlocked[Compare]ExchangePointer_{acq|nf|rel} MS intrinsics (#117645)
Adds support for the following MSVC intrinsics:
* `_InterlockedCompareExchangePointer_acq`
* `_InterlockedCompareExchangePointer_rel`
* `_InterlockedExchangePointer_acq`
* `_InterlockedExchangePointer_nf`
* `_InterlockedExchangePointer_rel`
These are documented at:
<https://learn.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170#interlocked-intrinsics>
NOTE: `_InterlockedCompareExchangePointer_nf` is not being added since
it already exists, although it was incorrectly added for all
architectures instead of being Arm & AArch64 specific.
This change also unifies how the pointer and non-pointer interlocked
compare-exchange intrinsics are being handled.
Commit: 261d4bbb3bb847b90b9734daefe13618dea91613
https://github.com/llvm/llvm-project/commit/261d4bbb3bb847b90b9734daefe13618dea91613
Author: Luke Quinn <quic_lquinn at quicinc.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
M llvm/test/CodeGen/RISCV/double-zfa.ll
M llvm/test/CodeGen/RISCV/float-zfa.ll
M llvm/test/CodeGen/RISCV/half-zfa.ll
Log Message:
-----------
[RISCV] f32 roundeven pattern missed for Zfa (#118672)
f32 roundeven pattern was missing from RISCVInstrInfoZfa.td. Tests for
roundeven.f32/f16/f64 were missing.
Commit: 004e75ef17c76598f7307adbe9a39d5ae6d5375a
https://github.com/llvm/llvm-project/commit/004e75ef17c76598f7307adbe9a39d5ae6d5375a
Author: AdityaK <hiraditya at msn.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/test/Driver/linux-ld.c
Log Message:
-----------
Pack relocations for Android API >= 28 (#117624)
Patch copied from:
https://github.com/android/ndk/issues/909#issuecomment-649872696
Fixes: https://github.com/android/ndk/issues/909
Commit: 8cffab821c4b96c73fc4ad5e8ca2417ced953c5a
https://github.com/llvm/llvm-project/commit/8cffab821c4b96c73fc4ad5e8ca2417ced953c5a
Author: Petr Hosek <phosek at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Fuchsia.cmake
Log Message:
-----------
[Fuchsia] Remove libc from LLVM_ENABLE_PROJECTS (#118704)
This was only needed for old hdrgen which is no longer being used.
Commit: b86a5993bc7be59b49879a0e768f53b7330f71b2
https://github.com/llvm/llvm-project/commit/b86a5993bc7be59b49879a0e768f53b7330f71b2
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/cmake/modules/CrossCompile.cmake
Log Message:
-----------
[libc] remove references to LIBC_HDRGEN_EXE (#118670)
Further cleanups from old hdrgen removal. I didn't realize there were
cmake
variables related to old hdrgen spread out throughout more of the source
tree.
Link: #117220
Link: #117208
Commit: e6aec2c12095cc7debd1a8004c8535eef41f4c36
https://github.com/llvm/llvm-project/commit/e6aec2c12095cc7debd1a8004c8535eef41f4c36
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M llvm/lib/Target/AMDGPU/AMDGPUAttributes.def
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-no-agpr.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
A llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/flat-address-space.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
Log Message:
-----------
[AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (#94647)
The AMDGPUAnnotateKernelFeatures pass infers the "amdgpu-calls" and
"amdgpu-stack-objects" attributes, which are used to infer whether we
need to initialize flat scratch. This is, however, not precise. Instead,
we should use AMDGPUAttributor and infer amdgpu-no-flat-scratch-init on
kernels. Refer to https://github.com/llvm/llvm-project/issues/63586 .
Commit: 1b4cdc401a19e7c9f7679c94540a41340eb4e548
https://github.com/llvm/llvm-project/commit/1b4cdc401a19e7c9f7679c94540a41340eb4e548
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC]update vop3 dasm test with latest script (#118686)
This is a NFC. Update dasm test for VOP3 using latest update script
Commit: a2fc276ed2556c5da59f8b039bbb6d97f3003134
https://github.com/llvm/llvm-project/commit/a2fc276ed2556c5da59f8b039bbb6d97f3003134
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
Log Message:
-----------
[libc] Remove complicated header guards on HSA include
Summary:
This is much more standard now, we already require new HSA with what we
use, so no point checking for this.
Commit: 2fea1ccb6221238674562533684c51b63de248d4
https://github.com/llvm/llvm-project/commit/2fea1ccb6221238674562533684c51b63de248d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Log Message:
-----------
[RISCV][GISel] Correct the widening predicate for G_SITOFP/G_UITOFP.
This happened to coincidentally work due to D and Zfh both depending
on the F extension.
It breaks when I tried to add fp128 libcall support.
Commit: f50ce316ec434f1e2f061287a48d85acde801a3d
https://github.com/llvm/llvm-project/commit/f50ce316ec434f1e2f061287a48d85acde801a3d
Author: Matthias Springer <me at m-sp.org>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
Log Message:
-----------
[llvm][NFC] `APFloat`: Add missing semantics to enum (#117291)
* Add missing semantics to the `Semantics` enum.
* Move all documentation of the semantics to the header file.
* Also rename some functions for consistency.
Commit: fc201d6133bef41b306cc39da0e4aed2112656b0
https://github.com/llvm/llvm-project/commit/fc201d6133bef41b306cc39da0e4aed2112656b0
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
Revert "[InstCombine] Support gep nuw in icmp folds" (#118698)
Reverts llvm/llvm-project#118472
Breaks profile tests on i386
https://lab.llvm.org/buildbot/#/builders/66/builds/7009
Commit: 758107f70a78d8d9c97438264c06ae7aa9e7cc5f
https://github.com/llvm/llvm-project/commit/758107f70a78d8d9c97438264c06ae7aa9e7cc5f
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
Log Message:
-----------
[RISCV] Improve spread(N) shuffle testing
Rework them now that spread(2) is special cased to ensure we still have
non-zero shift coverage.
Commit: 09f4c26262a35c1e428cf8b01b6239c6f605a4c1
https://github.com/llvm/llvm-project/commit/09f4c26262a35c1e428cf8b01b6239c6f605a4c1
Author: Roland McGrath <mcgrathr at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/test/Driver/fuchsia.c
Log Message:
-----------
[Driver][Fuchsia] Avoid "argument unused" warnings (#118416)
There should not be an error or warning reported for using
redundant options to control what goes into the link. For
example, -nolibc -nostdlib.
Commit: 1ef9410a96c1d9669a6feaf03fcab8d0a4a13bd5
https://github.com/llvm/llvm-project/commit/1ef9410a96c1d9669a6feaf03fcab8d0a4a13bd5
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M llvm/lib/Target/AMDGPU/AMDGPUAttributes.def
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-no-agpr.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
R llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
R llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/flat-address-space.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
Log Message:
-----------
Revert "[AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (#94647)"
This reverts commit e6aec2c12095cc7debd1a8004c8535eef41f4c36. Commit breaks "ninja check-llvm" on x86 host.
Commit: 659834df0e86ac6e605a50118c12e99cfb61eb19
https://github.com/llvm/llvm-project/commit/659834df0e86ac6e605a50118c12e99cfb61eb19
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M libc/docs/fenv.rst
M libc/docs/setjmp.rst
M libc/docs/signal.rst
M libc/docs/stdbit.rst
M libc/docs/threads.rst
M libc/utils/docgen/docgen.py
M libc/utils/docgen/setjmp.json
Log Message:
-----------
docgen refresh (#118709)
- **[libc][docgen] Use Macro for macro table name**
- **fix setjmp json, otherwise can't regen**
- **regen all docs**
Commit: 17f99accf23e1486404b6833a18d0d78a1ecd098
https://github.com/llvm/llvm-project/commit/17f99accf23e1486404b6833a18d0d78a1ecd098
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M flang/test/Evaluate/fold-ieee.f90
M flang/test/Evaluate/folding18.f90
R flang/test/Lower/Intrinsics/ieee_underflow.f90
Log Message:
-----------
[flang] build test fix/suppression (#118716)
Commit: 32b821cab3064ae9a77a0f1d9916a286c7543735
https://github.com/llvm/llvm-project/commit/32b821cab3064ae9a77a0f1d9916a286c7543735
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/lib/AST/MicrosoftMangle.cpp
Log Message:
-----------
[AST] Fix a warning
This patch fixes:
clang/lib/AST/MicrosoftMangle.cpp:1006:11: error: enumeration value
'S_PPCDoubleDoubleLegacy' not handled in switch [-Werror,-Wswitch]
Commit: df43af40ec1d139caa5cb870c7e35ff6b91cdbc3
https://github.com/llvm/llvm-project/commit/df43af40ec1d139caa5cb870c7e35ff6b91cdbc3
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M flang/test/Evaluate/fold-ieee.f90
Log Message:
-----------
Vkd1 (#118721)
Commit: af4ae12780099d3df0b89bccc80fd69b240f345e
https://github.com/llvm/llvm-project/commit/af4ae12780099d3df0b89bccc80fd69b240f345e
Author: Chris Apple <cja-private at pm.me>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
A compiler-rt/test/rtsan/fork_exec.cpp
Log Message:
-----------
[rtsan] Add fork/execve interceptors (#117198)
Commit: 970d6d20967258528980c9b7feaaf3dd3acf9aa3
https://github.com/llvm/llvm-project/commit/970d6d20967258528980c9b7feaaf3dd3acf9aa3
Author: pcc <peter at pcc.me.uk>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Writer.cpp
M lld/test/ELF/pack-dyn-relocs-ifunc.s
Log Message:
-----------
ELF: Have __rela_iplt_{start,end} surround .rela.iplt with --pack-dyn-relocs=android.
In #86751 we moved the IRELATIVE relocations to .rela.plt when
--pack-dyn-relocs=android was enabled but we neglected to also move
the __rela_iplt_{start,end} symbols. As a result, static binaries
linked with this flag were unable to find their IRELATIVE relocations.
Fix it by having the symbols surround the correct section.
Reviewers: MaskRay, smithp35
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/118585
Commit: 7d1c661381d36018fd105f4ad4c2d6dc45e7288b
https://github.com/llvm/llvm-project/commit/7d1c661381d36018fd105f4ad4c2d6dc45e7288b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/allocatable.h
M flang/include/flang/Runtime/allocator-registry.h
M flang/include/flang/Runtime/descriptor.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/runtime/CUDA/allocatable.cpp
M flang/runtime/CUDA/allocator.cpp
M flang/runtime/CUDA/descriptor.cpp
M flang/runtime/allocatable.cpp
M flang/runtime/array-constructor.cpp
M flang/runtime/descriptor.cpp
M flang/test/HLFIR/elemental-codegen.fir
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/allocatable-runtime.f90
M flang/test/Lower/allocate-mold.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Runtime/CUDA/Allocatable.cpp
M flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/unittests/Runtime/CUDA/Memory.cpp
Log Message:
-----------
[flang] Allow to pass an async id to allocate the descriptor (#118713)
This is a patch in preparation for the support stream ordered memory
allocator in CUDA Fortran.
This patch adds an asynchronous id to the AllocatableAllocate runtime
function and to Descriptor::Allocate so it can be passed down to the
registered allocator. It is up to the allocator to use this value or
not.
A follow up patch will implement that asynchronous allocator for CUDA
Fortran.
Commit: 00d8ea3a4c8eba9aa0f14c352192e94cc40f8e2d
https://github.com/llvm/llvm-project/commit/00d8ea3a4c8eba9aa0f14c352192e94cc40f8e2d
Author: hev <wangrui at loongson.cn>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/fp16-promote.ll
Log Message:
-----------
[LoongArch] Supports FP_TO_SINT operation for fp16 (#118303)
Fixes #118301
Commit: 740ac4f0ffbab304e3f74ce8d1d0505479d0f800
https://github.com/llvm/llvm-project/commit/740ac4f0ffbab304e3f74ce8d1d0505479d0f800
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/test/tools/yaml2obj/ELF/note-section.yaml
Log Message:
-----------
Reland "[ObjectYAML][ELF] Take alignment into account when generating notes" (#118434)
This relands #118157 with a fix for the use of an uninitialized
variable and additional tests.
The System V ABI
(https://www.sco.com/developers/gabi/latest/ch5.pheader.html#note_section)
states that the note entries and their descriptor fields must be aligned
to 4 or 8 bytes for 32-bit or 64-bit objects respectively. In practice,
64-bit systems can use both alignments, with the actual format being
determined by the alignment of the segment. For example, the Linux
gABI extension (https://github.com/hjl-tools/linux-abi/wiki/linux-abi-draft.pdf)
contains a special note on this, see 2.1.7 "Alignment of Note Sections".
This patch adjusts the format of the generated notes to the specified
section alignment. Since `llvm-readobj` was fixed in a similar way in
https://reviews.llvm.org/D150022, "[Object] Fix handling of Elf_Nhdr
with sh_addralign=8", the generated notes can now be parsed
successfully by the tool.
Commit: f98c9a9b3665c75a6bf01577734f16185710009d
https://github.com/llvm/llvm-project/commit/f98c9a9b3665c75a6bf01577734f16185710009d
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
Log Message:
-----------
[mutation analyzer][NFC] combine `ConditionalOperator` `BinaryConditionalOperator` (#118602)
Commit: 7b8cf147addf7d3fb4630475c40153226f5fdbd0
https://github.com/llvm/llvm-project/commit/7b8cf147addf7d3fb4630475c40153226f5fdbd0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Update YAML traits for writer purposes (#118720)
For Frames, we prefer the inline notation for the brevity.
For PortableMemInfoBlock, we go through all member fields and print
out those that are populated.
Commit: 7f72d71de7c3b7d36d9f463b1459a6d2f6c989e6
https://github.com/llvm/llvm-project/commit/7f72d71de7c3b7d36d9f463b1459a6d2f6c989e6
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-reduction-cleanup.mlir
Log Message:
-----------
[OpenMP][OMPIRBuilder] Refactor reduction initialization logic into one util (#118447)
This refactors the logic needed to emit init logic for reductions by
moving some duplicated code into a shared util. The logic for doing is
quite involved and is needed for any construct that has reductions.
Moreover, when a construct has both private and reduction clauses, both
sets of clauses need to cooperate with each other when emitting the
logic needed for allocation and initialization. Therefore, this PR
clearly sets the boundaries for the logic needed to initialize
reductions.
Commit: 50f8580e2cded758627b8d9478b56d5443aa6d7c
https://github.com/llvm/llvm-project/commit/50f8580e2cded758627b8d9478b56d5443aa6d7c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Add IndexedMemProfData::addFrame (#118724)
This patch adds a helper function to replace an idiom like:
FrameId Id = F.hash();
MemProfData.Frames.try_emplace(Id, F);
// Do something with Id.
Commit: 0993335134dd893bcad31f7a4a24b00b7c11476a
https://github.com/llvm/llvm-project/commit/0993335134dd893bcad31f7a4a24b00b7c11476a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-todo.mlir
A mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir
Log Message:
-----------
[OpenMP][OMPIRBuilder] Add delayed privatization support for `wsloop` (#118463)
Extend MLIR to LLVM lowering by adding support for `omp.wsloop` for
delayed privatization. This also refactors a few bit of code to isolate
the logic needed for `firstprivate` initialization in a shared util that
can be used across constructs that need it. The same is done for
`dealloc`
regions.
Parent PR: https://github.com/llvm/llvm-project/pull/118447. Only latest
commit is relevant for this PR.
Commit: 44be794658f9cd477ffd718b0322d1970c534274
https://github.com/llvm/llvm-project/commit/44be794658f9cd477ffd718b0322d1970c534274
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
A clang/test/AST/ByteCode/amdgpu-nullptr.cl
Log Message:
-----------
[clang][bytecode] Not all null pointers are 0 (#118601)
Get the Value from the ASTContext instead.
Commit: a996a15b4c5287892f79c0ae029ea9319c8e44a5
https://github.com/llvm/llvm-project/commit/a996a15b4c5287892f79c0ae029ea9319c8e44a5
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/cmake/caches/CrossWinToARMLinux.cmake
Log Message:
-----------
[CMake] Allow parametrizing of the static libraries in Cross ARM CMake cache. NFC. (#118737)
In order to support the cross-arm remote tests for LLDB project
(see 'lldb-remote-linux-*' public builders for details).
Commit: dba0861cd7aa2717b0f36c76d77c097765f6ad57
https://github.com/llvm/llvm-project/commit/dba0861cd7aa2717b0f36c76d77c097765f6ad57
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRInstrFormats.td
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.h
M llvm/test/CodeGen/AVR/inline-asm/loadstore.ll
Log Message:
-----------
[AVR] Simplify eocoding of load/store instructions (#118279)
Fixes https://github.com/llvm/llvm-project/issues/113774
Commit: 3e0e1c13ce96dfe291ffaf9edc9876cdd5016a0d
https://github.com/llvm/llvm-project/commit/3e0e1c13ce96dfe291ffaf9edc9876cdd5016a0d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/fp128.ll
Log Message:
-----------
[RISCV][GISel] Support fp128 arithmetic and conversion for RV64. (#118707)
We can support these via libcalls in libgcc/compiler-rt or integer
operations for fneg/fabs/fcopysign. fp128 values will be passed in two
64-bit GPRs according to the psABI.
Supporting RV32 requires sret which is not supported by libcall handling
in LegalizerHelper.cpp yet. It doesn't call canLowerReturn.
Commit: abc27039be63ce31afe42fc10510921b559db4fe
https://github.com/llvm/llvm-project/commit/abc27039be63ce31afe42fc10510921b559db4fe
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Pass __builtin_memcpy size along (#118649)
To DoBitCastPtr, so we know how many bytes we want to read.
Commit: 0629e9e352fa8a2204e6165c61ce617f7096778e
https://github.com/llvm/llvm-project/commit/0629e9e352fa8a2204e6165c61ce617f7096778e
Author: Renat Idrisov <4032256+parsifal-47 at users.noreply.github.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[MLIR] Removing dead values for branches (#117501)
Fixing RemoveDeadValues to properly remove arguments from
BranchOpInterface operations.
This is a follow-up for:
https://github.com/llvm/llvm-project/pull/117405
cc: @joker-eph @codemzs
---------
Co-authored-by: Renat Idrisov <parsifal-47 at users.noreply.github.com>
Commit: 71ac1eb50955fdcddfb77f2daa9a213839ff1a3e
https://github.com/llvm/llvm-project/commit/71ac1eb50955fdcddfb77f2daa9a213839ff1a3e
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
M llvm/test/CodeGen/AArch64/extract-vector-elt.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
Log Message:
-----------
Revert "[GlobalISel] Combine [s,z]ext of undef into 0" (#118746)
Reverts llvm/llvm-project#117439
Commit: f7560ee97b7441eb3f5b2d0744aad857fafa5855
https://github.com/llvm/llvm-project/commit/f7560ee97b7441eb3f5b2d0744aad857fafa5855
Author: Iuri Chaer <ichaer at splunk.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/lib/Format/CMakeLists.txt
Log Message:
-----------
[clang-format] Add cmake target clang-format-style-options for updating ClangFormatStyleOptions.rst (#111513)
* Create a new `clang-format-style-options` build target which
re-generates ClangFormatStyleOptions.rst from its source header files.
As discussed in
https://github.com/llvm/llvm-project/pull/96804#discussion_r1718407404
---------
Co-authored-by: Owen Pan <owenpiano at gmail.com>
Commit: 6bec1806c9cc90f6e72fc04698f4221c86c5f95e
https://github.com/llvm/llvm-project/commit/6bec1806c9cc90f6e72fc04698f4221c86c5f95e
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/lib/Format/CMakeLists.txt
Log Message:
-----------
[clang-format] Add plurals.txt to DEPENDS of style_options_depends
Commit: a9a4a83b6132f076fd14ac31268deaa4bf1381d5
https://github.com/llvm/llvm-project/commit/a9a4a83b6132f076fd14ac31268deaa4bf1381d5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M clang/docs/tools/dump_format_style.py
A clang/test/Format/docs_updated.test
M clang/test/Format/lit.local.cfg
Log Message:
-----------
[clang-format] Add test to ensure formatting options docs are updated (#118154)
This patch adds a lit test to clang format to ensure that the
ClangFormatStyleOptions doc page has been updated appropriately. The
test just runs the automatic update script and diffs the outputs to
ensure they are the same.
Commit: 636beb6a2833ee0290935f679252c1b662721b31
https://github.com/llvm/llvm-project/commit/636beb6a2833ee0290935f679252c1b662721b31
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M lld/ELF/Arch/X86_64.cpp
M lld/test/ELF/invalid/broken-relaxation-x64.test
M lld/test/ELF/pack-dyn-relocs-tls-x86-64.s
M lld/test/ELF/tls-opt.s
A lld/test/ELF/x86-64-tls-ie-err.s
M lld/test/ELF/x86-64-tls-ie-local.s
Log Message:
-----------
[X86][LLD] Handle R_X86_64_CODE_6_GOTTPOFF relocation type (#117675)
For
add %reg1, name at GOTTPOFF(%rip), %reg2
add name at GOTTPOFF(%rip), %reg1, %reg2
{nf} add %reg1, name at GOTTPOFF(%rip), %reg2
{nf} add name at GOTTPOFF(%rip), %reg1, %reg2
{nf} add name at GOTTPOFF(%rip), %reg
add
R_X86_64_CODE_6_GOTTPOFF = 50
in #117277.
Linker can treat R_X86_64_CODE_6_GOTTPOFF as R_X86_64_GOTTPOFF or
convert the instructions above to
add $name at tpoff, %reg1, %reg2
add $name at tpoff, %reg1, %reg2
{nf} add $name at tpoff, %reg1, %reg2
{nf} add $name at tpoff, %reg1, %reg2
{nf} add $name at tpoff, %reg
if the first byte of the instruction at the relocation offset - 6 is
0x62 (namely, encoded w/EVEX prefix) when possible.
Binutils patch: bminor/binutils-gdb at 5bc71c2
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2024-February/132351.html
ABI discussion:
https://groups.google.com/g/x86-64-abi/c/FhEZjCtDLFw/m/VHDjN4orAgAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: fd3907ccb583df99e9c19d2fe84e4e7c52d75de9
https://github.com/llvm/llvm-project/commit/fd3907ccb583df99e9c19d2fe84e4e7c52d75de9
Author: Callum Fare <callum at codeplay.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
A offload/liboffload/API/APIDefs.td
A offload/liboffload/API/CMakeLists.txt
A offload/liboffload/API/Common.td
A offload/liboffload/API/Device.td
A offload/liboffload/API/OffloadAPI.td
A offload/liboffload/API/Platform.td
A offload/liboffload/API/README.md
A offload/liboffload/CMakeLists.txt
A offload/liboffload/README.md
A offload/liboffload/exports
A offload/liboffload/include/OffloadImpl.hpp
A offload/liboffload/include/generated/OffloadAPI.h
A offload/liboffload/include/generated/OffloadEntryPoints.inc
A offload/liboffload/include/generated/OffloadFuncs.inc
A offload/liboffload/include/generated/OffloadImplFuncDecls.inc
A offload/liboffload/include/generated/OffloadPrint.hpp
A offload/liboffload/src/Helpers.hpp
A offload/liboffload/src/OffloadImpl.cpp
A offload/liboffload/src/OffloadLib.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/tools/offload-tblgen/default_returns.td
A offload/test/tools/offload-tblgen/entry_points.td
A offload/test/tools/offload-tblgen/functions_basic.td
A offload/test/tools/offload-tblgen/functions_code_loc.td
A offload/test/tools/offload-tblgen/functions_ranged_param.td
A offload/test/tools/offload-tblgen/print_enum.td
A offload/test/tools/offload-tblgen/print_function.td
A offload/test/tools/offload-tblgen/type_tagged_enum.td
A offload/tools/offload-tblgen/APIGen.cpp
A offload/tools/offload-tblgen/CMakeLists.txt
A offload/tools/offload-tblgen/EntryPointGen.cpp
A offload/tools/offload-tblgen/FuncsGen.cpp
A offload/tools/offload-tblgen/GenCommon.hpp
A offload/tools/offload-tblgen/Generators.hpp
A offload/tools/offload-tblgen/PrintGen.cpp
A offload/tools/offload-tblgen/RecordTypes.hpp
A offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
A offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/common/Environment.cpp
A offload/unittests/OffloadAPI/common/Environment.hpp
A offload/unittests/OffloadAPI/common/Fixtures.hpp
A offload/unittests/OffloadAPI/device/olDeviceInfo.hpp
A offload/unittests/OffloadAPI/device/olGetDevice.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
Log Message:
-----------
Reland #118503: [Offload] Introduce offload-tblgen and initial new API implementation (#118614)
Reland #118503. Added a fix for builds with `-DBUILD_SHARED_LIBS=ON`
(see last commit). Otherwise the changes are identical.
---
### New API
Previous discussions at the LLVM/Offload meeting have brought up the
need for a new API for exposing the functionality of the plugins. This
change introduces a very small subset of a new API, which is primarily
for testing the offload tooling and demonstrating how a new API can fit
into the existing code base without being too disruptive. Exact designs
for these entry points and future additions can be worked out over time.
The new API does however introduce the bare minimum functionality to
implement device discovery for Unified Runtime and SYCL. This means that
the `urinfo` and `sycl-ls` tools can be used on top of Offload. A
(rough) implementation of a Unified Runtime adapter (aka plugin) for
Offload is available
[here](https://github.com/callumfare/unified-runtime/tree/offload_adapter).
Our intention is to maintain this and use it to implement and test
Offload API changes with SYCL.
### Demoing the new API
```sh
# From the runtime build directory
$ ninja LibomptUnitTests
$ OFFLOAD_TRACE=1 ./offload/unittests/OffloadAPI/offload.unittests
```
### Open questions and future work
* Only some of the available device info is exposed, and not all the
possible device queries needed for SYCL are implemented by the plugins.
A sensible next step would be to refactor and extend the existing device
info queries in the plugins. The existing info queries are all strings,
but the new API introduces the ability to return any arbitrary type.
* It may be sensible at some point for the plugins to implement the new
API directly, and the higher level code on top of it could be made
generic, but this is more of a long-term possibility.
Commit: 41cde465acfddb44d400b0a53bb57960762312a2
https://github.com/llvm/llvm-project/commit/41cde465acfddb44d400b0a53bb57960762312a2
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/PointerAuthOptions.h
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/CodeGen/ptrauth-function-attributes.c
M clang/test/Driver/aarch64-ptrauth.c
Log Message:
-----------
[PAC][Driver] Add `-faarch64-jump-table-hardening` flag (#113149)
The flag is placed together with pointer authentication flags since they
serve the same security purpose of protecting against attacks on control
flow. The flag is not ABI-affecting and might be enabled separately if
needed, but it's also intended to be enabled as part of pauth-enabled
environments (e.g. pauthtest).
See also codegen implementation #97666.
Commit: a9eb8f0e3dbaf16b6bd83eecb960b6ea8ecaa8c3
https://github.com/llvm/llvm-project/commit/a9eb8f0e3dbaf16b6bd83eecb960b6ea8ecaa8c3
Author: Benjamin Maxwell <macdue at dueutil.tech>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
Log Message:
-----------
[mlir][ArmSME] Fix crash on empty vector.mask in arm-sme-vector-legalization (#118613)
Fixes #118449
Commit: 3a8ada67ff45aec5696d72212d516593c3d32893
https://github.com/llvm/llvm-project/commit/3a8ada67ff45aec5696d72212d516593c3d32893
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang][NFC] Fix miscellaneous typos in release notes
Commit: 5d38a3406b11c70e6f0d1a880b78ed404aba2c36
https://github.com/llvm/llvm-project/commit/5d38a3406b11c70e6f0d1a880b78ed404aba2c36
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/XRefs.cpp
Log Message:
-----------
[clangd] Consolidate two functions converting index to LSP locations (#117885)
Commit: 61fe67a4017375fd675f75652e857e837f77fa51
https://github.com/llvm/llvm-project/commit/61fe67a4017375fd675f75652e857e837f77fa51
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdLSPServer.h
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/ClangdServer.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/XRefs.h
M clang-tools-extra/clangd/benchmarks/IndexBenchmark.cpp
M clang-tools-extra/clangd/index/Background.cpp
M clang-tools-extra/clangd/index/Background.h
M clang-tools-extra/clangd/index/FileIndex.cpp
M clang-tools-extra/clangd/index/FileIndex.h
M clang-tools-extra/clangd/index/Index.cpp
M clang-tools-extra/clangd/index/Index.h
M clang-tools-extra/clangd/index/MemIndex.cpp
M clang-tools-extra/clangd/index/MemIndex.h
M clang-tools-extra/clangd/index/Merge.cpp
M clang-tools-extra/clangd/index/Merge.h
M clang-tools-extra/clangd/index/ProjectAware.cpp
M clang-tools-extra/clangd/index/Ref.h
M clang-tools-extra/clangd/index/Serialization.cpp
M clang-tools-extra/clangd/index/Serialization.h
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/index/dex/Dex.cpp
M clang-tools-extra/clangd/index/dex/Dex.h
M clang-tools-extra/clangd/index/dex/dexp/Dexp.cpp
M clang-tools-extra/clangd/index/remote/Client.cpp
M clang-tools-extra/clangd/index/remote/Index.proto
M clang-tools-extra/clangd/index/remote/Service.proto
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.h
M clang-tools-extra/clangd/index/remote/server/Server.cpp
M clang-tools-extra/clangd/test/index-serialization/Inputs/sample.idx
M clang-tools-extra/clangd/test/type-hierarchy-ext.test
M clang-tools-extra/clangd/test/type-hierarchy.test
M clang-tools-extra/clangd/tool/Check.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/BackgroundIndexTests.cpp
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/clangd/unittests/DexTests.cpp
M clang-tools-extra/clangd/unittests/FileIndexTests.cpp
M clang-tools-extra/clangd/unittests/IndexTests.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
M clang-tools-extra/clangd/unittests/TestTU.cpp
M clang-tools-extra/clangd/unittests/TestWorkspace.cpp
Log Message:
-----------
[clangd] support outgoing calls in call hierarchy (#117673)
This reverts commit ce0f11325e0c62c5b81391589e9b93b412a85bc1.
Commit: c7ef0ac9fd28cb55b8c7c91a890b365cc688f9a9
https://github.com/llvm/llvm-project/commit/c7ef0ac9fd28cb55b8c7c91a890b365cc688f9a9
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/index/remote/Index.proto
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
Log Message:
-----------
[clangd] Drop required attributes from ContainedRef protos
Per https://protobuf.dev/programming-guides/dos-donts/#add-required this
is discouraged and we already handle errors when marshalling protos.
This also ensures new message types are consistent with the rest in the
file.
Commit: a2acb2ff8b5307bb6b973820c4ededf1ddc49bb2
https://github.com/llvm/llvm-project/commit/a2acb2ff8b5307bb6b973820c4ededf1ddc49bb2
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorize-tensor-extract-masked.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
Log Message:
-----------
[mlir][linalg] Fix vectorization of tensor.extract (#118105)
The example below demonstrates a "scalar read followed by a broadcast"
pattern for `tensor.extract`:
```mlir
#map = affine_map<(d0, d1, d2) -> (d0, d1, d2)>
func.func @scalar_broadcast(
%init : tensor<1x1x3xi32>,
%src: tensor<1x3x2x4xi32>,
%idx :index) -> tensor<1x1x3xi32> {
%c0 = arith.constant 0 :index
%res = linalg.generic {
indexing_maps = [#map],
iterator_types = ["parallel", "parallel", "parallel"]}
outs(%init : tensor<1x1x3xi32>) {
^bb0(%out: i32):
%val = tensor.extract %src[%idx, %idx, %idx, %idx] : tensor<1x3x2x4xi32>
linalg.yield %val : i32
} -> tensor<1x1x3xi32>
return %res : tensor<1x1x3xi32>
}
```
The default masking path within the Linalg vectorizer, which assumes an
identity masking map, is not suitable here. Indeed:
* identity != broadcast.
This patch ensures masking is handled in the `vectorizeTensorExtract`
hook, which has the necessary context for proper handling.
Fixes #116197
Commit: 2e51e150e161bd5fb5b8adb8655744a672ced002
https://github.com/llvm/llvm-project/commit/2e51e150e161bd5fb5b8adb8655744a672ced002
Author: Yuanqiang Liu <liuyuanqiang.yqliu at bytedance.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M mlir/include/mlir-c/Pass.h
M mlir/lib/Bindings/Python/Pass.cpp
M mlir/lib/CAPI/IR/Pass.cpp
M mlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
M mlir/test/python/pass_manager.py
Log Message:
-----------
[MLIR][Python] enhance python ir printing with pringing flags (#117836)
Close https://github.com/llvm/llvm-project/pull/65854
Commit: 6caf9f82365a4b377c8ed22e737be14170f2ec9f
https://github.com/llvm/llvm-project/commit/6caf9f82365a4b377c8ed22e737be14170f2ec9f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-fabs.ll
M llvm/test/CodeGen/X86/combine-fneg.ll
M llvm/test/CodeGen/X86/fsxor-alignment.ll
Log Message:
-----------
[X86] combineStore - fold scalar float store(fabs/fneg(load())) -> store(and/xor(load(),c)) (#118680)
As noted on #117557 - its not worth performing scalar float fabs/fneg on the fpu if we're not doing any other fp ops.
This is currently limited to store + load pairs - I could try to extend this further if necessary, but we need to be careful that we don't end up in an infinite loop with the DAGCombiner foldBitcastedFPLogic combine.
Fixes #117557
Commit: 15de77db91c199f9431e81d0b85bb6984d1c5296
https://github.com/llvm/llvm-project/commit/15de77db91c199f9431e81d0b85bb6984d1c5296
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
Log Message:
-----------
[lldb] (Prepare to) speed up dwarf indexing (#118657)
Indexing a single DWARF unit is a fairly small task, which means the
overhead of enqueueing a task for each unit is not negligible (mainly
because introduces a lot of synchronization points for queue management,
memory allocation etc.). This is particularly true if the binary was
built with type units, as these are usually very small.
This essentially brings us back to the state before
https://reviews.llvm.org/D78337, but the new implementation is built on
the llvm ThreadPool, and I've added a small improvement -- we now
construct one "index set" per thread instead of one per unit, which
should lower the memory usage (fewer small allocations) and make the
subsequent merge step faster.
On its own this patch doesn't actually change the performance
characteristics because we still have one choke point -- progress
reporting. I'm leaving that for a separate patch, but I've tried that
simply removing the progress reporting gives us about a 30-60% speed
boost.
Commit: 487a070bebdc1252b83e45f8990704b31c6264f1
https://github.com/llvm/llvm-project/commit/487a070bebdc1252b83e45f8990704b31c6264f1
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem-div32.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for sign-extension removal with div32 enabled
Commit: 0772a0bd29afa33520abf1c5a8bae09a718954b2
https://github.com/llvm/llvm-project/commit/0772a0bd29afa33520abf1c5a8bae09a718954b2
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
Revert "[memprof] Update YAML traits for writer purposes (#118720)"
This reverts commit 7b8cf147addf7d3fb4630475c40153226f5fdbd0.
Breaks building on macOS
https://lab.llvm.org/buildbot/#/builders/190/builds/10737
https://lab.llvm.org/buildbot/#/builders/23/builds/5491
https://green.lab.llvm.org/job/llvm.org/job/clang-stage1-cmake-RA-incremental/6076/
Commit: 65ced158e912d2ddda75897914802056e78acf74
https://github.com/llvm/llvm-project/commit/65ced158e912d2ddda75897914802056e78acf74
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/docs/ReleaseNotes.rst
M llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV.def
Log Message:
-----------
[RISCV] Remove R_RISCV_RVC_LUI Relocation (#118714)
This was removed from the ABI in riscv-non-isa/riscv-elf-psabi-doc#398.
It is not emitted by LLVM, and seems to have been an internal
implementation detail in binutils.
This is a follow-up to 26ec5da744b8 which removed previous binutils
internal relocations when they were removed from the ABI.
The LLD implementation was not tested when it was added in
https://reviews.llvm.org/D39322
Commit: 17dfdd3a86e0759ce67e54ca53f6174769ed7285
https://github.com/llvm/llvm-project/commit/17dfdd3a86e0759ce67e54ca53f6174769ed7285
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
Log Message:
-----------
[clang][bytecode][tests] Specify triple in bitfields tests
This still breaks on 32bit hosts otherwise.
See https://github.com/llvm/llvm-project/pull/116843
Commit: 0cda970ecc8a885acf7298a61370a1368b0ea39b
https://github.com/llvm/llvm-project/commit/0cda970ecc8a885acf7298a61370a1368b0ea39b
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
A flang/include/flang/Common/Fortran-consts.h
M flang/include/flang/Common/Fortran.h
M flang/include/flang/Common/format.h
A flang/include/flang/Common/target-rounding.h
M flang/include/flang/Evaluate/common.h
M flang/include/flang/Evaluate/target.h
M flang/include/flang/Runtime/cpp-type.h
M flang/include/flang/Runtime/type-code.h
M flang/runtime/format.h
M flang/runtime/non-tbp-dio.h
M flang/runtime/type-info.h
M flang/unittests/Evaluate/fp-testing.cpp
M flang/unittests/Evaluate/fp-testing.h
M flang/unittests/Runtime/Complex.cpp
Log Message:
-----------
[Flang][NFC] Split common headers to reduce dependencies. (#110244)
Fortran.h and target.h are defining symbols where some are used by both, the Fortran runtime (Flang-RT) and Fortran compiler (Flang), and others are used by Flang only. With the upcoming refactoring of the Fortran runtime into its own subproject (#110217), move the declarations that are used by both into new headers to minimize the amount of code that will need to be shared by Flang-RT and Flang.
Details:
* `Fortran.h`: Flang-RT only uses some enum definitions out of this file, but not `AsFortran` which is defined in `Fortran.cpp`. Moving the enums into `Fortran-consts.h` allows keeping `Fortran.cpp` within Flang.
* `target.h`: Contains some floating-point definitions that is used by the non-GTest unittests in `fp-testing.h`. Flang-RT also uses some non-GTest as well. Moving those definitions avoids the dependence on the entire FortranEvaluate library.
Commit: 722a5684326207d11bffb85ce422c8831d09c611
https://github.com/llvm/llvm-project/commit/722a5684326207d11bffb85ce422c8831d09c611
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/test/CodeGen/X86/combine-fabs.ll
M llvm/test/CodeGen/X86/combine-fneg.ll
Log Message:
-----------
[X86] Add test coverage for f16/bf16 fabs/fneg load-store tests
Future extension to #118680
Commit: ed9915ffdf4cfe58b939111d12819d1ef19a075c
https://github.com/llvm/llvm-project/commit/ed9915ffdf4cfe58b939111d12819d1ef19a075c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/test/CodeGen/X86/fp16-libcalls.ll
Log Message:
-----------
[X86] fp16-libcalls.ll - regenerate test checks with vpternlog comments
Commit: dd7a3d4d798e30dfe53b5bbbbcd9a23c24ea1af9
https://github.com/llvm/llvm-project/commit/dd7a3d4d798e30dfe53b5bbbbcd9a23c24ea1af9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-fabs.ll
M llvm/test/CodeGen/X86/combine-fneg.ll
M llvm/test/CodeGen/X86/fp16-libcalls.ll
Log Message:
-----------
[X86] Extend #118680 - support f16/bf16 fabs/fneg load-store patterns
Commit: 3740fac0d4640c05ba960be97d14cbd375a7c733
https://github.com/llvm/llvm-project/commit/3740fac0d4640c05ba960be97d14cbd375a7c733
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang/lib/Format/CMakeLists.txt
Log Message:
-----------
Revert "[clang-format] Add cmake target clang-format-style-options for updating ClangFormatStyleOptions.rst (#111513)"
Breaks the build when docs are not enabled.
This reverts commit f7560ee97b7441eb3f5b2d0744aad857fafa5855.
This reverts commit 6bec1806c9cc90f6e72fc04698f4221c86c5f95e.
Commit: 59720dc703f7f207d013b065d0ed7d3af7168bcc
https://github.com/llvm/llvm-project/commit/59720dc703f7f207d013b065d0ed7d3af7168bcc
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-mul.ll
Log Message:
-----------
[InstCombine] Fold `icmp spred (X *nsw Z), (Y *nsw Z) -> icmp pred Z, 0` if `scmp(X, Y)` is known (#118726)
```
icmp spred (X *nsw Z), (Y *nsw Z) -> icmp swap(spred) Z, 0 if X s< Y
icmp spred (X *nsw Z), (Y *nsw Z) -> icmp spred Z, 0 if X s> Y
```
Alive2: https://alive2.llvm.org/ce/z/F2D0GE
Commit: 71bbafba31699bdabe289654d157ae961432e52a
https://github.com/llvm/llvm-project/commit/71bbafba31699bdabe289654d157ae961432e52a
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M lld/COFF/COFFLinkerContext.h
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Writer.cpp
A lld/test/COFF/arm64x-loadconfig.s
Log Message:
-----------
[LLD][COFF] Add basic ARM64X dynamic relocations support (#118035)
This modifies the machine field in the hybrid view to be AMD64, aligning
it with expectations from ARM64EC modules. While this provides initial
support, additional relocations will be necessary for full
functionality. Many of these cases depend on implementing separate
namespace support first.
Move clearing of the .reloc section from addBaserels to assignAddresses
to ensure it is always cleared, regardless of the relocatable
configuration. This change also clarifies the reasoning for adding the
dynamic relocations chunk in that location.
Commit: b6217f67a422d2c0e24bcfa80cf663b610a0cfc4
https://github.com/llvm/llvm-project/commit/b6217f67a422d2c0e24bcfa80cf663b610a0cfc4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix bitcasting from null pointers (#116999)
Commit: db9057edca0fe14987fb892f52bc51441316892c
https://github.com/llvm/llvm-project/commit/db9057edca0fe14987fb892f52bc51441316892c
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[Sched] Skip MemOp with unknown size when clustering (#118443)
In #83875, we changed the type of `Width` to `LocationSize`. To get
the clsuter bytes, we use `LocationSize::getValue()` to calculate
the value.
But when `Width` is an unknown size `LocationSize`, an assertion
"Getting value from an unknown LocationSize!" will be triggered.
This patch simply skips MemOp with unknown size to fix this issue
and keep the logic the same as before.
This issue was found when implementing software pipeliner for
RISC-V in #117546. The pipeliner may clone some memory operations
with `BeforeOrAfterPointer` size.
Commit: 44433147d62ef0b918c8925874a407ecec15193f
https://github.com/llvm/llvm-project/commit/44433147d62ef0b918c8925874a407ecec15193f
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/index/MemIndex.h
M clang-tools-extra/clangd/index/dex/Dex.h
Log Message:
-----------
[NFC] Fix uninitialized scalar field in constructor. (#118324)
Non-static class field is not initialized in constructor.
Commit: da6099c9adadffb58e0edca253b1f29db77627f6
https://github.com/llvm/llvm-project/commit/da6099c9adadffb58e0edca253b1f29db77627f6
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M flang/test/Semantics/test_symbols.py
Log Message:
-----------
[flang][test] Recognize !$acc and !$omp spelled with capital letters (#118666)
If there are any continuation lines in the source, they will be printed
by the unparser with capital letters (at least in case of OpenMP). To
avoid having them stripped out, recognize their spellings using capital
letters as well.
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: cd2f1d87f7fd1d619c5f97ef4ce70d4fe385a3c1
https://github.com/llvm/llvm-project/commit/cd2f1d87f7fd1d619c5f97ef4ce70d4fe385a3c1
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-12-05 (Thu, 05 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/benchmarks/IndexBenchmark.cpp
M clang-tools-extra/clangd/index/MemIndex.h
M clang-tools-extra/clangd/index/dex/Dex.h
M clang-tools-extra/clangd/index/remote/Index.proto
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
M clang/cmake/caches/CrossWinToARMLinux.cmake
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Fuchsia.cmake
M clang/docs/ReleaseNotes.rst
M clang/docs/tools/dump_format_style.py
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsARM.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/PointerAuthOptions.h
M clang/include/clang/Driver/Options.td
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/intrin0.h
A clang/test/AST/ByteCode/amdgpu-nullptr.cl
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGen/ptrauth-function-attributes.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/tbaa-reference.cpp
M clang/test/CodeGenCXX/template-instantiation.cpp
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/Driver/aarch64-ptrauth.c
M clang/test/Driver/fuchsia.c
M clang/test/Driver/linux-ld.c
A clang/test/Format/docs_updated.test
M clang/test/Format/lit.local.cfg
M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
M clang/unittests/CodeGen/TBAAMetadataTest.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
A compiler-rt/test/rtsan/fork_exec.cpp
A flang/include/flang/Common/Fortran-consts.h
M flang/include/flang/Common/Fortran.h
M flang/include/flang/Common/format.h
A flang/include/flang/Common/target-rounding.h
M flang/include/flang/Evaluate/common.h
M flang/include/flang/Evaluate/target.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Exceptions.h
M flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/allocatable.h
M flang/include/flang/Runtime/allocator-registry.h
M flang/include/flang/Runtime/cpp-type.h
M flang/include/flang/Runtime/descriptor.h
M flang/include/flang/Runtime/exceptions.h
M flang/include/flang/Runtime/type-code.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/target.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/allocatable.cpp
M flang/runtime/CUDA/allocator.cpp
M flang/runtime/CUDA/descriptor.cpp
M flang/runtime/allocatable.cpp
M flang/runtime/array-constructor.cpp
M flang/runtime/descriptor.cpp
M flang/runtime/exceptions.cpp
M flang/runtime/format.h
M flang/runtime/non-tbp-dio.h
M flang/runtime/type-info.h
M flang/test/Evaluate/fold-ieee.f90
M flang/test/Evaluate/folding18.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
A flang/test/Fir/CUDA/cuda-global-addr.mlir
M flang/test/HLFIR/elemental-codegen.fir
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/allocatable-runtime.f90
M flang/test/Lower/allocate-mold.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Semantics/test_symbols.py
M flang/unittests/Evaluate/fp-testing.cpp
M flang/unittests/Evaluate/fp-testing.h
M flang/unittests/Runtime/CUDA/Allocatable.cpp
M flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/unittests/Runtime/CUDA/Memory.cpp
M flang/unittests/Runtime/Complex.cpp
A libc/config/windows/headers.txt
M libc/docs/fenv.rst
M libc/docs/setjmp.rst
M libc/docs/signal.rst
M libc/docs/stdbit.rst
M libc/docs/threads.rst
M libc/src/__support/macros/optimization.h
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/inv_trigf_utils.h
M libc/utils/docgen/docgen.py
M libc/utils/docgen/setjmp.json
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
M lld/COFF/COFFLinkerContext.h
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Writer.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
A lld/test/COFF/arm64x-loadconfig.s
M lld/test/ELF/invalid/broken-relaxation-x64.test
M lld/test/ELF/pack-dyn-relocs-ifunc.s
M lld/test/ELF/pack-dyn-relocs-tls-x86-64.s
M lld/test/ELF/tls-opt.s
A lld/test/ELF/x86-64-tls-ie-err.s
M lld/test/ELF/x86-64-tls-ie-local.s
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
A lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M llvm/cmake/modules/CrossCompile.cmake
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV.def
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/MC/MCRegisterInfo.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AVR/AVRInstrFormats.td
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
M llvm/test/CodeGen/AArch64/arm64-addrmode.ll
M llvm/test/CodeGen/AArch64/dag-combine-concat-vectors.ll
R llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/extract-vector-elt.ll
M llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AVR/inline-asm/loadstore.ll
M llvm/test/CodeGen/LoongArch/fp16-promote.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem-div32.ll
A llvm/test/CodeGen/RISCV/GlobalISel/fp128.ll
M llvm/test/CodeGen/RISCV/double-zfa.ll
M llvm/test/CodeGen/RISCV/float-zfa.ll
M llvm/test/CodeGen/RISCV/half-zfa.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/X86/combine-fabs.ll
M llvm/test/CodeGen/X86/combine-fneg.ll
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/fsxor-alignment.ll
M llvm/test/CodeGen/X86/vselect.ll
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
A llvm/test/MC/WebAssembly/init-array.s
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/icmp-mul.ll
M llvm/test/tools/yaml2obj/ELF/note-section.yaml
M llvm/unittests/ProfileData/MemProfTest.cpp
M mlir/include/mlir-c/Pass.h
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/VectorTypes.h
M mlir/lib/Bindings/Python/Pass.cpp
M mlir/lib/CAPI/IR/Pass.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract-masked.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
A mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-reduction-cleanup.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/python/pass_manager.py
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
A offload/liboffload/API/APIDefs.td
A offload/liboffload/API/CMakeLists.txt
A offload/liboffload/API/Common.td
A offload/liboffload/API/Device.td
A offload/liboffload/API/OffloadAPI.td
A offload/liboffload/API/Platform.td
A offload/liboffload/API/README.md
A offload/liboffload/CMakeLists.txt
A offload/liboffload/README.md
A offload/liboffload/exports
A offload/liboffload/include/OffloadImpl.hpp
A offload/liboffload/include/generated/OffloadAPI.h
A offload/liboffload/include/generated/OffloadEntryPoints.inc
A offload/liboffload/include/generated/OffloadFuncs.inc
A offload/liboffload/include/generated/OffloadImplFuncDecls.inc
A offload/liboffload/include/generated/OffloadPrint.hpp
A offload/liboffload/src/Helpers.hpp
A offload/liboffload/src/OffloadImpl.cpp
A offload/liboffload/src/OffloadLib.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/tools/offload-tblgen/default_returns.td
A offload/test/tools/offload-tblgen/entry_points.td
A offload/test/tools/offload-tblgen/functions_basic.td
A offload/test/tools/offload-tblgen/functions_code_loc.td
A offload/test/tools/offload-tblgen/functions_ranged_param.td
A offload/test/tools/offload-tblgen/print_enum.td
A offload/test/tools/offload-tblgen/print_function.td
A offload/test/tools/offload-tblgen/type_tagged_enum.td
A offload/tools/offload-tblgen/APIGen.cpp
A offload/tools/offload-tblgen/CMakeLists.txt
A offload/tools/offload-tblgen/EntryPointGen.cpp
A offload/tools/offload-tblgen/FuncsGen.cpp
A offload/tools/offload-tblgen/GenCommon.hpp
A offload/tools/offload-tblgen/Generators.hpp
A offload/tools/offload-tblgen/PrintGen.cpp
A offload/tools/offload-tblgen/RecordTypes.hpp
A offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
A offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/common/Environment.cpp
A offload/unittests/OffloadAPI/common/Environment.hpp
A offload/unittests/OffloadAPI/common/Fixtures.hpp
A offload/unittests/OffloadAPI/device/olDeviceInfo.hpp
A offload/unittests/OffloadAPI/device/olGetDevice.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
Log Message:
-----------
Merge branch 'main' into users/kparzysz/spr/r01-reduction-objects
Compare: https://github.com/llvm/llvm-project/compare/c65aeb820ade...cd2f1d87f7fd
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