[all-commits] [llvm/llvm-project] d057b5: [SPIR-V] Add SPV_INTEL_joint_matrix extension (#11...
Dmitry Sidorov via All-commits
all-commits at lists.llvm.org
Wed Dec 4 10:00:41 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: d057b53a7db43f33f4a9fd832115e613ebe0a67b
https://github.com/llvm/llvm-project/commit/d057b53a7db43f33f4a9fd832115e613ebe0a67b
Author: Dmitry Sidorov <dmitry.sidorov at intel.com>
Date: 2024-12-04 (Wed, 04 Dec 2024)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_bf16.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_checked.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_get_coord.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_packed.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_prefetch.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_tf32.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_cooperative_matrix/cooperative_matrix.ll
Log Message:
-----------
[SPIR-V] Add SPV_INTEL_joint_matrix extension (#118578)
The spec is available here:
https://github.com/intel/llvm/pull/12497
The PR doesn't add OpCooperativeMatrixApplyFunctionINTEL instruction as
it's still experimental and not properly tested E2E.
The PR also fixes few bugs in the related code:
1. CooperativeMatrixMulAddKHR optional operand must be literal, not a
constant;
2. Fixed available capabilities table creation for a case, when a single
extension adds few capabilities, that occupy not contiguous op codes.
---------
Signed-off-by: Sidorov, Dmitry <dmitry.sidorov at intel.com>
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