[all-commits] [llvm/llvm-project] e8b5c0: [mlir][spirv]: Add Broadcom Vendor (#116600)
Alexander Richardson via All-commits
all-commits at lists.llvm.org
Mon Dec 2 10:53:18 PST 2024
Branch: refs/heads/users/arichardson/spr/xtensa-default-to-unsigned-char
Home: https://github.com/llvm/llvm-project
Commit: e8b5c009b68715434bcd4942bab08ca4b0a5abbb
https://github.com/llvm/llvm-project/commit/e8b5c009b68715434bcd4942bab08ca4b0a5abbb
Author: Christopher McGirr <7071833+chrsmcgrr at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
Log Message:
-----------
[mlir][spirv]: Add Broadcom Vendor (#116600)
This PR is simply adding the Broadcom vendor ID to the SPIRV list. In
order to enable the use of this vendor ID in a SPIRV pipeline for the
Videocore GPUs.
Commit: 7b61ff2c263b7122c23783385662f6ff67764352
https://github.com/llvm/llvm-project/commit/7b61ff2c263b7122c23783385662f6ff67764352
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaExprMember.cpp
Log Message:
-----------
[Clang] Prevent null dereferences (#115502)
This commit addresses several Static Analyzer issues related to
potential null dereference by replacing dyn_cast<> with cast<> and
getAs<> with castAs<> in various parts of the codes.
The cast function asserts that the cast is valid, ensuring that the
pointer is not null and preventing null dereference errors.
The changes are made in the following files:
CGBuiltin.cpp: Ensure vector types have exactly 3 elements.
CGExpr.cpp: Ensure member declarations are field declarations.
AnalysisBasedWarnings.cpp: Ensure operations are member expressions.
SemaExprMember.cpp: Ensure base types are extended vector types.
These changes ensure that the types are correctly cast and prevent
potential null dereference issues, improving the robustness and safety
of the code.
Commit: 0cb1cca055596f87a101c488b3aeb26797296851
https://github.com/llvm/llvm-project/commit/0cb1cca055596f87a101c488b3aeb26797296851
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
Log Message:
-----------
[XCore] Use getSignedConstant()
Commit: 5d32a1409df0df39357557df0363196eba08f0fc
https://github.com/llvm/llvm-project/commit/5d32a1409df0df39357557df0363196eba08f0fc
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMRegisterInfo.td
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fp16-instructions.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
Log Message:
-----------
Revert "[ARM] Stop gluing FP comparisons to FMSTAT" (#117175)
Reverts llvm/llvm-project#116676
Reverting per post-commit feedback (causes miscompilation errors and/or
assertion failures).
Commit: 5889f6845d181348b83a5c18e517192ffdbd6fd0
https://github.com/llvm/llvm-project/commit/5889f6845d181348b83a5c18e517192ffdbd6fd0
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[NFC][SPIRV] Cleanup selectOpWithSrc functions (#117077)
As a follow up request from
https://github.com/llvm/llvm-project/pull/111082#discussion_r1811132876
the following non functional changes have been make
- `selectNAryOpWithSrcs` has been renamed to `selectOpWithSrcs`
- Calls to `selectUnOpWithSrc` have been replaced with
`selectOpWithSrcs`
- `selectUnOpWithSrc` has been deleted
Commit: 4b5a8d6835897477873242ef1ee529d00dedd9a1
https://github.com/llvm/llvm-project/commit/4b5a8d6835897477873242ef1ee529d00dedd9a1
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/include/lldb/Utility/CompletionRequest.h
Log Message:
-----------
[lldb] Make sure completions don't end with newlines (#117054)
The logic that prints completions and their descriptions assumes neither
the completion itself nor the description ends with a newline. I
considered making this an assert, but decided against it as completions
can indirectly come from user input (e.g. oddly crafted names). Instead,
avoid the potential for mistakes by defensively stripping them.
Commit: 32da1fd8c7d45d5209c6c781910c51940779ec52
https://github.com/llvm/llvm-project/commit/32da1fd8c7d45d5209c6c781910c51940779ec52
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vop3 mc test with update script (#116859)
This is a NFC change. Update gfx11/gfx12 vop3 test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 915d588b1a4762685b788020beadcd7aad5f50a0
https://github.com/llvm/llvm-project/commit/915d588b1a4762685b788020beadcd7aad5f50a0
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
Reapply "[lldb] Convert file address to load address when reading memory for DW_OP_piece" (#117168)
This commit fixes the test so that the breakpoint is triggered correctly
after `array` usage on AArch64.
Reapplies #116411 with a fix.
Commit: 9424f3dcc5a3f1dada99831b87b0b502a7667d48
https://github.com/llvm/llvm-project/commit/9424f3dcc5a3f1dada99831b87b0b502a7667d48
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
A llvm/test/Transforms/InstCombine/fold-aggregate-reconstruction.ll
M llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll
M llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
Log Message:
-----------
[InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (#100828)
Function foldAggregateConstructionIntoAggregateReuse can fold
insertvalue(phi(extractvalue(src1), extractvalue(src2)))
into
phi(src1, src2)
when we can find source aggregates in all predecessors.
This patch extends it to handle following case
insertvalue(phi(extractvalue(src1), elm2))
into
phi(src1, insertvalue(elm2))
with the condition that the predecessor without source aggregate has
only one successor.
Commit: d936c0cef0bddc577c9615ac46537413b92b19ee
https://github.com/llvm/llvm-project/commit/d936c0cef0bddc577c9615ac46537413b92b19ee
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[Clang] [OMPIRBuilder] Prevent Null Pointer Dereference in OpenMP IR Builder (#115506)
This commit addresses Static Analyzer issues related to potential null
dereference by replacing dyn_cast<> with cast<> in OMPIRBuilder.cpp to
ensure that ArgStructType is not null before it is used, improving the
stability and reliability of the code.
Commit: 3535ea0ba6c6fda69acaf215d7e9e93045466b50
https://github.com/llvm/llvm-project/commit/3535ea0ba6c6fda69acaf215d7e9e93045466b50
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libcxx/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
[libc++] Fix linking benchmarks (#116495)
On my system the library path ends with `lib64` instead of `lib`.
Commit: 68ca2ae81be374c4c40a5e502222f4e99cc3cc9f
https://github.com/llvm/llvm-project/commit/68ca2ae81be374c4c40a5e502222f4e99cc3cc9f
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vop2 mc test with update script (#116860)
This is a NFC change. Update gfx11/gfx12 vop2 test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 002adfa46ec8b2379884c6bc113fd5d742a5cc7a
https://github.com/llvm/llvm-project/commit/002adfa46ec8b2379884c6bc113fd5d742a5cc7a
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vopc mc test with update script (#116873)
This is a NFC change. Update gfx11/gfx12 vopc test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 01c9a14ccf98dba257bb36d9e9242b0bf5cdcaf2
https://github.com/llvm/llvm-project/commit/01c9a14ccf98dba257bb36d9e9242b0bf5cdcaf2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx950_vop3px2.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)
These use a new VOP3PX encoding for the v_mfma_scale_* instructions,
which bundles the pre-scale v_mfma_ld_scale_b32. None of the modifiers
are supported yet (op_sel, neg or clamp).
I'm not sure the intrinsic should really expose op_sel (or any of the
others). If I'm reading the documentation correctly, we should be able
to just have the raw scale operands and auto-match op_sel to byte
extract patterns.
The op_sel syntax also seems extra horrible in this usage, especially with the
usual assumed op_sel_hi=-1 behavior.
Commit: a4f835c520fcf8c6df8be96fad931fc6f4a2b1e4
https://github.com/llvm/llvm-project/commit/a4f835c520fcf8c6df8be96fad931fc6f4a2b1e4
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Fix uninitialized pointer field. (#117173)
Non-static class member `PP` is not initialized in this constructor nor
in any functions that it calls.
Commit: 8f1d1e3cd3fd8cb13512a94af6b2a56dfd807f1e
https://github.com/llvm/llvm-project/commit/8f1d1e3cd3fd8cb13512a94af6b2a56dfd807f1e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
Log Message:
-----------
AMDGPU: Optimize mfma_scale intrinsics with 0 inputs (#116724)
We can use the unscaled form of the instruction if we know the scale
factors are both 0.
Commit: 76b24640e5dc5716f6fac8ef80dac18757753113
https://github.com/llvm/llvm-project/commit/76b24640e5dc5716f6fac8ef80dac18757753113
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_i32_16x16x64_i8 for gfx950 (#116728)
Commit: 0a6e8741ddb4ed8cfb4bf92df863665197be2ccc
https://github.com/llvm/llvm-project/commit/0a6e8741ddb4ed8cfb4bf92df863665197be2ccc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
A llvm/test/Transforms/InstCombine/AMDGPU/mfma-scale.ll
Log Message:
-----------
AMDGPU: Shrink used number of registers for mfma scale based on format (#117047)
Currently the builtins assume you are using an 8-bit format that requires
an 8 element vector. We can shrink the number of registers if the format
requires 4 or 6.
Commit: f4ed79b160cbd2ec537304f095a62750078a0254
https://github.com/llvm/llvm-project/commit/f4ed79b160cbd2ec537304f095a62750078a0254
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_i32_32x32x32_i8 for gfx950 (#117052)
Commit: 7f19b1e49c172772390a3c2e71631115da80af4b
https://github.com/llvm/llvm-project/commit/7f19b1e49c172772390a3c2e71631115da80af4b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/Transforms/LICM/hoist-metadata.ll
Log Message:
-----------
[LICM] Add test showing incorrectly setting alasing metadata.
The new test illustrates a case where LICM introduces UB-implying
metadata on speculated loads that may not execute in the original
version.
The aliasing metadata behavior has been clarified in
https://github.com/llvm/llvm-project/pull/116220.
Commit: 6f68d039a5bdf11f6d7c84bed8d5a0da5950daef
https://github.com/llvm/llvm-project/commit/6f68d039a5bdf11f6d7c84bed8d5a0da5950daef
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
M llvm/test/Transforms/GVN/PRE/rle.ll
Log Message:
-----------
[MemDepAnalysis] Don't reuse NonLocalPointerDeps cache if memory location size differs (#116936)
As seen in #111585, we can end up using a previous cache entry where the
size was too large and was UB.
Compile time impact:
https://llvm-compile-time-tracker.com/compare.php?from=6a863f7e2679a60f2f38ae6a920d0b6e1a2c1690&to=faccf4e1f47fcd5360a438de2a56d02b770ad498&stat=instructions:u.
Fixes #111585.
Commit: 0ac889b6b0bd467cf1ecbc26e80959badcdd5b55
https://github.com/llvm/llvm-project/commit/0ac889b6b0bd467cf1ecbc26e80959badcdd5b55
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][Affine] Extend linearize/delinearize cancelation to partial tails (#116872)
xisting patterns would cancel out the linearize_index /
delinearize_index pairs that had the exact same basis, like
%0 = affine.linearize_index [%w, %x, %y, %z] by (X, Y, Z) : index
%1:4 = affine.delinearize_index %0 into (W, X, Y, Z) : index, ...
This commit extends the canonicalization to handle instances where the
entire basis doesn't match, as in
%0 = affine.linearize_index [%w, %x, %y, %z] by (X, Y, Z) : index
%1:3 = affine.delinearize_index %0 into (XY, Y, Z) : index, ...
where we can replace the last two results of the delinearize_index
operation with the last two inputs of the linearize_index, creating a
more canonical (fewer total computations to perform) result.
Commit: 9e8200c7184431e0dd0e235b70cabfbe8bfe351d
https://github.com/llvm/llvm-project/commit/9e8200c7184431e0dd0e235b70cabfbe8bfe351d
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/include/mlir/Dialect/Affine/Passes.h
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
A mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOpsAsAffine.cpp
M mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
A mlir/test/Dialect/Affine/affine-expand-index-ops-as-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
Log Message:
-----------
[mlir][Affine] Expand affine.[de]linearize_index without affine maps (#116703)
As the documentation for -affine-expand-index-ops says,
affine.delinearize_index and affine.linearize_index don't need to be
expanded into the affine dialect.
Expanding these operations into affine.apply operations can introduce
unwanted "simplifications", mainly translations of `(dN mod C + ...)` to
`(dN + ... - (dN floordiv C) * C)` and similar, which create worse
generated code. This commit resolves this issue by expanding out
affine.delanierize_index directly.
In addition, the lowering of affine.linearize_index now sorts the
operands by loop-independence, allowing an increased amount of
loop-invariant code motion after lowering.
The old behavior is preserved as -expand-affine-index-ops-as-affine but
is no longer the default
Commit: cdd1e27124b7b0d768a4d68a098f4660e289dc65
https://github.com/llvm/llvm-project/commit/cdd1e27124b7b0d768a4d68a098f4660e289dc65
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86][RISCV] Don't emit JumpTableDebugInfo unless triple is OSBinFormatCOFF. (#117083)
This makes the override in RISCV and X86 consistent with the base class
implementation of expandIndirectJTBranch.
Commit: 6735c5ebd414b4f0a28dfc6549187c06c67c1e32
https://github.com/llvm/llvm-project/commit/6735c5ebd414b4f0a28dfc6549187c06c67c1e32
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
A clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/DirectX/WaveActiveAnyTrue.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll
Log Message:
-----------
[HLSL] Implement WaveActiveAnyTrue intrinsic (#115902)
Resolves https://github.com/llvm/llvm-project/issues/99160
- [x] Implement `WaveActiveAnyTrue` clang builtin,
- [x] Link `WaveActiveAnyTrue` clang builtin with `hlsl_intrinsics.h`
- [x] Add sema checks for `WaveActiveAnyTrue` to
`CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [x] Add codegen for `WaveActiveAnyTrue` to `EmitHLSLBuiltinExpr` in
`CGBuiltin.cpp`
- [x] Add codegen tests to
`clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl`
- [x] Add sema tests to
`clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl`
- [x] Create the `int_dx_WaveActiveAnyTrue` intrinsic in
`IntrinsicsDirectX.td`
- [x] Create the `DXILOpMapping` of `int_dx_WaveActiveAnyTrue` to `113`
in `DXIL.td`
- [x] Create the `WaveActiveAnyTrue.ll` and
`WaveActiveAnyTrue_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [x] Create the `int_spv_WaveActiveAnyTrue` intrinsic in
`IntrinsicsSPIRV.td`
- [x] In SPIRVInstructionSelector.cpp create the `WaveActiveAnyTrue`
lowering and map it to `int_spv_WaveActiveAnyTrue` in
`SPIRVInstructionSelector::selectIntrinsic`.
- [x] Create SPIR-V backend test case in
`llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll`
---------
Co-authored-by: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Co-authored-by: Greg Roth <grroth at microsoft.com>
Commit: 9b43078e4c4da6b17b25c18945639c9232ef68c0
https://github.com/llvm/llvm-project/commit/9b43078e4c4da6b17b25c18945639c9232ef68c0
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
Log Message:
-----------
[SPIR-V] Extend support for __spirv_ builtins (#117190)
This PR extends support for `__spirv_` builtins by adding missed
builtins (`GroupNonUniformBroadcast*`) and supporting more "_R<type>"
builtins.
Commit: 58c8d73172a13d750c80ca0ef6849e52a0993e8d
https://github.com/llvm/llvm-project/commit/58c8d73172a13d750c80ca0ef6849e52a0993e8d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/horizontal-list.ll
Log Message:
-----------
[SLP][NFC]Add a test with multi reductions, NFC
Commit: cec52960fdc8eeecab340ffe4cd12f8a8c43bd3b
https://github.com/llvm/llvm-project/commit/cec52960fdc8eeecab340ffe4cd12f8a8c43bd3b
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/TableGen/InstrDocsEmitter.cpp
Log Message:
-----------
[TableGen] Use `const auto&` instead of `auto` to avoid copy (#113053)
Commit: b22c3c1e88ad5be4ef9ee70ac6517620e1441336
https://github.com/llvm/llvm-project/commit/b22c3c1e88ad5be4ef9ee70ac6517620e1441336
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
M llvm/lib/SandboxIR/Region.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
Register callbacks in Region for instruction creation/deletion. (#117088)
This will keep the current Region updated when region passes add/delete
instructions.
Commit: 391bf068f2c124e98e18bbc027f4cfc6f0b413d6
https://github.com/llvm/llvm-project/commit/391bf068f2c124e98e18bbc027f4cfc6f0b413d6
Author: AdityaK <hiraditya at msn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
M llvm/test/LTO/X86/codemodel-3.ll
M llvm/test/LTO/X86/largedatathreshold-3.ll
M llvm/test/Linker/module-flags-6-a.ll
M llvm/test/Transforms/FunctionImport/module-flags.ll
Log Message:
-----------
[LTO] Print conflicting operands between Src and Dest modules (#115104)
The current error message doesn't give sufficient details to help with
debugging. This patch will log the operand values that are conflicting.
After this patch the output is of the form:
```
'Large Data Threshold': IDs have conflicting values: 'i32 101' from /usr/local/home/llvm-project/build/test/LTO/X86/Output/largedatathreshold-3.ll.tmp1.o, and 'i32 100' from ld-temp.o
```
Commit: 667e1fadcf4376ce41f5cae7cabab9f5ccc77b15
https://github.com/llvm/llvm-project/commit/667e1fadcf4376ce41f5cae7cabab9f5ccc77b15
Author: Josh Stone <jistone at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
A compiler-rt/test/profile/Linux/binary-id-offset.c
Log Message:
-----------
[profile] Use base+vaddr for `__llvm_write_binary_ids` note pointers (#114907)
This function is always examining its own ELF headers in memory, but it
was trying to use conditions between examining files or memory, and it
wasn't accounting for LOAD offsets at runtime. This is especially bad if
a loaded segment has additional padding that's not in the file offsets.
Now we do a first scan of the program headers to figure out the runtime
base address based on `PT_PHDR` and/or `PT_DYNAMIC` (else assume zero),
similar to libc's `do_start`. Then each `PT_NOTE` pointer is simply the
base plus the segments's `pt_vaddr`, which includes LOAD offsets.
Fixes #114605
Commit: 0298c5921d3b9fbeb5fefc2555321ea82ade6090
https://github.com/llvm/llvm-project/commit/0298c5921d3b9fbeb5fefc2555321ea82ade6090
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))
Currently sequences reduction_add(ext(<n x i1>)) are modeled as vector
extensions + reduction add, but later instcombiner transforms it into
ext(ctcpop(bitcast <n x i1> to int n)). Patch adds direct support for
this in SLP vectorizer, which enables better cost estimation.
AVX512, -O3+LTO
CINT2006/445.gobmk - extra vector code
Prolangs-C/bison - extra vector code
Benchmarks/NPB-serial/is - 16 x + 8 x reductions vectorized as 24
x reduction
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/116875
Commit: f881a3815a6b58afa64277eee0bb6b91a4dde103
https://github.com/llvm/llvm-project/commit/f881a3815a6b58afa64277eee0bb6b91a4dde103
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[CodeGen] Fix a warning
This patch fixes:
clang/lib/CodeGen/CGBuiltin.cpp:19287:17: error: unused variable
'Ty' [-Werror,-Wunused-variable]
Commit: a76609dd72743c0d678504042b00d434e6cebe1a
https://github.com/llvm/llvm-project/commit/a76609dd72743c0d678504042b00d434e6cebe1a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/CUFCommon.h
M flang/lib/Optimizer/Transforms/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
A flang/test/Fir/CUDA/cuda-device-context.mlir
Log Message:
-----------
[flang][cuda] Avoid intrinsics simplification in device context (#117026)
Commit: 3f594741cf8e1537fb25f84ef3cf2245b08d8089
https://github.com/llvm/llvm-project/commit/3f594741cf8e1537fb25f84ef3cf2245b08d8089
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/runtime/sum.cpp
Log Message:
-----------
[flang] Fix implementation of Kahan summation (#116897)
In the runtime's implementation of floating-point SUM, the
implementation of Kahan's algorithm for increased precision is
incorrect. The running correction factor should be subtracted from each
new data item, not added to it. This fix ensures that the sum of 100M
random default real values between 0. and 1. is close to 5.E7.
See https://en.wikipedia.org/wiki/Kahan_summation_algorithm.
Commit: be6bc6a1e5beb84984b8e1419393c80a3fe2d3d8
https://github.com/llvm/llvm-project/commit/be6bc6a1e5beb84984b8e1419393c80a3fe2d3d8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/docs/ParserCombinators.md
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/type-parsers.h
A flang/test/Parser/recovery07.f90
Log Message:
-----------
[flang] Better recovery from errors in a loop control (#117025)
When there's an error in a DO statement loop control, error recovery
isn't great. A bare "DO" is a valid statement, so a failure to parse its
loop control doesn't fail on the whole statement. Its partial parse ends
after the keyword, and as some other statement parsers can get further
into the input before failing, errors in the loop control can lead to
confusing error messages about bad pointer assignment statements and
others. So just check that a bare "DO" is followed by the end of the
statement.
Commit: bde2f39ae076c893d881d73b0d9c4ef4ea89c853
https://github.com/llvm/llvm-project/commit/bde2f39ae076c893d881d73b0d9c4ef4ea89c853
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/pp046.F
Log Message:
-----------
[flang] Don't check fixed form label field too early (#117040)
When a fixed form source line begins with the name of a macro, don't
emit the usual warning message about a non-decimal character in the
label field. (The check for a macro was only being applied to free form
source lines, and the label field checking was unconditional).
Fixes https://github.com/llvm/llvm-project/issues/116914.
Commit: bb23ac65a1e25747231a10240e78c7ce336602bf
https://github.com/llvm/llvm-project/commit/bb23ac65a1e25747231a10240e78c7ce336602bf
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/not-an-exponent.F90
Log Message:
-----------
[flang] Don't tokenize an exponent that isn't one (#117061)
The character 'e' or 'd' (either case) shouldn't be tokenized as part of
a real literal during preprocessing if it is not followed by an
optionally-signed digit string. Doing so prevents it from being
recognized as a macro name, or as the start of one.
Fixes https://github.com/llvm/llvm-project/issues/115676.
Commit: 84b70869e6227720e93aad35bd184a8742c94d82
https://github.com/llvm/llvm-project/commit/84b70869e6227720e93aad35bd184a8742c94d82
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/RealtimeSanitizer.rst
Log Message:
-----------
[rtsan] NFC: Update docs with suppress_equal_stacks (#117187)
Commit: 040f1c78117f9ec90d951f7560198ec9b2fcaf65
https://github.com/llvm/llvm-project/commit/040f1c78117f9ec90d951f7560198ec9b2fcaf65
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/collect_and_build_with_pgo.py
Log Message:
-----------
[llvm] Update pgo collection script to reflect Mainainers file (#117197)
The collect_and_build_with_pgo.py script used CODE_OWNERS.TXT as part of
its heuristic, but now that its gone, the script will fail to recognize
an LLVM checkout.
Commit: 0165f8817cbda4dc6a83db0d2994f7ece12726ff
https://github.com/llvm/llvm-project/commit/0165f8817cbda4dc6a83db0d2994f7ece12726ff
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvknhb.s
Log Message:
-----------
[RISCV] Fix the worst case for VSHA2MS in SiFive P400/P600 scheduling models (#116893)
For each RVV instruction we should have a single WriteRes assignment to
the worst case scheduling class. This assignment is usually equal to
that of the largest LMUL + smallest SEW. My #114317 accidentally made
two of these assignments on `WriteVSHA2MSV_WorstCase`. This won't affect
our MachineScheduler nor most of our llvm-mca use cases (assuming you
populate the correct LMUL and SEW), yet it's not ideal either.
This patch fixes this issue by assigning the correct numbers and
resource mapping to `WriteVSHA2MSV_WorstCase`, which is equal to that of
largest LMUL + _largest_ SEW (Zvknh's scheduling properties are
special). I also added a MCA test to make sure we always pick up the
correct worst case numbers for P600's scheduling model.
Original issue was reported by @reidtatge
Commit: f7497b10f7face081cc5ae2528276d919a5c6ca2
https://github.com/llvm/llvm-project/commit/f7497b10f7face081cc5ae2528276d919a5c6ca2
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia][CMake] Enable new libc header gen (#116938)
All issues blocking this were resolved.
Commit: 8663b8777e8108f74f91a2a33115b3a00d57c043
https://github.com/llvm/llvm-project/commit/8663b8777e8108f74f91a2a33115b3a00d57c043
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[NFC][VectorUtils][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (#114849)
This changes allows target intrinsics to specify and overwrite overloaded types.
- Updates `ReplaceWithVecLib` to not provide TTI as there most probably won't be a use-case
- Updates `SLPVectorizer` to use available TTI
- Updates `VPTransformState` to pass down TTI
- Updates `VPlanRecipe` to use passed-down TTI
This change will let us add scalarization for `asdouble`: #114847
Commit: a3e2f0acdf5ee452c8eb177b56f476b432539e08
https://github.com/llvm/llvm-project/commit/a3e2f0acdf5ee452c8eb177b56f476b432539e08
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
Log Message:
-----------
[lldb] Fix a regression in Status::GetErrorType() (#117095)
The refactored code did not correctly determine the type of expression
errors.
rdar://139699028
Commit: 29afbd5893fbf68a2b64321bee0c82233b8b852e
https://github.com/llvm/llvm-project/commit/29afbd5893fbf68a2b64321bee0c82233b8b852e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/combine-ctpop-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
Log Message:
-----------
[RISCV] Add DAG combine to convert (iX ctpop (bitcast (vXi1 A))) into vcpop.m. (#117062)
This only handles the simplest case where vXi1 is a legal vector type.
If the vector type isn't legal we need to go through type legalization,
but the pattern gets much harder to recognize after that. Either because
ctpop gets expanded due to Zbb not being enabled, or the bitcast
becoming a bitcast+extractelt, or the ctpop being split into multiple
ctpops and adds, etc.
Commit: 4fc1141e7650901b34cc8eec0c770e9015204087
https://github.com/llvm/llvm-project/commit/4fc1141e7650901b34cc8eec0c770e9015204087
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Parser/OpenMP/defaultmap-unparse.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
Log Message:
-----------
[flang][OpenMP] Apply modifier representation to semantic checks (#116658)
Also, define helper macros in parse-tree.h.
Apply the new modifier representation to the DEFAULTMAP and REDUCTION
clauses, with testcases utilizing the new modifier validation.
OpenMP modifier overhaul: #3/3
Commit: 30df65949598f298b508d5d32688e901c6f66a57
https://github.com/llvm/llvm-project/commit/30df65949598f298b508d5d32688e901c6f66a57
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Log Message:
-----------
[GlobalISel] Correct comment about type vs register class (#116083)
Type and register class aren't mutually exclusive in gMIR but there's also
no target-independent requirement (yet?) to have both on target instructions.
Commit: 51cdf1f6627ae369cbe15e50861806842e39a013
https://github.com/llvm/llvm-project/commit/51cdf1f6627ae369cbe15e50861806842e39a013
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] Skip MemProfUsePass on the empty module (#117210)
This patch teaches the MemProfUsePass to return immediately on
the empty module.
Aside from saving time to deserialize the MemProf profile, this patch
ensures that we can obtain TLI like so:
TargetLibraryInfo &TLI =
FAM.getResult<TargetLibraryAnalysis>(*M.begin());
when we undrift the MemProf profile in near future.
Commit: b05600d96f46697e21f6b1b7ad901391326243a8
https://github.com/llvm/llvm-project/commit/b05600d96f46697e21f6b1b7ad901391326243a8
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Reapply "[libc] Use best-fit binary trie to make malloc logarithmic" (#117065)
- Fix assertion expressions.
- Fix incorrect small size in freestore_test.
- There may only be one small size for high alignment and small
pointers (riscv32).
- Don't rely on stack alignment in FreeList test.
Commit: 505e049aa078c8961f00cacefc3983398a46fb04
https://github.com/llvm/llvm-project/commit/505e049aa078c8961f00cacefc3983398a46fb04
Author: Raul Tambre <raul at tambre.ee>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M cmake/Modules/CMakePolicy.cmake
Log Message:
-----------
[CMake] Enable CMP0179 alongside CMP0156 for deduplication on LLD (#116497)
LLD has a bug regarding ordering of static link libraries in the ELF backend, which has been reported as #116669.
CMake 3.31.0 started properly deduplicating static libraries for LLD causing the following linking failure for `libclang-cpp.so` with `-DLLVM_LINK_LLVM_DYLIB=ON`:
```
ld.lld: error: undefined symbol: llvm::omp::getOpenMPClauseName(llvm::omp::Clause)
>>> referenced by OpenMPKinds.cpp
>>> tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/OpenMPKinds.cpp.o:(clang::getOpenMPSimpleClauseTypeName(llvm::omp::Clause, unsigned int))
>>> referenced by SemaOpenMP.cpp
>>> tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaOpenMP.cpp.o:(clang::SemaOpenMP::CheckOMPRequiresDecl(clang::SourceLocation, llvm::ArrayRef<clang::OMPClause*>))
>>> referenced by SemaOpenMP.cpp
>>> tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaOpenMP.cpp.o:(clang::SemaOpenMP::CheckOMPRequiresDecl(clang::SourceLocation, llvm::ArrayRef<clang::OMPClause*>))
>>> referenced 166 more times
[tons more]
```
CMake 3.31 also introduced CMP0179, which builds on CMP0156 and makes the deduplication consistent across platforms.
By coincidence this works around the above LLD deficiency and is the fix that CMake 3.31.1 will implement.
However, the fix is to ignore CMP0156 unless CMP0179 is also enabled, i.e. no more deduplication.
So enable CMP0179 to keep the benefits of deduplication from CMP0156 on LLD and fix the build for CMake 3.31.0.
See: #116669
See: https://gitlab.kitware.com/cmake/cmake/-/issues/26447
Fixes: cb90d5b
Commit: 31ce47b5d602996406a516184af054a45118beca
https://github.com/llvm/llvm-project/commit/31ce47b5d602996406a516184af054a45118beca
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[TableGen] Use `std::move` to avoid copy (#113061)
Commit: 93b83642ee34d0092b94776728dad0117c2b72a1
https://github.com/llvm/llvm-project/commit/93b83642ee34d0092b94776728dad0117c2b72a1
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
R libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
R libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
R libc/src/__support/freestore.h
R libc/src/__support/freetrie.cpp
R libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
R libc/test/src/__support/freestore_test.cpp
R libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Revert "[libc] Use best-fit binary trie to make malloc logarithmic (#117065)"
This reverts commit b05600d96f46697e21f6b1b7ad901391326243a8.
riscv32 unit test still broken
Commit: decb87452d8e3b93b21ab9e4c3dd03d85cbebfa5
https://github.com/llvm/llvm-project/commit/decb87452d8e3b93b21ab9e4c3dd03d85cbebfa5
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/test/CXX/drs/cwg158.cpp
Log Message:
-----------
[TBAA] Only emit pointer tbaa metedata for record types. (#116991)
Be conservative if the type isn't a record type. Handling other types
may
require stripping const-qualifiers inside the type, e.g.
MemberPointerType.
Also look through array types same as through pointer types, to not
pessimize
arrays of pointers.
Without this, we assign different tags to the accesses for p an q in the
second test in cwg158.
PR: https://github.com/llvm/llvm-project/pull/116991
Commit: b89e774672678ef26baf8f94c616f43551d29428
https://github.com/llvm/llvm-project/commit/b89e774672678ef26baf8f94c616f43551d29428
Author: bernhardu <bernhardu at mailbox.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] Avoid warnings in compiling interception_win_test.cpp. (#116887)
Example:
warning: unused variable 'kPatchableCode12' [-Wunused-const-variable]
Commit: 9ba6672b9f0e82a1f6d4100dc832c84447ea545c
https://github.com/llvm/llvm-project/commit/9ba6672b9f0e82a1f6d4100dc832c84447ea545c
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[sanitizer_common] Intercept timespec_get except for hwasan (#117080)
Intercept timespec_get for all sanitizers except for hwasan
Commit: b62557aaeb9762bcc0d17a0db976cda74dc6b667
https://github.com/llvm/llvm-project/commit/b62557aaeb9762bcc0d17a0db976cda74dc6b667
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
Revert "[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))"
This reverts commit 0298c5921d3b9fbeb5fefc2555321ea82ade6090 to fix
a buildbot crash reported by https://lab.llvm.org/buildbot/#/builders/113/builds/4079.
Commit: fd2e0483de089fb1459bf440d74e5b4e648a429f
https://github.com/llvm/llvm-project/commit/fd2e0483de089fb1459bf440d74e5b4e648a429f
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
Log Message:
-----------
[clang-tidy] ignore consteval function in `ExceptionAnalyzer` (#116643)
`ExceptionAnalyzer` can ignore `consteval` function even if it will
throw exception. `consteval` function must produce compile-time
constant. But throw statement cannot appear in constant evaluation.
Fixed: #104457.
Commit: ba668eb99c5dc37d3c5cf2775079562460fd7619
https://github.com/llvm/llvm-project/commit/ba668eb99c5dc37d3c5cf2775079562460fd7619
Author: Alex Langford <alangford at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
Re-apply [lldb] Do not use LC_FUNCTION_STARTS data to determine symbol size as symbols are created (#117079)
I backed this out due to a problem on one of the bots that myself and
others have problems reproducing locally. I'd like to try to land it
again, at least to gain more information.
Summary:
This improves the performance of ObjectFileMacho::ParseSymtab by
removing eager and expensive work in favor of doing it later in a
less-expensive fashion.
Experiment:
My goal was to understand LLDB's startup time.
First, I produced a Debug build of LLDB (no dSYM) and a
Release+NoAsserts build of LLDB. The Release build debugged the Debug
build as it debugged a small C++ program. I found that
ObjectFileMachO::ParseSymtab accounted for somewhere between 1.2 and 1.3
seconds consistently. After applying this change, I consistently
measured a reduction of approximately 100ms, putting the time closer to
1.1s and 1.2s on average.
Background:
ObjectFileMachO::ParseSymtab will incrementally create symbols by
parsing nlist entries from the symtab section of a MachO binary. As it
does this, it eagerly tries to determine the size of symbols (e.g. how
long a function is) using LC_FUNCTION_STARTS data (or eh_frame if
LC_FUNCTION_STARTS is unavailable). Concretely, this is done by
performing a binary search on the function starts array and calculating
the distance to the next function or the end of the section (whichever
is smaller).
However, this work is unnecessary for 2 reasons:
1. If you have debug symbol entries (i.e. STABs), the size of a function
is usually stored right after the function's entry. Performing this work
right before parsing the next entry is unnecessary work.
2. Calculating symbol sizes for symbols of size 0 is already performed
in `Symtab::InitAddressIndexes` after all the symbols are added to the
Symtab. It also does this more efficiently by walking over a list of
symbols sorted by address, so the work to calculate the size per symbol
is constant instead of O(log n).
Commit: 07507cb5919cae0ae880bfee538ebc993b97dd6c
https://github.com/llvm/llvm-project/commit/07507cb5919cae0ae880bfee538ebc993b97dd6c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/entries-shuffled-diff-sizes.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
Log Message:
-----------
[SLP]Fix shuffling of entries of the different sizes
Need to choose the size of vector factor for mask based on the entries
vector factors, not mask size, to generate correct code.
Fixes #117170
Commit: 320038579d3c23b78f99618b71640f51423fe321
https://github.com/llvm/llvm-project/commit/320038579d3c23b78f99618b71640f51423fe321
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
Log Message:
-----------
[VPlan] Return cost of PHI for scalar VFs in computeCost for FORs.
This fixes a crash when the VF is scalar.
Fixes https://github.com/llvm/llvm-project/issues/116375.
Commit: 4d1959b70b4e6634561273374046e85d54b7bf6d
https://github.com/llvm/llvm-project/commit/4d1959b70b4e6634561273374046e85d54b7bf6d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
Log Message:
-----------
[VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (#115066)
Generalize collectUsersInExitBlock to collecting exit users in multiple
exit blocks. Exit blocks are leaf nodes in the VPlan (without
successors) except the scalar header.
Split off in preparation for
https://github.com/llvm/llvm-project/pull/112138
PR: https://github.com/llvm/llvm-project/pull/115066
Commit: 6c52a18a1d67fd7d0d68e1434469e0a4aee980a9
https://github.com/llvm/llvm-project/commit/6c52a18a1d67fd7d0d68e1434469e0a4aee980a9
Author: bernhardu <bernhardu at mailbox.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Fix `8A 05 ...` to return 6 again. (#116889)
This was already the case before 3bd8f4e,
which probably accidentally inserted
a few new instructions and a return 4 in between.
Commit: a62e1c8eddcda420abec57976dc48f97669277dc
https://github.com/llvm/llvm-project/commit/a62e1c8eddcda420abec57976dc48f97669277dc
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Core/FormatEntity.cpp
Log Message:
-----------
[lldb] Fix incorrect nullptr check in DumpAddressAndContent (#117219)
When checking the section load list, the existing code assumed that a
valid execution context guaranteed a valid target. This is a speculative
fix for a crash report (without a reproducer).
rdar://133969831
Commit: 9492744dc3bb483f6a723a6abef0195b93e25cde
https://github.com/llvm/llvm-project/commit/9492744dc3bb483f6a723a6abef0195b93e25cde
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Fix debug assertion failure. (#117090)
Only call getThisType() on an instance method.
Commit: 1b413c8aa41e31f0c1e3ce5b37369f66d6554931
https://github.com/llvm/llvm-project/commit/1b413c8aa41e31f0c1e3ce5b37369f66d6554931
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/src/__support/time/linux/CMakeLists.txt
A libc/src/__support/time/linux/clock_gettime.cpp
M libc/src/__support/time/linux/clock_gettime.h
Log Message:
-----------
[libc] fix clock_gettime symbols being undefined (#117224)
`clock_gettime` being a header library discards the dependency chain
behind it.
Commit: 8e65b7269121b49814b7f0d44e740d1a6c274c6d
https://github.com/llvm/llvm-project/commit/8e65b7269121b49814b7f0d44e740d1a6c274c6d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
Log Message:
-----------
[RISCV] Fix double counting CSRs with Zcmp in RISCVFrameLowering::getFrameIndexReference. (#117207)
The Zcmp callee saved registers are already accounted for in
getCalleeSavedStackSize(). Subtracting RVPushStackSize subtracts
them a second time leading to incorrect stack offsets during frame
index elimination.
This should have been removed in
0de2b26942f890a6ec84cd75ac7abe3f6f2b2e37
when Zcmp handling was changed. Prior to that, RVPushStackSize was
not included in getCalleeSavedStackSize(). The commit message at the
time noted that Zcmp+RVV was likely broken.
Commit: 926a71f0c9ff11a7b07231439505808780e88fe5
https://github.com/llvm/llvm-project/commit/926a71f0c9ff11a7b07231439505808780e88fe5
Author: Mirko <mirkomueller97 at live.de>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86WinEHState.cpp
A llvm/test/CodeGen/WinEH/wineh-dynamic-alloca.ll
A llvm/test/CodeGen/WinEH/wineh-inlined-inalloca.ll
Log Message:
-----------
[CodeGen][WinEH] Update saved esp for inlined inallocas (#116585)
This fixes issue #116583
When inalloca calls are inlined the static stack pointer saving prolog
of X86WinEHState breaks due to dynamic allocas.
In this case we need to update the saved esp for every inalloca and for
every stackrestore also related to inalloca.
Commit: bcf654c7f5fb84dd7cff5fe112d96658853cd8f5
https://github.com/llvm/llvm-project/commit/bcf654c7f5fb84dd7cff5fe112d96658853cd8f5
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
Log Message:
-----------
[lldb] Fix loading UUIDs from ELF headers. (#117028)
A previous patch added the ability to load UUID from ELF headers using
the program header and finding PT_NOTE entries. The fix would attempt to
read the data for the PT_NOTE from memory, but it didn't slide the
address so it ended up only working for the main executable if it wasn't
moved in memory. This patch slides the address and adds logging.
All processes map the ELF header + program headers + some program header
contents into memory. The program header for the `PT_NOTE` entries are
mapped, but the p_vaddr doesn't get relocated and is relative to the
load address of the ELF header. So we take a "p_vaddr" (file address)
and convert it into a load address in the process so we can load the
correct bytes that contain the `PT_NOTE` contents.
Commit: 41a0c66f4379d43dcf7643bced22b9048e7ace96
https://github.com/llvm/llvm-project/commit/41a0c66f4379d43dcf7643bced22b9048e7ace96
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
[TBAA] Don't emit pointer tbaa for unnamed structs or unions. (#116596)
For unnamed structs or unions, C's compatible types rule applies. Two
compatible types in different compilation units can have different
mangled names, meaning the metadata emitted below would incorrectly mark
them as no-alias. Use AnyPtr for such types in both C and C++, as C and
C++ types may be visible when doing LTO.
PR: https://github.com/llvm/llvm-project/pull/116596
Commit: 1c47d67abc72c8e4bca0f1d09cf1a025050fe60c
https://github.com/llvm/llvm-project/commit/1c47d67abc72c8e4bca0f1d09cf1a025050fe60c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_f32_16x16x32_bf16 for gfx950 (#117053)
Commit: 68ce528defae06bfc0faeee7e107337f0a2413fd
https://github.com/llvm/llvm-project/commit/68ce528defae06bfc0faeee7e107337f0a2413fd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP]Fix vector factor calculation for adjusted mask
Need to choose max vector factor as max(Mask.size(), prev-val-size).
Fixes build erros in https://lab.llvm.org/buildbot/#/builders/95/builds/6504
Commit: dcd69ddefb66c0627f41547b5fdc166030d76ccb
https://github.com/llvm/llvm-project/commit/dcd69ddefb66c0627f41547b5fdc166030d76ccb
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/idot.ll
Log Message:
-----------
[SPIRV] Use `Op[S|U]Dot` when possible for integer dot product (#115095)
```
- use the new OpSDot/OpUDot instructions when capabilites allow in SPIRVInstructionSelector.cpp
- correct functionality of capability check onto input operand and not return operand type in SPIRVModuleAnalysis.cpp
- add test cases to demonstrate use case in idot.ll
```
Resolves #114632
Commit: 52544e14d7c001772eb01dc5808b45b6f6ae0ac1
https://github.com/llvm/llvm-project/commit/52544e14d7c001772eb01dc5808b45b6f6ae0ac1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
A llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
Log Message:
-----------
AMDGPU: Add a baseline, non-comprehensive test for scaled mfma hazards (#117055)
Add some tests which will demonstrate that we treat the number of cycles
differently depending on whether the first matrix uses an f8 format.
Commit: 2ab178820b903453dbb13b4495f163dc910b243a
https://github.com/llvm/llvm-project/commit/2ab178820b903453dbb13b4495f163dc910b243a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x64_f16 for gfx950 (#117202)
Commit: e50eaa2cf199b6e8b07eb0ea18493053cd12559a
https://github.com/llvm/llvm-project/commit/e50eaa2cf199b6e8b07eb0ea18493053cd12559a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x32_f16 for gfx950 (#117205)
Commit: 95ddc1a63b47a5dcfb044632eec2e840d41ff793
https://github.com/llvm/llvm-project/commit/95ddc1a63b47a5dcfb044632eec2e840d41ff793
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x64_bf16 for gfx950 (#117211)
Commit: 0a7242959f5d3f9ccf7b149009b9eebd45b785b0
https://github.com/llvm/llvm-project/commit/0a7242959f5d3f9ccf7b149009b9eebd45b785b0
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.h
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
Log Message:
-----------
[LLDB][ProcessELFCore] Add Description to ProcessELFCore/ELFThread stop reasons (#110065)
This fixes a functionality gap with GDB, where GDB will properly decode
the stop reason and give the address for SIGSEGV. I also added
descriptions to all stop reasons, following the same code path that the
Native Linux Thread uses.
Commit: 42dd114a464885a93daa7d2beacc3437cde6ea01
https://github.com/llvm/llvm-project/commit/42dd114a464885a93daa7d2beacc3437cde6ea01
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x32_bf16 for gfx950 (#117212)
Commit: eaa0a21d21962280dc2c03a09152510f6162a576
https://github.com/llvm/llvm-project/commit/eaa0a21d21962280dc2c03a09152510f6162a576
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
Log Message:
-----------
Limit symbol versioning in clang-cpp to Linux for now
There was a build bot failure on AIX after #116556, and who knows what
other systems don't support symbol versioning. So let's limit this to
Linux for now. We can always add more cases later.
Commit: 8c53036146758acf6b195867fbc9ec447e4a228f
https://github.com/llvm/llvm-project/commit/8c53036146758acf6b195867fbc9ec447e4a228f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_i32_16x16x128_i8 for gfx950 (#117213)
Commit: 3e6f3508adac947bf7b85aec88e796bbfbdebf70
https://github.com/llvm/llvm-project/commit/3e6f3508adac947bf7b85aec88e796bbfbdebf70
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_i32_32x32x64_i8 for gfx950 (#117214)
Commit: 4862febdce572e6952b02283a6c7e53617e3aac0
https://github.com/llvm/llvm-project/commit/4862febdce572e6952b02283a6c7e53617e3aac0
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
M clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/lifetimebound.cpp
Log Message:
-----------
[clang][APINotes] Do not add duplicate lifetimebound annotations (#117194)
In case a method already is lifetimebound annotated we should not add a
second annotation to the type.
Commit: 385961d7b23d5500d20954ad8137b27ecced2692
https://github.com/llvm/llvm-project/commit/385961d7b23d5500d20954ad8137b27ecced2692
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Reapply "[libc] Use best-fit binary trie to make malloc logarithmic (#117065)"
This reverts commit 93b83642ee34d0092b94776728dad0117c2b72a1.
- Correct riscv32 assumption about alignment (bit of a hack).
- Fix test case where the largest_small and smallest sizes are the
same.
Commit: 3709c2d15a38efaf8007570b1434293a9274487a
https://github.com/llvm/llvm-project/commit/3709c2d15a38efaf8007570b1434293a9274487a
Author: Chuvak <demenev2002 at yandex.ru>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/math/Compare.h
Log Message:
-----------
[libc] Fix wrong name in Compare.h (#117223)
Fix for some mistakes in source code found using PVS Studio.
Inspired by: https://pvs-studio.com/en/blog/posts/cpp/1188/
Fixed:
- [Bug 5](https://pvs-studio.com/en/blog/posts/cpp/1188/#IDF23EA2CEAB)
Commit: bd8a953e9bb934d51f98327bbea5baef65f3d710
https://github.com/llvm/llvm-project/commit/bd8a953e9bb934d51f98327bbea5baef65f3d710
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Fix mfma scale source legalization (#117238)
Code inside assert changes the variable instead of the comparison.
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 7672216ed7f480c8d461a2d046a74453307f6298
https://github.com/llvm/llvm-project/commit/7672216ed7f480c8d461a2d046a74453307f6298
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[LLVM] Add environment triple for 'llvm' (#117218)
Summary:
The LLVM C library is an in-development environment for running
executables on various systems. Similarly how we have `-gnu` to indicate
that we are using a GNU toolchain we should support `-llvm` to indicate
the LLVM C library. This patch only adds the basic support for the
triple and does not do any necessary clang changes to handle compiling
with it.
Fixes https://github.com/llvm/llvm-project/issues/117251
Commit: 6a8a4d51a4415aa453b79f999bed411bad6c3723
https://github.com/llvm/llvm-project/commit/6a8a4d51a4415aa453b79f999bed411bad6c3723
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/include/lldb/Expression/UserExpression.h
M lldb/source/Expression/REPL.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/expression/fixits/TestFixIts.py
Log Message:
-----------
[lldb] Refactor UserExpression::Evaluate to only have one error channel. (#117186)
Prior to this patch, the function returned an exit status, sometimes a
ValueObject with an error and a Status object. This patch removes the
Status object and ensures the error is consistently returned as the
error of the ValueObject.
Commit: 7553fb127485d034e2ffdbb5461fef2b6f04b989
https://github.com/llvm/llvm-project/commit/7553fb127485d034e2ffdbb5461fef2b6f04b989
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/API/SBValue.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
Log Message:
-----------
[lldb] Fix a regression in SBValue::GetObjectDescription() (#117242)
The old behavior was to return a null string in the error case,when
refactoring the error handling I thought it would be a good idea to
print the error in the description, but that breaks clients that try to
print a description first and then do something else in the error case.
The API is not great but it's clear that in-band errors are also not a
good idea.
rdar://133956263
Commit: ab28d387fafede5d56a005b2597903fe6a2fbf9a
https://github.com/llvm/llvm-project/commit/ab28d387fafede5d56a005b2597903fe6a2fbf9a
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/test/src/__support/freestore_test.cpp
Log Message:
-----------
[libc] Fix forward freestore test on riscv32
Commit: e79cd2467622d6e388888a4e7ca2e9fbc3fbbc50
https://github.com/llvm/llvm-project/commit/e79cd2467622d6e388888a4e7ca2e9fbc3fbbc50
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/test/Parser/OpenMP/order-clause01.f90
Log Message:
-----------
[flang][OpenMP] Use new modifier code in ORDER and SCHEDULE clauses (#117081)
This actually simplifies the AST node for the schedule clause: the two
allowed modifiers can be easily classified as the ordering-modifier and
the chunk-modifier during parsing without the need to create additional
classes.
Commit: 1a08b155899ee3ed6a6c441799991a8be5df801e
https://github.com/llvm/llvm-project/commit/1a08b155899ee3ed6a6c441799991a8be5df801e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP] Avoid early returns, NFC (#117231)
Frontend code is generally nested.
Follow-up to https://github.com/llvm/llvm-project/pull/116658.
Commit: 9894cd5febbb89ad5b97c006179aaee77b824f91
https://github.com/llvm/llvm-project/commit/9894cd5febbb89ad5b97c006179aaee77b824f91
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp:53:32: error:
field 'm_thread_reg_ctx_sp' will be initialized after field
'm_thread_name' [-Werror,-Wreorder-ctor]
Commit: 0cfd20ed1b8561a5d4587e8f624f9b4c8efd8b6f
https://github.com/llvm/llvm-project/commit/0cfd20ed1b8561a5d4587e8f624f9b4c8efd8b6f
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
Log Message:
-----------
[JITLink][arm64][MachO] Apply PAC signing to __mod_init_func pointers.
The __mod_init_func section contains pointers to static initializer functions.
In the static compilation model for MachO/arm64e these are unsigned pointers
that are signed by dyld before being called. This patch teaches JITLink's
MachO/arm64 backend to sign __mod_init_func pointers using the PAC signing
function introduced in a432f11a52d (signing is triggered by rewriting all
Pointer64 edges in the section to Pointer64Authenticated edges). This means
that unlike the static compilation model the linked __mod_init_func section
will contain signed pointers.
Note: Signing of init pointers could instead have been handled by the ORC
runtime in a manner similar to dyld, but this would have come at the cost of
adding an extra signing oracle. Using the signing function avoids this.
Testing this change requires execution. It is covered by the
trivial-cxx-constructor.cpp testcase that was added to the ORC runtime in
7c0786363e6.
Commit: 3f540e1a2195b34969b7c4741ba24855bd393c56
https://github.com/llvm/llvm-project/commit/3f540e1a2195b34969b7c4741ba24855bd393c56
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-globals.s
Log Message:
-----------
[JITLink] Restrict execution of MachO_ptrauth-globals.s test to arm64 hosts.
Should fix the bot failures on Darwin x86-64 machines.
Commit: 7baadb2a4e48df88c9fdd09629d6f03e66bb30d7
https://github.com/llvm/llvm-project/commit/7baadb2a4e48df88c9fdd09629d6f03e66bb30d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_bf8_bf8 for gfx950 (#117232)
Commit: 3678f8a8aae4f318c82d290044f3d19a05e74ffc
https://github.com/llvm/llvm-project/commit/3678f8a8aae4f318c82d290044f3d19a05e74ffc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_bf8_fp8 for gfx950 (#117233)
Commit: 33124910c9f4877c069c0358159763c03e10ca31
https://github.com/llvm/llvm-project/commit/33124910c9f4877c069c0358159763c03e10ca31
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_fp8_bf8 for gfx950 (#117234)
Commit: 836d2dcf601a736804670ba6fbc85ec5cfbfeff1
https://github.com/llvm/llvm-project/commit/836d2dcf601a736804670ba6fbc85ec5cfbfeff1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_fp8_fp8 for gfx950 (#117235)
Commit: 2369a582c260aafd46ce09e75e884fb654fd330d
https://github.com/llvm/llvm-project/commit/2369a582c260aafd46ce09e75e884fb654fd330d
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
[Clang] Fix handling of non-member functions in isNormalAssignmentOperator() (#115880)
This patch correctes the handling of non-member functions in the
`isNormalAssignmentOperator` function within `CheckExprLifetime.cpp`.
The previous implementation incorrectly assumed that `FunctionDecl` is
always a `CXXMethodDecl`, leading to potential null pointer
dereferencing.
Change: - Correctly handle the case where `FD` is not a `CXXMethodDecl`
by using `FD->getParamDecl(0)->getType()`.
This fix ensures that the function correctly handles non-member
assignment operators, such as:
`struct S {}; void operator|=(S, S) {}`
This change improves the robustness of the `isNormalAssignmentOperator`
function by correctly identifying and handling different types of
function declarations.
Commit: 8223982eba22323f7a737a62259d6d6048504107
https://github.com/llvm/llvm-project/commit/8223982eba22323f7a737a62259d6d6048504107
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/test/MC/X86/tlsdesc-64.s
Log Message:
-----------
[X86][MC] Support R_X86_64_CODE_4_GOTPC32_TLSDESC (#116908)
For
lea name at tlsdesc(%rip), %reg
add
R_X86_64_CODE_4_GOTPC32_TLSDESC = 45
if the instruction starts at 4 bytes before the relocation offset. This
should be used if reg is one of the additional general-purpose
registers, r16-r31, in Intel APX. It is similar to
R_X86_64_GOTPC32_TLSDESC and linker optimization must take the different
instruction encoding into account.
Linker can convert the instructions with R_X86_64_CODE_4_GOTPC32_TLSDESC
to
mov $name at tpoff, %reg
if the first byte of the instruction at the relocation offset - 4 is
0xd5 (namely, encoded w/REX2 prefix) when possible.
Binutils patch:
https://github.com/bminor/binutils-gdb/commit/a533c8df598b5ef99c54a13e2b137c98b34b043c
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2023-December/131463.html
ABI discussion:
https://groups.google.com/g/x86-64-abi/c/ACwD-UQXVDs/m/vrgTenKyFwAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: ca9f358b1404132ab327a13b2546ee23a526876e
https://github.com/llvm/llvm-project/commit/ca9f358b1404132ab327a13b2546ee23a526876e
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_loongarch64_relocations.s
Log Message:
-----------
[JITLink][LoongArch] Add support for R_LARCH_CALL36 relocation
This relocation is used for function calls with medium code model.
Reviewed By: lhames, SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/117127
Commit: dc580c9cf65d9bdad92e127325b50e712422379b
https://github.com/llvm/llvm-project/commit/dc580c9cf65d9bdad92e127325b50e712422379b
Author: James Y Knight <jyknight at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
Log Message:
-----------
Switch test back from getRealFileSystem to createPhysicalFileSystem
The tests change the VFS's working directory, but, we don't want to
change the actual process's working-directory, or it can break other
tests (depending on run order).
Fixes: df9a14d7bbf1180e4f1474254c9d7ed6bcb4ce55
Commit: 105ecd8bb2c90c874375100e61f85678a0f6e310
https://github.com/llvm/llvm-project/commit/105ecd8bb2c90c874375100e61f85678a0f6e310
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/SplitFunctions.cpp
A bolt/test/X86/pie-eh-split-undo.s
M bolt/test/runtime/X86/Inputs/pie-exceptions-failed-split.s
R bolt/test/runtime/X86/pie-exceptions-failed-split.test
A bolt/test/runtime/X86/pie-exceptions-split.test
Log Message:
-----------
[BOLT] Avoid EH trampolines for PIEs/DSOs (#117106)
We used to emit EH trampolines for PIE/DSO whenever a function fragment
contained a landing pad outside of it. However, it is common to have all
landing pads in a cold fragment even when their throwers are in a hot
one.
To reduce the number of trampolines, analyze landing pads for any given
function fragment, and if they all belong to the same (possibly
different) fragment, designate that fragment as a landing pad fragment
for the "thrower" fragment. Later, emit landing pad fragment symbol as
an LPStart for the thrower LSDA.
Commit: 3f1e7ef5344c3236bcabf3982dbdc985c43bc078
https://github.com/llvm/llvm-project/commit/3f1e7ef5344c3236bcabf3982dbdc985c43bc078
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/test/MC/LoongArch/Directives/cfi.s
Log Message:
-----------
[LoongArch] Support parsing register names in CFI instructions
Reviewed By: MQ-mengqing, heiher, xen0n
Pull Request: https://github.com/llvm/llvm-project/pull/117120
Commit: 454398ab04e2cd773a4b264433eb841e8cec0470
https://github.com/llvm/llvm-project/commit/454398ab04e2cd773a4b264433eb841e8cec0470
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
Log Message:
-----------
[MLIR] Add missing memory read effect on memref.reshape (#117130)
The memory read effect on a memref.reshape argument was missing. This in
turn led to
analyses relying on memory effects making incorrect conclusions.
Commit: bd15c7c1ca314708799bdc7bf8a7f27288cf7c85
https://github.com/llvm/llvm-project/commit/bd15c7c1ca314708799bdc7bf8a7f27288cf7c85
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M lld/test/ELF/lto/riscv-attributes.ll
M lld/test/ELF/riscv-attributes.s
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/attribute.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Make A implies Zaamo and Zalrsc (#116907)
Ref:
https://github.com/riscv/riscv-isa-manual/blob/main/src/a-st-ext.adoc.
Commit: 6b22e39f2615b6391e097500a70482da4b3ef63b
https://github.com/llvm/llvm-project/commit/6b22e39f2615b6391e097500a70482da4b3ef63b
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove the useless check for alternate instruction. (#117116)
Only BinaryOperator and CastInst support alternate instruction. It
always returns false for TreeEntry::isAltShuffle if an instruction is
ExtractElementInst, ExtractValueInst, LoadInst, StoreInst or
InsertElementInst.
Commit: ce66b56865426fc1760b5a090ca2748c046094f5
https://github.com/llvm/llvm-project/commit/ce66b56865426fc1760b5a090ca2748c046094f5
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][VPlan] Remove any-of reduction from precomputeCost. NFC (#117109)
The any-of reduction contains phi and select instructions.
The select instruction might be optimized and removed in the vplan which
may cause VF difference between legacy and VPlan-based model. But if the
select instruction be removed, `planContainsAdditionalSimplifications()`
will catch it and disable the assertion.
Therefore, we can just remove the ayn-of reduction calculation in the
precomputeCost().
Commit: 764cfd7d09647d7d49d5e0ae7b19ce0bd4b0968d
https://github.com/llvm/llvm-project/commit/764cfd7d09647d7d49d5e0ae7b19ce0bd4b0968d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
Revert "[flang][OpenMP] Avoid early returns, NFC (#117231)"
This reverts commit 1a08b155899ee3ed6a6c441799991a8be5df801e.
Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/157/builds/13427
Commit: 0e3c791916a918cd2d7391ddb633fbe5faa00b86
https://github.com/llvm/llvm-project/commit/0e3c791916a918cd2d7391ddb633fbe5faa00b86
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
Revert "[LV][VPlan] Remove any-of reduction from precomputeCost. NFC" (#117280)
Reverts llvm/llvm-project#117109
Some test cases need to update.
Commit: f082782c1b3ec98f50237ddfc92e6776013bf62f
https://github.com/llvm/llvm-project/commit/f082782c1b3ec98f50237ddfc92e6776013bf62f
Author: thetruestblue <bblueconway at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Log Message:
-----------
[NFC][Fuzzer] Extract CreateGateBranch method. (#117236)
A Pre-commit for use in adding gated tracing callbacks support to
trace-cmp
[#113227](https://github.com/llvm/llvm-project/pull/113227/commits/53b316d74683064f2db88ec401f6c3018ee6896a)
rdar://135404160
Patch by: Andrea Fioraldi
Commit: f84fc44f1a46969817bfd1b38991f7e43a8efe1d
https://github.com/llvm/llvm-project/commit/f84fc44f1a46969817bfd1b38991f7e43a8efe1d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
Log Message:
-----------
[RISCV][GISel] Make s16->s32 G_ANYEXT/SEXT/ZEXT legal.
Commit: 3761b675196f2c5ac31bf5fe027f6bb2907ff2a9
https://github.com/llvm/llvm-project/commit/3761b675196f2c5ac31bf5fe027f6bb2907ff2a9
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase (#117097)
This is a re-upload of #116934, which was reverted.
The dialect conversion driver has three phases:
- **Create** `IRRewrite` objects as the IR is traversed.
- **Finalize** `IRRewrite` objects. During this phase, source
materializations for mismatching value types are created. (E.g., when
`Value` is replaced with a `Value` of different type, but there is a
user of the original value that was not modified because it is already
legal.)
- **Commit** `IRRewrite` objects. During this phase, all remaining IR
modifications are materialized. In particular, SSA values are actually
being replaced during this phase.
This commit removes the "finalize" phase. This simplifies the code base
a bit and avoids one traversal over the `IRRewrite` stack. Source
materializations are now built during the "commit" phase, right before
an SSA value is being replaced.
This commit also removes the "inverse mapping" of the conversion value
mapping, which was used to predict if an SSA value will be dead at the
end of the conversion. This check is replaced with an approximate check
that does not require an inverse mapping. (A false positive for `v` can
occur if another value `v2` is mapped to `v` and `v2` turns out to be
dead at the end of the conversion. This case is not expected to happen
very often.) This reduces the complexity of the driver a bit and removes
one potential source of bugs. (There have been bugs in the usage of the
inverse mapping in the past.)
`BlockTypeConversionRewrite` no longer stores a pointer to the type
converter. This pointer is now stored in `ReplaceBlockArgRewrite`.
This commit is in preparation of merging the 1:1 and 1:N dialect
conversion driver. It simplifies the upcoming changes around the
conversion value mapping. (API surface of the conversion value mapping
is reduced.)
Commit: 1490f38b2253a10fcb186a18dd2875cbbeb89fd1
https://github.com/llvm/llvm-project/commit/1490f38b2253a10fcb186a18dd2875cbbeb89fd1
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Avoid make<ArmCmseSGVeneer>
Store them as unique_ptr in sgVeneers instead.
Commit: d71fa331df49450361a9e5cd4e48ae4a79b6126b
https://github.com/llvm/llvm-project/commit/d71fa331df49450361a9e5cd4e48ae4a79b6126b
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/SymbolContext.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-inline-function.s
Log Message:
-----------
[lldb] Fix inline function resolution for discontinuous functions (#116777)
The problem here is the assumption that the entire function will be
placed in a single section. This will ~never be the case for a
discontinuous function, as the point of splitting the function is to let
the linker group parts of the function according to their "hotness".
The fix is to change the offset computation to use file addresses
instead.
Commit: 994c544c18c86cbdb6536aae5d27ef7e2f592486
https://github.com/llvm/llvm-project/commit/994c544c18c86cbdb6536aae5d27ef7e2f592486
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
doc: Clarify that ffile-prefix-map applies to fcoverage-prefix-map, too [NFC] (#117135)
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: 925e1956cd5039fa2489b802d25555e247c34175
https://github.com/llvm/llvm-project/commit/925e1956cd5039fa2489b802d25555e247c34175
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseExpr.cpp
M clang/test/AST/ast-dump-recovery.cpp
Log Message:
-----------
[Clang] enhance error recovery with RecoveryExpr for trailing commas in call arguments (#114684)
Fixes #100921
Commit: a9882bda96228ca23e166a817f93a7dbc99763cb
https://github.com/llvm/llvm-project/commit/a9882bda96228ca23e166a817f93a7dbc99763cb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
Log Message:
-----------
[libc++] Mark charconv test as unsupported under msan (#116933)
Commit: 5518bb215b51cc339c3ecac064032f6791ae6476
https://github.com/llvm/llvm-project/commit/5518bb215b51cc339c3ecac064032f6791ae6476
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
Log Message:
-----------
[clangd] Check getFunctionTypeLoc() for validity in InlayHintVisitor (#117296)
Fixes https://github.com/clangd/clangd/issues/2223
Commit: eac8ea323a2a478dcf53f994c7b0369bfb10747c
https://github.com/llvm/llvm-project/commit/eac8ea323a2a478dcf53f994c7b0369bfb10747c
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
[SystemZ] Modify tests for constrained rounding functions (#116952)
The existing tests for constrained functions often use constant
arguments. If constant evaluation is enhanced, such tests will not check
code generation of the tested functions. To avoid it, the tests are
modified to use loaded value instead of constants. Now only the tests
for rounding functions are changed.
Commit: 562c93a165e5bb85b0cf464bbb157b33a668af83
https://github.com/llvm/llvm-project/commit/562c93a165e5bb85b0cf464bbb157b33a668af83
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/include/mlir/Query/QuerySession.h
Log Message:
-----------
[mlir] IWYU mlir/include/mlir/Query/QuerySession.h
Commit: 92301180f7e2d240c560f621f6fc1b07217cac01
https://github.com/llvm/llvm-project/commit/92301180f7e2d240c560f621f6fc1b07217cac01
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/SplitFunctions.cpp
A bolt/test/X86/exceptions-compact.s
Log Message:
-----------
[BOLT] Use compact EH format for fixed-address executables (#117274)
Use ULEB128 format for emitting LSDAs for fixed-address executables,
similar to what we use for PIEs/DSOs. Main difference is that we don't
use landing pad trampolines when landing pads are not contained in a
single fragment. Instead, we fallback to emitting larger fixed-address
LSDAs, which is still better than adding trampoline instructions.
Commit: 2cc5b493cb5c7df4d7f3acfb493725b2bb7082f5
https://github.com/llvm/llvm-project/commit/2cc5b493cb5c7df4d7f3acfb493725b2bb7082f5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add fhahn as ConstraintElimination maintainer (#117006)
Commit: 157d847ba737b4136aeb1d92912f549ea1c96d4c
https://github.com/llvm/llvm-project/commit/157d847ba737b4136aeb1d92912f549ea1c96d4c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
[PowerPC] Use getSignedConstant() where necessary (#117177)
This is to prevent assertion failures when we disable implicit
truncation in getConstant().
getCanonicalConstSplat() works with a mix of unsigned and signed values,
so I explicitly truncate the APInt there.
Commit: 632c5d29919ce93dc5f33fd729a0b97adc7c831b
https://github.com/llvm/llvm-project/commit/632c5d29919ce93dc5f33fd729a0b97adc7c831b
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
Log Message:
-----------
[VPlan] Support VPReverseVectorPointer in DataWithEVL vectorization (#113667)
VPReverseVectorPointer relies on the runtime VF, but in DataWithEVL
tail-folding, EVL (which can be less than VF at runtime) should be used
instead.
This patch updates the logic to check the users of VF and replaces the
second operand if the user is VPReverseVectorPointer.
Commit: 05fcdd555eaac74717cd132ca434c90ae99381dd
https://github.com/llvm/llvm-project/commit/05fcdd555eaac74717cd132ca434c90ae99381dd
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir
Log Message:
-----------
[MLIR][SPIRV-TO-LLVM] Support SPV_INTEL_split_barrier ops (#116648)
Add conversion to LLVM for `SPV_INTEL_split_barrier` operations via
conversion to SPIR-V built-ins.
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 1d4602070f96c9a6921d51a3b907f90cd2e3ae32
https://github.com/llvm/llvm-project/commit/1d4602070f96c9a6921d51a3b907f90cd2e3ae32
Author: tangaac <tangyan01 at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mld-seq-sa.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
Log Message:
-----------
[LoongArch] Support LA V1.1 feature ld-seq-sa that don't generate dbar 0x700. (#116762)
Two options for clang
-mld-seq-sa: Do not generate load-load barrier instructions (dbar 0x700)
-mno-ld-seq-sa: Generate load-load barrier instructions (dbar 0x700)
The default is -mno-ld-seq-sa
Commit: ef206446f2bbcb1bacc73d7611a96c457f59499f
https://github.com/llvm/llvm-project/commit/ef206446f2bbcb1bacc73d7611a96c457f59499f
Author: Youngsuk Kim <joseph942010 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/integer-overflow.cpp
Log Message:
-----------
[clang] Warn const integer-overflow of member in temporary struct bound to rvalue reference (#117225)
Fixes #46755
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Commit: 294c5cb2bea88fa048e00757188749f074c5b09f
https://github.com/llvm/llvm-project/commit/294c5cb2bea88fa048e00757188749f074c5b09f
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Type.h
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/target-type-properties.ll
Log Message:
-----------
[IR] Add TargetExtType::CanBeLocal property (#99016)
Add a property to allow marking target extension types that cannot be
used in an alloca instruction or byval argument, similar to CanBeGlobal
for global variables.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: cc721dba4e94c1d28214f81da0f1af79b6ca4218
https://github.com/llvm/llvm-project/commit/cc721dba4e94c1d28214f81da0f1af79b6ca4218
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-extract-subvector.ll
Log Message:
-----------
[AArch64][Codegen] Improve small shufflevector/concat lowering for SME (#116662)
This now tries to widen the shuffle before generating a possibly
expensive SVE TBL, this may allow the shuffle to be matched as something
cheaper like a ZIP1.
Commit: fdb1bf9b5949b2a97041922405a812a060fce5f4
https://github.com/llvm/llvm-project/commit/fdb1bf9b5949b2a97041922405a812a060fce5f4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
Log Message:
-----------
[LoongArch] Use getSignedConstant() where necessary (#117172)
To prevent assertion failures when we disable implicit truncation in
getConstant().
Commit: 063a6f70a6e86deb81fe6b1f24fecb7774d8cb44
https://github.com/llvm/llvm-project/commit/063a6f70a6e86deb81fe6b1f24fecb7774d8cb44
Author: Martin Storsjö <martin at martin.st>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lld/MinGW/Options.td
Log Message:
-----------
[LLD] [MinGW] Get rid of trailing whitespace. NFC.
Commit: 55e9afab6e5fc2fd2d456567657cfdf08920bb65
https://github.com/llvm/llvm-project/commit/55e9afab6e5fc2fd2d456567657cfdf08920bb65
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove the useless check for alternate instruction. (#117293)
Only BinaryOperator and CastInst support alternate instruction. It
always returns false for TreeEntry::isAltShuffle if an instruction is
ExtractElementInst, ExtractValueInst, LoadInst, StoreInst or
InsertElementInst.
Commit: 68aa6ac58c2bd59cac15417e7d8356ef8382dabd
https://github.com/llvm/llvm-project/commit/68aa6ac58c2bd59cac15417e7d8356ef8382dabd
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove redundant computation in getReorderingData. (#117295)
Commit: cac13606c20ee6e78b04dd3b36af2c0ee61ab9ef
https://github.com/llvm/llvm-project/commit/cac13606c20ee6e78b04dd3b36af2c0ee61ab9ef
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/EdgeBundles.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/EdgeBundles.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SpillPlacement.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
Log Message:
-----------
[CodeGen][NewPM] Port EdgeBundles analysis to NPM (#116616)
Commit: dde9477d8c0b85d445f10b08b0120f3d361cb77f
https://github.com/llvm/llvm-project/commit/dde9477d8c0b85d445f10b08b0120f3d361cb77f
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/SparseSet.h
M llvm/unittests/ADT/SparseSetTest.cpp
Log Message:
-----------
[NFC] Use unique_ptr in SparseSet (#116617)
This allows implementing the move constructor.
Commit: 775148f2367600f90d28684549865ee9ea2f11be
https://github.com/llvm/llvm-project/commit/775148f2367600f90d28684549865ee9ea2f11be
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
We can get these information via `sys_riscv_hwprobe`.
This can be used to implement `__builtin_cpu_is`.
Commit: c11b6b1b8af7454b35eef342162dc2cddf54b4de
https://github.com/llvm/llvm-project/commit/c11b6b1b8af7454b35eef342162dc2cddf54b4de
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/RISCV/builtin-cpu-is-error.c
A clang/test/CodeGen/RISCV/builtin-cpu-is.c
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/TargetParser/RISCVTargetParser.cpp
Log Message:
-----------
[RISCV] Support __builtin_cpu_is
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.
We can support `__builtin_cpu_is` via comparing values in compiler's
CPU definitions and `__riscv_cpu_model`.
This depends on #116202.
Reviewers: lenary, BeMg, kito-cheng, preames, lukel97
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/116231
Commit: 3c621b1e2069d7853ebd849b0dd796bea5f732bf
https://github.com/llvm/llvm-project/commit/3c621b1e2069d7853ebd849b0dd796bea5f732bf
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
Log Message:
-----------
[MSP430] Use getSignedTargetConstant()
The displacement is signed.
Commit: b36fcf4f493ad9d30455e178076d91be99f3a7d8
https://github.com/llvm/llvm-project/commit/b36fcf4f493ad9d30455e178076d91be99f3a7d8
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/TargetParser/RISCVTargetParser.cpp
Log Message:
-----------
[RISCV] Rename variable CPUModel to Model
The variable name can't be the same as the struct name or we will
have "error: declaration of ‘llvm::RISCV::CPUModel llvm::RISCV::CPUInfo::CPUModel’
changes meaning of ‘CPUModel’ [-fpermissive]".
Commit: 11ee21671f7d4b02222763eebfcb221c9598605e
https://github.com/llvm/llvm-project/commit/11ee21671f7d4b02222763eebfcb221c9598605e
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
R lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
Revert " [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#117071)"
This reverts commit f06c187799d910fd3ac3e9106397e5eecff9f265.
Temporary revert: there is https://github.com/llvm/llvm-project/pull/117239 that is suppose to fix the issue.
Reverting to keep things rolling.
Commit: a9731dff0a0133f718e8e4fb6c729aa1d7c909a4
https://github.com/llvm/llvm-project/commit/a9731dff0a0133f718e8e4fb6c729aa1d7c909a4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode][NFC] Avoid a getSource() call (#117311)
This is only needed when we actually emit a diagnostic, so move the
getSource() after the early return.
Commit: d1dae1e8612a2fa69d0d731e16d07baf8ce10c85
https://github.com/llvm/llvm-project/commit/d1dae1e8612a2fa69d0d731e16d07baf8ce10c85
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
R clang/test/CodeGen/RISCV/builtin-cpu-is-error.c
R clang/test/CodeGen/RISCV/builtin-cpu-is.c
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
Revert "[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)" chain
This reverts commit b36fcf4f493ad9d30455e178076d91be99f3a7d8.
This reverts commit c11b6b1b8af7454b35eef342162dc2cddf54b4de.
This reverts commit 775148f2367600f90d28684549865ee9ea2f11be.
multiple bot build breakages, e.g. https://lab.llvm.org/buildbot/#/builders/3/builds/8076
Commit: f84903486cd174e39fb36fa88c98c9563b671c7e
https://github.com/llvm/llvm-project/commit/f84903486cd174e39fb36fa88c98c9563b671c7e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
M clang/test/Sema/amdgcn-address-spaces.c
Log Message:
-----------
[AMDGPU] Do not allow the region address space to be converted to generic (#117171)
Summary:
Previous changes relaxed the address space rules based on what the
target says about them. This accidentally included the AS(2) region as
convertible to generic. Simply check for AS(2) and reject it.
Commit: 676a1e6643c7f8db22607fb98984965d51518b40
https://github.com/llvm/llvm-project/commit/676a1e6643c7f8db22607fb98984965d51518b40
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[AMDGPU] Remove uses of deprecreated HSA executable functions (#117241)
Summary:
These functions were deprecated in ROCR 1.3 which was released quite
some time ago. The main functionality that was lost was modifying and
inspecting the code object indepedently of the executable, however we do
all of that custom through our ELF API. This should be within the
versions of other functions we use.
Commit: 86b69c31642e98f8357df62c09d118ad1da4e16a
https://github.com/llvm/llvm-project/commit/86b69c31642e98f8357df62c09d118ad1da4e16a
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
Log Message:
-----------
[SPIR-V] Fix SPIR-V extension SPV_INTEL_function_pointers: introduce CodeSectionINTEL (#117250)
This PR fixes generation of OpConstantFunctionPointerINTEL instruction
for the SPIR-V extension SPV_INTEL_function_pointers. Result type of
OpConstantFunctionPointerINTEL must be OpTypePointer with Storage Class
operand equal to CodeSectionINTEL.
See also https://github.com/llvm/llvm-project/pull/116636
CC: @MrSidims
Commit: 5405f54b014666fb8fe9c981a71593e3861cb3d7
https://github.com/llvm/llvm-project/commit/5405f54b014666fb8fe9c981a71593e3861cb3d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/Lanai/LanaiInstrInfo.td
Log Message:
-----------
[Lanai] Use getSignedTargetConstant() for signed immediate
Commit: 2e07c2b1bf2bde62eaefe85494a8d2740f4b5ae8
https://github.com/llvm/llvm-project/commit/2e07c2b1bf2bde62eaefe85494a8d2740f4b5ae8
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRISelLowering.cpp
Log Message:
-----------
[AVR] Use getSignedConstant() for negative number
Commit: 8b4909111228e30ca3abdf3e40b04b9de9690714
https://github.com/llvm/llvm-project/commit/8b4909111228e30ca3abdf3e40b04b9de9690714
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
Log Message:
-----------
[Sparc] Use getSignedConstant() where necessary
This avoids assertion failures once we disable implicit
truncation in getConstant().
Commit: 88959324710a5a24687162642d4faf7e056743c5
https://github.com/llvm/llvm-project/commit/88959324710a5a24687162642d4faf7e056743c5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[NVPTX] Avoid implicit truncation in getConstant()
Either use getSignedConstant() or change variable type to unsigned
to avoid unnecessary sign extension in the first place.
Commit: 22fdc57140283d053207ea5763dc03ec7770a8ff
https://github.com/llvm/llvm-project/commit/22fdc57140283d053207ea5763dc03ec7770a8ff
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonIntrinsics.td
M llvm/lib/Target/Hexagon/HexagonPatterns.td
Log Message:
-----------
[Hexagon] Avoid implicit truncation in getConstant()
Use getSignedConstant() or change variable type as appropriate.
This will avoid assertion failures when implicit truncation is
disabled.
Commit: 556ea5265a254aabfd8d520a3b841785e99f4328
https://github.com/llvm/llvm-project/commit/556ea5265a254aabfd8d520a3b841785e99f4328
Author: Raghu Maddhipatla <7686592+raghavendhra at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/nested-target.f90
Log Message:
-----------
[Flang] [Semantics] [OpenMP] Added missing semantic check with nested target region. (#115344)
Issue semantic warning for any combination of nested OMP TARGET
directives inside another OMP TARGET region.
This change would not affect OMP TARGET inside an OMP TARGET DATA.
However, it issues warning for OMP TARGET DATA inside an OMP TARGET
region.
Commit: ecaf2c335cd612646086ec53315cb1018a5b9d91
https://github.com/llvm/llvm-project/commit/ecaf2c335cd612646086ec53315cb1018a5b9d91
Author: Petr Kurapov <petr.a.kurapov at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorDistribution.h
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/ops.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[MLIR] Move warp_execute_on_lane_0 from vector to gpu (#116994)
Please see the related RFC here:
https://discourse.llvm.org/t/rfc-move-execute-on-lane-0-from-vector-to-gpu-dialect/82989.
This patch does exactly one thing - moves the op to gpu.
Commit: 4389220549285fc9ef1e96f762eafa5f79a5d1ee
https://github.com/llvm/llvm-project/commit/4389220549285fc9ef1e96f762eafa5f79a5d1ee
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[Clang] Prevent potential null pointer dereferences (#117176)
This commit addresses several null pointer issues identified by static
analysis by replacing dyn_cast<> with cast<> and getAs<> with castAs<>
in various parts of the Clang codebase. The cast and castAs method is
used to ensure that the type is correctly cast, which helps prevent
potential null pointer dereferences.
Changes:
1. ASTContext.cpp:
Replaced dyn_cast with cast to ensure that the type is correctly cast to
AttributedType.
2. SemaFunctionEffects.cpp:
Replaced getAs with castAs to ensure that the type is correctly cast to
FunctionProtoType.
3. SemaHLSL.cpp:
Replaced getAs with castAs to ensure that the type is correctly cast to
VectorType.
Commit: c7d5ef420d66bf321999a5c922dd6e77f8dc2e9d
https://github.com/llvm/llvm-project/commit/c7d5ef420d66bf321999a5c922dd6e77f8dc2e9d
Author: vannem-sj <vannem at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
R libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/operator[].pass.cpp
A libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/subscript_operator.pass.cpp
Log Message:
-----------
[libc++] Rename operator[].pass.cpp to subscript_operator.pass.cpp (#117216)
This filename includes non FAT32 legal characters, and has caused a few
issues with glob tools that don't escape brackets properly.
Commit: 14bdcefbd88f35e31064241b52bccfabfb027499
https://github.com/llvm/llvm-project/commit/14bdcefbd88f35e31064241b52bccfabfb027499
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))
Currently sequences reduction_add(ext(<n x i1>)) are modeled as vector
extensions + reduction add, but later instcombiner transforms it into
ext(ctcpop(bitcast <n x i1> to int n)). Patch adds direct support for
this in SLP vectorizer, which enables better cost estimation.
AVX512, -O3+LTO
CINT2006/445.gobmk - extra vector code
Prolangs-C/bison - extra vector code
Benchmarks/NPB-serial/is - 16 x + 8 x reductions vectorized as 24
x reduction
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/116875
Commit: 4da960b898f404d91109b50d423c3db400b4e9a8
https://github.com/llvm/llvm-project/commit/4da960b898f404d91109b50d423c3db400b4e9a8
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
We can get these information via `sys_riscv_hwprobe`.
This can be used to implement `__builtin_cpu_is`.
Commit: 875b10f7d0888ca7e53f527f4c30531bd6b50bfb
https://github.com/llvm/llvm-project/commit/875b10f7d0888ca7e53f527f4c30531bd6b50bfb
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/RISCV/builtin-cpu-is-error.c
A clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/Preprocessor/has_builtin_cpuid.c
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/TargetParser/RISCVTargetParser.cpp
Log Message:
-----------
[RISCV] Support __builtin_cpu_is
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.
We can support `__builtin_cpu_is` via comparing values in compiler's
CPU definitions and `__riscv_cpu_model`.
This depends on #116202.
Reviewers: lenary, BeMg, kito-cheng, preames, lukel97
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/116231
Commit: 912c502a9e4bab8e07de4419f8cbae35c98b112f
https://github.com/llvm/llvm-project/commit/912c502a9e4bab8e07de4419f8cbae35c98b112f
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/test/AST/attr-lifetime-capture-by.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
Log Message:
-----------
[clang] Infer lifetime_capture_by for STL containers (#117122)
This is behind `-Wdangling-capture` warning which is disabled by default.
Commit: b8eef18868570b2f5244d6d43de02a1812d1c880
https://github.com/llvm/llvm-project/commit/b8eef18868570b2f5244d6d43de02a1812d1c880
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] port ecaf2c335cd612646086ec53315cb1018a5b9d91
Commit: 720a4c70edd0a9815f0e830d8ad4e1c322e404ae
https://github.com/llvm/llvm-project/commit/720a4c70edd0a9815f0e830d8ad4e1c322e404ae
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
[lldb] Fix DW_OP_piece-O3 test on AArch64 Windows (#117336)
Making a breakpoint on a line causes an error on aarch64-pc-windows.
This patch changes the test so that a breakpoint can be made on a
function name.
#117168
Commit: 20cb4ec845dec70f304c054ba5b45c0a388112b8
https://github.com/llvm/llvm-project/commit/20cb4ec845dec70f304c054ba5b45c0a388112b8
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/utils/analyzer/exploded-graph-rewriter.py
Log Message:
-----------
[analyzer] Print the PostInitializer target in exploded-graph-rewriter (#116034)
This aids debugging PostInitializer program points by knowing what is
the location being initialized.
Commit: c4aa83840b72b9eb94e6bc2088326fb27c43ada6
https://github.com/llvm/llvm-project/commit/c4aa83840b72b9eb94e6bc2088326fb27c43ada6
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
Improve slightly the pre-commit git hook usage of the auto-format helper (#117326)
The default mode does not provide a way to see the actual failure of the
formatters without modifying the code. Instead offer the user the option
to rerun with a `FORMAT_HOOK_VERBOSE=1` environment variable to print
the actual formatting diff.
Commit: 7fcc0f9065727c2c3151f7103c9d2803e507c7b7
https://github.com/llvm/llvm-project/commit/7fcc0f9065727c2c3151f7103c9d2803e507c7b7
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/GPU/SelectObjectAttr.cpp
M mlir/test/Target/LLVMIR/gpu.mlir
Log Message:
-----------
Populate the llvm::GlobalVariable ELF section, with the attribute from the ObjectAttrs (#117246)
Commit: 7ce00148f86db3fee41cdf4e224e0af069dd1a00
https://github.com/llvm/llvm-project/commit/7ce00148f86db3fee41cdf4e224e0af069dd1a00
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] remove duplicated test line in VOP2 test (#117195)
This is a NFC change. Remove duplicated test line in gfx11/gfx12 vop2
test file with the latest update_mc_test_script.py --unique option
This is also preparing for the up-coming true16 change
Commit: 026af9e972469c878e51f1215659b7264da0136d
https://github.com/llvm/llvm-project/commit/026af9e972469c878e51f1215659b7264da0136d
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] remove duplicated test line in VOP3 test (#117193)
This is a NFC change. Remove duplicated test line in gfx11/gfx12 vop3
test file with the latest `update_mc_test_script.py --unique` option
This is also preparing for the up-coming true16 change
Commit: 1fd8d3fea53e6e4573cdce55bd38ef0a7813a442
https://github.com/llvm/llvm-project/commit/1fd8d3fea53e6e4573cdce55bd38ef0a7813a442
Author: Chuvak <demenev2002 at yandex.ru>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Vector/IR/ScalableValueBoundsConstraintSet.cpp
Log Message:
-----------
[mlir] Fix wrong names in LinalgOps and ScalableValueBoundsConstraintSet (#117227)
Fix for some mistakes in source code found using PVS Studio.
Inspired by: https://pvs-studio.com/en/blog/posts/cpp/1188/
Fixed:
- [Bug 2](https://pvs-studio.com/en/blog/posts/cpp/1188/#ID725051E718)
- [Bug 3](https://pvs-studio.com/en/blog/posts/cpp/1188/#IDFA2459368E)
Commit: 9ea2a4aabe0902ee176f449825139e32642f4dd9
https://github.com/llvm/llvm-project/commit/9ea2a4aabe0902ee176f449825139e32642f4dd9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] IsNOT - cleanup comments for each match. NFC.
Preparation for a refactor of IsNOT to better handle oneuse cases - move comments next to each match.
Commit: 4cc278587f3f44df08c6bebc0b4887f8522143f1
https://github.com/llvm/llvm-project/commit/4cc278587f3f44df08c6bebc0b4887f8522143f1
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
M llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
Log Message:
-----------
[AMDGPU][True16][MC] VOPC profile fake16 pseudo update (#113175)
Update VOPC profile with VOP3 pseudo:
1. On GFX11+, v_cmp_class_f16 has src1 type f16 for literals, however
it's semantically interpreted as an integer. Update VOPC class f16
profile from operand type f16, i16 to f16, f16, currently updating it
for fake16 format, and will update t16 format in the following patch.
2. 16bit V_CMP_CLASS instructions (V_CMP_**_U/I/F16) are named with
`t16`, but actually using 32 bit registers. Correct it by updating the
pseudo definitions with useRealTrue16/useFakeTrue16 predicates and
rename these `t16` instructions to `fake16`.
3. Update the inst select so that `t16`/`fake16` instructions are
selected in true16/fake16 flow.
4. The mir test file are impacted for a name change of these impacted 16
bit V_CMP instructions, but non-functional change to emitted code
Commit: 39913ae095dc9fd25465e70297ce900c300c80a5
https://github.com/llvm/llvm-project/commit/39913ae095dc9fd25465e70297ce900c300c80a5
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP][REVEC] Make reorderTopToBottom support ShuffleVectorInst. (#117310)
We don't want reorderTopToBottom to reorder ShuffleVectorInst (because
ShuffleVectorInst currently supports only a limited set of patterns).
Either we make ShuffleVectorInst support more patterns, or we let
ReorderIndices reorder the result of the vectorization of
ShuffleVectorInst. We choose the latter solution.
Commit: 61f1dc05a88de38afcb337ef194cfdb7dc798197
https://github.com/llvm/llvm-project/commit/61f1dc05a88de38afcb337ef194cfdb7dc798197
Author: tlemy <138604946+tlemy at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/CXX/class.access/class.friend/p11.cpp
M clang/test/SemaCXX/function-redecl.cpp
Log Message:
-----------
Added more descriptive message (issue 116808) (#117201)
The dialogue messages were changed to be more descriptive.
Fixes #116808
Commit: 9c9e030fba868b3d3bf2ce84ff3c7078686b99e2
https://github.com/llvm/llvm-project/commit/9c9e030fba868b3d3bf2ce84ff3c7078686b99e2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP][NFC]Add a test with the RISCV ctpop-based reduction
Commit: b71038a69ee95f5dd740f99a1cb7aefde0859562
https://github.com/llvm/llvm-project/commit/b71038a69ee95f5dd740f99a1cb7aefde0859562
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
Log Message:
-----------
[AIX] Fix AIX BuildBot failure as AIX linker doesn't support version script. (#117342)
AIX BuildBot failed due to
https://github.com/llvm/llvm-project/pull/116556 as AIX linker does not
support version script.
This PR is to fix the failure
This PR is on behalf of gnikolov at ca.ibm.com
Commit: 05b3d26181ade32f5988d2be4939f605a5225782
https://github.com/llvm/llvm-project/commit/05b3d26181ade32f5988d2be4939f605a5225782
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/Preprocessor/riscv-target-features.c
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[clang][RISCV] Bump RVV intrinsic to version 1.0 (#116597)
The spec:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases/tag/v1.0.0-rc4
Also remove __riscv_v_intrinsic_overloading since it's no longer in
spec, the overloading intrinsics should be also enabled when RVV
intrinsics are defined.
Commit: 285754d79960e2416d43127703922cbf8647e284
https://github.com/llvm/llvm-project/commit/285754d79960e2416d43127703922cbf8647e284
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Fix closing brace indentation in validateOperandClass
Commit: 29f11f0a3240dff1e10ed3d4a5412ecb8c762327
https://github.com/llvm/llvm-project/commit/29f11f0a3240dff1e10ed3d4a5412ecb8c762327
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/test/CodeGen/X86/evex-to-vex-compress.mir
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/utils/TableGen/X86ManualInstrMapping.def
Log Message:
-----------
[X86] Add missing reg/imm attributes to VRNDSCALES instruction names (#117203)
More canonicalization of the instruction names to make the predictable - more closely matches VRNDSCALEP / VROUND equivalent instructions
Commit: ee0ca4e81f1fdd86d5eddc3290175fe8cb28b97f
https://github.com/llvm/llvm-project/commit/ee0ca4e81f1fdd86d5eddc3290175fe8cb28b97f
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
R clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
[HLSL] Add implicit resource element type concepts to AST (#116413)
This PR is step one on the journey to implement resource element type
validation via C++20 concepts. The PR sets up the infrastructure for
injecting implicit concept decls / concept specialization expressions
into the AST, which will then be evaluated after template arguments are
instantiated. This is not meant to be a complete implementation of the
desired validation for HLSL,
there are a couple of missing elements:
We need the __builtin_hlsl_is_typed_resource_element_compatible builtin
to be implemented.
We need other constraints, like is_intangible
We need to put the first 2 points together, and construct a finalized
constraint expression, which should differ between typed and raw buffers
This is just an initial PR that puts some of the core infrastructure in
place.
This PR is an edit of #112600, so that new tests that were put into main
don't fail
Fixes #75676
Commit: dc637e940cb115fe72408ba96ad2e5e2396a3e94
https://github.com/llvm/llvm-project/commit/dc637e940cb115fe72408ba96ad2e5e2396a3e94
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
Revert "[lldb] Fix DW_OP_piece-O3 test on AArch64 Windows" (#117354)
Reverts llvm/llvm-project#117336
Commit: 4be09f06242be9349f05016fb50d3dbb378600bf
https://github.com/llvm/llvm-project/commit/4be09f06242be9349f05016fb50d3dbb378600bf
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
[lldb][test] DW_OP_piece-O3.c: Disable on Windows (#117355)
#117168
Commit: 689c53219280151b6421d633d993ed886827849b
https://github.com/llvm/llvm-project/commit/689c53219280151b6421d633d993ed886827849b
Author: Artem Belevich <tra at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
A clang/test/Driver/cuda-no-threadsafe-statics.cu
Log Message:
-----------
[CUDA] pass -fno-threadsafe-statics to GPU sub-compilations. (#117074)
We do not have support for the threadsafe statics on the GPU side.
However, we do sometimes end up with empty local static initializers,
and those happen to trigger calls to `__cxa_guard*`, which breaks
compilation.
Partially addresses https://github.com/llvm/llvm-project/issues/117023
Commit: a5f501e347f66d66818fba5aa7dbc25a07299ca5
https://github.com/llvm/llvm-project/commit/a5f501e347f66d66818fba5aa7dbc25a07299ca5
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/asdouble.hlsl
A clang/test/SemaHLSL/BuiltIns/asdouble-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
A llvm/test/CodeGen/DirectX/asdouble.ll
Log Message:
-----------
[HLSL][DXIL] Implement `asdouble` intrinsic (#114847)
- define intrinsic as builtin in Builtins.td
- link intrinsic in hlsl_intrinsics.h
- add semantic analysis to SemaHLSL.cpp
- lower to `llvm` or a `dx` intrinsic when applicable in CGBuiltin.cpp
- define DXIL intrinsic in IntrinsicsDirectX.td
- add DXIL op and mapping in DXIL.td
- enable scalarization of intrinsic
- add basic sema checking to asdouble-errors.hlsl
Resolves #99081
Commit: f170f5fa80f244ccac51e9867de3ad823512a2d4
https://github.com/llvm/llvm-project/commit/f170f5fa80f244ccac51e9867de3ad823512a2d4
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/test/API/lang/c/stepping/TestStepAndBreakpoints.py
Log Message:
-----------
[lldb] Add stop_reason_data property to SBThread python extensions (#117266)
Add a pythonic `stop_reason_data` property to `SBThread`. The property
produces a list of ints.
Commit: a04b0d587a8d260063fe1d50f6fecdc585d75ff4
https://github.com/llvm/llvm-project/commit/a04b0d587a8d260063fe1d50f6fecdc585d75ff4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Module.h
M llvm/lib/IR/Module.cpp
M llvm/unittests/IR/ModuleTest.cpp
Log Message:
-----------
Implement Move-assignment for llvm::Module (NFC) (#117270)
Move-assignment is quite convenient in various situation, and
work-around having it available is very convoluted.
Commit: 5ac81a1d158e5b0577c33656235d90865d4682fb
https://github.com/llvm/llvm-project/commit/5ac81a1d158e5b0577c33656235d90865d4682fb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] Add test coverage for #79799
Commit: c87336fc46b32dfb62ebbb259a7a4ec3d354a283
https://github.com/llvm/llvm-project/commit/c87336fc46b32dfb62ebbb259a7a4ec3d354a283
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/unittests/IR/AffineMapTest.cpp
Log Message:
-----------
[mlir][test] Add unittests for `getInversePermutation` (#116945)
The only way to test `getInversePermutation` is through unit tests. The
concept of "inverse permutations" is tricky to document and these tests
are a good source documentation of the expected/intended behavoiur.
Hence these additional unit tests.
This is a follow-on of #114775 in which I added tests for
`isProjectedPermutation`.
Commit: 71f14ffba6ec8a6606911279781576e521c2b7dd
https://github.com/llvm/llvm-project/commit/71f14ffba6ec8a6606911279781576e521c2b7dd
Author: Artem Belevich <tra at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc.hip
Log Message:
-----------
[HIP] Fix tests broken by #117074 / 689c532 (#117361)
Commit: 7530e707afc60014624eb62bda9557cdc7f28dd0
https://github.com/llvm/llvm-project/commit/7530e707afc60014624eb62bda9557cdc7f28dd0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/test/MC/Disassembler/X86/x86-64.txt
Log Message:
-----------
[X86] Ignore REX prefixes not immediately before opcode (#117299)
The Intel X86 Architecture Manual says the following:
> A REX prefix is ignored, as are its individual bits, when it is not
needed
> for an instruction or when it does not immediately precede the opcode
byte or
> the escape opcode byte (0FH) of an instruction for which it is needed.
This
> has the implication that only one REX prefix, properly located, can
affect an
> instruction.
We currently do not handle these cases in the disassembler, leading to
incorrect disassembly. This patch rectifies the situation by treating
REX prefixes as standard prefixes rather than only expecting them before
the Opcode.
The motivating test case added as a test was fuzzer generated.
Commit: 23d7a6cedb5198535086a67586487f19effbd411
https://github.com/llvm/llvm-project/commit/23d7a6cedb5198535086a67586487f19effbd411
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/FrontendOptions.h
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/print-supported-cpus.f90
M flang/tools/flang-driver/fc1_main.cpp
Log Message:
-----------
[flang][Driver] Support -print-supported-cpus and associated aliases (#117199)
The aliases are -mcpu=help and -mtune=help. There is still an issue with
the output which prints an example line that references clang. That is
not fixed here because it is printed in llvm/MC/SubtargetInfo.cpp. Some
more thought is needed to determine how best to handle this.
Fixes #117010
Commit: 1683f84d289348ba6879635c4161979204f75230
https://github.com/llvm/llvm-project/commit/1683f84d289348ba6879635c4161979204f75230
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/test/CodeGen/AArch64/init-undef.mir
Log Message:
-----------
Revert "[InitUndef] handleSubReg should skip artificial subregs. (#116248)" (#117365)
Maybe not needed but to avoid conflicts with #117307
Without revert of this one, but reverting #117307, the
regenerated init-undef.mir became empty.
This reverts commit be15fd5085680cc5ed9ec4f4f2258b504cdd55db.
Commit: ad9dcd96dc895f57a3747fe68ef455e0bf43c805
https://github.com/llvm/llvm-project/commit/ad9dcd96dc895f57a3747fe68ef455e0bf43c805
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMRegisterInfo.td
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fp16-instructions.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
A llvm/test/CodeGen/ARM/fpscr-multi-use.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
Log Message:
-----------
Reland "[ARM] Stop gluing FP comparisons to FMSTAT" (#117248)
Following #116547, this changes the result of `ARMISD::CMPFP*` and the
operand of `ARMISD::FMSTAT` from a special `Glue` type to a normal type.
This change allows comparisons to be CSEd and scheduled around as can be
seen in the test changes.
Note that `ARMISD::FMSTAT` is still glued to its consumer nodes; this is
going to be changed in a separate patch.
This patch also sets `CopyCost` of `cl_FPSCR_NZCV` register class to a
negative value. The reason is the same as for CCR register class: it
makes DAG scheduler and InstrEmitter try to avoid copies of `FPCSR_NZCV`
register to / from virtual registers. Previously, this was not
necessary, since no attempt was made to create copies in the first
place.
`TRI::getCrossCopyRegClass` is modified in a way that prevents DAG
scheduler from copying FPSCR into a virtual register. The register
allocator might need to spill the virtual register, but that only seem
to work in Thumb mode.
Commit: 14a58a1390a72ba6c66606e58e86425dcb902763
https://github.com/llvm/llvm-project/commit/14a58a1390a72ba6c66606e58e86425dcb902763
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
R llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
Log Message:
-----------
Revert "[RegisterCoalescer] Fix up subreg lanemasks after rematerializing. (#116191)" (#117367)
To pass tests with #117307 revert.
This reverts commit 3093b29b597b9a936a3e4d1c8bc4a7ccba8fc848.
Commit: 1434d2ab215e3ea9c5f34689d056edd3d4423a78
https://github.com/llvm/llvm-project/commit/1434d2ab215e3ea9c5f34689d056edd3d4423a78
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
M llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
M llvm/test/CodeGen/AArch64/misched-bundle.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/preserve.ll
M llvm/test/CodeGen/AArch64/strpre-str-merge.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryComm-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryCommWithRev-merging.mir
R llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/CMakeLists.txt
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
Revert "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)" (#117307)
Details in #114827
This reverts commit c1c68baf7e0fcaef1f4ee86b527210f1391b55f6.
Commit: cf83a7fdc2dfac8220d9923a831181dccb9f7277
https://github.com/llvm/llvm-project/commit/cf83a7fdc2dfac8220d9923a831181dccb9f7277
Author: Lei Wang <wlei at fb.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/Object/ELFTypes.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
A llvm/test/tools/llvm-readobj/ELF/bb-addr-map-skip-bb-entries.test
M llvm/test/tools/yaml2obj/ELF/bb-addr-map-pgo-analysis-map.yaml
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/Object/ELFTypesTest.cpp
Log Message:
-----------
[SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (#114447)
Sometimes we want to use a `PgoAnalysisMap` feature that doesn't require
the BB entries info, e.g. only the `FuncEntryCount`, but the BB entries
is emitted by default, so I'm adding an option to skip the info for this
case to save the binary size(can save ~90% size of the section). For
implementation, it extends a new field(`OmitBBEntries`) in
`BBAddrMap::Features` for this and it's controlled by a switch
`--basic-block-address-map-skip-bb-entries`.
Note that this naturally supports backwards compatibility as the field
is zero for the old version, matches the decoding in the new version
llvm.
Commit: ad2bdd8fab7b0ba05d25ec68ee06cf89e45fe369
https://github.com/llvm/llvm-project/commit/ad2bdd8fab7b0ba05d25ec68ee06cf89e45fe369
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Remove MemProf format Version 1 (#117357)
This patch removes MemProf format Version 1 now that Version 2 and 3
are working well.
Commit: 6da8ff82a8a621c7d32eaf9667a845c0be03f2e6
https://github.com/llvm/llvm-project/commit/6da8ff82a8a621c7d32eaf9667a845c0be03f2e6
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll
Log Message:
-----------
[RISCV] Add explicit VLS test line for vector spill/fill
I got asked about this offline and realized we didn't really have
tests specific to the VLS frame lowering.
Commit: 8a5c24149da76083263887a68983d4ac242fc6f5
https://github.com/llvm/llvm-project/commit/8a5c24149da76083263887a68983d4ac242fc6f5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x64_bf8_bf8 for gfx950 (#117256)
Commit: 8d3435f8a111a39dc333c0ffeafd5ffe953f1f02
https://github.com/llvm/llvm-project/commit/8d3435f8a111a39dc333c0ffeafd5ffe953f1f02
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x64_bf8_fp8 for gfx950 (#117257)
Commit: 90dc644d73dc9d599da009daec7c45fad7f1269f
https://github.com/llvm/llvm-project/commit/90dc644d73dc9d599da009daec7c45fad7f1269f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x32x64_fp8_bf8 for gfx950 (#117258)
Commit: 7d544c64e3b6ea014c59e230dcf65ac4f9d60f2b
https://github.com/llvm/llvm-project/commit/7d544c64e3b6ea014c59e230dcf65ac4f9d60f2b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x64_fp8_fp8 for gfx950 (#117259)
Commit: a05a1d6eefe6bfb46d2e5ee6191a10cfefd64484
https://github.com/llvm/llvm-project/commit/a05a1d6eefe6bfb46d2e5ee6191a10cfefd64484
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/Verifier.cpp
A llvm/test/Verifier/AMDGPU/mfma-scale.ll
Log Message:
-----------
AMDGPU: Add basic verification for mfma scale intrinsics (#117048)
Verify the format is valid and the type is one of the expected
i32 vectors. Verify the used vector types at least cover the
requirements of the corresponding format operand.
Commit: 2fe947b47798de1ad20553be4e162e332428ad91
https://github.com/llvm/llvm-project/commit/2fe947b47798de1ad20553be4e162e332428ad91
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
[Clang] Add Doug Wyatt and myself as maintainers for function effect analysis (#117324)
Doug implemented quite literally all of it and has been continuously
improving the implementation by handling more language constructs we had
initially missed. I spent a lot of time reviewing the implementation of
the attributes as well as the analysis pass, so in other words, the two
of us are probably best equipped to answer any questions that might
arise wrt this part of Clang.
Commit: b8703369daf777706196ff914c0376c27adde3cf
https://github.com/llvm/llvm-project/commit/b8703369daf777706196ff914c0376c27adde3cf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
Log Message:
-----------
[SLP] Match poison as instruction with the same opcode
Patch allows to vector scalar instruction + poison values as if poisons
are instructions with the same opcode. It allows better vectorization of
the repeated values, reduces number of insertelement instructions and
serves as a base ground for copyable elements vectorization
AVX512, -O3 + LTO
JM/ldecod - better vector code
Applications/oggenc - better vectorization
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - better vector code
CFP2017rate/526.blender_r - better vector code
CFP2006/447.dealII - small variations
Benchmarks/Bullet - extra vector code
CFP2017rate/510.parest_r - better vectorization
CINT2017rate/502.gcc_r
CINT2017speed/602.gcc_s - extra vector code
Benchmarks/tramp3d-v4 - small variations
CFP2006/453.povray - extra vector code
JM/lencod - better vector code
CFP2017rate/511.povray_r - extra vector code
MemFunctions/MemFunctions - extra vector code
LoopVectorization/LoopVectorizationBenchmarks - extra vector code
XRay/FDRMode - extra vector code
XRay/ReturnReference - extra vector code
LCALS/SubsetCLambdaLoops - extra vector code
LCALS/SubsetCRawLoops - extra vector code
LCALS/SubsetARawLoops - extra vector code
LCALS/SubsetALambdaLoops - extra vector code
DOE-ProxyApps-C++/miniFE - extra vector code
LoopVectorization/LoopInterleavingBenchmarks - extra vector code
LCALS/SubsetBLambdaLoops - extra vector code
MicroBenchmarks/harris - extra vector code
ImageProcessing/Dither - extra vector code
MicroBenchmarks/SLPVectorization - extra vector code
ImageProcessing/Blur - extra vector code
ImageProcessing/Dilate - extra vector code
Builtins/Int128 - extra vector code
ImageProcessing/Interpolation - extra vector code
ImageProcessing/BilateralFiltering - extra vector code
ImageProcessing/AnisotropicDiffusion - extra vector code
MicroBenchmarks/LoopInterchange - extra code vectorized
LCALS/SubsetBRawLoops - extra code vectorized
CINT2006/464.h264ref - extra vectorization with wider vectors
CFP2017rate/508.namd_r - small variations, extra phis vectorized
CFP2006/444.namd - 2 2 x phi replaced by 4 x phi
DOE-ProxyApps-C/SimpleMOC - extra code vectorized
CINT2017rate/541.leela_r
CINT2017speed/641.leela_s - the function better vectorized and inlined
Benchmarks/Misc/oourafft - 2 4 x bit reductions replaced by 2 x vector code
FreeBench/fourinarow - better vectorization
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/115946
Commit: 7523086a050d679370dfd86a0166d5f7168ffa09
https://github.com/llvm/llvm-project/commit/7523086a050d679370dfd86a0166d5f7168ffa09
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP]Use getExtendedReduction cost and fix reduction cost calculations
Patch uses getExtendedReduction for reductions of ext-based nodes + adds
cost estimation for ctpop-kind reductions into basic implementation and
RISCV-V specific vcpop cost estimation.
Reviewers: RKSimon, preames
Reviewed By: preames
Pull Request: https://github.com/llvm/llvm-project/pull/117350
Commit: 028d41d7cf16ffaba1493d850a382a6d3eb814cf
https://github.com/llvm/llvm-project/commit/028d41d7cf16ffaba1493d850a382a6d3eb814cf
Author: Yashas Andaluri <quic_yandalur at quicinc.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/Hexagon/CMakeLists.txt
A llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
R llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
A llvm/test/CodeGen/Hexagon/load-widen.ll
M llvm/test/CodeGen/Hexagon/store-widen-aliased-load.ll
A llvm/test/CodeGen/Hexagon/widen-alias.ll
A llvm/test/CodeGen/Hexagon/widen-not-load.ll
A llvm/test/CodeGen/Hexagon/widen-volatile.ll
Log Message:
-----------
[Hexagon] Add Hexagon Load Widening Pass (#116330)
Extend existing store widening pass to widen load instructions.
This patch also borrows the alias check algorithm from AMDGPU's load
store widening pass.
Widened load instruction is inserted before the first candidate load
instruction.
Widened store instruction is inserted after the last candidate store
instruction.
This method helps avoid moving uses/defs when replacing load/store
instructions with their widened equivalents.
The pass has also been extended to
* Generate 64-bit widened stores
* Handle 32-bit post increment load/store
* Handle stores of non-immediate values
* Handle stores where the offset is a GlobalValue
Commit: 4ab5e90c9c52fcf9b4ed297c887b31219e41f7d8
https://github.com/llvm/llvm-project/commit/4ab5e90c9c52fcf9b4ed297c887b31219e41f7d8
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M flang/tools/flang-driver/CMakeLists.txt
Log Message:
-----------
[flang][Driver] Add correct libraries to driver
A recent commit (23d7a6cedb519853508) introduced a dependency on
libLLVMMC.so. This is to handle the `-print-supported-cpus` option which
uses `llvm/MC/SubtargetInfo`. It requires libLLVMMC to be linked into
the flang-driver which the previous commit did not do. This fixes that
issue.
Commit: 89614ceb401711d2389bac838d0059c95eadcfff
https://github.com/llvm/llvm-project/commit/89614ceb401711d2389bac838d0059c95eadcfff
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
A libc/shared/rpc.h
A libc/shared/rpc_util.h
M libc/src/__support/RPC/CMakeLists.txt
R libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_client.cpp
M libc/src/__support/RPC/rpc_client.h
R libc/src/__support/RPC/rpc_util.h
M libc/test/integration/startup/gpu/rpc_interface_test.cpp
M libc/test/integration/startup/gpu/rpc_stream_test.cpp
M libc/test/integration/startup/gpu/rpc_test.cpp
M libc/utils/gpu/server/rpc_server.cpp
Log Message:
-----------
[libc] Move RPC interface to `libc/shared` to export it (#117034)
Summary:
Previous patches have made the `rpc.h` header independent of the `libc`
internals. This allows us to include it directly rather than providing
an indirect C API. This patch only does the work to move the header. A
future patch will pull out the `rpc_server` interface and simply replace
it with a single function that handles the opcodes.
Commit: 182f9aad8b8a7b0141180056b36bb5f633138eb1
https://github.com/llvm/llvm-project/commit/182f9aad8b8a7b0141180056b36bb5f633138eb1
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M libc/src/sys/socket/linux/recvfrom.cpp
M libc/src/sys/socket/recvfrom.h
Log Message:
-----------
[libc] Fix unpoisoning for recvfrom (#117366)
Turns out there were also errors in the recvfrom unpoisoning logic. This
patch fixes those.
Commit: 5d9aabbab3bcb83c84d29432f374db5119a4b578
https://github.com/llvm/llvm-project/commit/5d9aabbab3bcb83c84d29432f374db5119a4b578
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/IR/DIBuilder.cpp
A llvm/test/tools/llvm-dwarfdump/AArch64/dwarf-lang-metal.ll
Log Message:
-----------
[dwarf] Add language id for Metal Shading Language (#117215)
Unfortunately there's no upstream frontend for Metal but since the id's
are now assigned by the DWARF standard I think it makes sense to have
the enums upstream to enable tools like llvm-dwarfdump. This patch
therefore uses an AArch64 test with artificially modified debug info to
verify that the Metal language id can be used.
https://dwarfstd.org/issues/241111.1.html
Commit: e131b0d241cd1226a335917f1a9f651baeeec61a
https://github.com/llvm/llvm-project/commit/e131b0d241cd1226a335917f1a9f651baeeec61a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/ARC/ARCInstrInfo.td
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
Log Message:
-----------
[SelectionDAG] Fix some SDNode type mismatches between *.td files and ISel (#117375)
This removes operands/results either in SDNode description or in ISel
code so that they match each other.
Commit: 1290e95849aaad2fbd813aa15da667b2103ecc64
https://github.com/llvm/llvm-project/commit/1290e95849aaad2fbd813aa15da667b2103ecc64
Author: Kazuki Sakamoto <sakamoto at splhack.org>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.h
Log Message:
-----------
[lldb] Fix ELF core debugging (#117070)
DynamicLoader does not use ProcessElfCore NT_FILE entries to get
UUID. Use GetModuleSpec to get UUID from Process.
Commit: 2704647fb7986673b89cef1def729e3b022e2607
https://github.com/llvm/llvm-project/commit/2704647fb7986673b89cef1def729e3b022e2607
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
Revert "Fix up MCPlusBuilder.cpp to account for W0_HI on AArch64"
This reverts commit 576865a50e6ccb74196c9491fa79575d6d7f0b0b.
Depends on #114827 that was reverted.
Commit: 094ef38b122357840265b1b0e17c065bdf150971
https://github.com/llvm/llvm-project/commit/094ef38b122357840265b1b0e17c065bdf150971
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn
Log Message:
-----------
[gn build] Port 028d41d7cf16
Commit: 0ffdaf445e72a152cc0707c9885046e55127af31
https://github.com/llvm/llvm-project/commit/0ffdaf445e72a152cc0707c9885046e55127af31
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port 1434d2ab215e
Commit: 8f50321256ecc1e7d433ca00baff47bd8a8bc81e
https://github.com/llvm/llvm-project/commit/8f50321256ecc1e7d433ca00baff47bd8a8bc81e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
A libcxx/src/.clang-tidy
Log Message:
-----------
[libc++] Add a .clang-tidy file to libcxx/src
This disables `readability-identifier-naming` for the source files,
since names don't have to by _Uglified in the source files. We currently
don't enforce clang-tidy in the source files, so this is only useful to
avoid a bunch of warnings when using an editor that shows the results of
clang-tidy.
Commit: 24ced771cc4eb6ff8429eb085f0ffbef0e906d07
https://github.com/llvm/llvm-project/commit/24ced771cc4eb6ff8429eb085f0ffbef0e906d07
Author: Renat Idrisov <4032256+parsifal-47 at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[MLIR] RemoveDeadValues: Allowing IRs with global constants to get dead values removed (#116519)
This change is related to discussion:
https://discourse.llvm.org/t/question-on-criteria-for-acceptable-ir-in-removedeadvaluespass/83131
I do not know the original reason to disallow the optimization on
modules with global private constant. Please let me know what am I
missing, I will be happy to make it better. Thank you!
CC: @Wheest
---------
Co-authored-by: Renat Idrisov <parsifal-47 at users.noreply.github.com>
Commit: ccb4702038900d82d1041ff610788740f5cef723
https://github.com/llvm/llvm-project/commit/ccb4702038900d82d1041ff610788740f5cef723
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
A llvm/test/ThinLTO/X86/Inputs/memprof-old-alloc-context-summary.bc
A llvm/test/ThinLTO/X86/memprof-old-alloc-context-summary.ll
Log Message:
-----------
[MemProf] Use radix tree for alloc contexts in bitcode summaries (#117066)
Leverage the support added to represent allocation contexts in a more
compact way via a radix tree in the indexed profile to similarly reduce
sizes of the bitcode summaries.
For a large target, this reduced the size of the per-module summaries by
about 18% and in the distributed combined index files by 28%.
Commit: fdb050a5024320ec29d2edf3f2bc686c3a84abaa
https://github.com/llvm/llvm-project/commit/fdb050a5024320ec29d2edf3f2bc686c3a84abaa
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
R llvm/test/ThinLTO/X86/Inputs/memprof-old-alloc-context-summary.bc
R llvm/test/ThinLTO/X86/memprof-old-alloc-context-summary.ll
Log Message:
-----------
Revert "[MemProf] Use radix tree for alloc contexts in bitcode summaries" (#117395)
Reverts llvm/llvm-project#117066
This is causing some build bot failures that need investigation.
Commit: b4e000e6005bd0f11240133aa335efcbb8424a23
https://github.com/llvm/llvm-project/commit/b4e000e6005bd0f11240133aa335efcbb8424a23
Author: Tom Lin <tom91136 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/LTO.cpp
M lld/MachO/Options.td
A lld/test/MachO/ltopasses-extension.ll
Log Message:
-----------
[LLD][MachO] Enable plugin support for LTO (#115690)
Add new CLI options for feature parity with ELF w.r.t pass plugins.
Most of the changes are ported directly from
https://github.com/llvm/llvm-project/commit/0c86198b279a98c8550fde318b59ed3ca0ca5045.
With this change, it is now possible to load and run external pass
plugins during the LTO phase.
Commit: d121d71fc7fcb8c969959147f5f58b31f9c6b251
https://github.com/llvm/llvm-project/commit/d121d71fc7fcb8c969959147f5f58b31f9c6b251
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M libc/src/__support/block.h
M libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
M libc/src/__support/freestore.h
M libc/src/__support/freetrie.h
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
M libc/test/src/__support/freestore_test.cpp
M libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
[libc][NFC] Remove template arguments from Block (#117386)
Commit: 9edbe566bfaff6af03c309ebbb229e6e9a717de3
https://github.com/llvm/llvm-project/commit/9edbe566bfaff6af03c309ebbb229e6e9a717de3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
R llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
A llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll
Log Message:
-----------
[RISCV] Move rvv-cfi-info.ll to rvv directory. NFC
Commit: aa5dc539e91824cbc224214e69d62d46db21af6e
https://github.com/llvm/llvm-project/commit/aa5dc539e91824cbc224214e69d62d46db21af6e
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrFragments.td
Log Message:
-----------
[X86] Fix the type of X86ISD::UMUL (#117377)
Same as SMUL, UMUL produces one result + flags, not two results + flags.
Commit: 776476c282bca71d5b856e80e0a88fbd6f3ccdd2
https://github.com/llvm/llvm-project/commit/776476c282bca71d5b856e80e0a88fbd6f3ccdd2
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/Bitcode/Writer/CMakeLists.txt
M llvm/lib/ProfileData/MemProf.cpp
A llvm/test/ThinLTO/X86/Inputs/memprof-old-alloc-context-summary.bc
A llvm/test/ThinLTO/X86/memprof-old-alloc-context-summary.ll
Log Message:
-----------
Reapply "[MemProf] Use radix tree for alloc contexts in bitcode summaries" (#117395) (#117404)
This reverts commit fdb050a5024320ec29d2edf3f2bc686c3a84abaa, and
restores ccb4702038900d82d1041ff610788740f5cef723, with a fix for build
bot failures.
Specifically, add ProfileData to the dependences of the BitWriter
library, which was causing shared library builds of LLVM to fail.
Reproduced the failure with a shared library build and confirmed this
change fixes that build failure.
Commit: beff2bacae76fe25c86c5bf7bccb2cbef93de047
https://github.com/llvm/llvm-project/commit/beff2bacae76fe25c86c5bf7bccb2cbef93de047
Author: Kasper Nielsen <kasper0406 at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
A mlir/test/get_darwin_real_python.py
M mlir/test/lit.cfg.py
Log Message:
-----------
[MLIR, Python] Make it easy to run tests with ASan on mac (#115524)
There are two things that make running MLIR tests with ASan on a mac
tedious:
1. The `DYLD_INSERT_LIBRARIES` environment variable needs to be set to
point to `libclang_rt.asan_osx_dynamic.dylib`
2. Mac is wrapping Python, which means that the `DYLD_INSERT_LIBRARIES`
environment variable is not being respected in the Python tests. The
solution is to find and use a non-wrapped Python binary.
With the above two changes, ASan works out of the box on mac's by
setting the `-DLLVM_USE_SANITIZER=Address` cmake flag.
I have stolen most of the code in this PR from other LLVM projects. It
may be a good idea to reconcile it somewhere.
Commit: dd8d85dba6e8f74a55fb5053107797e21894a0c6
https://github.com/llvm/llvm-project/commit/dd8d85dba6e8f74a55fb5053107797e21894a0c6
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Ignore lambda invocation with arguments (#117394)
Fixed a bug that UncountedLambdaCapturesChecker would emit a warning on
a lambda capture when the lambda is invoked with arguments.
LocalVisitor::VisitCallExpr was not tolerating a lambda invocation with
more than 1 arguments.
Commit: 5802367ddb46bcdeb0befeffbc99a1d72a5d9082
https://github.com/llvm/llvm-project/commit/5802367ddb46bcdeb0befeffbc99a1d72a5d9082
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/allocatable.h
A flang/include/flang/Runtime/CUDA/memmove-function.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/CMakeLists.txt
M flang/runtime/CUDA/allocatable.cpp
A flang/runtime/CUDA/memmove-function.cpp
M flang/runtime/CUDA/memory.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Add support for allocate with source (#117388)
Add support for allocate statement with CUDA device variable and a
source.
Commit: a0153eaa65e718f16fd22b4b784e0f8153f695d4
https://github.com/llvm/llvm-project/commit/a0153eaa65e718f16fd22b4b784e0f8153f695d4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[memprof] Fix builds under EXPENSIVE_CHECKS
memprof::Version1 has been removed, so the whole block of code is
dead.
Commit: 7a56dc724594691efce13d771902478544696182
https://github.com/llvm/llvm-project/commit/7a56dc724594691efce13d771902478544696182
Author: Félix-Antoine Constantin <60141446+felix642 at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/X86/tailcall-nofpclass.ll
Log Message:
-----------
[Clang] Attribute NoFPClass should not prevent tail call optimization. (#116741)
Fixes #111950
Commit: b3909f4298fd3679dc24483c6e5d455058955d84
https://github.com/llvm/llvm-project/commit/b3909f4298fd3679dc24483c6e5d455058955d84
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
Log Message:
-----------
[MLIR] Drop assumption of a surrounding builtin.func in promoteIfSingleIteration (#116323)
Drop assumption of a surrounding builtin.func in
promoteIfSingleIteration.
Fixes https://github.com/llvm/llvm-project/issues/116042
Commit: 4a0b8c3e7d4e9031181400d48ffcdf703bccce35
https://github.com/llvm/llvm-project/commit/4a0b8c3e7d4e9031181400d48ffcdf703bccce35
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
Log Message:
-----------
[MLIR][Affine] Drop assumptions of surrounding builtin.func op in Utils/LoopUtils (#116324)
Drop assumptions of surrounding builtin.func op in affine LoopUtils and
Utils. There are use cases of affine fusion or affine transformation in
other func-like ops.
In the context of https://github.com/llvm/llvm-project/issues/116042
Commit: be750200ec03a195f29b53b099bcf075a5289708
https://github.com/llvm/llvm-project/commit/be750200ec03a195f29b53b099bcf075a5289708
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
Log Message:
-----------
[MLIR] Fix unchecked use of memref memory space attr in affine data copy generate (#116763)
Fix unchecked use of memref memory space attr in affine data copy
generate. In the case of memory accesses without a memory space
attribute or those other than integer attributes, the pass treats them
as slow memory spaces.
Fixes https://github.com/llvm/llvm-project/issues/116536
Commit: 132de3a71f581dcb008a124d52c83ccca8158d98
https://github.com/llvm/llvm-project/commit/132de3a71f581dcb008a124d52c83ccca8158d98
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/AffineLoopInvariantCodeMotion.cpp
M mlir/test/Dialect/Affine/affine-loop-invariant-code-motion.mlir
Log Message:
-----------
[MLIR] Fix arbitrary checks in affine LICM (#116469)
Fix arbitrary checks and hardcoding/specialcasing in affine LICM. Drop
unnecessary (too much) debug logging.
This pass is still unsound due to not handling aliases. This will have
to be handled later.
Commit: d1cca3133a6eea845c312b17379ad93f57aa7dd7
https://github.com/llvm/llvm-project/commit/d1cca3133a6eea845c312b17379ad93f57aa7dd7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
A llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950.txt
Log Message:
-----------
AMDGPU: Add v_permlane16_swap_b32 and v_permlane32_swap_b32 for gfx950 (#117260)
This was a bit annoying because these introduce a new special case
encoding usage. op_sel is repurposed as a subset of dpp controls,
and is eligible for VOP3->VOP1 shrinking. For some reason fi also
uses an enum value, so we need to convert the raw boolean to 1 instead
of -1.
The 2 registers are swapped, so this has 2 defs. Ideally the builtin
would return a pair, but that's difficult so return a vector instead.
This would make a hypothetical builtin that supports v2f16 directly
uglier.
Commit: 33c2b20f3de893001568157dc3602d8762d139fc
https://github.com/llvm/llvm-project/commit/33c2b20f3de893001568157dc3602d8762d139fc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Define new sched model for gfx950 (#117261)
A few instructions changed rate.
Commit: b078b882b96922d15b565873e06e1a28514f16e7
https://github.com/llvm/llvm-project/commit/b078b882b96922d15b565873e06e1a28514f16e7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
Log Message:
-----------
AMDGPU: Handle gfx950 change in mfma_f64_16x16x4 + valu hazard (#117262)
Increase from 11 wait states to 19
Commit: 8cb6c9907c4cdcba073be664988ff81e6d689d32
https://github.com/llvm/llvm-project/commit/8cb6c9907c4cdcba073be664988ff81e6d689d32
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
Log Message:
-----------
AMDGPU: Handle gfx950 XDL-write-overlapped-smfma-src-c wait state change (#117263)
These have an additional wait state compared to gfx940.
Commit: db08d78c3e368ffbc8bef1b806d2c7179a5ccbf9
https://github.com/llvm/llvm-project/commit/db08d78c3e368ffbc8bef1b806d2c7179a5ccbf9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
Log Message:
-----------
AMDGPU: Handle v_mfma_f64_16x16x4_f64 srcc write VGPR hazard change for gfx950 (#117283)
Read by sgemm/dgemm in srcc after v_mfma_f64_16x16x4_f64 increases from 9 to 17
wait states.
Commit: 85601fd78f4cbf0ce5df74c5926183035f859572
https://github.com/llvm/llvm-project/commit/85601fd78f4cbf0ce5df74c5926183035f859572
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
Log Message:
-----------
AMDGPU: Handle v_mfma_f64_16x16x4_f64 write VGPR read srca/srcb hazard change for gfx950 (#117284)
Increase in wait states from 11 to 19. The index for smfmac counts as like srcA/srcB.
Commit: 9d8a11fb3924a8176ff9959684ca1cebe1c0143f
https://github.com/llvm/llvm-project/commit/9d8a11fb3924a8176ff9959684ca1cebe1c0143f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[memprof] Remove verifyIndexedMemProfRecord and verifyFunctionProfileData (#117412)
This patch removes two functions to verify the consistency between:
- IndexedAllocationInfo::CallStack
- IndexedAllocationInfo::CSId
Now that MemProf format Version 1 has been removed,
IndexedAllocationInfo::CallStack doesn't participate in either
serialization or deserialization, so we don't care about the
consistency between the two fields in IndexAllocationInfo.
Subsequent patches will remove uses of the old field and eventually
remove the field.
Commit: 68f7b075c07197803625431ba92c337af7470c85
https://github.com/llvm/llvm-project/commit/68f7b075c07197803625431ba92c337af7470c85
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineFunctionSplitter.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/test/CodeGen/Generic/machine-function-splitter.ll
Log Message:
-----------
[BasicBlockSections] Allow mixing of -basic-block-sections with MFS. (#117076)
This PR allows mixing `-basic-block-sections` with
`-enable-machine-function-splitter`. The strategy is to let
`-basic-block-sections` take precedence over functions with profiles.
Commit: 19ddafafdf131aed40abbdaf5af1fb7b59c1e8ac
https://github.com/llvm/llvm-project/commit/19ddafafdf131aed40abbdaf5af1fb7b59c1e8ac
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Analysis/MemoryBuiltins.cpp
A llvm/test/Instrumentation/BoundsChecking/negative.ll
Log Message:
-----------
[llvm] Fix ObjectSizeOffsetVisitor behavior in exact mode upon negati… (#116955)
…ve offset
In Exact mode, the approximation of returning (0,0) is invalid. It only
holds in min/max mode.
Commit: 3a31427224d4fa49d7ef737b21f6027dc4928ecf
https://github.com/llvm/llvm-project/commit/3a31427224d4fa49d7ef737b21f6027dc4928ecf
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Add C++26 approved in the Poland WG21 meeting
Commit: dbb21df2a21591964e1581ba7561f49114fd8fb1
https://github.com/llvm/llvm-project/commit/dbb21df2a21591964e1581ba7561f49114fd8fb1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
Log Message:
-----------
[X86] vector-shuffle-avx512.ll - regenerate TERNLOG comments
Commit: 1e31a4529244ead9f12abed524f33a48515abee2
https://github.com/llvm/llvm-project/commit/1e31a4529244ead9f12abed524f33a48515abee2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
M llvm/test/CodeGen/X86/insert-into-constant-vector.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
M llvm/test/CodeGen/X86/vector-shuffle-v48.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] lowerShuffleWithPERMV - commute VPERMV3 shuffles so any load is on the RHS
This helps ensure we lower to VPERMI2/T2 instructions that we can commute the index arg to VPERMT2/I2.
Prep work for #79799
Commit: 590913983c87b33fb04014124be161cbad33a6e3
https://github.com/llvm/llvm-project/commit/590913983c87b33fb04014124be161cbad33a6e3
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
Log Message:
-----------
[VPlan] Simplify and unify code in verifyEVLRecipe using all_of. (NFCI)
Use all_of instead of explicit loop to reduce indentation, also properly
check VPScalarCastRecipe operand.
Commit: 08e6566d7a310ace0660cbf3fbeb3f1c0c283295
https://github.com/llvm/llvm-project/commit/08e6566d7a310ace0660cbf3fbeb3f1c0c283295
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Func/Transforms/FuncConversions.cpp
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Func] Support 1:N result type conversions in `func.call` conversion (#117413)
This commit adds support for 1:N result type conversions for `func.call`
ops. In that case, argument materializations to the original result type
should be inserted (via `replaceOpWithMultiple`).
This commit is in preparation of merging the 1:1 and 1:N conversion
drivers.
Commit: 4a8329cd7d038d8cdfa9b4cc784ab0e402ecb774
https://github.com/llvm/llvm-project/commit/4a8329cd7d038d8cdfa9b4cc784ab0e402ecb774
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M libcxx/include/__memory_resource/synchronized_pool_resource.h
M libcxx/include/future
M libcxx/include/memory_resource
M libcxx/include/syncstream
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Granularize <mutex> includes (#117068)
Commit: aaa0dd2f05ff957a171a87e78578dddc59fc49c2
https://github.com/llvm/llvm-project/commit/aaa0dd2f05ff957a171a87e78578dddc59fc49c2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/utils/ci/buildkite-pipeline.yml
Log Message:
-----------
[libc++][NFC] Remove a bunch of unused environment variables from the CI configs
Commit: 56feea7307d8db752f7c98af3a7fa1dd7fc72391
https://github.com/llvm/llvm-project/commit/56feea7307d8db752f7c98af3a7fa1dd7fc72391
Author: Ingo Müller <ingomueller at google.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
M mlir/python/requirements.txt
Log Message:
-----------
[mlir][python] Update minimal version of pybind11 to 2.10. (#117314)
This PR updates the minimal required version of pybind11 from 2.9.0 to
2.10.0. New new version is almost 2.5 years old, which is half a year
less than the previous version. This change is necessary to support the
changes introduced in #115307, which does not compile with pybind11
v.2.9.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 01e75646a5d4977a9e441e3db1042df0beccc4bb
https://github.com/llvm/llvm-project/commit/01e75646a5d4977a9e441e3db1042df0beccc4bb
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/include/mlir/IR/BuiltinLocationAttributes.td
M mlir/include/mlir/IR/Location.h
M mlir/lib/AsmParser/LocationParser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/BuiltinDialectBytecode.cpp
M mlir/lib/IR/Location.cpp
M mlir/test/IR/locations.mlir
Log Message:
-----------
[mlir] Add FileRange location type. (#80213)
This location type represents a contiguous range inside a file. It is
effectively a pair of FileLineCols. Add new type and make FileLineCol a
view for case where it matches existing previous one.
The location includes filename and optional start line & col, and end
line & col. Considered common cases are file:line, file:line:col,
file:line:start_col to file:line:end_col and general range within same
file. In memory its encoded as trailing objects. This keeps the memory
requirement the same as FileLineColLoc today (makes the rather common
File:Line cheaper) at the expense of extra work at decoding time. Kept the unsigned
type.
There was the option to always have file range be castable to
FileLineColLoc. This cast would just drop other fields. That may result
in some simpler staging. TBD.
This is a rather minimal change, it does not yet add bindings (C or
Python), lowering to LLVM debug locations etc. that supports end line:cols.
---------
Co-authored-by: River Riddle <riddleriver at gmail.com>
Commit: aa2d084f9a68f041a42e4df84e11d769a7be34a6
https://github.com/llvm/llvm-project/commit/aa2d084f9a68f041a42e4df84e11d769a7be34a6
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format][NFC] Reformat testcases added in 0ff8b7916050
Commit: 70bd80dc51b62453210f6203c31ea826dd0675c2
https://github.com/llvm/llvm-project/commit/70bd80dc51b62453210f6203c31ea826dd0675c2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
Log Message:
-----------
[X86] combineTargetShuffle - commute VPERMV3 shuffles so any load is on the RHS
This helps ensure we lower to VPERMI2/T2 instructions that we can commute the index arg to VPERMT2/I2.
Similar to 1e31a4529244ead9f12abed524f33a48515abee2 to handle cases where the one use load appears after further folding (keep the lowerShuffleWithPERMV version as this can handle the non-VLX widening case as well).
Commit: b0e7383e59a100da60c043fd9aca3484c5ed332f
https://github.com/llvm/llvm-project/commit/b0e7383e59a100da60c043fd9aca3484c5ed332f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
Reapply [flang][OpenMP] Avoid early returns, NFC #117231 (#117325)
Two PRs were merged at the same time: one that modified `maybeApplyToV`
function, and shortly afterwards, this (the reverted) one that had the
old definition.
During the merge both definitions were retained leading to compilation
errors.
Reapply the reverted PR (1a08b15589) with the duplicate removed.
Commit: d3ce069572cb565da613df9828ac54f7edb2fc00
https://github.com/llvm/llvm-project/commit/d3ce069572cb565da613df9828ac54f7edb2fc00
Author: David Green <david.green at arm.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/arm64-ext.ll
M llvm/test/CodeGen/AArch64/neon-perm.ll
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalize ptr shuffle vector to s64 (#116013)
This converts all ptr element shuffle vectors to s64, so that the
existing vector legalization handling can lower them as needed. This
prevents a lot of fallbacks that currently try to generate things like
`<2 x ptr> G_EXT`.
I'm not sure if bitcast/inttoptr/ptrtoint is intended to be necessary
for vectors of pointers, but it uses buildCast for the casts, which now
generates a ptrtoint/inttoptr.
Commit: 2f69f9a95068fc85de18dc26f35d160a40343286
https://github.com/llvm/llvm-project/commit/2f69f9a95068fc85de18dc26f35d160a40343286
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/ds.s
M llvm/test/MC/AMDGPU/invalid-instructions-spellcheck.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/mimg-err.s
M llvm/test/MC/AMDGPU/mimg.s
M llvm/test/MC/AMDGPU/regression/bug28165.s
M llvm/test/MC/AMDGPU/regression/bug28413.s
M llvm/test/MC/AMDGPU/smrd.s
M llvm/test/MC/AMDGPU/sopk.s
A llvm/test/MC/AMDGPU/unknown-target-cpu.s
M llvm/test/MC/AMDGPU/vintrp.s
M llvm/test/MC/AMDGPU/vop1.s
M llvm/test/MC/AMDGPU/vop2.s
M llvm/test/MC/AMDGPU/vop3-convert.s
M llvm/test/MC/AMDGPU/vop3-errs.s
M llvm/test/MC/AMDGPU/vop3.s
M llvm/test/MC/AMDGPU/vop_dpp.s
M llvm/test/MC/AMDGPU/vop_sdwa.s
M llvm/test/MC/AMDGPU/vopc.s
Log Message:
-----------
AMDGPU: Stop running assembler tests with default cpu (#117421)
It does not make sense to assemble for the default target.
Add one that shows the behavior. It is treated as a tahiti
alias without instructions which were later removed, and needs
to be treated as wave64. We should probably turn this into a hard
error though.
Commit: 8b087d64222276090702fb70dec5939eb22a017c
https://github.com/llvm/llvm-project/commit/8b087d64222276090702fb70dec5939eb22a017c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/test/MC/AMDGPU/unknown-target-cpu.s
Log Message:
-----------
AMDGPU: Move default wavesize hack for disassembler (#117422)
You cannot adjust the disassembler's subtarget. llvm-mc passes
the originally constructed MCSubtargetInfo around, rather than
querying the pointer in the disassembler instance.
Commit: cd20fc07720520856c385a12b0daa26b9d8a8e44
https://github.com/llvm/llvm-project/commit/cd20fc07720520856c385a12b0daa26b9d8a8e44
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/test/MC/AMDGPU/wave_any.s
Log Message:
-----------
AMDGPU: Remove wavefrontsize64 feature from dummy target (#117410)
This is a refinement for the existing hack. With this,
the default target will have neither wavefrontsize feature
present, unless it was explicitly specified. That is,
getWavefrontSize() == 64 no longer implies +wavefrontsize64.
getWavefrontSize() == 32 does imply +wavefrontsize32.
Continue to assume the value is 64 with no wavesize feature.
This maintains the codegenable property without any code
that directly cares about the wavesize needing to worry about it.
Introduce an isWaveSizeKnown helper to check if we know the
wavesize is accurate based on having one of the features explicitly
set, or a known target-cpu.
I'm not sure what's going on in wave_any.s. It's testing what
happens when both wavesizes are enabled, but this is treated
as an error in codegen. We now treat wave32 as the winning
case, so some cases that were previously printed as vcc are now
vcc_lo.
Commit: 1944d192bd43bfc02e1701801c4b061007238014
https://github.com/llvm/llvm-project/commit/1944d192bd43bfc02e1701801c4b061007238014
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
Log Message:
-----------
AMDGPU: Use isWave[32|64] instead of comparing size value (#117411)
Commit: 94bde8cdc39ff7e9c59ee0cd5edda882955242aa
https://github.com/llvm/llvm-project/commit/94bde8cdc39ff7e9c59ee0cd5edda882955242aa
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
A clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-lib.hlsl
A clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
A clang/test/SemaHLSL/BuiltIns/buffer_update_counter-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
Log Message:
-----------
[HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (#114148)
Introduces `__builtin_hlsl_buffer_update_counter` clang buildin that is
used to implement the `IncrementCounter` and `DecrementCounter` methods
on `RWStructuredBuffer` and `RasterizerOrderedStructuredBuffer` (see
Note).
The builtin is translated to LLVM intrisic `llvm.dx.bufferUpdateCounter`
or `llvm.spv.bufferUpdateCounter`.
Introduces `BuiltinTypeMethodBuilder` helper in `HLSLExternalSemaSource`
that enables adding methods to builtin types using builder pattern like
this:
```
BuiltinTypeMethodBuilder(Sema, RecordBuilder, "MethodName", ReturnType)
.addParam("param_name", Type, InOutModifier)
.callBuiltin("buildin_name", { BuiltinParams })
.finalizeMethod();
```
Fixes #113513
Commit: b3363104d3af75f7f0151f28fc9e577cea6dea6b
https://github.com/llvm/llvm-project/commit/b3363104d3af75f7f0151f28fc9e577cea6dea6b
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/test/CodeGen/Xtensa/mul.ll
M llvm/utils/UpdateTestChecks/asm.py
Log Message:
-----------
[UTC] Add support for Xtensa (#117441)
Regenerate the failing test as well.
Commit: 14b9ca3f38494bbd03709188b6e73c06ab84cd15
https://github.com/llvm/llvm-project/commit/14b9ca3f38494bbd03709188b6e73c06ab84cd15
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[Sema] Fix a warning
This patch fixes:
clang/lib/Sema/SemaHLSL.cpp:2225:32: error: absolute value function
'abs' given an argument of type 'int64_t' (aka 'long') but has
parameter of type 'int' which may cause truncation of value
[-Werror,-Wabsolute-value]
Commit: 5f9db0876a2022d68e368cd4a06f240ca839198c
https://github.com/llvm/llvm-project/commit/5f9db0876a2022d68e368cd4a06f240ca839198c
Author: M. Zeeshan Siddiqui <mzs at microsoft.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
Allow SymbolUserOpInterface operators to be used in RemoveDeadValues Pass (#117405)
This change removes the restriction on `SymbolUserOpInterface` operators
so they can be used with operators that implement `SymbolOpInterface`,
example:
`memref.global` implements `SymbolOpInterface` so it can be used with
`memref.get_global` which implements `SymbolUserOpInterface`
```
// Define a global constant array
memref.global "private" constant @global_array : memref<10xi32> = dense<[1, 2, 3, 4, 5, 6, 7, 8, 9, 10]> : tensor<10xi32>
// Access this global constant within a function
func @use_global() {
%0 = memref.get_global @global_array : memref<10xi32>
}
```
Reference: https://github.com/llvm/llvm-project/pull/116519 and
https://discourse.llvm.org/t/question-on-criteria-for-acceptable-ir-in-removedeadvaluespass/83131
---------
Co-authored-by: Zeeshan Siddiqui <mzs at ntdev.microsoft.com>
Commit: 28064bfad12cfce959d74fa6d099312e19703f26
https://github.com/llvm/llvm-project/commit/28064bfad12cfce959d74fa6d099312e19703f26
Author: David Green <david.green at arm.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/abs.ll
M llvm/test/CodeGen/AArch64/arm64-clrsb.ll
M llvm/test/CodeGen/AArch64/arm64-sli-sri-opt.ll
M llvm/test/CodeGen/AArch64/arm64-vclz.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/extract-subvec-combine.ll
M llvm/test/CodeGen/AArch64/extract-vector-elt-sve.ll
M llvm/test/CodeGen/AArch64/fcvt-fixed.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-fp16.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AArch64/funnel-shift.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
M llvm/test/CodeGen/AArch64/mingw-refptr.ll
M llvm/test/CodeGen/AArch64/mulcmle.ll
M llvm/test/CodeGen/AArch64/overflow.ll
M llvm/test/CodeGen/AArch64/phi.ll
M llvm/test/CodeGen/AArch64/sadd_sat.ll
M llvm/test/CodeGen/AArch64/sadd_sat_plus.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/ssub_sat.ll
M llvm/test/CodeGen/AArch64/ssub_sat_plus.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/uadd_sat.ll
M llvm/test/CodeGen/AArch64/uadd_sat_plus.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat.ll
M llvm/test/CodeGen/AArch64/usub_sat_plus.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll
Log Message:
-----------
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
Mostly removing unnecessary -global-isel-abort=2 or adding fallback messages
Commit: e2519b674c5551caf6604b1bc8567887298b6127
https://github.com/llvm/llvm-project/commit/e2519b674c5551caf6604b1bc8567887298b6127
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Print incoming VPBB for Phi VPIRInstruction (NFC).
Print the incoming block for Phi VPIRInstructions, for better debugging
& testing.
Commit: c8b837ad8ce4f36a3b2e47f1f1367dc0b41fca7b
https://github.com/llvm/llvm-project/commit/c8b837ad8ce4f36a3b2e47f1f1367dc0b41fca7b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/include/mlir-c/Pass.h
M mlir/lib/Bindings/Python/Pass.cpp
M mlir/lib/CAPI/IR/Pass.cpp
M mlir/test/python/pass_manager.py
Log Message:
-----------
[MLIR][Python] Add the `--mlir-print-ir-tree-dir` to the C and Python API (#117339)
Commit: 213b849c5e2118e44f3b13de43749c4ddb26598f
https://github.com/llvm/llvm-project/commit/213b849c5e2118e44f3b13de43749c4ddb26598f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GISel] Use libcalls for some FP instructions when F/D aren't present.
This is based on what fails when adding integer only RUN lines to
float-intrinsics.ll and double-intrinsics.ll.
We're still missing a lot of test cases that SelectionDAG has. These
will be added in future patches.
Commit: dc4c8de179ff2237378bd42a2b650fad2f7b1940
https://github.com/llvm/llvm-project/commit/dc4c8de179ff2237378bd42a2b650fad2f7b1940
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
R clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-lib.hlsl
R clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
R clang/test/SemaHLSL/BuiltIns/buffer_update_counter-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
Log Message:
-----------
Revert "[HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (#114148)" (#117448)
This reverts commit 94bde8cdc39ff7e9c59ee0cd5edda882955242aa.
Commit: 3cecf17065919da0a7fa9b38f37592e5462c2f85
https://github.com/llvm/llvm-project/commit/3cecf17065919da0a7fa9b38f37592e5462c2f85
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
A lld/test/ELF/merge-addr.s
M lld/test/ELF/merge-reloc.s
R lld/test/ELF/merge-relocatable.s
R lld/test/ELF/merge-shared-str.s
R lld/test/ELF/merge-shared.s
R lld/test/ELF/merge-string.s
R lld/test/ELF/merge-to-non-alloc.s
Log Message:
-----------
[ELF] Refactor merge-* tests
Commit: 43e3871a327b8e2ff57e16b46d5bc44beb430d91
https://github.com/llvm/llvm-project/commit/43e3871a327b8e2ff57e16b46d5bc44beb430d91
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/OutputSections.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Make section member orders consistent
SectionBase, InputSectionBase, InputSection, MergeInputSection, and
OutputSection have different member orders. Make them consistent and
adopt the order similar to the raw Elf64_Shdr.
Commit: d6e6478e95d7b20a5c742112c425ea06b85922c4
https://github.com/llvm/llvm-project/commit/d6e6478e95d7b20a5c742112c425ea06b85922c4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
Log Message:
-----------
[memprof] Remove a dead constructor in AllocationInfo (NFC) (#117427)
This patch removes a dead constructor in AllocationInfo. We used to
use it for MemProf Version 1 deserialization purposes via
MemProfRecord::MemProfRecord.
Commit: d4bed617f4378873d7ddf4b53c041e7b39d1a9ca
https://github.com/llvm/llvm-project/commit/d4bed617f4378873d7ddf4b53c041e7b39d1a9ca
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/merge-reloc.s
Log Message:
-----------
[ELF] -r: keep sh_entsize for SHF_MERGE sections with relocations
Follow-up to the NFC refactoring
43e3871a327b8e2ff57e16b46d5bc44beb430d91 and test cleanup
3cecf17065919da0a7fa9b38f37592e5462c2f85.
SHF_MERGE sections with relocations are handled as InputSection (without
duplicate elimination). The output section retains the original
sh_entsize in non-relocatable links. This patch ports the behavior for
relocatable links as well.
https://github.com/ClangBuiltLinux/linux/issues/2057
Commit: a5af6214dd0e9d53c66dc06bcd23540b05c70120
https://github.com/llvm/llvm-project/commit/a5af6214dd0e9d53c66dc06bcd23540b05c70120
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputSection.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Make SyntheticSection parameter order match InputSection
And rename `/*alignment=*/` to `/*addralign=*/`
Commit: 099a52fd2f3723db6b0550c99a1adc12d2d8d909
https://github.com/llvm/llvm-project/commit/099a52fd2f3723db6b0550c99a1adc12d2d8d909
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/MapFile.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Reorder SectionBase/InputSectionBase members
Move `sectionKind` outside the bitfield and move bss/keepUnique to
InputSectionBase.
* sizeof(InputSection) decreases from 160 to 152 on 64-bit systems.
* The numerous `sectionKind` accesses are faster.
Commit: cf9b4281c1b4c5d6f2bf31909521af8ab4bb4f45
https://github.com/llvm/llvm-project/commit/cf9b4281c1b4c5d6f2bf31909521af8ab4bb4f45
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/ARC/ARCInstrInfo.td
Log Message:
-----------
[ARC] Fix ARCISD::BRcc description (#117454)
Follow-up to #117375.
Commit: afae1a5f32bb16c389b718e91e6eb808e0deeac2
https://github.com/llvm/llvm-project/commit/afae1a5f32bb16c389b718e91e6eb808e0deeac2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__configuration/availability.h
Log Message:
-----------
[libc++] Remove _LIBCPP_DISABLE_AVAILABILITY macro (#112952)
This was slated for removal years ago, so now's a good time to remove it.
Commit: 042a1cc553aa347f00cf4c56ec3c6168a2cd34b6
https://github.com/llvm/llvm-project/commit/042a1cc553aa347f00cf4c56ec3c6168a2cd34b6
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
Log Message:
-----------
[VPlan] Generalize type inference for binary/cast/shift/logic. NFC (#116173)
Commit: e4e5206050a657170892bc400fd4b870e0576ec6
https://github.com/llvm/llvm-project/commit/e4e5206050a657170892bc400fd4b870e0576ec6
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
Log Message:
-----------
[ELF] Make OutputDesc unique_ptr
Store them in LinkerScript::descPool. This removes a SpecificAlloc
instantiation, makes lld smaller, and drops the small memory waste due
to the separate BumpPtrAllocator.
Commit: 48b13ca48b701ce8230e45c1e4c8338806971e21
https://github.com/llvm/llvm-project/commit/48b13ca48b701ce8230e45c1e4c8338806971e21
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
Log Message:
-----------
[RISCV][CostModel] cost of vector cttz/ctlz under ZVBB (#115800)
Commit: a87f776c1c873ea86a95c368f1a9331adc65d1ee
https://github.com/llvm/llvm-project/commit/a87f776c1c873ea86a95c368f1a9331adc65d1ee
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
Log Message:
-----------
[ELF] Avoid make in elf::writeARMCmseImportLib
Commit: c894d3a846f351e592bf917ace57c7d2fcbeddc8
https://github.com/llvm/llvm-project/commit/c894d3a846f351e592bf917ace57c7d2fcbeddc8
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/test/CodeGen/Hexagon/widen-not-load.ll
Log Message:
-----------
Fixup a test for #116330, to make `REQUIRES:asserts`
`-debug-only` is available only in +Asserts.
Commit: ed1d90ca11b1834e667e17255ba2ecf6fe305e8c
https://github.com/llvm/llvm-project/commit/ed1d90ca11b1834e667e17255ba2ecf6fe305e8c
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M clang/lib/Parse/ParseStmt.cpp
Log Message:
-----------
[clang][NFC] simplify the unset check in `ParseLabeledStatement` (#117430)
`!isInvalid && !isUsable -> !isInvalid && !(!isInvalid && !isUnset) ->
isUnset`
It is more simple to understand.
Commit: a0ef12c64284abf59bc092b2535cce1247d5f9a4
https://github.com/llvm/llvm-project/commit/a0ef12c64284abf59bc092b2535cce1247d5f9a4
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
A mlir/test/Conversion/MemRefToLLVM/type-conversion.mlir
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
A mlir/test/lib/Dialect/LLVM/TestPatterns.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][LLVM] `LLVMTypeConverter`: Tighten materialization checks (#116532)
This commit adds extra checks to the MemRef argument materializations in
the LLVM type converter. These materializations construct a
`MemRefType`/`UnrankedMemRefType` from the unpacked elements of a MemRef
descriptor or from a bare pointer.
The extra checks ensure that the inputs to the materialization function
are correct. It is possible that a user added extra type conversion
rules that convert MemRef types in a different way and the extra checks
ensure that we construct a MemRef descriptor only if the inputs are what
we expect.
This commit also drops a check around bare pointer materializations:
```
// This is a bare pointer. We allow bare pointers only for function entry
// blocks.
```
This check should not be part of the materialization function. Whether a
MemRef block argument is converted into a MemRef descriptor or a bare
pointer is decided in the lowering pattern. At the point of time when
materialization functions are executed, we already made that decision
and we should just materialize regardless of the input format.
Commit: 1a2cc2bce86448dfb1c9795a907d28ca2db6aaf5
https://github.com/llvm/llvm-project/commit/1a2cc2bce86448dfb1c9795a907d28ca2db6aaf5
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M lld/ELF/InputSection.h
Log Message:
-----------
[ELF] Exclude sizeof(InputSection) to _WIN32
Structs with delicate packing are often larger in MSVC than Itanium.
099a52fd2f3723db6b0550c99a1adc12d2d8d909 did not make
sizeof(InputSection) smaller for MSVC. Just exclude MSVC.
Commit: ae01e3a7c66d68544c85dd6e2c5498d3c5896e29
https://github.com/llvm/llvm-project/commit/ae01e3a7c66d68544c85dd6e2c5498d3c5896e29
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Log Message:
-----------
[nfc][sancov] Remove unnecessary default argument (#117463)
Commit: 215f3dd5f6b82000bd61a5e8ff4a065baf8f4e3f
https://github.com/llvm/llvm-project/commit/215f3dd5f6b82000bd61a5e8ff4a065baf8f4e3f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Log Message:
-----------
[nfc][sancov] Remove unnecessary default argument (#117464)
Commit: 8d650736c19f2bd6a84dc29ec0becfceb357a739
https://github.com/llvm/llvm-project/commit/8d650736c19f2bd6a84dc29ec0becfceb357a739
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
Log Message:
-----------
[AMDGPU] Fix AMDGPUISD::TRAP description (#117453)
Glue operand is only present if there are variadic register operands,
which makes it optional.
Also, change the number of fixed operands to 1 (the trap ID).
Commit: c85c77c054f3e330c23501db115b1adc505b9805
https://github.com/llvm/llvm-project/commit/c85c77c054f3e330c23501db115b1adc505b9805
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/Target/AVR/AVRInstrInfo.td
Log Message:
-----------
[AVR] Fix shift node descriptions (#117456)
Wide shift nodes produce two results, not one.
Reuse the added type profile to define the standard "shift parts" nodes.
Commit: 68a48ec90fb6609b964addcc99a55d16eee884a0
https://github.com/llvm/llvm-project/commit/68a48ec90fb6609b964addcc99a55d16eee884a0
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
Log Message:
-----------
[clang][analysis][NFC]place the comment to correct position (#117467)
Commit: eb4d2f24a7246ce05da789c9506201ce18638046
https://github.com/llvm/llvm-project/commit/eb4d2f24a7246ce05da789c9506201ce18638046
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Driver.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Simplify reportMissingFeature. NFC
Commit: 5fa0345d90d60a90a1cc0cf33bab997c3e26b84e
https://github.com/llvm/llvm-project/commit/5fa0345d90d60a90a1cc0cf33bab997c3e26b84e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
Log Message:
-----------
[tsan] Unwind for CHECK according to fast_unwind_on_fatal (#117470)
It's needed for #116409, which hangs with slow
unwind.
Commit: 4d4a353b8eddb0728d5b278befdccda4de484319
https://github.com/llvm/llvm-project/commit/4d4a353b8eddb0728d5b278befdccda4de484319
Author: gbMattN <146744444+gbMattN at users.noreply.github.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_deadlock_detector.h
A compiler-rt/test/tsan/many_held_mutex.cpp
Log Message:
-----------
[TSan] Increase the number of simultaneously locked mutexes that a thread can hold (#116409)
I've run into an issue where TSan can't be used on some code without
turning off deadlock detection because a thread tries to hold too many
mutexes. It would be preferable to be able to use deadlock detection as
that is a major benefit of TSan.
Its mentioned in https://github.com/google/sanitizers/issues/950 that
the 64 mutex limit was an arbitrary number. I've increased it to 128 and
all the tests still pass. Considering the increasing number of cores on
CPUs and how programs can now use more threads to take advantage of it,
I think raising the limit to 128 would be some good future proofing
---------
Co-authored-by: Vitaly Buka <vitalybuka at google.com>
Commit: 2af6ddb8a2cdc2a9a8a84a6244905bf9158cca8b
https://github.com/llvm/llvm-project/commit/2af6ddb8a2cdc2a9a8a84a6244905bf9158cca8b
Author: Théo Degioanni <theo.degioanni.llvm.deluge062 at simplelogin.fr>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M mlir/test/IR/properties.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[mlir][ods] Fix missing property elision for variadic segment properties (#115930)
This fixes a bug where variadic segment properties would not be elided
when printing `prop-dict`.
Commit: bd7d6c806608b150b8aab87012afdbd3bed38c29
https://github.com/llvm/llvm-project/commit/bd7d6c806608b150b8aab87012afdbd3bed38c29
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port 776476c282bca71d5b856e80e0a88fbd6f3ccdd2
Commit: c4d656a4e992648f3490536336c230041c74dc38
https://github.com/llvm/llvm-project/commit/c4d656a4e992648f3490536336c230041c74dc38
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependencies for a0ef12c64284abf59bc092b2535cce1247d5f9a4
Commit: f942949a7cf16a082eb43943b2a4f93f9180556f
https://github.com/llvm/llvm-project/commit/f942949a7cf16a082eb43943b2a4f93f9180556f
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/SymbolTable.cpp
M lld/test/COFF/arm64ec.test
Log Message:
-----------
[LLD][COFF] Require explicit specification of ARM64EC target (#116281)
Inferring the ARM64EC target can lead to errors. The `-machine:arm64ec`
option may include x86_64 input files, and any valid ARM64EC input is
also valid for `-machine:arm64x`. MSVC requires an explicit `-machine`
argument with informative diagnostics; this patch adopts the same
behavior.
Commit: 0c21ed48f40b2a6e3aa7e5d1873cf2455e847786
https://github.com/llvm/llvm-project/commit/0c21ed48f40b2a6e3aa7e5d1873cf2455e847786
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy][NFC] fix release note order (#117484)
Commit: 7498eaa9abf2e4ac0c10fa9a02576d708cc1b624
https://github.com/llvm/llvm-project/commit/7498eaa9abf2e4ac0c10fa9a02576d708cc1b624
Author: Fabian Mora <6982088+fabianmcg at users.noreply.github.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M mlir/include/mlir/Conversion/CMakeLists.txt
A mlir/include/mlir/Conversion/ConvertToLLVM/CMakeLists.txt
M mlir/include/mlir/Conversion/ConvertToLLVM/ToLLVMInterface.h
A mlir/include/mlir/Conversion/ConvertToLLVM/ToLLVMInterface.td
A mlir/include/mlir/Conversion/GPUCommon/GPUToLLVM.h
A mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVM.h
M mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Conversion/ConvertToLLVM/CMakeLists.txt
M mlir/lib/Conversion/ConvertToLLVM/ConvertToLLVMPass.cpp
M mlir/lib/Conversion/ConvertToLLVM/ToLLVMInterface.cpp
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
A mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-target-attr.mlir
Log Message:
-----------
[mlir][LLVM] Add the `ConvertToLLVMAttrInterface` and `ConvertToLLVMOpInterface` interfaces (#99566)
This patch adds the `ConvertToLLVMAttrInterface` and
`ConvertToLLVMOpInterface` interfaces. It also modifies the
`convert-to-llvm` pass to use these interfaces when available.
The `ConvertToLLVMAttrInterface` interfaces allows attributes to
configure conversion to LLVM, including the conversion target, LLVM type
converter, and populating conversion patterns. See the `NVVMTargetAttr`
implementation of this interface for an example of how this interface
can be used to configure conversion to LLVM.
The `ConvertToLLVMOpInterface` interface collects all convert to LLVM
attributes stored in an operation.
Finally, the `convert-to-llvm` pass was modified to use these interfaces
when available. This allows applying `convert-to-llvm` to GPU modules
and letting the `NVVMTargetAttr` decide which patterns to populate.
Commit: 08bf901ed4a66d3afa8edbf167f658a2647147c5
https://github.com/llvm/llvm-project/commit/08bf901ed4a66d3afa8edbf167f658a2647147c5
Author: Xing Xue <xingxue at outlook.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
Log Message:
-----------
Revert "[AIX] Fix AIX BuildBot failure as AIX linker doesn't support version script." (#117444)
Commit
https://github.com/llvm/llvm-project/commit/eaa0a21d21962280dc2c03a09152510f6162a576
has fixed the build problem already so the change in
llvm/llvm-project#117342 does not make sense any more. I am reverting
it.
Commit: 63d9ef5e37539b8920eb6c93524e4be2c33a510c
https://github.com/llvm/llvm-project/commit/63d9ef5e37539b8920eb6c93524e4be2c33a510c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ParentMapContext.cpp
M clang/lib/AST/TemplateName.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::{is,get} (NFC) (#117469)
Note that PointerUnion::{is,get} have been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
I'm not touching PointerUnion::dyn_cast for now because it's a bit
complicated; we could blindly migrate it to dyn_cast_if_present, but
we should probably use dyn_cast when the operand is known to be
non-null.
Commit: aafe934c0c0c1d274099228e7e47669770235284
https://github.com/llvm/llvm-project/commit/aafe934c0c0c1d274099228e7e47669770235284
Author: Brian Cain <bcain at quicinc.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/test/CodeGen/Hexagon/widen-not-load.ll
Log Message:
-----------
[hexagon] Require "asserts" build for widen-not-load test (#117414)
This test fails on the `clang-x64-windows-msvc` builder:
.---command stderr------------
|
C:\b\slave\clang-x64-windows-msvc\llvm-project\llvm\test\CodeGen\Hexagon\widen-not-load.ll:7:16:
error: CHECK-LABEL: expected string not found in input
| ; CHECK-LABEL: test1
| ^
| <stdin>:1:1: note: scanning from here
| llc.exe: Unknown command line argument
'-debug-only=hexagon-load-store-widening'. Try:
'c:\b\slave\clang-x64-windows-msvc\build\stage1\bin\llc.exe --help'
| ^
| <stdin>:1:35: note: possible intended match here
| llc.exe: Unknown command line argument
'-debug-only=hexagon-load-store-widening'. Try:
'c:\b\slave\clang-x64-windows-msvc\build\stage1\bin\llc.exe --help'
| ^
Commit: 6cfaddfd52d088c15a61b8149f39505019c73458
https://github.com/llvm/llvm-project/commit/6cfaddfd52d088c15a61b8149f39505019c73458
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedBroadwell.td
M llvm/lib/Target/X86/X86SchedHaswell.td
M llvm/lib/Target/X86/X86SchedSandyBridge.td
M llvm/test/tools/llvm-mca/X86/Barcelona/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-sse2.s
Log Message:
-----------
[X86] Split rr/rm CVT schedules on SNB/HSW/BDW (#117494)
The folded load variants almost never require Port5 for length changing conversions (just for SNB ymm cases), and don't typically use an extra uop for the load.
Confirmed with a mixture of Agner + uops.info comparisons.
Commit: 0a6d797c20f6ab53bc09fb66129f603ed6e4b524
https://github.com/llvm/llvm-project/commit/0a6d797c20f6ab53bc09fb66129f603ed6e4b524
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedBroadwell.td
M llvm/lib/Target/X86/X86SchedHaswell.td
M llvm/lib/Target/X86/X86SchedSandyBridge.td
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-f16c.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-f16c.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-f16c.s
M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-f16c.s
Log Message:
-----------
[X86] Improve F16C CVT schedules on SNB/HSW/BDW
Add complete IvyBridge schedule (which is included in the SandyBridge model, IvyBridge was the first to support F16C) - split rr/rm schedules as they usually have very different port usage.
Haswell/Broadwell use Port1 not Port0.
Confirmed with a mixture of Agner + uops.info comparisons.
Commit: ff97b283346273000a8140d6a3a8fcb5a1589946
https://github.com/llvm/llvm-project/commit/ff97b283346273000a8140d6a3a8fcb5a1589946
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Relocations.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Simplif reportUndefinedSymbol. NFC
Commit: c2ffb42893eb543f64169e32851e00352feaca69
https://github.com/llvm/llvm-project/commit/c2ffb42893eb543f64169e32851e00352feaca69
Author: Kazuki Sakamoto <sakamoto at splhack.org>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.h
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Fix TestLoadUnload.py (#117416)
ELF core debugging fix #117070 broke TestLoadUnload.py tests due to
GetModuleSpec call, ProcessGDBRemote fetches modules from remote. Revise
the original PR, renamed FindBuildId to FindModuleUUID.
Commit: 0dbdc6dc358bfe24d83c23ccc1c84c468ed24f30
https://github.com/llvm/llvm-project/commit/0dbdc6dc358bfe24d83c23ccc1c84c468ed24f30
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Simplify code to re-use existing basic blocks (NFCI).
Restructure and slightly simplify code to re-use existing basic blocks.
Commit: d8495ede01329e8636e43847517da1c9d80b896e
https://github.com/llvm/llvm-project/commit/d8495ede01329e8636e43847517da1c9d80b896e
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Change getLocation to use ELFSyncStream. NFC
Commit: 360718fb90cb60572c210ed4fa671128232cf3ba
https://github.com/llvm/llvm-project/commit/360718fb90cb60572c210ed4fa671128232cf3ba
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lld/test/ELF/linkerscript/symbol-location.s
Log Message:
-----------
[test] Improve symbol-location.s to check --defsym
Commit: c790d6f53f617b73c40d42a217c120023b9ab66f
https://github.com/llvm/llvm-project/commit/c790d6f53f617b73c40d42a217c120023b9ab66f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/incompatible.s
Log Message:
-----------
[ELF] isCompatile: avoid a toStr and 2 ErrAlways
Commit: c4dc5ed8254e6b318200496d687b0a7b3163dc26
https://github.com/llvm/llvm-project/commit/c4dc5ed8254e6b318200496d687b0a7b3163dc26
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Avoid some toStr and ErrAlways
Commit: 1cd627562b8b66b5f9b0797fc45afcfa054daedd
https://github.com/llvm/llvm-project/commit/1cd627562b8b66b5f9b0797fc45afcfa054daedd
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Remove unneeded Twine in ELFSyncStream
Commit: 590f451b60d434b26c634a07125fb05baf461fa0
https://github.com/llvm/llvm-project/commit/590f451b60d434b26c634a07125fb05baf461fa0
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
Log Message:
-----------
[VPlan] Allow setting IR name for VPDerivedIVRecipe (NFCI).
Allow setting the name to use for the generated IR value of the derived
IV in preparations for https://github.com/llvm/llvm-project/pull/112145.
This is analogous to VPInstruction::Name.
Commit: 5ce4d4c77517f1bc9ad11b2637056b870f2bd156
https://github.com/llvm/llvm-project/commit/5ce4d4c77517f1bc9ad11b2637056b870f2bd156
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M mlir/lib/Dialect/GPU/Transforms/EliminateBarriers.cpp
M mlir/test/Dialect/GPU/barrier-elimination.mlir
Log Message:
-----------
[mlir] fix memory effects in GPU barrier elimination (#117432)
Existing implementation may trigger infinite cycles when collecting
effects above or below the current block after wrapping around a
loop-like construct. Limit this case to only looking at the immediate
block (loop body). This is correct because wrap around is intended to
consider effects of different iterations of the same loop and shouldn't
be existing the loop block.
Reported-by: Fabian Mora <fmora.dev at gmail.com>
Co-authored-by: Fabian Mora <fmora.dev at gmail.com>
Commit: e3aafe407af36f580148d3ceccd1aa13a490f7c9
https://github.com/llvm/llvm-project/commit/e3aafe407af36f580148d3ceccd1aa13a490f7c9
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-internal-linkage.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-func.cpp
Log Message:
-----------
[clang-tidy] fix false positive use-internal-linkage for func decl without body (#117490)
If in one TU, function only have declaration without body, this function
should be external linkage.
Fixed #117488
Commit: ae20dbdd63d97c342b89a72e9e839556d0deed07
https://github.com/llvm/llvm-project/commit/ae20dbdd63d97c342b89a72e9e839556d0deed07
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
Log Message:
-----------
[clang][analysis] refactor the unevaluated api (#117474)
It is hard to understand for `ExprMutationAnalyzer::isUnevaluated` to
accept 2 Stmt as parameters.
This patch wants to redesign the API to accept only 1 Stmt. Now it will
only check whether stmt is a sub-stmt of an unevaluated stmt.
Commit: 605b8dad5cb173ac86adb3541e9f70a824aff364
https://github.com/llvm/llvm-project/commit/605b8dad5cb173ac86adb3541e9f70a824aff364
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/AvoidConstOrRefDataMembersCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/avoid-const-or-ref-data-members.cpp
Log Message:
-----------
[clang-tidy] Fix false positive in cppcoreguidelines-avoid-const-or-ref-data-members when detecting templated classes with inheritance (#115180)
`hasSimpleCopyConstructor` series of functions are not reliable when
these functions are not resolved. We need to manually resolve the status
of these functions from its base classes.
Fixes: #111985.
Commit: 3c344f92e62ac07faf5df68d73ad765b11f465f2
https://github.com/llvm/llvm-project/commit/3c344f92e62ac07faf5df68d73ad765b11f465f2
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[clang][tablegen][NFC]add static for internal linkage function (#117479)
Detected by misc-use-internal-linkage
Commit: cbdd14ee9de72c277d9f89a6aa57c54a495f5458
https://github.com/llvm/llvm-project/commit/cbdd14ee9de72c277d9f89a6aa57c54a495f5458
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ParentMapContext.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[clang][NFC]add static for internal linkage function (#117482)
Detected by misc-use-internal-linkage
Commit: 2a5e3a67a0248db4a6981e343f0033a32ad4a577
https://github.com/llvm/llvm-project/commit/2a5e3a67a0248db4a6981e343f0033a32ad4a577
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M clang/lib/AST/APValue.cpp
Log Message:
-----------
[AST] Fix a warning
This patch fixes:
clang/lib/AST/APValue.cpp:1091:1: error: unused function
'setLValueUninit' [-Werror,-Wunused-function]
Commit: 095f489757ead08184dd340f14a7b6158db6b0a3
https://github.com/llvm/llvm-project/commit/095f489757ead08184dd340f14a7b6158db6b0a3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86PfmCounters.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/test/tools/llvm-mca/X86/SapphireRapids/independent-load-stores.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-adx.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-aes.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512bitalg.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512bitalgvl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512bwvl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512cd.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512cdvl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512dq.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512dqvl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512gfni.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512gfnivl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512ifma.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512ifmavl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vaes.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vaesvl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vbmi.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vbmi2vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vbmivl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vnni.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vnnivl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vpclmulqdq.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vpclmulqdqvl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vpopcntdq.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vpopcntdqvl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avxgfni.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-bmi1.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-bmi2.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-clflushopt.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-clwb.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-cmov.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-cmpxchg.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-f16c.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-fma.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-gfni.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-lea.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-lzcnt.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-mmx.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-movbe.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-pclmul.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-popcnt.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-prefetchw.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-rdrand.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-rdseed.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-sse3.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-sse41.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-sse42.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-ssse3.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-vaes.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-vpclmulqdq.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-x86_32.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-x86_64.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-x87.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-xsave.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/zero-idioms.s
Log Message:
-----------
[X86] Swap ports 10 and 11 in SapphireRapids Scheduling Model (#117468)
Based on intel/perfmon#149, the documentation is incorrect and the pfm
counter names are actually correct. This patch adjusts the
SapphireRapids scheduling model to match the performance counter naming/
correct naming that will soon be reflected in the optimization manual.
This fixes part of #117360.
Commit: 512dc5cb32e65081f4481afc757beade9bd64d04
https://github.com/llvm/llvm-project/commit/512dc5cb32e65081f4481afc757beade9bd64d04
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86PfmCounters.td
M llvm/lib/Target/X86/X86SchedAlderlakeP.td
M llvm/test/tools/llvm-mca/X86/AlderlakeP/independent-load-stores.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-adx.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-aes.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-avxgfni.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-bmi1.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-bmi2.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-clflushopt.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-clwb.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-cmov.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-cmpxchg.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-f16c.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-fma.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-gfni.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-lea.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-lzcnt.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-mmx.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-movbe.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-pclmul.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-popcnt.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-prefetchw.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-rdrand.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-rdseed.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-sse3.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-sse41.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-sse42.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-ssse3.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-vaes.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-vpclmulqdq.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-x86_32.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-x86_64.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-x87.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-xsave.s
M llvm/test/tools/llvm-mca/X86/AlderlakeP/zero-idioms.s
Log Message:
-----------
[X86] Swap ports 10 and 11 in Alder Lake Scheduling Model (#117466)
Based on https://github.com/intel/perfmon/issues/149, the documentation
is incorrect and the pfm counter names are actually correct. This patch
adjusts the Alder Lake scheduling model to match the performance counter
naming/ correct naming that will soon be reflected in the optimization
manual.
This fixes part of #117360.
Commit: 5ed09d552d51825e495aebf38988beba83dbbca9
https://github.com/llvm/llvm-project/commit/5ed09d552d51825e495aebf38988beba83dbbca9
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Support/Compression.cpp
Log Message:
-----------
[Support] Check zstd decompress result before msan unpoison (#117276)
We should check the zstd decompress result before doing the msan
unpoison. If the res is abnormal, then it would be a huge number, which
will cause undesired msan unpoison behavior and will run for a long
time.
Commit: 6aeffa18e9ac51b7090325ea50d1841248a876c6
https://github.com/llvm/llvm-project/commit/6aeffa18e9ac51b7090325ea50d1841248a876c6
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lld/ELF/DriverUtils.cpp
M lld/test/ELF/reproduce.s
Log Message:
-----------
[ELF] --reproduce: strip directories for --dependency-file=
CMake may generate build.ninja with DEP_FILE specifying a non-existent
directory in the reproduce tarball.
Commit: e70f9e20964161abd3518d77b9efc736c6b6255e
https://github.com/llvm/llvm-project/commit/e70f9e20964161abd3518d77b9efc736c6b6255e
Author: Weining Lu <luweining at loongson.cn>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[LoongArch] Remove the added in #116762
Commit: 02408d6b28951b2e094d00a70a398883c6b0cb33
https://github.com/llvm/llvm-project/commit/02408d6b28951b2e094d00a70a398883c6b0cb33
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
Log Message:
-----------
[VP] Refactoring some functions in ExpandVectorPredication.NFC (#115840)
Building vp intrinsic functions using a unified interface for
expandPredicationToIntCall/expandPredicationToFPCall/expandPredicationToCastIntrinsic
functions.
Commit: 5f3eab9e453c0237ccfafb6775b5af55bf028c84
https://github.com/llvm/llvm-project/commit/5f3eab9e453c0237ccfafb6775b5af55bf028c84
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRISelLowering.cpp
Log Message:
-----------
[AVR] Remove extra ROL / ROR operands (#117510)
The nodes have one input, shift amount of 1 is implied.
Commit: bb5bbe523d4437d72287f89fbaa277aaa71c0bd2
https://github.com/llvm/llvm-project/commit/bb5bbe523d4437d72287f89fbaa277aaa71c0bd2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
A llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GISel] Support s32/s64 G_FSUB/FDIV/FNEG without F/D extensions.
Use libcalls for G_FSUB/FDIV. Use integer operations for G_FNEG.
Copy most of the IR tests for arithmetic from SelectionDAG.
Commit: 345ca6a69203fe8ad17cf35da88e6a490679a2e7
https://github.com/llvm/llvm-project/commit/345ca6a69203fe8ad17cf35da88e6a490679a2e7
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: extra signature conversion check (#117471)
This commit adds an extra assertion to `applySignatureConversion` to
prevent incorrect API usage: The same block cannot be converted multiple
times. That would mess with the underlying conversion value mapping.
(Mappings would be overwritten.) This is similar to op replacements: The
same op cannot be replaced multiple times.
To simplify the check, `BlockTypeConversionRewrite::block` now stores
the original block. The new block is stored in an extra field. (It used
to be the other way around.)
This commit is in preparation of adding 1:N support to the conversion
value mapping. Before making any further changes to the mapping
infrastructure, I'd like to make sure that the code base around it (that
uses the mapping) is robust.
Commit: 0bfc9514715b3beb967f1a245e9db310d2aafa50
https://github.com/llvm/llvm-project/commit/0bfc9514715b3beb967f1a245e9db310d2aafa50
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/symbol_ondemand/shared_library/TestSharedLibOnDemand.py
Log Message:
-----------
[lldb] Remove lldbutil.get_stack_frames (NFC) (#117505)
`SBThread.frames` can be used instead of `get_stack_frames`.
Commit: e26af0938c7a272cf0de11c92aa069485868e130
https://github.com/llvm/llvm-project/commit/e26af0938c7a272cf0de11c92aa069485868e130
Author: hev <wangrui at loongson.cn>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
Log Message:
-----------
[llvm] Add `BasicTTIImpl::areInlineCompatible` for target feature subset checks (#117493)
This patch moves the `areInlineCompatible` implementation from multiple
subclasses (`AArch64TTIImpl`, `RISCVTTIImpl`, `WebAssemblyTTIImpl`) to
the base class `BasicTTIImpl`. The new implementation checks whether the
callee's target features are a subset of the caller's, enabling
consistent behavior across targets. Subclasses now simply delegate to
the base implementation, reducing code duplication and improving
maintainability.
Commit: 3fb0bea859efaf401ad0ce420d7b75e3ff1c4746
https://github.com/llvm/llvm-project/commit/3fb0bea859efaf401ad0ce420d7b75e3ff1c4746
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
Log Message:
-----------
[RISCV][GISel] Add register class to some isel output patterns so they can be imported.
This makes (fcopysign X, (fneg Y)) patterns work.
Commit: 2523439021dedbaee1ddfc49f59deab43cf6bb9b
https://github.com/llvm/llvm-project/commit/2523439021dedbaee1ddfc49f59deab43cf6bb9b
Author: hev <wangrui at loongson.cn>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
A llvm/test/Transforms/Inline/LoongArch/inline-target-features.ll
A llvm/test/Transforms/Inline/LoongArch/lit.local.cfg
Log Message:
-----------
[LoongArch] Add a test case for inline compatibility checks (#117144)
Commit: 7317a6e99026f65a343e2e69685445dc5bd83172
https://github.com/llvm/llvm-project/commit/7317a6e99026f65a343e2e69685445dc5bd83172
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
A llvm/test/MachineVerifier/RISCV/subreg-liveness.mir
Log Message:
-----------
[RISCV][MachineVerifier] Use RegUnit for register liveness checking (#115980)
For the RISC-V target, V14_V15 are not subregisters of v14m4, even
though they share some registers. Currently, the MachineVerifier reports
an error when checking register liveness for segment load/store
operations.
This patch adds additional register liveness checking, using RegUnit
instead of subregisters, to prevent this error.
Commit: 87cc4b48c08a627f330396f941b84671c5e591d5
https://github.com/llvm/llvm-project/commit/87cc4b48c08a627f330396f941b84671c5e591d5
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/test/MachineVerifier/RISCV/subreg-liveness.mir
Log Message:
-----------
[NFC] Fix buildbot fail by add riscv64-registered-target
Commit: 9e3215ac167b80dcf51d6693ecdd6275c4e89954
https://github.com/llvm/llvm-project/commit/9e3215ac167b80dcf51d6693ecdd6275c4e89954
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/lib/ProfileData/InstrProfWriter.cpp
Log Message:
-----------
[memprof] Add an assert to InstrProfWriter::addMemProfData (#117426)
This patch adds a quick validity check to
InstrProfWriter::addMemProfData. Specifically, we check to see if we
have all (or none) of the MemProf profile components (frames, call
stacks, records).
The credit goes to Teresa Johnson for suggesting this assert.
Commit: ff7b42c194e0fa23e6a76f0a33a80c0c3af14e7d
https://github.com/llvm/llvm-project/commit/ff7b42c194e0fa23e6a76f0a33a80c0c3af14e7d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Speed up llvm-profdata (#117446)
CallStackRadixTreeBuilder::build takes the parameter
MemProfFrameIndexes by value, involving copies:
std::optional<const llvm::DenseMap<FrameIdTy, LinearFrameId>>
MemProfFrameIndexes
Then "build" makes another copy of MemProfFrameIndexe and passes it to
encodeCallStack for every call stack, which is painfully slow.
This patch changes the type to a pointer so that we don't have to make
a copy every time we pass the argument.
Without this patch, it takes 553 seconds to run "llvm-profdata merge"
on a large MemProf raw profile. This patch shortenes that down to 67
seconds.
Commit: 73bebf96bc21dcc01a8eccfb4ece200c1c665931
https://github.com/llvm/llvm-project/commit/73bebf96bc21dcc01a8eccfb4ece200c1c665931
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Update the position of some parameters in the vp intrinsic of abs/cttz/ctlz (#117519)
Commit: b9731a479cb053cd07cc5f460b097c5f2d5f396e
https://github.com/llvm/llvm-project/commit/b9731a479cb053cd07cc5f460b097c5f2d5f396e
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-11-24 (Sun, 24 Nov 2024)
Changed paths:
M clang/docs/ClangFormat.rst
M clang/include/clang/Format/Format.h
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
[clang-format][doc] Minor cleanup
Commit: 2568e52a733a9767014e0d8ccb685553479a3031
https://github.com/llvm/llvm-project/commit/2568e52a733a9767014e0d8ccb685553479a3031
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
Log Message:
-----------
[X86,SimplifyCFG] Support hoisting load/store with conditional faulting (Part II) (#108812)
This is a follow up of #96878 to support hoisting load/store from BBs
have the same predecessor, if load/store are the only instructions and
the branch is unpredictable, e.g.:
```
void test (int a, int *c, int *d) {
if (a)
*c = a;
else
*d = a;
}
```
Commit: b0bdbf4288a664179024eead871a5e7b7fae6dda
https://github.com/llvm/llvm-project/commit/b0bdbf4288a664179024eead871a5e7b7fae6dda
Author: Christian Sigg <csigg at google.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Port https://github.com/llvm/llvm-project/commit/7498eaa9abf2e4ac0c10fa9a02576d708cc1b624
Commit: 2585b6e8faf68d1d10ce0f356c4fede5876da6d2
https://github.com/llvm/llvm-project/commit/2585b6e8faf68d1d10ce0f356c4fede5876da6d2
Author: Christian Sigg <csigg at google.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix layering check failure.
Commit: df335b09eac8a48d9afc06d71a86646ff6b08131
https://github.com/llvm/llvm-project/commit/df335b09eac8a48d9afc06d71a86646ff6b08131
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
Log Message:
-----------
[Clang] Preserve partially substituted pack indexing type/expressions (#116782)
Substituting into pack indexing types/expressions can still result in
unexpanded types/expressions, such as `PackIndexingType` or
`PackIndexingExpr`. To handle these cases correctly, we should defer the
pack size checks to the next round of transformation, when the patterns
can be fully expanded.
To that end, the `FullySubstituted` flag is now necessary for computing
the dependencies of `PackIndexingExprs`. Conveniently, this flag can
also represent the prior `ExpandsToEmpty` status with an additional
emptiness check. Therefore, I converted all stored flags to use
`FullySubstituted`.
Fixes https://github.com/llvm/llvm-project/issues/116105
Commit: 404d0e9966a46c29e6539e20d9295adcbc8bf9bf
https://github.com/llvm/llvm-project/commit/404d0e9966a46c29e6539e20d9295adcbc8bf9bf
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/IRAttributes.cpp
Log Message:
-----------
[mlir] Adjust code flagged by ClangTidyPerformance (NFC).
We can allocate the size of the vector in advance.
Commit: 0fe12a7db3f6663c9f2572ff0232e56f1bd411ae
https://github.com/llvm/llvm-project/commit/0fe12a7db3f6663c9f2572ff0232e56f1bd411ae
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
Log Message:
-----------
[clang-format][NFC] Remove a pointer in ContinuationIndenter
Commit: 815a1bb53a9bb753f9aea177135150b23012550f
https://github.com/llvm/llvm-project/commit/815a1bb53a9bb753f9aea177135150b23012550f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZOperands.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
Log Message:
-----------
[SystemZ] Use getSignedConstant() where necessary (#117181)
This will avoid assertion failures once we disable implicit truncation
in getConstant().
Inside adjustSubwordCmp() I ended up suppressing the issue with an
explicit cast, because this code deals with a mix of unsigned and signed
immediates.
Commit: 3317c9ceac0f362298a0871e9d2bc30ef0f1e1b5
https://github.com/llvm/llvm-project/commit/3317c9ceac0f362298a0871e9d2bc30ef0f1e1b5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
[AMDGPU] Use getSignedConstant() where necessary (#117328)
Create signed constant using getSignedConstant(), to avoid future
assertion failures when we disable implicit truncation in getConstant().
This also touches some generic legalization code, which apparently only
AMDGPU tests.
Commit: 55f5d68c2da1b9dda522fdd862ed53f18166fa44
https://github.com/llvm/llvm-project/commit/55f5d68c2da1b9dda522fdd862ed53f18166fa44
Author: Hans <hans at hanshq.net>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[win/asan] Recognize mov QWORD PTR [rip + X], reg (#117335)
This comes up when intercepting clang-built `__sanitizer_cov` functions.
Commit: 6512e488f6a118fc781fc39ccb79766e11359048
https://github.com/llvm/llvm-project/commit/6512e488f6a118fc781fc39ccb79766e11359048
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
A lld/test/ELF/arm-rwpi-debug-relocs.s
Log Message:
-----------
[LLD][ARM] Allow R_ARM_SBREL32 relocations in debug info (#116956)
The R_ARM_SBREL32 relocation is used in debug info for ARM RWPI
(read-write position independent) code. Compiler-generated DWARF info
will use an expression to add the relocated value to the actual value of
the static base (held in r9) at run-time, so it should be relocated as
if the static base is at address 0.
Commit: 1bc98957c898d7e7233746a7b284982d20539593
https://github.com/llvm/llvm-project/commit/1bc98957c898d7e7233746a7b284982d20539593
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Log Message:
-----------
[lldb/DWARF] Remove duplicate type filtering (#116989)
In #108907, the index classes started filtering the DIEs according to
the full type query (instead of just the base name). This means that the
checks in SymbolFileDWARF are now redundant.
I've also moved the non-redundant checks so that now all checking is
done in the DWARFIndex class and the caller can expect to get the final
filtered list of types.
Commit: 866755f8da588ec2efbcac60679b9d9f5c4636a9
https://github.com/llvm/llvm-project/commit/866755f8da588ec2efbcac60679b9d9f5c4636a9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update backend maintainer (#116622)
We currently list Evan Cheng as the fallback maintainer for the LLVM
backend. However, their last contribution dates back to 2014.
I'd like to nominate arsenm instead, who is our most active backend
reviewer.
Commit: d35098bfa8e1e213f85a6b5035a5a7102f5da315
https://github.com/llvm/llvm-project/commit/d35098bfa8e1e213f85a6b5035a5a7102f5da315
Author: Markus Böck <markus.boeck02 at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/IR/AttrTypeBase.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
Log Message:
-----------
[mlir][LLVM][NFC] Move `LLVMStructType` to ODS (#117485)
This PR extracts NFC changes out of
https://github.com/llvm/llvm-project/pull/116035 to reap as many of the
same benefits without any of the semantic changes.
More concretely, moving `LLVMStructType` to ODS has the benefits of
being able to generate much of the required boilerplate, such as
interface definitions, documentation and more, automatically.
Furthermore, `LLVMStructType` is then treated less special and its
definition can be found at the same place where all other complex type
definitions are found in the LLVM dialect.
Future changes could leverage more automatically generated code from
TableGen such as `assemblyFormat`. As these are not as trivial, they
have been left for future PRs.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 2b5e2d74d38274e783ccf0de37aa106c76816f9e
https://github.com/llvm/llvm-project/commit/2b5e2d74d38274e783ccf0de37aa106c76816f9e
Author: David Green <david.green at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
Log Message:
-----------
[AArch64][GlobalISel] Extend arm64-vshift.ll test coverage. NFC
Commit: 7d8d51ed3409cae96fb975281deca2babf4f9994
https://github.com/llvm/llvm-project/commit/7d8d51ed3409cae96fb975281deca2babf4f9994
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
A clang/test/Sema/attr-target-version-unsupported.c
Log Message:
-----------
Recommit "[TargetVersion] Only enable on RISC-V and AArch64" (#117110)" (#117128)
Remain InheritableAttr to avoid the warning `TypePrinter.cpp:1953:10:
warning: enumeration value ‘TargetVersion’ not handled in switch`
origin messenge
[TargetVersion] Only enable on RISC-V and AArch64 (#115991) Address
#115000.
This patch constrains the target_version feature to work only on RISC-V
and AArch64 to prevent crashes in Clang.
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: e5faeb69fbb87722ee315884eeef2089b10b0cee
https://github.com/llvm/llvm-project/commit/e5faeb69fbb87722ee315884eeef2089b10b0cee
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/and-fcmp.ll
M llvm/test/Transforms/InstCombine/or-fcmp.ll
Log Message:
-----------
[InstCombine] Support reassoc for foldLogicOfFCmps (#116065)
We currently support simple reassociation for foldAndOrOfICmps().
Support the same for foldLogicOfFCmps() by going through the common
foldBooleanAndOr() helper.
This will also resolve the regression on #112704, which is also due to
missing reassoc support.
I had to adjust one fold to add support for FMF flag preservation,
otherwise there would be test regressions. There is a separate fold
(reassociateFCmps) handling reassociation for *just* that specific case
and it preserves FMF. Unfortunately it's not rendered entirely redundant
by this patch, because it handles one more level of reassociation as
well.
Commit: 22ec44f509ff266b581dbb490d7b040473b7c31a
https://github.com/llvm/llvm-project/commit/22ec44f509ff266b581dbb490d7b040473b7c31a
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AArch64/dag-combine-concat-vectors.ll
A llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
Log Message:
-----------
[DAGCombiner] Add support for scalarising extracts of a vector setcc (#116031)
For IR like this:
%icmp = icmp ult <4 x i32> %a, splat (i32 5)
%res = extractelement <4 x i1> %icmp, i32 1
where there is only one use of %icmp we can take a similar approach
to what we already do for binary ops such add, sub, etc. and convert
this into
%ext = extractelement <4 x i32> %a, i32 1
%res = icmp ult i32 %ext, 5
For AArch64 targets at least the scalar boolean result will almost
certainly need to be in a GPR anyway, since it will probably be
used by branches for control flow. I've tried to reuse existing code
in scalarizeExtractedBinop to also work for setcc.
NOTE: The optimisations don't apply for tests such as
extract_icmp_v4i32_splat_rhs in the file
CodeGen/AArch64/extract-vector-cmp.ll
because scalarizeExtractedBinOp only works if one of the input
operands is a constant.
Commit: 321fe747957703ec1d17b59b5e3ed96f58cfdb12
https://github.com/llvm/llvm-project/commit/321fe747957703ec1d17b59b5e3ed96f58cfdb12
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/eq-of-parts.ll
Log Message:
-----------
[InstCombine] Add extra test for eq of parts fold (NFC)
To guard against regression from #112704.
Commit: db140104054d5af588e26c36ad5faadbb599de1e
https://github.com/llvm/llvm-project/commit/db140104054d5af588e26c36ad5faadbb599de1e
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/abs.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[RISCV][TTI] Implement cost of intrinsic abs with LMUL (#115813)
Commit: 84fec7757ea330bbaf82b46ed081ccc45b120e45
https://github.com/llvm/llvm-project/commit/84fec7757ea330bbaf82b46ed081ccc45b120e45
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M lldb/docs/use/aarch64-linux.md
Log Message:
-----------
[lldb][docs] Clarify unit for SVE P register size
Commit: c537c752787e9da8bd8762dd5298a152f546861b
https://github.com/llvm/llvm-project/commit/c537c752787e9da8bd8762dd5298a152f546861b
Author: David Green <david.green at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
Log Message:
-----------
[AArch64][GlobalISel] Scalarize i128 vector sadd_sat/uadd_sat/etc.
As with other operations we scalarize any vectors with larger types to let the
scalare legalization kick in.
Commit: f81f47e3ff29598fdf58cde94ccf2c7d4be53df5
https://github.com/llvm/llvm-project/commit/f81f47e3ff29598fdf58cde94ccf2c7d4be53df5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/fptrunc.ll
Log Message:
-----------
[InstCombine] Add fptrunc of max test (NFC)
To guard against regression from #117182.
Commit: 15fadeb2aa8b9f27a5a45f15832e73ef79cfe407
https://github.com/llvm/llvm-project/commit/15fadeb2aa8b9f27a5a45f15832e73ef79cfe407
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[RISCV] Add cost for @llvm.experimental.vp.splat (#117313)
This is split off from #115274. There doesn't seem to be an easy way to
share this with getShuffleCost since that requires passing in a real
insert_element operand to get it to recognise it's a scalar splat.
For i1 vectors we can't currently lower them so it returns an invalid
cost.
---------
Co-authored-by: Shih-Po Hung <shihpo.hung at sifive.com>
Commit: 48ec59c234ce267a0454b15e9a79a326e21a4a97
https://github.com/llvm/llvm-project/commit/48ec59c234ce267a0454b15e9a79a326e21a4a97
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wavefrontsize.ll
Log Message:
-----------
[llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (#114481)
Fold `llvm.amdgcn.wavefrontsize` early, during InstCombine, so that it's
concrete value is used throughout subsequent optimisation passes.
Commit: 612f8ec7ac5dcddd16fb027aad64e2e353faa528
https://github.com/llvm/llvm-project/commit/612f8ec7ac5dcddd16fb027aad64e2e353faa528
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/flush_ast_print.cpp
M clang/test/OpenMP/flush_codegen.cpp
M clang/test/OpenMP/flush_messages.cpp
A flang/test/Lower/OpenMP/Todo/flush-seq-cst.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/flush02.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
seq_cst is allowed in Flush since OpenMP 5.1. (#114072)
This PR adds support seq_cst (sequential consistency) clause for the
flush directive in OpenMP. The seq_cst clause enforces a stricter memory
ordering, ensuring that all threads observe the memory effects of the
flush in the same order, improving consistency in memory operations
across threads.
---------
Co-authored-by: Shashwathi N <nshashwa at pe28vega.hpc.amslabs.hpecorp.net>
Co-authored-by: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Commit: e477989a055f92f6ca63fc8f76929cde81d33e44
https://github.com/llvm/llvm-project/commit/e477989a055f92f6ca63fc8f76929cde81d33e44
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/eq-of-parts.ll
Log Message:
-----------
[InstCombine] Handle trunc i1 pattern in eq-of-parts fold (#112704)
Equality/inequality of the low bit can be represented by `(trunc (xor x,
y) to i1)`, possibly with an extra not. We have to handle this in the
eq-of-parts fold now that we no longer canonicalize this to a masked
icmp.
Proofs: https://alive2.llvm.org/ce/z/qidkzq
Fixes https://github.com/llvm/llvm-project/issues/110919.
Commit: ceaf6e912a846b88f19df682c6bdbe9516be04e9
https://github.com/llvm/llvm-project/commit/ceaf6e912a846b88f19df682c6bdbe9516be04e9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Support ImplicitValueInitExpr for multi-dim arrays (#117312)
The attached test case from
https://github.com/llvm/llvm-project/issues/117294 used to cause an
assertion because we called classifPrim() on an array type.
The new result doesn't crash but isn't exactly perfect either. Since the
problem arises when evaluating an ImplicitValueInitExpr, we have no
proper source location to point to. Point to the caller instead.
Commit: 535247841d8635bc998ec0ec4871ea22f27caba6
https://github.com/llvm/llvm-project/commit/535247841d8635bc998ec0ec4871ea22f27caba6
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Remove comments from generated validateOperandClass (#117352)
This generated comments like:
// 'BoolReg' class
case MCK_BoolReg: {
which seem redundant because the name is always repeated on the next
line as part of the MCK_ enumerator.
Commit: 8c5a3a97c0d061880d6705db8f000aa964c3e32d
https://github.com/llvm/llvm-project/commit/8c5a3a97c0d061880d6705db8f000aa964c3e32d
Author: Jefferson Le Quellec <jefferson.lequellec at codeplay.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/docs/PatternRewriter.md
Log Message:
-----------
[mlir][docs] Update MLIR's PatternRewriter documentation (#116183)
This PR adds the missing `const override` to the `rewrite` and
`matchAndRewrite` declaration in the Pattern Rewriter documentation as
described here:
https://github.com/llvm/llvm-project/blob/5cfa8baef33636827e5aa8dd76888c724433b53e/mlir/include/mlir/IR/PatternMatch.h#L237-L265
Commit: b5a11d378db4b39ceb085ebd59c941e9369d9596
https://github.com/llvm/llvm-project/commit/b5a11d378db4b39ceb085ebd59c941e9369d9596
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/test/CodeGen/AArch64/selectopt.ll
Log Message:
-----------
[SelectOpt] Refactor to prepare for support more select-like operations (#115745)
* Enables conversion of several select-like instructions within one
group
* Any number of auxiliary instructions depending on the same condition
can be in between select-like instructions
* After splitting the basic block, move select-like instructions into
the relevant basic blocks and optimise them
* Make it easier to add support shift-base select-like instructions and
also any mixture of zext/sext/not instructions
Commit: 4b71b3782d217db0138b701c4514bd2168ca1659
https://github.com/llvm/llvm-project/commit/4b71b3782d217db0138b701c4514bd2168ca1659
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/unittests/Core/CMakeLists.txt
A bolt/unittests/Core/MemoryMaps.cpp
M llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn
Log Message:
-----------
[BOLT] DataAggregator support for binaries with multiple text segments (#92815)
When a binary has multiple text segments, the Size is computed as the
difference of the last address of these segments from the BaseAddress.
The base addresses of all text segments must be the same.
Introduces flag 'perf-script-events' for testing. It allows passing perf events
without BOLT having to parse them using 'perf script'. The flag is used to
pass a mock perf profile that has two memory mappings for a mock binary
that has two text segments. The size of the mapping is updated as this
change `parseMMapEvents` processes all text segments.
Commit: 957c2ac4f17ab5cc1e4a13c99ed968dcaac1dd91
https://github.com/llvm/llvm-project/commit/957c2ac4f17ab5cc1e4a13c99ed968dcaac1dd91
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M bolt/utils/bughunter.sh
Log Message:
-----------
[BOLT] Fix for bughunter.sh in offline mode (#116649)
In offline mode, the script sets 'PASS' variable and does not use it.
Surrounding code suggests using 'FAIL' variable instead.
Commit: b4d49fb52e2068cdf4944dc0783c3ef691c946c4
https://github.com/llvm/llvm-project/commit/b4d49fb52e2068cdf4944dc0783c3ef691c946c4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libc/shared/rpc.h
M libc/utils/gpu/loader/Loader.h
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
M libc/utils/gpu/loader/nvptx/nvptx-loader.cpp
M libc/utils/gpu/server/llvmlibc_rpc_server.h
M libc/utils/gpu/server/rpc_server.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc] Remove RPC server API and use the header directly (#117075)
Summary:
This patch removes much of the `llvmlibc_rpc_server` interface. This
pretty much deletes all of this code and just replaces it with including
`rpc.h` directly. We still maintain the file to let `libc` handle the
opcodes, since those depend on the `printf` impelmentation.
This will need to be cleaned up more, but I don't want to put too much
into a single patch.
Commit: 0ccc3895126aaa94ae3fe890fcca0ad69658bbab
https://github.com/llvm/llvm-project/commit/0ccc3895126aaa94ae3fe890fcca0ad69658bbab
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libc/shared/rpc_util.h
Log Message:
-----------
[libc] Make RPC header work with GCC9
Commit: 52755ac2531529369f1f29b9d0b29645f304f389
https://github.com/llvm/llvm-project/commit/52755ac2531529369f1f29b9d0b29645f304f389
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/OpenMP/Todo/map-mapper.f90
M flang/test/Parser/OpenMP/from-clause.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
M flang/test/Parser/OpenMP/target-update-to-clause.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
M flang/test/Semantics/OpenMP/from-clause-v45.f90
M flang/test/Semantics/OpenMP/from-clause-v51.f90
M flang/test/Semantics/OpenMP/map-clause.f90
M flang/test/Semantics/OpenMP/map-modifiers.f90
M flang/test/Semantics/OpenMP/to-clause-v45.f90
M flang/test/Semantics/OpenMP/to-clause-v51.f90
Log Message:
-----------
[flang][OpenMP] Use new modifier infrastructure for MAP/FROM/TO clauses (#117447)
This removes the specialized parsers and helper classes for these
clauses, namely ConcatSeparated, MapModifiers, and MotionModifiers. Map
and the motion clauses are now handled in the same way as all other
clauses with modifiers, with one exception: the commas separating their
modifiers are optional. This syntax is deprecated in OpenMP 5.2.
Implement version checks for modifiers: for a given modifier on a given
clause, check if that modifier is allowed on this clause in the
specified OpenMP version. This replaced several individual checks.
Add a testcase for handling map modifiers in a different order, and for
diagnosing an ultimate modifier out of position.
Commit: 506ca19dc9d6a9f0ad47b82e71525743bbe8cf85
https://github.com/llvm/llvm-project/commit/506ca19dc9d6a9f0ad47b82e71525743bbe8cf85
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M offload/DeviceRTL/src/Mapping.cpp
M offload/test/offloading/ompx_bare_ballot_sync.c
M offload/test/offloading/ompx_bare_shfl_down_sync.cpp
Log Message:
-----------
[OpenMP] Remove use of '__AMDGCN_WAVEFRONT_SIZE' (#113156)
Summary:
This is going to be deprecated in
https://github.com/llvm/llvm-project/pull/112849. This patch ports it to
use the builtin instead. This isn't a compile constant, so it could
slightly negatively affect codegen. There really should be an IR pass to
turn it into a constant if the function has known attributes.
Using the builtin is correct when we just do it for knowing the size
like we do here. Obviously guarding w32/w64 code with this check would
be broken.
Commit: 4715dec8c0200d2c57176e08ce3d7ce88776828d
https://github.com/llvm/llvm-project/commit/4715dec8c0200d2c57176e08ce3d7ce88776828d
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
Log Message:
-----------
[XTensa] Use getSignedConstant() for negative values
Commit: 3699931dee058c02f52818529b4e6b53613a2dc2
https://github.com/llvm/llvm-project/commit/3699931dee058c02f52818529b4e6b53613a2dc2
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
Log Message:
-----------
[M68k] Use getSignedConstant() where necessary
Commit: 18abc7e0c5b34e9e7bbe0893a4a5281c0937f7d8
https://github.com/llvm/llvm-project/commit/18abc7e0c5b34e9e7bbe0893a4a5281c0937f7d8
Author: David Green <david.green at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[PatternMatch] Introduce m_c_Select (#114328)
This matches m_Select(m_Value(), L, R) or m_Select(m_Value(), R, L).
Commit: 9b76e7fc603071baf6c30f0daaf4f4d5429a8a1b
https://github.com/llvm/llvm-project/commit/9b76e7fc603071baf6c30f0daaf4f4d5429a8a1b
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AArch64/dag-combine-concat-vectors.ll
R llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
Log Message:
-----------
Revert "[DAGCombiner] Add support for scalarising extracts of a vector setcc (#116031)" (#117556)
This reverts commit 22ec44f509ff266b581dbb490d7b040473b7c31a.
Commit: 6f16a8bf17ac9a171b5435ee53c3d2bef657bdad
https://github.com/llvm/llvm-project/commit/6f16a8bf17ac9a171b5435ee53c3d2bef657bdad
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/c23.c
Log Message:
-----------
[clang][bytecode] Use bitcasts to cast from integer to vector (#117547)
In C, a cast from an integer to a vector is a CK_BitCast. Implement this
using the same code we use for __builtin_bit_cast.
Commit: 2d62daab497bfe1991869dc090c7d20a71108360
https://github.com/llvm/llvm-project/commit/2d62daab497bfe1991869dc090c7d20a71108360
Author: David Truby <david.truby at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
A flang/test/Fir/struct-return-aarch64.fir
Log Message:
-----------
[flang] AArch64 support for BIND(C) derived return types (#114051)
This patch adds support for BIND(C) derived types as return values
matching the AArch64 Procedure Call Standard for C.
Support for BIND(C) derived types as value parameters will be in a
separate patch.
Commit: 809c5ac3b0d78f504d93717ac4c0a02816cf47bb
https://github.com/llvm/llvm-project/commit/809c5ac3b0d78f504d93717ac4c0a02816cf47bb
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
[X86] Modify tests for constrained rounding functions (#116951)
The existing tests for constrained functions often use constant
arguments. If constant evaluation is enhanced, such tests will not check
code generation of the tested functions. To avoid it, the tests are
modified to use loaded value instead of constants. Now only the tests
for rounding functions are changed.
Commit: 06cb5c9d2c24e7560fcafd911fb145b96e96a675
https://github.com/llvm/llvm-project/commit/06cb5c9d2c24e7560fcafd911fb145b96e96a675
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update ARM maintainers (#117002)
Move rengolin and asl to former maintainers, and add davemgreen,
ostannard, nasherm, smithp35 and stuji from ARM as current
maintainers (with a focus area for some).
Commit: 4a7a27cb1c5b7fd1acd69b0b91d5eee9391bd4c0
https://github.com/llvm/llvm-project/commit/4a7a27cb1c5b7fd1acd69b0b91d5eee9391bd4c0
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/test/CodeGen/AArch64/selectopt.ll
Log Message:
-----------
Revert "[SelectOpt] Refactor to prepare for support more select-like operations (#115745)"
This reverts commit b5a11d378db4b39ceb085ebd59c941e9369d9596.
Commit: a5506a39e0ae8de77136334659b526e5f224850d
https://github.com/llvm/llvm-project/commit/a5506a39e0ae8de77136334659b526e5f224850d
Author: Yadong Chen <cyd.matt at qq.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
Log Message:
-----------
[mlir][spirv] Use assemblyFormat to define {InBound}PtrAccessChainOp assembly (#116943)
Declarative assemblyFormat ODS is more concise and requires less
boilerplate than filling out cpp interfaces.
Changes:
updates the PtrAccessChainOp and InBoundPtrAccessChainOp defined in
SPIRVMemoryOps.td to use assemblyFormat. Removes part print/parse from
MemoryOps.cpp which is now generated by assemblyFormat
Updates tests to updated format
Issue: #73359
Commit: 6de97e9a679aaf3148d467e4d4e1ea99ba55d555
https://github.com/llvm/llvm-project/commit/6de97e9a679aaf3148d467e4d4e1ea99ba55d555
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libc/cmake/modules/prepare_libc_gpu_build.cmake
Log Message:
-----------
[libc] Allow NVPTX targets to build in debug mode
Summary:
This previously did not work, but recent improvements to the NVPTX
backend allow this to work now.
Commit: 387be04dde0a2618d2baf37a4652a076c003b4a2
https://github.com/llvm/llvm-project/commit/387be04dde0a2618d2baf37a4652a076c003b4a2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc][NFC] Add const to RPC header members
Summary:
Make sure that these don't get modified.
Commit: 7800d59f5bd03e38db0bbe94db5f8a3e0ec1a9a6
https://github.com/llvm/llvm-project/commit/7800d59f5bd03e38db0bbe94db5f8a3e0ec1a9a6
Author: thetruestblue <bblueconway at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/docs/SanitizerCoverage.rst
M clang/test/CodeGen/sanitize-coverage-gated-callbacks.c
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Log Message:
-----------
[SanitizerCoverage] Add gated tracing callbacks support to trace-cmp (#113227)
The option -sanitizer-coverage-gated-trace-callbacks gates the
invocation of the trace-pc-guard callbacks based on the value of a
global variable, which is stored in a specific section.
In this commit, we extend this feature to trace-cmp and gate the cmp
callbacks to the same variable used for trace-pc-guard.
Update SanitizerCoverage doc with this flag.
rdar://135404160
Patch by: Andrea Fioraldi
Commit: f9dca5bdbb0fccc0c12c7f8f1a190fa05f72f90d
https://github.com/llvm/llvm-project/commit/f9dca5bdbb0fccc0c12c7f8f1a190fa05f72f90d
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallVectorExtras.h
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/SmallVectorExtrasTest.cpp
Log Message:
-----------
[ADT] Add convenience function `filter_to_vector` (#117460)
This materializes a filter range as a small vector.
Similar to `map_to_vector`, this new utility function lives in the
`SmallVectorExtras.h` header.
Commit: 7e3187e12a2cef8b2552e08ce9423aca9c09d813
https://github.com/llvm/llvm-project/commit/7e3187e12a2cef8b2552e08ce9423aca9c09d813
Author: ddubov100 <155631080+ddubov100 at users.noreply.github.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/include/mlir/Interfaces/TilingInterface.td
Log Message:
-----------
Adding mlir prefix for missing places in TilingInterface.td (#117495)
Commit: 57bbdbd7ae3698a274edd4dd6ef1b53d9129e552
https://github.com/llvm/llvm-project/commit/57bbdbd7ae3698a274edd4dd6ef1b53d9129e552
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/non-power-2-num-elems-reused.ll
Log Message:
-----------
[SLP]Relax assertion in mask combine for non-power-of-2 number of elements
The nodes may contain non-power-of-2 number of elements. Need to relax
the assertion to avoid possible compiler crash
Fixes #117517
Commit: 1b18ce57f3d9bef4a97c4dd002570b3441ac85e5
https://github.com/llvm/llvm-project/commit/1b18ce57f3d9bef4a97c4dd002570b3441ac85e5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll
Log Message:
-----------
[X86] vector-interleaved-load-i16-stride-2.ll - regenerate with AVX512 common prefix
Commit: 4d8eb009d8ae4500940d77a64d914eed9a13b92c
https://github.com/llvm/llvm-project/commit/4d8eb009d8ae4500940d77a64d914eed9a13b92c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Log Message:
-----------
[InstCombine] Remove SPF guard for trunc transforms (#117535)
This shouldn't be necessary anymore now that SPF patterns are
canonicalized to intrinsics.
Commit: 3de21477c49172081e502b47d608e729915f0914
https://github.com/llvm/llvm-project/commit/3de21477c49172081e502b47d608e729915f0914
Author: Viktoriia Bakalova <115406782+VitaNuo at users.noreply.github.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[clang][codegen] Mention the invariant that LLVM demangler should be … (#117346)
…able to handle mangled names generated by clang.
https://discourse.llvm.org/t/rfc-clang-diagnostic-for-demangling-failures/82835/8
Since we're putting the work on the above RFC on hold, let's leave a
comment in the source code pointing to prior efforts and the suggestion
of further steps.
Commit: f953b5eb72df77fc301aac210eab31c6270ff771
https://github.com/llvm/llvm-project/commit/f953b5eb72df77fc301aac210eab31c6270ff771
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
Log Message:
-----------
[SLP]Relax assertion about subvectors mask size
SubVectorsMask might be less than CommonMask, if the vectors with larger
number of elements are permuted or reused elements are used. Need to
consider this when estimation/building the vector to avoid compiler
crash
Fixes #117518
Commit: b872c4c9939999d8c588ca4e149e2b0b40773ebf
https://github.com/llvm/llvm-project/commit/b872c4c9939999d8c588ca4e149e2b0b40773ebf
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M flang/test/Driver/print-supported-cpus.f90
Log Message:
-----------
[flang][Driver] Fix incorrect condition in test
The conditions in a test did not match the target that was being
requested. This resulted in a test failure when building with
-DTARGETS_TO_BUILD=X86. This is now fixed.
Commit: c9e606b9cf50b822aca2a3dc5762fb77e9b976bd
https://github.com/llvm/llvm-project/commit/c9e606b9cf50b822aca2a3dc5762fb77e9b976bd
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[mlir] Improve doc in `OpFormatGen.cpp` (NFC) (#117564)
The comment is misleading because attributes do not have
`elidePrintingDefaultValue` bit. It appears that
`elidePrintingDefaultValue` was never merged upstream (see:
https://reviews.llvm.org/D135398 ), but the comment was likely
introduced by mistake in a later revision
(https://reviews.llvm.org/D135993.).
Commit: 99fd1c5536547ed4fc360b16e7fa2e06278707a8
https://github.com/llvm/llvm-project/commit/99fd1c5536547ed4fc360b16e7fa2e06278707a8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libcxx/include/__chrono/duration.h
Log Message:
-----------
[libc++][NFC] Don't add legacy transitive includes in <__chrono/duration.h>
Commit: 20bd029a40faa2ae5383dd742b8a3595b1fe7c31
https://github.com/llvm/llvm-project/commit/20bd029a40faa2ae5383dd742b8a3595b1fe7c31
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
Log Message:
-----------
[RISCV] Promote fldexp with Zfh. (#117396)
The default expansion tries to create i16 operations after type
legalization.
Fixes #117349
Commit: 3db4f5b0daa33903e6522e2bf1b07c45edb5c8ab
https://github.com/llvm/llvm-project/commit/3db4f5b0daa33903e6522e2bf1b07c45edb5c8ab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
Log Message:
-----------
AMDGPU: Refine gfx950 xdl-write-vgpr hazard cases (#117285)
The 2-pass XDL write VGPR, read by non-XDL SGEMM/DGEMM case
was 1 wait state overly conservative. Previously, for gfx940,
the XDL/non-XDL cases happened to have the same number of cycles
in all cases. Now the XDL consumer case has an additional state for
2 pass sources.
Commit: c3fe5ad6be9eb58d5043de9a5940ef3c397631b2
https://github.com/llvm/llvm-project/commit/c3fe5ad6be9eb58d5043de9a5940ef3c397631b2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
A llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
Log Message:
-----------
AMDGPU: Handle vcmpx+permalane gfx950 hazard (#117286)
Confusingly, this is a different hazard to the one on gfx10
with a subtarget feature.
Commit: 27a8afa3fcf7e0378dff65cf3374f7a4e4e2b9a6
https://github.com/llvm/llvm-project/commit/27a8afa3fcf7e0378dff65cf3374f7a4e4e2b9a6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
Log Message:
-----------
AMDGPU: Handle gfx950 valu write vdst + permlane read hazard (#117287)
Commit: 8a2311c4bf9993230e37dc20b57973dc917f2338
https://github.com/llvm/llvm-project/commit/8a2311c4bf9993230e37dc20b57973dc917f2338
Author: Callum Fare <callum at codeplay.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
A offload/liboffload/API/APIDefs.td
A offload/liboffload/API/CMakeLists.txt
A offload/liboffload/API/Common.td
A offload/liboffload/API/Device.td
A offload/liboffload/API/OffloadAPI.td
A offload/liboffload/API/Platform.td
A offload/liboffload/API/README.md
A offload/liboffload/CMakeLists.txt
A offload/liboffload/README.md
A offload/liboffload/exports
A offload/liboffload/include/OffloadImpl.hpp
A offload/liboffload/include/generated/OffloadAPI.h
A offload/liboffload/include/generated/OffloadEntryPoints.inc
A offload/liboffload/include/generated/OffloadFuncs.inc
A offload/liboffload/include/generated/OffloadImplFuncDecls.inc
A offload/liboffload/include/generated/OffloadPrint.hpp
A offload/liboffload/src/Helpers.hpp
A offload/liboffload/src/OffloadImpl.cpp
A offload/liboffload/src/OffloadLib.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/tools/offload-tblgen/default_returns.td
A offload/test/tools/offload-tblgen/entry_points.td
A offload/test/tools/offload-tblgen/functions_basic.td
A offload/test/tools/offload-tblgen/functions_code_loc.td
A offload/test/tools/offload-tblgen/functions_ranged_param.td
A offload/test/tools/offload-tblgen/print_enum.td
A offload/test/tools/offload-tblgen/print_function.td
A offload/test/tools/offload-tblgen/type_tagged_enum.td
A offload/tools/offload-tblgen/APIGen.cpp
A offload/tools/offload-tblgen/CMakeLists.txt
A offload/tools/offload-tblgen/EntryPointGen.cpp
A offload/tools/offload-tblgen/FuncsGen.cpp
A offload/tools/offload-tblgen/GenCommon.hpp
A offload/tools/offload-tblgen/Generators.hpp
A offload/tools/offload-tblgen/PrintGen.cpp
A offload/tools/offload-tblgen/RecordTypes.hpp
A offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
A offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/common/Environment.cpp
A offload/unittests/OffloadAPI/common/Environment.hpp
A offload/unittests/OffloadAPI/common/Fixtures.hpp
A offload/unittests/OffloadAPI/device/olDeviceInfo.hpp
A offload/unittests/OffloadAPI/device/olGetDevice.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
Log Message:
-----------
[Offload] Introduce offload-tblgen and initial new API implementation (#108413)
Introduce `offload-tblgen` and an initial implementation of a subset of
the new API. The tablegen files are intended to be the single source of
truth for the new API, with the header files, documentation, and others
bits of source all automatically generated.
**TODO** (based on review feedback so far):
- [x] Check in the generated headers
- [x] Add an `offload-generate` target to trigger the generation rather
than building them every time
- [x] Decide how error handling should work
- [x] Finish up new error handling implementation
- [x] Decide naming convention
- [x] Add testing for the new API
- [x] Add tablegen specific testing
- [x] clang-tidy and use llvm:: types when possible
- [x] Add optional code location arguments
- [x] Avoid multiple returns from one function
### offload-tblgen
See the included
[README](https://github.com/callumfare/llvm-project/blob/d80db06491d85444bb6f7e59d8068a22cef3a6b4/offload/new-api/API/README.md)
for more information on how the API definition and generation works. I'm
happy to answer any questions about it and plan to walk through it in a
future LLVM Offload call.
It should be noted that struct definitions have not been fully
implemented/tested as they aren't used by the initial API definitions,
but finishing that off in the future shouldn't be too much work.
The tablegen tooling has been designed to be easily extended with new
backends, using the classes in `RecordTypes.hpp` to abstract over the
tablegen records.
### New API
Previous discussions at the LLVM/Offload meeting have brought up the
need for a new API for exposing the functionality of the plugins. This
change introduces a very small subset of a new API, which is primarily
for testing the offload tooling and demonstrating how a new API can fit
into the existing code base without being too disruptive. Exact designs
for these entry points and future additions can be worked out over time.
The new API does however introduce the bare minimum functionality to
implement device discovery for Unified Runtime and SYCL. This means that
the `urinfo` and `sycl-ls` tools can be used on top of Offload. A
(rough) implementation of a Unified Runtime adapter (aka plugin) for
Offload is available
[here](https://github.com/callumfare/unified-runtime/tree/offload_adapter).
Our intention is to maintain this and use it to implement and test
Offload API changes with SYCL.
### Demoing the new API
```sh
$ git clone -b offload_adapter https://github.com/callumfare/unified-runtime.git
$ cd unified-runtime
$ mkdir build
$ cd build
$ cmake .. -GNinja -DUR_BUILD_ADAPTER_OFFLOAD=ON \
-DUR_OFFLOAD_INSTALL_DIR=<offload build dir containing liboffload_new.so> \
-DUR_OFFLOAD_INCLUDE_DIR=<offload build dir containing 'offload' headers directory>
$ ninja urinfo
export LD_LIBRARY_PATH=<offload build dir containing offload plugin libraries>
$ UR_ADAPTERS_FORCE_LOAD=$PWD/lib/libur_adapter_offload.so ./bin/urinfo
[cuda:gpu][cuda:0] CUDA, NVIDIA GeForce GT 1030 [12030]
# Demo with tracing
$ OFFLOAD_TRACE=1 UR_ADAPTERS_FORCE_LOAD=$PWD/lib/libur_adapter_offload.so ./bin/urinfo
---> offloadPlatformGet(.NumEntries = 0, .phPlatforms = {}, .pNumPlatforms = 0x7ffd05e4d6e0 (2))-> OFFLOAD_RESULT_SUCCESS
---> offloadPlatformGet(.NumEntries = 2, .phPlatforms = {0x564bf4040220, 0x564bf4040240}, .pNumPlatforms = nullptr)-> OFFLOAD_RESULT_SUCCESS
...
```
### Open questions and future work
* The new API is implemented in a separate library
(`liboffload_new.so`). It could just as easily be part of the existing
`libomptarget` library - I have no strong feelings on which is better.
* Only some of the available device info is exposed, and not all the
possible device queries needed for SYCL are implemented by the plugins.
A sensible next step would be to refactor and extend the existing device
info queries in the plugins. The existing info queries are all strings,
but the new API introduces the ability to return any arbitrary type.
* It may be sensible at some point for the plugins to implement the new
API directly, and the higher level code on top of it could be made
generic, but this is more of a long-term possibility.
Commit: 9cc2502c048b1403ba8ba5cc5a655d867c329d12
https://github.com/llvm/llvm-project/commit/9cc2502c048b1403ba8ba5cc5a655d867c329d12
Author: Brian Cain <bcain at quicinc.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[clang] hexagon: fix link order for libc/builtins (#117057)
When linking programs with `eld`, we get a link error like below:
Error:
/inst/clang+llvm-19.1.0-cross-hexagon-unknown-linux-musl/x86_64-linux-gnu/bin/../target/hexagon-unknown-linux-musl//usr/lib/libc.a(scalbn.lo)(.text.scalbn+0x3c):
undefined reference to `__hexagon_muldf3'
libc has references to the clang_rt builtins library, so the order of
the libraries should be reversed.
Commit: d88ed9357a0e4a49ce908c538ef21c1702c34638
https://github.com/llvm/llvm-project/commit/d88ed9357a0e4a49ce908c538ef21c1702c34638
Author: Raphael Moreira Zinsly <6718397+rzinsly at users.noreply.github.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[NFC][RISCV] Refactor allocation of the stack space (#116625)
Separates the stack allocations from prologue in preparation for the
stack clash protection support.
Commit: e97fb2207e1ef6235a6268dbbd3cc08d437b07ef
https://github.com/llvm/llvm-project/commit/e97fb2207e1ef6235a6268dbbd3cc08d437b07ef
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-read-tr.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
M llvm/test/MC/AMDGPU/gfx950-unsupported.s
A llvm/test/MC/AMDGPU/gfx950_asm_read_tr.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_ds_read_tr.txt
Log Message:
-----------
AMDGPU: Add support for load transpose instructions for gfx950 (#117378)
This patch support for intrinsics in clang, as well as assembly
instructions in the backend.
Co-authored-by: Sirish Pande <Sirish.Pande at amd.com>
Commit: 6f8e7c11cf6157a9f93aa5842dd26fb51b37dce7
https://github.com/llvm/llvm-project/commit/6f8e7c11cf6157a9f93aa5842dd26fb51b37dce7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Add MC support for gfx950 V_BITOP3_B32/B16 (#117379)
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 8ea78002c2637faf56ed5c0c88582fdd4f0ac701
https://github.com/llvm/llvm-project/commit/8ea78002c2637faf56ed5c0c88582fdd4f0ac701
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll
Log Message:
-----------
[RISCV] Add test case for RVV CSRs with cm.push.
The cfi_offset is incorrect for the RVV registers when cm.push
is used.
Commit: 7ad1084b521ea191245c47b4e63e4f97035e3786
https://github.com/llvm/llvm-project/commit/7ad1084b521ea191245c47b4e63e4f97035e3786
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scale_[f16|f32]_fp8 of gfx950. (#117380)
OPSEL ASM Syntax: opsel:[x,y,z]
where,
opsel[x] = Inst{11} = src0_modifier{2}
opsel[y] = Inst{12} = src1_modifier{2}
opsel[z] = Inst{14} = src0_modifier{3}
Note: Conventional Inst{13} i.e. OPSEL[2] is ignored in asm syntax.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 91af15b7648a10c3edcd9792b3f3487be399233b
https://github.com/llvm/llvm-project/commit/91af15b7648a10c3edcd9792b3f3487be399233b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scale_[f16|f32]_bf8 of gfx950. (#117381)
OPSEL ASM Syntax: opsel:[x,y,z]
where,
opsel[x] = Inst{11} = src0_modifier{2}
opsel[y] = Inst{12} = src1_modifier{2}
opsel[z] = Inst{14} = src0_modifier{3}
Note: Conventional Inst{13} i.e. OPSEL[2] is ignored in asm syntax.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 8997bf8e4636592ca0e4f31747adc02904d47b0c
https://github.com/llvm/llvm-project/commit/8997bf8e4636592ca0e4f31747adc02904d47b0c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_pk_{fp8|bf8}_f32 of gfx950. (#117382)
OPSEL[3] selects low/high 16 bits of dest write.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 70fef78329eb4da338ef8345b5059f9a57ff21a5
https://github.com/llvm/llvm-project/commit/70fef78329eb4da338ef8345b5059f9a57ff21a5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_pk_f32_[fp|bf]8 of gfx950. (#117383)
OPSEL[0] selects srcword to read.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 362d8fb2416ca3393b960eb158301d6f06dc5324
https://github.com/llvm/llvm-project/commit/362d8fb2416ca3393b960eb158301d6f06dc5324
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16 of gfx950. (#117384)
OPSEL ASM Syntax: opsel:[x,y,z]
where,
opsel[z] = Inst{14} = src0_modifier{3}
Note: Conventional Inst{13} i.e. OPSEL[2] is ignored in asm syntax.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 00770489e4299fe6ab99b1772127d84dfe222ffc
https://github.com/llvm/llvm-project/commit/00770489e4299fe6ab99b1772127d84dfe222ffc
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Frontend/InitPreprocessor.cpp
A clang/test/C/C23/n2412.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init.c
Log Message:
-----------
[C23] Fixed the value of BOOL_WIDTH (#117364)
The standard mandates that this returns the width of the type, which is
the number of bits in the value. For bool, that's required to be `1`
explicitly.
Fixes #117348
Commit: 0a140c4248b5eae5c044de4f394852ee7339a5e8
https://github.com/llvm/llvm-project/commit/0a140c4248b5eae5c044de4f394852ee7339a5e8
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
Log Message:
-----------
[AMDGPU] Adds pre-commit test for fmul-select combine (#111107)
This adds the f32/f64/f16/bf16 test cases for below pattern :
`fmul x, select(y, A, B)`
with just one use of select Inst above.
It acts as pre-commit tests for dagCombining above pattern into cheaper
ldexp in case of non-inlline 32 bit-constants. (#111109)
Commit: 29828b26fac3ee744c8f7dcb33cc082dc7c00a02
https://github.com/llvm/llvm-project/commit/29828b26fac3ee744c8f7dcb33cc082dc7c00a02
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll
Log Message:
-----------
[RISCV] Fix double counting scalar CSRs with Zcmp when emitting cfi_offset for RVV CSRs. (#117408)
getCalleeSavedStackSize() already contains RVPushStackSize. Don't
subtract it again.
Commit: d7c20a6f0c1119814bc1580ae3c8e68b5a7e7bed
https://github.com/llvm/llvm-project/commit/d7c20a6f0c1119814bc1580ae3c8e68b5a7e7bed
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
R libc/include/llvm-libc-types/rpc_opcodes_t.h
A libc/shared/rpc_opcodes.h
M libc/src/__support/RPC/rpc_client.h
M libc/utils/gpu/loader/Loader.h
M libc/utils/gpu/server/CMakeLists.txt
M libc/utils/gpu/server/rpc_server.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc][NFC] Move RPC opcodes to the 'shared/' directory as well
Commit: 1a86d44c80d2a0c603f67ed8bdcccaed830719a3
https://github.com/llvm/llvm-project/commit/1a86d44c80d2a0c603f67ed8bdcccaed830719a3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scale_fp4<->f32 of gfx950. (#117417)
OPSEL ASM Syntax for v_cvt_scalef32_pk_f32_fp4 : opsel:[x,y,z]
where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read.
OPSEL ASM Syntax for v_cvt_scalef32_pk_fp4_f32 : opsel:[a,b,c,d]
where, c & d i.e. OPSEL[3 : 2] selects which dst_byte to write.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 3cb28522ba4c2b80fbaf0840377aab4fce985110
https://github.com/llvm/llvm-project/commit/3cb28522ba4c2b80fbaf0840377aab4fce985110
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/test/hwasan/lit.cfg.py
M compiler-rt/test/lit.common.configured.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Reapply "[runtimes] Allow building against an installed LLVM tree"
This relands #86209 which was reverted because ./bin/llvm no longer
accepted test paths in the source tree instead of the build tree. This was
happening because `add_subdirectory(${LLVM_MAIN_SRC_DIR}/utils/llvm-lit`
was called before all tsst suites were registered, and therefore it was
missing the source->build dir mappings.
Original commit message:
I am currently trying to test the LLVM runtimes (including compiler-rt)
against an installed LLVM tree rather than a build tree (since that is
no longer available). Currently, the runtimes build of compiler-rt assumes
that LLVM_BINARY_DIR is writable since it uses configure_file() to write
there during the CMake configure stage. Instead, generate this file inside
CMAKE_CURRENT_BINARY_DIR, which will match LLVM_BINARY_DIR when invoked
from llvm/runtimes/CMakeLists.txt.
I also needed to make a minor change to the hwasan tests: hwasan_symbolize
was previously found in the LLVM_BINARY_DIR, but since it is generated as
part of the compiler-rt build it is now inside the CMake build directory
instead. I fixed this by passing the output directory to lit as
config.compiler_rt_bindir and using llvm_config.add_tool_substitutions().
For testing that we no longer write to the LLVM install directory as
part of testing or configuration, I created a read-only bind mount and
configured the runtimes builds as follows:
```
$ sudo mount --bind --read-only ~/llvm-install /tmp/upstream-llvm-readonly
$ cmake -DCMAKE_BUILD_TYPE=Debug \
-DCMAKE_C_COMPILER=/tmp/upstream-llvm-readonly/bin/clang \
-DCMAKE_CXX_COMPILER=/tmp/upstream-llvm-readonly/bin/clang++ \
-DLLVM_INCLUDE_TESTS=TRUE -DLLVM_ENABLE_ASSERTIONS=TRUE \
-DCOMPILER_RT_INCLUDE_TESTS=TRUE -DCOMPILER_RT_DEBUG=OFF \
-DLLVM_ENABLE_RUNTIMES=compiler-rt \
-DCMAKE_DISABLE_FIND_PACKAGE_LLVM=TRUE \
-DCMAKE_DISABLE_FIND_PACKAGE_Clang=TRUE \
-G Ninja -S ~/upstream-llvm-project/runtimes \
-B ~/upstream-llvm-project/runtimes/cmake-build-debug-llvm-git
```
Pull Request: https://github.com/llvm/llvm-project/pull/114307
Commit: d047bee496e07748f0dd70f52c3b309c66fedab3
https://github.com/llvm/llvm-project/commit/d047bee496e07748f0dd70f52c3b309c66fedab3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
R offload/liboffload/API/APIDefs.td
R offload/liboffload/API/CMakeLists.txt
R offload/liboffload/API/Common.td
R offload/liboffload/API/Device.td
R offload/liboffload/API/OffloadAPI.td
R offload/liboffload/API/Platform.td
R offload/liboffload/API/README.md
R offload/liboffload/CMakeLists.txt
R offload/liboffload/README.md
R offload/liboffload/exports
R offload/liboffload/include/OffloadImpl.hpp
R offload/liboffload/include/generated/OffloadAPI.h
R offload/liboffload/include/generated/OffloadEntryPoints.inc
R offload/liboffload/include/generated/OffloadFuncs.inc
R offload/liboffload/include/generated/OffloadImplFuncDecls.inc
R offload/liboffload/include/generated/OffloadPrint.hpp
R offload/liboffload/src/Helpers.hpp
R offload/liboffload/src/OffloadImpl.cpp
R offload/liboffload/src/OffloadLib.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
R offload/test/tools/offload-tblgen/default_returns.td
R offload/test/tools/offload-tblgen/entry_points.td
R offload/test/tools/offload-tblgen/functions_basic.td
R offload/test/tools/offload-tblgen/functions_code_loc.td
R offload/test/tools/offload-tblgen/functions_ranged_param.td
R offload/test/tools/offload-tblgen/print_enum.td
R offload/test/tools/offload-tblgen/print_function.td
R offload/test/tools/offload-tblgen/type_tagged_enum.td
R offload/tools/offload-tblgen/APIGen.cpp
R offload/tools/offload-tblgen/CMakeLists.txt
R offload/tools/offload-tblgen/EntryPointGen.cpp
R offload/tools/offload-tblgen/FuncsGen.cpp
R offload/tools/offload-tblgen/GenCommon.hpp
R offload/tools/offload-tblgen/Generators.hpp
R offload/tools/offload-tblgen/PrintGen.cpp
R offload/tools/offload-tblgen/RecordTypes.hpp
R offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
R offload/unittests/OffloadAPI/CMakeLists.txt
R offload/unittests/OffloadAPI/common/Environment.cpp
R offload/unittests/OffloadAPI/common/Environment.hpp
R offload/unittests/OffloadAPI/common/Fixtures.hpp
R offload/unittests/OffloadAPI/device/olDeviceInfo.hpp
R offload/unittests/OffloadAPI/device/olGetDevice.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
R offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
Log Message:
-----------
Revert "[Offload] Introduce offload-tblgen and initial new API implementation (#108413)"
This reverts commit 8a2311c4bf9993230e37dc20b57973dc917f2338.
Commit: a5dd6463608bb09404e8a898ed337ef0b4a292c4
https://github.com/llvm/llvm-project/commit/a5dd6463608bb09404e8a898ed337ef0b4a292c4
Author: B I Mohammed Abbas <bimohammadabbas at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/extendhfxf2.c
A compiler-rt/test/builtins/Unit/extendhfxf2_test.c
Log Message:
-----------
Add extendhfxf2 into compiler rt (#113897)
Retry of pr #109090 and #111099.
Co-authored-by: Alexander Richardson <alexrichardson at google.com>
Commit: ed6749a4055c8b1500b39ebd4a8b981bf25250e8
https://github.com/llvm/llvm-project/commit/ed6749a4055c8b1500b39ebd4a8b981bf25250e8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
Log Message:
-----------
[RISCV] Promote frexp with Zfh.
The default expansion tries to create an illegal integer type after
legalization.
Commit: b0bc4674b761a71974e561184d055ac8159fd578
https://github.com/llvm/llvm-project/commit/b0bc4674b761a71974e561184d055ac8159fd578
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleZnver4.td
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-sse41.s
Log Message:
-----------
[X86] Fix bad instregex in VPMOVSX/ZX znver4 512-bit patterns.
The Z size was optional, meaning it matched with the 128-bit SSE instructions as well.
Noticed while triaging the strange perf numbers on #110308
Commit: bb88fd171a6be892cec36969860a9034b48b8656
https://github.com/llvm/llvm-project/commit/bb88fd171a6be892cec36969860a9034b48b8656
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
A clang/test/CodeGenHLSL/resource-bindings.hlsl
M llvm/docs/DirectX/DXILResources.rst
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
Log Message:
-----------
[DirectX] Calculate resource binding offsets using the lower bound (#117303)
In the DXIL CreateHandle and CreateHandleFromBinding ops, resource
bindings are
indexed from the beginning of the binding space, not from the binding
itself.
Translate from an index into the binding to one from the beginning of
the space
when lowering to these operations.
Commit: fdf1f69c57ac3667d27c35e097040284edb1f574
https://github.com/llvm/llvm-project/commit/fdf1f69c57ac3667d27c35e097040284edb1f574
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CGData/StableFunctionMap.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
A llvm/test/CodeGen/Generic/cgdata-merge-local.ll
A llvm/test/CodeGen/Generic/cgdata-merge-no-params.ll
R llvm/test/ThinLTO/AArch64/cgdata-merge-local.ll
Log Message:
-----------
[CGData][GMF] Skip No Params (#116548)
This update follows up on change #112671 and is mostly a NFC, with the following exceptions:
- Introduced `-global-merging-skip-no-params` to bypass merging when no parameters are required.
- Parameter count is now calculated based on the unique hash count.
- Added `-global-merging-inst-overhead` to adjust the instruction overhead, reflecting the machine instruction size.
- Costs and benefits are now computed using the double data type. Since the finalization process occurs offline, this should not significantly impact build time.
- Moved a sorting operation outside of the loop.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: b0ca543532d13fde8907853f6c9909ad7e68cd9f
https://github.com/llvm/llvm-project/commit/b0ca543532d13fde8907853f6c9909ad7e68cd9f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[memprof] Remove dead code in MemProfReader (NFC) (#117607)
The only constructor in current use is the one that takes
IndexedMemProfData. Likewise, the only accessor in current use is
takeMemProfData.
Commit: fe3c23b439b9a2d00442d9bc6a4ca86f73066a3d
https://github.com/llvm/llvm-project/commit/fe3c23b439b9a2d00442d9bc6a4ca86f73066a3d
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CGData/StableFunctionMap.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
R llvm/test/CodeGen/Generic/cgdata-merge-local.ll
R llvm/test/CodeGen/Generic/cgdata-merge-no-params.ll
A llvm/test/ThinLTO/AArch64/cgdata-merge-local.ll
Log Message:
-----------
Revert "[CGData][GMF] Skip No Params (#116548)"
This reverts commit fdf1f69c57ac3667d27c35e097040284edb1f574.
Commit: c94d715867ef73d57f6bbe2bd7fbda3328ab1d1d
https://github.com/llvm/llvm-project/commit/c94d715867ef73d57f6bbe2bd7fbda3328ab1d1d
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/machine-sink-load-immediate.ll
Log Message:
-----------
[RISCV] Add coverage for immediate sinking in switch vs branch cases
This come up in the context of pr 108889. We always end up sinking
the value in the phi if we dispatched via a switch, but not if we'd
dispatched via a branch. This is purely an artifact of current
lowering.
Commit: d733fa1c90e36aa39b111fab6a573eaab62d960b
https://github.com/llvm/llvm-project/commit/d733fa1c90e36aa39b111fab6a573eaab62d960b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
Log Message:
-----------
[RISCV] Consolidate VLS codepaths in stack frame manipulation [nfc] (#117605)
We can move the logic from adjustStackForRVV into adjustReg, which
results in the remaining logic being trivially inlined to the two
callers and allows a duplicate copy of the same logic in
eliminateFrameIndex to be pruned.
Commit: 5001f1605893f21b1ae9defd82ee02999164f996
https://github.com/llvm/llvm-project/commit/5001f1605893f21b1ae9defd82ee02999164f996
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_pk_{f|bf}16_fp4 of gfx950. (#117418)
OPSEL ASM Syntax for v_cvt_scalef32_pk_{f|bf}16_fp4 : opsel:[x,y,z]
where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read.
Note: Conventional Inst{13} i.e. OPSEL[2] is ignored in asm syntax.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 8e510b8472580388272a0621f79ec0346d9909af
https://github.com/llvm/llvm-project/commit/8e510b8472580388272a0621f79ec0346d9909af
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
Log Message:
-----------
[RISCV] Fix a warning
This patch fixes:
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:476:25: error: unused
variable 'ST' [-Werror,-Wunused-variable]
Commit: deab4e9ab26d6e2c095c04821d17c68cca43a174
https://github.com/llvm/llvm-project/commit/deab4e9ab26d6e2c095c04821d17c68cca43a174
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/allocatable.h
Log Message:
-----------
[flang][cuda][NFC] Add missing default values (#117610)
Make it homogenous with other runtime entry points.
Commit: 96547decd5f12c4357b104d107350c8a14b47650
https://github.com/llvm/llvm-project/commit/96547decd5f12c4357b104d107350c8a14b47650
Author: S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.h
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
A llvm/test/CodeGen/DirectX/ShaderFlags/double-extensions-obj-test.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/double-extensions.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/doubles.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/no_flags.ll
Log Message:
-----------
[DirectX] Infrastructure to collect shader flags for each function (#112967)
Currently, ShaderFlagsAnalysis pass represents various module-level
properties as well as function-level properties of a DXIL Module using a
single mask. However, one mask per function is needed for accurate
computation of shader flags mask, such as for entry function metadata
creation.
This change introduces a structure that wraps a sorted vector of
function-shader flag mask pairs that represent function properties
instead of a single shader flag mask that represents module properties
and properties of all functions. The result type of ShaderFlagsAnalysis
pass is changed to newly-defined structure type instead of a single
shader flags mask.
This allows accurate computation of shader flags of an entry function
(and all functions in a library shader) for use during its metadata
generation (DXILTranslateMetadata pass) and its feature flags in DX
container globals construction (DXContainerGlobals pass) based on the
shader flags mask of functions. However, note that the change to
implement propagation of such callee-based shader flags mask computation
is planned in a follow-on PR. Consequently, this PR changes shader flag
mask computation in DXILTranslateMetadata and DXContainerGlobals passes
to simply be a union of module flags and shader flags of all functions,
thereby retaining the existing effect of using a single shader flag
mask.
Commit: 466ff3ed70e50343c9617de318e1b40efa03529d
https://github.com/llvm/llvm-project/commit/466ff3ed70e50343c9617de318e1b40efa03529d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Mark VPIRInstruction::getInstruction) as const (NFCI).
Split off from https://github.com/llvm/llvm-project/pull/114292.
Commit: 30af6fb163add17a6be515200881afdff91d213a
https://github.com/llvm/llvm-project/commit/30af6fb163add17a6be515200881afdff91d213a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Group together helpers for retrieving various VPBlocks (NFCI).
Group together functions to retrieve various blocks of a VPlan, as
suggested in https://github.com/llvm/llvm-project/pull/114292.
Commit: 9de73b20404f0b2db1cbf70d164cfe0789d5bb94
https://github.com/llvm/llvm-project/commit/9de73b20404f0b2db1cbf70d164cfe0789d5bb94
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-string.test
M llvm/unittests/DebugInfo/DWARF/DWARFDieTest.cpp
Log Message:
-----------
[DWARF] Fix DWARTTypePrinter unable to print qualified name for DW_TAG_typedef DIE (#117239)
Fix a bug introduced in
https://github.com/llvm/llvm-project/pull/117071.
Ideally the DWARTTypePrinter test should go to
`llvm/unittests/DebugInfo/DWARF/DWARTTypePrinterTest.cpp`.
Commit: fe69a20cc1e46bf8473aaef1be8a1805c80fc9d4
https://github.com/llvm/llvm-project/commit/fe69a20cc1e46bf8473aaef1be8a1805c80fc9d4
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CGData/StableFunctionMap.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
A llvm/test/CodeGen/AArch64/cgdata-merge-crash.ll
A llvm/test/CodeGen/AArch64/cgdata-merge-local.ll
A llvm/test/CodeGen/AArch64/cgdata-merge-no-params.ll
R llvm/test/CodeGen/Generic/cgdata-merge-crash.ll
R llvm/test/ThinLTO/AArch64/cgdata-merge-local.ll
Log Message:
-----------
Reland [CGData][GMF] Skip No Params (#116548)
This update follows up on change #112671 and is mostly a NFC, with the following exceptions:
- Introduced `-global-merging-skip-no-params` to bypass merging when no parameters are required.
- Parameter count is now calculated based on the unique hash count.
- Added `-global-merging-inst-overhead` to adjust the instruction overhead, reflecting the machine instruction size.
- Costs and benefits are now computed using the double data type. Since the finalization process occurs offline, this should not significantly impact build time.
- Moved a sorting operation outside of the loop.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: 1df34f12421317a365db96de9b713342c32c13b7
https://github.com/llvm/llvm-project/commit/1df34f12421317a365db96de9b713342c32c13b7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512bwvl.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512bwvl.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512bwvl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512bwvl.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bwvl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vl.s
Log Message:
-----------
[MCA][X86] Add avx512 test coverage for VPMOV truncation instructions
We only had partial VPMOVWB test coverage
Commit: 0988bf8d75de2f55484db02391db5165e7b7d37d
https://github.com/llvm/llvm-project/commit/0988bf8d75de2f55484db02391db5165e7b7d37d
Author: Robert Barinov <robert.barinov at intel.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
A llvm/test/tools/llvm-reduce/distinct-dimetadata-nullptr.ll
M llvm/tools/llvm-reduce/deltas/ReduceDistinctMetadata.cpp
Log Message:
-----------
[LLVM-Reduce] - Null pointer handling during distinct metadata reduction (#117570)
Some distinct metadata nodes, e.g DICompileUnit, have implicit nullptrs
inside them. Iterating over them with dyn_cast leads to a crash, change
the behavior so that the nullptr operands are skipped.
Add the test distinct-metadata-nullptr.ll which will crash if null
pointers are not handled correctly.
Commit: 935da49a4d02316cbd0458d09d5913b6d1cabddc
https://github.com/llvm/llvm-project/commit/935da49a4d02316cbd0458d09d5913b6d1cabddc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Log Message:
-----------
AMDGPU: Pass HwMode to AMDGPUGenRegisterInfo (#117449)
I haven't figured out how to do anything useful with this yet,
but it seems you are supposed to pass this to the subtarget
constructor.
Commit: ece4e1276e2140d84b05b8c430a0e547a1f23210
https://github.com/llvm/llvm-project/commit/ece4e1276e2140d84b05b8c430a0e547a1f23210
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][Affine] Split off delinearize parts that depend on last component (#117015)
If we have
%0 = affine.linearize_index disjoint [%a, %b] by (A, B)
%1:3 = affine.delinearize_index %0 into (A, B1, B2)
where B = B1 * B2 (or some mor complex product), we can simplify this to
%0 = affine.linearize_index disjoint [%a] by (A)
%1a:1 = affine.delinearize_index %0 into (A)
%1b:2 = affine.delinearize_index %b into (B1, B2)
This, and more complex cases, prevent us from adding terms together only
to divide them away from each other.
---------
Co-authored-by: Abhishek Varma <abhvarma at amd.com>
Commit: 76f0ff8210d56a050d2679926a2fdddd3a8c16d6
https://github.com/llvm/llvm-project/commit/76f0ff8210d56a050d2679926a2fdddd3a8c16d6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
Log Message:
-----------
[SLP]Add an extra check to avoid infinite vectorization attempts
Added extra check for the cost of the buildvector if the -slp-threshold
option is used. Prevents infinite vectorization attempts.
Commit: ab4e06667dbd777f32061ac3fff69328dc787fce
https://github.com/llvm/llvm-project/commit/ab4e06667dbd777f32061ac3fff69328dc787fce
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
M llvm/test/MC/ELF/relocation.s
Log Message:
-----------
[X86][MC] Add R_X86_64_CODE_6_GOTTPOFF (#117277)
For
add %reg1, name at GOTTPOFF(%rip), %reg2
add name at GOTTPOFF(%rip), %reg1, %reg2
{nf} add %reg1, name at GOTTPOFF(%rip), %reg2
{nf} add name at GOTTPOFF(%rip), %reg1, %reg2
{nf} add name at GOTTPOFF(%rip), %reg
add
`R_X86_64_CODE_6_GOTTPOFF` = 50
if the instruction starts at 6 bytes before the relocation offset. It's
similar to R_X86_64_GOTTPOFF.
Linker can treat `R_X86_64_CODE_6_GOTTPOFF` as `R_X86_64_GOTTPOFF` or
convert the instructions above to
add $name at tpoff, %reg1, %reg2
add $name at tpoff, %reg1, %reg2
{nf} add $name at tpoff, %reg1, %reg2
{nf} add $name at tpoff, %reg1, %reg2
{nf} add $name at tpoff, %reg
if the first byte of the instruction at the relocation `offset - 6` is
`0xd5` (namely, encoded w/REX2 prefix) when possible.
Binutils patch:
https://github.com/bminor/binutils-gdb/commit/5bc71c2a6b8efb27089baa1fecded82be4f550a7
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2024-February/132351.html
ABI discussion:
https://groups.google.com/g/x86-64-abi/c/FhEZjCtDLFw/m/VHDjN4orAgAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: 4c91662a519705c2d0b6e002214a3e307f09b373
https://github.com/llvm/llvm-project/commit/4c91662a519705c2d0b6e002214a3e307f09b373
Author: Caslyn Tonelli <6718161+Caslyn at users.noreply.github.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libc/src/__support/common.h
Log Message:
-----------
[libc] Resolve multi-line comment error (#117636)
gcc interprets a backslash '\\' as the last char before a new line as a
line continuation character, even in a comment context. This can produce
an "error: multi-line comment [-Werror=comment]".
This removes the line continuation so that the comment can compile with
gcc.
Commit: 1973270fc66680e6894c3ae9395a7e07e7b4d43c
https://github.com/llvm/llvm-project/commit/1973270fc66680e6894c3ae9395a7e07e7b4d43c
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
Log Message:
-----------
[libc] suppress string warning in case intrinsics are defined as macros (#117640)
Commit: 32432a6a02fe41fa83fef6605489744957dc1b0a
https://github.com/llvm/llvm-project/commit/32432a6a02fe41fa83fef6605489744957dc1b0a
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M libc/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
Log Message:
-----------
[libc] suppress math library warnings on windows (#117638)
Commit: 1ea7ced7eebf26aba1938d84ba99e2e6421c503c
https://github.com/llvm/llvm-project/commit/1ea7ced7eebf26aba1938d84ba99e2e6421c503c
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M mlir/python/mlir/_mlir_libs/__init__.py
Log Message:
-----------
[mlir][py] Enable disabling loading all registered (#117643)
There is a pending todo about always eagerly loading or not. Make this
behavior optional and give the control to the user in a backwards
compatible manner. This is made optional as there were arguments for
both forms, kept it in form that is backwards compatible.
Commit: 97fe5fa54c2e99dc0fe14fff1940b31bf697eff2
https://github.com/llvm/llvm-project/commit/97fe5fa54c2e99dc0fe14fff1940b31bf697eff2
Author: Kai Luo <gluokai at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/test/Driver/cuda-no-threadsafe-statics.cu
Log Message:
-----------
[Driver] Pass `--cuda-path` to test (#117415)
My local build, on Debian GNU/Linux 12 (bookworm), complains
```
clang: error: GPU arch sm_20 is supported by CUDA versions between 7.0 and 8.0 (inclusive), but installation at /usr/lib/cuda is 11.8; use '--cuda-path' to specify a different CUDA install, pass a different GPU arch with '--cuda-gpu-arch', or pass '--no-cuda-version-check'
```
Fix it by passing `--cuda-path`. Hope this doesn't affect the original
intention of the test.
Commit: cac978331f533c53b3f909dde673bb2d7b2ccede
https://github.com/llvm/llvm-project/commit/cac978331f533c53b3f909dde673bb2d7b2ccede
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
A clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-lib.hlsl
A clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
A clang/test/SemaHLSL/BuiltIns/buffer_update_counter-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
R llvm/test/CodeGen/DirectX/updateCounter.ll
Log Message:
-----------
[HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (#117608)
Introduces `__builtin_hlsl_buffer_update_counter` clang buildin that is
used to implement the `IncrementCounter` and `DecrementCounter` methods
on `RWStructuredBuffer` and `RasterizerOrderedStructuredBuffer` (see
Note).
The builtin is translated to LLVM intrisic `llvm.dx.bufferUpdateCounter`
or `llvm.spv.bufferUpdateCounter`.
Introduces `BuiltinTypeMethodBuilder` helper in `HLSLExternalSemaSource`
that enables adding methods to builtin types using builder pattern like
this:
```
BuiltinTypeMethodBuilder(Sema, RecordBuilder, "MethodName", ReturnType)
.addParam("param_name", Type, InOutModifier)
.callBuiltin("buildin_name", { BuiltinParams })
.finalizeMethod();
```
Fixes #113513
[First version](llvm/llvm-project#114148) of this PR was reverted
because of build break.
Commit: c2bb056482212a6afa91f6d52274fe0a74b91720
https://github.com/llvm/llvm-project/commit/c2bb056482212a6afa91f6d52274fe0a74b91720
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/AArch64/fp-intrinsics-fp16.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
Log Message:
-----------
[SelectionDAG][RISCV][AArch64] Allow f16 STRICT_FLDEXP to be promoted. Fix integer promotion of STRICT_FLDEXP in type legalizer. (#117633)
A special case in type legalization wasn't accounting for different
operand numbering between FLDEXP and STRICT_FLDEXP.
AArch64 already asked STRICT_FLDEXP to be promoted, but had no test for
it.
Commit: 2ab84a60ff88279884ca1b2a1655bd9f119bc803
https://github.com/llvm/llvm-project/commit/2ab84a60ff88279884ca1b2a1655bd9f119bc803
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/Analysis/CostModel/X86/fptoi_sat.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-vec-cmp.ll
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/pr114520.ll
M llvm/test/CodeGen/X86/pr57340.ll
M llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
M llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
Log Message:
-----------
[X86][FP16][BF16] Improve vectorization of fcmp (#116153)
Commit: c1a3960abe5ca316e9a26e87cdc3a7f94e420dc6
https://github.com/llvm/llvm-project/commit/c1a3960abe5ca316e9a26e87cdc3a7f94e420dc6
Author: Daniel Zabawa <daniel.zabawa at intel.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrPredicates.td
A llvm/test/CodeGen/X86/apx/imulzu.ll
Log Message:
-----------
[X86] Add APX imulzu support. (#116806)
Add patterns to select 16b imulzu with -mapx-feature=zu, including
folding of zero-extends of the result. IsDesirableToPromoteOp is changed
to leave 16b multiplies by constant un-promoted, as imulzu will not
cause partial-write stalls.
Commit: 2ed8c5de585491182486f392a5a570cc5c4474df
https://github.com/llvm/llvm-project/commit/2ed8c5de585491182486f392a5a570cc5c4474df
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
A flang/test/Transforms/OpenMP/lower-workshare-nested.mlir
Log Message:
-----------
[flang][OpenMP] Fix handling of nested loop wrappers in LowerWorkshare (#117275)
Commit: ebcaa577158de095f0093025ae1127d211a2a535
https://github.com/llvm/llvm-project/commit/ebcaa577158de095f0093025ae1127d211a2a535
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Log Message:
-----------
[GISel] #undef macros when they are no longer needed. NFC (#117652)
These macros are created inside a function. They should be undefined
before the end of the function.
Commit: bf07a569b73b5f8634cad30fa21c03a1e3d63e0b
https://github.com/llvm/llvm-project/commit/bf07a569b73b5f8634cad30fa21c03a1e3d63e0b
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Remove extra commas of llvm.vp.ctlz (#117542)
Commit: dd7aabf7c041f094ef2124bb5b8fe9434490d266
https://github.com/llvm/llvm-project/commit/dd7aabf7c041f094ef2124bb5b8fe9434490d266
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[TTI][RISCV] Deduplicate type-based VP costing of vpcmp/vpcast (#117520)
Refered to: https://github.com/llvm/llvm-project/pull/115983
Commit: 6633916ef5ab17bae9b2214a9e3327295ce56b5a
https://github.com/llvm/llvm-project/commit/6633916ef5ab17bae9b2214a9e3327295ce56b5a
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Remove getPostRAMutations (#117527)
We are using `PostMachineScheduler` instead of `PostRAScheduler`
since #68696.
The hook `getPostRAMutations` is only used in `PostRAScheduler` so
it is actually dead code for RISC-V now.
Commit: 6657d4bd70523e6852f07f64711fb15bdf7b347a
https://github.com/llvm/llvm-project/commit/6657d4bd70523e6852f07f64711fb15bdf7b347a
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/aext-to-sext.ll
M llvm/test/CodeGen/RISCV/compress-opt-select.ll
M llvm/test/CodeGen/RISCV/machine-sink-load-immediate.ll
M llvm/test/CodeGen/RISCV/rv64m-w-insts-legalization.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/typepromotion-overflow.ll
Log Message:
-----------
[TTI][RISCV] Unconditionally break critical edges to sink ADDI (#108889)
This looks like a rather weird change, so let me explain why this isn't
as unreasonable as it looks. Let's start with the problem it's solving.
```
define signext i32 @overlap_live_ranges(ptr %arg, i32 signext %arg1) { bb:
%i = icmp eq i32 %arg1, 1
br i1 %i, label %bb2, label %bb5
bb2: ; preds = %bb
%i3 = getelementptr inbounds nuw i8, ptr %arg, i64 4
%i4 = load i32, ptr %i3, align 4
br label %bb5
bb5: ; preds = %bb2, %bb
%i6 = phi i32 [ %i4, %bb2 ], [ 13, %bb ]
ret i32 %i6
}
```
Right now, we codegen this as:
```
li a3, 1
li a2, 13
bne a1, a3, .LBB0_2
lw a2, 4(a0)
.LBB0_2:
mv a0, a2
ret
```
In this example, we have two values which must be assigned to a0 per the
ABI (%arg, and the return value). SelectionDAG ensures that all values
used in a successor phi are defined before exit the predecessor block.
This creates an ADDI to materialize the immediate in the entry block.
Currently, this ADDI is not sunk into the tail block because we'd have
to split a critical edges to do so. Note that if our immediate was
anything large enough to require two instructions we *would* split this
critical edge.
Looking at other targets, we notice that they don't seem to have this
problem. They perform the sinking, and tail duplication that we don't.
Why? Well, it turns out for AArch64 that this is entirely an accident of
the existance of the gpr32all register class. The immediate is
materialized into the gpr32 class, and then copied into the gpr32all
register class. The existance of that copy puts us right back into the
two instruction case noted above.
This change essentially just bypasses this emergent behavior aspect of
the aarch64 behavior, and implements the same "always sink immediates"
behavior for RISCV as well.
Commit: 5dd48c4901c60f2a38aa4e78160cc72eafcbbc5b
https://github.com/llvm/llvm-project/commit/5dd48c4901c60f2a38aa4e78160cc72eafcbbc5b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_pk32_f32_[fp|bf]6 of gfx950 (#117590)
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 658db918fe47efc0a3ba0556d58d607f0919f1e3
https://github.com/llvm/llvm-project/commit/658db918fe47efc0a3ba0556d58d607f0919f1e3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of gfx950. (#117591)
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 22503a9df16e8bf320c81ffbd3b4c70de45f8053
https://github.com/llvm/llvm-project/commit/22503a9df16e8bf320c81ffbd3b4c70de45f8053
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (#117592)
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: c767570eb1d8d11d42b831ac64eae44786782827
https://github.com/llvm/llvm-project/commit/c767570eb1d8d11d42b831ac64eae44786782827
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. (#117593)
OPSEL[0] selects src_word to read.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: d727b6f7778d98a3c506c6150a5d4f68056c1cee
https://github.com/llvm/llvm-project/commit/d727b6f7778d98a3c506c6150a5d4f68056c1cee
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950. (#117594)
These instructions have non-standard use of OPSEL bits to select
dest write byte. The src2_modifiers operand is used without having
its corresponding src2 operand by introducing dummy src2.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: c3377af4c3646e84f33d4e50846645b1c17f6403
https://github.com/llvm/llvm-project/commit/c3377af4c3646e84f33d4e50846645b1c17f6403
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
Log Message:
-----------
[RISCV][CostModel] add cost for cttz/ctlz under the non-zvbb (#117515)
Commit: a87d484a97f6ddc7404a2970a764158a5b27e3e5
https://github.com/llvm/llvm-project/commit/a87d484a97f6ddc7404a2970a764158a5b27e3e5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. (#117595)
Scale packed 16-component single-precision float vectors from
two source inputs using the exponent provided by the third
single-precision float input, then convert the values to a packed
32-component FP6 float value.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 5d650a62a35c2f38b112f5ee930654e678bcd5bb
https://github.com/llvm/llvm-project/commit/5d650a62a35c2f38b112f5ee930654e678bcd5bb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (#117596)
This patch adds assembly and builtin support for v_ashr_pk_i8/u8_i32
instructions.
Co-authored-by: Sirish Pande <Sirish.Pande at amd.com>
Commit: aa7eb5723cb4499f35ed1c5455f668ccc078e7c2
https://github.com/llvm/llvm-project/commit/aa7eb5723cb4499f35ed1c5455f668ccc078e7c2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
A llvm/test/MC/AMDGPU/gfx950_dlops.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (#117597)
v_dot2_f32_bf16 was added in gfx11 along with v_dot2_f16_f16 and v_dot2_bf16_bf16.
All three instructions were part of Dot9 instructions in the compiler.
This patch will split existing dot9 (v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16)
into new dot9 (v_dot2_f16_f16 and v_dot2_bf16_bf16), and dot12 (v_dot2_f32_bf16).
All necessary changes to gfx11 and gfx12 are updated to reflect this change.
Co-authored-by: Sirish Pande <Sirish.Pande at amd.com>
Commit: 716364ebd6649aeca8658680ebb8b0424d028006
https://github.com/llvm/llvm-project/commit/716364ebd6649aeca8658680ebb8b0424d028006
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
A llvm/test/MC/AMDGPU/gfx950_xdlops.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_xdlops.txt
Log Message:
-----------
AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (#117598)
The encoding of v_dot2c_f32_bf16 opcode is same as v_mac_f32 in gfx90a,
both from gfx9 series. This required a new decoderNameSpace GFX950_DOT.
Co-authored-by: Sirish Pande <Sirish.Pande at amd.com>
Commit: 7fc71f79099b1556a57c9e96f7d62064dcff44d4
https://github.com/llvm/llvm-project/commit/7fc71f79099b1556a57c9e96f7d62064dcff44d4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/fp-atomics-gfx950.ll
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950.txt
Log Message:
-----------
AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (#117599)
Co-authored-by: Sirish Pande <Sirish.Pande at amd.com>
Commit: a5174de8c2244b2651568095e3136dd90df1c869
https://github.com/llvm/llvm-project/commit/a5174de8c2244b2651568095e3136dd90df1c869
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 (#117600)
Commit: ae719f07562a2eb74f620b1f6d798d6507760514
https://github.com/llvm/llvm-project/commit/ae719f07562a2eb74f620b1f6d798d6507760514
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (#117601)
Commit: eb5cda480d2ad81230b2aa3e134e2b603ff90a1c
https://github.com/llvm/llvm-project/commit/eb5cda480d2ad81230b2aa3e134e2b603ff90a1c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/allocatable.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/allocatable.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] cuf.allocate: Carry over stream to the runtime call (#117631)
- Update the runtime entry points to accept a stream information
- Update the conversion of `cuf.allocate` to pass correctly the stream
information when present.
Note that the stream is not currently used in the runtime. This will be
done in a separate patch as a design/solution needs to be down together
with the allocators.
Commit: ca184cfc088a843e545e5f04b48813e6f9bfba77
https://github.com/llvm/llvm-project/commit/ca184cfc088a843e545e5f04b48813e6f9bfba77
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdLSPServer.h
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/ClangdServer.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/XRefs.h
M clang-tools-extra/clangd/index/Index.cpp
M clang-tools-extra/clangd/index/Index.h
M clang-tools-extra/clangd/index/MemIndex.cpp
M clang-tools-extra/clangd/index/MemIndex.h
M clang-tools-extra/clangd/index/Merge.cpp
M clang-tools-extra/clangd/index/Merge.h
M clang-tools-extra/clangd/index/ProjectAware.cpp
M clang-tools-extra/clangd/index/Ref.h
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/index/dex/Dex.cpp
M clang-tools-extra/clangd/index/dex/Dex.h
M clang-tools-extra/clangd/test/type-hierarchy-ext.test
M clang-tools-extra/clangd/test/type-hierarchy.test
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
Log Message:
-----------
[clangd] Support outgoing calls in call hierarchy (#77556)
Co-authored-by: Quentin Chateau <quentin.chateau at gmail.com>
Commit: d77cab823fc03f6933c3375baaddaae1477bb1d2
https://github.com/llvm/llvm-project/commit/d77cab823fc03f6933c3375baaddaae1477bb1d2
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdLSPServer.h
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/ClangdServer.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/XRefs.h
M clang-tools-extra/clangd/index/Index.cpp
M clang-tools-extra/clangd/index/Index.h
M clang-tools-extra/clangd/index/MemIndex.cpp
M clang-tools-extra/clangd/index/MemIndex.h
M clang-tools-extra/clangd/index/Merge.cpp
M clang-tools-extra/clangd/index/Merge.h
M clang-tools-extra/clangd/index/ProjectAware.cpp
M clang-tools-extra/clangd/index/Ref.h
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/index/dex/Dex.cpp
M clang-tools-extra/clangd/index/dex/Dex.h
M clang-tools-extra/clangd/test/type-hierarchy-ext.test
M clang-tools-extra/clangd/test/type-hierarchy.test
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
Log Message:
-----------
Revert "[clangd] Support outgoing calls in call hierarchy (#77556)" (#117668)
This reverts commit ca184cfc088a843e545e5f04b48813e6f9bfba77.
Commit: 6e57186c0c14702055984f9cfa59be02f0f72356
https://github.com/llvm/llvm-project/commit/6e57186c0c14702055984f9cfa59be02f0f72356
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M clang/lib/Format/Format.cpp
Log Message:
-----------
[clang-format][NFC] Clean up RemoveBraces, RemoveSemi, etc.
Commit: bc282605dfe341add6f7ee8234fed2cd55f5656b
https://github.com/llvm/llvm-project/commit/bc282605dfe341add6f7ee8234fed2cd55f5656b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-25 (Mon, 25 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[SelectionDAG] Require last operand of (STRICT_)FP_ROUND to be a TargetConstant. (#117639)
Fix all the places I could find that did't do this. We were already
mostly correct for FP_ROUND after
9a976f36615dbe15e76c12b22f711b2e597a8e51, but not STRICT_FP_ROUND.
Commit: 90f5c8b790d8a57eab49320e77d6ce11c6c2d36f
https://github.com/llvm/llvm-project/commit/90f5c8b790d8a57eab49320e77d6ce11c6c2d36f
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-no-wrap.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-min-index.ll
Log Message:
-----------
[LV][NFC] Auto-generate the test cases related to FindLastIV idioms. (#117560)
Pre-commit for #67812
Commit: 5e3f6150b1d490090faf945777985b18db73ea3f
https://github.com/llvm/llvm-project/commit/5e3f6150b1d490090faf945777985b18db73ea3f
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
Log Message:
-----------
[lldb/NativePDB] Don't create parentless blocks (#117581)
In case of an error GetBlock would return a reference to a Block without
adding it to a parent. This doesn't seem like a good idea, and none of
the other plugins do that.
This patch fixes that by propagating errors (well, null pointers...) up
the stack.
I don't know of any specific problem that this solves, but given that
this occurs only when something goes very wrong (e.g. a corrupted PDB
file), it's quite possible noone has run into this situation, so we
can't say the code is correct either. It also gets in the way of a
refactor I'm contemplating.
Commit: 56eb559b1d49ec6fa2d75753078e5b57f4b606c2
https://github.com/llvm/llvm-project/commit/56eb559b1d49ec6fa2d75753078e5b57f4b606c2
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/attr-cpuspecific.c
Log Message:
-----------
[clang][FMV] Fix crash with cpu_specific attribute. (#115762)
When dealing with cpu_specific GlobalDecl,
GetOrCreateMultiVersionResolver should immediately return the already
created llvm function if it exists.
Fixes https://github.com/llvm/llvm-project/issues/115299.
Commit: 1b2c8f104f9c6f26500ab608060bbc6b7f40f5e1
https://github.com/llvm/llvm-project/commit/1b2c8f104f9c6f26500ab608060bbc6b7f40f5e1
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Conversion/TensorToLinalg/TensorToLinalg.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
A mlir/test/Dialect/Linalg/decompose-pad-tensor.mlir
R mlir/test/Dialect/Linalg/generalize-pad-tensor.mlir
M mlir/test/Dialect/Linalg/vectorization-pad-patterns.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Log Message:
-----------
[mlir][linalg] Extract `GeneralizePadOpPattern` into a standalone transformation (#117329)
Currently, `GeneralizePadOpPattern` is grouped under
`populatePadOpVectorizationPatterns`. However, as noted in #111349, this
transformation "decomposes" rather than "vectorizes" `tensor.pad`. As
such, it functions as:
* a vectorization _pre-processing_ transformation, not
* a vectorization transformation itself.
To clarify its purpose, this PR turns `GeneralizePadOpPattern` into a
standalone transformation by:
* introducing a dedicated `populateDecomposePadPatterns` method,
* adding a `apply_patterns.linalg.decompose_pad` Transform Dialect Op,
* removing it from `populatePadOpVectorizationPatterns`.
In addition, to better reflect its role, it is renamed as "decomposition"
rather then "generalization". This is in line with the recent renaming
of similar ops, i.e. tensor.pack/tensor.unpack Ops in #116439.
Commit: bb8bf858e865ec3119352bdef43c09adb4c93b31
https://github.com/llvm/llvm-project/commit/bb8bf858e865ec3119352bdef43c09adb4c93b31
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/HLFIR/assumed-rank-internal-proc.f90
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/internal-procedures.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association.f90
Log Message:
-----------
[flang] add internal_assoc flag to mark variable captured in internal procedure (#117161)
This patch adds a flag to mark hlfir.declare of host variables that are
captured in some internal procedure.
It enables implementing a simple fir.call handling in
fir::AliasAnalysis::getModRef leveraging Fortran language specifications
and without a data flow analysis.
This will allow implementing an optimization for "array =
array_function()" where array storage is passed directly into the hidden
result argument to "array_function" when it can be proven that
arraY_function does not reference "array".
Captured host variables are very tricky because they may be accessed
indirectly in any calls if the internal procedure address was captured
via some global procedure pointer. Without flagging them, there is no
way around doing a complex inter procedural data flow analysis:
- checking that the call is not made to an internal procedure is not
enough because of the possibility of indirect calls made to internal
procedures inside the callee.
- checking that the current func.func has no internal procedure is not
enough because this would be invalid with inlining when an procedure
with internal procedures is inlined inside a procedure without internal
procedure.
Commit: a96ec01e1a269b663ccc1dadc2f4429fd0df887d
https://github.com/llvm/llvm-project/commit/a96ec01e1a269b663ccc1dadc2f4429fd0df887d
Author: Piotr Sobczak <piotr.sobczak at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/barrier-elimination-gfx12.ll
Log Message:
-----------
[AMDGPU] Optimize out s_barrier_signal/_wait (#116993)
Extend the optimization that converts s_barrier to wave_barrier (nop)
when the number of work items is not larger than wave size.
This handles the "split barrier" form of s_barrier where the barrier
is represented by separate intrinsics (s_barrier_signal/s_barrier_wait).
Note: the version where s_barrier is used in gfx12 (and later split)
has the optimization already, but some front-ends may prefer to use
split intrinsics and this is being addressed by the patch.
Commit: 9acd8e381091765a932d54bc22359cdafa9e75c6
https://github.com/llvm/llvm-project/commit/9acd8e381091765a932d54bc22359cdafa9e75c6
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
Log Message:
-----------
[clangd] Drop requirement for named template parameters (#117565)
... in DefineOutline tweak for function templates. As opposed to class
templates, the name is not required for writing an out-of-line
definition.
Commit: 93caee17add0c7bc6770365b1d3cae93f258d866
https://github.com/llvm/llvm-project/commit/93caee17add0c7bc6770365b1d3cae93f258d866
Author: Mark Goncharov <110403898+mga-sc at users.noreply.github.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/fveclib.c
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/IR/VFABIDemangler.h
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/IR/VFABIDemangler.cpp
A llvm/test/CodeGen/RISCV/replace-with-veclib-sleef-scalable.ll
A llvm/test/Transforms/LoopVectorize/RISCV/veclib-function-calls.ll
M llvm/test/Transforms/Util/add-TLI-mappings.ll
Log Message:
-----------
[RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (#114014)
SLEEF math vector library now supports RISC-V target.
Commit: https://github.com/shibatch/sleef/pull/477
This patch enables the use of auto-vectorization with
subsequent replacement by the corresponding SLEEF function.
Commit: 29062329f3cf0ac8f1ae626e758ca64f82294fbf
https://github.com/llvm/llvm-project/commit/29062329f3cf0ac8f1ae626e758ca64f82294fbf
Author: Mark Goncharov <110403898+mga-sc at users.noreply.github.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
A llvm/test/CodeGen/RISCV/machine-outliner-call.ll
M llvm/test/CodeGen/RISCV/machine-outliner-cfi.mir
M llvm/test/CodeGen/RISCV/machine-outliner-leaf-descendants.ll
M llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll
M llvm/test/CodeGen/RISCV/machine-outliner-position.mir
A llvm/test/CodeGen/RISCV/machineoutliner-x5.mir
M llvm/test/CodeGen/RISCV/machineoutliner.mir
Log Message:
-----------
[RISCV] Implement tail call optimization in machine outliner (#115297)
Following up issue #89822, this patch adds opportunity to use tail call
in machine outliner pass.
Also it enables outline patterns with X5(T0) register.
Commit: 3e1b55cafc95d4ef46f302d0fcd695461e376958
https://github.com/llvm/llvm-project/commit/3e1b55cafc95d4ef46f302d0fcd695461e376958
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SDAG] Don't allow implicit trunc in getConstant() (#117558)
Assert that the passed value is a valid unsigned integer value for the
specified type.
For signed values getSignedConstant() / getSignedTargetConstant() should
be used instead.
Commit: 231e63d8162a1c78a973c6e546bea39d04fefd67
https://github.com/llvm/llvm-project/commit/231e63d8162a1c78a973c6e546bea39d04fefd67
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
Log Message:
-----------
[StructurizeCFG] Refactor insertConditions. NFC. (#115476)
This just makes it more obvious that having Parent as the single
predecessor is a special case, instead of checking for it in the middle
of a loop that finds the nearest common dominator of multiple
predecessors.
Commit: 79f59afff966c3abff541535431862885dc0a833
https://github.com/llvm/llvm-project/commit/79f59afff966c3abff541535431862885dc0a833
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
Log Message:
-----------
[mlir][linalg][nfc] Update "pack-dynamic-inner-tile.mlir" (#117533)
Builds on:
* #117329: "Extract GeneralizePadOpPattern into a standalone
transformation".
* #116373: "Update pack-dynamic-inner-tile.mlir".
This update adds vectorization to the "pack-dynamic-inner-tile.mlir"
pipeline.
The pipeline first decomposes `tensor.pack` into `tensor.pad` and then
into `linalg.fill` (https://github.com/llvm/llvm-project/pull/117329).
Next, `linalg.fill` is vectorized, with vector sizes matching the inner
tile sizes of the original `tensor.pack`.
Commit: 36b1811da496a0527aab0de76bd3687ff4880bfa
https://github.com/llvm/llvm-project/commit/36b1811da496a0527aab0de76bd3687ff4880bfa
Author: bernhardu <bernhardu at mailbox.org>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/interception_win.h
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] Add a test skeleton for function GetInstructionSize. (#116948)
Was first part of PR #113085.
Commit: 3414993eaffcfa2cb4ff723c8468434d56dff213
https://github.com/llvm/llvm-project/commit/3414993eaffcfa2cb4ff723c8468434d56dff213
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
Log Message:
-----------
[AMDGPU][SplitModule] Fix potential divide by zero (#117602)
A static analysis tool found that ModuleCost could be zero, so would
perform divide by zero when being printed. Perhaps this is unreachable
in practice, but the fix is straightforward enough and unlikely to be a
performance concern.
Commit: cf602b95d14532fdb97679806bc5ba9d55631875
https://github.com/llvm/llvm-project/commit/cf602b95d14532fdb97679806bc5ba9d55631875
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Dialect/FortranVariableInterface.td
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Analysis/CMakeLists.txt
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
A flang/test/Analysis/AliasAnalysis/gen_mod_ref_test.py
A flang/test/Analysis/AliasAnalysis/modref-call-after-inlining.fir
A flang/test/Analysis/AliasAnalysis/modref-call-args.f90
A flang/test/Analysis/AliasAnalysis/modref-call-dummies.f90
A flang/test/Analysis/AliasAnalysis/modref-call-equivalence.f90
A flang/test/Analysis/AliasAnalysis/modref-call-globals.f90
A flang/test/Analysis/AliasAnalysis/modref-call-internal-proc.f90
A flang/test/Analysis/AliasAnalysis/modref-call-locals.f90
A flang/test/Analysis/AliasAnalysis/modref-call-not-fortran.fir
Log Message:
-----------
[flang] handle fir.call in AliasAnalysis::getModRef (#117164)
fir.call side effects are hard to describe in a useful way using
`MemoryEffectOpInterface` because it is impossible to list which memory
location a user procedure read/write without doing a data flow analysis
of its body (even PURE procedures may read from any module variable,
Fortran SIMPLE procedure from F2023 will allow that, but they are far
from common at that point).
Fortran language specifications allow the compiler to deduce
that a procedure call cannot access a variable in many cases
This patch leverages this to extend `fir::AliasAnalysis::getModRef` to
deal with fir.call.
This will allow implementing "array = array_function()" optimization in
a future patch.
Commit: ad7bb652d61e2e8021df03018ea05750abf66b0e
https://github.com/llvm/llvm-project/commit/ad7bb652d61e2e8021df03018ea05750abf66b0e
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/len_trim.f90
Log Message:
-----------
[flang] Implement non-standard LNBLNK intrinsic (#117589)
This is defined here
https://gcc.gnu.org/onlinedocs/gfortran/LNBLNK.html. It is just an alias
to LEN_TRIM.
This was requested by a user:
https://discourse.llvm.org/t/unresolved-externals-with-appendend-underscore/83305
Commit: c0192a008c4a2b8afdc2b63526c0483632d81c07
https://github.com/llvm/llvm-project/commit/c0192a008c4a2b8afdc2b63526c0483632d81c07
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/system.f90
Log Message:
-----------
[flang] implement function form of SYSTEM intrinsic (#117585)
SYSTEM is a gfortran extension which we already supported in subroutine
form. Gfortran also allows it to be called as a function, which was
requested by a user
https://discourse.llvm.org/t/unresolved-externals-with-appendend-underscore/83305/4
Commit: b9e3a769b99e9dafa3e5205dbbef9fae8573e4e2
https://github.com/llvm/llvm-project/commit/b9e3a769b99e9dafa3e5205dbbef9fae8573e4e2
Author: NimishMishra <42909663+NimishMishra at users.noreply.github.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/task_mergeable.f90
M flang/test/Lower/OpenMP/task.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (#114662)
Add FIR generation and LLVMIR translation support for mergeable clause
on task construct. If mergeable clause is present on a task, the
relevant flag in `ompt_task_flag_t` is set and passed to
`__kmpc_omp_task_alloc`.
Commit: d471c85e654ad0111cdffe588b2b958b62eca29f
https://github.com/llvm/llvm-project/commit/d471c85e654ad0111cdffe588b2b958b62eca29f
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/test/Dialect/Arith/int-range-interface.mlir
Log Message:
-----------
[mlir][int-range] Update int range inference for `arith.xori` (#117272)
Previous impl was getting incorrect results for widths > i1 and was
disabled.
While same algorithm can be used for `andi` and `ori` too, without
additional modifications it will produce less precise result.
Commit: 45fdb7755737f10822003a3dd1870ac5a5c0b8eb
https://github.com/llvm/llvm-project/commit/45fdb7755737f10822003a3dd1870ac5a5c0b8eb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleZnver4.td
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bw.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-sse41.s
Log Message:
-----------
[MCA][X86] Cleanup znver4 instregex patterns for (V)PMOV extension/truncation instructions
Split extension/truncation patterns to simplify matching.
Fix patterns to consistently match SSE/AVX1/AVX2 variants as well.
Add some missing src/dst type variants - there should be no difference in scheduling, its purely based on dst reg width.
Confirmed with Agner/uops.info
Noticed while triaging #110308
Commit: 4a7b56e6e7dd0f83c379ad06b6e81450bc691ba6
https://github.com/llvm/llvm-project/commit/4a7b56e6e7dd0f83c379ad06b6e81450bc691ba6
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/include/mlir/IR/Matchers.h
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/CAPI/ir.c
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
Log Message:
-----------
[MLIR][Arith] Add denormal attribute to binary/unary operations (#112700)
Add support for denormal in the Arith dialect (binary and unary
operations).
Denormal are attached to every operation, and they can be of three
different
kinds:
1) ieee, denormal are preserved and processed as defined by IEEE 754
rules.
2) preserve sign, a mode where denormal numbers are flushed to zero, but
the
sign of the zero (+0 or -0) is preserved.
3) positive zero, a mode where all denormal numbers are flushed to
positive zero
(+0), ignoring the sign of the original number.
Denormal refers to both the operands and the result. Currently only
lowering for
ieee is supported.
Commit: 486644723038555a224fd09d462bb5099e64809e
https://github.com/llvm/llvm-project/commit/486644723038555a224fd09d462bb5099e64809e
Author: Vladislav Belov <vladislav.belov at syntacore.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/CXXInheritance.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Fix name lookup for dependent bases (#114978)
Currently the following example is a compilation failure:
```cpp
template<typename T> struct A {
typedef int M;
struct B {
typedef void M;
struct C;
};
};
template<typename T> struct A<T>::B::C : A<T> {
M m; // void or int ?
};
```
According to the point 13.8.3.2
```
A dependent base class is a base class that is a dependent type and is not the current instantiation.
Note 2 : A base class can be the current instantiation in the case of a nested class naming an enclosing class as a base.
```
The base class `A` is the current instantiation, because `C` is a nested
class for an enclosing class `A<T>`, it's is the not-dependent base
class and we need to search the names through its scope.
This patch makes this example compile
Commit: ec4c47d9490c90a98f2dda3fc9ff7c51782678f8
https://github.com/llvm/llvm-project/commit/ec4c47d9490c90a98f2dda3fc9ff7c51782678f8
Author: ykiko <ykikoykikoykiko at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
A clang/test/CodeCompletion/keywords-cxx20.cpp
Log Message:
-----------
Add code completion for C++20 keywords. (#107982)
This commit adds code completion for C++20 keywords, fix
https://github.com/llvm/llvm-project/issues/107868.
1. complete `concept` in template context
- [x] `template<typename T> conce^` -> `concept`
- [ ] `conce^`
2. complete `requires`
- [x] constraints in template context: `template<typename T> requi^` ->
`requires`
- [x] requires expression: `int x = requ^` -> `requires (parameters) {
requirements }`
- [x] nested requirement: `requires { requ^ }` -> `requires expression
;`
3. complete coroutine keywords
- [x] `co_await^` in expression: `co_aw^` -> `co_await expression;`
- [x] `co_yield` in function body: `co_yi^` -> `co_yield expression;`
- [x] `co_return` in function body: `co_re^` -> `co_return expression;`
4. specifiers: `char8_t`, `consteval`, `constinit`
Commit: 90df66455b2ff6a3b3754a56afafc05935a05e15
https://github.com/llvm/llvm-project/commit/90df66455b2ff6a3b3754a56afafc05935a05e15
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleZnver4.td
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bw.s
Log Message:
-----------
[MCA][X86] Fix throughput of (V)PMOV extension/truncation 512-bit instructions
znver4 512-bit instructions are half rate of 128/256-bit variants (still 1uop though)
Confirmed with Agner/uops.info
Noticed while triaging #110308 and #117579
Commit: 827ebf84e9af7c93a30daf4ed17e99ccef4cf94a
https://github.com/llvm/llvm-project/commit/827ebf84e9af7c93a30daf4ed17e99ccef4cf94a
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in elementwise popcount function. (#117473)
Part of #51787.
This patch adds constexpr support for the built-in elementwise popcount
function.
Commit: f94bd3c933076500b9291009d8cb5e1139c52a06
https://github.com/llvm/llvm-project/commit/f94bd3c933076500b9291009d8cb5e1139c52a06
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
R llvm/test/CodeGen/RISCV/machine-outliner-call.ll
M llvm/test/CodeGen/RISCV/machine-outliner-cfi.mir
M llvm/test/CodeGen/RISCV/machine-outliner-leaf-descendants.ll
M llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll
M llvm/test/CodeGen/RISCV/machine-outliner-position.mir
R llvm/test/CodeGen/RISCV/machineoutliner-x5.mir
M llvm/test/CodeGen/RISCV/machineoutliner.mir
Log Message:
-----------
Revert "[RISCV] Implement tail call optimization in machine outliner" (#117710)
Reverts llvm/llvm-project#115297
Bots are broken
Commit: 6f5e5b630559f2d17bdccfab5dff3a97ac0f8c66
https://github.com/llvm/llvm-project/commit/6f5e5b630559f2d17bdccfab5dff3a97ac0f8c66
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/unittests/IR/AffineMapTest.cpp
Log Message:
-----------
[mlir][unittest][nfc] Simplify `getInversePermutation` (#117698)
Commit: 5322415f92fe44a9dac29c95da5ed434efbbba7e
https://github.com/llvm/llvm-project/commit/5322415f92fe44a9dac29c95da5ed434efbbba7e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
[PowerPC] Use getSignedConstant() in SelectOptimalAddrMode()
All of these immediates are signed, as the surrounding comments
indicate. This fixes an assertion failure in
CodeGen/Generic/dag-combine-ossfuzz-crash.ll when run with a
powerpc-aix triple.
Commit: eb5d69c9ab5e817aaff967d06c8f358c0844b6b8
https://github.com/llvm/llvm-project/commit/eb5d69c9ab5e817aaff967d06c8f358c0844b6b8
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
A clang/test/AST/ast-dump-cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] use begin member expr location for call expr with deducing this (#117345)
Fixes #116928
Commit: 65c36179be68dda0d1cc5d7e5c5b312a6b52cc0e
https://github.com/llvm/llvm-project/commit/65c36179be68dda0d1cc5d7e5c5b312a6b52cc0e
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Arena.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/FlowSensitive/Models/ChromiumCheckModel.cpp
M clang/lib/Analysis/IntervalPartition.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[clang][analysis][NFC]add static for internal linkage function (#117481)
Detected by misc-use-internal-linkage
Commit: 46fcdbbc78717767551594d5d9174db0bac1b375
https://github.com/llvm/llvm-project/commit/46fcdbbc78717767551594d5d9174db0bac1b375
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
Log Message:
-----------
[InstCombine] Add alias.scope & noalias metadata to test.
Commit: f4379db49683a6b1d3d63b577985312556373c6f
https://github.com/llvm/llvm-project/commit/f4379db49683a6b1d3d63b577985312556373c6f
Author: tangaac <tangyan01 at loongson.cn>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mdiv32.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
A llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem-div32.ll
Log Message:
-----------
[LoongArch] Support LA V1.1 feature that div.w[u] and mod.w[u] instructions with inputs not signed-extended. (#116764)
Two options for clang
-mdiv32: Use div.w[u] and mod.w[u] instructions with input not
sign-extended.
-mno-div32: Do not use div.w[u] and mod.w[u] instructions with input not
sign-extended.
The default is -mno-div32.
Commit: 537343dea4e65ddb837473c9349884e856664ad8
https://github.com/llvm/llvm-project/commit/537343dea4e65ddb837473c9349884e856664ad8
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/unittests/Core/CMakeLists.txt
R bolt/unittests/Core/MemoryMaps.cpp
M llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn
Log Message:
-----------
Revert "[BOLT] DataAggregator support for binaries with multiple text segments (#92815)"
This caused test failures, see comment on the PR:
Failed Tests (2):
BOLT-Unit :: Core/./CoreTests/AArch64/MemoryMapsTester/MultipleSegmentsMismatchedBaseAddress/0
BOLT-Unit :: Core/./CoreTests/X86/MemoryMapsTester/MultipleSegmentsMismatchedBaseAddress/0
> When a binary has multiple text segments, the Size is computed as the
> difference of the last address of these segments from the BaseAddress.
> The base addresses of all text segments must be the same.
>
> Introduces flag 'perf-script-events' for testing. It allows passing perf events
> without BOLT having to parse them using 'perf script'. The flag is used to
> pass a mock perf profile that has two memory mappings for a mock binary
> that has two text segments. The size of the mapping is updated as this
> change `parseMMapEvents` processes all text segments.
This reverts commit 4b71b3782d217db0138b701c4514bd2168ca1659.
Commit: ead3a2f5980e1a713c8d4e18a4c825e1012b3701
https://github.com/llvm/llvm-project/commit/ead3a2f5980e1a713c8d4e18a4c825e1012b3701
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-117393.ll
Log Message:
-----------
[SLP][REVEC] getScalarizationOverhead should not be used when ScalarTy is FixedVectorType. (#117536)
Commit: 59b3630e032d7e92079667891e7cf585c7fe313d
https://github.com/llvm/llvm-project/commit/59b3630e032d7e92079667891e7cf585c7fe313d
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td
M mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
Log Message:
-----------
[MLIR][SPIR-V] Drop commas from split barrier operations ASM format (#116673)
Drop commas from split barrier operations assembly format.
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Depends on #116648, review ec8d35471602cd88aa2ebaf239b698ef3ba353bd
only.
---------
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 619e4b7154606f315572ba54c0fe6c1f6c8848a0
https://github.com/llvm/llvm-project/commit/619e4b7154606f315572ba54c0fe6c1f6c8848a0
Author: 7FM <chill_dein_leben at gmx.de>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[MLIR][Arith] SelectOp fix invalid folding (#117555)
The pattern `select %x, true, false => %x` is only valid in case that
the return type is identical to the type of `%x` (i.e., i1). Hence, the
check `isInteger(1)` was replaced with `isSignlessInteger(1)`.
Fixes: https://github.com/llvm/llvm-project/issues/117554
Commit: f4d758634305304c0deb49a4ed3f99180a2488ea
https://github.com/llvm/llvm-project/commit/f4d758634305304c0deb49a4ed3f99180a2488ea
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/IR/Operation.cpp
M mlir/lib/IR/TypeUtilities.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/tools/mlir-tblgen/BytecodeDialectGen.cpp
Log Message:
-----------
[mlir] Use `llvm::filter_to_vector`. NFC. (#117655)
This got recently added to SmallVectorExtras:
https://github.com/llvm/llvm-project/pull/117460.
Commit: 4028bb10c3a396023b877d025c5776d207f29f91
https://github.com/llvm/llvm-project/commit/4028bb10c3a396023b877d025c5776d207f29f91
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/ConstantRangeList.h
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/ConstantRangeList.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/Utils/Local.cpp
A llvm/test/Transforms/EarlyCSE/noalias-addrspace.ll
M llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
Log Message:
-----------
Local: Handle noalias_addrspace in combineMetadata (#103938)
This should act like range.
Previously ConstantRangeList assumed a 64-bit range. Now query from the
actual entries. This also means that the empty range has no bitwidth, so
move asserts to avoid checking the bitwidth of empty ranges.
Commit: ab6677e7d64b4612d6c92877cb1d529f922268d2
https://github.com/llvm/llvm-project/commit/ab6677e7d64b4612d6c92877cb1d529f922268d2
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/hoist-metadata.ll
M llvm/test/Transforms/LICM/hoisting-preheader-debugloc.ll
Log Message:
-----------
[LICM] Only set AA metadata on hoisted load if it executes. (#117204)
https://github.com/llvm/llvm-project/pull/116220 clarified that
violations of aliasing metadata are UB.
Only set the AA metadata after hoisting a log, if it is guaranteed to
execute in the original loop.
PR: https://github.com/llvm/llvm-project/pull/117204
Commit: 9efdebc5f15e284dc7c58d327057ec8af9eed342
https://github.com/llvm/llvm-project/commit/9efdebc5f15e284dc7c58d327057ec8af9eed342
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExprMember.cpp
M clang/test/SemaCXX/warn-unused-private-field.cpp
Log Message:
-----------
[Clang] Only ignore special methods for unused private fields in BuildFieldReferenceExpr (#116965)
The original code assumed that only special methods might be defined as
defaulted. Since C++20 comparison operators might be defaulted too, and
we *do* want to consider those as using the fields of the class.
Fixes: #116961
Commit: 624e52b1e310c349e21cc0b4f67452b0fa9d1f96
https://github.com/llvm/llvm-project/commit/624e52b1e310c349e21cc0b4f67452b0fa9d1f96
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/DebugInfo/MIR/X86/dbg-prologue-backup-loc2.mir
Log Message:
-----------
[DebugInfo] Handle trailing empty blocks when seeking prologue_end spot (#117320)
The optimiser will produce empty blocks that are unconditionally
executed according to the CFG -- while it may not be meaningful code,
and won't get a prologue_end position, we need to not crash on this
input.
The fault comes from assuming that there's always a next block with some
instructions in it, that will eventually produce some meaningful control
flow to stop at -- in the given reproducer in issue #117206 this isn't
true, because the function terminates with `unreachable`. Thus, I've
refactored the "get next instruction logic" into a helper that'll step
through all blocks and terminate if there aren't any more.
Reproducer from aeubanks
Commit: db6f627f3fd4072fe1814805653a352694527a91
https://github.com/llvm/llvm-project/commit/db6f627f3fd4072fe1814805653a352694527a91
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AArch64.cpp
A clang/test/CodeGen/AArch64/sme-inline-callees-streaming-attrs.c
Log Message:
-----------
[clang][SME] Ignore flatten/clang::always_inline statements for callees with mismatched streaming attributes (#116391)
If `__attribute__((flatten))` is used on a function, or
`[[clang::always_inline]]` on a statement, don't inline any callees with
incompatible streaming attributes. Without this check, clang may produce
incorrect code when these attributes are used in code with streaming
functions.
Note: The docs for flatten say it can be ignored when inlining is
impossible: "causes calls within the attributed function to be inlined
unless it is impossible to do so".
Similarly, the (clang-only) `[[clang::always_inline]]` statement
attribute is more relaxed than the GNU `__attribute__((always_inline))`
(which says it should error it if it can't inline), saying only "If a
statement is marked [[clang::always_inline]] and contains calls, the
compiler attempts to inline those calls.". The docs also go on to show
an example of where `[[clang::always_inline]]` has no effect.
Commit: b214ca82daeece1568268ebc0fbcc2eaa649425b
https://github.com/llvm/llvm-project/commit/b214ca82daeece1568268ebc0fbcc2eaa649425b
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][vector] Rename vector type TD definitions (nfc) (#117150)
Currently, the Vector dialect TD file includes the following "vector"
type definitions:
```mlir
def AnyVector : VectorOf<[AnyType]>;
def AnyVectorOfAnyRank : VectorOfAnyRankOf<[AnyType]>;
def AnyFixedVector : FixedVectorOf<[AnyType]>;
def AnyScalableVector : ScalableVectorOf<[AnyType]>;
```
In short:
* `AnyVector` _excludes_ 0-D vectors.
* `AnyVectorOfAnyRank`, `AnyFixedVector`, and `AnyScalableVector`
_include_ 0-D vectors.
The naming for "groups" that include 0-D vectors is inconsistent and can
be misleading, and `AnyVector` implies that 0-D vectors are included,
which is not the case.
This patch renames these definitions for clarity:
```mlir
def AnyVectorOfNonZeroRank : VectorOfNonZeroRankOf<[AnyType]>;
def AnyVectorOfAnyRank : VectorOfAnyRankOf<[AnyType]>;
def AnyFixedVectorOfAnyRank : FixedVectorOfAnyRank<[AnyType]>;
def AnyScalableVectorOfAnyRank : ScalableVectorOfAnyRank<[AnyType]>;
```
Rationale:
* The updated names are more explicit about 0-D vector support.
* It becomes clearer that scalable vectors currently allow 0-D vectors -
this might warrant a revisit.
* The renaming paves the way for adding a new group for "fixed-width
vectors excluding 0-D vectors" (e.g., AnyFixedVector), which I plan to
introduce in a follow-up patch.
Commit: 7577284c4f3cb81a8ac648683bd3af292827391f
https://github.com/llvm/llvm-project/commit/7577284c4f3cb81a8ac648683bd3af292827391f
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/test/SemaOpenACC/compute-construct-varlist-ast.cpp
Log Message:
-----------
[OpenACC][NFC] Update varlist-ast test to check serialization
I noticed while working on another test that I never used the PCH
trickery to get this to validate that serialization/deserialization
works correctly. It DOES, but we weren't testing it with this test like
the others.
Commit: 80df56e03b0455382cec51557bfc9f099d5c0a6f
https://github.com/llvm/llvm-project/commit/80df56e03b0455382cec51557bfc9f099d5c0a6f
Author: Mark Goncharov <110403898+mga-sc at users.noreply.github.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/compress-opt-select.ll
A llvm/test/CodeGen/RISCV/machine-outliner-call.ll
M llvm/test/CodeGen/RISCV/machine-outliner-cfi.mir
M llvm/test/CodeGen/RISCV/machine-outliner-leaf-descendants.ll
M llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll
M llvm/test/CodeGen/RISCV/machine-outliner-position.mir
A llvm/test/CodeGen/RISCV/machineoutliner-x5.mir
M llvm/test/CodeGen/RISCV/machineoutliner.mir
Log Message:
-----------
Reapply "[RISCV] Implement tail call optimization in machine outliner" (#117700)
This MR fixes failed test `CodeGen/RISCV/compress-opt-select.ll`.
It was failed due to previously merged commit `[TTI][RISCV]
Unconditionally break critical edges to sink ADDI (PR #108889)`.
So, regenerated `compress-opt-select` test.
Commit: f7dc1d0ac83b7c6b691167d8d02561ba0837b631
https://github.com/llvm/llvm-project/commit/f7dc1d0ac83b7c6b691167d8d02561ba0837b631
Author: Anton Sidorenko <anton.sidorenko at syntacore.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/CXXInheritance.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
Revert "[Clang] Fix name lookup for dependent bases (#114978)" (#117727)
This reverts commit 486644723038555a224fd09d462bb5099e64809e as
requested by the commit author.
Buildbots fail:
* https://lab.llvm.org/buildbot/#/builders/164/builds/4945
* https://lab.llvm.org/buildbot/#/builders/52/builds/4021
Commit: 86f7f089ee6bcf01bf082ca802220b1143a3ade9
https://github.com/llvm/llvm-project/commit/86f7f089ee6bcf01bf082ca802220b1143a3ade9
Author: Miro Bucko <mbucko at meta.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M lldb/source/Core/PluginManager.cpp
Log Message:
-----------
Fix return value of 'PluginManager::RegisterPlugin()'. (#114120)
Commit: 88cff867a58247d0c1da19e537eb8801a54ed38e
https://github.com/llvm/llvm-project/commit/88cff867a58247d0c1da19e537eb8801a54ed38e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/select-value-equivalence.ll
Log Message:
-----------
[InstCombine] Add tests for #113301 (NFC)
Commit: ced2fc7819d5ddea616ec330f18e08ff284c1868
https://github.com/llvm/llvm-project/commit/ced2fc7819d5ddea616ec330f18e08ff284c1868
Author: Christopher Bate <cbate at nvidia.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/docs/Bufferization.md
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationOps.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
M mlir/test/Dialect/Arith/bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/dealloc-other.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-analysis.mlir
A mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-encodings.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-partial.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-force-copy-before-write.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-invalid.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/canonicalize.mlir
M mlir/test/Dialect/Bufferization/ops.mlir
M mlir/test/Dialect/ControlFlow/one-shot-bufferize.mlir
M mlir/test/Dialect/Linalg/bufferize.mlir
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/MemRef/normalize-memrefs.mlir
M mlir/test/Dialect/SCF/bufferize.mlir
A mlir/test/Dialect/SCF/one-shot-bufferize-encodings.mlir
M mlir/test/Dialect/Shape/bufferize.mlir
M mlir/test/Dialect/SparseTensor/GPU/gpu_matmul24_lib.mlir
M mlir/test/Dialect/SparseTensor/GPU/gpu_matmul_lib.mlir
M mlir/test/Dialect/SparseTensor/GPU/gpu_matvec_lib.mlir
M mlir/test/Dialect/SparseTensor/GPU/gpu_sampled_matmul_lib.mlir
M mlir/test/Dialect/SparseTensor/GPU/gpu_sddmm_lib.mlir
M mlir/test/Dialect/SparseTensor/constant_index_map.mlir
M mlir/test/Dialect/SparseTensor/dense.mlir
M mlir/test/Dialect/SparseTensor/fuse_sparse_pad_with_consumer.mlir
M mlir/test/Dialect/SparseTensor/sorted_coo.mlir
M mlir/test/Dialect/SparseTensor/sparse_1d.mlir
M mlir/test/Dialect/SparseTensor/sparse_2d.mlir
M mlir/test/Dialect/SparseTensor/sparse_3d.mlir
M mlir/test/Dialect/SparseTensor/sparse_affine.mlir
M mlir/test/Dialect/SparseTensor/sparse_batch.mlir
M mlir/test/Dialect/SparseTensor/sparse_fp_ops.mlir
M mlir/test/Dialect/SparseTensor/sparse_fusion.mlir
M mlir/test/Dialect/SparseTensor/sparse_int_ops.mlir
M mlir/test/Dialect/SparseTensor/sparse_kernels.mlir
M mlir/test/Dialect/SparseTensor/sparse_kernels_to_iterator.mlir
M mlir/test/Dialect/SparseTensor/sparse_lower.mlir
M mlir/test/Dialect/SparseTensor/sparse_lower_col.mlir
M mlir/test/Dialect/SparseTensor/sparse_lower_inplace.mlir
M mlir/test/Dialect/SparseTensor/sparse_nd.mlir
M mlir/test/Dialect/SparseTensor/sparse_outbuf.mlir
M mlir/test/Dialect/SparseTensor/sparse_pack.mlir
M mlir/test/Dialect/SparseTensor/sparse_parallel_reduce.mlir
M mlir/test/Dialect/SparseTensor/sparse_perm.mlir
M mlir/test/Dialect/SparseTensor/sparse_perm_lower.mlir
M mlir/test/Dialect/SparseTensor/sparse_scalars.mlir
M mlir/test/Dialect/SparseTensor/sparse_sddmm.mlir
M mlir/test/Dialect/SparseTensor/sparse_sddmm_org.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir
M mlir/test/Dialect/SparseTensor/spy_sddmm.mlir
M mlir/test/Dialect/SparseTensor/spy_sddmm_bsr.mlir
M mlir/test/Dialect/SparseTensor/unused-tensor.mlir
M mlir/test/Dialect/SparseTensor/vectorize_reduction.mlir
M mlir/test/Dialect/Tensor/bufferize.mlir
A mlir/test/Dialect/Tensor/one-shot-bufferize-encodings.mlir
M mlir/test/Dialect/Tensor/one-shot-bufferize.mlir
M mlir/test/Dialect/Vector/bufferize.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-const.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-maxpool-dynamic.mlir
M mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir
M mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir
Log Message:
-----------
[mlir][bufferization] Fix OneShotBufferize when `defaultMemorySpaceFn` is used (#91524)
As described in issue llvm/llvm-project#91518, a previous PR
llvm/llvm-project#78484 introduced the `defaultMemorySpaceFn` into
bufferization options, allowing one to inform OneShotBufferize that it
should use a specified function to derive the memory space attribute
from the encoding attribute attached to tensor types.
However, introducing this feature exposed unhandled edge cases,
examples of which are introduced by this change in the new test under
`test/Dialect/Bufferization/Transforms/one-shot-bufferize-encodings.mlir`.
Fixing the inconsistencies introduced by `defaultMemorySpaceFn` is
pretty simple. This change:
- Updates the `bufferization.to_memref` and `bufferization.to_tensor`
operations to explicitly include operand and destination types,
whereas previously they relied on type inference to deduce the
tensor types. Since the type inference cannot recover the correct
tensor encoding/memory space, the operand and result types must be
explicitly included. This is a small assembly format change, but it
touches a large number of test files.
- Makes minor updates to other bufferization functions to handle the
changes in building the above ops.
- Updates bufferization of `tensor.from_elements` to handle memory
space.
Integration/upgrade guide:
In downstream projects, if you have tests or MLIR files that explicitly
use
`bufferization.to_tensor` or `bufferization.to_memref`, then update
them to the new assembly format as follows:
```
%1 = bufferization.to_memref %0 : memref<10xf32>
%2 = bufferization.to_tensor %1 : memref<10xf32>
```
becomes
```
%1 = bufferization.to_memref %0 : tensor<10xf32> to memref<10xf32>
%2 = bufferization.to_tensor %0 : memref<10xf32> to tensor<10xf32>
```
Commit: 2a0162c0193a73ef16aee67dbe66abb9d2e4717c
https://github.com/llvm/llvm-project/commit/2a0162c0193a73ef16aee67dbe66abb9d2e4717c
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-extq.ll
Log Message:
-----------
[AArch64][SVE] Change the immediate argument in svextq (#115340)
In order to align with `svext` and NEON `vext`/`vextq`, this patch
changes immediate argument in `svextq` such that it refers to elements
of the size of those of the source vector, rather than bytes. The [spec
for this
intrinsic](https://github.com/ARM-software/acle/blob/main/main/acle.md#extq)
is ambiguous about the meaning of this argument, this issue was raised
after there was a differing interpretation for it from the implementers
of the ACLE in GCC.
For example (with our current implementation):
`svextq_f64(zn_f64, zm_f64, 1)` would, for each 128-bit segment of
`zn_f64,` concatenate the highest 15 bytes of this segment with the
first byte of the corresponding segment of `zm_f64`.
After this patch, the behavior of `svextq_f64(zn_f64, zm_f64, 1)` would
be, for each 128-bit vector segment of `zn_f64`, to concatenate the
higher doubleword of this segment with the lower doubleword of the
corresponding segment of `zm_f64`.
The range of the immediate argument in `svextq` would be modified such
that it is:
- [0,15] for `svextq_{s8,u8}`
- [0,7] for `svextq_{s16,u16,f16,bf16}`
- [0,3] for `svextq_{s32,u32,f32}`
- [0,1] for `svextq_{s64,u64,f64}`
Commit: bf440f75b485e4ea7f809dc37df74cac140069fd
https://github.com/llvm/llvm-project/commit/bf440f75b485e4ea7f809dc37df74cac140069fd
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[Clang][NFC] Remove trailing whitespace from Attr{,Docs}.td
Commit: b1a34b80b83156540519110cc798969dcfe1aec9
https://github.com/llvm/llvm-project/commit/b1a34b80b83156540519110cc798969dcfe1aec9
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/gcov_ctr_ref_init.ll
Log Message:
-----------
[NFC][Test] Fix PowerPC test gcov_ctr_ref_init.ll (#117577)
Commit: c55a080c080ed76a9aabe6dcd1966fedc0ecda5a
https://github.com/llvm/llvm-project/commit/c55a080c080ed76a9aabe6dcd1966fedc0ecda5a
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
Log Message:
-----------
[RISCV] Add shuffle coverage for compress, decompress, and repeat idioms
compress is intented to match vcompress from the ISA manual. Note that
deinterleave is a subset of this, and is already tested elsewhere.
decompress is the synthetic pattern defined in same - though we can often
do better than the mentioned iota/vrgather. Note that some of these
can also be expressed as interleave with at least one undef source,
and is already tested elsewhere.
repeat repeats each input element N times in the output. It can be
described as as a interleave operations, but we can sometimes do
better lowering wise.
Commit: 5a3299a684d7d8c40f48d732e5b80a8bd29aa882
https://github.com/llvm/llvm-project/commit/5a3299a684d7d8c40f48d732e5b80a8bd29aa882
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx950.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-f64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i1.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
Log Message:
-----------
AMDGPU: Remove some -verify-machineinstrs from tests (#117736)
We should leave these for EXPENSIVE_CHECKS builds. Some of these
were near the top of slowest tests.
Commit: 4ab298b5fbc8f48387062b2dd99ea07127c02e6b
https://github.com/llvm/llvm-project/commit/4ab298b5fbc8f48387062b2dd99ea07127c02e6b
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.h
Log Message:
-----------
[LLDB][ThreadELFCore] Set all the properties of ELFLinuxSigInfo to a non build dependent size (#117604)
On #110065 the changes to LinuxSigInfo Struct introduced some variables
that will differ in size on 32b or 64b. I've rectified this by setting
them all to build independent types.
Commit: 5fd4f32f985f83414d82a1c2c55741e363693352
https://github.com/llvm/llvm-project/commit/5fd4f32f985f83414d82a1c2c55741e363693352
Author: Zhengxing li <zhengxingli at microsoft.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/semantics/SV_GroupID.hlsl
M clang/test/SemaHLSL/Semantics/entry_parameter.hlsl
M clang/test/SemaHLSL/Semantics/invalid_entry_parameter.hlsl
M clang/test/SemaHLSL/Semantics/valid_entry_parameter.hlsl
Log Message:
-----------
[HLSL] Implement SV_GroupID semantic (#115911)
Support SV_GroupID attribute.
Translate it into dx.group.id in clang codeGen.
Fixes: #70120
Commit: 78c7024640a5b511685c445f554b7d985a7cf286
https://github.com/llvm/llvm-project/commit/78c7024640a5b511685c445f554b7d985a7cf286
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-default-clause.c
A clang/test/SemaOpenACC/combined-construct-present-ast.cpp
A clang/test/SemaOpenACC/combined-construct-present-clause.c
A clang/test/SemaOpenACC/combined-construct-present-clause.cpp
Log Message:
-----------
[OpenACC] Implement 'present' for combined constructs.
This is another clause where the parsing does all the required
enforcement besides the construct it appertains to, so this patch
removes the restriction and adds sufficient test coverage for combined
constructs.
Commit: 5683fc5cc043d1f43294bc57e04a901ad8cafcf5
https://github.com/llvm/llvm-project/commit/5683fc5cc043d1f43294bc57e04a901ad8cafcf5
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] port a5dd6463608b
Commit: 752ef93392b2d049064dc77087bf414d69283cfc
https://github.com/llvm/llvm-project/commit/752ef93392b2d049064dc77087bf414d69283cfc
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/MC/AArch64/local-bounds-single-trap.ll
Log Message:
-----------
[NFC][clang] Fix header comment in llvm/test/MC/AArch64/local-bounds-single-trap.ll (#117642)
llvm/test/MC/AArch64/local-bounds-single-trap.ll was introduced in
https://github.com/llvm/llvm-project/pull/65972 to demonstrate that
nomerge did not work properly, which is documented in the header
comment.
https://github.com/llvm/llvm-project/pull/101549 fixed nomerge for trap
builtins and
https://github.com/llvm/llvm-project/commit/ae6dc64ec670891cb15049277e43133d4df7fb4b
updated the test assertions, but not the header comment. This patch
updates the header comment accordingly.
Commit: 5bdcaf1a0804799106bc864215ba03af4b762966
https://github.com/llvm/llvm-project/commit/5bdcaf1a0804799106bc864215ba03af4b762966
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/docs/GitHub.rst
Log Message:
-----------
[github] Document the process for requesting the CI/CD role (#115321)
See https://discourse.llvm.org/t/rfc-proposing-a-new-ci-cd-admin-for-the-project
Commit: 44ef12b020c07d195519d0613d21f3b8ab29a22d
https://github.com/llvm/llvm-project/commit/44ef12b020c07d195519d0613d21f3b8ab29a22d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
A libcxx/test/std/containers/sequences/vector/addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.cons/assign_copy.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.cons/assign_move.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.cons/move.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/emplace.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter_iter.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_iter_iter.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_rvalue.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_size_value.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_value.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.special/swap.addressof.compile.pass.cpp
Log Message:
-----------
[libc++] Refactor tests for hijacked address operator in vector (#117457)
This reduces the amount of boilerplate needed to implement the tests.
Commit: e57b327be27bd185595a3383dfac90ec6651c123
https://github.com/llvm/llvm-project/commit/e57b327be27bd185595a3383dfac90ec6651c123
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
Log Message:
-----------
AMDGPU: Legalize fminimum and fmaximum f32 for gfx950 (#117634)
Select to minimum3/maximum3. Leave f16/v2f16 for later
since it's complicated by only having the vector version.
Commit: f5e92eb04b5d9b708d38e3616df998ecdf9afc20
https://github.com/llvm/llvm-project/commit/f5e92eb04b5d9b708d38e3616df998ecdf9afc20
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
Log Message:
-----------
AMDGPU: Handle f32 minimum3/maximum3 pattern for gfx950 (#117737)
Commit: 7221bc74bc6b038b40c00d5111555ea87b326bf3
https://github.com/llvm/llvm-project/commit/7221bc74bc6b038b40c00d5111555ea87b326bf3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
Log Message:
-----------
AMDGPU: Make v2f16 minimum/maximum legal for gfx950 (#117738)
Commit: 815069c701d62b58b8dbb6e902931f9eb5185db4
https://github.com/llvm/llvm-project/commit/815069c701d62b58b8dbb6e902931f9eb5185db4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]_[bf8|fp8] (#117739)
OPSEL[1:0] collectively decide which byte to read
from src input.
Builtin takes additional imm argument which
represents index (with valid values:[0:3]) of src
byte read. Out of bounds checks will added in next
patch.
OPSEL ASM Syntax: opsel:[x,y,z]
where,
opsel[x] = Inst{11} = src0_modifier{2}
opsel[y] = Inst{12} = src1_modifier{2}
opsel[z] = Inst{14} = src0_modifier{3}
Note: Inst{13} i.e. OPSEL[2] is ignored in
asm syntax and opsel[z] is meaningless
for v_cvt_scalef32_f32_{fp|bf}8
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 803bd812b16d1454b8fc0d6d66d7da793408b34d
https://github.com/llvm/llvm-project/commit/803bd812b16d1454b8fc0d6d66d7da793408b34d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_{fp8|bf8}_f32 for gfx950 (#117740)
OPSEL[3] determines low/high 16 bits of word to write.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: c9562b181cafafba104cccd7334ace1fd6aee5ac
https://github.com/llvm/llvm-project/commit/c9562b181cafafba104cccd7334ace1fd6aee5ac
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
Log Message:
-----------
[gn] port 3cb28522ba4c
Commit: c71418574f1bb9e4678428901775c8b633cded09
https://github.com/llvm/llvm-project/commit/c71418574f1bb9e4678428901775c8b633cded09
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/complex/generic/CMakeLists.txt
M libc/src/pthread/CMakeLists.txt
M libc/src/setjmp/riscv/CMakeLists.txt
M libc/src/setjmp/x86_64/CMakeLists.txt
M libc/src/signal/linux/CMakeLists.txt
M libc/src/stdfix/CMakeLists.txt
M libc/src/string/CMakeLists.txt
M libc/src/threads/CMakeLists.txt
M libc/test/src/math/smoke/LdExpTest.h
Log Message:
-----------
[libc] suppress more clang-cl warnings (#117718)
- migrate more `-O3` to `${libc_opt_high_flag}`
- workaround a issue with `LLP64` in test. The overflow testing is
guarded by a constexpr but the literal overflow itself will still
trigger warnings.
Notice that for math smoke test, for some reasons, the
`${libc_opt_high_flag}` will be passed into `lld-link` which confuses
the linker so there are still some warnings leftover there. I can
investigate more when I have time.
Commit: 0719b6d936d628c4c1765a9e700387ddd77759b9
https://github.com/llvm/llvm-project/commit/0719b6d936d628c4c1765a9e700387ddd77759b9
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
R clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/RWBuffer-AST.hlsl
R clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
A clang/test/AST/HLSL/TypedBuffers-AST.hlsl
Log Message:
-----------
[HLSL][NFC] Refactor resource buffers AST tests (#117659)
This is a test-only change. This PR merges 5 tests for structured
buffers ASTs into one file with multiple run lines and check prefixes
because these tests have a lot of common output. It also renames
RWBuffer-AST.hlsl to TypedBuffers-AST.hlsl and makes it ready to include
testing of other typed buffers as well.
Fixes #115412
Commit: 46a08579f2b86e39b367b83ff4ca0e92302d2168
https://github.com/llvm/llvm-project/commit/46a08579f2b86e39b367b83ff4ca0e92302d2168
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/GVN/noalias.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/JumpThreading/thread-loads.ll
M llvm/test/Transforms/NewGVN/noalias.ll
Log Message:
-----------
[Local] Only intersect alias.scope,noalias & parallel_loop if inst moves (#117716)
Preserve !alias.scope, !noalias and !mem.parallel_loop_access metadata
on the replacement instruction, if it does not move. In that case, the
program would be UB, if the aliasing property encoded in the metadata
does not hold. This makes use of the clarification re aliasing metadata
implying UB if the property does not hold: #116220
Same as #115868, but for !alias.scope, !noalias and
!mem.parallel_loop_access.
PR: https://github.com/llvm/llvm-project/pull/117716
Commit: cefc1b0c211fcc3f5528b72d5883f0c390d63e71
https://github.com/llvm/llvm-project/commit/cefc1b0c211fcc3f5528b72d5883f0c390d63e71
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/aa-recursion-assertion-failure.ll
M llvm/test/Transforms/MergedLoadStoreMotion/st_sink_debuginvariant.ll
M llvm/test/Transforms/NewGVN/2010-03-31-RedundantPHIs.ll
M llvm/test/Transforms/NewGVN/2010-05-08-OneBit.ll
M llvm/test/Transforms/NewGVN/2011-04-27-phioperands.ll
M llvm/test/Transforms/NewGVN/2012-05-22-PreCrash.ll
M llvm/test/Transforms/NewGVN/basic-cyclic-opt.ll
M llvm/test/Transforms/NewGVN/completeness.ll
M llvm/test/Transforms/NewGVN/crash.ll
M llvm/test/Transforms/NewGVN/deadstore.ll
M llvm/test/Transforms/NewGVN/eliminate-ssacopy.ll
M llvm/test/Transforms/NewGVN/metadata-nonnull.ll
M llvm/test/Transforms/NewGVN/phi-of-ops-move-block.ll
M llvm/test/Transforms/NewGVN/phi-of-ops-simplification-dependencies.ll
M llvm/test/Transforms/NewGVN/pr25440.ll
M llvm/test/Transforms/NewGVN/pr31594.ll
M llvm/test/Transforms/NewGVN/pr31613.ll
M llvm/test/Transforms/NewGVN/pr31682.ll
M llvm/test/Transforms/NewGVN/pr32403.ll
M llvm/test/Transforms/NewGVN/pr32838.ll
M llvm/test/Transforms/NewGVN/pr32845.ll
M llvm/test/Transforms/NewGVN/pr32897.ll
M llvm/test/Transforms/NewGVN/pr32934.ll
M llvm/test/Transforms/NewGVN/pr33014.ll
M llvm/test/Transforms/NewGVN/pr33086.ll
M llvm/test/Transforms/NewGVN/pr33116.ll
M llvm/test/Transforms/NewGVN/pr33187.ll
M llvm/test/Transforms/NewGVN/pr33204.ll
M llvm/test/Transforms/NewGVN/pr33432.ll
M llvm/test/Transforms/NewGVN/pr33720.ll
M llvm/test/Transforms/NewGVN/pr34430.ll
M llvm/test/Transforms/NewGVN/pr35074.ll
M llvm/test/Transforms/NewGVN/pr42422-phi-of-ops.ll
M llvm/test/Transforms/NewGVN/pr43441.ll
M llvm/test/Transforms/NewGVN/pre-new-inst-xfail.ll
M llvm/test/Transforms/NewGVN/predicates.ll
M llvm/test/Transforms/NewGVN/refine-stores.ll
M llvm/test/Transforms/NewGVN/unreachable_block_infinite_loop.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#117292)
This PR removes tests with `br i1 undef` under
`llvm/tests/Transforms/MemCpyOpt, MergedLoadStoreMotion, NewGVN`.
Commit: 5ce981e76da4094efd055ded54d1f756b1286f18
https://github.com/llvm/llvm-project/commit/5ce981e76da4094efd055ded54d1f756b1286f18
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
Log Message:
-----------
[libc++] Refactor vector move constructor with allocator (#116449)
This PR simplifies the implementation of std::vector's move constructor
with an alternative allocator by invoking __init_with_size() instead of
calling assign(), which ultimately calls __assign_with_size(). The
advantage of using __init_with_size() lies in its internal use of
an exception guard, which simplifies the code. Furthermore, from a
semantic standpoint, it is more intuitive for a constructor to call
an initialization function than an assignment function.
Commit: 9118d3a564f271006b0d8aed0983f7ba025e77a0
https://github.com/llvm/llvm-project/commit/9118d3a564f271006b0d8aed0983f7ba025e77a0
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
Log Message:
-----------
gn build: Fix port of 3cb28522ba4c
COMPILER_RT_EXEC_OUTPUT_DIR is expected to be the path where
hwasan_symbolize is installed, i.e. the bin subdirectory of the
build directory, but we were incorrectly setting it to the install
location of the runtime libraries. Fix it.
Commit: 105b7803ea22823a2fca2a82ee843d0884e9cbf3
https://github.com/llvm/llvm-project/commit/105b7803ea22823a2fca2a82ee843d0884e9cbf3
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
Log Message:
-----------
[gn build] Port f9dca5bdbb0f
Commit: 8458bbe5947db75041579c7c1a0f7f79c8e992d9
https://github.com/llvm/llvm-project/commit/8458bbe5947db75041579c7c1a0f7f79c8e992d9
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M libcxx/include/__split_buffer
Log Message:
-----------
[libc++] Fix capacity increase issue with `shrink_to_fit` for `__split_buffer` (#117720)
This PR fixes the issue where `__split_buffer::shrink_to_fit` may
unexpectedly increase the capacity, similar to the issue for
`std::vector` in #97895. The fix follows the same approach
used in #97895 for `std::vector`.
Commit: 003b48e0cbbb69a9a1ca9ff1a6d3bda30d0c6121
https://github.com/llvm/llvm-project/commit/003b48e0cbbb69a9a1ca9ff1a6d3bda30d0c6121
Author: Raul Tambre <raul at tambre.ee>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M bolt/test/AArch64/data-at-0-offset.c
M bolt/test/AArch64/double_jump.cpp
M bolt/test/R_ABS.pic.lld.cpp
M bolt/test/X86/double-jump.test
M bolt/test/X86/dwarf5-df-inlined-subroutine-gc-sections-range.test
M bolt/test/X86/jmp-optimization.test
M bolt/test/X86/match-functions-with-call-graph.test
M bolt/test/pie.test
M bolt/test/runtime/X86/instrumentation-indirect.c
M bolt/test/runtime/bolt-reserved.cpp
Log Message:
-----------
[BOLT][test] enable GNU extensions, use C++ compiler, remove unnecessary target (#117043)
1. With a Clang that doesn't default to GNU extensions they need to be enabled explicitly.
2. The X86 directory lit config sets it already, there's no reason for this test to do it by itself.
3. The C frontend executable will fail if there's for example a Clang resource file for the C++ mode that sets C++-specific options:
```
+ /home/tambre/dev/llvm/build/bin/clang --target=x86_64-unknown-linux-gnu -fPIE -fuse-ld=lld -Wl,--unresolved-symbols=ignore-all -pie -fPIC -shared /home/tambre/dev/llvm/bolt/test/R_ABS.pic.lld.cpp -o /home/tambre/dev/llvm/build/tools/bolt/test/Output/R_ABS.pic.lld.cpp.tmp.so -Wl,-q -fuse-ld=lld
clang: warning: argument unused during compilation: '-pie' [-Wunused-command-line-argument]
error: invalid argument '-std=c23' not allowed with 'C++'
```
Commit: 2d90af59084d842a343f9acf6ae7c1e61991873c
https://github.com/llvm/llvm-project/commit/2d90af59084d842a343f9acf6ae7c1e61991873c
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/lib/Parser/unparse.cpp
A flang/test/Parser/OpenMP/bind-clause.f90
Log Message:
-----------
[flang][OpenMP] Add unparsing of BIND clause argument (#117776)
Currently the argument of the BIND clause is not printed. This is likely
an omission in the original implementation.
Commit: 1b68b33ac0b3c2c8bd2ab89fec4f516f622cebdf
https://github.com/llvm/llvm-project/commit/1b68b33ac0b3c2c8bd2ab89fec4f516f622cebdf
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
A clang/test/CodeGen/ubsan-trap-merge.c
Log Message:
-----------
[NFC][clang] Add ubsan-trap-merge.c test to show absence of nomerge (#117649)
This test (copied from https://github.com/llvm/llvm-project/pull/83470)
demonstrates that UBSan does not add the nomerge annotation. This is
significant because it can result in them being merged by the backend,
even when -ubsan-unique-traps is enabled.
N.B. https://github.com/llvm/llvm-project/pull/65972 (continuation of
https://reviews.llvm.org/D148654) had considered adding nomerge to
ubsantrap, but did not proceed with that because of
https://github.com/llvm/llvm-project/issues/53011.
https://github.com/llvm/llvm-project/pull/101549 fixed that limitation
("It sets nomerge flag for the node if the instruction has nomerge
arrtibute."); planned upcoming work
(https://github.com/llvm/llvm-project/pull/117651) will add nomerge for
ubsan.
Commit: dde7f4d024d071d883cfb7812f31866e767b6ab9
https://github.com/llvm/llvm-project/commit/dde7f4d024d071d883cfb7812f31866e767b6ab9
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
A llvm/test/CodeGen/X86/ubsan-trap-merge.ll
A llvm/test/CodeGen/X86/ubsan-trap-nomerge.ll
Log Message:
-----------
[NFC][clang] Add ubsan-trap-merge.ll test to show absence of nomerge considered harmful (#117657)
These testcases demonstrate that ubsan intrinsics are merged in the
backend iff nomerge is missing from ubsantrap intrinsics.
This is based on the observation and testcase by Vitaly Buka in
https://github.com/llvm/llvm-project/pull/83470.
Commit: 81349b84eb0fd2d64f836ddbf3e28638d4a254b8
https://github.com/llvm/llvm-project/commit/81349b84eb0fd2d64f836ddbf3e28638d4a254b8
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/tests/sanitizer_libc_test.cpp
Log Message:
-----------
[sanitizer] Use /tmp/ not /tmp/dir/ in tests (#117759)
Tests fail if the user doesn't own /tmp/dir/. On hosts with multiple
users running the test suite, who owns /tmp/dir/ can become a race.
Commit: c8bdb31ff66e8934060c60816c57925fdec42a2c
https://github.com/llvm/llvm-project/commit/c8bdb31ff66e8934060c60816c57925fdec42a2c
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
R clang/test/CodeGen/ubsan-trap-merge.c
Log Message:
-----------
Revert "[NFC][clang] Add ubsan-trap-merge.c test to show absence of nomerge" (#117804)
Reverts llvm/llvm-project#117649
Reason: buildbot breakage:
https://lab.llvm.org/buildbot/#/builders/144/builds/12581
Commit: 8ffe63fb556915c041e8e9bc2d1bf4325f12ba26
https://github.com/llvm/llvm-project/commit/8ffe63fb556915c041e8e9bc2d1bf4325f12ba26
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
Log Message:
-----------
[nfc][asan] Fix typo in comment
Commit: 5add295fd77e29f090515668f95d362d98583856
https://github.com/llvm/llvm-project/commit/5add295fd77e29f090515668f95d362d98583856
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Use IndexedMemProfRecord in MemProfReader (NFC) (#117613)
IndexedMemProfRecord contains a complete package of the MemProf
profile, including frames, call stacks, and records. This patch
replaces the three member variables of MemProfReader with
IndexedMemProfRecord.
This transition significantly simplies both the constructor and the
final "take" method:
MemProfReader(IndexedMemProfData MemProfData)
: MemProfData(std::move(MemProfData)) {}
IndexedMemProfData takeMemProfData() { return std::move(MemProfData); }
Commit: 36a46d85e75e3be35c6b62002717f531b86d8368
https://github.com/llvm/llvm-project/commit/36a46d85e75e3be35c6b62002717f531b86d8368
Author: Omar Hossam <moar.ahmed at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/syscall.h.def
M libc/newhdrgen/yaml/sys/mman.yaml
M libc/spec/linux.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/process_mrelease.cpp
A libc/src/sys/mman/process_mrelease.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/process_mrelease_test.cpp
Log Message:
-----------
[libc] Implement process_mrelease. (#117503)
This PR addresses #110124.
Commit: 9fde1a498f2dc97a737a3564cb427c6f2a7bfe6c
https://github.com/llvm/llvm-project/commit/9fde1a498f2dc97a737a3564cb427c6f2a7bfe6c
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
Log Message:
-----------
[HLSL] Forward arguments in BuiltinTypeMethodBuilder::callBuiltin. NFC (#117789)
Introduce BuiltinTypeMethodBuilder::PlaceHolder values and use them in
the callBuiltin method in order to specify how we want to forward
arguments and pass the resource handle to builtins.
Commit: 09e7477c0f1f192d3e5bb9735301c2deec9a3d96
https://github.com/llvm/llvm-project/commit/09e7477c0f1f192d3e5bb9735301c2deec9a3d96
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
Log Message:
-----------
[memprof] Add a default constructor to Frame (#117790)
This patch adds a default constructor to Frame along with a use in
FrameIdConverter.
The real intent is to facilitate deserialization of YAML-based MemProf
format. Note that the YAML parser default-constructs a struct and
then populates one field at a time.
Commit: 7ae61a36f94679370b9c1b4b1a13999d23d38a0c
https://github.com/llvm/llvm-project/commit/7ae61a36f94679370b9c1b4b1a13999d23d38a0c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__memory/allocator_traits.h
M libcxx/include/__memory/unique_ptr.h
A libcxx/include/__type_traits/detected_or.h
M libcxx/include/module.modulemap
Log Message:
-----------
[libc++] Add __detected_or_t and use it to implement some of the allocator traits aliases (#115654)
This simplifies the implementation a bit, since we don't need a lot of
the `__has_x` classes anymore. We just need two template aliases to
implement the `allocator_traits` aliases now.
Commit: 39601a6e5484de183bf525b7d0624e7890ccd8ab
https://github.com/llvm/llvm-project/commit/39601a6e5484de183bf525b7d0624e7890ccd8ab
Author: AdityaK <hiraditya at msn.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/SimplifyCFG/switch-branch-fold-indirectbr-102351.ll
Log Message:
-----------
Bail out jump threading on indirect branches only (#117778)
Remove check for PHI in pred as pointed out in #103688
Reduced the testcase to remove redundant phi in pred
Fixes: #102351
Commit: 47dbf359041299c5f19f82e7204c6c9675b6e69a
https://github.com/llvm/llvm-project/commit/47dbf359041299c5f19f82e7204c6c9675b6e69a
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
A clang/test/CodeGen/ubsan-trap-merge.c
Log Message:
-----------
Reapply "[NFC][clang] Add ubsan-trap-merge.c test to show absence of nomerge" (#117804) (#117805)
This reverts commit c8bdb31ff66e8934060c60816c57925fdec42a2c.
It was reverted because I forgot to update the auto-generated assertions
after adding the target triple.
Original commit message:
This test (copied from https://github.com/llvm/llvm-project/pull/83470)
demonstrates that UBSan does not add the nomerge annotation. This is
significant because it can result in them being merged by the backend,
even when -ubsan-unique-traps is enabled.
N.B. https://github.com/llvm/llvm-project/pull/65972 (continuation of
https://reviews.llvm.org/D148654) had considered adding nomerge to
ubsantrap, but did not proceed with that because of
https://github.com/llvm/llvm-project/issues/53011.
https://github.com/llvm/llvm-project/pull/101549 fixed that limitation
("It sets nomerge flag for the node if the instruction has nomerge
arrtibute."); planned upcoming work
(https://github.com/llvm/llvm-project/pull/117651) will add nomerge for
ubsan.
Commit: e1af76cad265694f1799d46de455f18c931ae2b7
https://github.com/llvm/llvm-project/commit/e1af76cad265694f1799d46de455f18c931ae2b7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 7ae61a36f946
Commit: 3372303188df0f7f8ac26e7ab610cf8b0f716d42
https://github.com/llvm/llvm-project/commit/3372303188df0f7f8ac26e7ab610cf8b0f716d42
Author: lntue <lntue at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/syscall.h.def
M libc/newhdrgen/yaml/sys/mman.yaml
M libc/spec/linux.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
R libc/src/sys/mman/linux/process_mrelease.cpp
R libc/src/sys/mman/process_mrelease.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
R libc/test/src/sys/mman/linux/process_mrelease_test.cpp
Log Message:
-----------
Revert "[libc] Implement process_mrelease." (#117807)
Reverts llvm/llvm-project#117503
Commit: 3a8b28f69837f8502c7bce798509f8dadb314dcc
https://github.com/llvm/llvm-project/commit/3a8b28f69837f8502c7bce798509f8dadb314dcc
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Add ioctl interceptor (#117569)
Commit: 3359806817d5d3a600e3f0bdae60ac3df1c85e7f
https://github.com/llvm/llvm-project/commit/3359806817d5d3a600e3f0bdae60ac3df1c85e7f
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
Log Message:
-----------
[mlir][LLVM][MemRef] Lower assume_alignment with operand bundles (#117800)
Now that LLVM allows a operand bundle on assume calls to directly
specify alignment assumptions, change the lowering of
memref.assume_alignment to use that feature instead of the ptrtoint
method.
This makes LLVM's job easier and prevents issues when dealing with
cases where ptrtoint isn't a desired operation (like those with poiner
provenance)
Commit: e84614833e52ce9a7bebfa8d0d1af3298b6977b9
https://github.com/llvm/llvm-project/commit/e84614833e52ce9a7bebfa8d0d1af3298b6977b9
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/div.ll
Log Message:
-----------
[LLVM][NVPTX] Add support for div.full instruction (#116482)
This commit adds NVPTX support for div.full PTX instruction with test
under div.ll. [For more information, see PTX
ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)
Commit: 06d24da1312aa5c0c615a3b6c4dffe1c104e0cf3
https://github.com/llvm/llvm-project/commit/06d24da1312aa5c0c615a3b6c4dffe1c104e0cf3
Author: B I Mohammed Abbas <bimohammadabbas at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M compiler-rt/test/builtins/Unit/extendhfxf2_test.c
M compiler-rt/test/builtins/Unit/fp_test.h
Log Message:
-----------
Fix extendhfxf2 test (#117665)
Fix changes in #113897
Co-authored-by: Alex Richardson <alexrichardson at google.com>
Commit: a94cec521202b00d18eaa55d9a5a4616097f5abf
https://github.com/llvm/llvm-project/commit/a94cec521202b00d18eaa55d9a5a4616097f5abf
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M libcxx/include/__config
Log Message:
-----------
Revert "[libc++] Remove workaround which allows setting _LIBCPP_OVERRIDABLE_FUNC_VIS externally (#113139)" (#117779)
This reverts commit 2e686d6d17c4cc7608510a856055e6ca79fcb917.
See https://github.com/llvm/llvm-project/issues/117571
Commit: 43b6b78771e9ab4da912b574664e713758c43110
https://github.com/llvm/llvm-project/commit/43b6b78771e9ab4da912b574664e713758c43110
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/double-fcmp.ll
A llvm/test/CodeGen/RISCV/GlobalISel/float-fcmp.ll
Log Message:
-----------
[RISCV][GISel] Use libcalls for f32/f64 G_FCMP without F/D extensions. (#117660)
LegalizerHelp only supported f128 libcalls and incorrectly assumed that
the destination register for the G_FCMP was s32.
Commit: 06514c550105b3111c23751421265c318bd69ac6
https://github.com/llvm/llvm-project/commit/06514c550105b3111c23751421265c318bd69ac6
Author: Ian Wood <ianwood2024 at u.northwestern.edu>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/IR/AffineMap.h
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/test/Dialect/Linalg/fusion-elementwise.mlir
Log Message:
-----------
[MLIR][Linalg] Fix linalg crash during elementwise op fusion (#117667)
`isOpOperandCanBeDroppedAfterFusedLinalgs` crashes when `indexingMaps`
is empty. This can occur when `producer` only has DPS init operands and
`consumer ` only has a single DPS input operand (all operands are
ignored and nothing gets added to `indexingMaps`). This is because
`concatAffineMaps` wasn't handling the maps being empty properly.
Similar to `canOpOperandsBeDroppedImpl`, I added an early return when
the maps are of size zero. Additionally, `concatAffineMaps`'s
declaration comment says it returns an empty map when `maps` is empty
but it has no way to get the `MLIRContext` needed to construct the empty
affine map when the array is empty. So, I changed this to take the
context.
__NOTE: concatAffineMaps now takes an MLIRContext to be able to
construct an empty map in the case where `maps` is empty.__
---------
Signed-off-by: Ian Wood <ianwood2024 at u.northwestern.edu>
Co-authored-by: Quinn Dawkins <quinn.dawkins at gmail.com>
Commit: 5147e5941d40ae89b6ecab89aa36f8f5def28f1e
https://github.com/llvm/llvm-project/commit/5147e5941d40ae89b6ecab89aa36f8f5def28f1e
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
A llvm/include/llvm/DebugInfo/GSYM/CallSiteInfo.h
M llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReader.h
M llvm/lib/DebugInfo/GSYM/CMakeLists.txt
A llvm/lib/DebugInfo/GSYM/CallSiteInfo.cpp
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
A llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-callsite-info-dsym.yaml
A llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-callsite-info-exe.yaml
A llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-callsite-info-obj.test
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
M llvm/unittests/DebugInfo/GSYM/GSYMTest.cpp
Log Message:
-----------
[GSYM] Callsites: Add data format support and loading from YAML (#109781)
This PR adds support in the gSYM format for call site information and
adds support for loading call sites from a YAML file. The support for
YAML input is mostly for testing purposes - so we have a way to test the
functionality.
Note that this data is not currently used in the gSYM tooling - the
logic to use call sites will be added in a later PR.
The reason why we need call site information in gSYM files is so that we
can support better call stack function disambiguation in the case where
multiple functions have been merged due to optimization (linker ICF).
When resolving a merged function on the callstack, we can use the call
site information of the calling function to narrow down the actual
function that is being called, from the set of all merged functions.
See [this
RFC](https://discourse.llvm.org/t/rfc-extending-gsym-format-with-call-site-information-for-merged-function-disambiguation/80682)
for more details on this change.
Commit: 62584f32eb786e4c455092e653a58182e8ffe4dc
https://github.com/llvm/llvm-project/commit/62584f32eb786e4c455092e653a58182e8ffe4dc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp8|bf8} for gfx950 (#117741)
OPSEL[0] determines low/high 16 bits of src0 to read.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 4527894143a2749d826769e78ab4e0f50782b188
https://github.com/llvm/llvm-project/commit/4527894143a2749d826769e78ab4e0f50782b188
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
Builtins & Codegen support for v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16 for gfx950 (#117742)
OPSEL[3] determines low/high 16 bits of word to write.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 2b9e947d4346ad03328a31f90b9056837c042d1b
https://github.com/llvm/llvm-project/commit/2b9e947d4346ad03328a31f90b9056837c042d1b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtins & Codegen support for v_cvt_scale_fp4<->f32 for gfx950 (#117743)
OPSEL ASM Syntax for v_cvt_scalef32_pk_f32_fp4 : opsel:[x,y,z]
where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read.
OPSEL ASM Syntax for v_cvt_scalef32_pk_fp4_f32 : opsel:[a,b,c,d]
where, c & d i.e. OPSEL[3 : 2] selects which dst_byte to write.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: eeb76880f3489f1e7e6224a26ec4abc7f6da4e34
https://github.com/llvm/llvm-project/commit/eeb76880f3489f1e7e6224a26ec4abc7f6da4e34
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{f|bf}16_fp4 for gfx950 (#117744)
OPSEL ASM Syntax for v_cvt_scalef32_pk_{f|bf}16_fp4 : opsel:[x,y,z]
where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read.
Note: Conventional Inst{13} i.e. OPSEL[2] is ignored in asm syntax.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 0f4fcca546a489f50535086a313f8c054ea41791
https://github.com/llvm/llvm-project/commit/0f4fcca546a489f50535086a313f8c054ea41791
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk32_f32_[fp|bf]6 for gfx950 (#117745)
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 991dcbc468763953f4b4e65fa3448e147cba5bba
https://github.com/llvm/llvm-project/commit/991dcbc468763953f4b4e65fa3448e147cba5bba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtin & codegen support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 for gfx950 (#117747)
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 065dc93d9626930b48f8e88b1e0a18c746951ce0
https://github.com/llvm/llvm-project/commit/065dc93d9626930b48f8e88b1e0a18c746951ce0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 for gfx950 (#117793)
OPSEL[0] selects src_word to read.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: c8ee1ee0571c5e49bee42983a8b9d8db0243c001
https://github.com/llvm/llvm-project/commit/c8ee1ee0571c5e49bee42983a8b9d8db0243c001
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk_fp4_{f|bf}16 for gfx950 (#117794)
These instructions have non-standard use of OPSEL bits to select
dest write byte. The src2_modifiers operand is used without having
its corresponding src2 operand by introducing dummy src2.
OPSEL ASM OPSEL Syntax: opsel:[a,b,c,d]
a & b are meaningless, c & d together decides byte to write in dst reg.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 175e0dd4223b7678f660519a9342282e8b226093
https://github.com/llvm/llvm-project/commit/175e0dd4223b7678f660519a9342282e8b226093
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
Log Message:
-----------
[MachineLateInstrsCleanup] Minor fixing (NFC). (#117816)
With cb57b7a7, MachineLateInstrsCleanup switched to using a map to keep
track of kill flags to remedy compile time regressions seen with huge
functions. It seems that the comment above clearKillsForDef() became stale with
that commit, and also that one of the arguments to it became unused,
both of which this patch fixes.
Commit: d3c103b80e6e8b001c2a22bd2f7afbdcf1f7b70a
https://github.com/llvm/llvm-project/commit/d3c103b80e6e8b001c2a22bd2f7afbdcf1f7b70a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for V_CVT_SCALE_SR_FP4 instructions (#117795)
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: e335563806e0466f33ecce80a9fd5a39a3aead47
https://github.com/llvm/llvm-project/commit/e335563806e0466f33ecce80a9fd5a39a3aead47
Author: David Truby <david.truby at arm.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M flang/unittests/Runtime/CMakeLists.txt
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[NFC][flang] Fix execute_command_line test for odd environments (#117714)
One of the execute_command_line tests currently runs `cat` on an invalid
file and checks its return value, but since we don't control `cat` or
the user's path, the return value might not be reliably stable on a
per-platform basis. For example, if `git` is installed on Windows in
certain configurations it adds a directory to the path containing a
`cat` with a different set of error codes to the default Windows one.
This patch changes the test to use the `not` binary built by LLVM for
testing purposes, which should always return 1 on any platform
regardless of the user's environment.
Commit: 34a8bb0da33ce95aa4dec61ad24fbf4049176189
https://github.com/llvm/llvm-project/commit/34a8bb0da33ce95aa4dec61ad24fbf4049176189
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_sr_{f16|bf16}_f32 instructions (#117796)
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: f87cabea26c3bcfdf9315c3ade2bf830692ddb3d
https://github.com/llvm/llvm-project/commit/f87cabea26c3bcfdf9315c3ade2bf830692ddb3d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: MC support for v_cvt_scalef32_sr_{bf8|fp8}_{f16|bf16|f32} (#117797)
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: 2ff2e871f5e632ea493efaf4f2192f8b18a54ab1
https://github.com/llvm/llvm-project/commit/2ff2e871f5e632ea493efaf4f2192f8b18a54ab1
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/Bufferize.h
M mlir/include/mlir/Dialect/Func/Transforms/Passes.h
M mlir/lib/Dialect/Bufferization/Transforms/BufferUtils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
Log Message:
-----------
[mlir][bufferization] Remove remaining dialect conversion-based infra parts (#114155)
This commit removes the last remaining components of the dialect
conversion-based bufferization passes.
Note for LLVM integration: If you depend on these components, migrate to
One-Shot Bufferize or copy them to your codebase.
Commit: 76715787f4c1e23a618bccdb81049456526f7b42
https://github.com/llvm/llvm-project/commit/76715787f4c1e23a618bccdb81049456526f7b42
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
Log Message:
-----------
AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_pk_fp4 instructions (#117798)
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: f2129ca94c47875b5f915abc9d7dfb02a7445fe6
https://github.com/llvm/llvm-project/commit/f2129ca94c47875b5f915abc9d7dfb02a7445fe6
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
[lldb][NFC] Whitespace fix for mis-indented block
This mis-indented block makes a FC change I'm about
to propose look larger than it is when clang-formatted.
Commit: 4d2bc0adc63cf90111d849911ccdddaa0d886e60
https://github.com/llvm/llvm-project/commit/4d2bc0adc63cf90111d849911ccdddaa0d886e60
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/ReorderFunctions.cpp
Log Message:
-----------
[BOLT] Extract comparator for sorting functions by index into helper function (#116217)
This change extracts the comparator for sorting functions by index into
a helper function `compareBinaryFunctionByIndex()`
Not sure why the comparator used in
`BinaryContext::getSortedFunctions()` is not same as the other two
places. I think they should use the same comparator, so I also change
`BinaryContext::getSortedFunctions()` to use
`compareBinaryFunctionByIndex()` for sorting functions.
Commit: 3433e4140d18865fe784061a3cd029c5980f4e2f
https://github.com/llvm/llvm-project/commit/3433e4140d18865fe784061a3cd029c5980f4e2f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Detect constant on the rhs of data transfer (#117806)
When the rhs expression has some constants and a device symbol, an
implicit data transfer needs to be generated for the device symbol and
the computation with the constant is done on the host.
Commit: 0f0c0c36e3e90b4cb04004ed9c930f3863a36422
https://github.com/llvm/llvm-project/commit/0f0c0c36e3e90b4cb04004ed9c930f3863a36422
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/and-implied-by-operands.ll
M llvm/test/Transforms/ConstraintElimination/or.ll
Log Message:
-----------
[ConstraintElim] Extend `checkOrAndOpImpliedByOther` to handle and/or expr trees. (#117123)
This patch extends `checkOrAndOpImpliedByOther` to handle and/or trees.
Limitation: At least one of the operands of root and/or instruction
should be an icmp. That is, this patch doesn't support expressions like
`(cmp1 & cmp2) & (cmp3 & cmp4)`.
Closes https://github.com/llvm/llvm-project/issues/117107.
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=69cc3f096ccbdef526bbd5a065a25c95122e87ee&to=919416d2c4c71e3b9fe533af2c168a36c7893be5&stat=instructions%3Au
Commit: ea58410d0fd75c9dc6d395bba15e939ed7c35cb1
https://github.com/llvm/llvm-project/commit/ea58410d0fd75c9dc6d395bba15e939ed7c35cb1
Author: Sam Clegg <sbc at chromium.org>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/test/CodeGen/builtins-wasm.c
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
A llvm/test/CodeGen/WebAssembly/thread_pointer.ll
Log Message:
-----------
[WebAssembly] Implement %llvm.thread.pointer intrinsic (#117817)
We can simply use the `__tls_base` global for this which is guaranteed
to be non-zero and unique per thread.
Fixes: #117433
Commit: dd4844722d98a97edd180e20abd4e65e1e2dd9d7
https://github.com/llvm/llvm-project/commit/dd4844722d98a97edd180e20abd4e65e1e2dd9d7
Author: antangelo <contact at antangelo.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/IntrinsicLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/Generic/builtin-expect-with-probability.ll
Log Message:
-----------
[SelectionDAG] Add generic implementation for @llvm.expect.with.probability when optimizations are disabled (#117459)
Handle \@llvm.expect.with.probability in SelectionDAGBuilder, FastISel,
and IntrinsicLowering in the same way \@llvm.expect is handled, where
the value is passed through as-is. This can be reached if the intrinsic
is used without optimizations, where it would otherwise be properly
transformed out.
Fixes #115411 for SelectionDAG. A similar patch is likely needed for
GlobalISel.
Commit: 73d1abb018fdd60664b49c3418572c2e04e18d41
https://github.com/llvm/llvm-project/commit/73d1abb018fdd60664b49c3418572c2e04e18d41
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M lld/ELF/Arch/X86_64.cpp
M lld/test/ELF/pack-dyn-relocs-tls-x86-64.s
M lld/test/ELF/tls-opt.s
M lld/test/ELF/x86-64-tls-ie-local.s
Log Message:
-----------
[X86][LLD] Handle R_X86_64_CODE_4_GOTTPOFF relocation type (#116634)
For
mov name at GOTTPOFF(%rip), %reg
add name at GOTTPOFF(%rip), %reg
add
`R_X86_64_CODE_4_GOTTPOFF` = 44
in #116633.
Linker can treat `R_X86_64_CODE_4_GOTTPOFF` as `R_X86_64_GOTTPOFF` or
convert the instructions above to
mov $name, %reg
add $name, %reg
if the first byte of the instruction at the relocation `offset - 4` is
`0xd5` (namely, encoded w/REX2 prefix) when possible.
Binutils patch: https://github.com/bminor/binutils-gdb/commit/a533c8df598b5ef99c54a13e2b137c98b34b043c
Binutils mailthread: https://sourceware.org/pipermail/binutils/2023-December/131463.html
ABI discussion: https://groups.google.com/g/x86-64-abi/c/ACwD-UQXVDs/m/vrgTenKyFwAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: fad5ed6e908aafe03e47032611a6e836bbcc4d5a
https://github.com/llvm/llvm-project/commit/fad5ed6e908aafe03e47032611a6e836bbcc4d5a
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M lld/ELF/Arch/X86_64.cpp
M lld/test/ELF/invalid/x86-64-tlsdesc-gd.s
M lld/test/ELF/x86-64-tlsdesc-gd.s
Log Message:
-----------
[X86][LLD] Handle R_X86_64_CODE_4_GOTPC32_TLSDESC relocation type (#116909)
For
lea name at tlsdesc(%rip), %reg
add
R_X86_64_CODE_4_GOTPC32_TLSDESC = 45
in #116908.
Linker can treat R_X86_64_CODE_4_GOTPC32_TLSDESC as
R_X86_64_GOTPC32_TLSDESC or convert the instruction above to
mov $name at tpoff, %reg
if the first byte of the instruction at the relocation offset - 4 is
0xd5 (namely, encoded w/REX2 prefix) when possible.
Binutils patch: https://github.com/bminor/binutils-gdb/commit/a533c8df598b5ef99c54a13e2b137c98b34b043c
Binutils mailthread: https://sourceware.org/pipermail/binutils/2023-December/131463.html
ABI discussion: https://groups.google.com/g/x86-64-abi/c/ACwD-UQXVDs/m/vrgTenKyFwAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: b5825963f0f0d5e3fb8a0c0914bc5a27aa16440e
https://github.com/llvm/llvm-project/commit/b5825963f0f0d5e3fb8a0c0914bc5a27aa16440e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize box when needed (#117810)
Materialize the box when the src comes from a embox or rebox operation.
This was done in the case of transfer to a descriptor but not when
transferring from a descriptor.
Commit: f9a39dfd18a1d428b5ec2ce38ad3b50ec6988e70
https://github.com/llvm/llvm-project/commit/f9a39dfd18a1d428b5ec2ce38ad3b50ec6988e70
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp
Log Message:
-----------
[ORC] Fix typo in comment: instruction is ldr literal, not adr. NFC.
Commit: cc113102c6ea3d9d3d016c0804fee0c154f98ce1
https://github.com/llvm/llvm-project/commit/cc113102c6ea3d9d3d016c0804fee0c154f98ce1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/GSYM/BUILD.gn
Log Message:
-----------
[gn build] Port 5147e5941d40
Commit: 508448280a4fc8d1e29c5ccf883836aac0f11ec9
https://github.com/llvm/llvm-project/commit/508448280a4fc8d1e29c5ccf883836aac0f11ec9
Author: Helmut Januschka <helmut at januschka.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStartsEndsWithCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-starts-ends-with.rst
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/string
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-starts-ends-with.cpp
Log Message:
-----------
[clang-tidy] Enhance modernize-use-starts-ends-with to handle substr patterns (#116033)
Enhances the modernize-use-starts-ends-with check to detect additional patterns
using substr that can be replaced with starts_with() (C++20).
This enhancement improves code readability and can be more efficient by avoiding
temporary string creation.
Commit: 38a3cce90a2cc54ea9ad6bbdd63ccd61c32cfac9
https://github.com/llvm/llvm-project/commit/38a3cce90a2cc54ea9ad6bbdd63ccd61c32cfac9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
Log Message:
-----------
[RISCV][GISel] Copy fneg test cases from SelectionDAG into float/double-arith.ll. NFC
The test cases use fcmp which was not fully supported before
43b6b78771e9ab4da912b574664e713758c43110.
Commit: 90a776fbdb35ef6ac6f28a19937e88abd2e4611b
https://github.com/llvm/llvm-project/commit/90a776fbdb35ef6ac6f28a19937e88abd2e4611b
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
Log Message:
-----------
[clang][RISCV] __riscv_v_intrinsic macro doesn't need zve32x (#117356)
This macro is used to check if compiler supports RVV intrinsics, so it
should be defined no matter vector is enabled or not.
Resolved https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/376
Commit: 74449ab86b8bc8d7388ede0cc7fc3a679da0c567
https://github.com/llvm/llvm-project/commit/74449ab86b8bc8d7388ede0cc7fc3a679da0c567
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/lib/Serialization/ASTReader.cpp
M clang/test/Modules/explicit-build-missing-files.cpp
M clang/test/Modules/load_failure.c
M clang/test/Modules/mismatch-diagnostics.cpp
M clang/test/Modules/module-feature.m
M clang/test/Modules/pr62359.cppm
M clang/test/Modules/prebuilt-implicit-modules.m
M clang/test/PCH/arc.m
M clang/test/PCH/no-validate-pch.cl
M clang/test/PCH/pch-dir.c
Log Message:
-----------
[Serialization] Downgrade inconsistent flags from erros to warnings (#115416)
There were many many "voices" about the too strict flags checking in
modules. Although they rarely challenge this, maybe due to they respect
to the compiler implementation details. But from my point of view, there
are cases it is "fine" to have different flags. Especially we're too
conservative to mark almost language options in
`clang/include/clang/Basic/LangOptions.def` as incompatible options (see
the comments in the front of the file).
In my understanding, this should come from PCH initially since it is
natural to ask your headers to be compiled with the same flags with your
TU. And then, when Apple and Google goes to implement clang module, they
don't challenge it too since they have a closed world where they have a
strong control over the ecosystem so that they can make it consistent.
Yes, consistency is great and ODR violation are awful. But this is the
world we're living today. This is the C++'s ecosystem in the open ended
world. Image a situation that we're using a third party module and we
add a new option to our library, then the build bails out! THIS IS SUPER
ANNOYING. And makes it non practical to make a modular C++ ecosystem.
(
This was discussed many times in SG15. And the consensus is, the build
systems should generate different BMI based on different flags. But this
manner can't avoid ODR violation completely and it would add the times
of module files that need to be built, which may kill the benefit of
faster compilation of modules.
However, I think the build systems may need to do the similar things in
the end of the day. Considering libc++'s hardening mechanism
(https://libcxx.llvm.org/Hardening.html). So the conclusion of the
paragraph is, although this seems related to build systems, I think they
are actually unrelated story.
)
I think we should give our users a chance to disable such checks. It is
theoretically unsafe. But we've done our job to tell the users that it
**MAY** be bad. Then I feel it is C++-ish to give users more freedom
even if they may shoot their foot.
This shouldn't change any thing. Users who want previous behavior can
get it easily by `-Werror=`.
Commit: 4a7dbede6badd27ce2ad07984134d5d25a2bbada
https://github.com/llvm/llvm-project/commit/4a7dbede6badd27ce2ad07984134d5d25a2bbada
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Support `svukte` extension (#115657)
This is the extension for "Address-Independent Latency of User-Mode
Faults to Supervisor Addresses".
Spec: https://github.com/riscv/riscv-isa-manual/pull/1564,
https://lf-riscv.atlassian.net/browse/RVS-2977
The spec states that the `svukte` depends on `sv39`, but we don't have
`sv39` yet, so I didn't add it to the implied list.
Commit: 99de065b850b6e1c5461325998a40c6925d7ee9e
https://github.com/llvm/llvm-project/commit/99de065b850b6e1c5461325998a40c6925d7ee9e
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/lib/Serialization/ASTReader.cpp
M clang/test/Modules/explicit-build-missing-files.cpp
M clang/test/Modules/load_failure.c
M clang/test/Modules/mismatch-diagnostics.cpp
M clang/test/Modules/module-feature.m
M clang/test/Modules/pr62359.cppm
M clang/test/Modules/prebuilt-implicit-modules.m
M clang/test/PCH/arc.m
M clang/test/PCH/no-validate-pch.cl
M clang/test/PCH/pch-dir.c
Log Message:
-----------
Revert "[Serialization] Downgrade inconsistent flags from erros to warnings (#115416)"
This reverts commit 74449ab86b8bc8d7388ede0cc7fc3a679da0c567.
See the post commit message in
https://github.com/llvm/llvm-project/pull/115416
Commit: 512defe603dd0c82fb49bc6a3e1e8481ac0f6f9e
https://github.com/llvm/llvm-project/commit/512defe603dd0c82fb49bc6a3e1e8481ac0f6f9e
Author: antangelo <contact at antangelo.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
Log Message:
-----------
[NFC][GISel][AArch64] Pre-commit baseline tests for translation of @llvm.expect.with.probability (#117842)
Pre-commit of tests for generic GlobalISel translation of
`@llvm.expect.with.probability` for when optimizations are not enabled
Commit: 301c8e60474e09e0e537316cef6218c14562a9b9
https://github.com/llvm/llvm-project/commit/301c8e60474e09e0e537316cef6218c14562a9b9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Add support for v_cvt_scalef32_sr instructions (#117820)
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: 265e209ceba8c330403d77f46a33b8e138c5633f
https://github.com/llvm/llvm-project/commit/265e209ceba8c330403d77f46a33b8e138c5633f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.ll
Log Message:
-----------
AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_{bf8|fp8}_{f16|bf16|f32} (#117821)
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: 142b33c58b26aae4d27f3f063eb492256beda3a6
https://github.com/llvm/llvm-project/commit/142b33c58b26aae4d27f3f063eb492256beda3a6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
Log Message:
-----------
AMDGPU: Allocate different registers for vdst & src in v_cvt_scalef32* (#117822)
For multipass instructions, overlap on VDST and SRC’s
would result in HW race & undefined results.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 62dc8f3069cb08f9c955435e03a30c59228c6bb6
https://github.com/llvm/llvm-project/commit/62dc8f3069cb08f9c955435e03a30c59228c6bb6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
Log Message:
-----------
AMDGPU: Add builtins & codegen support for bitop3_b{16|32} of gfx950. (#117823)
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Commit: 561565720954a2de31ac8dfdb4fdd02ce1780030
https://github.com/llvm/llvm-project/commit/561565720954a2de31ac8dfdb4fdd02ce1780030
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.ll
Log Message:
-----------
AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instructions (#117824)
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: a2c3e0c4cb08e9cf26f4a745777295e1eb562e1b
https://github.com/llvm/llvm-project/commit/a2c3e0c4cb08e9cf26f4a745777295e1eb562e1b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-gfx940-err.cl
A clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
Log Message:
-----------
AMDGPU/clang: Add global_load_lds size check support for gfx950 (#117825)
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: d9c4e9ffe78c34db247b164aa46eea2625b08d3a
https://github.com/llvm/llvm-project/commit/d9c4e9ffe78c34db247b164aa46eea2625b08d3a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/MC/AMDGPU/mai-gfx950-err.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Verify f8f6f4 formats in assembler (#117826)
Verify the register widths of the corresponding operands match
the floating point format expected size.
Commit: 61a23646c977f5530829742fdf5b901b7d9815a2
https://github.com/llvm/llvm-project/commit/61a23646c977f5530829742fdf5b901b7d9815a2
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/test/CodeGen/ARM/sjljehprepare-lower-empty-struct.ll
A llvm/test/CodeGen/Generic/sjlj-eh-prepare.ll
M llvm/test/CodeGen/VE/Scalar/builtin_sjlj_callsite.ll
M llvm/test/CodeGen/VE/Scalar/builtin_sjlj_landingpad.ll
M llvm/test/CodeGen/X86/indirect-branch-tracking-eh2.ll
M llvm/test/CodeGen/X86/sjlj-eh.ll
Log Message:
-----------
[SjLjEHPrepare] Configure call sites correctly (#117656)
After 9fe78db4, the pass inserts `store volatile i32 -1, ptr %call_site`
before all invoke instruction except the one in the entry block, which
has the effect of bypassing landing pads on exceptions.
When configuring the call site for a potentially throwing instruction
check that it is not `InvokeInst` -- they are handled by earlier code.
Commit: bc1e0c53a281822e08df89a02b02b6b0db222087
https://github.com/llvm/llvm-project/commit/bc1e0c53a281822e08df89a02b02b6b0db222087
Author: Josh Stone <jistone at redhat.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M compiler-rt/test/profile/Linux/binary-id-offset.c
Log Message:
-----------
[profile] Make the binary-id-offset.c test more robust (#117647)
Using a `--section-start` address in the test was causing link errors on
some targets. Now it uses a linker script to move the note after `.bss`,
which should still have the kind of memory offset we're looking for.
This is a follow-up to #114907 to fix buildbot errors.
Commit: 0d15d46362bd6ab5a9a2165805adaab13a7689f4
https://github.com/llvm/llvm-project/commit/0d15d46362bd6ab5a9a2165805adaab13a7689f4
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGen/bounds-checking.c
M clang/test/CodeGen/catch-undef-behavior.c
M clang/test/CodeGen/ubsan-trap-merge.c
M llvm/test/CodeGen/X86/ubsan-trap-merge.ll
M llvm/test/CodeGen/X86/ubsan-trap-nomerge.ll
Log Message:
-----------
[ubsan] Change ubsan-unique-traps to use nomerge instead of counter (#117651)
https://github.com/llvm/llvm-project/pull/65972 (continuation of
https://reviews.llvm.org/D148654) had considered adding nomerge to
ubsantrap, but did not proceed with that because of
https://github.com/llvm/llvm-project/issues/53011. Instead, it added a
counter (based on TrapBB->getParent()->size()) to each ubsantrap call.
However, this counter is not guaranteed to be unique after inlining, as
shown by https://github.com/llvm/llvm-project/pull/83470, which can
result in ubsantraps being merged by the backend.
https://github.com/llvm/llvm-project/pull/101549 has since fixed the
nomerge limitation ("It sets nomerge flag for the node if the
instruction has nomerge arrtibute."). This patch therefore takes
advantage of nomerge instead of using the counter, guaranteeing that the
ubsantraps are not merged.
This patch is equivalent to
https://github.com/llvm/llvm-project/pull/83470 but also adds nomerge
and updates tests (https://github.com/llvm/llvm-project/pull/117649:
ubsan-trap-merge.c; https://github.com/llvm/llvm-project/pull/117657:
ubsan-trap-merge.ll, ubsan-trap-nomerge.ll; catch-undef-behavior.c).
Commit: 40d0058e6ad16d4716192a0e331ac58a6ed9def3
https://github.com/llvm/llvm-project/commit/40d0058e6ad16d4716192a0e331ac58a6ed9def3
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
A llvm/include/llvm/IR/NVVMIntrinsicFlags.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
Log Message:
-----------
[NVPTX] Add TMA bulk tensor reduction intrinsics (#116854)
This patch adds NVVM intrinsics and NVPTX codegen for:
* cp.async.bulk.tensor.reduce.1D -> 5D variants, supporting both Tile
and Im2Col modes.
* These intrinsics optionally support cache_hints as indicated by the
boolean flag argument.
* Lit tests are added for all combinations of these intrinsics in
cp-async-bulk-tensor-reduce.ll.
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst file.
PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-reduce-async-bulk-tensor
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 24eb2ae0a1803f0279facaca50001a1900d6bb85
https://github.com/llvm/llvm-project/commit/24eb2ae0a1803f0279facaca50001a1900d6bb85
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
Log Message:
-----------
[NVPTX] Fix a warning
This patch fixes:
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp:452:3:
error: default label in switch which covers all enumeration values
[-Werror,-Wcovered-switch-default]
Commit: 6934870a134ce9000752f0613295596fb876e5c6
https://github.com/llvm/llvm-project/commit/6934870a134ce9000752f0613295596fb876e5c6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
Log Message:
-----------
AMDGPU: Remove FeatureCvtFP8VOP1Bug from gfx950 (#117827)
Commit: b4a16a78c2626d56864d4d6c0f9b2779e293914a
https://github.com/llvm/llvm-project/commit/b4a16a78c2626d56864d4d6c0f9b2779e293914a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/bitop3.ll
Log Message:
-----------
AMDGPU: Match and Select BITOP3 on gfx950 (#117843)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 53c0a25db7a0469f6d47e130d5a0e8f7a88b9585
https://github.com/llvm/llvm-project/commit/53c0a25db7a0469f6d47e130d5a0e8f7a88b9585
Author: tangaac <tangyan01 at loongson.cn>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem-div32.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
Log Message:
-----------
[LoongArch] Use div.w/mod.w to eliminate unnecessary sign-extend for sdiv/srem i32. (#117298)
Commit: 3618c9930f70b13b4e678ac04cb9f813056d560c
https://github.com/llvm/llvm-project/commit/3618c9930f70b13b4e678ac04cb9f813056d560c
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[MISched] Use right boundary when trying latency heuristics (#116592)
We may do bottom-up or bidirectional scheduling but previously we
assume we are doing top-down scheduling, which may cause some issues.
Commit: 6c7b988e64b60cff7e9f3777dfcc2b2511ee48c6
https://github.com/llvm/llvm-project/commit/6c7b988e64b60cff7e9f3777dfcc2b2511ee48c6
Author: 루밀LuMir <rpfos at naver.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M clang/tools/clang-format/git-clang-format
Log Message:
-----------
[clang-format] Add mjs to default_extensions in git-clang-format (#117730)
Commit: 50dfb0772b3995c6e5543600b2813f56d0736442
https://github.com/llvm/llvm-project/commit/50dfb0772b3995c6e5543600b2813f56d0736442
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV] Support f32/f64 libcalls for sin/cos/pow/log/log2/log10/exp/exp2
Test cases copied from SelectionDAG.
Commit: c00e53208db638c35499fc80b555f8e14baa35f0
https://github.com/llvm/llvm-project/commit/c00e53208db638c35499fc80b555f8e14baa35f0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-26 (Tue, 26 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Add YAML-based deserialization for MemProf profile (#117829)
This patch adds YAML-based deserialization for MemProf profile.
It's been painful to write tests for MemProf passes because we do not
have a text format for the MemProf profile. We would write a test
case in C++, run it for a binary MemProf profile, and then finally run
a test written in LLVM IR with the binary profile.
This patch paves the way toward YAML-based MemProf profile.
Specifically, it adds new class YAMLMemProfReader derived from
MemProfReader. For now, it only adds a function to parse StringRef
pointing to YAML data. Subseqeunt patches will wire it to
llvm-profdata and read from a file.
The field names are based on various printYAML functions in MemProf.h.
I'm not aiming for compatibility with the format used in printYAML,
but I don't see a point in changing the field names.
Commit: e636434bdf74cf40071b776ef05aafbf161ce4cd
https://github.com/llvm/llvm-project/commit/e636434bdf74cf40071b776ef05aafbf161ce4cd
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/select-dependence.ll
Log Message:
-----------
[BasicAA][LAA] Don't use same-block phis in cross iteration mode (#116802)
In 4de3184f07fd8c548125d315dd306d4afa7c9698 we exposed BasicAA's
cross-iteration mode for use in LAA, so we can handle selects with equal
conditions correctly (where the select condition is not actually equal
across iterations).
However, if we replace the selects with equivalent phis, the issue still
exists. In the phi case, we effectively still have an assumption that
the condition(s) that control which phi arg is used will be the same
across iterations. Fix this by disabling this phi handling in
cross-iteration mode.
(I'm not entirely sure whether this is also needed when BasicAA enables
cross-iteration mode during internal phi recursion, but I wouldn't be
surprised if that's the case.)
Commit: 204d7153629db22c44a313733a5469cd6f7056df
https://github.com/llvm/llvm-project/commit/204d7153629db22c44a313733a5469cd6f7056df
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector] Add more tests for ConvertVectorToLLVM (11/n) (#117160)
Adds tests with scalable vectors for the Vector-To-LLVM conversion pass.
Covers the following Ops:
* `vector.splat`.
In addition:
* Removed `@make_fixed_vector_of_scalable_vect`, which duplicated
`@broadcast_vec2d_from_scalar_scalable` (and wasn't grouped with other
tests for `vector.broadcast`).
* Moved `@vector_bitcast_2d` near other tests for `vector.bitcast` and
added a variant with scalable vectors.
Commit: 4dfa0216ba7849fde270f27e2358d4327fac988d
https://github.com/llvm/llvm-project/commit/4dfa0216ba7849fde270f27e2358d4327fac988d
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/bstring.cpp
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
M clang/test/Analysis/string.c
M clang/test/Analysis/string.cpp
A clang/test/Analysis/string_notnullterm.c
Log Message:
-----------
[clang][analyzer] Bring checker 'alpha.unix.cstring.NotNullTerminated' out of alpha (#113899)
Commit: 072387042021b0f74c24c617b940fe8157f9f1a5
https://github.com/llvm/llvm-project/commit/072387042021b0f74c24c617b940fe8157f9f1a5
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/Socket.h
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/unittests/Host/MainLoopTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.cpp
M lldb/unittests/tools/lldb-server/tests/TestClient.cpp
Log Message:
-----------
[lldb] Add timeout argument to Socket::Accept (#117691)
Allows us to stop waiting for a connection if it doesn't come in a
certain amount of time. Right now, I'm keeping the status quo (infitnite
wait) in the "production" code, but using smaller (finite) values in
tests. (A lot of these tests create "loopback" connections, where a
really short wait is sufficient: on linux at least even a poll (0s wait)
is sufficient if the other end has connect()ed already, but this doesn't
seem to be the case on Windows, so I'm using a 1s wait in these cases).
Commit: e8a01e75e6b17e84710e7cc3bfb70d95a3a696a2
https://github.com/llvm/llvm-project/commit/e8a01e75e6b17e84710e7cc3bfb70d95a3a696a2
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M lldb/include/lldb/Symbol/Block.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/Function.cpp
Log Message:
-----------
[lldb] Make sure Blocks always have a parent (#117683)
It's basically true already (except for a brief time during
construction). This patch makes sure the objects are constructed with a
valid parent and enforces this in the type system, which allows us to
get rid of some nullptr checks.
Commit: 7e312c3b90cad9358d863b9b74de75d4da632845
https://github.com/llvm/llvm-project/commit/7e312c3b90cad9358d863b9b74de75d4da632845
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
Revert "[memprof] Add YAML-based deserialization for MemProf profile (#117829)"
This reverts commit c00e53208db638c35499fc80b555f8e14baa35f0.
It looks like this breaks building LLVM on macOS and some other
platform/compiler combos
https://lab.llvm.org/buildbot/#/builders/23/builds/5252
https://green.lab.llvm.org/job/llvm.org/job/clang-san-iossim/5356/console
In file included from /Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/lib/ProfileData/MemProfReader.cpp:34:
In file included from /Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/include/llvm/ProfileData/MemProfReader.h:24:
In file included from /Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/include/llvm/ProfileData/InstrProfReader.h:22:
In file included from /Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/include/llvm/ProfileData/InstrProfCorrelator.h:21:
/Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/include/llvm/Support/YAMLTraits.h:1173:36: error: implicit instantiation of undefined template 'llvm::yaml::MissingTrait<unsigned long>'
char missing_yaml_trait_for_type[sizeof(MissingTrait<T>)];
^
/Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/include/llvm/Support/YAMLTraits.h:961:7: note: in instantiation of function template specialization 'llvm::yaml::yamlize<unsigned long>' requested here
yamlize(*this, Val, Required, Ctx);
^
/Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/include/llvm/Support/YAMLTraits.h:883:11: note: in instantiation of function template specialization 'llvm::yaml::IO::processKey<unsigned long, llvm::yaml::EmptyContext>' requested here
this->processKey(Key, Val, true, Ctx);
^
/Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/include/llvm/ProfileData/MIBEntryDef.inc:55:1: note: in instantiation of function template specialization 'llvm::yaml::IO::mapRequired<unsigned long>' requested here
MIBEntryDef(AccessHistogram = 27, AccessHistogram, uintptr_t)
^
/Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/lib/ProfileData/MemProfReader.cpp:77:8: note: expanded from macro 'MIBEntryDef'
Io.mapRequired(KeyStr.str().c_str(), MIB.Name); \
^
/Users/ec2-user/jenkins/workspace/llvm.org/clang-san-iossim/llvm-project/llvm/include/llvm/Support/YAMLTraits.h:310:8: note: template is declared here
struct MissingTrait;
^
1 error generated.
Commit: 17b87853c3b07b8e1c7f000c3818efab7fdd8883
https://github.com/llvm/llvm-project/commit/17b87853c3b07b8e1c7f000c3818efab7fdd8883
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M lldb/source/Host/windows/MainLoopWindows.cpp
Log Message:
-----------
[lldb] Fix premature MainLoop wakeup on windows (#117756)
The windows system APIs only take milliseconds. Make sure we round the
sleep interval (in nanoseconds) upwards.
Commit: 427be0767523b6e0f4004a421892f463d62446ac
https://github.com/llvm/llvm-project/commit/427be0767523b6e0f4004a421892f463d62446ac
Author: tangaac <tangyan01 at loongson.cn>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mlamcas.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
A llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-lamcas.ll
A llvm/test/Transforms/AtomicExpand/LoongArch/atomicrmw-expand.ll
Log Message:
-----------
[LoongArch] Support amcas[_db].{b/h/w/d} instructions. (#114189)
Two options for clang: -mlamcas & -mno-lamcas.
Enable or disable amcas[_db].{b/h} instructions.
The default is -mno-lamcas.
Only works on LoongArch64.
Commit: eb001820b47176fc3e7bc643525c6352b76dcd1d
https://github.com/llvm/llvm-project/commit/eb001820b47176fc3e7bc643525c6352b76dcd1d
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/temp/temp.deduct.guide/p3.cpp
Log Message:
-----------
[Clang] prevent errors for deduction guides using deduced type aliases (#117450)
Fixes #54909
---
Clang incorrectly produces diagnostics for alias templates in deduction
guides, treating them as separate from their underlying types. This
issue arises because Clang doesn't properly handle
`TypeAliasTemplateDecl` when comparing template names for equality in
the context of deduction guides, resulting in diagnostics that don't
align with the C++ standard. As the C++ standard specifies - _an alias
template is considered a synonym for its underlying type_
With this change, Clang now correctly resolves alias templates to their
underlying types in deduction guides, ensuring compliance with the C++
standard.
Commit: 74392bde2e603c8ca3f0956d4c55ba181fe9989b
https://github.com/llvm/llvm-project/commit/74392bde2e603c8ca3f0956d4c55ba181fe9989b
Author: Maurice Heumann <MauriceHeumann at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/Headers/intrin.h
Log Message:
-----------
[X86] Consistently use __inline__ keyword in intrin.h (#117856)
Using `inline` instead of `__inline__` may cause duplicate symbol errors in some scenarios.
This fixes #117854
Commit: 712ef7d0baf9b7b6c2a3f01f0c02305a0e0160e9
https://github.com/llvm/llvm-project/commit/712ef7d0baf9b7b6c2a3f01f0c02305a0e0160e9
Author: David Green <david.green at arm.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
Log Message:
-----------
[AArch64][GlobalISel] Fix smull and umull intrinsics.
These were the wrong way around somehow, with aarch64_neon_umull being converted
to G_SMULL.
Commit: 345b3319c8544a0124aed9602c31f8793228ab63
https://github.com/llvm/llvm-project/commit/345b3319c8544a0124aed9602c31f8793228ab63
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
Log Message:
-----------
[AMDGPU][SplitModule] Fix unintentional integer division (#117586)
A static analysis tool warned that a division was always being performed
in integer division, so was either 0.0 or 1.0.
This doesn't seem intentional, so has been fixed to return a true ratio
using floating-point division. This in turn showed a bug where a
comparison against this ratio was incorrect.
Commit: 1fccba5ca1997db13cfa88f788b7acb8cc300b48
https://github.com/llvm/llvm-project/commit/1fccba5ca1997db13cfa88f788b7acb8cc300b48
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/ptrauth-call.ll
Log Message:
-----------
[AArch64][PAC] Eliminate excessive MOVs when computing blend (#115185)
As function calls do not generally preserve X16 and X17, it is beneficial
to allow AddrDisc operand of BLRA instruction to reside in these
registers and make use of this condition when computing the
discriminator.
This can save up to two MOVs in cases such as loading a (signed) virtual
function pointer via a (signed) pointer to vtable, for example
ldr x9, [x16]
mov x8, x16
mov x17, x8
movk x17, #34646, lsl #48
blraa x9, x17
can be simplified to
ldr x8, [x16]
movk x16, #34646, lsl #48
blraa x8, x16
Commit: c979ec05642f292737d250c6682d85ed49bc7b6e
https://github.com/llvm/llvm-project/commit/c979ec05642f292737d250c6682d85ed49bc7b6e
Author: Callum Fare <callum at codeplay.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
A offload/liboffload/API/APIDefs.td
A offload/liboffload/API/CMakeLists.txt
A offload/liboffload/API/Common.td
A offload/liboffload/API/Device.td
A offload/liboffload/API/OffloadAPI.td
A offload/liboffload/API/Platform.td
A offload/liboffload/API/README.md
A offload/liboffload/CMakeLists.txt
A offload/liboffload/README.md
A offload/liboffload/exports
A offload/liboffload/include/OffloadImpl.hpp
A offload/liboffload/include/generated/OffloadAPI.h
A offload/liboffload/include/generated/OffloadEntryPoints.inc
A offload/liboffload/include/generated/OffloadFuncs.inc
A offload/liboffload/include/generated/OffloadImplFuncDecls.inc
A offload/liboffload/include/generated/OffloadPrint.hpp
A offload/liboffload/src/Helpers.hpp
A offload/liboffload/src/OffloadImpl.cpp
A offload/liboffload/src/OffloadLib.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/tools/offload-tblgen/default_returns.td
A offload/test/tools/offload-tblgen/entry_points.td
A offload/test/tools/offload-tblgen/functions_basic.td
A offload/test/tools/offload-tblgen/functions_code_loc.td
A offload/test/tools/offload-tblgen/functions_ranged_param.td
A offload/test/tools/offload-tblgen/print_enum.td
A offload/test/tools/offload-tblgen/print_function.td
A offload/test/tools/offload-tblgen/type_tagged_enum.td
A offload/tools/offload-tblgen/APIGen.cpp
A offload/tools/offload-tblgen/CMakeLists.txt
A offload/tools/offload-tblgen/EntryPointGen.cpp
A offload/tools/offload-tblgen/FuncsGen.cpp
A offload/tools/offload-tblgen/GenCommon.hpp
A offload/tools/offload-tblgen/Generators.hpp
A offload/tools/offload-tblgen/PrintGen.cpp
A offload/tools/offload-tblgen/RecordTypes.hpp
A offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
A offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/common/Environment.cpp
A offload/unittests/OffloadAPI/common/Environment.hpp
A offload/unittests/OffloadAPI/common/Fixtures.hpp
A offload/unittests/OffloadAPI/device/olDeviceInfo.hpp
A offload/unittests/OffloadAPI/device/olGetDevice.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
Log Message:
-----------
Reland - [Offload] Introduce offload-tblgen and initial new API implementation (#108413) (#117704)
Relands changes from #108413 - this was reverted due to build issues.
The problem was just that the `offload-tblgen` tool was behind recent
changes to tablegen that ensure `const` records. This has been fixed and
the PR is otherwise identical.
___
### New API
Previous discussions at the LLVM/Offload meeting have brought up the
need for a new API for exposing the functionality of the plugins. This
change introduces a very small subset of a new API, which is primarily
for testing the offload tooling and demonstrating how a new API can fit
into the existing code base without being too disruptive. Exact designs
for these entry points and future additions can be worked out over time.
The new API does however introduce the bare minimum functionality to
implement device discovery for Unified Runtime and SYCL. This means that
the `urinfo` and `sycl-ls` tools can be used on top of Offload. A
(rough) implementation of a Unified Runtime adapter (aka plugin) for
Offload is available
[here](https://github.com/callumfare/unified-runtime/tree/offload_adapter).
Our intention is to maintain this and use it to implement and test
Offload API changes with SYCL.
### Demoing the new API
```sh
# From the runtime build directory
$ ninja LibomptUnitTests
$ OFFLOAD_TRACE=1 ./offload/unittests/OffloadAPI/offload.unittests
```
### Open questions and future work
* Only some of the available device info is exposed, and not all the
possible device queries needed for SYCL are implemented by the plugins.
A sensible next step would be to refactor and extend the existing device
info queries in the plugins. The existing info queries are all strings,
but the new API introduces the ability to return any arbitrary type.
* It may be sensible at some point for the plugins to implement the new
API directly, and the higher level code on top of it could be made
generic, but this is more of a long-term possibility.
Commit: fc5c89900f2a4b50e0f3a88ef7c89115d93684f4
https://github.com/llvm/llvm-project/commit/fc5c89900f2a4b50e0f3a88ef7c89115d93684f4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
A llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll
Log Message:
-----------
[SimpleLoopUnswitch] Fix LCSSA phi node invalidation
Fixes https://github.com/llvm/llvm-project/issues/117537.
Commit: 0cb5846a68cc5c5e519b2c80ab106e7e4fc6eedb
https://github.com/llvm/llvm-project/commit/0cb5846a68cc5c5e519b2c80ab106e7e4fc6eedb
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
R offload/liboffload/API/APIDefs.td
R offload/liboffload/API/CMakeLists.txt
R offload/liboffload/API/Common.td
R offload/liboffload/API/Device.td
R offload/liboffload/API/OffloadAPI.td
R offload/liboffload/API/Platform.td
R offload/liboffload/API/README.md
R offload/liboffload/CMakeLists.txt
R offload/liboffload/README.md
R offload/liboffload/exports
R offload/liboffload/include/OffloadImpl.hpp
R offload/liboffload/include/generated/OffloadAPI.h
R offload/liboffload/include/generated/OffloadEntryPoints.inc
R offload/liboffload/include/generated/OffloadFuncs.inc
R offload/liboffload/include/generated/OffloadImplFuncDecls.inc
R offload/liboffload/include/generated/OffloadPrint.hpp
R offload/liboffload/src/Helpers.hpp
R offload/liboffload/src/OffloadImpl.cpp
R offload/liboffload/src/OffloadLib.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
R offload/test/tools/offload-tblgen/default_returns.td
R offload/test/tools/offload-tblgen/entry_points.td
R offload/test/tools/offload-tblgen/functions_basic.td
R offload/test/tools/offload-tblgen/functions_code_loc.td
R offload/test/tools/offload-tblgen/functions_ranged_param.td
R offload/test/tools/offload-tblgen/print_enum.td
R offload/test/tools/offload-tblgen/print_function.td
R offload/test/tools/offload-tblgen/type_tagged_enum.td
R offload/tools/offload-tblgen/APIGen.cpp
R offload/tools/offload-tblgen/CMakeLists.txt
R offload/tools/offload-tblgen/EntryPointGen.cpp
R offload/tools/offload-tblgen/FuncsGen.cpp
R offload/tools/offload-tblgen/GenCommon.hpp
R offload/tools/offload-tblgen/Generators.hpp
R offload/tools/offload-tblgen/PrintGen.cpp
R offload/tools/offload-tblgen/RecordTypes.hpp
R offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
R offload/unittests/OffloadAPI/CMakeLists.txt
R offload/unittests/OffloadAPI/common/Environment.cpp
R offload/unittests/OffloadAPI/common/Environment.hpp
R offload/unittests/OffloadAPI/common/Fixtures.hpp
R offload/unittests/OffloadAPI/device/olDeviceInfo.hpp
R offload/unittests/OffloadAPI/device/olGetDevice.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
R offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
Log Message:
-----------
Revert "Reland - [Offload] Introduce offload-tblgen and initial new API implementation (#108413) (#117704)"
This reverts commit c979ec05642f292737d250c6682d85ed49bc7b6e.
This showed failures in the post-merge CI.
Commit: f6f2929fc6fa39f62e2c3109b7a1b0f866c1c17b
https://github.com/llvm/llvm-project/commit/f6f2929fc6fa39f62e2c3109b7a1b0f866c1c17b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedBroadwell.td
M llvm/lib/Target/X86/X86SchedHaswell.td
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-avx2.s
Log Message:
-----------
[X86] Fix HSW/BDW masked store schedules
Vector masked stores don't use Port5 or Port 7.
Confirmed by augner/uops.info
Commit: 124b1f8d85af71e512e6dc6250c8bfa370a33d48
https://github.com/llvm/llvm-project/commit/124b1f8d85af71e512e6dc6250c8bfa370a33d48
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedBroadwell.td
M llvm/lib/Target/X86/X86SchedHaswell.td
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-x86_64.s
Log Message:
-----------
[X86] Fix HSW/BDW shift/rotate by CL schedules
This is just Port06 not Port0156 - fixes reported thoughputs
Confirmed by augner/uops.info
Commit: 37aebcf4e60e5c913e3d99675548b3e2c631398b
https://github.com/llvm/llvm-project/commit/37aebcf4e60e5c913e3d99675548b3e2c631398b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedBroadwell.td
M llvm/lib/Target/X86/X86SchedHaswell.td
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSandyBridge.td
M llvm/lib/Target/X86/X86SchedSkylakeClient.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/tools/llvm-mca/X86/Barcelona/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/Barcelona/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse1.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/barrier_output.s
Log Message:
-----------
[X86] Cleanup SFENCE/MFENCE schedules
Remove unnecessary overrides.
UOp + Port usage confirmed by augner/uops.info
Commit: e874c8fc27bbc0e340691d5b5d01c7a1bd365890
https://github.com/llvm/llvm-project/commit/e874c8fc27bbc0e340691d5b5d01c7a1bd365890
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/test/CodeGen/AArch64/selectopt.ll
Log Message:
-----------
[SelectOpt] Refactor to prepare for support more select-like operations (#117582)
* Enables conversion of several select-like instructions within one
group
* Any number of auxiliary instructions depending on the same condition
can be in between select-like instructions
* After splitting the basic block, move select-like instructions into
the relevant basic blocks and optimise them
* Make it easier to add support shift-base select-like instructions and
also any mixture of zext/sext/not instructions
Commit: 7b2a708a27da1cbdf16b912aa2c98e9718256596
https://github.com/llvm/llvm-project/commit/7b2a708a27da1cbdf16b912aa2c98e9718256596
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
M llvm/unittests/AsmParser/AsmParserTest.cpp
Log Message:
-----------
AsmParser: parse zeroinitializer, poison constants (#117809)
LLParser::parseConstantValue is missing support for parsing
zeroinitializer and poison constants. Fix this.
Commit: 284d4e0a7a789848b7af7f85158ccf522d70c6f0
https://github.com/llvm/llvm-project/commit/284d4e0a7a789848b7af7f85158ccf522d70c6f0
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M lldb/unittests/debugserver/RNBSocketTest.cpp
Log Message:
-----------
[lldb] Fix RNBSocketTest for #117691
Commit: 2eb40aadda48e4470bd1bf2cba90a7d593690a6b
https://github.com/llvm/llvm-project/commit/2eb40aadda48e4470bd1bf2cba90a7d593690a6b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/test/Analysis/MemorySSA/loop-unswitch.ll
M llvm/test/Analysis/MemorySSA/pr40037.ll
M llvm/test/Analysis/MemorySSA/pr40749_2.ll
M llvm/test/Analysis/MemorySSA/pr43641.ll
M llvm/test/Analysis/MemorySSA/pr46574.ll
M llvm/test/Analysis/MemorySSA/simple_loop_unswitch_nontrivial.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2006-06-13-SingleEntryPHI.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2006-06-27-DeadSwitchCase.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-05-09-Unreachable.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-05-09-tl.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-07-12-ExitDomInfo.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-07-13-DomInfo.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-07-18-DomInfo.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2008-06-02-DomInfo.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2010-11-18-LCSSA.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2011-06-02-CritSwitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2011-09-26-EHCrash.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2012-04-02-IndirectBr.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2012-05-20-Phi.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2015-09-18-Addrspace.ll
M llvm/test/Transforms/SimpleLoopUnswitch/LIV-loop-condtion.ll
M llvm/test/Transforms/SimpleLoopUnswitch/cleanuppad.ll
M llvm/test/Transforms/SimpleLoopUnswitch/copy-metadata.ll
M llvm/test/Transforms/SimpleLoopUnswitch/crash.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-behavior.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-cost.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-freeze.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-skip-selects-in-guards.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/preserve-analyses.ll
Log Message:
-----------
[SimpleLoopUnswitch] Use loop-mssa in more tests (NFC)
We had a lot of -verify-memoryssa tests that did not actually use
MemorySSA, because they were not using the loop-mssa adaptor.
Commit: f30f7a084c93bb7ef4983cda583985b56ad123d2
https://github.com/llvm/llvm-project/commit/f30f7a084c93bb7ef4983cda583985b56ad123d2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-half-conversions.ll
Log Message:
-----------
[X86] canonicalizeShuffleWithOp - initial support for shuffle(cvt(x),cvt(y)) -> cvt(shuffle(x,y))
Initial support is just for UNPCKL(CVTPH2PS(X),CVTPH2PS(Y)) -> CVTPH2PS(UNPCKL(X,Y))
Making this more general for other shuffles/conversions will have to be done carefully as we have to handle changes in src/dst element width, so I just handled the CVTPH2PS regression case.
Fixes #83414
Commit: dddeec4becabf71d4067080bcc2c09a9e67c3025
https://github.com/llvm/llvm-project/commit/dddeec4becabf71d4067080bcc2c09a9e67c3025
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/ExplodedGraph.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/test/Analysis/copy-elision.cpp
M clang/test/Analysis/cxx-uninitialized-object-unguarded-access.cpp
A clang/test/Analysis/void-call-exit-modelling.c
Log Message:
-----------
[analyzer] Avoid out-of-order node traversal on void return (#117863)
The motivating example: https://compiler-explorer.com/z/WjsxYfs43
```C++
#include <stdlib.h>
void inf_loop_break_callee() {
void* data = malloc(10);
while (1) {
(void)data; // line 3
break; // -> execution continues on line 3 ?!!
}
}
```
To correct the flow steps in this example (see the fixed version in the
added test case) I changed two things in the engine:
- Make `processCallExit` create a new StmtPoint only for return
statements. If the last non-jump statement is not a return statement,
e.g. `(void)data;`, it is no longer inserted in the exploded graph after
the function exit.
- Skip the purge program points. In the example above, purge
points are still inserted after the `break;` executes. Now, when the bug
reporter is looking for the next statement executed after the function
execution is finished, it will ignore the purge program points, so it
won't confusingly pick the `(void)data;` statement.
CPP-5778
Commit: 318c69de52b61d64d5ea113dc2e9f307f7fd4d51
https://github.com/llvm/llvm-project/commit/318c69de52b61d64d5ea113dc2e9f307f7fd4d51
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M bolt/unittests/Core/MCPlusBuilder.cpp
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
M llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
M llvm/test/CodeGen/AArch64/misched-bundle.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/preserve.ll
M llvm/test/CodeGen/AArch64/strpre-str-merge.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryComm-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryCommWithRev-merging.mir
A llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/CMakeLists.txt
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
Reland "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)"
The issue with slow compile-time was caused by an assert in
AArch64RegisterInfo.cpp. The assert invokes 'checkAllSuperRegsMarked'
after adding all the reserved registers. This call gets very expensive
after adding the _HI registers due to the way the function searches
in the 'Exception' list, which is expected to be a small list but isn't
(the patch added 190 _HI regs).
It was possible to rewrite the code in such a way that the _HI registers
are marked as reserved after the check. This makes the problem go away
entirely and restores compile-time to what it was before (tested for
`check-runtimes`, which previously showed a ~5x slowdown).
This reverts commits:
1434d2ab215e3ea9c5f34689d056edd3d4423a78
2704647fb7986673b89cef1def729e3b022e2607
Commit: 66126c350f45617c10274cc36828bb1ec7ddbae4
https://github.com/llvm/llvm-project/commit/66126c350f45617c10274cc36828bb1ec7ddbae4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port 318c69de52b6
Commit: a807bbea6f48b368388cd796782724e3a53f58a0
https://github.com/llvm/llvm-project/commit/a807bbea6f48b368388cd796782724e3a53f58a0
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/GPUToLLVMSPV/CMakeLists.txt
M mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
M mlir/test/Conversion/GPUToLLVMSPV/gpu-to-llvm-spv.mlir
Log Message:
-----------
[MLIR][GPUToLLVMSPV] Use `llvm.func` attributes to convert `gpu.shuffle` (#116967)
Use `llvm.func`'s `intel_reqd_sub_group_size` attribute instead of
SPIR-V environment attributes in the `gpu.shuffle` conversion pattern.
This metadata is needed to check the semantics of the operation are
supported, i.e., it has a constant width and its value is equal to the
sub-group size.
As the pass also converts `gpu.func` to `llvm.func`, adding a
discardable attribute of name `intel_reqd_sub_group_size` attribute to
the latter is enough for this pattern to work.
We no longer have a notion of "default" sub-group size, so this
attribute needs to be set in the parent function for `gpu.shuffle`
operations to be converted.
Drop dependency on the SPIR-V dialect as we no longer require creating
attributes from this dialect to lower `gpu.shuffle` instances.
---------
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 89b31c9c32f2cd2c038fe2b12d9c66a53c779fc1
https://github.com/llvm/llvm-project/commit/89b31c9c32f2cd2c038fe2b12d9c66a53c779fc1
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/declare-target-interface.f90
Log Message:
-----------
[Flang][OpenMP] Fix a crash for declare target in an interface (#117709)
This is a point fix for the crash in #116426. Leaving the bug open to
further explore declare target issues for interfaces.
Commit: 5eeb3fef61bf5542c3fdcb71622fc4e826527789
https://github.com/llvm/llvm-project/commit/5eeb3fef61bf5542c3fdcb71622fc4e826527789
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
R clang-tools-extra/CODE_OWNERS.TXT
A clang-tools-extra/Maintainers.txt
Log Message:
-----------
Rename CODE_OWNERS -> Maintainers (#114544)
Commit: 43ee6f7a01fca8cf08e1029c54acc23240b86fca
https://github.com/llvm/llvm-project/commit/43ee6f7a01fca8cf08e1029c54acc23240b86fca
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
Log Message:
-----------
[AlwaysInline] Avoid unnecessary BFI fetches (#117750)
AlwaysInliner doesn't use BFI itself, it only updates it. If BFI is not
already computed, it will spend time to first compute it, and then
update it. This is not necessary: If BFI is not available in the first
place, there is no need to update it.
This is mainly relevant in debug builds for IR that has a lot of
alwaysinline functions.
Commit: 8d6c73cbf53bd6eb410ac08836e7b128d4a99a16
https://github.com/llvm/llvm-project/commit/8d6c73cbf53bd6eb410ac08836e7b128d4a99a16
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-deviceptr-ast.cpp
A clang/test/SemaOpenACC/combined-construct-deviceptr-clause.c
A clang/test/SemaOpenACC/combined-construct-deviceptr-clause.cpp
Log Message:
-----------
[OpenACC] enable 'deviceptr' for combined constructs.
This is another clause whose implementation is identical for combined
constructs as with compute constructs, so this adds tests and enables
it.
Commit: 198fb5ed4ac7d096da03ea4a0a27832d18b1350f
https://github.com/llvm/llvm-project/commit/198fb5ed4ac7d096da03ea4a0a27832d18b1350f
Author: Samira Bazuzi <bazuzi at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/unittests/Analysis/FlowSensitive/ASTOpsTest.cpp
Log Message:
-----------
[clang][dataflow] Add captured parameters to ReferencedDecls for lamb… (#117771)
…da call operators.
This doesn't require that they be used in the operator's body, unlike
other ReferencedDecls. This is most obviously different from captured
local variables, which can be captured but will not appear in
ReferencedDecls unless they appear in the operator's body.
This difference simplifies the collection of the captured parameters,
but probably could be eliminated if desirable.
Commit: f67ba5855278401728413431216dda5d370ac2e0
https://github.com/llvm/llvm-project/commit/f67ba5855278401728413431216dda5d370ac2e0
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/Modules/compare-record.c
M clang/test/Modules/odr_hash.cpp
Log Message:
-----------
[Clang] replace 'bitfield' with 'bit-field' for consistency (#117881)
Fixes #117711
Commit: 38049dc8eef0dca7e82c25e4012228a9a135e255
https://github.com/llvm/llvm-project/commit/38049dc8eef0dca7e82c25e4012228a9a135e255
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/integration/startup/gpu/CMakeLists.txt
A libc/test/integration/startup/gpu/rpc_lane_test.cpp
M libc/utils/gpu/loader/amdgpu/CMakeLists.txt
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
Log Message:
-----------
[libc] Handle differing wavefront sizes correctly in the AMDHSA loader (#117788)
Summary:
The AMDGPU backend can handle wavefront sizes of 32 and 64, with the
native hardware preferring one or the other. The user can override the
hardware with `-mwavefrontsize64` or `-mwavefrontsize32` which
previously wasn't handled. We need to know the wavefront size to know
how much memory to allocate and how to index the RPC buffer. There isn't
a good way to do this with ROCm so we just use the LLVM support for
offloading to check this from the image.
Commit: 32ff209b87a84890a1487b4e0bbb4a7645d31645
https://github.com/llvm/llvm-project/commit/32ff209b87a84890a1487b4e0bbb4a7645d31645
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Analysis/Consumed.cpp
M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp
Log Message:
-----------
[Clang] skip consumed analysis for consteval conditions in control-flow terminators (#117403)
Fixes #117385
---
These changes extend the work done in #116513. The changes add
additional handling to ensure correct behavior by skipping further
checks when a **CFG** contains a `consteval` condition, where no
_explicit expression_ is present, which is required to proceed with
consumed analyses.
Commit: e98396f4846bfcaabe2c2ee568aab4b78655f307
https://github.com/llvm/llvm-project/commit/e98396f4846bfcaabe2c2ee568aab4b78655f307
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
Reapply [memprof] Add YAML-based deserialization for MemProf profile (#117829)
This patch adds YAML-based deserialization for MemProf profile.
It's been painful to write tests for MemProf passes because we do not
have a text format for the MemProf profile. We would write a test
case in C++, run it for a binary MemProf profile, and then finally run
a test written in LLVM IR with the binary profile.
This patch paves the way toward YAML-based MemProf profile.
Specifically, it adds new class YAMLMemProfReader derived from
MemProfReader. For now, it only adds a function to parse StringRef
pointing to YAML data. Subseqeunt patches will wire it to
llvm-profdata and read from a file.
The field names are based on various printYAML functions in MemProf.h.
I'm not aiming for compatibility with the format used in printYAML,
but I don't see a point in changing the field names.
This iteration works around the unavailability of
ScalarTraits<uintptr_t> on macOS.
Commit: 611f5b8ff913c21cfd85b0f4170ab880838a4c9e
https://github.com/llvm/llvm-project/commit/611f5b8ff913c21cfd85b0f4170ab880838a4c9e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
A llvm/test/Transforms/GVN/setjmp.ll
Log Message:
-----------
[GVN] Add test for #116668 (NFC)
Commit: d668304998344d40c5a0b512fd0c0cb91e8d534c
https://github.com/llvm/llvm-project/commit/d668304998344d40c5a0b512fd0c0cb91e8d534c
Author: Carlo Cabrera <github at carlo.cab>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Options.td
M lld/MachO/Writer.cpp
R lld/test/MachO/Inputs/liballowable_client.dylib
M lld/test/MachO/allowable-client.s
Log Message:
-----------
[lld][MachO] Support `-allowable_client` (#117155)
Closes #117113.
Follow-up to #114638.
Commit: 969b7658fe34cf7638e1385d813e765a4c61dfc7
https://github.com/llvm/llvm-project/commit/969b7658fe34cf7638e1385d813e765a4c61dfc7
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
Log Message:
-----------
[OpenACC] Enable 'wait' for combined constructs
Once again a situation where the combined and compute do the exact same
thing as far as Sema/AST/etc is concerned, so this patch adds tests and
enables it.
Commit: 24593f1814dc02c7404526674838ccfb1c61d780
https://github.com/llvm/llvm-project/commit/24593f1814dc02c7404526674838ccfb1c61d780
Author: Saleem Abdulrasool <compnerd at compnerd.org>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
Log Message:
-----------
[lldb] build: cleanup extraneous include paths (#117615)
Clean up some unnecessary include paths. The use of `LibXml2::LibXml2`
with `target_link_libraries` on `libLLDBHost` ensures that the header
search path is properly propagated.
Commit: 8358437bbb5b06d9aebc2940475a5a4d86c091c9
https://github.com/llvm/llvm-project/commit/8358437bbb5b06d9aebc2940475a5a4d86c091c9
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/tools/clang-repl/ClangRepl.cpp
Log Message:
-----------
[clang-repl]: Print stack-trace on crash (#117896)
Call `llvm::sys::PrintStackTraceOnErrorSignal` at the start of main to
1. Print a strack trace on crash
2. Disable the assertion failed popup in Windows Debug Builds
Other tools (for example clang-check or clang-query) already do this.
This fixes debug build bots on windows hanging (waiting for the popup to
be dismissed) and ultimately getting terminated due to timeout.
Commit: b71704436e61057a5bd6426915c368e5d76cb7de
https://github.com/llvm/llvm-project/commit/b71704436e61057a5bd6426915c368e5d76cb7de
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Simplify generated code for validateOperandClass (#117889)
Implement the register operand handling in validateOperandClass with a
table lookup instead of a potentially huge switch.
Part of the motivation for this is improving compile time when clang-18
is used as a host compiler, since it seems to have trouble with very
large switch statements.
Commit: 2f02b5af6ecb973d3a7faad9b0daff22646e724d
https://github.com/llvm/llvm-project/commit/2f02b5af6ecb973d3a7faad9b0daff22646e724d
Author: Nicolas van Kempen <nvankemp at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStartsEndsWithCheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/string
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-starts-ends-with.cpp
Log Message:
-----------
[clang-tidy][modernize-use-starts-ends-with] Fix operator rewriting false negative (#117837)
In C++20, `operator!=` can be rewritten by negating `operator==`. This
is the case for `std::string`, where `operator!=` is not provided hence
relying on this rewriting.
Cover this case by matching `binaryOperation` and adding one case to
`isNegativeComparison`.
Commit: 1e3e199ed9f214594e358eb0c7892cdedc703f7a
https://github.com/llvm/llvm-project/commit/1e3e199ed9f214594e358eb0c7892cdedc703f7a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
Log Message:
-----------
[Sema] Migrate away from PointerUnion::{is,get} (NFC) (#117498)
Note that PointerUnion::{is,get} have been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
I'm not touching PointerUnion::dyn_cast for now because it's a bit
complicated; we could blindly migrate it to dyn_cast_if_present, but
we should probably use dyn_cast when the operand is known to be
non-null.
Commit: c29e895ad2bce8ca36debd8ef09d0540dabc99b6
https://github.com/llvm/llvm-project/commit/c29e895ad2bce8ca36debd8ef09d0540dabc99b6
Author: knickish <knickish at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/M68k/M68kInstrData.td
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kRegisterInfo.h
A llvm/test/CodeGen/M68k/Control/non-cmov-switch.ll
Log Message:
-----------
[M68k] Handle 16 bit MOVs to and from CCR (#114714)
Builds on @TechnoElf 's CCR MOV pr
https://github.com/llvm/llvm-project/pull/107591 and adds some tests.
Fixes https://github.com/llvm/llvm-project/issues/106210.
---------
Co-authored-by: TechnoElf <technoelf at undertheprinter.com>
Commit: 991154d0fbc951e2b999589a95dabc7deff7acd1
https://github.com/llvm/llvm-project/commit/991154d0fbc951e2b999589a95dabc7deff7acd1
Author: Krzysztof Pszeniczny <kpszeniczny at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionImport.cpp
Log Message:
-----------
[LTO] Use .at instead of .lookup to avoid copies. (NFC) (#117888)
`DenseMap::lookup` returns by value (because it default-creates the
returned value if the key isn't present in the map), which means that we
do a lot of copying here. Since we assert that something is present in
the returned value two lines below this call, it's safe to use `.at`
here instead.
Copying and then destroying dense maps here is responsible for 60% of
the time spent in LTO indexing in a large internal build.
Commit: b185b8512b2c7bf92ba87ea260a7b94d71dec4ee
https://github.com/llvm/llvm-project/commit/b185b8512b2c7bf92ba87ea260a7b94d71dec4ee
Author: Bill Wendling <morbo at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/Sema/builtin-counted-by-ref.c
Log Message:
-----------
[Clang] Improve Sema diagnostic performance for __builtin_counted_by_ref (#116719)
Implement the sema checks with a placeholder. We then check for that
placeholder in all of the places we care to emit a diagnostic.
Fixes: #115520
Commit: a4751804985554815899b5dc1544e27139bacdc4
https://github.com/llvm/llvm-project/commit/a4751804985554815899b5dc1544e27139bacdc4
Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstrP10.td
A llvm/test/CodeGen/PowerPC/vcmp-setbc-quad.ll
A llvm/test/CodeGen/PowerPC/vcmp-setbc.ll
Log Message:
-----------
[PowerPC] Use setbc for values from vector compare conditions (#114858)
For P10 use the setbc instruction to get int values from vector compare
summary condition results.
Commit: 9d55e862d938c17a5e3f970326139c53b9aaf37e
https://github.com/llvm/llvm-project/commit/9d55e862d938c17a5e3f970326139c53b9aaf37e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[memprof] Fix warnings on MSVC
MSVC doesn't seem to count a use in static_assert as a use.
Commit: 35a5c7129a32f7eedf2d1913447c53cee96eab13
https://github.com/llvm/llvm-project/commit/35a5c7129a32f7eedf2d1913447c53cee96eab13
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
A clang/test/SemaOpenACC/combined-construct-wait-ast.cpp
A clang/test/SemaOpenACC/combined-construct-wait-clause.c
A clang/test/SemaOpenACC/combined-construct-wait-clause.cpp
Log Message:
-----------
[OpenACC] Add tests forgotten in 969b7658fe
Commit: bbbaeb5584b5f1ab38cc86a9e8ed64ec1dc926b6
https://github.com/llvm/llvm-project/commit/bbbaeb5584b5f1ab38cc86a9e8ed64ec1dc926b6
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
A clang/test/SemaOpenACC/combined-construct-attach-ast.cpp
A clang/test/SemaOpenACC/combined-construct-attach-clause.c
A clang/test/SemaOpenACC/combined-construct-attach-clause.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
Log Message:
-----------
[OpenACC] Enable 'attach' clause for combined constructs
Once again, this clause has the same implementation for compute
constructs as combined, so this adds the tests and enables it.
Commit: 87503fa51c8d726510d48e707a7d2885a5b5936c
https://github.com/llvm/llvm-project/commit/87503fa51c8d726510d48e707a7d2885a5b5936c
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
R llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
R llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp-compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.class.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpermute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.permute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.swizzle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fmul.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groupstaticsize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kernarg.segment.ptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.live.mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx90a.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx940.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memrealtime.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.vote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-align.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomic-cmpxchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-max.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-min.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-flog2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-reg-sequence.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
Log Message:
-----------
Revert "AMDGPU/GlobalISel: Add stub custom regbankselect pass" (#113913)
This reverts commit e9c49901a43f5b16c3df416460b7e4dbdd24ce03.
Current AMDGPURegBankSelect does nothing different then RegBankSelect.
Revert to using generic RegBankSelect in preparation for adding new
regbankselect passes. New AMDGPURegBankSelect, that will use uniformity
analysis for regbank select decisions, will not subclass RegBankSelect.
Revert regression tests to use regbankselect since amdgpu-regbankselect
will be used by new pass and behavior will be different.
Commit: 2e9469885d4572a2eedf2669190742c9e3272e6a
https://github.com/llvm/llvm-project/commit/2e9469885d4572a2eedf2669190742c9e3272e6a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port 87503fa51c8d
Commit: dae9cf3816bbb2b4589d258a82e6ac90fad71485
https://github.com/llvm/llvm-project/commit/dae9cf3816bbb2b4589d258a82e6ac90fad71485
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
Log Message:
-----------
[RISCV] Move scalar llvm.exp10 tests into half/float/double-intrinsics.ll. NFC
Improves coverage for more configurations.
Commit: d7643e86100a3515660dc807c88eea79bf755016
https://github.com/llvm/llvm-project/commit/d7643e86100a3515660dc807c88eea79bf755016
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GISel] Support f32/f64 llvm.exp10 intrinsics.
Commit: 1bc9de247477b58a14547a31047d1c9a365e2d5d
https://github.com/llvm/llvm-project/commit/1bc9de247477b58a14547a31047d1c9a365e2d5d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
Log Message:
-----------
[RISCV] Add test cases for llvm.tan/asin/acos/atan/atan2/sinh/cosh/tanh. NFC
Commit: 92a15dd7482ff4e1fae7a07f888564e5b1d53eee
https://github.com/llvm/llvm-project/commit/92a15dd7482ff4e1fae7a07f888564e5b1d53eee
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][LLVM] Plumb range attributes on parameters and results through (#117801)
We've had the ability to define LLVM's `range` attribute through
#llvm.constant_range for some time, and have used this for some GPU
intrinsics. This commit allows using `llvm.range` as a parameter or
result attribute on function declarations and definitions.
Commit: 3ce8b7d2205507c91f1609337382ad950f3be805
https://github.com/llvm/llvm-project/commit/3ce8b7d2205507c91f1609337382ad950f3be805
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[memprof] Remove inline call stacks (#117833)
Now that MemProf format version 1 has been removed, nobody uses:
- IndexedAllocationInfo::CallStack
- IndexedMemProfRecord::CallSites
This patch removed the dead struct fields.
You might notice that IndexedMemProfRecord::{clear,merge} do not
mention CallSiteIds at all. I think it's an oversight. clear doesn't
matter at the moment because we call it during serialization to reduce
memory footprint. merge is simply not as well tested as it should be.
I'll follow up with a separate patch to address these issues.
Commit: 82b437944e53afeb25dd85507664e2a980ddfe07
https://github.com/llvm/llvm-project/commit/82b437944e53afeb25dd85507664e2a980ddfe07
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Use "using" directives in unit tests (NFC) (#117852)
This tests uses existing "using" directives to shorten unit tests.
- llvm::memprof::hashCallStack -> hashCallStack
- testing::Pair -> Pair
- testing::ElementsAreArray -> ElementsAre
- testing::Contains -> UnorderedElementsAre
Commit: 06246b2952d5b061e8fd75979bac9c90ccd493a4
https://github.com/llvm/llvm-project/commit/06246b2952d5b061e8fd75979bac9c90ccd493a4
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
Log Message:
-----------
[RISCV] Add shrinkwrap test cases showing gaps in current impl
This covers multiple interactions reduced from larger workloads:
1) Rematerializing addi s0, x0, <imm> to avoid the need to spill a CSR, with
the common user being a branch. (i.e. branch on immediate idioms)
2) Rematerializing addi s0, a0, <imm> to avoid the need to spill a CSR, with
the common user being a vector load or store. (i.e. because we don't
have (reg+imm) addressing on vector.)
3) Independent of the previous, we could still shrink wrap these by locally
using a non-CSR, and deferring the move into csr into the non-shrink
wrapped path.
4) Weirdly, MachineCSE is producing a different result when an edge is
manually split. This edge split should be irrelevant to the CSE?
Commit: c60b055d463a3e9f18a494aec075f35d38d447a0
https://github.com/llvm/llvm-project/commit/c60b055d463a3e9f18a494aec075f35d38d447a0
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
Log Message:
-----------
Reapply "Respect the [[clang::unsafe_buffer_usage]] attribute for field and constructor initializers (#91991)"
It was originally reverted due to an [existing bug](https://github.com/llvm/llvm-project/issues/116286). Relanding it as the bug was fixed by https://github.com/llvm/llvm-project/pull/116433.
Commit: d681e1030ffd71412294d3fadc7ef673f822b832
https://github.com/llvm/llvm-project/commit/d681e1030ffd71412294d3fadc7ef673f822b832
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/latch
M libcxx/include/semaphore
Log Message:
-----------
[libc++] Refactor atomic_wait using lambdas (#115746)
Now that we've dropped support for older C++ dialects in the
synchronization library, we can use lambdas to clarify some of the code
used to implement atomic_wait.
Commit: 8c1bd9792be1d7d19eebce57be556d5cadeb2d15
https://github.com/llvm/llvm-project/commit/8c1bd9792be1d7d19eebce57be556d5cadeb2d15
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-no_create-ast.cpp
A clang/test/SemaOpenACC/combined-construct-no_create-clause.c
A clang/test/SemaOpenACC/combined-construct-no_create-clause.cpp
Log Message:
-----------
[OpenACC] Expose 'no_create' clause in combined constructs
Once again, not much work besides ensuring they are supposed to work the
same.
Commit: b6ab04c69c907362dc7ab65eb43a9907c9adcdc1
https://github.com/llvm/llvm-project/commit/b6ab04c69c907362dc7ab65eb43a9907c9adcdc1
Author: Clément Fournier <clem.fournier at proton.me>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Matchers.h
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fix arith maxnumf/minnumf folder (#114595)
Fix #114594
#### Context
[IEEE754-2019](https://ieeexplore.ieee.org/document/8766229) Sec 9.6
defines 2 minimum and 2 maximum operations. They are termed
- `maximum` and `maximumNumber`
- `minimum` and `minimumNumber`
In the arith dialect they are respectively named `maximumf` and
`maxnumf`, `minimumf` and `minnumf` so I use these names.
These operations only differ in how they handle NaN values. For
`maximumf` and `minimumf`, if any operand is NaN, then the result is
NaN, ie, NaN is propagated. For `maxnumf` and `minnumf`, if any operand
is NaN, then the other operand is returned, ie, NaN is absorbed. The
following identities hold:
```
maximumf(x, NaN) = maximumf(NaN, x) = NaN
maxnumf(x, NaN) = maxnumf(NaN, x) = x
```
(and same for min).
#### Arith folders
In the following I am talking about the folders for the arith
operations. The folders implement the following canonicalizations (`op`
is one of maximumf, maxnumf, minimumf, minnumf):
1. `op(x, x)` folds to `x`
2. for `op(x, y)`, if `y` folds to the neutral element of the `op`, then
the `op` is folded to `x`.
1. The neutral element of `maximumf` is -Infty
2. The neutral element of `minimumf` is +Infty
3. The neutral element of `maxnumf` and `minnumf` is NaN as shown above.
3. for `op(x, y)`, if both `x` and `y` fold to constants `x'` and `y'`,
then the `op` is folded and the result is calculated with a
corresponding runtime function.
The folders are properly implemented for `maximumf` and `minimumf`, but
the same implementations were copied for the respective `maxnumf` and
`minnumf` functions. This means the neutral element of the second folder
above is wrong:
- `maxnumf(x, -Infty)` is folded to `x`, but that's wrong, because if
`x` is NaN then -Infty should be the result
- `minnumf(x, +Infty)` is folded to `x`, but same thing, the result
should be +Infty when `x` is NaN.
This is fixed by using `NaN` as neutral element for the `maxnumf` and
`minnumf` ops.[^1]
Again because of copy paste mistake, the third pattern above is using
`llvm::maximum` instead of `llvm::maximumnum` to calculate the result in
case both arguments fold to a constant:
- `maxnumf(NaN, x')` would have been folded to `llvm::maximum(NaN, x')`
which is `NaN`, whereas the result should be `x'`.
This folder for `minnumf` already correctly uses `llvm::minnum`, but I
fixed the one for `maxnumf` in this PR.
[^1]: this is by the way already correctly implemented in
[`arith::getIdentityValueAttr`](https://github.com/oowekyala/llvm-project/blob/a821964e0320d1e35514ced149ec10ec06d7131a/mlir/lib/Dialect/Arith/IR/ArithOps.cpp#L2493-L2498)
Commit: 854d7301f989dd1e3c838ef4f48cb57bb7d496e0
https://github.com/llvm/llvm-project/commit/854d7301f989dd1e3c838ef4f48cb57bb7d496e0
Author: Vigneshwar Jayakumar <vigneshwarjayakumar at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaHIP/zero-sized-device-array.hip
Log Message:
-----------
[Clang/AMDGPU] Zero sized arrays not allowed in HIP device code. (#113470)
Added diagnosis to throw error when zero sized arrays are used in the
HIP device code. SWDEV-449592
---------
Co-authored-by: vigneshwar jayakumar <vigneshwar.jayakumar at amd.com>
Commit: 175051b05edcd10d997d8f98f142af1ff191b93a
https://github.com/llvm/llvm-project/commit/175051b05edcd10d997d8f98f142af1ff191b93a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GISel] Support libcalls for f32/f64 acos/asin/atan/atan2/cosh/sinh/tanh.
Commit: 89d8e70031189eacb915beae2ffc642c0de1ec1a
https://github.com/llvm/llvm-project/commit/89d8e70031189eacb915beae2ffc642c0de1ec1a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M libc/src/__support/RPC/rpc_client.cpp
M libc/src/__support/RPC/rpc_client.h
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
M libc/utils/gpu/loader/nvptx/nvptx-loader.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/keep_rpc_client.ll
M llvm/test/Transforms/OpenMP/remove_rpc_client.ll
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc] Export a pointer to the RPC client directly (#117913)
Summary:
We currently have an unnecessary level of indirection when initializing
the RPC client. This is a holdover from when the RPC client was not
trivially copyable and simply makes it more complicated. Here we use the
`asm` syntax to give the C++ variable a valid name so that we can just
copy to it directly.
Another advantage to this, is that if users want to piggy-back on the
same RPC interface they need only declare theirs as extern with the same
symbol name, or make it weak to optionally use it if LIBC isn't
avaialb.e
Commit: 1d810ece2b2c8fab77720493864257f0ea3336a9
https://github.com/llvm/llvm-project/commit/1d810ece2b2c8fab77720493864257f0ea3336a9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M libc/shared/rpc_opcodes.h
M libc/utils/gpu/loader/Loader.h
M libc/utils/gpu/server/CMakeLists.txt
R libc/utils/gpu/server/llvmlibc_rpc_server.h
M libc/utils/gpu/server/rpc_server.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc] Move libc server handlers to a shared header (#117908)
Summary:
We can simply include this header from the shared directory now and do
not need to have this level of indirection. Simply stash it with the
other libc opcode handlers.
If we were able to move the printf handlers to the shared directory then
this could just be a header as well, which would HEAVILY simplify the
mess associated with building the RPC server first in the projects
build, then copying it to the runtimes build.
Commit: 1669ac434cd4aa0ad47d42401c6d4e2afd826d30
https://github.com/llvm/llvm-project/commit/1669ac434cd4aa0ad47d42401c6d4e2afd826d30
Author: lialan <me at alanli.org>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
Log Message:
-----------
[MLIR] Refactor mask compression logic when emulating `vector.maskedload` ops (#116520)
This patch simplifies and extends the logic used when compressing masks
emitted by `vector.constant_mask` to support extracting 1-D vectors from
multi-dimensional vector loads. It streamlines mask computation, making
it applicable for multi-dimensional mask generation, improving the
overall handling of masked load operations.
Commit: febbf9105f7101d7124e802e87d8303237b64a80
https://github.com/llvm/llvm-project/commit/febbf9105f7101d7124e802e87d8303237b64a80
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
Log Message:
-----------
[RISCV] Match vcompress during shuffle lowering (#117748)
This change matches a subset of vcompress patterns during shuffle
lowering. The subset implemented requires a contiguous prefix of
demanded elements followed by undefs. This subset was chosen for two
reasons: 1) which elements to spurious demand is a non-obvious problem,
and 2) my first several attempts at implementing the general case were
buggy. I decided to go with the simple case to start with.
vcompress scales better with LMUL than a general vrgather, and at least
the SpaceMit X60, has higher throughput even at m1. It also has the
advantage of requiring smaller vector constants at one bit per element
as opposed to vrgather which is a minimum of 8 bits per element. The
downside to using vcompress is that we can't fold a vselect into it, as
there is no masked vcompress variant.
For reference, here are the relevant throughputs from camel-cdr's data
table on BP3 (X60):
vrgather.vv v8,v16,v24 4.0 16.0 64.0 256.0
vcompress.vm v8,v16,v24 3.0 10.0 36.0 136.
vmerge.vvm v8,v16,v24,v0 2.0 4.0 8.0 16.0
The largest concern with the extra vmerge is that we locally increase
register pressure. If we do have masking, we also have a passthru,
without the ability to fold that into the vcompress, we need to keep it
alive a bit longer. This can hurt at e.g. m8 where we have very few
architectural registers. As compared with the vrgather.vv sequence, this
is only one additional m1 VREG - since we no longer need the index
vector. It compares slightly worse against vrgatherie16.vv which can use
index vectors smaller than other operands. Note that we could
potentially fold the vmerge if only tail elements are being preserved; I
haven't investigated this.
It is unfortunately hard given our current lowering structure to know if
we're emitting a shuffle where masking will follow. Thankfully, it
doesn't seem to show up much in practice, so I think we can probably
ignore it.
This patch only handles single source compress idioms at the moment.
This is an effort to avoid interacting with other patches on review for
changing how we canonicalize length changing shuffles.
Commit: e3fdc3aa81c7e8196d804fbde1a3f76796dbd5dd
https://github.com/llvm/llvm-project/commit/e3fdc3aa81c7e8196d804fbde1a3f76796dbd5dd
Author: Felipe Magno de Almeida <felipe.m.almeida at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
Log Message:
-----------
[RISCV] Allow hoisting VXRM writes out of loops speculatively (#110044)
Change the intersect for the anticipated algorithm to ignore unknown
when anticipating. This effectively allows VXRM writes speculatively
because it could do a VXRM write even when there's branches where VXRM
is unneeded.
The importance of this change is because VXRM writes causes pipeline
flushes in some micro-architectures and so it makes sense to allow more
aggressive hoisting even if it causes some degradation for the slow
path.
An example is this code:
```
typedef unsigned char uint8_t;
__attribute__ ((noipa))
void foo (uint8_t *dst, int i_dst_stride,
uint8_t *src1, int i_src1_stride,
uint8_t *src2, int i_src2_stride,
int i_width, int i_height )
{
for( int y = 0; y < i_height; y++ )
{
for( int x = 0; x < i_width; x++ )
dst[x] = ( src1[x] + src2[x] + 1 ) >> 1;
dst += i_dst_stride;
src1 += i_src1_stride;
src2 += i_src2_stride;
}
}
```
With this patch, the code above generates a hoisting VXRM writes out of
the outer loop.
Commit: c6f2d35c4d698deff781366cea46e273ff508693
https://github.com/llvm/llvm-project/commit/c6f2d35c4d698deff781366cea46e273ff508693
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
Fix a build warning introduce by my febbf910
Commit: 4cb4516ae9ae2f267ec755ed0ec6b671fe6747b8
https://github.com/llvm/llvm-project/commit/4cb4516ae9ae2f267ec755ed0ec6b671fe6747b8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/keep_rpc_client.ll
M llvm/test/Transforms/OpenMP/remove_rpc_client.ll
Log Message:
-----------
[OpenMP] Fix RPC client not being optimized out after changes
Summary:
I forgot that this check deliberately looked through the indirection I
removed. Fix it to just check if the symbol has no users.
Commit: 80afdbe6a55a10cb246cb748149f0d41e778d01b
https://github.com/llvm/llvm-project/commit/80afdbe6a55a10cb246cb748149f0d41e778d01b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Use RISCVSubtarget::is64Bit() instead of hasFeature(RISCV::Feature64Bit). NFC
Commit: 8df63211a65693c7cc760e361adf20edd450fafa
https://github.com/llvm/llvm-project/commit/8df63211a65693c7cc760e361adf20edd450fafa
Author: Pranav Kant <prka at google.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Bitstream/Reader/BitstreamReader.cpp
Log Message:
-----------
[BitstreamReader] Fix 32-bit overflow (#117363)
This got exposed when processing large LTO-generated files leading to
crashes.
Commit: 21af99ab84e434819b20452367325b187492d372
https://github.com/llvm/llvm-project/commit/21af99ab84e434819b20452367325b187492d372
Author: Maurice Heumann <MauriceHeumann at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86WinEHState.cpp
A llvm/test/CodeGen/WinEH/wineh-scope-statenumbering.ll
Log Message:
-----------
[WinEH] Emit state stores for SEH scopes (#116546)
At the moment Windows 32 bit SEH state stores are only emitted for
throwing calls.
Windows 32 bit SEH state stores should also be emitted before SEH scope
begin and before SEH scope end.
An invalid inline memory access would otherwise not trigger unwinding,
in combination with /EHa.
This fixes #90946
Commit: e573c6b67eb729a625431121139100bebc61ba1f
https://github.com/llvm/llvm-project/commit/e573c6b67eb729a625431121139100bebc61ba1f
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/HLFIR/goto-do-body.f90
M flang/test/Lower/goto-do-body.f90
M flang/test/Lower/nsw.f90
Log Message:
-----------
[flang] Add nsw to DO loop parameters (#113854)
nsw is added to DO loop parameters (initial parameters, terminal
parameters, and incrementation parameters).
This can help vectorization in some cases like #110609.
See also the discussion in
https://discourse.llvm.org/t/rfc-add-nsw-flags-to-arithmetic-integer-operations-using-the-option-fno-wrapv/77584/20.
Commit: 9bdf683ba6cd9ad07667513d264a2bc02d969186
https://github.com/llvm/llvm-project/commit/9bdf683ba6cd9ad07667513d264a2bc02d969186
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/extract-vselect-setcc.ll
Log Message:
-----------
[X86] Enforce strict pre-legalization to combine in scalarizeExtEltFP (#117681)
Use a `DCI` object to actually check the DAG combine level instead of
using the type `i1` because this assumption fails on AVX512 where we
have types like `v8i1` after legalization.
Closes #117684
Commit: 65339e4d74923711c1bf6babfd59fd46f74647ba
https://github.com/llvm/llvm-project/commit/65339e4d74923711c1bf6babfd59fd46f74647ba
Author: Stella Laurenzo <stellaraccident at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M mlir/CMakeLists.txt
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
Log Message:
-----------
[mlir] Add option to disable MLIR Python dev package configuration. (#117934)
Adds a CMake option MLIR_DISABLE_CONFIGURE_PYTHON_DEV_PACKAGES which
gates doing package discovery and configuration for Python dev packages
by MLIR (this was made opt-out to preserve compatibility with
find_package(MLIR) based uses which do not set the standard options).
The default Python setup that MLIR does has been a problem for
super-projects that include LLVM for a long time because it forces a
very specific package discovery mechanism that is not uniform in all
uses.
When reviewing #117922, I noted that this would effectively be a break
the world event for downstreams, forcing them to adapt their nanobind
dep to the exact way that MLIR does it. Adding the option to just
wholesale skip the built-in configuration heuristics at least gives us a
mechanism to tell downstreams to migrate to, giving them complete
control and not requiring packaging workarounds. This seemed a better
option than (once again) creating a situation where downstreams could
not integrate the dep change without doing tricky infra upgrades, and it
removes the burden from the author of that patch from needing to think
about how this affects super-projects that include MLIR (i.e. they can
just be told to do it themselves as needed vs being in a wedged state
and unable to upgrade).
Commit: d2b482b0efd1d523852c9add8ed6b2035ce1acd9
https://github.com/llvm/llvm-project/commit/d2b482b0efd1d523852c9add8ed6b2035ce1acd9
Author: Omar Hossam <moar.ahmed at gmail.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/syscall.h.def
M libc/newhdrgen/yaml/sys/mman.yaml
M libc/spec/linux.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/process_mrelease.cpp
A libc/src/sys/mman/process_mrelease.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/process_mrelease_test.cpp
Log Message:
-----------
[libc] (reland #117503) Implement process_mrelease (#117851)
This PR implements process_mrelease.
A previous PR was merged #117503, but failed on merge due to an issue in
the tests. Namely the failing tests were comparing against return type
as opposed to errno. This is fixed in this PR.
Commit: 63c5a422f07da9925a4700f54016ab8623567718
https://github.com/llvm/llvm-project/commit/63c5a422f07da9925a4700f54016ab8623567718
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclCXX.h
M clang/lib/AST/DeclCXX.cpp
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/SemaCXX/literal-type.cpp
Log Message:
-----------
[Clang] Fix constexpr-ness on implicitly deleted destructors (#116359)
In C++20, a defaulted but implicitly deleted destructor is constexpr if
and only if the class has no virtual base class. This hasn't been
changed in C++23 by P2448R2.
Constexpr-ness on a deleted destructor affects almost nothing. The
`__is_literal` intrinsic is related, while the corresponding
`std::is_literal_type(_v)` utility has been removed in C++20. A recently
added example in `test/AST/ByteCode/cxx23.cpp` will become valid, and
the example is already accepted by GCC.
Clang currently behaves correctly in C++23 mode, because the
constexpr-ness on defaulted destructor is relaxed by P2448R2. But we
should make similar relaxation for an implicitly deleted destructor.
Fixes #85550.
Commit: c8cd497c9889b051671c7fe2eb6e4b3bbe6606f9
https://github.com/llvm/llvm-project/commit/c8cd497c9889b051671c7fe2eb6e4b3bbe6606f9
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/docs/UsersManual.rst
M clang/include/clang/Driver/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[Driver] Support fprofile-sample-use= for CL (#117282)
Sampling PGO has already been supported on Windows. This patch adds
/fprofile-sample-use= /fprofile-sample-use: /fno-profile-sample-use and
supports -fprofile-sample-use= for CL.
Commit: 819b155c2a18460d2f22482975d33d77bb4f8831
https://github.com/llvm/llvm-project/commit/819b155c2a18460d2f22482975d33d77bb4f8831
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M libc/src/sys/mman/linux/process_mrelease.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/process_mrelease_test.cpp
Log Message:
-----------
[libc] skip test and return ENOSYS when processm_release unavailable (#117951)
Commit: 4a3f46de5022418452947bb630cdb5b9658e82ea
https://github.com/llvm/llvm-project/commit/4a3f46de5022418452947bb630cdb5b9658e82ea
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
Log Message:
-----------
[LV][EVL] Support call instruction with EVL-vectorization (#110412)
Commit: a24aa7dfa579c41365f23f8205b619b838e32184
https://github.com/llvm/llvm-project/commit/a24aa7dfa579c41365f23f8205b619b838e32184
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/plugins-nextgen/common/CMakeLists.txt
M runtimes/cmake/Modules/FindLibcCommonUtils.cmake
Log Message:
-----------
[Offload] Use libc 'hand-in-hand' module to find RPC header (#117928)
Summary:
We should now use the official™ way to include the files from
`libc/shared`. This required some code to make sure that it's not
included twice if multiple people use it as well as a sanity check on
the directory.
Commit: 054f914741421ca9dd1eaa58ea74a20f8695bae6
https://github.com/llvm/llvm-project/commit/054f914741421ca9dd1eaa58ea74a20f8695bae6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
A llvm/utils/merge-json.py
M runtimes/CMakeLists.txt
Log Message:
-----------
[Runtimes] Merge 'compile_commands.json' files from runtimes build (#116303)
Summary:
When building a project in a runtime mode, the compilation database is a
separate CMake invocation. So its `compile_commands.json` file will be
placed elsewhere in the `runtimes/runtime-bins` directory. This is
somewhat annoying for ongoing development when a runtimes build is
necessary. This patch adds some CMake magic to merge the two files.
Commit: 700d9ac9ef82fa5aa6b2972e8656ab5055a90d15
https://github.com/llvm/llvm-project/commit/700d9ac9ef82fa5aa6b2972e8656ab5055a90d15
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
Log Message:
-----------
[libc] disable process_mrelease for riscv (#117956)
`process_mrelease` upsets the RV32 build bot. Disable it for now.
Commit: 1f422dc399e2b62d0c8fc64849af915d89c28d67
https://github.com/llvm/llvm-project/commit/1f422dc399e2b62d0c8fc64849af915d89c28d67
Author: sfzhu93 <42506672+sfzhu93 at users.noreply.github.com>
Date: 2024-11-27 (Wed, 27 Nov 2024)
Changed paths:
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
Log Message:
-----------
[MLIR][mlir-opt] add support for disabling diagnostics (#117669)
This PR adds a command line argument `--mlir-disable-diagnostic` for
disabling diagnostic information for mlir-opt.
When debugging with mlir-opt, some developers would like to disable the
diagnostic information and focus specifically on the dumped IR. For
example, https://github.com/triton-lang/triton/pull/5250
Commit: db273c6c242f51792ed4298a24bd2c344214ce38
https://github.com/llvm/llvm-project/commit/db273c6c242f51792ed4298a24bd2c344214ce38
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M mlir/test/lib/Dialect/Test/TestAttrDefs.td
M mlir/test/mlir-tblgen/attr-or-type-format-roundtrip.mlir
M mlir/tools/mlir-tblgen/EnumsGen.cpp
Log Message:
-----------
[MLIR][ODS] Add support for wrapping enums with std::optional in Type/Attr definitions (#117719)
Commit: c8b15157d70c57489b9aba939065c01c3f697ddb
https://github.com/llvm/llvm-project/commit/c8b15157d70c57489b9aba939065c01c3f697ddb
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
Log Message:
-----------
[mlir-opt] Fix -Wcovered-switch-default in MlirOptMain.cpp (NFC)
/llvm-project/mlir/lib/Tools/mlir-opt/MlirOptMain.cpp:262:7:
error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
default:
^
1 error generated.
Commit: 3a115279f888b6489902df60c3fe2e76447d375c
https://github.com/llvm/llvm-project/commit/3a115279f888b6489902df60c3fe2e76447d375c
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M mlir/docs/DialectConversion.md
M mlir/include/mlir/Transforms/DialectConversion.h
Log Message:
-----------
[mlir][Transforms][NFC] Dialect conversion: Improve docs for materializations (#117847)
The terms "legal type" and "illegal type" are ambiguous when talking
about materializations. E.g., for target materializations we do not
necessarily convert from illegal to legal types. We convert from the
most recently mapped value to the type that was produced by converting
the original type.
---------
Co-authored-by: Markus Böck <markus.boeck02 at gmail.com>
Commit: 81f544d4659a96772c7e2ffed1bbe557993f4b34
https://github.com/llvm/llvm-project/commit/81f544d4659a96772c7e2ffed1bbe557993f4b34
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
A flang/include/flang/Common/OpenMP-utils.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/lib/Common/CMakeLists.txt
A flang/lib/Common/OpenMP-utils.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/test/Lower/OpenMP/generic-loop-rewriting.f90
A flang/test/Transforms/generic-loop-rewriting-todo.mlir
A flang/test/Transforms/generic-loop-rewriting.mlir
Log Message:
-----------
[flang][OpenMP] Rewrite `omp.loop` to semantically equivalent ops (#115443)
Introduces a new conversion pass that rewrites `omp.loop` ops to their
semantically equivalent op nests bases on the surrounding/binding
context of the `loop` op. Not all forms of `omp.loop` are supported yet.
See `isLoopConversionSupported` for more info on which forms are
supported.
Commit: 2918a47f421b3d41eb54dbd8751c6e8df2adbe23
https://github.com/llvm/llvm-project/commit/2918a47f421b3d41eb54dbd8751c6e8df2adbe23
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[mlir][OpenMP] Annotate `private` vars with `map_idx` when needed (#116770)
This PR extends the MLIR representation for `omp.target` ops by adding a
`map_idx` to `private` vars. This annotation stores the index of the map
info operand corresponding to the private var. If the variable does not
have a map operand, the `map_idx` attribute is either not present at all
or its value is `-1`.
This makes matching the private variable to its map info op easier (see
https://github.com/llvm/llvm-project/pull/116576 for usage).
Commit: f710b042336d93fd1080124d3ec889702b77a730
https://github.com/llvm/llvm-project/commit/f710b042336d93fd1080124d3ec889702b77a730
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Core.cpp
Log Message:
-----------
[ORC] Fail early in ExecutionSession::registerJITDispatchHandlers.
Check that we're not reusing any handler tag addresses before installing any
handlers. This ensures that either all of the handlers are installed*, or none
of them are, simplifying error recovery.
* Ignoring handlers whose tags couldn't be resolved at all: these were never
installed.
Commit: fb3765959f2fcb97fbb2a247b619150926f0e0b6
https://github.com/llvm/llvm-project/commit/fb3765959f2fcb97fbb2a247b619150926f0e0b6
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/05-dwarf-incorrect-lexical-scope-variable.test
M llvm/unittests/DebugInfo/LogicalView/CMakeLists.txt
A llvm/unittests/DebugInfo/LogicalView/DWARFGeneratedTest.cpp
Log Message:
-----------
[llvm-debuginfo-analyzer] Common handling of unsigned attribute values. (#116027)
- In the DWARF reader, for those attributes that can have an unsigned
value, allow for the following cases:
* Is an implicit constant
* Is an optional value
- The testing is done by creating a file with generated DWARF, using
`DwarfGenerator` (generate DWARF debug info for unit tests).
Commit: 1c7695846559c2b191463aec46beb26c4a5c2bae
https://github.com/llvm/llvm-project/commit/1c7695846559c2b191463aec46beb26c4a5c2bae
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
Log Message:
-----------
[NVPTX] Add unreachable for TMA Inst Printer (#117850)
This patch adds the llvm_reachable() for TMA
reduction opcode printer method, outside the
switch.
We had this inside the default-case leading to
the warning below (and hence was removed):
error: default label in switch which covers all enumeration values
[-Werror,-Wcovered-switch-default]
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: f3cf24fcc46ab1b9612d7dcb55ec5f18ea2dc62f
https://github.com/llvm/llvm-project/commit/f3cf24fcc46ab1b9612d7dcb55ec5f18ea2dc62f
Author: s-watanabe314 <watanabe.shu-06 at fujitsu.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/arrayset.fir
M flang/test/Fir/arrexp.fir
M flang/test/Fir/basic-program.fir
M flang/test/Fir/box-offset-codegen.fir
M flang/test/Fir/box.fir
M flang/test/Fir/boxproc.fir
M flang/test/Fir/commute.fir
M flang/test/Fir/coordinateof.fir
M flang/test/Fir/embox.fir
M flang/test/Fir/field-index.fir
M flang/test/Fir/ignore-missing-type-descriptor.fir
M flang/test/Fir/polymorphic.fir
M flang/test/Fir/struct-passing-x86-64-byval.fir
M flang/test/Fir/target-rewrite-complex-10-x86.fir
M flang/test/Fir/target.fir
M flang/test/Integration/OpenMP/copyprivate.f90
M flang/test/Integration/debug-local-var-2.f90
M flang/test/Transforms/constant-argument-globalisation.fir
A flang/test/Transforms/function-attrs.fir
Log Message:
-----------
[flang] Apply nocapture attribute to dummy arguments (#116182)
Apply llvm.nocapture attribute to dummy arguments that do not have the
target, asynchronous, volatile, or pointer attributes in a procedure
that is not a bind(c). This was discussed in
https://discourse.llvm.org/t/applying-the-nocapture-attribute-to-reference-passed-arguments-in-fortran-subroutines/81401
Commit: d36a4c07156de01b05ea41d5876c671de64e99c6
https://github.com/llvm/llvm-project/commit/d36a4c07156de01b05ea41d5876c671de64e99c6
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/convert-highly-predictable-select-to-branch.ll
Log Message:
-----------
[RISCV] Rename some Feature* to Tune* (#117966)
These features should be tune features.
Commit: 9ea5be639d31560faec993b4aebb3e10c7d4c8e2
https://github.com/llvm/llvm-project/commit/9ea5be639d31560faec993b4aebb3e10c7d4c8e2
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/select-costs.ll
Log Message:
-----------
Recommit "[LV][VPlan] Remove any-of reduction from precomputeCost. NFC (#117109)" (#117289)
Update the test cases contains `any-of` printings from the
precomputeCost().
Origin message:
The any-of reduction contains phi and select instructions.
The select instruction might be optimized and removed in the vplan which
may cause VF difference between legacy and VPlan-based model. But if the
select instruction be removed, planContainsAdditionalSimplifications()
will catch it and disable the assertion.
Therefore, we can just remove the ayn-of reduction calculation in the
precomputeCost().
Recommit "[LV][VPlan] Remove any-of reduction from precomputeCost. NFC
(#117109)"
Commit: c4645ffedacad18e4cd1dd372288aa55178b1c44
https://github.com/llvm/llvm-project/commit/c4645ffedacad18e4cd1dd372288aa55178b1c44
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcicsr-invalid.s
A llvm/test/MC/RISCV/xqcicsr-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcicsr (CSR) extension (#117169)
The Qualcomm uC Xqcicsr extension adds 2 instructions that can read and
write CSRs.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
Commit: 93f7398bdba9d1547df21156db4d5393f0ab5ec8
https://github.com/llvm/llvm-project/commit/93f7398bdba9d1547df21156db4d5393f0ab5ec8
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
Log Message:
-----------
[RISCV] Add TuneDisableLatencySchedHeuristic
This tune feature will disable latency scheduling heuristic.
This can reduce the number of spills/reloads but will cause some
regressions on some cores.
CPU may add this tune feature if they find it's profitable.
Reviewers: lukel97, michaelmaitland, asb, preames, mshockwave, topperc
Reviewed By: michaelmaitland, mshockwave, topperc
Pull Request: https://github.com/llvm/llvm-project/pull/115858
Commit: c1dff7152592f1beee9059ee8e2cb3cc68baea4d
https://github.com/llvm/llvm-project/commit/c1dff7152592f1beee9059ee8e2cb3cc68baea4d
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/Socket.h
M lldb/include/lldb/Host/common/TCPSocket.h
M lldb/include/lldb/Host/common/UDPSocket.h
M lldb/include/lldb/Host/linux/AbstractSocket.h
M lldb/include/lldb/Host/posix/DomainSocket.h
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/common/TCPSocket.cpp
M lldb/source/Host/common/UDPSocket.cpp
M lldb/source/Host/linux/AbstractSocket.cpp
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/posix/DomainSocket.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/Host/MainLoopTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.cpp
M lldb/unittests/debugserver/RNBSocketTest.cpp
M lldb/unittests/tools/lldb-server/tests/TestClient.cpp
Log Message:
-----------
[lldb] Remove child_process_inherit from the socket classes (#117699)
It's never set to true. Also, using inheritable FDs in a multithreaded
process pretty much guarantees descriptor leaks. It's better to
explicitly pass a specific FD to a specific subprocess, which we already
mostly can do using the ProcessLaunchInfo FileActions.
Commit: f6694534ac86cb6949b241c11ddc7fd8ee44f027
https://github.com/llvm/llvm-project/commit/f6694534ac86cb6949b241c11ddc7fd8ee44f027
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[Driver] Remove non MSVC CL flags /fprofile-sample-use (#117970)
Those flags are introduced in #117282. They are not supported by MSVC.
Commit: 69d66fafec968b17f84e30bc09faffb3dc8e5f15
https://github.com/llvm/llvm-project/commit/69d66fafec968b17f84e30bc09faffb3dc8e5f15
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/docs/UsersManual.rst
Log Message:
-----------
[clang] Fix description for fprofile-sample-use= on Windows (#117973)
We only support -fprofile-sample-use= for clang-cl.
Commit: 3ffee0086c1e31094e544c878f9d5cc413d36b46
https://github.com/llvm/llvm-project/commit/3ffee0086c1e31094e544c878f9d5cc413d36b46
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/unittests/DebugInfo/LogicalView/CMakeLists.txt
M llvm/unittests/DebugInfo/LogicalView/DWARFGeneratedTest.cpp
Log Message:
-----------
[llvm-debuginfo-analyzer] Fix compile/link errors on specific builders. (#117971)
Link errors on builders:
- llvm-nvptx-nvidia-ubuntu
- llvm-nvptx64-nvidia-ubuntu
Add explicitly references to DebugInfoDWARF and Object.
Compile errors on builders:
- ppc64le-lld-multistage-test
- clang-ppc64le-linux-multistage
- clang-ppc64le-rhel
error: comparison of integers of different signs:
Add to the constants used in the 'EXPECT_EQ' the 'u' postfix.
Commit: 60db321081be2324bec7e18eb76421cc566625fd
https://github.com/llvm/llvm-project/commit/60db321081be2324bec7e18eb76421cc566625fd
Author: Zhaoxuan Jiang <jiangzhaoxuan94 at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-frame-tail.ll
M llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog.ll
Log Message:
-----------
[AArch64] Do not mark homogeneous prolog/epilog functions optnone (#117959)
The verifier complains that synthesized IR functions have minsize and
optnone attributes which are incompatible. This patch removes optnone
attribute and updates affected tests as needed.
Commit: 7173a7d7f9d3035e39508746efa46c2ec5c80119
https://github.com/llvm/llvm-project/commit/7173a7d7f9d3035e39508746efa46c2ec5c80119
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
Log Message:
-----------
[NVPTX][NFC] Use NAME macro for TMA intrinsic defs (#117907)
This patch updates the TMA intrinsic definitions to use the "NAME"
macro (inside the multiclass) instead of an empty string.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 332719561000dcac94384234ace1fa959362ad8e
https://github.com/llvm/llvm-project/commit/332719561000dcac94384234ace1fa959362ad8e
Author: Markus Böck <markus.boeck02 at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
Log Message:
-----------
[mlir][LLVM][NFC] Implement `print/parse` for `LLVMStructType` (#117930)
The printing and parsing logic for struct types was still using ad-hoc
functions instead of the more conventional `print` and `parse` methods
whose declarations are automatically generated by TableGen.
This PR effectively renames these functions and uses them directly as
implementations for `print` and `parse` of `LLVMStructType`.
This additionally fixes linking errors when users or auto generated code
may call `print` and `parse` directly.
Fixes https://github.com/llvm/llvm-project/issues/117927
Commit: 76e6c8d3fc3dc097a3bd96e8959f73a809493976
https://github.com/llvm/llvm-project/commit/76e6c8d3fc3dc097a3bd96e8959f73a809493976
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGStmtOpenMP.cpp
A clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
Log Message:
-----------
Codegen changes for strict modifier with grainsize/num_tasks of taskloop construct (#117196)
Initial parsing/sema for 'strict' modifier with 'num_tasks' and
‘grainsize’ clause is present in these commits
[grainsize_parsing](https://github.com/llvm/llvm-project/commit/ab9eac762c35068e77f57795e660d06f578c9614)
and
[num_tasks_parsing](https://github.com/llvm/llvm-project/commit/56c166017055595a9f26933e85bfd89e30c528d0#diff-4184486638e85284c3a2c961a81e7752231022daf97e411007c13a6732b50db9R6545)
. However, this implementation appears incomplete as it lacks code
generation support. A runtime patch was introduced in this runtime
commit
[runtime_patch](https://github.com/llvm/llvm-project/commit/540007b42701b5ac9adba076824bfd648a265413#diff-5e95f9319910d6965d09c301359dbe6b23f3eef5ce4d262ef2c2d2137875b5c4R374)
, which adds a new API, _kmpc_taskloop_5, to accommodate the strict
modifier.
In this patch I have added codegen support. When the strict modifier is
present alongside the grainsize or num_tasks clauses of taskloop
construct, the code now emits a call to _kmpc_taskloop_5, which includes
an additional parameter of type i32 with the value 1 to indicate the
strict modifier. If the strict modifier is not present, it falls back to
the existing _kmpc_taskloop API call.
---------
Co-authored-by: Chandra Ghale <ghale at pe31.hpc.amslabs.hpecorp.net>
Commit: 89b08c8ee7b5184f8cfb0d356f2762173fb87d42
https://github.com/llvm/llvm-project/commit/89b08c8ee7b5184f8cfb0d356f2762173fb87d42
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Simplify generated code for isSubclass (#117351)
Implement isSubclass with direct lookup into some tables instead of
nested switches.
Part of the motivation for this is improving compile time when clang-18
is used as a host compiler, since it seems to have trouble with very
large switch statements.
Commit: 71648a4ef93867ce47afa512f6cf808be3cd0a2e
https://github.com/llvm/llvm-project/commit/71648a4ef93867ce47afa512f6cf808be3cd0a2e
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
Log Message:
-----------
Make MCDCRecord::getNumConditions() `const&`
Some users were trying to get a reference to the return value.
Commit: 0604d13790b20f6b385507bb63c62aa87162da9b
https://github.com/llvm/llvm-project/commit/0604d13790b20f6b385507bb63c62aa87162da9b
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
A clang/test/SemaCXX/attr-no-specializations.cpp
Log Message:
-----------
[Clang] Add [[clang::no_specializations]] (#101469)
This can be used to inform users when a template should not be
specialized. For example, this is the case for the standard type traits
(except for `common_type` and `common_reference`, which have more
complicated rules).
Commit: f8f238d38eaa0a2e27f09fb6d01bcc8e7eab9e93
https://github.com/llvm/llvm-project/commit/f8f238d38eaa0a2e27f09fb6d01bcc8e7eab9e93
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/selectopt-cast.ll
Log Message:
-----------
[AArch64] Add extra add/cast tests for select-optimize.
Extra tests for https://github.com/llvm/llvm-project/pull/115489
with different operand order. Also fixes the target triple.
Commit: 2c242b98c608021e6768f0369498f5b8b5144d34
https://github.com/llvm/llvm-project/commit/2c242b98c608021e6768f0369498f5b8b5144d34
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
Log Message:
-----------
[clang] Add a lifetime_capture_by testcase for temporary capturing object. (#117733)
Add a test case to indicate this is an expected behavior.
Commit: 88c2af80fac423fc338027c007e1499333f05ddb
https://github.com/llvm/llvm-project/commit/88c2af80fac423fc338027c007e1499333f05ddb
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/TargetParser/AArch64TargetParser.cpp
Log Message:
-----------
[NFC][clang][FMV][TargetInfo] Refactor API for FMV feature priority. (#116257)
Currently we have code with target hooks in CodeGenModule shared between
X86 and AArch64 for sorting MultiVersionResolverOptions. Those are used
when generating IFunc resolvers for FMV. The RISCV target has different
criteria for sorting, therefore it repeats sorting after calling
CodeGenFunction::EmitMultiVersionResolver.
I am moving the FMV priority logic in TargetInfo, so that it can be
implemented by the TargetParser which then makes it possible to query it
from llvm. Here is an example why this is handy:
https://github.com/llvm/llvm-project/pull/87939
Commit: 3b8426d340ab730ee3303257ea204ee083b1273a
https://github.com/llvm/llvm-project/commit/3b8426d340ab730ee3303257ea204ee083b1273a
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M .ci/generate_test_report.py
Log Message:
-----------
[ci] Fix unit tests for test report generator
Last time I fixed a bug here I forgot to update them.
Commit: 0c0f765cab4b16eb0342d514584cdf64cabc433a
https://github.com/llvm/llvm-project/commit/0c0f765cab4b16eb0342d514584cdf64cabc433a
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/test/CodeGen/Thumb/frame-chain.ll
A llvm/test/CodeGen/Thumb/returnaddress.ll
Log Message:
-----------
[ARM] Fix llvm.returnaddress for Thumb1 with R11 frame-pointer (#117735)
When the llvm.returnaddress intrinsic is used, the LR is marked as
live-in to the function, so it must be preserved through the prologue.
This is normally fine, but there is one case for Thumb1 where we use LR
as a temporary in the prologue to set up a frame chain using r11 as the
frame pointer. There are no other registers guaranteed to be free to do
this, so we have to re-load LR from the stack after pushing the callee
saved registers.
Commit: 79eb406a67fe08458548289da72cda18248a9313
https://github.com/llvm/llvm-project/commit/79eb406a67fe08458548289da72cda18248a9313
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
A mlir/include/mlir/Conversion/MeshToMPI/MeshToMPI.h
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/MPI/IR/MPIOps.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/lib/Conversion/CMakeLists.txt
A mlir/lib/Conversion/MeshToMPI/CMakeLists.txt
A mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
M mlir/lib/Dialect/MPI/IR/MPIOps.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
A mlir/test/Conversion/MeshToMPI/convert-mesh-to-mpi.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/spmdization.mlir
Log Message:
-----------
[mlir][mesh, MPI] Mesh2mpi (#104566)
Pass for lowering `Mesh` to `MPI`.
Initial commit lowers `UpdateHaloOp` only.
Commit: 04a2d50efd668b752718f90811a7c628bfa761d7
https://github.com/llvm/llvm-project/commit/04a2d50efd668b752718f90811a7c628bfa761d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
A llvm/test/CodeGen/PowerPC/frameindex-negative-offset.ll
Log Message:
-----------
[PPC] Use getSignedConstant() for frame index offset
The offset is signed. Fixes assertion failure reported at:
https://github.com/llvm/llvm-project/pull/117558#issuecomment-2504413074
Commit: 61653f8e39666ea974561fd9ddccd7d473852fad
https://github.com/llvm/llvm-project/commit/61653f8e39666ea974561fd9ddccd7d473852fad
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/test/CodeGen/AArch64/init-undef.mir
Log Message:
-----------
Reland "[InitUndef] handleSubReg should skip artificial subregs. (#116248)"
This patch can now reland after 318c69de52b6 relanded #114827.
This reverts commit 1683f84d289348ba6879635c4161979204f75230.
Commit: 243c9791872a694ca341cc51c18d96fbc189a06b
https://github.com/llvm/llvm-project/commit/243c9791872a694ca341cc51c18d96fbc189a06b
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
Log Message:
-----------
Reland "[RegisterCoalescer] Fix up subreg lanemasks after rematerializing. (#116191)"
This patch can now reland after 318c69de52b6 relanded #114827.
This reverts commit 14a58a1390a72ba6c66606e58e86425dcb902763.
Commit: 0f131704386db648e6b9388172bb93824823e277
https://github.com/llvm/llvm-project/commit/0f131704386db648e6b9388172bb93824823e277
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/scmp.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/ucmp.ll
Log Message:
-----------
[SPIR-V] Implement intrinsics llvm.scmp.* and llvm.ucmp.* (#117341)
This PR add translation of intrinsics `llvm.scmp.*` and `llvm.ucmp.*`.
Commit: 831469fb552ba03d15fb717eeb526a71bfac8b6d
https://github.com/llvm/llvm-project/commit/831469fb552ba03d15fb717eeb526a71bfac8b6d
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M .github/new-issues-labeler.yml
Log Message:
-----------
Automatically add false-positive/false-negative labels (#117811)
Fixes #117762
Commit: 82821254f532c1dbdfd5d985ef7130511efaaa83
https://github.com/llvm/llvm-project/commit/82821254f532c1dbdfd5d985ef7130511efaaa83
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr46525-expander-insertpoint.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[LV] Use IVUpdateMayOverflow to set HasNUW. (#111758)
If IVUpdateMayOverflow is false, we proved that the induction increment
cannot overflow in the vector loop. This allows setting NUW in some
cases when folding the tail.
PR: https://github.com/llvm/llvm-project/pull/111758
Commit: 871e3dc8d8717bbcf5e3ad44331a21c3417c2639
https://github.com/llvm/llvm-project/commit/871e3dc8d8717bbcf5e3ad44331a21c3417c2639
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M lldb/tools/lldb-server/lldb-gdbserver.cpp
Log Message:
-----------
[lldb] Fixup #117699 for windows builds
Commit: 992b00020fae2d8b0f150a45885768551a867a10
https://github.com/llvm/llvm-project/commit/992b00020fae2d8b0f150a45885768551a867a10
Author: Callum Fare <callum at codeplay.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
A offload/liboffload/API/APIDefs.td
A offload/liboffload/API/CMakeLists.txt
A offload/liboffload/API/Common.td
A offload/liboffload/API/Device.td
A offload/liboffload/API/OffloadAPI.td
A offload/liboffload/API/Platform.td
A offload/liboffload/API/README.md
A offload/liboffload/CMakeLists.txt
A offload/liboffload/README.md
A offload/liboffload/exports
A offload/liboffload/include/OffloadImpl.hpp
A offload/liboffload/include/generated/OffloadAPI.h
A offload/liboffload/include/generated/OffloadEntryPoints.inc
A offload/liboffload/include/generated/OffloadFuncs.inc
A offload/liboffload/include/generated/OffloadImplFuncDecls.inc
A offload/liboffload/include/generated/OffloadPrint.hpp
A offload/liboffload/src/Helpers.hpp
A offload/liboffload/src/OffloadImpl.cpp
A offload/liboffload/src/OffloadLib.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/tools/offload-tblgen/default_returns.td
A offload/test/tools/offload-tblgen/entry_points.td
A offload/test/tools/offload-tblgen/functions_basic.td
A offload/test/tools/offload-tblgen/functions_code_loc.td
A offload/test/tools/offload-tblgen/functions_ranged_param.td
A offload/test/tools/offload-tblgen/print_enum.td
A offload/test/tools/offload-tblgen/print_function.td
A offload/test/tools/offload-tblgen/type_tagged_enum.td
A offload/tools/offload-tblgen/APIGen.cpp
A offload/tools/offload-tblgen/CMakeLists.txt
A offload/tools/offload-tblgen/EntryPointGen.cpp
A offload/tools/offload-tblgen/FuncsGen.cpp
A offload/tools/offload-tblgen/GenCommon.hpp
A offload/tools/offload-tblgen/Generators.hpp
A offload/tools/offload-tblgen/PrintGen.cpp
A offload/tools/offload-tblgen/RecordTypes.hpp
A offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
A offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/common/Environment.cpp
A offload/unittests/OffloadAPI/common/Environment.hpp
A offload/unittests/OffloadAPI/common/Fixtures.hpp
A offload/unittests/OffloadAPI/device/olDeviceInfo.hpp
A offload/unittests/OffloadAPI/device/olGetDevice.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
A offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
A offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
A offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
Log Message:
-----------
Reland #2 - [Offload] Introduce offload-tblgen and initial new API implementation (#108413. #117704) (#117894)
Relands #117704, which relanded changes from #108413 - this was reverted
due to build issues. The new offload library did not build with
`LIBOMPTARGET_OMPT_SUPPORT` enabled, which was not picked up by
pre-merge testing.
The last commit contains the fix; everything else is otherwise identical
to the approved PR.
___
### New API
Previous discussions at the LLVM/Offload meeting have brought up the
need for a new API for exposing the functionality of the plugins. This
change introduces a very small subset of a new API, which is primarily
for testing the offload tooling and demonstrating how a new API can fit
into the existing code base without being too disruptive. Exact designs
for these entry points and future additions can be worked out over time.
The new API does however introduce the bare minimum functionality to
implement device discovery for Unified Runtime and SYCL. This means that
the `urinfo` and `sycl-ls` tools can be used on top of Offload. A
(rough) implementation of a Unified Runtime adapter (aka plugin) for
Offload is available
[here](https://github.com/callumfare/unified-runtime/tree/offload_adapter).
Our intention is to maintain this and use it to implement and test
Offload API changes with SYCL.
### Demoing the new API
```sh
# From the runtime build directory
$ ninja LibomptUnitTests
$ OFFLOAD_TRACE=1 ./offload/unittests/OffloadAPI/offload.unittests
```
### Open questions and future work
* Only some of the available device info is exposed, and not all the
possible device queries needed for SYCL are implemented by the plugins.
A sensible next step would be to refactor and extend the existing device
info queries in the plugins. The existing info queries are all strings,
but the new API introduces the ability to return any arbitrary type.
* It may be sensible at some point for the plugins to implement the new
API directly, and the higher level code on top of it could be made
generic, but this is more of a long-term possibility.
Commit: 98204a2e5bb754b0260175e42614c5463807beb5
https://github.com/llvm/llvm-project/commit/98204a2e5bb754b0260175e42614c5463807beb5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
A llvm/test/Bitcode/Inputs/invalid-initializer.bc
M llvm/test/Bitcode/invalid.test
Log Message:
-----------
[Bitcode] Verify types for aggregate initializers
Unfortunately all the nice error messages get lost because we
don't forward errors from lazy value materialization.
Fixes https://github.com/llvm/llvm-project/issues/117707.
Commit: b869f1bd4fc96fd1d2038720bd1ca84788d71370
https://github.com/llvm/llvm-project/commit/b869f1bd4fc96fd1d2038720bd1ca84788d71370
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
Log Message:
-----------
[clang] Remove unused lambda capture (NFC)
/llvm-project/clang/lib/Basic/Targets/X86.cpp:1368:23:
error: lambda capture 'this' is not used [-Werror,-Wunused-lambda-capture]
auto getPriority = [this](StringRef Feature) -> unsigned {
^~~~
1 error generated.
Commit: 159e6012beb5cfd9864b4e2a910086d6f1230b03
https://github.com/llvm/llvm-project/commit/159e6012beb5cfd9864b4e2a910086d6f1230b03
Author: 执着 <118413413+dty2 at users.noreply.github.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Stop.h
M flang/include/flang/Runtime/stop.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Stop.cpp
M flang/runtime/stop.cpp
A flang/test/Lower/Intrinsics/backtrace.f90
Log Message:
-----------
[flang]Add new intrinsic function backtrace and complete the TODO of abort (#117603)
Hey guys, I found that Flang's built-in ABORT function is incomplete
when I was using it. Compared with gfortran's ABORT (which can both
abort and print out a backtrace), flang's ABORT implementation lacks the
function of printing out a backtrace. This feature is essential for
debugging and understanding the call stack at the failure point.
To solve this problem, I completed the "// TODO:" of the abort function,
and then implemented an additional built-in function BACKTRACE for
flang. After a brief reading of the relevant source code, I used
backtrace and backtrace_symbols in "execinfo.h" to quickly implement
this. But since I used the above two functions directly, my
implementation is slightly different from gfortran's implementation (in
the output, the function call stack before main is additionally output,
and the function line number is missing). In addition, since I used the
above two functions, I did not need to add -g to embed debug information
into the ELF file, but needed -rdynamic to ensure that the symbols are
added to the dynamic symbol table (so that the function name will be
printed out).
Here is a comparison of the output between gfortran 's backtrace and my
implementation:
gfortran's implemention output:
```
#0 0x557eb71f4184 in testfun2_
at /home/hunter/plct/fortran/test.f90:5
#1 0x557eb71f4165 in testfun1_
at /home/hunter/plct/fortran/test.f90:13
#2 0x557eb71f4192 in test_backtrace
at /home/hunter/plct/fortran/test.f90:17
#3 0x557eb71f41ce in main
at /home/hunter/plct/fortran/test.f90:18
```
my impelmention output:
```
Backtrace:
#0 ./test(_FortranABacktrace+0x32) [0x574f07efcf92]
#1 ./test(testfun2_+0x14) [0x574f07efc7b4]
#2 ./test(testfun1_+0xd) [0x574f07efc7cd]
#3 ./test(_QQmain+0x9) [0x574f07efc7e9]
#4 ./test(main+0x12) [0x574f07efc802]
#5 /usr/lib/libc.so.6(+0x25e08) [0x76954694fe08]
#6 /usr/lib/libc.so.6(__libc_start_main+0x8c) [0x76954694fecc]
#7 ./test(_start+0x25) [0x574f07efc6c5]
```
test program is:
```
function testfun2() result(err)
implicit none
integer :: err
err = 1
call backtrace
end function testfun2
subroutine testfun1()
implicit none
integer :: err
integer :: testfun2
err = testfun2()
end subroutine testfun1
program test_backtrace
call testfun1()
end program test_backtrace
```
I am well aware of the importance of line numbers, so I am now working
on implementing line numbers (by parsing DWARF information) and
supporting cross-platform (Windows) support.
Commit: 1858a4ebf0ebe9f1f3be6204af204e420e33bb6a
https://github.com/llvm/llvm-project/commit/1858a4ebf0ebe9f1f3be6204af204e420e33bb6a
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Stop.h
M flang/include/flang/Runtime/stop.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Stop.cpp
M flang/runtime/stop.cpp
R flang/test/Lower/Intrinsics/backtrace.f90
Log Message:
-----------
Revert "[flang]Add new intrinsic function backtrace and complete the TODO of abort" (#117990)
Reverts llvm/llvm-project#117603 due to failed buildbot
https://lab.llvm.org/buildbot/#/builders/152/builds/710
The important bit of the log was
```
FAILED: CMakeFiles/FortranRuntime.dir/stop.cpp.o
ccache /usr/bin/g++ -DFLANG_LITTLE_ENDIAN=1 -DGTEST_HAS_RTTI=0 -DRT_USE_LIBCUDACXX=1 -D_DEBUG -D_GLIBCXX_ASSERTIONS -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/home/buildbot/worker/as-builder-7/ramdisk/flang-runtime-cuda-gcc/llvm-project/flang/runtime/../include -I/home/buildbot/worker/as-builder-7/ramdisk/flang-runtime-cuda-gcc/build -I/home/buildbot/worker/third-party/nv/cccl/libcudacxx/include -fvisibility-inlines-hidden -Werror=date-time -fno-lifetime-dse -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -Wimplicit-fallthrough -Wno-nonnull -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment -Wno-misleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -fno-lto -O3 -DNDEBUG -U_GLIBCXX_ASSERTIONS -U_LIBCPP_ENABLE_ASSERTIONS -UNDEBUG -std=c++17 -fno-exceptions -fno-unwind-tables -fno-asynchronous-unwind-tables -fno-rtti -MD -MT CMakeFiles/FortranRuntime.dir/stop.cpp.o -MF CMakeFiles/FortranRuntime.dir/stop.cpp.o.d -o CMakeFiles/FortranRuntime.dir/stop.cpp.o -c /home/buildbot/worker/as-builder-7/ramdisk/flang-runtime-cuda-gcc/llvm-project/flang/runtime/stop.cpp
/home/buildbot/worker/as-builder-7/ramdisk/flang-runtime-cuda-gcc/llvm-project/flang/runtime/stop.cpp:19:10: fatal error: llvm/Config/config.h: No such file or directory
19 | #include "llvm/Config/config.h"
| ^~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
```
CC @dty2
Commit: 6f55d7d22c1ebf2b8425c5864b335762bc3d5363
https://github.com/llvm/llvm-project/commit/6f55d7d22c1ebf2b8425c5864b335762bc3d5363
Author: Christian Sigg <csigg at google.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Port https://github.com/llvm/llvm-project/commit/79eb406a67fe08458548289da72cda18248a9313
Commit: cf47898453c83c977f92155c03e9cf205bfb2b19
https://github.com/llvm/llvm-project/commit/cf47898453c83c977f92155c03e9cf205bfb2b19
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
Log Message:
-----------
[clang] Remove unused lambda capture. (#117988)
Fixes regression in sanitizer buildbots caused by #116257.
Commit: b7749efb749541716b6785c48fc8d6c2a4453ffb
https://github.com/llvm/llvm-project/commit/b7749efb749541716b6785c48fc8d6c2a4453ffb
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M mlir/lib/Dialect/MPI/IR/CMakeLists.txt
M mlir/test/Conversion/MeshToMPI/convert-mesh-to-mpi.mlir
Log Message:
-----------
adding MLIRMemRefDialect (#117986)
fixing post-CI failures #104566
Commit: 32ef417603e1b747c2be946f8193fdb7c31d957e
https://github.com/llvm/llvm-project/commit/32ef417603e1b747c2be946f8193fdb7c31d957e
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/cmake/modules/AddLLVM.cmake
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
Log Message:
-----------
Fix CMake dependencies on mlir-linalg-ods-yaml-gen (#113565)
Fix a number of dependencies issue to build mlir-linalg-ods-yaml-gen
host binary which make a cross-build using the Make generator fail.
Namely:
- do not use binary path for the custom target created when
LLVM_USE_HOST_TOOLS is true;
- use target name instead of name of variable holding the target name
for add_custom_target and set_target_properties in setup_host_tool();
- force setting of executable and target cache variable which are only
used as global variables;
- remove dependency on target defined in different directory in
add_linalg_ods_yaml_gen() since add_custom_target DEPENDS can only be
used on "files and outputs of custom commands created with
add_custom_command() command calls in the same directory";
- remove unneeded dependency on ${MLIR_LINALG_ODS_YAML_GEN_EXE}, the
target dependency will ensure the binary will be built.
Note that we keep using ${MLIR_LINALG_ODS_YAML_GEN_EXE} in the COMMAND
rather than use ${MLIR_LINALG_ODS_YAML_GEN_TARGET} because when
LLVM_NATIVE_TOOL_DIR is used the latter is an empty string.
Testing-wise, all three codepaths in get_host_tool_path() were tested
with both GNU Make and Ninja generators:
- cross-compiling with LLVM_NATIVE_TOOL_DIR checks the if path;
- cross-compiling without LLVM_NATIVE_TOOL_DIR checks the elseif path;
- native build without LLVM_NATIVE_TOOL_DIR checks the else path.
Commit: 6e720df1ae23c715aefc36476ab46284a96e9371
https://github.com/llvm/llvm-project/commit/6e720df1ae23c715aefc36476ab46284a96e9371
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
Log Message:
-----------
[clang] Improve the lifetime_capture_by diagnostic on the constructor. (#117792)
With this change, the lifetime_capture_by code path will not handle the
constructor decl to avoid bogus diagnostics (see the testcase).
Instead, we reuse the lifetimebound code as the
lifetime_capture_by(this) has the same semantic as lifetimebound in
constructor. The downside is that the lifetimebound diagnostic is reused
for the capture case (I think it is not a big issue).
Fixes #117680
Commit: cb5bdf8ce095b0b9fe874545e4d54d97d552a1c4
https://github.com/llvm/llvm-project/commit/cb5bdf8ce095b0b9fe874545e4d54d97d552a1c4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedBroadwell.td
M llvm/lib/Target/X86/X86SchedHaswell.td
M llvm/test/tools/llvm-mca/X86/Broadwell/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Haswell/resources-sse2.s
Log Message:
-----------
[X86] Remove HSW/BDW incorrect MOVQ2DQ override
MOVQ2DQ is treated the same as other vector moves on Port015 (matches SandyBridge, not Skylake or later).
Confirmed by augner/uops.info
Commit: 5208bc3694473f9378fc0d98eeee63e5ad5c5f04
https://github.com/llvm/llvm-project/commit/5208bc3694473f9378fc0d98eeee63e5ad5c5f04
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
R offload/liboffload/API/APIDefs.td
R offload/liboffload/API/CMakeLists.txt
R offload/liboffload/API/Common.td
R offload/liboffload/API/Device.td
R offload/liboffload/API/OffloadAPI.td
R offload/liboffload/API/Platform.td
R offload/liboffload/API/README.md
R offload/liboffload/CMakeLists.txt
R offload/liboffload/README.md
R offload/liboffload/exports
R offload/liboffload/include/OffloadImpl.hpp
R offload/liboffload/include/generated/OffloadAPI.h
R offload/liboffload/include/generated/OffloadEntryPoints.inc
R offload/liboffload/include/generated/OffloadFuncs.inc
R offload/liboffload/include/generated/OffloadImplFuncDecls.inc
R offload/liboffload/include/generated/OffloadPrint.hpp
R offload/liboffload/src/Helpers.hpp
R offload/liboffload/src/OffloadImpl.cpp
R offload/liboffload/src/OffloadLib.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
R offload/test/tools/offload-tblgen/default_returns.td
R offload/test/tools/offload-tblgen/entry_points.td
R offload/test/tools/offload-tblgen/functions_basic.td
R offload/test/tools/offload-tblgen/functions_code_loc.td
R offload/test/tools/offload-tblgen/functions_ranged_param.td
R offload/test/tools/offload-tblgen/print_enum.td
R offload/test/tools/offload-tblgen/print_function.td
R offload/test/tools/offload-tblgen/type_tagged_enum.td
R offload/tools/offload-tblgen/APIGen.cpp
R offload/tools/offload-tblgen/CMakeLists.txt
R offload/tools/offload-tblgen/EntryPointGen.cpp
R offload/tools/offload-tblgen/FuncsGen.cpp
R offload/tools/offload-tblgen/GenCommon.hpp
R offload/tools/offload-tblgen/Generators.hpp
R offload/tools/offload-tblgen/PrintGen.cpp
R offload/tools/offload-tblgen/RecordTypes.hpp
R offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
R offload/unittests/OffloadAPI/CMakeLists.txt
R offload/unittests/OffloadAPI/common/Environment.cpp
R offload/unittests/OffloadAPI/common/Environment.hpp
R offload/unittests/OffloadAPI/common/Fixtures.hpp
R offload/unittests/OffloadAPI/device/olDeviceInfo.hpp
R offload/unittests/OffloadAPI/device/olGetDevice.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceCount.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
R offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatform.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformCount.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformInfo.cpp
R offload/unittests/OffloadAPI/platform/olGetPlatformInfoSize.cpp
R offload/unittests/OffloadAPI/platform/olPlatformInfo.hpp
Log Message:
-----------
Revert "Reland #2 - [Offload] Introduce offload-tblgen and initial new API implementation (#108413. #117704)" (#117995)
Reverts llvm/llvm-project#117894
Buildbot failures in OpenMP/Offload bots.
https://lab.llvm.org/buildbot/#/builders/30/builds/11193
Commit: 392bd3404b98c2be74e4e94d2019dffaa85919eb
https://github.com/llvm/llvm-project/commit/392bd3404b98c2be74e4e94d2019dffaa85919eb
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
Log Message:
-----------
[WebAssembly] use poison instead of undef as placeholder for missing args [NFC]
Commit: 12ccb628da231f3ab751c8e7b759e9920d38510b
https://github.com/llvm/llvm-project/commit/12ccb628da231f3ab751c8e7b759e9920d38510b
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaAttr.cpp
Log Message:
-----------
[clang] Add a common definition of isPointerLikeType for lifetime analysis (#117315)
Also checks for annotation for template specializations which sometimes
may not have the annotation attached.
Commit: e4ee970c4b286b472a4c0b0cb43da85f77e97d79
https://github.com/llvm/llvm-project/commit/e4ee970c4b286b472a4c0b0cb43da85f77e97d79
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_cvt.c
A clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_cvt.c
M clang/utils/TableGen/SveEmitter.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
A llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
Log Message:
-----------
[AArch64] Implement intrinsics for F1CVTL/F2CVTL and BF1CVTL/BF2CVTL (#116959)
This patch implements the following intrinsics:
8-bit floating-point convert to deinterleaved half-precision or
BFloat16.
``` c
// Variant is also available for: _bf16[_mf8]_x2
svfloat16x2_t svcvtl1_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
svfloat16x2_t svcvtl2_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
```
Defined in https://github.com/ARM-software/acle/pull/323
Co-authored-by: Caroline Concatto caroline.concatto at arm.com
Co-authored-by: Marian Lukac marian.lukac at arm.com
Commit: c952f0ee5436318733c1ab21a8a7402f7f0a4caa
https://github.com/llvm/llvm-project/commit/c952f0ee5436318733c1ab21a8a7402f7f0a4caa
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/critical_within_default.f90
Log Message:
-----------
[Flang][OpenMP] Do not default privatize symbols that are not variables (#117886)
Fixes an issue where the compiler is trying to default privatize
construct names.
Fixes #112572
Commit: 53326ee0cf45fce3f80e2e98638dd27edb20c516
https://github.com/llvm/llvm-project/commit/53326ee0cf45fce3f80e2e98638dd27edb20c516
Author: Nathan Gauër <brioche at google.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchUnreachable.ll
M llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll
M llvm/test/CodeGen/SPIRV/branching/if-merging.ll
M llvm/test/CodeGen/SPIRV/branching/if-non-merging.ll
M llvm/test/CodeGen/SPIRV/instructions/ret-type.ll
M llvm/test/CodeGen/SPIRV/structurizer/basic-if.ll
M llvm/test/CodeGen/SPIRV/structurizer/basic-loop.ll
M llvm/test/CodeGen/SPIRV/structurizer/basic-phi.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.cond-op.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.for.continue.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.for.nested.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.for.plain.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.for.short-circuited-cond.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.if.for.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.if.nested.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.return.early.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.simple2.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.while.continue.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.while.nested.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.while.plain.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.while.short-circuited-cond.ll
M llvm/test/CodeGen/SPIRV/structurizer/condition-linear.ll
M llvm/test/CodeGen/SPIRV/structurizer/do-continue.ll
M llvm/test/CodeGen/SPIRV/structurizer/do-nested.ll
M llvm/test/CodeGen/SPIRV/structurizer/do-plain.ll
M llvm/test/CodeGen/SPIRV/structurizer/logical-or.ll
M llvm/test/CodeGen/SPIRV/structurizer/loop-continue-split.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-simple-while-identity.ll
M llvm/test/CodeGen/SPIRV/structurizer/return-early.ll
M llvm/unittests/Target/SPIRV/CMakeLists.txt
A llvm/unittests/Target/SPIRV/SPIRVSortBlocksTests.cpp
Log Message:
-----------
[SPIR-V] Fix block sorting with irreducible CFG (#116996)
Block sorting was assuming reducible CFG. Meaning we always had a best
node to continue with. Irreducible CFG makes breaks this assumption, so
the algorithm looped indefinitely because no node was a valid candidate.
Fixes #116692
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 79dab3f5ebac85b7cd1f4b1943d72776db9bcf70
https://github.com/llvm/llvm-project/commit/79dab3f5ebac85b7cd1f4b1943d72776db9bcf70
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
A llvm/test/Analysis/CostModel/X86/shuffle-splat-codesize.ll
A llvm/test/Analysis/CostModel/X86/shuffle-splat-latency.ll
A llvm/test/Analysis/CostModel/X86/shuffle-splat-sizelatency.ll
A llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
Log Message:
-----------
[CostModel][X86] Add shuffle 'splat' tests for broadcasts of non-zero element index.
As noticed on #115201 - its possible for SK_Broadcast to occur for non-zero element index which we don't currently handle.
Commit: ddaf1d68784a03fd3d476e25689f25ba9c5f961a
https://github.com/llvm/llvm-project/commit/ddaf1d68784a03fd3d476e25689f25ba9c5f961a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
A llvm/test/CodeGen/X86/gfni-lzcnt.ll
A llvm/test/CodeGen/X86/gfni-tzcnt.ll
Log Message:
-----------
[X86] Add GFNI test coverage for vXi8 LZCNT/TZCNT
Commit: 07a8ebed56cfa223d1587903e4de0d5788b5f777
https://github.com/llvm/llvm-project/commit/07a8ebed56cfa223d1587903e4de0d5788b5f777
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/warn-memaccess.cpp
Log Message:
-----------
[clang] Move warning about memset/memcpy to NonTriviallyCopyable type… (#117387)
…s to its own flag
Namely -Wnontrivial-memcall, implied by -Wnontrivial-memaccess
This is a followup to #111434
Commit: c5cd1e958c2cea9fe5a6a9087c3481537d598e24
https://github.com/llvm/llvm-project/commit/c5cd1e958c2cea9fe5a6a9087c3481537d598e24
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector_bool.h
M libcxx/test/std/containers/sequences/vector.bool/ctor_exceptions.pass.cpp
A libcxx/test/std/containers/sequences/vector/common.h
Log Message:
-----------
[libc++] Add exception guard for vector<bool>::__init_with_sentinel (#115491)
As a drive-by, also improve the test coverage for throwing exceptions
in vector<bool> constructors.
Commit: 3923e0451a4b02c4fe7c394e0f0ec90708ebca7a
https://github.com/llvm/llvm-project/commit/3923e0451a4b02c4fe7c394e0f0ec90708ebca7a
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
Log Message:
-----------
[AMDGPU] Preserve all analyses if nothing changed (#117994)
Commit: 6cbc37383f4ad32474a59976df3da0ee53f68fed
https://github.com/llvm/llvm-project/commit/6cbc37383f4ad32474a59976df3da0ee53f68fed
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/CMakeLists.txt
R libcxx/src/legacy_pointer_safety.cpp
Log Message:
-----------
[libc++] Remove the pointer safety functions from the dylib (#117390)
The pointer safety functions were never implemented by anyone in a
non-trivial way, which lead us to removing them entirely from the
headers when they were removed in C++23. This also means that just about
nobody ever called these functions, especially not in production code.
Because of that, we expect there to be no references in the wild to the
functions in the dylib. Because of that, this patch removes the symbols
from the dylib.
Commit: c4fbb6500a557fec592af8b9c398169591cdcc5d
https://github.com/llvm/llvm-project/commit/c4fbb6500a557fec592af8b9c398169591cdcc5d
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
A llvm/test/tools/llvm-debuginfo-analyzer/DWARF/DW_AT_GNU_template_name.test
A llvm/test/tools/llvm-debuginfo-analyzer/DWARF/Inputs/DW_AT_GNU_template_name.ll
Log Message:
-----------
[llvm-debuginfo-analyzer] Add support for DW_AT_GNU_template_name. (#115724)
For the given C++ code:
```
template <typename T> class Foo { T Member; };
template <template <typename T> class TemplateType>
class Bar {
TemplateType<int> Int;
};
template <template <template <typename> class> class TemplateTemplateType>
class Baz {
TemplateTemplateType<Foo> Foo;
};
typedef Baz<Bar> Example;
Example TT;
```
The '--attribute=encoded' option, will produce the logical view:
```
{Class} 'Foo<int>'
{Encoded} <int>
{Class} 'Bar<Foo>'
{Encoded} <> <-- Missing the template argument info (Foo)
{Class} 'Baz<Bar>'
{Encoded} <> <-- Missing the template argument info (Bar)
```
When the template argument is another template it is not included in the
{Encoded} field. The correct output should be:
```
{Class} 'Foo<int>'
{Encoded} <int>
{Class} 'Bar<Foo>'
{Encoded} <Foo>
{Class} 'Baz<Bar>'
{Encoded} <Bar>
```
Commit: b5ed375f9d63c1f37bb490f32898e6dc711c8a15
https://github.com/llvm/llvm-project/commit/b5ed375f9d63c1f37bb490f32898e6dc711c8a15
Author: Peter Waller <peter.waller at arm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/check-init-not-moved.s
Log Message:
-----------
[BOLT] Skip _init; avoiding GOT breakage for static binaries (#117751)
_init is used during startup of binaires. Unfortunately, its
address can be shared (at least on AArch64 glibc static binaries) with a
data
reference that lives in the GOT. The GOT rewriting is currently unable
to distinguish between data addresses and function addresses. This leads
to the data address being incorrectly rewritten, causing a crash on
startup of the binary:
Unexpected reloc type in static binary.
To avoid this, don't consider _init for being moved, by skipping it.
~We could add further conditions to narrow the skipped case for known
crashes, but as a straw man I thought it'd be best to keep the condition
as simple as possible and see if there any objections to this.~
(Edit: this broke the test
bolt/test/runtime/X86/retpoline-synthetic.test,
because _init was skipped from the retpoline pass and it has an indirect
call in it, so I include a check for static binaries now, which avoids
the test failure,
but perhaps this could/should be narrowed further?)
For now, skip _init for static binaries on any architecture; we could
add further conditions to narrow the skipped case for known crashes, but
as a straw man I thought it'd be best to keep the condition as simple as
possible and see if there any objections to this.
Updates #100096.
Commit: 3a01b46dae1a00f77ed8c46a4239595803c9e35e
https://github.com/llvm/llvm-project/commit/3a01b46dae1a00f77ed8c46a4239595803c9e35e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Move getGFNICtrlMask before CTLZ/CTTZ lowering. NFC.
Pulled out of #118012
Commit: 2a6e5896a572c3be47ffe78afed8ba6ef278d336
https://github.com/llvm/llvm-project/commit/2a6e5896a572c3be47ffe78afed8ba6ef278d336
Author: Rafael Eckstein <44746868+Casperento at users.noreply.github.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/MergeFunctions.h
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/unittests/Transforms/Utils/CMakeLists.txt
A llvm/unittests/Transforms/Utils/MergeFunctionsTest.cpp
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Utils/BUILD.gn
Log Message:
-----------
[MergeFunctions] Add support to run the pass over a set of function pointers (#111045)
This modification will enable the usage of `MergeFunctions` as a
standalone library. Currently, `MergeFunctions` can only be applied to
an entire module. By adopting this change, developers will gain the
flexibility to reuse the `MergeFunctions` code within their own
projects, choosing which functions to merge; hence, promoting code
reusability. Notice that this modification will not break backward
compatibility, because `MergeFunctions` will still work as a pass after
the modification.
Commit: b96e7570c991f1bb67646a20427a83f247326a25
https://github.com/llvm/llvm-project/commit/b96e7570c991f1bb67646a20427a83f247326a25
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/IPO/CMakeLists.txt
A llvm/unittests/Transforms/IPO/MergeFunctionsTest.cpp
M llvm/unittests/Transforms/Utils/CMakeLists.txt
R llvm/unittests/Transforms/Utils/MergeFunctionsTest.cpp
Log Message:
-----------
[UnitTests] Move MergeFunction test from Utils to IPO
So we depend on the correct library.
Commit: 45b567be8d0d430c786c41f826d192fadf863bb8
https://github.com/llvm/llvm-project/commit/45b567be8d0d430c786c41f826d192fadf863bb8
Author: Nathan Gauër <brioche at google.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.simple2.ll
M llvm/unittests/Target/SPIRV/CMakeLists.txt
A llvm/unittests/Target/SPIRV/SPIRVPartialOrderingVisitorTests.cpp
Log Message:
-----------
[SPIR-V] Add partial order tests, assert reducible (#117887)
Add testing for the visitor and added a note explaining irreducible CFG
are not supported.
Related to #116692
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 66d350a01738c0c64a28b943af5e995a5fbc348d
https://github.com/llvm/llvm-project/commit/66d350a01738c0c64a28b943af5e995a5fbc348d
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
A llvm/test/CodeGen/PowerPC/ssubo-32.ll
Log Message:
-----------
[PowerPC][NFC] Pre-commit test case to prepare for patch to custom lower ssubo
Commit: f623df6376b94906671ad6e875e6f504b74fed31
https://github.com/llvm/llvm-project/commit/f623df6376b94906671ad6e875e6f504b74fed31
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
A llvm/test/Transforms/InstSimplify/icmp-monotonic.ll
Log Message:
-----------
[InstSimplify] Add tests for monotonic icmps (NFC)
Commit: 12cefcc7ecd2615069206b35b0ea81b9e78bb1ea
https://github.com/llvm/llvm-project/commit/12cefcc7ecd2615069206b35b0ea81b9e78bb1ea
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
A llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-int-also-fusable-multiply.ll
Log Message:
-----------
[Matrix] Skip already fused instructions before trying to fuse multiply.
lowerDotProduct called above may already lower a matrix multiply and
mark it as procssed by adding it to FusedInsts. Don't try to process it
again in LowerMatrixMultiplyFused by checking if FusedInsts.
Without this change, we trigger an assertion when trying to erase the
same original matrix multiply twice.
Commit: 26fd693b979f17c83cbd5a3313fdea950ce3d356
https://github.com/llvm/llvm-project/commit/26fd693b979f17c83cbd5a3313fdea950ce3d356
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AMDGPU/coalescer-undef-subreg-use-invalid-lanemask.mir
Log Message:
-----------
RegisterCoalescer: Fix creating full / empty subrange on undef subreg use (#117936)
Commit: aa5cdcea3950b26a6b755201706bb1961e65eaa5
https://github.com/llvm/llvm-project/commit/aa5cdcea3950b26a6b755201706bb1961e65eaa5
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
LAA: improve code in a couple of routines (NFC) (#108092)
Commit: 4e8eabd93e2c60a9dc2f6afde506012fbca77f81
https://github.com/llvm/llvm-project/commit/4e8eabd93e2c60a9dc2f6afde506012fbca77f81
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/test/Transforms/DeadStoreElimination/offsetted-overlapping-stores.ll
M llvm/test/Transforms/DeadStoreElimination/stores-of-existing-values.ll
Log Message:
-----------
DSE: pre-commit tests for scalable vectors (#110669)
As AliasAnalysis now has support for scalable sizes, add tests to
DeadStoreElimination covering the scalable vectors case, in preparation
to extend it.
Commit: b207a17ea07df4cbcae5509dee3e8e1d09a485df
https://github.com/llvm/llvm-project/commit/b207a17ea07df4cbcae5509dee3e8e1d09a485df
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
R llvm/utils/merge-json.py
M runtimes/CMakeLists.txt
Log Message:
-----------
Revert "[Runtimes] Merge 'compile_commands.json' files from runtimes build (#116303)"
This reverts commit 054f914741421ca9dd1eaa58ea74a20f8695bae6, which was
found to break the runtimes build.
Commit: 261a4026e8a367eda229879838709b92abaf445c
https://github.com/llvm/llvm-project/commit/261a4026e8a367eda229879838709b92abaf445c
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/test/Integration/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Transforms/OpenMP/lower-workshare-alloca.mlir
Log Message:
-----------
[Flang][OpenMP] Use internal linkage for OpenMP code-gen'ed helper functions (#117911)
When compiling WORKSHARE construct in different compilation units, a
linker error happened, when two equal WORKSHARE constructs with a copy
operation have been compiled:
```
/usr/bin/ld: module2.o: in function `_workshare_copy_f64':
FIRModule:(.text+0x0): multiple definition of `_workshare_copy_f64'; module1.o:FIRModule:(.text+0x0): first defined here
```
Reason is that the generate copy function has the wrong linkage:
```
0000000000000000 T _workshare_copy_f64
```
while it should be
```
0000000000000000 t _workshare_copy_f64
```
Commit: 335cfb3441242a78447d1db42cd67ce9eba829db
https://github.com/llvm/llvm-project/commit/335cfb3441242a78447d1db42cd67ce9eba829db
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/lib/Headers/avx512vpopcntdqintrin.h
M clang/lib/Headers/avx512vpopcntdqvlintrin.h
M clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c
M clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c
M clang/test/CodeGen/X86/builtin_test_helpers.h
Log Message:
-----------
[clang][x86] Add initial constexpr support for VPOPCNTDQ intrinsics (#118017)
#117473 added constexpr support to __builtin_elementwise_popcount - which the VPOPCNTDQ intrinsics just wrap.
Still working on how to make __builtin_ia32_select* intrinsic wrappers constexpr
Commit: 611ccfcae9842a1356195189d5595ef1684e3df4
https://github.com/llvm/llvm-project/commit/611ccfcae9842a1356195189d5595ef1684e3df4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
A llvm/test/CodeGen/X86/pr114360.ll
Log Message:
-----------
[X86] Add reduced test case for #114360
Commit: 448ac7d3418a31d35b462440c8bf644287efac8a
https://github.com/llvm/llvm-project/commit/448ac7d3418a31d35b462440c8bf644287efac8a
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
Log Message:
-----------
[lldb][Mach-O] Handle shared cache binaries correctly (#117832)
The Mach-O load commands have an LC_SYMTAB / struct symtab_command which
represents the offset of the symbol table (nlist records) and string
table for this binary. In a mach-o binary on disk, these are file
offsets. If a mach-o binary is loaded in memory with all segments
consecutive, the `symoff` and `stroff` are the offsets from the TEXT
segment (aka the mach-o header) virtual address to the virtual address
of the start of these tables.
However, if a Mach-O binary is a part of the shared cache, then the
segments will be separated -- they will have different slide values. And
it is possible for the LINKEDIT segment to be greater than 4GB away from
the TEXT segment in the virtual address space, so these 32-bit offsets
cannot express the offset from TEXT segment to these tables.
Create separate uint64_t variables to track the offset to the symbol
table and string table, instead of reusing the 32-bit ones in the
symtab_command structure.
rdar://140432279
Commit: a4c8ef0f401d86040594cc6f01bcdad9392e8ee2
https://github.com/llvm/llvm-project/commit/a4c8ef0f401d86040594cc6f01bcdad9392e8ee2
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Fix detecting _Float16 support for secondary targets (#117813)
It turns out we were not passing -m32 to the check_c_source_compiles()
invocation since CMAKE_REQUIRE_FLAGS needs to be string separated list
and
we were passing a ;-separated CMake list which appears to be parsed by
CMake as 'ignore all arguments beyond the first'.
Fix this by transforming the list to a command line first.
With this change, Clang 17 no longer claims to support _Float16 for
i386.
Commit: dab4121a55225fd00f3db1cb232cf563ea573ef2
https://github.com/llvm/llvm-project/commit/dab4121a55225fd00f3db1cb232cf563ea573ef2
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
M llvm/test/CodeGen/PowerPC/ssubo-32.ll
Log Message:
-----------
[PowerPC] Add custom lowering for ssubo (#111748) (#115875)
This patch is to improve the codegen for ssubo node for i32 by custom lowering.
Commit: 961c66c57144ac46b65277338d9d1ebdc284e0df
https://github.com/llvm/llvm-project/commit/961c66c57144ac46b65277338d9d1ebdc284e0df
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/test/CodeGen/X86/pr114360.ll
Log Message:
-----------
[X86] shrinkAndImmediate - bail on failed constant fold
Workaround for issue #114360 where shrinkAndImmediate folds away the AND after the ZEXT has already been folded away to SUBREG_TO_REG losing the implicit zext guarantee.
There's the possibility that other instructions can result in a similar regression, but this is a stopgap until I can investigate whether shrinkAndImmediate needs to be replaced entirely.
Fixes #114360
Commit: 056153f36eca184f81969f5cd5c8cd967c935f96
https://github.com/llvm/llvm-project/commit/056153f36eca184f81969f5cd5c8cd967c935f96
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__vector/vector.h
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/GenerateInput.h
M libcxx/test/benchmarks/vector_operations.bench.cpp
Log Message:
-----------
Optimize vector::assign for InputIterator-only pair inputs (#113852)
This PR optimizes the input iterator overload of `assign(_InputIterator,
_InputIterator)` in `std::vector<_Tp, _Allocator>` by directly assigning
to already initialized memory, rather than first destroying existing
elements and then constructing new ones. By eliminating unnecessary
destruction and construction, the proposed algorithm enhances the
performance by up to 2x for trivial element types (e.g.,
`std::vector<int>`), up to 2.6x for non-trivial element types like
`std::vector<std::string>`, and up to 3.4x for more complex non-trivial
types (e.g., `std::vector<std::vector<int>>`).
### Google Benchmarks
Benchmark tests (`libcxx/test/benchmarks/vector_operations.bench.cpp`)
were conducted for the `assign()` implementations before and after this
patch. The tests focused on trivial element types like
`std::vector<int>`, and non-trivial element types such as
`std::vector<std::string>` and `std::vector<std::vector<int>>`.
#### Before
```
-------------------------------------------------------------------------------------------------
Benchmark Time CPU Iterations
-------------------------------------------------------------------------------------------------
BM_AssignInputIterIter/vector_int/1024/1024 1157 ns 1169 ns 608188
BM_AssignInputIterIter<32>/vector_string/1024/1024 14559 ns 14710 ns 47277
BM_AssignInputIterIter<32>/vector_vector_int/1024/1024 26846 ns 27129 ns 25925
```
#### After
```
-------------------------------------------------------------------------------------------------
Benchmark Time CPU Iterations
-------------------------------------------------------------------------------------------------
BM_AssignInputIterIter/vector_int/1024/1024 561 ns 566 ns 1242251
BM_AssignInputIterIter<32>/vector_string/1024/1024 5604 ns 5664 ns 128365
BM_AssignInputIterIter<32>/vector_vector_int/1024/1024 7927 ns 8012 ns 88579
```
Commit: 81c88135e402d3dfee7387acef86b173132cfb64
https://github.com/llvm/llvm-project/commit/81c88135e402d3dfee7387acef86b173132cfb64
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M libcxx/include/locale
Log Message:
-----------
[libc++] Use the __strtoNUM functions from __locale instead of the old API (#118029)
The commit where I switched from using the old locale base API to the
new functions defined inside the __locale namespace forgot to update
references to the strtoNUM functions. This patch fixes that.
Commit: 59716479fc2f78ccabb2fc47b23cdc636d4ce122
https://github.com/llvm/llvm-project/commit/59716479fc2f78ccabb2fc47b23cdc636d4ce122
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
A libcxx/docs/CodingGuidelines.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/DesignDocs/ExtendedCXX03Support.rst
R libcxx/docs/DesignDocs/NodiscardPolicy.rst
M libcxx/docs/index.rst
Log Message:
-----------
[libc++] Add coding guidelines to the docs (#117051)
We have a buch of coding guidelines which are either documented as
design docs, which aren't really applicable or not at all. This moves
coding guidelines we have currently in the design docs into a separate
file and adds a bunch of guidelines which we have but aren't documented
anywhere.
Commit: d648eed5899c4be10f1f7866eebef2bc171e673f
https://github.com/llvm/llvm-project/commit/d648eed5899c4be10f1f7866eebef2bc171e673f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++] Simplify the implementation of reserve() and shrink_to_fit() (#113453)
Since we changed the implementation of `reserve(size_type)` to only ever
extend,
it doesn't make a ton of sense anymore to have `__shrink_or_extend`,
since the code
paths of `reserve` and `shrink_to_fit` are now almost completely
separate.
This patch splits up `__shrink_or_extend` so that the individual parts
are in `reserve`
and `shrink_to_fit` depending on where they are needed.
Commit: d9c269577e6e68e1336461f266b20780f4d78dba
https://github.com/llvm/llvm-project/commit/d9c269577e6e68e1336461f266b20780f4d78dba
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Remove manual constant fold in VPWidenIntOrFpInductionRecipe. NFC (#118028)
This manual constant folding was added in 2017 in
https://reviews.llvm.org/D29956, but since then it looks like IRBuilder
has learnt to fold it away itself.
I'm not sure at what point this happened, I just verified this by
stepping through the call to CreateVectorSplat in the debugger.
Commit: d106a39c3372b924668f203fedbce69aa986cf50
https://github.com/llvm/llvm-project/commit/d106a39c3372b924668f203fedbce69aa986cf50
Author: David Green <david.green at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[AArch64] Minor cleanup and speedup for getVectorInstrCostHelper
If UserToExtractIdx is empty then we can skip checking the users.
Commit: f2d500c61701fc50f5c0c2cd9660a93e15ecc9b9
https://github.com/llvm/llvm-project/commit/f2d500c61701fc50f5c0c2cd9660a93e15ecc9b9
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Fix bug in `UnresolvedMaterializationRewrite` rollback (#105949)
When an unresolved materialization (`unrealized_conversion_cast` op) is
rolled back, the mapping should be rolled back as well, regardless of
whether it is a source, target or argument materialization. Otherwise,
we accumulate pointers to erased IR in the `mapping`. This is harmless
in most cases, but can cause issues when a new operation is allocated at
the same memory location and the pointer is "reused".
It is not possible to write a test case for this because I cannot
trigger the pointer reuse programmatically.
Commit: c2171d748685be8c7ce2366deefe01aaae1c61a0
https://github.com/llvm/llvm-project/commit/c2171d748685be8c7ce2366deefe01aaae1c61a0
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/LogicalView/BUILD.gn
Log Message:
-----------
[gn] port fb3765959f
Commit: 7c5300e73445310ba40515bc01c2da59d4c58d50
https://github.com/llvm/llvm-project/commit/7c5300e73445310ba40515bc01c2da59d4c58d50
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/SPIRV/BUILD.gn
Log Message:
-----------
[gn build] Port 45b567be8d0d
Commit: 958ab3a4a53357ddf27b7ccae8bdbae5878d3cca
https://github.com/llvm/llvm-project/commit/958ab3a4a53357ddf27b7ccae8bdbae5878d3cca
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/SPIRV/BUILD.gn
Log Message:
-----------
[gn build] Port 53326ee0cf45
Commit: bfa6c9a959e15e4548e411144fc7eda7d6b7e4dc
https://github.com/llvm/llvm-project/commit/bfa6c9a959e15e4548e411144fc7eda7d6b7e4dc
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn build] Port 6cbc37383f4a
Commit: eb42e94d9793d5426de64266ef637b3267ed0b40
https://github.com/llvm/llvm-project/commit/eb42e94d9793d5426de64266ef637b3267ed0b40
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Transforms/IPO/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port b96e7570c991
Commit: c5ab28a42db95e287bf7f4623e8f5703b2f200d9
https://github.com/llvm/llvm-project/commit/c5ab28a42db95e287bf7f4623e8f5703b2f200d9
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
A llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.h
M llvm/test/CodeGen/AMDGPU/opt-vgpr-live-range-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
M llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.mir
Log Message:
-----------
[AMDGPU][NewPM] Port SIOptimizeVGPRLiveRange pass to NPM. (#117686)
Commit: dab9fa2d7f3b3092d4ab0c815868ec68a968a31a
https://github.com/llvm/llvm-project/commit/dab9fa2d7f3b3092d4ab0c815868ec68a968a31a
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M flang/lib/Optimizer/CodeGen/Target.cpp
A flang/test/Driver/mabi-loongarch.f90
A flang/test/Fir/struct-passing-loongarch64-byreg.fir
A flang/test/Fir/struct-passing-return-loongarch64-bystack.fir
A flang/test/Fir/struct-return-loongarch64-byreg.fir
Log Message:
-----------
[Flang] LoongArch64 support for BIND(C) derived types in mabi=lp64d. (#117108)
This patch:
- Supports both the passing and returning of BIND(C) type parameters.
- Adds `mabi` check for LoongArch64. Currently, flang only supports
`mabi=` option
set to `lp64d` in LoongArch64, other ABIs will report an error and may
be supported
in the future.
Reference ABI:
https://github.com/loongson/la-abi-specs/blob/release/lapcs.adoc#subroutine-calling-sequence
Commit: d714b221c77203107284544b8f5543bd4c35ccc9
https://github.com/llvm/llvm-project/commit/d714b221c77203107284544b8f5543bd4c35ccc9
Author: David Green <david.green at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/extract_float_streaming.ll
Log Message:
-----------
[AArch64] Guard against getRegisterBitWidth returning zero in vector instr cost. (#117749)
If the getRegisterBitWidth is zero (such as in sme streaming functions),
then we could hit a crash from using % RegWidth.
Commit: b2d3cb1e7502a5ddb7d6688dce5cf51573f6189c
https://github.com/llvm/llvm-project/commit/b2d3cb1e7502a5ddb7d6688dce5cf51573f6189c
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[TTI][RISCV] Remove deduplicate type-based VP costing of VPReduction.NFC (#117708)
Refered to: #115983
Commit: d83148f9b9debde1358f0686594da208ce33182e
https://github.com/llvm/llvm-project/commit/d83148f9b9debde1358f0686594da208ce33182e
Author: Abhishek Varma <avarma094 at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[MLIR][Affine] Update ::fold() to have constant basis attr for affine.delinearize_index/linearize_index (#117572)
-- This commit updates `::fold()` to have constant(CST)
attribute for affine.delinearize_index/linearize_index op's basis
wherever applicable.
-- Essentially the code checks if the mixed basis OpFoldResult
set contains any constant SSA value and converts it to a constant
integer instead.
Signed-off-by: Abhishek Varma <abhvarma at amd.com>
Commit: 8fcbba82d6c8038c4a0c5859275523414107b198
https://github.com/llvm/llvm-project/commit/8fcbba82d6c8038c4a0c5859275523414107b198
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcisls-invalid.s
A llvm/test/MC/RISCV/xqcisls-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcisls (Scaled Load Store) extension (#117987)
This extension adds 8 load/store instructions with a scaled index
addressing mode.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
Commit: d02c1676d75a6bab1252b48da9a955fc7dc1251f
https://github.com/llvm/llvm-project/commit/d02c1676d75a6bab1252b48da9a955fc7dc1251f
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/IndirectionUtils.h
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/Support/Error.h
M llvm/lib/ExecutionEngine/JITLink/COFF_x86_64.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/Object/Archive.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/Object/MachOUniversal.cpp
M llvm/lib/Object/Minidump.cpp
M llvm/lib/Object/TapiUniversal.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/Object/XCOFFObjectFile.cpp
M llvm/lib/Support/DataExtractor.cpp
Log Message:
-----------
[Support][Error] Add ErrorAsOutParameter constructor that takes an Error by ref.
ErrorAsOutParameter's Error* constructor supports cases where an Error might not
be passed in (because in the calling context it's known that this call won't
fail). Most clients always have an Error present however, and for them an Error&
overload is more convenient.
Commit: cf478bf744fa2aacb634b151b7f6c9844f0d3851
https://github.com/llvm/llvm-project/commit/cf478bf744fa2aacb634b151b7f6c9844f0d3851
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M libc/test/src/sys/mman/linux/process_mrelease_test.cpp
Log Message:
-----------
[libc] always clean up child process to avoid hanging ninja (#118049)
Commit: 01a15dca09e56dce850ab6fb3ecddfb3f8c6c172
https://github.com/llvm/llvm-project/commit/01a15dca09e56dce850ab6fb3ecddfb3f8c6c172
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.h
A llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access-zve32x.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sshl_sat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/vmfeq.ll
M llvm/test/CodeGen/RISCV/rvv/vmfge.ll
M llvm/test/CodeGen/RISCV/rvv/vmfgt.ll
M llvm/test/CodeGen/RISCV/rvv/vmfle.ll
M llvm/test/CodeGen/RISCV/rvv/vmflt.ll
M llvm/test/CodeGen/RISCV/rvv/vmfne.ll
M llvm/test/CodeGen/RISCV/rvv/vmseq.ll
M llvm/test/CodeGen/RISCV/rvv/vmsge.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgeu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgt.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgtu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsle.ll
M llvm/test/CodeGen/RISCV/rvv/vmsleu.ll
M llvm/test/CodeGen/RISCV/rvv/vmslt.ll
M llvm/test/CodeGen/RISCV/rvv/vmsltu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsne.ll
Log Message:
-----------
[RISCV] Set a barrier between mask producer and user of V0 (#114012)
Here we add a scheduling mutation in pre-ra scheduling, which will
add an artificial dependency edge between mask producer and its
previous nearest instruction that uses V0 register.
This prevents the overlap of live intervals of mask registers and
as a consequence we can reduce some spills/moves.
>From the test changes, we can see some improvements and also some
regressions (more vtype toggles).
Partially fixes #113489.
Commit: 9b163d2ee78383fe9a89e1f2e9c8c635a557cdf4
https://github.com/llvm/llvm-project/commit/9b163d2ee78383fe9a89e1f2e9c8c635a557cdf4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
[gn build] Port 01a15dca09e5
Commit: 9b5b3edd64e56af02295c0365269177443d4a64d
https://github.com/llvm/llvm-project/commit/9b5b3edd64e56af02295c0365269177443d4a64d
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/include/clang/Tooling/Inclusions/IncludeStyle.h
Log Message:
-----------
[clang-format][doc] Fix formatting, etc.
Commit: 18760ce0fd811140fe6cb9a01b766d73bb50bf4d
https://github.com/llvm/llvm-project/commit/18760ce0fd811140fe6cb9a01b766d73bb50bf4d
Author: AlexErofeev <framalex at nxt.ru>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/StmtPrinter.cpp
A clang/test/AST/ast-print-packindexingexpr.cpp
Log Message:
-----------
[Clang][AST] Fix PackIndexingExpr AST printout (#117947)
Fixes #116486
Also added a test
Commit: 2df0d2962725a26a1d8c438888f7e70946943589
https://github.com/llvm/llvm-project/commit/2df0d2962725a26a1d8c438888f7e70946943589
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
Log Message:
-----------
[mlir] Fix -Wsign-compare in AffineOps.cpp (NFC)
/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:4590:25:
error: comparison of integers of different signs: 'int64_t' (aka 'long') and 'size_t' (aka 'unsigned long') [-Werror,-Wsign-compare]
if (dynamicBasisIndex == dynamicBasis.size())
~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~
1 error generated.
Commit: 96dd39c575be64896995e08881b9bc27688ce5d1
https://github.com/llvm/llvm-project/commit/96dd39c575be64896995e08881b9bc27688ce5d1
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-28 (Thu, 28 Nov 2024)
Changed paths:
M compiler-rt/lib/xray/weak_symbols.txt
M compiler-rt/lib/xray/xray_flags.cpp
M compiler-rt/lib/xray/xray_flags.h
A compiler-rt/test/xray/TestCases/Posix/default-options.cpp
M llvm/docs/XRay.rst
Log Message:
-----------
[XRay] Add `__xray_default_options` to specify build-time defined options (#117921)
Similar to `__asan_default_options`, users can specify default options
upon building the instrumented binaries by providing their own
definition of `__xray_default_options` which returns the option strings.
This is useful in cases where setting the `XRAY_OPTIONS` environment
variable might be difficult. Plus, it's a convenient way to populate
XRay options when you always want the instrumentation to be enabled.
Commit: 3b43276575fc939b4f6e8089277fac083c770990
https://github.com/llvm/llvm-project/commit/3b43276575fc939b4f6e8089277fac083c770990
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
Log Message:
-----------
[ORC] Remove some SymbolStringPtr copies.
Commit: e034c4ef7b52635bb9cc78b6d3f97a4af5002f92
https://github.com/llvm/llvm-project/commit/e034c4ef7b52635bb9cc78b6d3f97a4af5002f92
Author: vabridgers <58314289+vabridgers at users.noreply.github.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/ChrootChecker.cpp
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/chroot.c
M clang/test/Analysis/show-checker-list.c
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
Log Message:
-----------
[analyzer] Modernize, improve and promote chroot checker (#117791)
This change modernizes, improves and promotes the chroot checker from
alpha to the Unix family of checkers. This checker covers the POS05
recommendations for use of chroot.
The improvements included modeling of a success or failure from chroot
and not falsely reporting a warning along an error path. This was made
possible through modernizing the checker to be flow sensitive.
---------
Co-authored-by: einvbri <vince.a.bridgers at ericsson.com>
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>
Commit: 91285e26bf67179a6804c931203c93f07c08183d
https://github.com/llvm/llvm-project/commit/91285e26bf67179a6804c931203c93f07c08183d
Author: Clement Courbet <courbet at google.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
A clang-tools-extra/test/clang-reorder-fields/FieldAnnotationsInMacros.cpp
Log Message:
-----------
[clang-reorder-fields] Handle macros fields declarations. (#118005)
Right now fields with macro declarations break the tool:
```
struct Foo {
Mutex mu;
int x GUARDED_BY(mu);
int y;
};
```
reordered by mu,y,x yields:
```
struct Foo {
Mutex mu;
int y GUARDED_BY(mu);
int x;
};
```
Commit: d7791f51cecbaaa81a65e4a16d781fbf338f9272
https://github.com/llvm/llvm-project/commit/d7791f51cecbaaa81a65e4a16d781fbf338f9272
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/unittests/DebugInfo/LogicalView/CMakeLists.txt
Log Message:
-----------
[llvm-debuginfo-analyzer] Remove superfluous link components. (#118052)
As 'LLVM_TARGETS_TO_BUILD' control which targets are enabled, the lines:
AllTargetsDescs
AllTargetsDisassemblers
AllTargetsInfos
are redundant.
Commit: aa9d36869090fdff8cd416c83a5106a1b45b0ff7
https://github.com/llvm/llvm-project/commit/aa9d36869090fdff8cd416c83a5106a1b45b0ff7
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization-scalable.mlir
Log Message:
-----------
[mlir][linalg] Relax scalable vectorization restrictions (#117991)
Currently, the Linalg vectorizer disallows non-trailing parallel
dimensions to be scalable, e.g., `vector_sizes [[8], 1]` (*), for cases
like:
```mlir
%0 = linalg.fill ins(%arg0 : f32) outs(%A : tensor<?x?xf32>) -> tensor<?x?xf32>
```
This restriction exists to avoid generating "scalable" arrays of
aggregates, which LLVM does not support (multi-dim vectors are lowered
into arrays of aggregates at the LLVM level).
This patch relaxes that restriction when the trailing parallel vector
dimension is `1`, e.g., for `vector_sizes [[8], 1]`. Such cases are safe
since trailing unit dimensions can be collapsed. This relaxation is
necessary to support scalable vectorization for tensor.pack, where inner
tile sizes are `[8]` (scalable) and `1` (scalar).
(*) Transform Dialect notation
Commit: a943922c0de52efb78e84e08dbc5d74f428b2377
https://github.com/llvm/llvm-project/commit/a943922c0de52efb78e84e08dbc5d74f428b2377
Author: bernhardu <bernhardu at mailbox.org>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Remove duplicate instruction `FF 25 ...`. (#116894)
It appears already some lines above with this comment:
"Cannot overwrite control-instruction. Return 0 to indicate failure.".
Replacing just the comment in the first appearance.
Found after creating the test in #113085.
Commit: 9b2ec87f5bce57cc900cf52a99f805d999716053
https://github.com/llvm/llvm-project/commit/9b2ec87f5bce57cc900cf52a99f805d999716053
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
M clang/test/Analysis/explain-svals.cpp
M clang/test/Analysis/iterator-modeling.cpp
M clang/test/Analysis/stl-algorithm-modeling-aggressive-std-find-modeling.cpp
M clang/test/Analysis/stl-algorithm-modeling.cpp
M clang/test/Analysis/template-param-objects.cpp
Log Message:
-----------
[analyzer] Avoid creating LazyCompoundVal when possible (#116840)
In #115916 I allowed copying empty structs.
Later in #115917 I changed how objects are copied, and basically when we
would want to copy a struct (an LCV) of a single symbol (likely coming
from an opaque fncall or invalidation), just directly bind that symbol
instead of creating an LCV referring to the symbol. This was an
optimization to skip a layer of indirection.
Now, it turns out I should have apply the same logic in #115916. I
should not have just blindly created an LCV by calling
`createLazyBinding()`, but rather check if I can apply the shortcut
described in #115917 and only create the LCV if the shortcut doesn't
apply.
In this patch I check if there is a single default binding that the copy
would refer to and if so, just return that symbol instead of creating an
LCV.
There shouldn't be any observable changes besides that we should have
fewer LCVs. This change may surface bugs in checkers that were
associating some metadata with entities in a wrong way. Notably,
STLAlgorithmModeling and DebugIteratorModeling checkers would likely
stop working after this change.
I didn't investigate them deeply because they were broken even prior to
this patch. Let me know if I should migrate these checkers to be just as
bugged as they were prior to this patch - thus make the tests pass.
Commit: 352f8688d0ca250c9e8774321f6c3bcd4298cc09
https://github.com/llvm/llvm-project/commit/352f8688d0ca250c9e8774321f6c3bcd4298cc09
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaAttr.cpp
M clang/test/AST/attr-lifetime-capture-by.cpp
Log Message:
-----------
[clang] Fix incorrect inferred lifetime_capture_by attr on STL (#118013)
We incorrectly annotate the iterator parameter for `insert` method
(`void insert(const_iterator, const value_type& value)`), because
iterator is also a gsl-pointer type.
This patch fixes it.
Commit: 27e01ee5aafb79a8aeca5fc9eb41e7f1243a7a46
https://github.com/llvm/llvm-project/commit/27e01ee5aafb79a8aeca5fc9eb41e7f1243a7a46
Author: Dmitry Sidorov <dmitry.sidorov at intel.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
Log Message:
-----------
[SPIR-V][NFC] Fix number of operands for cooperative matrix instructions (#118014)
This PR fixes number of operands of SPIR-V wrapper builtins for
cooperative matrix instructions.
Signed-off-by: Sidorov, Dmitry <dmitry.sidorov at intel.com>
Commit: 26baa00908b2eb8b2925800af6bc64fbe53cac48
https://github.com/llvm/llvm-project/commit/26baa00908b2eb8b2925800af6bc64fbe53cac48
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/AST/ByteCode/records.cpp
A clang/test/SemaCXX/cxx20-warn-dangling-paren-list-agg-init.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
Log Message:
-----------
[clang] Diagnose dangling references for parenthesized aggregate initialization. (#117690)
Unlike brace initialization, the parenthesized aggregate initialization
in C++20 does not extend the lifetime of a temporary object bound to a
reference in an aggreate. This can lead to dangling references:
```
struct A { const int& r; };
A a1(1); // well-formed, but results in a dangling reference.
```
With this patch, clang will diagnose this common dangling issues.
Fixes #101957
Commit: e9be21786c972de93206599d4e06b79c2ca8f772
https://github.com/llvm/llvm-project/commit/e9be21786c972de93206599d4e06b79c2ca8f772
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/cmake/modules/GetHostTriple.cmake
Log Message:
-----------
[CMake] Handle clang in MSVC mode in GetHostTriple (#116701)
When configuring CMake with Clang in MSVC mode, Clang can either be
invoked with the MSVC style driver (clang-cl) or the GNU style driver
(clang). When using the MSVC style driver, CMake sets the CMake variable
MSVC (which indicates the kind of command line interface), but when
using the GNU style driver, this variable isn't set, while Clang still
operates in MSVC mode.
Even though CMake doesn't set the variable MSVC, it still does set
CMAKE_C_COMPILER_ARCHITECTURE_ID, which it does set for MSVC and Clang
in MSVC mode, but not for Clang in MinGW mode.
For this configuration, use the MSVC style,
CMAKE_C_COMPILER_ARCHITECTURE_ID based GetHostTriple implementation.
Commit: ed7f36e1ecc26d6360126fc6ed0514b592fcc029
https://github.com/llvm/llvm-project/commit/ed7f36e1ecc26d6360126fc6ed0514b592fcc029
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] update a couple of struct/vector creation examples to use poison
Commit: a174aa1e416c4e27945f5a8c646b119126dc8441
https://github.com/llvm/llvm-project/commit/a174aa1e416c4e27945f5a8c646b119126dc8441
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/Wasm.cpp
Log Message:
-----------
[clang-repl] Fix generation of wasm binaries while running clang-repl in browser (#117978)
Co-authored-by: Vassil Vassilev <v.g.vassilev at gmail.com>
Commit: cb4f22c0a737b13c06f54566dac1e40cc4ec06c8
https://github.com/llvm/llvm-project/commit/cb4f22c0a737b13c06f54566dac1e40cc4ec06c8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/pr114360.ll
Log Message:
-----------
[X86] Adjust triple on test case for #114360
An attempt to fix a buildbot failure on clang-x64-windows-msvc
Commit: 26ffca08439f23e8db43beeb021c4cae32716822
https://github.com/llvm/llvm-project/commit/26ffca08439f23e8db43beeb021c4cae32716822
Author: lonely eagle <2020382038 at qq.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/test/Dialect/Affine/ops.mlir
Log Message:
-----------
[mlir][gpu]add AffineScope to gpu.func op. (#118010)
This PR in order to solve the following problem.
https://github.com/llvm/llvm-project/pull/117721.
To efficiently implement the thread-to-data mapping relationship, I
introduced AffineScope in gpu.func(Data or thread layout).
Commit: 9c97aa5abb6aa4ce4055095a89ae7d72e1b61803
https://github.com/llvm/llvm-project/commit/9c97aa5abb6aa4ce4055095a89ae7d72e1b61803
Author: Richard Dzenis <richard at dzenis.dev>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
A llvm/test/tools/llvm-objcopy/MachO/dysymtab-zero-indirectsym.test
Log Message:
-----------
[llvm-objcopy] Always update indirectsymoff in MachO (#117726)
Let's say we've run llvm-strip over some MachO. The resulting MachO
became smaller and there are no indirect symbols anymore.
Then according to previous code we would not update indirectsymoff
field. This would lead to `MachOWriter::totalSize()` report size that is
larger than the new MachO. As a result we would get MachO that has zero
bytes past contents of the very last load command.
Codesign has a strict check that size of MachO file must be equal to
lastLoadCommand.offset + lastLoadCommand.size
If this is not satisfied codesign reports the following error
main executable failed strict validation
Fixes #117723
Commit: 7ed36b9ec6147fbada27592292bca28f9f76c983
https://github.com/llvm/llvm-project/commit/7ed36b9ec6147fbada27592292bca28f9f76c983
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/pr114360.ll
Log Message:
-----------
[X86] Add missing REQUIRES to test case for #114360
Commit: 0d1d1b363d9588c192152cec4f256f3edfea7e48
https://github.com/llvm/llvm-project/commit/0d1d1b363d9588c192152cec4f256f3edfea7e48
Author: itrofimow <i.trofimow at yandex.ru>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
Log Message:
-----------
[DebugInfo] Clean up LLVMSymbolizer::DemangleName API: const string& -> StringRef (#118056)
Commit: b68340c83529bd8d13d1c4441777baa31863d1cf
https://github.com/llvm/llvm-project/commit/b68340c83529bd8d13d1c4441777baa31863d1cf
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
A llvm/include/llvm/CodeGen/SpillPlacement.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocGreedy.h
M llvm/lib/CodeGen/SpillPlacement.cpp
R llvm/lib/CodeGen/SpillPlacement.h
M llvm/lib/Passes/PassBuilder.cpp
Log Message:
-----------
[CodeGen][NewPM] Port SpillPlacement analysis to NPM (#116618)
Commit: 8dd0da5bd1c427a7ba2091b918c59b3ee7a8b79f
https://github.com/llvm/llvm-project/commit/8dd0da5bd1c427a7ba2091b918c59b3ee7a8b79f
Author: David Green <david.green at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
Log Message:
-----------
[AArch64] Silence warning with different types in ternary. NFC
This just casts the Register to an unsigned, to fit in with the other types
returned from the function.
Commit: 5540eac4e5161d124ac547e4a9d3451408bb71e9
https://github.com/llvm/llvm-project/commit/5540eac4e5161d124ac547e4a9d3451408bb71e9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][vector] Disable `from_elements` for scalable vectors (#117868)
Disables `vector.from_elements` for scalable vectors. Given that the
length of scalable vectors is unknown at compile time, the semantics of
this Op are unclear in this context.
Commit: 044362215d5264280abc807ea1da6c652530c926
https://github.com/llvm/llvm-project/commit/044362215d5264280abc807ea1da6c652530c926
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/mmx-cvt.ll
Log Message:
-----------
[X86] Add test for new _mm_movpi64_epi64 lowering
With the MMX retirement, _mm_movpi64_epi64 now lowers to shuffle((__m64)(double)x,(__m64)0) pattern - which demonstrates a unnecessary FPU->GPU->FPU transfer
Commit: 1784275e43976df2388a27805fb684def76c5c8a
https://github.com/llvm/llvm-project/commit/1784275e43976df2388a27805fb684def76c5c8a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-masked.ll
Log Message:
-----------
[X86] vector-shuffle-masked.ll - update extract_subvector shuffle tests to take poison arg instead of undef
Commit: 568ae0afabe07837ecfae8f8fe9dacf0de74a1e5
https://github.com/llvm/llvm-project/commit/568ae0afabe07837ecfae8f8fe9dacf0de74a1e5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/widen_shuffle-1.ll
Log Message:
-----------
[X86] widen_shuffle-1.ll - update shuffle tests to take poison arg instead of undef
Commit: e04d7549cca3b82fb0f71d2b073fa88654ae2212
https://github.com/llvm/llvm-project/commit/e04d7549cca3b82fb0f71d2b073fa88654ae2212
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[llvm][docs] Link to correct maintainers file for clang-tools-extra
5eeb3fef61bf5542c3fdcb71622fc4e826527789 moved it from CODE_OWNERS.txt.
Commit: 59f57be94f38758616b1339b293b43af845571af
https://github.com/llvm/llvm-project/commit/59f57be94f38758616b1339b293b43af845571af
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
Revert "[libc++] Simplify the implementation of reserve() and shrink_to_fit() (#113453)"
This reverts commit d648eed5899c4be10f1f7866eebef2bc171e673f. Breaks
anything that relies on sized deallocation, e.g. asan and tcmalloc.
Commit: 55dd475d1d89db5cd23534a4d9b200854410703d
https://github.com/llvm/llvm-project/commit/55dd475d1d89db5cd23534a4d9b200854410703d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/mmx-cvt.ll
Log Message:
-----------
[X86] Fold (v2i64 (scalar_to_vector (i64 (bitcast (double))))) -> (bitcast (v2f64 scalar_to_vector))
This can occur more frequently after the MMX retirement if anyone is still using MMX intrinsics that now wrap to SSE
Commit: baaf1115ca007f95fd08c52dc8bec54d310f5b27
https://github.com/llvm/llvm-project/commit/baaf1115ca007f95fd08c52dc8bec54d310f5b27
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/BitmaskEnum.h
M llvm/unittests/ADT/BitmaskEnumTest.cpp
Log Message:
-----------
[BitmaskEnum] Add support for shift operators. (#118007)
For enums that describe a bitmask where successive bits within that mask
describe some enum value (as described in the same enum), it is useful
to support operator<< and operator>> as well.
For example:
```
enum class E : unsigned {
// 2 bits per option
OptionA = 0,
OptionB = 1,
OptionC = 2,
OptionD = 3,
OptionMask = 3,
// Given 3 values in the bitmask X, Y and Z, each is 2 bits in size
// and represents a choice of OptionA..OptionD.
ShiftX = 0,
ShiftY = 2,
ShiftZ = 4,
};
// The mask can be encoded with:
E mask;
mask |= getOptionFor(X) << E::ShiftX;
mask |= getOptionFor(Y) << E::ShiftY;
mask |= getOptionFor(Z) << E::ShiftZ;
// And to extract a value:
E OptionForX = (mask >> E::ShiftX) & E::OptionMask;
E OptionForY = (mask >> E::ShiftY) & E::OptionMask;
E OptionForZ = (mask >> E::ShiftZ) & E::OptionMask;
```
Commit: 9300274a12d758368c036812d903b73d70d64ea4
https://github.com/llvm/llvm-project/commit/9300274a12d758368c036812d903b73d70d64ea4
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/MC/RISCV/xqcicsr-invalid.s
M llvm/test/MC/RISCV/xqcicsr-valid.s
M llvm/test/MC/RISCV/xqcisls-invalid.s
M llvm/test/MC/RISCV/xqcisls-valid.s
Log Message:
-----------
[RISCV][NFCI] Fix Xqci Line Endings
Changes the new files for `Xqci`, including `Xqcicsr` and `Xqcisls`, to
use Unix line endings rather than Windows line endings.
Commit: bbea1dee28f4bd7cfa897a79e38c5331fca5d796
https://github.com/llvm/llvm-project/commit/bbea1dee28f4bd7cfa897a79e38c5331fca5d796
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/CodeGen/X86/avx512cfmulsh-instrinsics.ll
Log Message:
-----------
[X86][FP16] Fix masking problem of VF[,C]MADDCSH intrinsics (#118071)
Fixes: #98306
Commit: 6f4b4f41ca41d7d0b44a32d9968aef7667c68184
https://github.com/llvm/llvm-project/commit/6f4b4f41ca41d7d0b44a32d9968aef7667c68184
Author: David Green <david.green at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/sve-gather.ll
M llvm/test/Analysis/CostModel/AArch64/sve-scatter.ll
R llvm/test/Transforms/LoopVectorize/AArch64/scatter-cost.ll
Log Message:
-----------
[AArch64] Remove LoopVectorizer/AArch64/scatter-cost.ll test. NFC
This test checks the costs, not vectorization, so is better placed in the
existing gather/scatter cost modelling tests. An extra neoverse-v2 check line
has been added for both gathers and scatters.
Commit: f4974e09312afc9549fcfc0304b738d235da9eca
https://github.com/llvm/llvm-project/commit/f4974e09312afc9549fcfc0304b738d235da9eca
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/ashr-node-with-poison.ll
Log Message:
-----------
[SLP] Add a check for poison value in AShrChecker
Need to check if the value in AShrChecker is a poison before casting it
to instruction to avoid compiler crash
Fixes #118030
Commit: 2b3266c1701f315d7e89c81977800001563afacb
https://github.com/llvm/llvm-project/commit/2b3266c1701f315d7e89c81977800001563afacb
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-abs-neg.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (1/11) (#116259)
SVE2.2 introduces instructions with predicated forms with zeroing of the
inactive lanes. This allows in some cases to save a `movprfx` or a `mov`
instruction when emitting code for `_x` or `_z` variants of intrinsics.
This patch adds support for emitting the zeroing forms of `ABS`, `NEG`,
`FABS`, and `FNEG` instructions.
Commit: e973f7ae52e753ebe53f5414ddf1c4d29e49deb5
https://github.com/llvm/llvm-project/commit/e973f7ae52e753ebe53f5414ddf1c4d29e49deb5
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
Log Message:
-----------
[RISCV][Xqcicsr] Instructions have Side Effects (#118089)
Xqcicsr was added in #117169. I missed that `hasSideEffects` was set to
0, rather than 1 (which all other CSR-modifying instructions have).
This has no effect on the current assembly-only support, but I think is
worth fixing before I forget. I accidentally fixed the closing comment
in 9300274a12d758368c036812d903b73d70d64ea4.
Commit: ef86a31a593a023946a2dc805948360efdad3930
https://github.com/llvm/llvm-project/commit/ef86a31a593a023946a2dc805948360efdad3930
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/cmake/modules/GetHostTriple.cmake
Log Message:
-----------
[CMake] Fix mismatched endif warning
Caused by https://github.com/llvm/llvm-project/pull/116701.
Seems like a lot of arguments to repeat, so just use a plain endif().
Commit: 2a18162daa96e1cca5144a634bb03134405b52cb
https://github.com/llvm/llvm-project/commit/2a18162daa96e1cca5144a634bb03134405b52cb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Log Message:
-----------
[X86] update shuffle lowering tests to take poison arg instead of undef
Commit: 5c181a9191bfb758575329ff7eb8db4fc46ffac9
https://github.com/llvm/llvm-project/commit/5c181a9191bfb758575329ff7eb8db4fc46ffac9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-512.ll
M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
Log Message:
-----------
[X86] update vector shift lowering tests to take poison arg instead of undef
Commit: 38098b486e44ad077b674e512eee399fc6f5a30c
https://github.com/llvm/llvm-project/commit/38098b486e44ad077b674e512eee399fc6f5a30c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][vector] Disable CompressStoreOp/ExpandLoadOp for scalable vectors (#117538)
These operations were introduced as counterparts to the following LLVM
intrinsics:
* `@llvm.masked.expandload.*`,
* `@llvm.masked.compressstore.*`.
Currently, there is minimal test coverage for scalable vector use cases
involving these Ops (both LLVM and MLIR). Additionally, the verifier is
flawed - it incorrectly allows mixing fixed-width and scalable vectors.
To address these issues, scalable vector support for these Ops is being
disabled for now. This decision can be revisited if a clear need arises
for their use with scalable vectors in the future.
Commit: b40714b01206abef4130d3a39a90ac82aa96f18f
https://github.com/llvm/llvm-project/commit/b40714b01206abef4130d3a39a90ac82aa96f18f
Author: Tyler Nowicki <tyler.nowicki at amd.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
A llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[Coroutines][NFC] Refactor CoroCloner (#116885)
* Move CoroCloner to its own header. For now, the header is located in llvm/lib/Transforms/Coroutines
* Change private to protected to allow inheritance
* Create CoroSwitchCloner and move some of the switch specific code into this cloner. More code will follow in later commits.
Commit: ef50d790c276600da609b465259a8e636e3531bc
https://github.com/llvm/llvm-project/commit/ef50d790c276600da609b465259a8e636e3531bc
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M libcxx/utils/ci/run-buildbot-container
Log Message:
-----------
[libc++] Update run-buildbot-container with up-to-date image information
Commit: 31b7d4333a6c10aa8b7e1a7ca5aa0e281f124ec2
https://github.com/llvm/llvm-project/commit/31b7d4333a6c10aa8b7e1a7ca5aa0e281f124ec2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/extract-insert.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
M llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll
M llvm/test/CodeGen/X86/load-partial.ll
Log Message:
-----------
[DAG] Extend extract_element(bitcast(scalar_to_vector(X))) -> trunc(srl(X,C)) (#117900)
When extracting a smaller integer from a scalar_to_vector source, we were limited to only folding/truncating the lowest bits of the scalar source.
This patch extends the fold to handle extraction of any other element, by right shifting the source before truncation.
Fixes a regression from #117884
Commit: fe042904829b83a61c1f4bc904f8f9e5b6da891e
https://github.com/llvm/llvm-project/commit/fe042904829b83a61c1f4bc904f8f9e5b6da891e
Author: David Green <david.green at arm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/test/Analysis/CostModel/AArch64/sve-gather.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/sve-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
Log Message:
-----------
[AArch64] Change the default vscale-for-tuning to 1. (#117174)
Most AArch64 cpus outside of Neoverse V1 (256) and A64FX (512) have an
SVE vector length of 128, and in environments like Android (where no
mcpu option is common) we would expect all cpus to match. This patch
changes the default vector length to 128 with -mcpu=generic, to match
the most common case.
Commit: 8fb748b4a7c45b56c2e4f37c327fd88958ab3758
https://github.com/llvm/llvm-project/commit/8fb748b4a7c45b56c2e4f37c327fd88958ab3758
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/lib/Analysis/InlineCost.cpp
A llvm/test/Transforms/Inline/AArch64/memcpy-constant-size.ll
A llvm/test/Transforms/PhaseOrdering/AArch64/memcpy-constant-size.ll
Log Message:
-----------
[Inliner] Don't count a call penalty for foldable __memcpy_chk and similar (#117876)
When the size is an appropriate constant, __memcpy_chk will turn into a
memcpy that gets folded away by InstCombine. Therefore this patch avoids
counting these as calls for purposes of inlining costs.
This is only really relevant on platforms whose headers redirect memcpy
to __memcpy_chk (such as Darwin). On platforms that use intrinsics,
memcpy and similar functions are already exempt from call penalties.
Commit: 77c2b005539c4b0c0e2b7edeefd5f57b95019bc9
https://github.com/llvm/llvm-project/commit/77c2b005539c4b0c0e2b7edeefd5f57b95019bc9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
A .ci/metrics/Dockerfile
A .ci/metrics/metrics.py
A .ci/metrics/requirements.lock.txt
A .ci/metrics/requirements.txt
Log Message:
-----------
[CI] Upstream metrics script and container definition (#117461)
This patch includes the script that pulls information from Github and
pushes it to Grafana. This is currently running in the cluster and
pushes information to
https://llvm.grafana.net/public-dashboards/6a1c1969b6794e0a8ee5d494c72ce2cd.
This script is designed to accept other jobs relatively easily and can
be easily modified to look at other metrics.
Commit: be75a14207ab0dac6ad9f9097957f14a918ac611
https://github.com/llvm/llvm-project/commit/be75a14207ab0dac6ad9f9097957f14a918ac611
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/SemaTemplate/template-args-deduction-aggregates.cpp
Log Message:
-----------
[Clang] fix crash due to incorrect argument position in merging deduced template arguments (#118041)
Fixes #113659
Commit: 9ebab700cde7e47bd7b6c3386529262369e8fa2c
https://github.com/llvm/llvm-project/commit/9ebab700cde7e47bd7b6c3386529262369e8fa2c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
A .github/workflows/build-metrics-container.yml
Log Message:
-----------
[Github] Add new workflow to build metrics container (#117462)
This patch adds a new Github Actions workflow to build the metrics
container and push it to the Github Container Registry.
Commit: 820403c4e04db1f4adc8528bec33d393a5be3856
https://github.com/llvm/llvm-project/commit/820403c4e04db1f4adc8528bec33d393a5be3856
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/test/Analysis/initializer.cpp
Log Message:
-----------
[analyzer] Never create Regions wrapping reference TypedValueRegions (NFCI) (#118096)
Like in the test case:
```c++
struct String {
String(const String &) {}
};
struct MatchComponent {
unsigned numbers[2];
String prerelease;
MatchComponent(MatchComponent const &) = default;
};
MatchComponent get();
void consume(MatchComponent const &);
MatchComponent parseMatchComponent() {
MatchComponent component = get();
component.numbers[0] = 10;
component.numbers[1] = 20;
return component; // We should have no stack addr escape warning here.
}
void top() {
consume(parseMatchComponent());
}
```
When calling `consume(parseMatchComponent())` the
`parseMatchComponent()` would return a copy of a temporary of
`component`. That copy would invoke the
`MatchComponent::MatchComponent(const MatchComponent &)` ctor.
That ctor would have a (reference typed) ParamVarRegion, holding the
location (lvalue) of the object we are about to copy (&component). So
far so good, but just before evaluating the binding operation for
initializing the `numbers` field of the temporary, we evaluate the
ArrayInitLoopExpr representing the by-value elementwise copy of the
array `component.numbers`. This is represented by a LazyCompoundVal,
because we (usually) don't just copy large arrays and bind many
individual direct bindings. Rather, we take a snapshot by using a LCV.
However, notice that the LCV representing this copy would look like
this:
lazyCompoundVal{ParamVarRegion{"reference param of cctor"}.numbers}
Notice that it refers to the numbers field of a reference. It would be
much better to desugar the reference to the actual object, thus it
should be: `lazyCompoundVal{component.numbers}`
Actually, when binding the result of the ArrayInitLoopExpr to the
`temp_object.numbers` in the compiler-generated member initializer of
the cctor, we should have two individual direct bindings because this is
a "small array":
```
binding &Element{temp_object.numbers, 0} <- loadFrom(&Element{component.numbers, 0})
binding &Element{temp_object.numbers, 1} <- loadFrom(&Element{component.numbers, 1})
```
Where `loadFrom(...)` would be:
```
loadFrom(&Element{component.numbers, 0}): 10 U32b
loadFrom(&Element{component.numbers, 1}): 20 U32b
```
So the store should look like this, after PostInitializer of
`temp_object.numbers`:
```
temp_object at offset 0: 10 U32b
temp_object at offset 32: 20 U32b
```
The lesson is that it's okay to have TypedValueRegions of references as
long as we don't form subregions of those. If we ever want to refer to a
subregion of a "reference" we actually meant to "desugar" the reference
and slice a subregion of the pointee of the reference instead.
Once this canonicalization is in place, we can also drop the special
handling of references in `ProcessInitializer`, because now reference
TypedValueRegions are eagerly desugared into their referee region when
forming a subregion of it.
There should be no practical differences, but there are of course bugs
that this patch may surface.
Commit: b5132b7d044a5bc83eba9b09bd158cd77a511403
https://github.com/llvm/llvm-project/commit/b5132b7d044a5bc83eba9b09bd158cd77a511403
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVDuplicatesTracker.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_two_calls.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
M llvm/test/CodeGen/SPIRV/instructions/ret-type.ll
A llvm/test/CodeGen/SPIRV/pointers/builtin-ret-reg-type.ll
A llvm/test/CodeGen/SPIRV/pointers/gep-types-1.ll
A llvm/test/CodeGen/SPIRV/pointers/gep-types-2.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-chain-types.ll
M llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types.ll
A llvm/test/CodeGen/SPIRV/pointers/type-deduce-via-store-load-args-rev.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpGenericCastToPtr.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-event-null.ll
A llvm/test/CodeGen/SPIRV/validate/sycl-hier-par-basic.ll
Log Message:
-----------
[SPIR-V] Improve type inference: fix types of return values in call lowering (#116609)
Goals of the PR are:
* to ensure that correct types are applied to virtual registers which
were used as return values in call lowering. A reproducer is attached as
a new test case, before the PR it fails because spirv-val considers
output invalid due to wrong result/operand types in OpPhi's;
* improve type inference by speeding up postprocessing of types: by
limiting iterations by checking what remains to process, and processing
each instruction just once for any number of operands with uncomplete
types;
* improve type inference by more accurate work with uncomplete types
(pass uncomplete property to dependent operands, ensure consistency of
uncomplete-types data structure);
* change processing order and add traversing of PHI nodes when type
inference apply instructions results to specify/update/cast operands
type (fixes an issue with OpPhi's result type mismatch with operand
types).
Commit: 2de2e7aa6f82ac283bc17945ca9750c01016a331
https://github.com/llvm/llvm-project/commit/2de2e7aa6f82ac283bc17945ca9750c01016a331
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M .github/workflows/build-metrics-container.yml
Log Message:
-----------
[Github] Fix build metrics container push (#118130)
This patch fixes a couple typos that were preventing the build metrics
container job from pushing the container to GHCR.
Commit: cbf495fd12ba08c3a8e10dbcd482df1bf80736ed
https://github.com/llvm/llvm-project/commit/cbf495fd12ba08c3a8e10dbcd482df1bf80736ed
Author: Reno Dakota <paparodeo at proton.me>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/unsupported-option.c
Log Message:
-----------
[Clang][Driver] report unsupported option error when link + compile in same process (#116476)
Fixes: https://github.com/llvm/llvm-project/issues/116278
This change updates clang to report unsupported option errors regardless
of the command line argument order.
When clang is invoked with a source file and without `-c` it will both
compile and link. When an unsupported option is also part of the command
line clang should generated an error. However, if the source file name
comes before an object file, eg: `-lc`, the error is ignored.
```
$ clang --target=x86_64 -lc hello.c -mhtm
clang: error: unsupported option '-mhtm' for target 'x86_64'
$ echo $?
1
```
but if `-lc` comes after `hello.c` the error is dropped
```
$ clang --target=x86_64 hello.c -mhtm -lc
$ echo $?
0
```
after this change clang will report the error regardless of the command
line argument order.
Commit: 0ad6be1927f89cef09aa5d0fb244873f687997c9
https://github.com/llvm/llvm-project/commit/0ad6be1927f89cef09aa5d0fb244873f687997c9
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/SystemZ/vec-elt-insertion.ll
Log Message:
-----------
[SLPVectorizer, TargetTransformInfo, SystemZ] Improve SLP getGatherCost(). (#112491)
As vector element loads are free on SystemZ, this patch improves the cost
computation in getGatherCost() to reflect this.
getScalarizationOverhead() gets an optional parameter which can hold the actual
Values so that they in turn can be passed (by BasicTTIImpl) to
getVectorInstrCost().
SystemZTTIImpl::getVectorInstrCost() will now recognize a LoadInst and
typically return a 0 cost for it, with some exceptions.
Commit: 6bfb6d4092a284e1fcd135625c0e713d019f0572
https://github.com/llvm/llvm-project/commit/6bfb6d4092a284e1fcd135625c0e713d019f0572
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
Log Message:
-----------
[SmallPtrSet] Optimize contains (NFC) (#118092)
Instead of going through find_imp(), implement a specialized
contains_imp() that directly returns a boolean instead of a pointer that
needs to be compared to EndPointer().
This gives a compile-time improvement of around 0.2-0.3%.
Commit: 05ff6e7948df3c152982814ea2367c7b83138cea
https://github.com/llvm/llvm-project/commit/05ff6e7948df3c152982814ea2367c7b83138cea
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/Symbols.cpp
M lld/test/ELF/invalid-eh-frame3.s
M lld/test/ELF/invalid-eh-frame6.s
M lld/test/ELF/tls.s
M lld/test/ELF/undef-multi.s
M lld/test/ELF/undef.s
Log Message:
-----------
[ELF] Use lower case offset in getObjMsg
to improve consistency with other diagnostics. While here, migrate to
use ELFSyncStream to drop toStr/getCtx uses and avoid string overhead.
Commit: ae9b91acc76e03a3c38e2f92b59308c508901817
https://github.com/llvm/llvm-project/commit/ae9b91acc76e03a3c38e2f92b59308c508901817
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
Log Message:
-----------
[libc++] Fix malformed CSV entry for C++26 LWG issue
Commit: 2dc0de753b6df83e35f3d98e0e6a26c95e3399c0
https://github.com/llvm/llvm-project/commit/2dc0de753b6df83e35f3d98e0e6a26c95e3399c0
Author: Brian Cain <bcain at quicinc.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
Log Message:
-----------
[clang] recognize hexagon-*-ld.lld variants (#117338)
If we create a cross toolchain with a ${triple}-ld.lld symlink, clang
finds that symlink and when it uses it, it's not recognized as "lld".
Let's resolve that symlink and consider it when determining lld-ness.
For example, clang provides hexagon-link specific link arguments such as
`-mcpu=hexagonv65` and `-march=hexagon` when
hexagon-unknown-linux-musl-ld.lld is found. lld rejects this with the
following error:
hexagon-unknown-linux-musl-ld.lld: error: unknown emulation:
cpu=hexagonv65
Commit: 52690db47da36a739ee506d3b3a7457fb918dc1e
https://github.com/llvm/llvm-project/commit/52690db47da36a739ee506d3b3a7457fb918dc1e
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
Log Message:
-----------
[clang] Fix -Wdangling false negative regressions caused by 117315 (#118088)
A specialization declaration can have an attribute even if the primary
template does not, particularly when the specialization is instantiated
from an annotated using-alias declaration.
Fix #118064
Commit: 8ac2b77a11c9db9879557ce1c26e38628e1ef45f
https://github.com/llvm/llvm-project/commit/8ac2b77a11c9db9879557ce1c26e38628e1ef45f
Author: vabridgers <58314289+vabridgers at users.noreply.github.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp
M clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/branch-clone.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/redundant-expression.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/alpha-core-identicalexpr.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
R clang/lib/StaticAnalyzer/Checkers/IdenticalExprChecker.cpp
R clang/test/Analysis/identical-expressions.cpp
Log Message:
-----------
[analyzer] Remove alpha.core.IdenticalExpr Checker (#114715)
This change removes the alpha.core.IdenticalExpr static analysis checker
since it's checks are present in the clang-tidy checks
misc-redundant-expression and bugprone-branch-clone. This check was
implemented as a static analysis check using AST matching, and since
alpha and duplicated in 2 clang-tidy checks may be removed.
Co-authored-by: Vince Bridgers <vince.a.bridgers at ericsson.com>
Commit: 666de79595dc2460b7abca0b99d79d058c10cadf
https://github.com/llvm/llvm-project/commit/666de79595dc2460b7abca0b99d79d058c10cadf
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Move some ObjFile members to ELFFileBase to simplify getSrcMsg
Commit: f28e071dc075fd5591344bc5aabd7b298aaecf50
https://github.com/llvm/llvm-project/commit/f28e071dc075fd5591344bc5aabd7b298aaecf50
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[rtsan] NFC: Fix style of some interceptors not using MAYBE (#118145)
There were a few interceptors that weren't using the newer MAYBE style -
fixed them up for uniform style.
Commit: b22cc5a650deb729f4a1f18206e14971616d07ee
https://github.com/llvm/llvm-project/commit/b22cc5a650deb729f4a1f18206e14971616d07ee
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port 8ac2b77a11c9
Commit: 9df63b2651b2435c02a7d825953ca2ddc65c778e
https://github.com/llvm/llvm-project/commit/9df63b2651b2435c02a7d825953ca2ddc65c778e
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Dialect/Func/Transforms/DecomposeCallGraphTypes.cpp
M mlir/lib/Dialect/Func/Transforms/FuncConversions.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorDescriptor.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Transforms/decompose-call-graph-types.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Transforms] Add 1:N `matchAndRewrite` overload (#116470)
This commit adds a new `matchAndRewrite` overload to `ConversionPattern`
to support 1:N replacements. This is the first of two main PRs that
merge the 1:1 and 1:N dialect conversion drivers.
The existing `matchAndRewrite` function supports only 1:1 replacements,
as can be seen from the `ArrayRef<Value>` parameter.
```c++
LogicalResult ConversionPattern::matchAndRewrite(
Operation *op, ArrayRef<Value> operands /*adaptor values*/,
ConversionPatternRewriter &rewriter) const;
```
This commit adds a `matchAndRewrite` overload that is called by the
dialect conversion driver. By default, this new overload dispatches to
the original 1:1 `matchAndRewrite` implementation. Existing
`ConversionPattern`s do not need to be changed as long as there are no
1:N type conversions or value replacements.
```c++
LogicalResult ConversionPattern::matchAndRewrite(
Operation *op, ArrayRef<ValueRange> operands /*adaptor values*/,
ConversionPatternRewriter &rewriter) const {
// Note: getOneToOneAdaptorOperands produces a fatal error if at least one
// ValueRange has 0 or more than 1 value.
return matchAndRewrite(op, getOneToOneAdaptorOperands(operands), rewriter);
}
```
The `ConversionValueMapping`, which keeps track of value replacements
and materializations, still does not support 1:N replacements. We still
rely on argument materializations to convert N replacement values back
into a single value. The `ConversionValueMapping` will be generalized to
1:N mappings in the second main PR.
Before handing the adaptor values to a `ConversionPattern`, all argument
materializations are "unpacked". The `ConversionPattern` receives N
replacement values and does not see any argument materializations. This
implementation strategy allows us to use the 1:N infrastructure/API in
`ConversionPattern`s even though some functionality is still missing in
the driver. This strategy was chosen to keep the sizes of the PRs
smaller and to make it easier for downstream users to adapt to API
changes.
This commit also updates the the "decompose call graphs" transformation
and the "sparse tensor codegen" transformation to use the new 1:N
`ConversionPattern` API.
Note for LLVM conversion: If you are using a type converter with 1:N
type conversion rules or if your patterns are performing 1:N
replacements (via `replaceOpWithMultiple` or
`applySignatureConversion`), conversion pattern applications will start
failing (fatal LLVM error) with this error message: `pattern 'name' does
not support 1:N conversion`. The name of the failing pattern is shown in
the error message. These patterns must be updated to the new 1:N
`matchAndRewrite` API.
Commit: 04ab599363eacc156e11238da9343c1d9d90db56
https://github.com/llvm/llvm-project/commit/04ab599363eacc156e11238da9343c1d9d90db56
Author: Qizhi Hu <836744285 at qq.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/return-const-ref-from-parameter.cpp
Log Message:
-----------
[clang-tidy] fix false positive in bugprone-return-const-ref-from-parameter (#117734)
Fix https://github.com/llvm/llvm-project/issues/115743
Commit: 1f13713dbb323d678c37efd5aa98a69e8f633b26
https://github.com/llvm/llvm-project/commit/1f13713dbb323d678c37efd5aa98a69e8f633b26
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Target.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Change getSrcMsg to use ELFSyncStream. NFC
Commit: 58389b220a9354ed6c34bdb9310a35165579c5e3
https://github.com/llvm/llvm-project/commit/58389b220a9354ed6c34bdb9310a35165579c5e3
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/FIROpPatterns.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir] Fix build after #116470 (#118147)
This should have been part of #116470.
Commit: 10b98473e8f9e3886bd4a51966c755d760de14ed
https://github.com/llvm/llvm-project/commit/10b98473e8f9e3886bd4a51966c755d760de14ed
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M lld/ELF/ICF.cpp
Log Message:
-----------
[ELF] Simplify --print-icf-sections
Commit: ee19eb3037c781361e6f82c524b500ed5f55be18
https://github.com/llvm/llvm-project/commit/ee19eb3037c781361e6f82c524b500ed5f55be18
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Writer.cpp
M lld/test/ELF/linkerscript/i386-sections-max-va-overflow.s
M lld/test/ELF/linkerscript/locationcountererr-arm-exidx.test
M lld/test/ELF/linkerscript/sections-max-va-overflow.s
Log Message:
-----------
[ELF] Change some upper-case utohexstr to lower-case to improve consistency
The convention is to use lower-case addresses.
Commit: b9ac390cc7ec208fc738a91540b070f499b292b8
https://github.com/llvm/llvm-project/commit/b9ac390cc7ec208fc738a91540b070f499b292b8
Author: antangelo <contact at antangelo.com>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
Log Message:
-----------
[GISel] Add generic implementation for @llvm.expect.with.probability when optimizations are disabled (#117835)
Handle @llvm.expect.with.probability in GlobalISel in the same way
@llvm.expect is handled, passing the value through as-is. This can be
encountered if the intrinsic is used without optimizations, which would
otherwise transform it out.
Fixes #115411 for GlobalISel
Commit: 691e55643daa3470ff19b02a55e3e2503d2de0c9
https://github.com/llvm/llvm-project/commit/691e55643daa3470ff19b02a55e3e2503d2de0c9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-29 (Fri, 29 Nov 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Driver] BuildCompilation: remove unused BaseArg. NFC
setBaseArg, only used by -XArch_* options, are called in BuildJobs.
When processing --config and CL /clang:, BaseArg is always nullptr.
The unneeded parameter was introduced in https://reviews.llvm.org/D24933
Commit: a348f223cab54b21a7b1c38dec7bc6aa2f81c949
https://github.com/llvm/llvm-project/commit/a348f223cab54b21a7b1c38dec7bc6aa2f81c949
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrFormats.td
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/test/CodeGen/ARM/add-like-or.ll
M llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
M llvm/test/CodeGen/ARM/atomic-64bit.ll
M llvm/test/CodeGen/ARM/atomic-ops-v8.ll
M llvm/test/CodeGen/ARM/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/ARM/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
M llvm/test/CodeGen/ARM/bfi.ll
M llvm/test/CodeGen/ARM/cmov_fp16.ll
M llvm/test/CodeGen/ARM/cse-call.ll
M llvm/test/CodeGen/ARM/cttz.ll
M llvm/test/CodeGen/ARM/fadd-select-fneg-combine.ll
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fpclamptosat.ll
M llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/fpscr-multi-use.ll
M llvm/test/CodeGen/ARM/fptoi-sat-store.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/funnel-shift-rot.ll
M llvm/test/CodeGen/ARM/funnel-shift.ll
M llvm/test/CodeGen/ARM/ifcvt1.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/neon_vabd.ll
M llvm/test/CodeGen/ARM/overflow-intrinsic-optimizations.ll
M llvm/test/CodeGen/ARM/sadd_sat.ll
M llvm/test/CodeGen/ARM/sadd_sat_plus.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/ARM/select_const.ll
M llvm/test/CodeGen/ARM/shift-i64.ll
M llvm/test/CodeGen/ARM/ssub_sat.ll
M llvm/test/CodeGen/ARM/ssub_sat_plus.ll
M llvm/test/CodeGen/ARM/sub-cmp-peephole.ll
M llvm/test/CodeGen/ARM/uadd_sat.ll
M llvm/test/CodeGen/ARM/uadd_sat_plus.ll
M llvm/test/CodeGen/ARM/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/ARM/umulo-64-legalisation-lowering.ll
M llvm/test/CodeGen/ARM/usub_sat.ll
M llvm/test/CodeGen/ARM/usub_sat_plus.ll
M llvm/test/CodeGen/ARM/vselect_imax.ll
M llvm/test/CodeGen/ARM/wide-compares.ll
M llvm/test/CodeGen/Thumb/arm_q15_to_q31.ll
M llvm/test/CodeGen/Thumb/select.ll
M llvm/test/CodeGen/Thumb/smul_fix_sat.ll
M llvm/test/CodeGen/Thumb/stack-guard-xo.ll
M llvm/test/CodeGen/Thumb/umul_fix_sat.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/arm_cmplx_dot_prod_f32.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/exitcount.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
M llvm/test/CodeGen/Thumb2/float-ops.ll
M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
M llvm/test/CodeGen/Thumb2/mve-doublereduct.ll
M llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
M llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fpclamptosat_vec.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-gather-scatter-ptr-address.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-minmaxi.ll
M llvm/test/CodeGen/Thumb2/mve-pipelineloops.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-pred-or.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vselect.ll
M llvm/test/CodeGen/Thumb2/mve-pred-xor.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
M llvm/test/CodeGen/Thumb2/mve-vmaxv-vminv-scalar.ll
M llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
M llvm/test/CodeGen/Thumb2/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/Thumb2/umulo-64-legalisation-lowering.ll
Log Message:
-----------
[ARM] Stop gluing ALU nodes to branches / selects (#116970)
Following #116547 and #116676, this PR changes the type of results and
operands of some nodes to accept / return a normal type instead of Glue.
Unfortunately, changing the result type of one node requires changing
the operand types of all potential consumer nodes, which in turn
requires changing the result types of all other possible producer nodes.
So this is a bulk change.
Pull Request: https://github.com/llvm/llvm-project/pull/116970
Commit: a8a494faab8af60754c4647dbb7b24bc86a80aab
https://github.com/llvm/llvm-project/commit/a8a494faab8af60754c4647dbb7b24bc86a80aab
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
M llvm/lib/Support/SmallPtrSet.cpp
Log Message:
-----------
[SmallPtrSet] Remove SmallArray member (NFC) (#118099)
Currently SmallPtrSet stores CurArray and SmallArray, with the former
pointing to the latter in small representation. Instead, only use
CurArray and a separate IsSmall boolean.
Most of the implementation doesn't need the separate SmallArray member
-- we only need it for copy/move/swap operations, where we may switch
back from large to small representation. In those cases, we explicitly
pass down the pointer to SmallStorage.
This reduces the size of SmallPtrSet and improves compile-time.
Commit: 04cc492ec3e2792e3fa790750ff678baa90bd436
https://github.com/llvm/llvm-project/commit/04cc492ec3e2792e3fa790750ff678baa90bd436
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M libcxx/include/__configuration/availability.h
Log Message:
-----------
[libc++][NFC] Remove unused macros from <__configuration/availability.h>
Commit: 39209724e66a20080bdebc609a051dfa0eb6b49f
https://github.com/llvm/llvm-project/commit/39209724e66a20080bdebc609a051dfa0eb6b49f
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M llvm/lib/Support/YAMLTraits.cpp
M llvm/unittests/Support/YAMLIOTest.cpp
Log Message:
-----------
[YAML] Fix incorrect dash output in nested sequences (#116488)
Nested sequences could be defined but the YAML output was incorrect.
`Output::newLineCheck()` was not able to emit multiple dashes `- ` and
YAML parser sometimes didn't accept its output as the result.
This fixes for emitting corresponding dashes for consecutive
`inSeqFirstElement`, but suppresses emission to the top
`inSeqFirstElement`.
This also fixes for emitting flow elements onto nested sequences.
Commit: 1c702d38540dd8bad50f22947b71769b4d0c1202
https://github.com/llvm/llvm-project/commit/1c702d38540dd8bad50f22947b71769b4d0c1202
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
A llvm/test/Analysis/LoopAccessAnalysis/nssw-predicate-implied.ll
Log Message:
-----------
[SCEV] Add tests where one wrap predicate implies another.
Commit: f89fa238faa6a63168997a8a1d03c15b71da8080
https://github.com/llvm/llvm-project/commit/f89fa238faa6a63168997a8a1d03c15b71da8080
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-func.cpp
Log Message:
-----------
[clang-tidy][use-internal-linkage]fix false positives for global overloaded operator new and operator delete (#117945)
Commit: 4148aa63e2285ec7198c67d9b231b9097076ba8e
https://github.com/llvm/llvm-project/commit/4148aa63e2285ec7198c67d9b231b9097076ba8e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
A llvm/utils/merge-json.py
M runtimes/CMakeLists.txt
Log Message:
-----------
[Reland][Runtimes] Merge 'compile_commands.json' files from runtimes build (#116303)
Summary:
When building a project in a runtime mode, the compilation database is a
separate CMake invocation. So its `compile_commands.json` file will be
placed elsewhere in the `runtimes/runtime-bins` directory. This is
somewhat annoying for ongoing development when a runtimes build is
necessary. This patch adds some CMake magic to merge the two files.
Fixed issue w/ standalone runtimes build by checking if the LLVM src and
CMake src are the same.
Commit: 2e30df740ef0b9f8edb7075768540ce08678023d
https://github.com/llvm/llvm-project/commit/2e30df740ef0b9f8edb7075768540ce08678023d
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Fix validateOperandClass for non Phyical Reg (#118146)
https://github.com/llvm/llvm-project/commit/b71704436e61
Rewrote the register operands handling,
but the Table only contains physical regs, we will SEGV when there are
non physical regs.
---------
Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>
Commit: 9a0f25158c2eff539de1efbd55de71e711135db7
https://github.com/llvm/llvm-project/commit/9a0f25158c2eff539de1efbd55de71e711135db7
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/selectopt-cast.ll
Log Message:
-----------
[SelectOpt] Support ADD and SUB with zext operands. (#115489)
Extend the support for implicit selects in the form of OR with a ZExt
operand to support ADD and SUB binops as well. They similarly can form
implicit selects which can be profitable to convert back the branches.
PR: https://github.com/llvm/llvm-project/pull/115489
Commit: 92ba7e397377b8005206cb01a2052a750780827e
https://github.com/llvm/llvm-project/commit/92ba7e397377b8005206cb01a2052a750780827e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/bitop3.ll
Log Message:
-----------
AMDGPU/GlobalISel: Do not try to form v_bitop3_b32 for SGPR results (#117940)
Commit: 1c7e4074b1efe7c3c9110f1d116b16f50fce9c88
https://github.com/llvm/llvm-project/commit/1c7e4074b1efe7c3c9110f1d116b16f50fce9c88
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-30 (Sat, 30 Nov 2024)
Changed paths:
M lldb/unittests/debugserver/RNBSocketTest.cpp
Log Message:
-----------
[lldb] Fix warning: 'sprintf' is deprecated in RNBSocketTest
Fixes warning: 'sprintf' is deprecated: This function is provided for
compatibility reasons only. Due to security concerns inherent in the
design of sprintf(3), it is highly recommended that you use snprintf(3)
instead.
Commit: 6568ceb9fa1c49383b2fa102a04fd8fd3af01491
https://github.com/llvm/llvm-project/commit/6568ceb9fa1c49383b2fa102a04fd8fd3af01491
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
A llvm/test/Transforms/CodeGenPrepare/X86/pr118172.ll
Log Message:
-----------
[CodeGenPrepare] Drop nsw flags in `optimizeLoadExt` (#118180)
Alive2: https://alive2.llvm.org/ce/z/pMcD7q
Closes https://github.com/llvm/llvm-project/issues/118172.
Commit: 017c75bfacdfa25594f8212a427627cff7aa98f3
https://github.com/llvm/llvm-project/commit/017c75bfacdfa25594f8212a427627cff7aa98f3
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir] Fix typo in test vector transform pass descriptions (#118194)
Fix some typos in the description of vector transform passes.
Commit: 6881c6d2a6ef2b9f1736afb124b2486d6b8bc603
https://github.com/llvm/llvm-project/commit/6881c6d2a6ef2b9f1736afb124b2486d6b8bc603
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcia-invalid.s
A llvm/test/MC/RISCV/xqcia-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcia (Arithmetic) extension (#118113)
This extension adds 11 instructions that perform integer arithmetic.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
Commit: 94df95de6bab20930c1a77bc785221ff2f670dba
https://github.com/llvm/llvm-project/commit/94df95de6bab20930c1a77bc785221ff2f670dba
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr94546.ll
Log Message:
-----------
[TTI][X86] getShuffleCosts - for SK_PermuteTwoSrc, if the masks are known to be "inlane" no need to scale the costs by worst-case legalization (#117999)
SK_PermuteTwoSrc legalization has to assume any of the legalised source registers could be referenced in split shuffles, but if we already know that each 128-bit lane only references elements from the same lane of the source operands, then this scaling won't occur.
Hopefully this can help with #113356 without us having to get full processShuffleMasks canonicalization finished first.
Commit: f7ef0721d60f85e1f699f8d1b83d4402ae19b122
https://github.com/llvm/llvm-project/commit/f7ef0721d60f85e1f699f8d1b83d4402ae19b122
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/pr117133.ll
A llvm/test/Transforms/IndVarSimplify/pr117133.ll
Log Message:
-----------
[SCEV] Do not allow refinement in the rewriting of BEValue (#117152)
See the following case:
```
; bin/opt -passes="print<scalar-evolution>" test.ll --disable-output
define i32 @widget() {
b:
br label %b1
b1: ; preds = %b5, %b
%phi = phi i32 [ 0, %b ], [ %udiv6, %b5 ]
%phi2 = phi i32 [ 1, %b ], [ %add, %b5 ]
%icmp = icmp eq i32 %phi, 0
br i1 %icmp, label %b3, label %b8
b3: ; preds = %b1
%udiv = udiv i32 10, %phi2
%urem = urem i32 %udiv, 10
%icmp4 = icmp eq i32 %urem, 0
br i1 %icmp4, label %b7, label %b5
b5: ; preds = %b3
%udiv6 = udiv i32 %phi2, 0
%add = add i32 %phi2, 1
br label %b1
b7: ; preds = %b3
ret i32 5
b8: ; preds = %b1
ret i32 7
}
```
```
%phi2 = phi i32 [ 1, %b ], [ %add, %b5 ] --> {1,+,1}<nuw><nsw><%b1>
%udiv6 = udiv i32 %phi2, 0 --> ({1,+,1}<nuw><nsw><%b1> /u 0)
%phi = phi i32 [ 0, %b ], [ %udiv6, %b5 ] --> ({0,+,1}<nuw><nsw><%b1> /u 0)
```
`ScalarEvolution::createAddRecFromPHI` gives a wrong SCEV result for
`%phi`:
https://github.com/llvm/llvm-project/blob/d7d6fb1804415b0f3e7f1cc9290bfb3d711cb707/llvm/lib/Analysis/ScalarEvolution.cpp#L5926-L5950
It converts `phi(0, ({1,+,1}<nuw><nsw><%b1> /u 0))` into `phi(0 / 0,
({1,+,1}<nuw><nsw><%b1> /u 0))`. Then it simplifies the expr into
`{0,+,1}<nuw><nsw><%b1> /u 0`.
As we did in
https://github.com/llvm/llvm-project/commit/acd700a24b6f767413db3d525e06d03e4245aa40,
this patch disallows udiv simplification if we cannot prove that the
denominator is a well-defined non-zero value.
Fixes https://github.com/llvm/llvm-project/issues/117133.
Commit: 22417ec6cca0ed8ccecb0c2b77011e591378fd2a
https://github.com/llvm/llvm-project/commit/22417ec6cca0ed8ccecb0c2b77011e591378fd2a
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/codeview-column-info.c
Log Message:
-----------
[Driver] Do not add gno-column-info when using sampling PGO (#117954)
Column info is important for sampling PGO to generate/load profile file.
On windows, it will be automatically added when using -gdwarf to
generate
profile file. It should also be generated when fprofile-sample-use= is
used.
Commit: 1a3eace82a885fca01a70472b3816007dbee9d9f
https://github.com/llvm/llvm-project/commit/1a3eace82a885fca01a70472b3816007dbee9d9f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
Log Message:
-----------
[InstCombine] Fold `umax(X, C) + -C` into `usub.sat(X, C)` (#118195)
Alive2: https://alive2.llvm.org/ce/z/oSWe5S
Closes https://github.com/llvm/llvm-project/issues/118155
Commit: 4a074330c6d587be51494f651f539c8055be201c
https://github.com/llvm/llvm-project/commit/4a074330c6d587be51494f651f539c8055be201c
Author: Chris Apple <cja-private at pm.me>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Intercept various file system functions (#118183)
Adds interceptors for
* chmod
* fchmod
* mkdir
* rmdir
* umask
Commit: 82ed9c0319c9f0373bcb633a03ce6d35ebac3661
https://github.com/llvm/llvm-project/commit/82ed9c0319c9f0373bcb633a03ce6d35ebac3661
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove APValue Result argument where unnecessary (#118199)
This is unneeded in almost all circumstances. We only return an APValue
back to clang when the evaluation is finished, and that is always done
by an EvalEmitter - which has its own implementation of the Ret
instructions.
Commit: 31bde711c4098b3136edd1cb92dd4e0cc1d4d179
https://github.com/llvm/llvm-project/commit/31bde711c4098b3136edd1cb92dd4e0cc1d4d179
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Support __builtin_reduce_add (#117672)
Commit: 77767986ed423f868805d8ee9652f6dcc85c6adc
https://github.com/llvm/llvm-project/commit/77767986ed423f868805d8ee9652f6dcc85c6adc
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Use IsaPred in a few more places (NFC).
Simplifies the code slightly by removing explicit lambdas.
Commit: 9becc4a3c966d46b95ddfcf856b3c433c030db1e
https://github.com/llvm/llvm-project/commit/9becc4a3c966d46b95ddfcf856b3c433c030db1e
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
Log Message:
-----------
[ELF] ObjFile::parse: check EM_AARCH64 for SHT_AARCH64_MEMTAG_GLOBAL_STATIC
and reorder sh_type checks to make SHT_PROGBITS/SHT_GROUP fast.
Commit: 2a5e1da57a42fa2fc081bbc11970871a1eecb3b3
https://github.com/llvm/llvm-project/commit/2a5e1da57a42fa2fc081bbc11970871a1eecb3b3
Author: Martin Storsjö <martin at martin.st>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrFormats.td
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/test/CodeGen/ARM/add-like-or.ll
M llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
M llvm/test/CodeGen/ARM/atomic-64bit.ll
M llvm/test/CodeGen/ARM/atomic-ops-v8.ll
M llvm/test/CodeGen/ARM/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/ARM/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
M llvm/test/CodeGen/ARM/bfi.ll
M llvm/test/CodeGen/ARM/cmov_fp16.ll
M llvm/test/CodeGen/ARM/cse-call.ll
M llvm/test/CodeGen/ARM/cttz.ll
M llvm/test/CodeGen/ARM/fadd-select-fneg-combine.ll
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fpclamptosat.ll
M llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/fpscr-multi-use.ll
M llvm/test/CodeGen/ARM/fptoi-sat-store.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/funnel-shift-rot.ll
M llvm/test/CodeGen/ARM/funnel-shift.ll
M llvm/test/CodeGen/ARM/ifcvt1.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/neon_vabd.ll
M llvm/test/CodeGen/ARM/overflow-intrinsic-optimizations.ll
M llvm/test/CodeGen/ARM/sadd_sat.ll
M llvm/test/CodeGen/ARM/sadd_sat_plus.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/ARM/select_const.ll
M llvm/test/CodeGen/ARM/shift-i64.ll
M llvm/test/CodeGen/ARM/ssub_sat.ll
M llvm/test/CodeGen/ARM/ssub_sat_plus.ll
M llvm/test/CodeGen/ARM/sub-cmp-peephole.ll
M llvm/test/CodeGen/ARM/uadd_sat.ll
M llvm/test/CodeGen/ARM/uadd_sat_plus.ll
M llvm/test/CodeGen/ARM/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/ARM/umulo-64-legalisation-lowering.ll
M llvm/test/CodeGen/ARM/usub_sat.ll
M llvm/test/CodeGen/ARM/usub_sat_plus.ll
M llvm/test/CodeGen/ARM/vselect_imax.ll
M llvm/test/CodeGen/ARM/wide-compares.ll
M llvm/test/CodeGen/Thumb/arm_q15_to_q31.ll
M llvm/test/CodeGen/Thumb/select.ll
M llvm/test/CodeGen/Thumb/smul_fix_sat.ll
M llvm/test/CodeGen/Thumb/stack-guard-xo.ll
M llvm/test/CodeGen/Thumb/umul_fix_sat.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/arm_cmplx_dot_prod_f32.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/exitcount.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
M llvm/test/CodeGen/Thumb2/float-ops.ll
M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
M llvm/test/CodeGen/Thumb2/mve-doublereduct.ll
M llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
M llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fpclamptosat_vec.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-gather-scatter-ptr-address.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-minmaxi.ll
M llvm/test/CodeGen/Thumb2/mve-pipelineloops.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-pred-or.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vselect.ll
M llvm/test/CodeGen/Thumb2/mve-pred-xor.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
M llvm/test/CodeGen/Thumb2/mve-vmaxv-vminv-scalar.ll
M llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
M llvm/test/CodeGen/Thumb2/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/Thumb2/umulo-64-legalisation-lowering.ll
Log Message:
-----------
Revert "[ARM] Stop gluing ALU nodes to branches / selects" (#118232)
Reverts llvm/llvm-project#116970.
This change broke Wine compiled for armv7, causing segfaults when
starting Wine. See llvm/llvm-project#116970 for more detailed discussion
about the issue.
Commit: 603d41ab7b4078a00a5d3b899d3b9d14eea2d8ff
https://github.com/llvm/llvm-project/commit/603d41ab7b4078a00a5d3b899d3b9d14eea2d8ff
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] decompress: remove mutex
decompress() is in the parallel code path splitIntoPieces
and we should avoid mutex.
Commit: a09df64f406be162b0bd096dbe2466603b7a4f29
https://github.com/llvm/llvm-project/commit/a09df64f406be162b0bd096dbe2466603b7a4f29
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
Log Message:
-----------
[ELF] postParse: remove some branches in the fast path
Commit: 73f087b3318a8f887cd867f27608f693fee6dc7b
https://github.com/llvm/llvm-project/commit/73f087b3318a8f887cd867f27608f693fee6dc7b
Author: antangelo <contact at antangelo.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
R llvm/test/CodeGen/Generic/builtin-expect-with-probability.ll
M llvm/test/CodeGen/X86/fast-isel-expect.ll
Log Message:
-----------
[NFC][SelectionDAG] Replace generic @llvm.expect.with.probability codegen test with X86 test (#117848)
Adds test case for X86 to check that the output of
@llvm.expect.with.probability's generic lowering is reasonable. This
replaces a generic test which only asserts that llc does not crash.
Commit: 574f64ca61d252dbcf98621e056ab02b93d928bc
https://github.com/llvm/llvm-project/commit/574f64ca61d252dbcf98621e056ab02b93d928bc
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M llvm/include/llvm/Support/TimeProfiler.h
Log Message:
-----------
[TimeProfiler] Remove unneeded check
Commit: 92a4b443260ccf9237b873850a9b511fdcffd79a
https://github.com/llvm/llvm-project/commit/92a4b443260ccf9237b873850a9b511fdcffd79a
Author: Abdul Raheem <abdulraheembeigh at gmail.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
Log Message:
-----------
[MLIR][NFC] Fixed a typo of member variable static_basis (#117678)
-- Fixed a typo of member variable static_basis of
AffineDelinearizeIndexOp operation in AffineOps.td
Signed-off: Abdul Raheem Beigh <abdulraheembeigh at gmail.com>
Commit: a4c3683b665c6ac875b4821f5c6a881fdf5fef70
https://github.com/llvm/llvm-project/commit/a4c3683b665c6ac875b4821f5c6a881fdf5fef70
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M mlir/include/mlir/Interfaces/DestinationStyleOpInterface.td
Log Message:
-----------
[mlir][NFC] Fix typo. (#118163)
Fixes https://github.com/llvm/llvm-project/issues/117222.
Commit: 427fb5cc5ac34414c4682c90d3db0c63c5a1b227
https://github.com/llvm/llvm-project/commit/427fb5cc5ac34414c4682c90d3db0c63c5a1b227
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
Log Message:
-----------
[ORC] Track all dependencies on symbols that aren't Ready yet.
AsynchronousSymbolQuery tracks the symbols that it depends on in order to (1)
detach the query in the event of a failure, and (2) report those dependencies
to clients of the ExecutionSession::lookup method (via the RegisterDependencies
argument). Previously we tracked only dependencies on symbols that didn't meet
the required state (the only symbols that the query needs to be attached to),
but this is insufficient to report all necessary dependencies to lookup clients.
E.g. A lookup requiring SymbolState::Resolved where some matched symbol is
already Resolved but not yet Emitted or Ready would result in the dependency on
that symbol not being reported, which could result in illegal access in
concurrent JIT setups. (This bug was discovered by @mikaoP on discord with a
simple concurrent JIT setup).
This patch tracks and reports all dependencies on symbols that aren't Ready yet,
correcting the under-reporting issue. AsynchronousSymbolQuery::detach is updated
to stop asserting that all depended-upon symbols have a query attached.
Commit: ed7a8f15564f11ce8ceabaa925a26842302b8450
https://github.com/llvm/llvm-project/commit/ed7a8f15564f11ce8ceabaa925a26842302b8450
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M offload/test/mapping/map_both_pointer_pointee.c
M offload/test/mapping/power_of_two_alignment.c
Log Message:
-----------
[NFC][Offload] Correct the compile command of two C test files (#118243)
The compile command for the two C test files are `compilexx`, which is
actually
for C++ compilation.
Commit: 8cb44859cc31929521c09fc6a8add66d53db44de
https://github.com/llvm/llvm-project/commit/8cb44859cc31929521c09fc6a8add66d53db44de
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
R offload/test/mapping/power_of_two_alignment.c
A offload/test/mapping/power_of_two_alignment.cpp
Log Message:
-----------
FIX: Fix test failure in offload/test/mapping/power_of_two_alignment.c
A C file with `template` in it. Awesome.
Commit: c4a1e0efe6b0767dfb5861a7e8814d7db0c0de8a
https://github.com/llvm/llvm-project/commit/c4a1e0efe6b0767dfb5861a7e8814d7db0c0de8a
Author: Richard Trieu <57020969+Weverything at users.noreply.github.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M clang/lib/AST/ASTDiagnostic.cpp
M clang/test/Misc/diag-template-diffing-cxx98.cpp
Log Message:
-----------
[clang] Remove redundant integer values in template type diffing
Look through SubstNonTypeTemplateParmExpr to find an IntegerLiteral
node when attempting to determine if extra info is printed via
the aka mechanism. This will avoid printing types such as
"array<5 aka 5>" and will only show "array<5>".
Commit: a9ad9e27caba2153b82fb3029694bfadaa5803cb
https://github.com/llvm/llvm-project/commit/a9ad9e27caba2153b82fb3029694bfadaa5803cb
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/test/tools/llvm-readobj/ELF/reloc-types-aarch64.test
Log Message:
-----------
[PAC][llvm-readobj][AArch64] Move PAuth GOT relocs out of private space (#118214)
Apply change from the spec
https://github.com/ARM-software/abi-aa/pull/300
Commit: 010317e1731d76b91c00ed1241583e518380d65f
https://github.com/llvm/llvm-project/commit/010317e1731d76b91c00ed1241583e518380d65f
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-internal-linkage.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
Log Message:
-----------
[clang-tidy][use-internal-linkage]fix false positives for ExportDecl (#117901)
Fixed: #97190
Commit: 91f69b70e075a475b550e3ef832816c47311e2bd
https://github.com/llvm/llvm-project/commit/91f69b70e075a475b550e3ef832816c47311e2bd
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
Log Message:
-----------
[ORC] Remove redundant check from ObjectLinkingLayer.
Non-locally scoped symbols must have names.
Commit: 0a44b24d6697ee8542583960c4a4166fc805883c
https://github.com/llvm/llvm-project/commit/0a44b24d6697ee8542583960c4a4166fc805883c
Author: Adam Yang <hanbyang at microsoft.com>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (#114349)
fixes #112974
partially fixes #70103
An earlier version of this change was reverted so some issues could be fixed.
### Changes
- Added new tablegen based way of lowering dx intrinsics to DXIL ops.
- Added int_dx_group_memory_barrier_with_group_sync intrinsic in
IntrinsicsDirectX.td
- Added expansion for int_dx_group_memory_barrier_with_group_sync in
DXILIntrinsicExpansion.cpp`
- Added DXIL backend test case
### Related PRs
* [[clang][HLSL] Add GroupMemoryBarrierWithGroupSync intrinsic
#111883](https://github.com/llvm/llvm-project/pull/111883)
* [[SPIRV] Add GroupMemoryBarrierWithGroupSync intrinsic
#111888](https://github.com/llvm/llvm-project/pull/111888)
Commit: d9d656edd4d6d7ca1be5c2f2e0cca4d1ef773dd5
https://github.com/llvm/llvm-project/commit/d9d656edd4d6d7ca1be5c2f2e0cca4d1ef773dd5
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-01 (Sun, 01 Dec 2024)
Changed paths:
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] resolve LazySymbol: remove a branch in the fast path
Commit: dd0d9561b8945d4128814bd7eda1bc470a1552f7
https://github.com/llvm/llvm-project/commit/dd0d9561b8945d4128814bd7eda1bc470a1552f7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/altivec.c
M clang/test/AST/ByteCode/vectors.cpp
Log Message:
-----------
[clang][bytecode] Support vector-to-vector bitcasts (#118230)
Commit: 08c1a6b3e181c3af019b18489139bfe4b03d9d08
https://github.com/llvm/llvm-project/commit/08c1a6b3e181c3af019b18489139bfe4b03d9d08
Author: Lang Hames <lhames at gmail.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
Log Message:
-----------
Revert "[ORC] Track all dependencies on symbols that aren't Ready yet."
This reverts commit 427fb5cc5ac34414c4682c90d3db0c63c5a1b227 while I investigate
the bot failure in https://lab.llvm.org/buildbot/#/builders/95/builds/6835.
Commit: eaa6cc547e7300b122efbbaf8940ee9d15f7964c
https://github.com/llvm/llvm-project/commit/eaa6cc547e7300b122efbbaf8940ee9d15f7964c
Author: Shankhin <44582011+firestrike007 at users.noreply.github.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M libc/src/__support/threads/linux/rwlock.h
Log Message:
-----------
Fixes #118231: Corrected spelling mistake in has_acitive_owner function (#118266)
Fixes #118231
- Updated the method name to `has_active_owner` in
`llvm-project/libc/src/__support/threads/linux/rwlock.h`
- Verified usage and updated all references to the method.
- Ran tests:
- `check-llvm-unit`
- `check-all`
Commit: 979a0356d4c90ec855be4f2d2f6687132cf10298
https://github.com/llvm/llvm-project/commit/979a0356d4c90ec855be4f2d2f6687132cf10298
Author: Veera <32646674+veera-sivarajan at users.noreply.github.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/test/CodeGen/attr-counted-by.c
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
A llvm/test/Transforms/InstCombine/canonicalize-const-to-bop.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/unsigned_saturated_sub.ll
Log Message:
-----------
[InstCombine] Fold `X Pred C2 ? X BOp C1 : C2 BOp C1` to `min/max(X, C2) BOp C1` (#116888)
Fixes #82414.
General Proof: https://alive2.llvm.org/ce/z/ERjNs4
Proof for Tests: https://alive2.llvm.org/ce/z/K-934G
This PR transforms `select` instructions of the form `select (Cmp X C1)
(BOp X C2) C3` to `BOp (min/max X C1) C2` iff `C3 == BOp C1 C2`.
This helps in eliminating a noop loop in
https://github.com/rust-lang/rust/issues/123845 but does not improve
optimizations.
Commit: 7bbc049688a1586827d87ad8e2fc7cb3638ef2fc
https://github.com/llvm/llvm-project/commit/7bbc049688a1586827d87ad8e2fc7cb3638ef2fc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-value-equivalence.ll
Log Message:
-----------
[InstCombine] Consolidate another fold into select value equivalence (#117746)
We had a separate fold that handled just the trivial case where we're
replacing exactly the argument of the select. Handle this in select
value equivalence by relaxing the infinite loop protection to allow a
replacement of a non-constant with a constant.
This also fixes https://github.com/llvm/llvm-project/issues/113301, as
the separate fold did not handle undef values correctly.
Commit: 770adc56097342d3478c1b3b6d3e67cdf6d2c93e
https://github.com/llvm/llvm-project/commit/770adc56097342d3478c1b3b6d3e67cdf6d2c93e
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/Sema/SemaAttr.cpp
M clang/test/AST/attr-lifetime-capture-by.cpp
Log Message:
-----------
[clang] Infer lifetime_capture_by for map's subscript operator. (#118078)
Commit: a545cf5c6da6decbde95287f95e1ffce40116d23
https://github.com/llvm/llvm-project/commit/a545cf5c6da6decbde95287f95e1ffce40116d23
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
A flang/test/HLFIR/eval_in_mem-codegen.fir
A flang/test/HLFIR/eval_in_mem.fir
M flang/test/HLFIR/invalid.fir
Log Message:
-----------
[flang][hlfir] add hlfir.eval_in_mem operation (#118067)
See HLFIROps.td change for the description of the operation.
The goal is to ease temporary storage elision for expression evaluation
(typically evaluating the RHS directly inside the LHS) for expressions
that do not have abtsractions in HLFIR and for which it is not clear
adding one would bring much. The case that is implemented in [the
following lowering
patch](https://github.com/llvm/llvm-project/pull/118070) is the array
call case, where adding a new hlfir.call would add complexity (needs to
deal with dispatch, inlining ....).
Commit: 8201926ec0a61ea182e3b25c23e3dbaae6036dbf
https://github.com/llvm/llvm-project/commit/8201926ec0a61ea182e3b25c23e3dbaae6036dbf
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/compare.ll
M llvm/test/Transforms/InstSimplify/icmp-monotonic.ll
Log Message:
-----------
[InstSimplify] Generalize simplification of icmps with monotonic operands (#69471)
InstSimplify currently folds patterns like `(x | y) uge x` and `(x & y)
ule x` to true. However, it cannot handle combinations of such
situations, such as `(x | y) uge (x & z)` etc.
To support this, recursively collect operands of monotonic instructions
(that preserve either a greater-or-equal or less-or-equal relationship)
and then check whether any of them match.
Fixes https://github.com/llvm/llvm-project/issues/69333.
Commit: 54fcf3ec26ad192e91b6ac924f6d3eb562e3647d
https://github.com/llvm/llvm-project/commit/54fcf3ec26ad192e91b6ac924f6d3eb562e3647d
Author: antangelo <contact at antangelo.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseDecl.cpp
M clang/test/CXX/drs/cwg722.cpp
A clang/test/Parser/cxx2c-oxford-variadic-comma.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[clang] Implement P3176R1: The Oxford variadic comma (#117524)
Emit a deprecation warning when a variadic parameter in a
parameter-declaration-clause is not preceded by a comma for C++26.
Commit: 4851dbb8d6f1c00ad382ff4780293ca9a743c609
https://github.com/llvm/llvm-project/commit/4851dbb8d6f1c00ad382ff4780293ca9a743c609
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPatterns.td
A llvm/test/CodeGen/Hexagon/addrmode-neg-offset.ll
Log Message:
-----------
[Hexagon] Use getSignedConstant for RoundTo8 XForm
To handle negative offset addrmodes correctly.
Fixes https://github.com/llvm/llvm-project/pull/117558#issuecomment-2510208764.
Commit: 98e747ba56b2f8b51a7c797a3f379d02c545c42b
https://github.com/llvm/llvm-project/commit/98e747ba56b2f8b51a7c797a3f379d02c545c42b
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
M clang/test/CodeGen/AArch64/sve-vls-arith-ops.c
M clang/test/CodeGen/AArch64/sve-vls-bitwise-ops.c
M clang/test/CodeGen/AArch64/sve-vls-compare-ops.c
M clang/test/CodeGen/AArch64/sve-vls-shift-ops.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-cast.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-codegen.c
M clang/test/CodeGen/RISCV/rvv-vls-arith-ops.c
M clang/test/CodeGen/RISCV/rvv-vls-bitwise-ops.c
M clang/test/CodeGen/RISCV/rvv-vls-compare-ops.c
M clang/test/CodeGen/RISCV/rvv-vls-shift-ops.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c
Log Message:
-----------
[clang] Use poison instead of undef as the placeholder when creating a new vector [NFC] (#117064)
Call `@llvm.vector.insert` with a `poison` vector when coercing a fixed
vector to a scalable vector with the same element type.
Commit: 7be501c1d3b3153e08603670873e1b3b700c9598
https://github.com/llvm/llvm-project/commit/7be501c1d3b3153e08603670873e1b3b700c9598
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang][ASTImporter] Allow import of similar friend template with different depth (#115734)
This fix applies to a case that occurs when the AST contains a friend
template that is contained within another template and this (outer)
template has specialization. (See the added test code in the commit.)
Commit: 9cbbf15db925c8d588b998487115a46250954dc1
https://github.com/llvm/llvm-project/commit/9cbbf15db925c8d588b998487115a46250954dc1
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
Log Message:
-----------
[AMDGPU] Only insert intrinsic declarations when needed (#117998)
Commit: 085e7d2b22876ebc03948a0690580e0189cddcc1
https://github.com/llvm/llvm-project/commit/085e7d2b22876ebc03948a0690580e0189cddcc1
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
R bolt/CODE_OWNERS.TXT
A bolt/Maintainers.txt
M llvm/Maintainers.md
Log Message:
-----------
[bolt] Move CODE_OWNERS.txt to Maintainers.txt (#118082)
To align with: https://llvm.org/docs/DeveloperPolicy.html#maintainers
I have not changed the format of the file, my only goal here is that the
project have a `bolt/Maintainers.*` so it is easy to find.
Commit: fec0eb4c3ef2a1fa2e0e413b0ea4871ee0bcebd1
https://github.com/llvm/llvm-project/commit/fec0eb4c3ef2a1fa2e0e413b0ea4871ee0bcebd1
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
R compiler-rt/CODE_OWNERS.TXT
A compiler-rt/Maintainers.txt
M llvm/Maintainers.md
Log Message:
-----------
[compiler-rt] Move CODE_OWNERS.txt to Maintainers.txt (#118086)
To align with https://llvm.org/docs/DeveloperPolicy.html#maintainers
No format change, I just want each project to have a `Maintainers.*`
file so it is easy to find.
Commit: df10f1c6f79a77e45e44c62974a186decb0f1f33
https://github.com/llvm/llvm-project/commit/df10f1c6f79a77e45e44c62974a186decb0f1f33
Author: Luke Lau <luke at igalia.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Use getRISCVInstructionCost for split cost in mask reductions. NFC
This is effectively the same due to how the mask instructions have an
LMUL of 1 and cost of 1, but matches how we use LT.first elsewhere in
RISCVTargetTransformInfo.cpp by using it to multiply another
instruction cost.
Commit: 51003076ebc1ccc0cf339f9d96b2cfec84ab867c
https://github.com/llvm/llvm-project/commit/51003076ebc1ccc0cf339f9d96b2cfec84ab867c
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/unittests/Core/CMakeLists.txt
A bolt/unittests/Core/MemoryMaps.cpp
M llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn
Log Message:
-----------
Reapply [BOLT] DataAggregator support for binaries with multiple text segments (#118023)
When a binary has multiple text segments, the Size is computed as the
difference of the last address of these segments from the BaseAddress.
The base addresses of all text segments must be the same.
Introduces flag 'perf-script-events' for testing, which allows passing
perf events without BOLT having to parse them by invoking 'perf script'.
The flag is used to pass a mock perf profile that has two memory
mappings for a mock binary that has two text segments. The mapping
size is updated as `parseMMapEvents` now processes all text segments.
Commit: 7a7a426188eea0b181738436205759e13ad6fd7b
https://github.com/llvm/llvm-project/commit/7a7a426188eea0b181738436205759e13ad6fd7b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
Log Message:
-----------
[LVI] Fix insertelement of constexpr
Bail out when evaluating an insertelement of a constant expression.
Unlike other ValueLattice kinds, these don't have implicit splat
semantics and we end up with type mismatches. If we actually wanted
to handle these, we should actually evaluate the insertion via
constant folding. I'm not bothering with that, as these should
get constant folded on construction already.
Commit: 5248e1d4e1ee950d1703ec57141257b02446dd67
https://github.com/llvm/llvm-project/commit/5248e1d4e1ee950d1703ec57141257b02446dd67
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
A llvm/test/CodeGen/AArch64/stack-hazard-windows.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
Log Message:
-----------
[AArch64] Fix frame-pointer offset with hazard padding (#118091)
The `-aarch64-stack-hazard-size=<val>` option disables register paring
(as the hazard padding may mean the offset is too large for STP/LDP).
This broke setting the frame-pointer offset, as the code to find the
frame record looked for a (FP, LR) register pair.
This patch resolves this by looking for FP, LR as two unpaired registers
when hazard padding is enabled.
Commit: ede570980a2534c4a21850777b92505c02924416
https://github.com/llvm/llvm-project/commit/ede570980a2534c4a21850777b92505c02924416
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Log Message:
-----------
[RISCV][TTI] Add llvm.vp.select into canSplatOperand. (#117982)
The second operand of llvm.vp.select is a splat operand , it can help
llvm.vp.select fold vv instructions to vx instructions.
Commit: fe1c4f0106fe4fd6d61c38ba46e71fda8f4d1573
https://github.com/llvm/llvm-project/commit/fe1c4f0106fe4fd6d61c38ba46e71fda8f4d1573
Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
Log Message:
-----------
[mlir][vector][nfc] Remove redundant "`"
Commit: 34d4cd8208b9378d5ec00f256d8ea898162430be
https://github.com/llvm/llvm-project/commit/34d4cd8208b9378d5ec00f256d8ea898162430be
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ItaniumMangle.cpp
A clang/test/CodeGenCXX/aarch64-mangle-sme-atts.cpp
Log Message:
-----------
[Clang][AArch64] Include SME attributes in the name mangling of function types (#114209)
Similar to arm_sve_vector_bits, the mangling of function types is
implemented as a pseudo template if there are any SME attributes
present, i.e.
`__SME_ATTRS<normal_function_type, sme_state>`
For example, the following function:
`void f(svint8_t (*fn)() __arm_streaming) { fn(); }`
would be mangled as:
`_Z1fP11__SME_ATTRSIFu10__SVInt8_tELj1EE`
See https://github.com/ARM-software/acle/pull/358
Commit: 541d5d911119d0268bc55fa1367ada5ef25f99c1
https://github.com/llvm/llvm-project/commit/541d5d911119d0268bc55fa1367ada5ef25f99c1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Reject invalid FromTypes in emitBuiltinBitcast (#118274)
instead of silently accepting them and failing later.
Commit: 6f285d31159501050de5563b1a844a3e1ac79a03
https://github.com/llvm/llvm-project/commit/6f285d31159501050de5563b1a844a3e1ac79a03
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-fcvt-bfcvt.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (2/11) (#116828)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`FCVT`, and `BFCVT` instructions.
Commit: 3348b4688f570d5be3180f80c888325958c37db7
https://github.com/llvm/llvm-project/commit/3348b4688f570d5be3180f80c888325958c37db7
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[X86][compiler-rt] Split CPU names even they have the same subtype (#118237)
Fixes: #118205
Commit: f8ce2e4bb38609033098714a467e25abe5b1f9d4
https://github.com/llvm/llvm-project/commit/f8ce2e4bb38609033098714a467e25abe5b1f9d4
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
Log Message:
-----------
[Matrix] Only retrieve analyses if there are any matrix intrinsics (NFC)
Only request analyses if there are any matrix intrinics to avoid
computing them if there are no matrix intrinsics.
Commit: 50c66e52f8946bc66147f615b1beaffff620e69e
https://github.com/llvm/llvm-project/commit/50c66e52f8946bc66147f615b1beaffff620e69e
Author: David Green <david.green at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/concat-vector.ll
Log Message:
-----------
[AArch64] Add tests for concat(extract-high, extract-high). NFC
Commit: f5bc6b47e856ec4b44026bb82bfbe244afcc1d98
https://github.com/llvm/llvm-project/commit/f5bc6b47e856ec4b44026bb82bfbe244afcc1d98
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll
Log Message:
-----------
[PhaseOrdering] Remove -enable-matrix flag from sub-xor.ll test.
The test does not use matrix intrinsics, so does not need enable-matrix.
Commit: e6eac65ad6aa2c61475d65f13d6d938d0e3a7728
https://github.com/llvm/llvm-project/commit/e6eac65ad6aa2c61475d65f13d6d938d0e3a7728
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/test/CodeGen/ARM/2012-03-13-DAGCombineBug.ll
Log Message:
-----------
[ARM] 2012-03-13-DAGCombineBug.ll - regenerate checks
Commit: 9a34a4f8d668b72868fde3b6a58bb3a57d72c0c9
https://github.com/llvm/llvm-project/commit/9a34a4f8d668b72868fde3b6a58bb3a57d72c0c9
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb] fix fd leak during lldb testsuite (#118093)
During lldb testing dotest.py opens files to dump testcase results, but
doesn't close them.
This patch makes necessary changes to fix the file descriptors leak.
Commit: 4930f69b78e215c60eb53e25596599c2f98b6564
https://github.com/llvm/llvm-project/commit/4930f69b78e215c60eb53e25596599c2f98b6564
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr50609.ll
Log Message:
-----------
[X86] canonicalizeShuffleWithOp - add initial shuffle(sint_to_fp(x)) -> sint_to_fp(shuffle(x)) handling
Another tentative step towards folding shuffles through conversion ops - initially limited to cases where the src/dst types are matching width.
Commit: 0611fdd32046c41647a7719252166033f7bce2f2
https://github.com/llvm/llvm-project/commit/0611fdd32046c41647a7719252166033f7bce2f2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Add simple __builtin_memcpy implementation (#118278)
Not handling all the special- and error cases yet. Just making sure the
bitcast code can be used for this as well.
Commit: 16ec534989a7ec0f67b694c3b9b21914794d8aef
https://github.com/llvm/llvm-project/commit/16ec534989a7ec0f67b694c3b9b21914794d8aef
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
Log Message:
-----------
[ValueTracking] Handle and/or of conditions in `computeKnownFPClassFromContext` (#118257)
Fix a typo introduced by
https://github.com/llvm/llvm-project/pull/83161.
This patch also supports decomposition of and/or expressions in
`computeKnownFPClassFromContext`.
Compile-time improvement:
http://llvm-compile-time-tracker.com/compare.php?from=688bb432c4b618de69a1d0e7807077a22f15762a&to=07493fc354b686f0aca79d6f817091a757bd7cd5&stat=instructions:u
Commit: c1dcf75a7cf8840ddf20b622148c4ab0c3b16943
https://github.com/llvm/llvm-project/commit/c1dcf75a7cf8840ddf20b622148c4ab0c3b16943
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_reduce_mul (#118287)
Commit: e48c7fe49f8575b7737d07ac5a71d1fc924d37f7
https://github.com/llvm/llvm-project/commit/e48c7fe49f8575b7737d07ac5a71d1fc924d37f7
Author: Devajith <devajith.valaparambil.sreeramaswamy at cern.ch>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/include/llvm/LineEditor/LineEditor.h
M llvm/lib/LineEditor/LineEditor.cpp
Log Message:
-----------
Reland '[lineeditor] Add `setHistorySize()` method for adjusting history size' (#115442)
Reland: https://github.com/llvm/llvm-project/pull/110092
Buildbot was failing due to an unused variable warning as there were 2
implementations (with and without libedit). Compared to last version,
wrap the variable inside the `#ifdef HAVE_LIBEDIT`.
Apologies for the oversight @vgvassilev
Commit: ccc471fe3eb825db76ec4248c4d0dfe447aa04b1
https://github.com/llvm/llvm-project/commit/ccc471fe3eb825db76ec4248c4d0dfe447aa04b1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_reduce_and (#118289)
Commit: da23a8372cd37e1a6280e9e0519bc0be60e2c209
https://github.com/llvm/llvm-project/commit/da23a8372cd37e1a6280e9e0519bc0be60e2c209
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Support/FormattedStream.cpp
Log Message:
-----------
[FormattedStream] Add ASCII fast path (#117892)
Printing IR spends a large amount of time updating the column count via
generic UTF-8 APIs. Speed it up by adding a fast path for the common
printable ASCII case.
This makes `-print-on-crash -print-module-scope` about two times faster.
Commit: cbb49d4be676a251ca140db92aa2788dd5514569
https://github.com/llvm/llvm-project/commit/cbb49d4be676a251ca140db92aa2788dd5514569
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/Target.h
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/test/Fir/target-rewrite-boxchar.fir
M flang/test/Fir/target.fir
Log Message:
-----------
[flang][fir] fix ABI bug 116844 (#118121)
Fix issue #116844.
The issue came from a look-up on the func.func for the sret attribute
when lowering fir.call with character arguments. This was broken because
the func.func may or may not have been rewritten when dealing with the
fir.call, but the lookup assumed it had not been rewritten yet. If the
func.func was rewritten and the result moved to a sret argument, the
call was lowered as if the character was meant to be the result, leading
to bad call code and an assert.
It turns out that the whole logic is actually useless since fir.boxchar
are never lowered as sret arguments, instead, lowering directly breaks
the character result into the first two `fir.ref<>, i64` arguments. So,
the sret case was actually never used, except in this bug.
Hence, instead of fixing the logic (probably by looking for argument
attributes on the call itself), just remove this logic that brings
unnecessary complexity.
Commit: c2950982fe481091df91a06e59ab8a86af71509e
https://github.com/llvm/llvm-project/commit/c2950982fe481091df91a06e59ab8a86af71509e
Author: A. Jiang <de34 at live.cn>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
Log Message:
-----------
[libc++] Add Wroclaw straw polls (#118116)
Commit: 2474cf7ad123ea14308293a2237e3552cddb1136
https://github.com/llvm/llvm-project/commit/2474cf7ad123ea14308293a2237e3552cddb1136
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-fcvtlt-fcvtx.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (3/11) (#116829)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`FCVTLT`, and `FCVTX` instructions.
Commit: 94488445cdd1657d1363a4994393b193c291b2cc
https://github.com/llvm/llvm-project/commit/94488445cdd1657d1363a4994393b193c291b2cc
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[flang][MLIR] Support delayed privatization for `wsloop` (PFT -> MLIR) (#118271)
Adds PFT to MLIR lowering for delayed privatization of `omp.wsloop` ops.
Lowering to LLVM IR will be added in a later PR.
Commit: cdbd22876b71acad9e5eeceadc0d8859e6e73b18
https://github.com/llvm/llvm-project/commit/cdbd22876b71acad9e5eeceadc0d8859e6e73b18
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/allocators-unparse.f90
M flang/test/Semantics/OpenMP/allocate-clause01.f90
M flang/test/Semantics/OpenMP/allocators01.f90
M flang/test/Semantics/OpenMP/allocators04.f90
M flang/test/Semantics/OpenMP/allocators05.f90
M flang/test/Semantics/OpenMP/allocators06.f90
M flang/test/Semantics/OpenMP/resolve06.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp
Log Message:
-----------
[flang][OpenMP] Use new modifiers in ALLOCATE clause (#117627)
Again, this simplifies the semantic checks and lowering quite a bit.
Update the check for positive alignment to use a more informative
message, and to highlight the modifier itsef, not the whole clause.
Remove the checks for the allocator expression itself being positive:
there is nothing in the spec that says that it should be positive.
Remove the "simple" modifier from the AllocateT template, since both
simple and complex modifiers are the same thing, only differing in
syntax.
Commit: 61a58fc676297756519412ddc1dfab6a75207b70
https://github.com/llvm/llvm-project/commit/61a58fc676297756519412ddc1dfab6a75207b70
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
Log Message:
-----------
[flang] remove unused var after #118121 (#118295)
Fix https://lab.llvm.org/buildbot/#/builders/89/builds/11704
Commit: 39337ff2dc366fde83b07193b72c294a846c5959
https://github.com/llvm/llvm-project/commit/39337ff2dc366fde83b07193b72c294a846c5959
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
Log Message:
-----------
AMDGPU: Handle cvt_scale F32/F16->F4/F8 gfx950 hazard (#117844)
gfx950 SP changes doc says:
No 4 clk forwarding on opcodes that convert from
F32/F16->F8 or F32/F16->F4. Must insert a NOP or
instruction writing some other destination VREG
after a conversion to F4/F8 since it writes either
low/high half or bytes.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Co-authored-by: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
Commit: 1288f6d405768f57bf2d2fd5914c5a20f902f5d6
https://github.com/llvm/llvm-project/commit/1288f6d405768f57bf2d2fd5914c5a20f902f5d6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_reduce_or (#118292)
Commit: eae30a240e34e1fd31b57096a1b8bdbd8b84352d
https://github.com/llvm/llvm-project/commit/eae30a240e34e1fd31b57096a1b8bdbd8b84352d
Author: Chris Apple <cja-private at pm.me>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
A compiler-rt/test/rtsan/syscall.cpp
Log Message:
-----------
[rtsan] Add syscall interceptor (#118250)
This is a complex one - `syscall` is used when people want to bypass
libc and make the call directly
However, this call:
* Has a variable amount of arguments (up to 6, typically)
* Has arguments that can be any type, (think of whatever arguments go in
to the libc call, or see more details here
https://syscalls.mebeim.net/?table=x86/64/x64/latest)
I've tried to put in a couple tests to ensure we aren't mucking with the
underlying functionality and they seem to be working.
Commit: b587b910d5b6fd27f4730ad933a8465528d6f5be
https://github.com/llvm/llvm-project/commit/b587b910d5b6fd27f4730ad933a8465528d6f5be
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_reduce_xor (#118299)
Commit: 03b5f8f0f0d10c412842ed04b90e2217cf071218
https://github.com/llvm/llvm-project/commit/03b5f8f0f0d10c412842ed04b90e2217cf071218
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Lower/OpenMP/Todo/atomic-compare.f90
A flang/test/Parser/OpenMP/atomic-compare.f90
M flang/test/Parser/OpenMP/atomic-unparse.f90
A flang/test/Semantics/OpenMP/atomic-compare.f90
M flang/test/Semantics/OpenMP/atomic.f90
Log Message:
-----------
[flang][OpenMP]Add parsing and semantics support for ATOMIC COMPARE (#117032)
This adds a minimalistic implementation of parsing and semantics for the
ATOMIC COMPARE feature from OpenMP 5.1.
There is no lowering, just a TODO for that part. Some of the Semantics
is also just a comment explaining that more is needed.
Commit: 40fb74a8ff23c0ff042b5e80b330882b7a625e43
https://github.com/llvm/llvm-project/commit/40fb74a8ff23c0ff042b5e80b330882b7a625e43
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] V_MUL_LO_U16 true16 test (#118118)
This is a NFC. Update and eable V_MUL_LO_U16 codegen test for
true16/fake16 flow
Commit: aa7fe1c10e5d6d0d3aacdb345fed995de413e142
https://github.com/llvm/llvm-project/commit/aa7fe1c10e5d6d0d3aacdb345fed995de413e142
Author: Nathan Gauër <brioche at google.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/include/clang/Basic/AddressSpaces.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/test/SemaTemplate/address_space-dependent.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/pointers/global-addrspacecast.ll
A llvm/test/CodeGen/SPIRV/pointers/variables-storage-class-vk.ll
M llvm/test/CodeGen/SPIRV/pointers/variables-storage-class.ll
Log Message:
-----------
[SPIR-V] Fixup storage class for global private (#116636)
Adds a new address spaces: `hlsl_private`. Variables with such address
space will be emitted with a `Private` storage class.
This is useful for variables global to a SPIR-V module, since up to now,
they were still emitted with a `Function` storage class, which is wrong.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 4ad4d34a226043a5d594b261a9c2a50efd292a76
https://github.com/llvm/llvm-project/commit/4ad4d34a226043a5d594b261a9c2a50efd292a76
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/temp/temp.deduct.guide/p3.cpp
Log Message:
-----------
Revert [Clang] prevent errors for deduction guides using deduced type aliases (#118165)
Reverts https://github.com/llvm/llvm-project/pull/117450
---
Revert https://github.com/llvm/llvm-project/pull/117450 because the
prior behavior aligns with the standard - _`template-name`_ in the
_`simple-template-id`_ in the return type shall be the actual name of a
class template rather than some equivalent alias template. Details
https://github.com/llvm/llvm-project/issues/54909#issuecomment-2508418355.
Commit: 608f4ae113f94b0c4a9b3c944a2aa9f115a805b4
https://github.com/llvm/llvm-project/commit/608f4ae113f94b0c4a9b3c944a2aa9f115a805b4
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/proc-bind.f90
M flang/test/Parser/OpenMP/target-loop-unparse.f90
Log Message:
-----------
[flang][OpenMP] Rename some `Type` members in OpenMP clauses (#117784)
The intent is to keep names in sync with the terminology from the OpenMP
spec:
```
OmpBindClause::Type -> Binding
OmpDefaultClause::Type -> DataSharingAttribute
OmpDeviceTypeClause::Type -> DeviceTypeDescription
OmpProcBindClause::Type -> AffinityPolicy
```
Add more comments with references to the OpenMP specs.
Commit: b27d97bef782a8405e80e7b9f60b44d0537f43b6
https://github.com/llvm/llvm-project/commit/b27d97bef782a8405e80e7b9f60b44d0537f43b6
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][tensor] Add test for invalid tensor.unpack + update error msg (#118275)
Adds a new test for invalid `tensor.unpack` operations where the output
rank does not match the expected rank (input rank + num inner tile
sizes). For example:
```mlir
tensor.unpack %output
inner_dims_pos = [0, 1]
inner_tiles = [32, 16]
into %input : tensor<64x32x16xf32> -> tensor<256x128xf32>
```
In addition, updates the corresponding error message to make it more
informative:
BEFORE:
```mlir
error: packed rank must equal unpacked rank + tiling factors}
```
AFTER:
```mlir
error: packed rank != (unpacked rank + num tiling factors), got 3 != 4
```
Commit: b343f3f3faf5b732cc19c9c51d392389677477ce
https://github.com/llvm/llvm-project/commit/b343f3f3faf5b732cc19c9c51d392389677477ce
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[analyzer][NFC] Cleanup BranchNodeBuilder (#117898)
Previously `BranchNodeBuilder` had a machinery to mark the two possible
branches (true, false) as infeasible, but this was completely useless in
practice, because the `BranchNodeBuilder` objects where short-lived
local variables so the `markInfeasible()` calls did not affect any later
calls.
The only theoretical exception was that in `ExprEngine::processBranch`
the methods of `BranchNodeBuilder` were called within a `for` loop that
iterates over the nodes created by the `check::BranchCondition`
callbacks.
However, currently only two checkers listen to `check::BranchCondition`
and neither of them produces multiple out nodes. This is fortunate,
because if the `for` loop had multiple iterations, then the lingering
effects of `markInfeasible()` would have caused wildly incorrect
behavior.
_For example, let's assume that a hypothetical `check::BranchCondition`
callback transitions to two different states, and the condition
expression happens to be true in the first and false in the second. In
this situation the first iteration of the loop would mark the false
branch as 'infeasible' and then in the second iteration the analyzer
would skip creating the transition to the false branch (from the state
where that is the 'right' path forward)._
After removing `markInfeasible()`, it became clear that the
`isFeasible()` calls in `ExprEngine::processBranch` are redundant
because they only guarded a `generateNode` call -- which immediately
calls `isFeasible()` and does nothing on an infeasible branch.
At this point in the refactoring the only code writing the feasibility
data members is their initialization in the constructors of
`BranchNodeBuilder` and the only code reading them is the check at the
beginning of `BranchNodeBuilder::generateNode`, so it was
straightforward to remove them completely and simplify the logic of
`generateNode()` to let it directly check the nullness of the
`CFGBlock*` pointer that it wants to use.
Finally, after these changes it became clear that in
`ExprEngine::processBranch` the `else` branch
(corresponding to the case when `assumeCondition` fails) is equivalent
to the "normal" case, so I eliminated it as well.
I also update the capitalization of a few variables that are already
affected by this change.
Commit: 637a1ae85538554b98973861802e842fc30d0f91
https://github.com/llvm/llvm-project/commit/637a1ae85538554b98973861802e842fc30d0f91
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_elementwise_popcount (#118307)
Commit: 21d27b3aabf3d06f7e8b1002b34bb467f6ab66d8
https://github.com/llvm/llvm-project/commit/21d27b3aabf3d06f7e8b1002b34bb467f6ab66d8
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
A llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling.ll
Log Message:
-----------
[LoopUnroll] Add tests for loop unrolling on Apple platforms.
Add first set of tests where runtime unrolling can be highly beneficial
on Apple Silicon CPUs.
Commit: 97f94af3560d3ae046f6c3d7ec74b03d1d2493d0
https://github.com/llvm/llvm-project/commit/97f94af3560d3ae046f6c3d7ec74b03d1d2493d0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M .github/workflows/docs.yml
Log Message:
-----------
[Github] Upload built docs as artifact from test build docs job (#118159)
This patch makes the test documentation build job upload the docs that
have been built as artifacts. This makes it much easier to take a peek
at the resulting documentation rather than just being able to see that
it builds.
Commit: 071da9261b7e94c2d2d4e9d3d4eba1f29115e8ae
https://github.com/llvm/llvm-project/commit/071da9261b7e94c2d2d4e9d3d4eba1f29115e8ae
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/alias.cpp
Log Message:
-----------
[Clang] ensure mangled names are valid identifiers before being suggested in ifunc/alias attributes notes (#118170)
Fixes #112205
---
Commit that introduced this feature -
https://github.com/llvm/llvm-project/commit/9306ef9750b7a319d59f6d3e4977e01e39b8f161
Commit: f8b4182f076f8fe55f9d5f617b5a25008a77b22f
https://github.com/llvm/llvm-project/commit/f8b4182f076f8fe55f9d5f617b5a25008a77b22f
Author: Nathan Gauër <brioche at google.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/include/clang/Basic/AddressSpaces.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/test/SemaTemplate/address_space-dependent.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
R llvm/test/CodeGen/SPIRV/pointers/global-addrspacecast.ll
R llvm/test/CodeGen/SPIRV/pointers/variables-storage-class-vk.ll
M llvm/test/CodeGen/SPIRV/pointers/variables-storage-class.ll
Log Message:
-----------
Revert "[SPIR-V] Fixup storage class for global private (#116636)" (#118312)
This reverts commit aa7fe1c10e5d6d0d3aacdb345fed995de413e142.
Commit: 8935165659b7c31914e86059b91c9da8389cf19a
https://github.com/llvm/llvm-project/commit/8935165659b7c31914e86059b91c9da8389cf19a
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
A llvm/test/MachineVerifier/RISCV/lit.local.cfg
M llvm/test/MachineVerifier/RISCV/subreg-liveness.mir
Log Message:
-----------
[NFCI][test] Use lit.local.cfg in test/MachineVerifier/RISCV to gate tests (#118217)
87cc4b48c08a627f330396f941b84671c5e591d5 added `REQUIRES:
riscv64-registered-target` to the only test in this directory. It seems
better (and also reflects what we do elsewhere, including in the AMDGPU/
subdir in MachineVerifier) to gate for all files in the directory via
lit.local.cfg.
Commit: fcfdabfea18b4d2dd98a1c5b52d5b33aff77ae1a
https://github.com/llvm/llvm-project/commit/fcfdabfea18b4d2dd98a1c5b52d5b33aff77ae1a
Author: Ian Wood <ianwood2024 at u.northwestern.edu>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[MLIR] Improve compose expand(collapse) pattern (#117768)
If expand(collapse) has a dimension that gets collapsed and then
expanded to the same shape, the pattern would fail to canonicalize this
to a single collapse shape. Line 341 was changed because the
expand(collapse) could be a reinterpret-cast like sequence where the
shapes differ but the rank is the same. This cannot be represented by a
single `collapse_shape` op.
Signed-off-by: Ian Wood <ianwood2024 at u.northwestern.edu>
Commit: ac7fe426163adf9123473aeb94448cf3e84f6d09
https://github.com/llvm/llvm-project/commit/ac7fe426163adf9123473aeb94448cf3e84f6d09
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[Clang][AArch64]Refactor typespec handling in SveEmitter.cpp (#117717)
- Switch to an enumerated type approach, which is less error-prone as we
continue to add new types. This is similar to NeonEmitter.
- Fix existing faulty typespec modifiers
Commit: fed07a05454d53763c10d482cd6e853509eee252
https://github.com/llvm/llvm-project/commit/fed07a05454d53763c10d482cd6e853509eee252
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M compiler-rt/test/builtins/Unit/atomic_test.c
Log Message:
-----------
[compiler-rt][tests] Make this test case pass on AArch64 (#117628)
See also D92832 and GCC bug
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80878
Commit: 05096590e0ce68bdc6d32aac9ddbe8728e7514ae
https://github.com/llvm/llvm-project/commit/05096590e0ce68bdc6d32aac9ddbe8728e7514ae
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/test/Parser/OpenMP/affinity-clause.f90
M flang/test/Parser/OpenMP/target_device_parse.f90
M flang/test/Parser/OpenMP/target_device_unparse.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
Log Message:
-----------
[flang][OpenMP] Use new modifiers with AFFINITY/ALIGNED/DEVICE (#117786)
This is a mostly mechanical change from specific modifiers embedded
directly in a clause to the Modifier variant.
Additional comments and references to the OpenMP specs were added.
Commit: a951e76fbed642dbe3f51965d17ca566be586cc5
https://github.com/llvm/llvm-project/commit/a951e76fbed642dbe3f51965d17ca566be586cc5
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
Log Message:
-----------
[lldb] Added an exponential algorithm for the sleep time in connect_to_debug_monitor() (#118222)
Reduced MAX_ATTEMPTS to 10.
The sleep time will be 3, 3.6, 4.3, ..., 13, 15.
The total sleep time is 78 + 0.5 * MAX_CONNECT_ATTEMPTS * MAX_ATTEMPTS = 128.
Note the timeout is 600, so the rest time must be enough.
Increased the port range (12000..20000).
Commit: 582754280c73f3b3ead67603df6b896d3ad058d8
https://github.com/llvm/llvm-project/commit/582754280c73f3b3ead67603df6b896d3ad058d8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M libcxx/docs/Status/Cxx23Papers.csv
Log Message:
-----------
[libc++][NFC] Fix slightly incorrect row in the CSV files
Commit: d898ff650ae09e3ef942592aee2e87627f45d7c6
https://github.com/llvm/llvm-project/commit/d898ff650ae09e3ef942592aee2e87627f45d7c6
Author: Perry Gibson <Wheest at users.noreply.github.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M mlir/python/mlir/dialects/func.py
M mlir/test/python/dialects/func.py
Log Message:
-----------
[mlir,python] Fix case when `FuncOp.arg_attrs` is not set (#117188)
FuncOps can have `arg_attrs`, an array of dictionary attributes
associated with their arguments.
E.g.,
```mlir
func.func @main(%arg0: tensor<8xf32> {test.attr_name = "value"}, %arg1: tensor<8x16xf32>)
```
These are exposed via the MLIR Python bindings with
`my_funcop.arg_attrs`.
In this case, it would return `[{test.attr_name = "value"}, {}]`, i.e.,
`%arg1` has an empty `DictAttr`.
However, if I try and access this property from a FuncOp with an empty
`arg_attrs`, e.g.,
```mlir
func.func @main(%arg0: tensor<8xf32>, %arg1: tensor<8x16xf32>)
```
This raises the error:
```python
return ArrayAttr(self.attributes[ARGUMENT_ATTRIBUTE_NAME])
~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^
KeyError: 'attempt to access a non-existent attribute'
```
This PR fixes this by returning the expected `[{}, {}]`.
Commit: 73186546f0c0209c65c4b4ef1379a4832545b871
https://github.com/llvm/llvm-project/commit/73186546f0c0209c65c4b4ef1379a4832545b871
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/RISCV/rv64-float-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64-float-convert.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
Log Message:
-----------
[LegalizeTypes][RISCV] Call setTypeListBeforeSoften from ExpandIntRes_FP_TO_XINT if the FP type needs to be softened (#118269)
This avoids an unnecessary sext.w before the libcall.
Commit: bee33b5291a28aec76e98c0da25349266c7b653c
https://github.com/llvm/llvm-project/commit/bee33b5291a28aec76e98c0da25349266c7b653c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GISel] Support f32/f64 powi. (#117937)
Need to force libcall legalization to treat the integer argument as
signed so that it can be promoted to XLen in call lowering for RV64.
Alternatively we could promote the operand before converting to libcall,
but going through call lowering is closer to what SelectionDAG does.
Commit: c16c0e26236d0468a2411cb3bce219d3c70650e9
https://github.com/llvm/llvm-project/commit/c16c0e26236d0468a2411cb3bce219d3c70650e9
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
Log Message:
-----------
[AMDGPU][SIOptimizeVGPRLiveRange] Add setpreservesCFG in the legacy pass flow. (#118256)
Commit: c9fa3195f0f012a5606ec3e403a1f111b3a4e0c7
https://github.com/llvm/llvm-project/commit/c9fa3195f0f012a5606ec3e403a1f111b3a4e0c7
Author: Luke Lau <luke at igalia.com>
Date: 2024-12-03 (Tue, 03 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
Log Message:
-----------
[RISCV] Use LiveIntervals to determine if AVL dominates when coalescing (#118285)
In order to coalesce a vsetvli with a register AVL into a previous
vsetvli, we need to make sure that the AVL register is reachable at the
previous vsetvli.
Back in pre-RA vsetvli insertion we just checked to see if the two
virtual registers were the same virtual register, and then this was
hacked around in the move to post-RA. We can instead use live intervals
to check that the reaching definition is the same at both instructions.
On its own this doesn't have much of an impact, but helps a lot in
#118283 and enables coalescing in about 60 of the test cases from that
PR.
Commit: a6fa51f5ce8f31a088f04d7c14690bb0de3259f1
https://github.com/llvm/llvm-project/commit/a6fa51f5ce8f31a088f04d7c14690bb0de3259f1
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
Log Message:
-----------
[lld] Move handling of message separator to reportDiagnostic()
This ensures that it is also updated when calling log() and not just for
errors and warnings. This was noticed in the downstream CHERI fork where
a test using CHECK-NEXT was seeing empty lines after single-line log()
messages.
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/117587
Commit: 57452bb3a92d77f260296669269815e057b19b6e
https://github.com/llvm/llvm-project/commit/57452bb3a92d77f260296669269815e057b19b6e
Author: Raphael Moreira Zinsly <6718397+rzinsly at users.noreply.github.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[NFC][RISCV] Remove CFIIndex argument from allocateStack (#117871)
Calculates CFIIndex inside RISCVFrameLowering::allocateStack instead of
sending it by argument.
Commit: a76366496be1017be4ba2f14bc7d970f3616a4ef
https://github.com/llvm/llvm-project/commit/a76366496be1017be4ba2f14bc7d970f3616a4ef
Author: Alex Richardson <alexrichardson at google.com>
Date: 2024-12-02 (Mon, 02 Dec 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
A .ci/generate_test_report.py
A .ci/metrics/Dockerfile
A .ci/metrics/metrics.py
A .ci/metrics/requirements.lock.txt
A .ci/metrics/requirements.txt
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
A .ci/requirements.txt
M .github/new-issues-labeler.yml
M .github/new-prs-labeler.yml
A .github/workflows/build-metrics-container.yml
M .github/workflows/docs.yml
M .github/workflows/libcxx-build-and-test.yaml
A .github/workflows/libcxx-build-containers.yml
R bolt/CODE_OWNERS.TXT
A bolt/Maintainers.txt
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/Exceptions.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/include/bolt/Profile/ProfileYAMLMapping.h
M bolt/include/bolt/Profile/YAMLProfileReader.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Core/Exceptions.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/ReorderFunctions.cpp
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/lib/Passes/VeneerElimination.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Profile/YAMLProfileWriter.cpp
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/test/AArch64/check-init-not-moved.s
M bolt/test/AArch64/data-at-0-offset.c
M bolt/test/AArch64/double_jump.cpp
A bolt/test/AArch64/veneer-lld-abs.s
M bolt/test/R_ABS.pic.lld.cpp
M bolt/test/X86/double-jump.test
M bolt/test/X86/dwarf5-df-inlined-subroutine-gc-sections-range.test
A bolt/test/X86/exceptions-compact.s
M bolt/test/X86/jmp-optimization.test
A bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
A bolt/test/X86/match-blocks-with-pseudo-probes.test
M bolt/test/X86/match-functions-with-call-graph.test
M bolt/test/X86/match-functions-with-calls-as-anchors.test
A bolt/test/X86/pie-eh-split-undo.s
M bolt/test/X86/reader-stale-yaml.test
A bolt/test/eh-frame-hdr.test
A bolt/test/eh-frame-overwrite.test
M bolt/test/pie.test
M bolt/test/runtime/X86/Inputs/pie-exceptions-failed-split.s
M bolt/test/runtime/X86/instrumentation-indirect.c
R bolt/test/runtime/X86/pie-exceptions-failed-split.test
A bolt/test/runtime/X86/pie-exceptions-split.test
M bolt/test/runtime/bolt-reserved.cpp
M bolt/unittests/Core/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
A bolt/unittests/Core/MemoryMaps.cpp
M bolt/utils/bughunter.sh
R clang-tools-extra/CODE_OWNERS.TXT
A clang-tools-extra/Maintainers.txt
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/AvoidConstOrRefDataMembersCheck.cpp
M clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStartsEndsWithCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.h
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ModulesBuilder.h
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/branch-clone.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/redundant-expression.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-internal-linkage.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-starts-ends-with.rst
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang-tools-extra/test/CMakeLists.txt
A clang-tools-extra/test/clang-reorder-fields/FieldAnnotationsInMacros.cpp
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/string
A clang-tools-extra/test/clang-tidy/checkers/bugprone/alpha-core-identicalexpr.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/return-const-ref-from-parameter.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/avoid-const-or-ref-data-members.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-func.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-starts-ends-with.cpp
M clang/Maintainers.rst
M clang/cmake/caches/CrossWinToARMLinux.cmake
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/AddressSanitizer.rst
M clang/docs/ClangFormat.rst
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LeakSanitizer.rst
M clang/docs/LibASTMatchersReference.html
M clang/docs/OpenMPSupport.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerCoverage.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/docs/UsersManual.rst
A clang/docs/WarningSuppressionMappings.rst
M clang/docs/analyzer/checkers.rst
M clang/docs/index.rst
M clang/include/clang-c/Index.h
M clang/include/clang/APINotes/Types.h
M clang/include/clang/AST/ASTImporter.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/ASTStructuralEquivalence.h
M clang/include/clang/AST/CanonicalType.h
M clang/include/clang/AST/CommentCommands.td
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
M clang/include/clang/Analysis/CallGraph.h
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
M clang/include/clang/Basic/BuiltinsLoongArchLSX.def
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticRefactoringKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_mve.td
M clang/include/clang/Basic/arm_mve_defs.td
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_neon_incl.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Interpreter/PartialTranslationUnit.h
M clang/include/clang/Lex/HeaderSearchOptions.h
R clang/include/clang/Parse/ParseDiagnostic.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/include/clang/Tooling/Inclusions/IncludeStyle.h
M clang/include/module.modulemap
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Source.cpp
M clang/lib/AST/ByteCode/Source.h
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/CommentCommandTraits.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DeclarationName.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OSLog.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/ParentMapContext.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtIterator.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTTBuilder.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/CallGraph.cpp
M clang/lib/Analysis/CalledOnceCheck.cpp
M clang/lib/Analysis/Consumed.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/lib/Analysis/FlowSensitive/Arena.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/FlowSensitive/Models/ChromiumCheckModel.cpp
M clang/lib/Analysis/IntervalPartition.cpp
M clang/lib/Analysis/ProgramPoint.cpp
M clang/lib/Analysis/ReachableCode.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/SourceManager.cpp
A clang/lib/Basic/TargetDefines.h
M clang/lib/Basic/Targets.h
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Basic/Warnings.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/LinkInModulesPass.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/DriverOptions.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amdgpuintrin.h
A clang/lib/Headers/amxbf16transposeintrin.h
A clang/lib/Headers/amxcomplextransposeintrin.h
M clang/lib/Headers/amxfp16intrin.h
A clang/lib/Headers/amxfp16transposeintrin.h
M clang/lib/Headers/amxfp8intrin.h
M clang/lib/Headers/amxintrin.h
A clang/lib/Headers/amxmovrsintrin.h
A clang/lib/Headers/amxmovrstransposeintrin.h
M clang/lib/Headers/avx512vpopcntdqintrin.h
M clang/lib/Headers/avx512vpopcntdqvlintrin.h
M clang/lib/Headers/cuda_wrappers/new
A clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/intrin.h
M clang/lib/Headers/larchintrin.h
M clang/lib/Headers/lasxintrin.h
M clang/lib/Headers/limits.h
M clang/lib/Headers/lsxintrin.h
A clang/lib/Headers/movrsintrin.h
A clang/lib/Headers/nvptxintrin.h
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/CodeCompletion.cpp
M clang/lib/Interpreter/IncrementalExecutor.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Interpreter/Wasm.h
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/MacroArgs.cpp
M clang/lib/Lex/MacroInfo.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPCallbacks.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/PreprocessingRecord.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/PreprocessorLexer.cpp
M clang/lib/Lex/TokenLexer.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/ScopeInfo.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaFixItUtils.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/Serialization/GeneratePCH.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/CastToStructChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ChrootChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
R clang/lib/StaticAnalyzer/Checkers/IdenticalExprChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCMissingSuperCallChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExplodedGraph.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
M clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.apinotes
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.h
M clang/test/APINotes/lifetimebound.cpp
M clang/test/APINotes/swift-import-as.cpp
A clang/test/AST/ByteCode/altivec.c
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/c23.c
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/vectors.cpp
R clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/RWBuffer-AST.hlsl
R clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
A clang/test/AST/HLSL/TypedBuffers-AST.hlsl
A clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/AST/arm-mfp8.cpp
M clang/test/AST/ast-dump-comment.cpp
A clang/test/AST/ast-dump-cxx2b-deducing-this.cpp
M clang/test/AST/ast-dump-recovery.cpp
A clang/test/AST/ast-print-openacc-combined-construct.cpp
A clang/test/AST/ast-print-packindexingexpr.cpp
M clang/test/AST/attr-lifetime-capture-by.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked-ptr.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/bstring.cpp
M clang/test/Analysis/chroot.c
M clang/test/Analysis/copy-elision.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
M clang/test/Analysis/cxx-uninitialized-object-unguarded-access.cpp
M clang/test/Analysis/explain-svals.cpp
R clang/test/Analysis/identical-expressions.cpp
M clang/test/Analysis/initializer.cpp
M clang/test/Analysis/iterator-modeling.cpp
M clang/test/Analysis/show-checker-list.c
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
M clang/test/Analysis/stl-algorithm-modeling-aggressive-std-find-modeling.cpp
M clang/test/Analysis/stl-algorithm-modeling.cpp
A clang/test/Analysis/store-dump-orders.cpp
M clang/test/Analysis/string.c
M clang/test/Analysis/string.cpp
A clang/test/Analysis/string_notnullterm.c
M clang/test/Analysis/taint-generic.cpp
M clang/test/Analysis/template-param-objects.cpp
A clang/test/Analysis/void-call-exit-modelling.c
A clang/test/C/C23/n2412.c
M clang/test/CXX/class.access/class.friend/p11.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p3.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.noreturn/p1.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp
M clang/test/CXX/drs/cwg158.cpp
M clang/test/CXX/drs/cwg722.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/ClangScanDeps/diagnostics.c
M clang/test/ClangScanDeps/header-search-pruning-transitive.c
M clang/test/ClangScanDeps/link-libraries.c
M clang/test/ClangScanDeps/modules-context-hash.c
M clang/test/ClangScanDeps/modules-dep-args.c
M clang/test/ClangScanDeps/modules-extern-submodule.c
M clang/test/ClangScanDeps/modules-extern-unrelated.m
M clang/test/ClangScanDeps/modules-file-path-isolation.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-full-by-mod-name.c
M clang/test/ClangScanDeps/modules-full.cpp
M clang/test/ClangScanDeps/modules-implicit-dot-private.m
M clang/test/ClangScanDeps/modules-incomplete-umbrella.c
M clang/test/ClangScanDeps/modules-inferred.m
M clang/test/ClangScanDeps/modules-no-undeclared-includes.c
M clang/test/ClangScanDeps/modules-pch-common-submodule.c
M clang/test/ClangScanDeps/modules-pch-common-via-submodule.c
M clang/test/ClangScanDeps/modules-pch.c
M clang/test/ClangScanDeps/modules-priv-fw-from-pub.m
M clang/test/ClangScanDeps/modules-redefinition.m
M clang/test/ClangScanDeps/modules-symlink-dir-vfs.c
M clang/test/ClangScanDeps/modules-transitive.c
M clang/test/ClangScanDeps/optimize-vfs.m
M clang/test/ClangScanDeps/removed-args.c
A clang/test/CodeCompletion/keywords-cxx20.cpp
A clang/test/CodeGen/AArch64/ABI-align-packed-assembly.c
A clang/test/CodeGen/AArch64/ABI-align-packed.c
A clang/test/CodeGen/AArch64/args-hfa.c
A clang/test/CodeGen/AArch64/args.cpp
A clang/test/CodeGen/AArch64/arguments-hfa-v3.c
A clang/test/CodeGen/AArch64/attr-mode-complex.c
A clang/test/CodeGen/AArch64/attr-mode-float.c
A clang/test/CodeGen/AArch64/bf16-dotprod-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-lane-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-ldst-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
A clang/test/CodeGen/AArch64/branch-protection-attr.c
A clang/test/CodeGen/AArch64/byval-temp.c
A clang/test/CodeGen/AArch64/cpu-supports-target.c
A clang/test/CodeGen/AArch64/cpu-supports.c
A clang/test/CodeGen/AArch64/debug-sve-vector-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx2-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx3-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx4-types.c
A clang/test/CodeGen/AArch64/debug-types.c
A clang/test/CodeGen/AArch64/elf-pauthabi.c
A clang/test/CodeGen/AArch64/fix-cortex-a53-835769.c
A clang/test/CodeGen/AArch64/fmv-dependencies.c
A clang/test/CodeGen/AArch64/fmv-resolver-emission.c
A clang/test/CodeGen/AArch64/fmv-streaming.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_cvt.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_scale.c
A clang/test/CodeGen/AArch64/fpm-helpers.c
A clang/test/CodeGen/AArch64/gcs.c
A clang/test/CodeGen/AArch64/inline-asm.c
A clang/test/CodeGen/AArch64/inlineasm-ios.c
A clang/test/CodeGen/AArch64/ls64-inline-asm.c
A clang/test/CodeGen/AArch64/ls64.c
A clang/test/CodeGen/AArch64/matmul.cpp
A clang/test/CodeGen/AArch64/mixed-target-attributes.c
A clang/test/CodeGen/AArch64/mops.c
A clang/test/CodeGen/AArch64/neon-2velem.c
A clang/test/CodeGen/AArch64/neon-3v.c
A clang/test/CodeGen/AArch64/neon-across.c
A clang/test/CodeGen/AArch64/neon-dot-product.c
A clang/test/CodeGen/AArch64/neon-extract.c
A clang/test/CodeGen/AArch64/neon-faminmax-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fcvt-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fma.c
A clang/test/CodeGen/AArch64/neon-fp16fml.c
A clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_fscale.c
A clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/neon-intrinsics.c
A clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
A clang/test/CodeGen/AArch64/neon-ldst-one.c
A clang/test/CodeGen/AArch64/neon-luti.c
A clang/test/CodeGen/AArch64/neon-misc-constrained.c
A clang/test/CodeGen/AArch64/neon-misc.c
A clang/test/CodeGen/AArch64/neon-perm.c
A clang/test/CodeGen/AArch64/neon-range-checks.c
A clang/test/CodeGen/AArch64/neon-scalar-copy.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
A clang/test/CodeGen/AArch64/neon-sha3.c
A clang/test/CodeGen/AArch64/neon-shifts.c
A clang/test/CodeGen/AArch64/neon-sm4-sm3.c
A clang/test/CodeGen/AArch64/neon-tbl.c
A clang/test/CodeGen/AArch64/neon-vcadd.c
A clang/test/CodeGen/AArch64/neon-vcmla.c
A clang/test/CodeGen/AArch64/neon-vcombine.c
A clang/test/CodeGen/AArch64/neon-vget-hilo.c
A clang/test/CodeGen/AArch64/neon-vget.c
A clang/test/CodeGen/AArch64/neon-vsqadd-float-conversion.c
A clang/test/CodeGen/AArch64/neon-vuqadd-float-conversion-warning.c
A clang/test/CodeGen/AArch64/poly-add.c
A clang/test/CodeGen/AArch64/poly128.c
A clang/test/CodeGen/AArch64/poly64.c
A clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
A clang/test/CodeGen/AArch64/pure-scalable-args.c
A clang/test/CodeGen/AArch64/sign-return-address.c
A clang/test/CodeGen/AArch64/sme-inline-callees-streaming-attrs.c
A clang/test/CodeGen/AArch64/sme-inline-streaming-attrs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/aarch64-sme-attrs.cpp
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_cnt.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_read.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_builtin.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_write.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_zero.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/aarch64-sme2-attrs.cpp
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add_sub_za16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_bmop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_clamp.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtn.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_faminmax.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fmlas16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_frint.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_int_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_max.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_maxnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_min.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_minnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mla.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlal.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlall.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mls.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlsl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mopa_nonwide.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_read.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sqdmulh.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sub.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vdot.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_qrshr.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_rshl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_zero_zt.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_movaz.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_zero.c
A clang/test/CodeGen/AArch64/soft-float-abi-errors.c
A clang/test/CodeGen/AArch64/soft-float-abi.c
A clang/test/CodeGen/AArch64/strictfp-builtins.c
A clang/test/CodeGen/AArch64/subarch-compatbility.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
A clang/test/CodeGen/AArch64/sve-inline-asm-crash.c
A clang/test/CodeGen/AArch64/sve-inline-asm-datatypes.c
A clang/test/CodeGen/AArch64/sve-inline-asm-negative-test.c
A clang/test/CodeGen/AArch64/sve-inline-asm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/README
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abs.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acle.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_aclt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_add.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adda.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_addv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_and.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_andv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bic.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brka.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpeq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmple.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmplt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpne.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpuo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_compact.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvtnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_div.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_divr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq_const.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eorv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_expa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_exth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_index.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp32.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_max.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_min.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mov.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_msb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nand.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_neg.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmsb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_not.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfalse.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfirst.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pnext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptest.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptrue.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdech.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qinch.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qsub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rbit.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rdffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpe.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recps.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinti.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrte.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrts.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_scale.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_setffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sqrt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_subr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sudot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tsmul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tssel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpkhi.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpklo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_usdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilele.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilelt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_wrffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2.c
A clang/test/CodeGen/AArch64/sve-vector-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
A clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vector-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vector-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vector-subscript-ops.c
A clang/test/CodeGen/AArch64/sve-vls-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vls-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vls-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vls-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vls-subscript-ops.c
A clang/test/CodeGen/AArch64/sve.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aba.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adalp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bcax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bdep.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bext.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bgrp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl1n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl2n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cdot.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cmla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtxnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eor3.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eorbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eortb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_faminmax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histcnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histseg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_logb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_luti.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_match.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mls.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nbsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nmatch.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qabs.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qcadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qneg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdcmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlsh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshlu.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rax1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_recpe.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rhadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsqrte.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sli.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4e.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4ekey.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sri.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subltb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_uqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilege.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilegt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_xar.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfadd.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmax.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmin.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfminnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfsub.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_cntp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_int_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pext.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pfalse.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ptrue.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qcvtn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qrshr.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_sclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_undef_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_pn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_x2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
A clang/test/CodeGen/AArch64/svepcs.c
A clang/test/CodeGen/AArch64/sysregs-target.c
A clang/test/CodeGen/AArch64/targetattr-arch.c
A clang/test/CodeGen/AArch64/targetattr-crypto.c
A clang/test/CodeGen/AArch64/targetattr.c
A clang/test/CodeGen/AArch64/tme.cpp
A clang/test/CodeGen/AArch64/type-sizes.c
A clang/test/CodeGen/AArch64/v8.1a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.5a-scalar-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.6a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/varargs-ms.c
A clang/test/CodeGen/AArch64/varargs-sve.c
A clang/test/CodeGen/AArch64/varargs.c
A clang/test/CodeGen/AArch64/vpcs.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-inline.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-weak.c
M clang/test/CodeGen/PowerPC/musttail-indirect.cpp
M clang/test/CodeGen/PowerPC/musttail-inline.c
M clang/test/CodeGen/PowerPC/musttail-undefined.c
M clang/test/CodeGen/PowerPC/musttail-weak.c
M clang/test/CodeGen/PowerPC/musttail.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-cast.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-codegen.c
A clang/test/CodeGen/RISCV/builtin-cpu-is-error.c
A clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M clang/test/CodeGen/RISCV/rvv-vls-arith-ops.c
M clang/test/CodeGen/RISCV/rvv-vls-bitwise-ops.c
M clang/test/CodeGen/RISCV/rvv-vls-compare-ops.c
M clang/test/CodeGen/RISCV/rvv-vls-shift-ops.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/SystemZ/zos-mixed-ptr-sizes.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/SystemZ/zvector2.c
A clang/test/CodeGen/X86/amx_fp8_api.c
A clang/test/CodeGen/X86/amx_movrs.c
A clang/test/CodeGen/X86/amx_movrs_api.c
A clang/test/CodeGen/X86/amx_movrs_errors.c
A clang/test/CodeGen/X86/amx_movrs_tranpose.c
A clang/test/CodeGen/X86/amx_movrs_tranpose_api.c
A clang/test/CodeGen/X86/amx_movrs_transpose_errors.c
M clang/test/CodeGen/X86/amx_transpose.c
M clang/test/CodeGen/X86/amx_transpose_api.c
M clang/test/CodeGen/X86/amx_transpose_errors.c
M clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c
M clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/math-builtins.c
A clang/test/CodeGen/X86/movrs-builtins.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/X86/x86_64-PR42672.c
R clang/test/CodeGen/aarch64-ABI-align-packed-assembly.c
R clang/test/CodeGen/aarch64-ABI-align-packed.c
R clang/test/CodeGen/aarch64-args-hfa.c
R clang/test/CodeGen/aarch64-args.cpp
R clang/test/CodeGen/aarch64-arguments-hfa-v3.c
R clang/test/CodeGen/aarch64-attr-mode-complex.c
R clang/test/CodeGen/aarch64-attr-mode-float.c
R clang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-reinterpret-intrinsics.c
R clang/test/CodeGen/aarch64-branch-protection-attr.c
R clang/test/CodeGen/aarch64-byval-temp.c
R clang/test/CodeGen/aarch64-cpu-supports-target.c
R clang/test/CodeGen/aarch64-cpu-supports.c
R clang/test/CodeGen/aarch64-debug-sve-vector-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx2-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx3-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx4-types.c
R clang/test/CodeGen/aarch64-debug-types.c
R clang/test/CodeGen/aarch64-elf-pauthabi.c
R clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
R clang/test/CodeGen/aarch64-fmv-dependencies.c
R clang/test/CodeGen/aarch64-fmv-resolver-emission.c
R clang/test/CodeGen/aarch64-fmv-streaming.c
R clang/test/CodeGen/aarch64-fp8-intrinsics/acle_sme2_fp8_scale.c
R clang/test/CodeGen/aarch64-fpm-helpers.c
R clang/test/CodeGen/aarch64-gcs.c
R clang/test/CodeGen/aarch64-inline-asm.c
R clang/test/CodeGen/aarch64-inlineasm-ios.c
R clang/test/CodeGen/aarch64-ls64-inline-asm.c
R clang/test/CodeGen/aarch64-ls64.c
R clang/test/CodeGen/aarch64-matmul.cpp
R clang/test/CodeGen/aarch64-mixed-target-attributes.c
R clang/test/CodeGen/aarch64-mops.c
R clang/test/CodeGen/aarch64-neon-2velem.c
R clang/test/CodeGen/aarch64-neon-3v.c
R clang/test/CodeGen/aarch64-neon-across.c
R clang/test/CodeGen/aarch64-neon-dot-product.c
R clang/test/CodeGen/aarch64-neon-extract.c
R clang/test/CodeGen/aarch64-neon-faminmax-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fma.c
R clang/test/CodeGen/aarch64-neon-fp16fml.c
R clang/test/CodeGen/aarch64-neon-fp8-intrinsics/acle_neon_fscale.c
R clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-neon-intrinsics.c
R clang/test/CodeGen/aarch64-neon-ldst-one-rcpc3.c
R clang/test/CodeGen/aarch64-neon-ldst-one.c
R clang/test/CodeGen/aarch64-neon-luti.c
R clang/test/CodeGen/aarch64-neon-misc-constrained.c
R clang/test/CodeGen/aarch64-neon-misc.c
R clang/test/CodeGen/aarch64-neon-perm.c
R clang/test/CodeGen/aarch64-neon-range-checks.c
R clang/test/CodeGen/aarch64-neon-scalar-copy.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem-constrained.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
R clang/test/CodeGen/aarch64-neon-sha3.c
R clang/test/CodeGen/aarch64-neon-shifts.c
R clang/test/CodeGen/aarch64-neon-sm4-sm3.c
R clang/test/CodeGen/aarch64-neon-tbl.c
R clang/test/CodeGen/aarch64-neon-vcadd.c
R clang/test/CodeGen/aarch64-neon-vcmla.c
R clang/test/CodeGen/aarch64-neon-vcombine.c
R clang/test/CodeGen/aarch64-neon-vget-hilo.c
R clang/test/CodeGen/aarch64-neon-vget.c
R clang/test/CodeGen/aarch64-neon-vsqadd-float-conversion.c
R clang/test/CodeGen/aarch64-neon-vuqadd-float-conversion-warning.c
R clang/test/CodeGen/aarch64-poly-add.c
R clang/test/CodeGen/aarch64-poly128.c
R clang/test/CodeGen/aarch64-poly64.c
R clang/test/CodeGen/aarch64-pure-scalable-args-empty-union.c
R clang/test/CodeGen/aarch64-pure-scalable-args.c
R clang/test/CodeGen/aarch64-sign-return-address.c
R clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_builtin.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/aarch64-sme2-attrs.cpp
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_faminmax.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_frint.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_max.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_maxnm.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_min.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_minnm.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sqdmulh.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sub.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_add.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_rshl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_zero_zt.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_movaz.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
R clang/test/CodeGen/aarch64-soft-float-abi-errors.c
R clang/test/CodeGen/aarch64-soft-float-abi.c
R clang/test/CodeGen/aarch64-strictfp-builtins.c
R clang/test/CodeGen/aarch64-subarch-compatbility.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
R clang/test/CodeGen/aarch64-sve-inline-asm-crash.c
R clang/test/CodeGen/aarch64-sve-inline-asm-datatypes.c
R clang/test/CodeGen/aarch64-sve-inline-asm-negative-test.c
R clang/test/CodeGen/aarch64-sve-inline-asm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/README
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq_const.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c
R clang/test/CodeGen/aarch64-sve-vector-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vector-bits-codegen.c
R clang/test/CodeGen/aarch64-sve-vector-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vector-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vector-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vector-subscript-ops.c
R clang/test/CodeGen/aarch64-sve-vls-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vls-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vls-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vls-subscript-ops.c
R clang/test/CodeGen/aarch64-sve.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_faminmax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_luti.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dupq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_int_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ldnt1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_loads.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ptrue.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qrshr.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_store.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tblq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tbxq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_undef_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_x2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq2.c
R clang/test/CodeGen/aarch64-svepcs.c
R clang/test/CodeGen/aarch64-sysregs-target.c
R clang/test/CodeGen/aarch64-targetattr-arch.c
R clang/test/CodeGen/aarch64-targetattr-crypto.c
R clang/test/CodeGen/aarch64-targetattr.c
R clang/test/CodeGen/aarch64-tme.cpp
R clang/test/CodeGen/aarch64-type-sizes.c
R clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.5a-neon-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.5a-scalar-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.6a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-varargs-ms.c
R clang/test/CodeGen/aarch64-varargs-sve.c
R clang/test/CodeGen/aarch64-varargs.c
R clang/test/CodeGen/aarch64-vpcs.c
M clang/test/CodeGen/alias.cpp
M clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGen/arm-mve-intrinsics/compare.c
M clang/test/CodeGen/arm-mve-intrinsics/ternary.c
M clang/test/CodeGen/arm-vfp16-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-cpuspecific.c
M clang/test/CodeGen/attr-ifunc.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGen/blocks.c
M clang/test/CodeGen/bounds-checking.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-wasm.c
M clang/test/CodeGen/catch-undef-behavior.c
M clang/test/CodeGen/constrained-math-builtins.c
A clang/test/CodeGen/embed-bitcode-marker-with-nonzero-as.c
A clang/test/CodeGen/ifunc-win.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/libcalls.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/math-libcalls.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
A clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/CodeGen/sanitize-coverage-gated-callbacks.c
A clang/test/CodeGen/scoped-fence-ops.c
A clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/tbaa-struct-bitfield-endianness.cpp
A clang/test/CodeGen/ubsan-trap-merge.c
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
A clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
A clang/test/CodeGenCXX/aarch64-mangle-sme-atts.cpp
M clang/test/CodeGenCXX/aarch64-sve-vector-conditional-op.cpp
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/CodeGenCXX/attr-target-version.cpp
A clang/test/CodeGenCXX/auto-var-init-attr.cpp
M clang/test/CodeGenCXX/builtin-calling-conv.cpp
M clang/test/CodeGenCXX/fmv-namespace.cpp
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
A clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-lib.hlsl
A clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
A clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
A clang/test/CodeGenHLSL/builtins/asdouble.hlsl
A clang/test/CodeGenHLSL/builtins/clip.hlsl
A clang/test/CodeGenHLSL/resource-bindings.hlsl
A clang/test/CodeGenHLSL/semantics/SV_GroupID.hlsl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9-4-generic-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-read-tr.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-f16.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp
A clang/test/Driver/Inputs/cpunative/cortex-a57
A clang/test/Driver/Inputs/cpunative/cortex-a72
A clang/test/Driver/Inputs/cpunative/cortex-a76
A clang/test/Driver/Inputs/cpunative/neoverse-n1
A clang/test/Driver/Inputs/cpunative/neoverse-v2
M clang/test/Driver/aarch64-implied-sme-features.c
M clang/test/Driver/aarch64-implied-sve-features.c
A clang/test/Driver/aarch64-mcpu-native.c
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/amdgpu-openmp-system-arch-fail.c
M clang/test/Driver/arm-alignment.c
M clang/test/Driver/cl-options.c
M clang/test/Driver/cl-zc.cpp
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/codeview-column-info.c
A clang/test/Driver/cuda-no-threadsafe-statics.cu
A clang/test/Driver/darwin-subframeworks.c
A clang/test/Driver/fprofile-sample-use.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/fveclib.c
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/hip-device-libs.hip
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mdiv32.c
A clang/test/Driver/loongarch-mlamcas.c
A clang/test/Driver/loongarch-mld-seq-sa.c
M clang/test/Driver/mingw.cpp
M clang/test/Driver/module-output.cppm
A clang/test/Driver/msp430-char.c
M clang/test/Driver/nvptx-cuda-system-arch.c
M clang/test/Driver/openmp-system-arch.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/relax.s
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/unsupported-option.c
M clang/test/Driver/x86-march.c
M clang/test/Frontend/noderef.cpp
A clang/test/Headers/gpuintrin.c
A clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/limits.cpp
A clang/test/Misc/Inputs/suppression-mapping.txt
M clang/test/Misc/diag-template-diffing-cxx98.cpp
M clang/test/Misc/pragma-attribute-strict-subjects.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
A clang/test/Misc/warning-suppression-mappings-pragmas.cpp
A clang/test/Misc/warning-suppression-mappings.cpp
M clang/test/Modules/compare-record.c
M clang/test/Modules/no-eager-load.cppm
M clang/test/Modules/odr_hash.cpp
M clang/test/Modules/same-decl-in-different-modules.cppm
M clang/test/OpenMP/flush_ast_print.cpp
M clang/test/OpenMP/flush_codegen.cpp
M clang/test/OpenMP/flush_messages.cpp
M clang/test/OpenMP/for_simd_loop_messages.cpp
M clang/test/OpenMP/masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/parallel_for_simd_messages.cpp
M clang/test/OpenMP/parallel_masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/simd_linear_messages.cpp
M clang/test/OpenMP/target_parallel_for_simd_ordered_messages.cpp
M clang/test/OpenMP/taskloop_simd_linear_messages.cpp
A clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
M clang/test/Parser/cxx2c-delete-with-message.cpp
A clang/test/Parser/cxx2c-oxford-variadic-comma.cpp
M clang/test/Parser/pragma-attribute.cpp
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/has_builtin_cpuid.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/ptrauth_feature.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Refactor/Extract/ObjCProperty.m
A clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_cvt.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
A clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/arm-mfp8.c
M clang/test/Sema/arm-mfp8.cpp
M clang/test/Sema/asm.c
M clang/test/Sema/attr-nonblocking-constraints.cpp
A clang/test/Sema/attr-target-version-unsupported.c
M clang/test/Sema/builtin-counted-by-ref.c
M clang/test/Sema/c2x-nodiscard.c
M clang/test/Sema/constant_builtins_vector.cpp
A clang/test/Sema/nvptx-address-spaces.c
M clang/test/Sema/pragma-attribute-strict-subjects.c
A clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
A clang/test/SemaCUDA/spirv-attrs.cu
A clang/test/SemaCXX/attr-annotate-ast.cpp
M clang/test/SemaCXX/attr-lifetime-capture-by.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
A clang/test/SemaCXX/attr-no-specializations.cpp
M clang/test/SemaCXX/builtin-bit-cast.cpp
M clang/test/SemaCXX/constexpr-builtin-bit-cast.cpp
M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp
A clang/test/SemaCXX/cxx20-warn-dangling-paren-list-agg-init.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
A clang/test/SemaCXX/cxx2b-warn-shadow.cpp
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
M clang/test/SemaCXX/function-redecl.cpp
M clang/test/SemaCXX/integer-overflow.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
M clang/test/SemaCXX/literal-type.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
M clang/test/SemaCXX/warn-memaccess.cpp
M clang/test/SemaCXX/warn-missing-noreturn.cpp
M clang/test/SemaCXX/warn-shadow.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
M clang/test/SemaCXX/warn-unused-private-field.cpp
M clang/test/SemaCXX/warn-unused-result.cpp
A clang/test/SemaHIP/zero-sized-device-array.hip
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/asdouble-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/buffer_update_counter-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/clip-errors.hlsl
M clang/test/SemaHLSL/Semantics/entry_parameter.hlsl
M clang/test/SemaHLSL/Semantics/invalid_entry_parameter.hlsl
M clang/test/SemaHLSL/Semantics/valid_entry_parameter.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
R clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
M clang/test/SemaObjC/comptypes-legal.m
A clang/test/SemaObjC/method-param-named-id.m
A clang/test/SemaOpenACC/combined-construct-ast.cpp
A clang/test/SemaOpenACC/combined-construct-async-clause.c
A clang/test/SemaOpenACC/combined-construct-async-clause.cpp
A clang/test/SemaOpenACC/combined-construct-attach-ast.cpp
A clang/test/SemaOpenACC/combined-construct-attach-clause.c
A clang/test/SemaOpenACC/combined-construct-attach-clause.cpp
A clang/test/SemaOpenACC/combined-construct-auto_seq_independent-ast.cpp
A clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-default-ast.cpp
A clang/test/SemaOpenACC/combined-construct-default-clause.c
A clang/test/SemaOpenACC/combined-construct-default-clause.cpp
A clang/test/SemaOpenACC/combined-construct-device_type-ast.cpp
A clang/test/SemaOpenACC/combined-construct-device_type-clause.c
A clang/test/SemaOpenACC/combined-construct-device_type-clause.cpp
A clang/test/SemaOpenACC/combined-construct-deviceptr-ast.cpp
A clang/test/SemaOpenACC/combined-construct-deviceptr-clause.c
A clang/test/SemaOpenACC/combined-construct-deviceptr-clause.cpp
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.cpp
A clang/test/SemaOpenACC/combined-construct-if-ast.cpp
A clang/test/SemaOpenACC/combined-construct-if-clause.c
A clang/test/SemaOpenACC/combined-construct-if-clause.cpp
A clang/test/SemaOpenACC/combined-construct-no_create-ast.cpp
A clang/test/SemaOpenACC/combined-construct-no_create-clause.c
A clang/test/SemaOpenACC/combined-construct-no_create-clause.cpp
A clang/test/SemaOpenACC/combined-construct-present-ast.cpp
A clang/test/SemaOpenACC/combined-construct-present-clause.c
A clang/test/SemaOpenACC/combined-construct-present-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-clause.c
A clang/test/SemaOpenACC/combined-construct-private-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-firstprivate-ast.cpp
A clang/test/SemaOpenACC/combined-construct-self-ast.cpp
A clang/test/SemaOpenACC/combined-construct-self-clause.c
A clang/test/SemaOpenACC/combined-construct-self-clause.cpp
A clang/test/SemaOpenACC/combined-construct-wait-ast.cpp
A clang/test/SemaOpenACC/combined-construct-wait-clause.c
A clang/test/SemaOpenACC/combined-construct-wait-clause.cpp
A clang/test/SemaOpenACC/combined-construct.cpp
M clang/test/SemaOpenACC/compute-construct-ast.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-firstprivate-clause.cpp
M clang/test/SemaOpenACC/compute-construct-if-clause.c
M clang/test/SemaOpenACC/compute-construct-num_gangs-clause.cpp
M clang/test/SemaOpenACC/compute-construct-varlist-ast.cpp
M clang/test/SemaOpenACC/loop-construct.cpp
M clang/test/SemaOpenACC/no-branch-in-out.c
M clang/test/SemaOpenACC/no-branch-in-out.cpp
M clang/test/SemaOpenCL/access-qualifier.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-gfx940-err.cl
A clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
A clang/test/SemaTemplate/template-args-deduction-aggregates.cpp
M clang/test/lit.cfg.py
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
R clang/tools/amdgpu-arch/AMDGPUArchByHSA.cpp
A clang/tools/amdgpu-arch/AMDGPUArchByKFD.cpp
M clang/tools/amdgpu-arch/CMakeLists.txt
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/git-clang-format
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-repl/ClangRepl.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-shlib/CMakeLists.txt
A clang/tools/clang-shlib/simple_version_script.map.in
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/driver/cc1gen_reproducer_main.cpp
M clang/tools/driver/driver.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/AST/EvaluateAsRValueTest.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/AST/StructuralEquivalenceTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/Analysis/CloneDetectionTest.cpp
M clang/unittests/Analysis/FlowSensitive/ASTOpsTest.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/ASTSelectionTest.cpp
A clang/unittests/Tooling/CRTPTestVisitor.h
M clang/unittests/Tooling/CastExprTest.cpp
M clang/unittests/Tooling/CommentHandlerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ExecutionTest.cpp
M clang/unittests/Tooling/LexicallyOrderedRecursiveASTVisitorTest.cpp
M clang/unittests/Tooling/LookupTest.cpp
M clang/unittests/Tooling/QualTypeNamesTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestDeclVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestPostOrderVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestTypeLocVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Attr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/BitfieldInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXBoolLiteralExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMemberCall.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXOperatorCallExprTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CallbacksCommon.h
M clang/unittests/Tooling/RecursiveASTVisitorTests/Class.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Concept.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ConstructExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeclRefExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeductionGuide.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtorInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/IntegerLiteral.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaDefaultCapture.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaTemplateParams.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/MemberPointerTypeLoc.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/NestedNameSpecifiers.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ParenExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TemplateArgumentLocTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TraversalScope.cpp
M clang/unittests/Tooling/RefactoringTest.cpp
M clang/unittests/Tooling/SourceCodeTest.cpp
M clang/unittests/Tooling/TestVisitor.h
M clang/unittests/Tooling/ToolingTest.cpp
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/ClangDataCollectorsEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/analyzer/exploded-graph-rewriter.py
M clang/www/c_status.html
M clang/www/cxx_status.html
M cmake/Modules/CMakePolicy.cmake
R compiler-rt/CODE_OWNERS.TXT
A compiler-rt/Maintainers.txt
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/lib/asan/asan_descriptions.cpp
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/fmv/windows.inc
A compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/windows.inc
M compiler-rt/lib/builtins/cpu_model/cpu_model.h
M compiler-rt/lib/builtins/cpu_model/x86.c
A compiler-rt/lib/builtins/extendhfxf2.c
A compiler-rt/lib/builtins/trunctfbf2.c
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/interception_win.h
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/msan/tests/msan_test.cpp
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.h
M compiler-rt/lib/rtsan/rtsan_flags.inc
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary64.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_deadlock_detector.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/tests/sanitizer_block_signals.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_libc_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
M compiler-rt/lib/xray/weak_symbols.txt
M compiler-rt/lib/xray/xray_flags.cpp
M compiler-rt/lib/xray/xray_flags.h
M compiler-rt/test/builtins/Unit/atomic_test.c
A compiler-rt/test/builtins/Unit/extendhfxf2_test.c
M compiler-rt/test/builtins/Unit/fp_test.h
M compiler-rt/test/hwasan/lit.cfg.py
M compiler-rt/test/lit.common.configured.in
A compiler-rt/test/orc/TestCases/Darwin/Generic/trivial-cxx-constructor.cpp
M compiler-rt/test/profile/ContinuousSyncMode/basic.c
M compiler-rt/test/profile/ContinuousSyncMode/get-filename.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-no-counters.c
A compiler-rt/test/profile/ContinuousSyncMode/multi-threaded.cpp
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
M compiler-rt/test/profile/ContinuousSyncMode/pid-substitution.c
M compiler-rt/test/profile/ContinuousSyncMode/reset-default-profile.c
M compiler-rt/test/profile/ContinuousSyncMode/set-filename.c
A compiler-rt/test/profile/Linux/binary-id-offset.c
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/rtsan/deduplicate_errors.cpp
A compiler-rt/test/rtsan/report_error_summary.cpp
A compiler-rt/test/rtsan/syscall.cpp
A compiler-rt/test/tsan/many_held_mutex.cpp
A compiler-rt/test/xray/TestCases/Posix/default-options.cpp
R flang/CODE_OWNERS.TXT
A flang/Maintainers.txt
M flang/docs/Intrinsics.md
M flang/docs/ParserCombinators.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Common/Fortran-features.h
A flang/include/flang/Common/OpenMP-utils.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Frontend/FrontendOptions.h
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/CustomIntrinsicCall.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Lower/StatementContext.h
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/CodeGen/FIROpPatterns.h
M flang/include/flang/Optimizer/CodeGen/Target.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/include/flang/Optimizer/Dialect/FortranVariableInterface.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/OpenMP/Passes.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/CUFCommon.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree-visitor.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/allocatable.h
A flang/include/flang/Runtime/CUDA/memmove-function.h
M flang/include/flang/Runtime/CUDA/memory.h
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Runtime/freestanding-tools.h
M flang/include/flang/Semantics/openmp-directive-sets.h
A flang/include/flang/Semantics/openmp-modifiers.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Common/CMakeLists.txt
M flang/lib/Common/Fortran-features.cpp
A flang/lib/Common/OpenMP-utils.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/lib/Evaluate/intrinsics-library.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Analysis/CMakeLists.txt
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/CMakeLists.txt
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
A flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/type-parsers.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/CMakeLists.txt
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
M flang/module/ieee_arithmetic.f90
M flang/runtime/CUDA/CMakeLists.txt
M flang/runtime/CUDA/allocatable.cpp
A flang/runtime/CUDA/memmove-function.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/Float128Math/CMakeLists.txt
M flang/runtime/Float128Math/math-entries.h
A flang/runtime/Float128Math/remainder.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/runtime/sum.cpp
M flang/runtime/transformational.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
A flang/test/Analysis/AliasAnalysis/gen_mod_ref_test.py
A flang/test/Analysis/AliasAnalysis/modref-call-after-inlining.fir
A flang/test/Analysis/AliasAnalysis/modref-call-args.f90
A flang/test/Analysis/AliasAnalysis/modref-call-dummies.f90
A flang/test/Analysis/AliasAnalysis/modref-call-equivalence.f90
A flang/test/Analysis/AliasAnalysis/modref-call-globals.f90
A flang/test/Analysis/AliasAnalysis/modref-call-internal-proc.f90
A flang/test/Analysis/AliasAnalysis/modref-call-locals.f90
A flang/test/Analysis/AliasAnalysis/modref-call-not-fortran.fir
M flang/test/Driver/dynamic-linker.f90
M flang/test/Driver/isysroot.f90
A flang/test/Driver/mabi-loongarch.f90
M flang/test/Driver/mlir-pass-pipeline.f90
A flang/test/Driver/print-supported-cpus.f90
M flang/test/Driver/target-cpu-features.f90
A flang/test/Evaluate/bug115923.f90
M flang/test/Evaluate/folding09.f90
M flang/test/Evaluate/int8.f90
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
A flang/test/Fir/CUDA/cuda-device-context.mlir
M flang/test/Fir/CUDA/cuda-device-global.f90
A flang/test/Fir/CUDA/cuda-extranal-mangling.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/arrayset.fir
M flang/test/Fir/arrexp.fir
M flang/test/Fir/basic-program.fir
M flang/test/Fir/box-offset-codegen.fir
M flang/test/Fir/box.fir
M flang/test/Fir/boxproc.fir
M flang/test/Fir/commute.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/coordinateof.fir
M flang/test/Fir/embox.fir
M flang/test/Fir/field-index.fir
M flang/test/Fir/ignore-missing-type-descriptor.fir
M flang/test/Fir/polymorphic.fir
A flang/test/Fir/struct-passing-loongarch64-byreg.fir
A flang/test/Fir/struct-passing-return-loongarch64-bystack.fir
M flang/test/Fir/struct-passing-x86-64-byval.fir
A flang/test/Fir/struct-return-aarch64.fir
A flang/test/Fir/struct-return-loongarch64-byreg.fir
M flang/test/Fir/target-rewrite-boxchar.fir
M flang/test/Fir/target-rewrite-complex-10-x86.fir
M flang/test/Fir/target-rewrite-complex16.fir
A flang/test/Fir/target-rewrite-integer-loongarch64.fir
M flang/test/Fir/target.fir
A flang/test/HLFIR/bufferize-workshare.fir
A flang/test/HLFIR/eval_in_mem-codegen.fir
A flang/test/HLFIR/eval_in_mem.fir
M flang/test/HLFIR/invalid.fir
M flang/test/HLFIR/opt-bufferization.fir
M flang/test/Integration/OpenMP/copyprivate.f90
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
A flang/test/Integration/OpenMP/workshare-array-array-assign.f90
A flang/test/Integration/OpenMP/workshare-axpy.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
M flang/test/Integration/debug-local-var-2.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
A flang/test/Lower/CUDA/cuda-return01.cuf
A flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/HLFIR/assumed-rank-internal-proc.f90
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/goto-do-body.f90
M flang/test/Lower/HLFIR/internal-procedures.f90
M flang/test/Lower/HLFIR/maxloc.f90
M flang/test/Lower/HLFIR/maxval.f90
M flang/test/Lower/HLFIR/minloc.f90
M flang/test/Lower/HLFIR/minval.f90
M flang/test/Lower/HLFIR/select-rank.f90
A flang/test/Lower/Intrinsics/ieee_rem.f90
M flang/test/Lower/Intrinsics/len_trim.f90
M flang/test/Lower/Intrinsics/system.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
A flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
A flang/test/Lower/OpenMP/Todo/atomic-compare.f90
A flang/test/Lower/OpenMP/Todo/defaultmap-clause.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-depobj.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
A flang/test/Lower/OpenMP/Todo/flush-seq-cst.f90
R flang/test/Lower/OpenMP/Todo/loop-directive.f90
A flang/test/Lower/OpenMP/Todo/map-mapper.f90
A flang/test/Lower/OpenMP/Todo/omp-declare-mapper.f90
M flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
M flang/test/Lower/OpenMP/Todo/reduction-modifiers.f90
A flang/test/Lower/OpenMP/Todo/scope-allocate.f90
A flang/test/Lower/OpenMP/Todo/scope-firstprivate.f90
M flang/test/Lower/OpenMP/Todo/task_detach.f90
R flang/test/Lower/OpenMP/Todo/task_mergeable.f90
M flang/test/Lower/OpenMP/Todo/task_untied.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
A flang/test/Lower/OpenMP/declare-target-interface.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
A flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
A flang/test/Lower/OpenMP/generic-loop-rewriting.f90
A flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M flang/test/Lower/OpenMP/workshare.f90
M flang/test/Lower/attributes.f90
M flang/test/Lower/goto-do-body.f90
M flang/test/Lower/nsw.f90
M flang/test/Parser/OpenMP/affinity-clause.f90
M flang/test/Parser/OpenMP/allocators-unparse.f90
A flang/test/Parser/OpenMP/atomic-compare.f90
M flang/test/Parser/OpenMP/atomic-unparse.f90
A flang/test/Parser/OpenMP/bind-clause.f90
A flang/test/Parser/OpenMP/declare-mapper-unparse.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
A flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Parser/OpenMP/defaultmap-unparse.f90
M flang/test/Parser/OpenMP/depobj-construct.f90
M flang/test/Parser/OpenMP/from-clause.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/proc-bind.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
A flang/test/Parser/OpenMP/scan.f90
M flang/test/Parser/OpenMP/target-loop-unparse.f90
M flang/test/Parser/OpenMP/target-update-to-clause.f90
M flang/test/Parser/OpenMP/target_device_parse.f90
M flang/test/Parser/OpenMP/target_device_unparse.f90
M flang/test/Parser/cuf-sanity-common
A flang/test/Parser/recovery07.f90
A flang/test/Preprocessing/not-an-exponent.F90
A flang/test/Preprocessing/pp046.F
M flang/test/Semantics/OpenMP/allocate-clause01.f90
M flang/test/Semantics/OpenMP/allocators01.f90
M flang/test/Semantics/OpenMP/allocators04.f90
M flang/test/Semantics/OpenMP/allocators05.f90
M flang/test/Semantics/OpenMP/allocators06.f90
A flang/test/Semantics/OpenMP/atomic-compare.f90
M flang/test/Semantics/OpenMP/atomic.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
A flang/test/Semantics/OpenMP/critical_within_default.f90
A flang/test/Semantics/OpenMP/declare-mapper-symbols.f90
A flang/test/Semantics/OpenMP/declare-mapper01.f90
A flang/test/Semantics/OpenMP/declare-mapper02.f90
A flang/test/Semantics/OpenMP/declare-mapper03.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v50.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/do05.f90
M flang/test/Semantics/OpenMP/flush02.f90
M flang/test/Semantics/OpenMP/from-clause-v45.f90
M flang/test/Semantics/OpenMP/from-clause-v51.f90
A flang/test/Semantics/OpenMP/map-clause-symbols.f90
M flang/test/Semantics/OpenMP/map-clause.f90
M flang/test/Semantics/OpenMP/map-modifiers.f90
M flang/test/Semantics/OpenMP/nested-barrier.f90
M flang/test/Semantics/OpenMP/nested-master.f90
M flang/test/Semantics/OpenMP/nested-simd.f90
M flang/test/Semantics/OpenMP/nested-target.f90
M flang/test/Semantics/OpenMP/ordered-simd.f90
M flang/test/Semantics/OpenMP/reduction-modifiers.f90
M flang/test/Semantics/OpenMP/resolve06.f90
A flang/test/Semantics/OpenMP/scan1.f90
A flang/test/Semantics/OpenMP/scan2.f90
M flang/test/Semantics/OpenMP/to-clause-v45.f90
M flang/test/Semantics/OpenMP/to-clause-v51.f90
A flang/test/Semantics/bind-c17.f90
A flang/test/Semantics/bug115674.f90
M flang/test/Semantics/c_f_pointer.f90
M flang/test/Semantics/call38.f90
M flang/test/Semantics/io03.f90
M flang/test/Semantics/io04.f90
A flang/test/Semantics/pointer02.f90
A flang/test/Semantics/smp-def02.f90
M flang/test/Semantics/undef-result01.f90
A flang/test/Transforms/OpenMP/lower-workshare-alloca.mlir
A flang/test/Transforms/OpenMP/lower-workshare-binding.mlir
A flang/test/Transforms/OpenMP/lower-workshare-cleanup.mlir
A flang/test/Transforms/OpenMP/lower-workshare-copyprivate.mlir
A flang/test/Transforms/OpenMP/lower-workshare-correct-parallelize.mlir
A flang/test/Transforms/OpenMP/lower-workshare-nested.mlir
A flang/test/Transforms/OpenMP/lower-workshare-no-single.mlir
A flang/test/Transforms/OpenMP/lower-workshare-nowait.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg-dom.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg.mlir
A flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
M flang/test/Transforms/constant-argument-globalisation.fir
A flang/test/Transforms/debug-class-type.fir
A flang/test/Transforms/function-attrs.fir
A flang/test/Transforms/generic-loop-rewriting-todo.mlir
A flang/test/Transforms/generic-loop-rewriting.mlir
M flang/test/Transforms/omp-map-info-finalization.fir
M flang/tools/bbc/bbc.cpp
M flang/tools/flang-driver/CMakeLists.txt
M flang/tools/flang-driver/fc1_main.cpp
M flang/tools/tco/tco.cpp
M flang/unittests/Runtime/CMakeLists.txt
M flang/unittests/Runtime/CommandTest.cpp
M libc/CMakeLists.txt
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/LibcBenchmark.h
M libc/benchmarks/MemorySizeDistributions.cpp
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/baremetal/riscv/headers.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/api.td
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/gpu/rpc.rst
M libc/docs/libc_search.rst
M libc/docs/talks.rst
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/fuzzing/__support/hashtable_fuzz.cpp
M libc/fuzzing/math/Compare.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__lsearchcompare_t.h
R libc/include/llvm-libc-types/rpc_opcodes_t.h
A libc/include/llvm-libc-types/stdfix-types.h
M libc/include/sys/syscall.h.def
M libc/newhdrgen/yaml/search.yaml
M libc/newhdrgen/yaml/stdfix.yaml
M libc/newhdrgen/yaml/sys/mman.yaml
A libc/shared/rpc.h
A libc/shared/rpc_opcodes.h
A libc/shared/rpc_util.h
M libc/spec/linux.td
M libc/spec/posix.td
M libc/spec/stdc_ext.td
M libc/src/__support/CMakeLists.txt
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/HashTable/generic/bitmask_impl.inc
M libc/src/__support/OSUtil/gpu/exit.cpp
M libc/src/__support/RPC/CMakeLists.txt
R libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_client.cpp
M libc/src/__support/RPC/rpc_client.h
R libc/src/__support/RPC/rpc_util.h
M libc/src/__support/big_int.h
M libc/src/__support/block.h
M libc/src/__support/common.h
R libc/src/__support/endian.h
A libc/src/__support/endian_internal.h
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/__support/float_to_string.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/__support/hash.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/str_to_float.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/rwlock.h
M libc/src/__support/time/linux/CMakeLists.txt
A libc/src/__support/time/linux/clock_gettime.cpp
M libc/src/__support/time/linux/clock_gettime.h
M libc/src/complex/generic/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/tanhf16.cpp
M libc/src/network/htonl.cpp
M libc/src/network/htons.cpp
M libc/src/network/ntohl.cpp
M libc/src/network/ntohs.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/search/CMakeLists.txt
A libc/src/search/lfind.cpp
A libc/src/search/lfind.h
M libc/src/setjmp/riscv/CMakeLists.txt
M libc/src/setjmp/x86_64/CMakeLists.txt
M libc/src/signal/linux/CMakeLists.txt
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/hkbits.cpp
A libc/src/stdfix/hkbits.h
A libc/src/stdfix/hrbits.cpp
A libc/src/stdfix/hrbits.h
A libc/src/stdfix/kbits.cpp
A libc/src/stdfix/kbits.h
A libc/src/stdfix/lkbits.cpp
A libc/src/stdfix/lkbits.h
A libc/src/stdfix/lrbits.cpp
A libc/src/stdfix/lrbits.h
A libc/src/stdfix/rbits.cpp
A libc/src/stdfix/rbits.h
A libc/src/stdfix/uhkbits.cpp
A libc/src/stdfix/uhkbits.h
A libc/src/stdfix/uhrbits.cpp
A libc/src/stdfix/uhrbits.h
A libc/src/stdfix/ukbits.cpp
A libc/src/stdfix/ukbits.h
A libc/src/stdfix/ulkbits.cpp
A libc/src/stdfix/ulkbits.h
A libc/src/stdfix/ulrbits.cpp
A libc/src/stdfix/ulrbits.h
A libc/src/stdfix/urbits.cpp
A libc/src/stdfix/urbits.h
M libc/src/stdio/gpu/file.h
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdio/scanf_core/reader.h
M libc/src/stdio/sscanf.cpp
M libc/src/stdlib/freelist_malloc.cpp
M libc/src/stdlib/gpu/abort.cpp
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/op_generic.h
M libc/src/string/memory_utils/op_x86.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/string_utils.h
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/process_mrelease.cpp
A libc/src/sys/mman/process_mrelease.h
M libc/src/sys/socket/linux/recvfrom.cpp
M libc/src/sys/socket/recvfrom.h
M libc/src/threads/CMakeLists.txt
M libc/src/wchar/CMakeLists.txt
M libc/src/wchar/btowc.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/integration/scudo/CMakeLists.txt
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/integration/startup/gpu/CMakeLists.txt
M libc/test/integration/startup/gpu/rpc_interface_test.cpp
A libc/test/integration/startup/gpu/rpc_lane_test.cpp
M libc/test/integration/startup/gpu/rpc_stream_test.cpp
M libc/test/integration/startup/gpu/rpc_test.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/HashTable/table_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/block_test.cpp
A libc/test/src/__support/endian_internal_test.cpp
R libc/test/src/__support/endian_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
M libc/test/src/__support/str_to_long_double_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/CanonicalizeTest.h
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/network/htonl_test.cpp
M libc/test/src/network/htons_test.cpp
M libc/test/src/network/ntohl_test.cpp
M libc/test/src/network/ntohs_test.cpp
M libc/test/src/search/CMakeLists.txt
A libc/test/src/search/lfind_test.cpp
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/FxBitsTest.h
A libc/test/src/stdfix/hkbits_test.cpp
A libc/test/src/stdfix/hrbits_test.cpp
A libc/test/src/stdfix/kbits_test.cpp
A libc/test/src/stdfix/lkbits_test.cpp
A libc/test/src/stdfix/lrbits_test.cpp
A libc/test/src/stdfix/rbits_test.cpp
A libc/test/src/stdfix/uhkbits_test.cpp
A libc/test/src/stdfix/uhrbits_test.cpp
A libc/test/src/stdfix/ukbits_test.cpp
A libc/test/src/stdfix/ulkbits_test.cpp
A libc/test/src/stdfix/ulrbits_test.cpp
A libc/test/src/stdfix/urbits_test.cpp
M libc/test/src/stdio/scanf_core/CMakeLists.txt
M libc/test/src/stdio/scanf_core/converter_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/process_mrelease_test.cpp
M libc/test/src/sys/statvfs/linux/CMakeLists.txt
M libc/test/src/sys/statvfs/linux/fstatvfs_test.cpp
M libc/test/src/sys/statvfs/linux/statvfs_test.cpp
M libc/utils/gpu/loader/Loader.h
M libc/utils/gpu/loader/amdgpu/CMakeLists.txt
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
M libc/utils/gpu/loader/nvptx/nvptx-loader.cpp
M libc/utils/gpu/server/CMakeLists.txt
R libc/utils/gpu/server/llvmlibc_rpc_server.h
M libc/utils/gpu/server/rpc_server.cpp
M libclc/clc/include/clc/geometric/clc_dot.h
M libclc/clc/include/clc/shared/clc_clamp.h
M libclc/clc/include/clc/shared/clc_max.h
M libclc/clc/include/clc/shared/clc_min.h
M libclc/cmake/modules/AddLibclc.cmake
M libclc/generic/lib/gen_convert.py
M libclc/generic/lib/math/clc_remquo.cl
M libcxx/CMakeLists.txt
A libcxx/docs/CodingGuidelines.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/DesignDocs/ExtendedCXX03Support.rst
R libcxx/docs/DesignDocs/NodiscardPolicy.rst
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/docs/index.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/copy.h
M libcxx/include/__algorithm/copy_move_common.h
M libcxx/include/__algorithm/find_end.h
M libcxx/include/__algorithm/ranges_copy.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__algorithm/ranges_set_difference.h
M libcxx/include/__algorithm/ranges_set_symmetric_difference.h
M libcxx/include/__algorithm/ranges_set_union.h
M libcxx/include/__algorithm/set_difference.h
M libcxx/include/__algorithm/set_symmetric_difference.h
M libcxx/include/__algorithm/set_union.h
M libcxx/include/__atomic/atomic.h
R libcxx/include/__atomic/atomic_base.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/include/__chrono/time_point.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
M libcxx/include/__configuration/availability.h
M libcxx/include/__cxx03/__chrono/formatter.h
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
R libcxx/include/__locale_dir/locale_base_api/apple.h
R libcxx/include/__locale_dir/locale_base_api/freebsd.h
A libcxx/include/__locale_dir/pad_and_output.h
A libcxx/include/__locale_dir/support/apple.h
A libcxx/include/__locale_dir/support/bsd_like.h
A libcxx/include/__locale_dir/support/freebsd.h
M libcxx/include/__memory/allocator_arg_t.h
M libcxx/include/__memory/allocator_traits.h
A libcxx/include/__memory/shared_count.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__memory_resource/synchronized_pool_resource.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/__mutex/unique_lock.h
M libcxx/include/__ostream/basic_ostream.h
A libcxx/include/__ostream/put_character_sequence.h
M libcxx/include/__random/discard_block_engine.h
M libcxx/include/__random/linear_congruential_engine.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/__random/shuffle_order_engine.h
M libcxx/include/__random/subtract_with_carry_engine.h
M libcxx/include/__ranges/to.h
M libcxx/include/__split_buffer
M libcxx/include/__system_error/system_error.h
A libcxx/include/__system_error/throw_system_error.h
M libcxx/include/__thread/thread.h
A libcxx/include/__type_traits/detected_or.h
M libcxx/include/__type_traits/integral_constant.h
M libcxx/include/__utility/exception_guard.h
A libcxx/include/__utility/scope_guard.h
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/any
M libcxx/include/atomic
M libcxx/include/barrier
M libcxx/include/bit
M libcxx/include/charconv
M libcxx/include/compare
M libcxx/include/deque
M libcxx/include/expected
M libcxx/include/forward_list
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/iomanip
M libcxx/include/latch
M libcxx/include/limits
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/mdspan
M libcxx/include/memory_resource
M libcxx/include/module.modulemap
M libcxx/include/mutex
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/ratio
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/string
M libcxx/include/strstream
M libcxx/include/syncstream
M libcxx/include/thread
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
A libcxx/src/.clang-tidy
M libcxx/src/CMakeLists.txt
M libcxx/src/barrier.cpp
M libcxx/src/chrono.cpp
M libcxx/src/filesystem/filesystem_clock.cpp
M libcxx/src/filesystem/path.cpp
R libcxx/src/legacy_pointer_safety.cpp
M libcxx/src/random.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/CMakeLists.txt
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/GenerateInput.h
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/deque.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/benchmarks/vector_operations.bench.cpp
M libcxx/test/configs/cmake-bridge.cfg.in
M libcxx/test/libcxx/thread/thread.stoptoken/atomic_unique_lock.pass.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/containers/sequences/vector.bool/ctor_exceptions.pass.cpp
A libcxx/test/std/containers/sequences/vector/addressof.compile.pass.cpp
A libcxx/test/std/containers/sequences/vector/common.h
R libcxx/test/std/containers/sequences/vector/vector.cons/assign_copy.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.cons/assign_move.addressof.compile.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.cons/move.addressof.compile.pass.cpp
A libcxx/test/std/containers/sequences/vector/vector.modifiers/common.h
R libcxx/test/std/containers/sequences/vector/vector.modifiers/emplace.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter.addressof.compile.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter_iter.addressof.compile.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter_iter.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_iter_iter.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_rvalue.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_size_value.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_value.addressof.compile.pass.cpp
R libcxx/test/std/containers/sequences/vector/vector.special/swap.addressof.compile.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/member_swap.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/move_assign.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/move.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/bool.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/double.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/float.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/int.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_double.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/short.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_int.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_short.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/signed_char.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/signed_char_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/unsigned_char.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/unsigned_char_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/wchar_t_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.manip/ws.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/ignore.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/peek.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/putback.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/read.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/readsome.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg_off.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/sync.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/tellg.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/unget.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/member_swap.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/move_assign.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/move.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream_sentry/ctor.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
M libcxx/test/std/thread/futures/futures.async/async.pass.cpp
M libcxx/test/std/thread/thread.semaphore/max.pass.cpp
R libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/operator[].pass.cpp
A libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/subscript_operator.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.cat/is_array.pass.cpp
M libcxx/test/std/utilities/utility/pairs/pairs.pair/ctor.default.pass.cpp
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/ci/docker-compose.yml
R libcxx/utils/ci/macos-ci-setup
M libcxx/utils/ci/run-buildbot-container
M libcxx/utils/libcxx/test/format.py
M libcxxabi/CMakeLists.txt
M libcxxabi/include/CMakeLists.txt
M libcxxabi/src/cxa_demangle.cpp
M lld/COFF/Config.h
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/DriverUtils.cpp
M lld/COFF/LTO.cpp
M lld/COFF/Options.td
M lld/COFF/SymbolTable.cpp
M lld/COFF/Writer.cpp
M lld/Common/ErrorHandler.cpp
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Driver.h
M lld/ELF/DriverUtils.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Driver.h
M lld/MachO/DriverUtils.cpp
M lld/MachO/ICF.cpp
M lld/MachO/ICF.h
M lld/MachO/InputFiles.cpp
M lld/MachO/InputFiles.h
M lld/MachO/InputSection.h
M lld/MachO/LTO.cpp
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Target.h
M lld/MachO/Writer.cpp
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/docs/ReleaseNotes.rst
M lld/include/lld/Common/ErrorHandler.h
M lld/include/lld/Common/LLVM.h
M lld/test/COFF/arm64ec-delayimport.test
A lld/test/COFF/arm64ec-invalid-name.s
M lld/test/COFF/arm64ec.test
A lld/test/COFF/savetemps-colon.ll
M lld/test/ELF/aarch64-abs64-dyn.s
M lld/test/ELF/aarch64-cortex-a53-843419-address.s
M lld/test/ELF/aarch64-cortex-a53-843419-large.s
M lld/test/ELF/aarch64-cortex-a53-843419-large2.s
M lld/test/ELF/aarch64-cortex-a53-843419-nopatch.s
M lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
M lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
M lld/test/ELF/aarch64-feature-pauth.s
M lld/test/ELF/aarch64-fpic-abs16.s
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-adr_prel_lo21.s
M lld/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s
M lld/test/ELF/aarch64-fpic-got.s
M lld/test/ELF/aarch64-fpic-ldst32_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst64_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst8_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-prel16.s
M lld/test/ELF/aarch64-fpic-prel32.s
M lld/test/ELF/aarch64-fpic-prel64.s
M lld/test/ELF/aarch64-gnu-ifunc-address.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable2.s
M lld/test/ELF/aarch64-gnu-ifunc-nosym.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-gnu-ifunc.s
M lld/test/ELF/aarch64-gnu-ifunc2.s
M lld/test/ELF/aarch64-got-weak-undef.s
M lld/test/ELF/aarch64-ifunc-bti.s
M lld/test/ELF/aarch64-lo12-alignment.s
M lld/test/ELF/aarch64-memtag-android-abi.s
M lld/test/ELF/aarch64-memtag-globals.s
A lld/test/ELF/aarch64-thunk-bti-multipass.s
M lld/test/ELF/aarch64-thunk-bti.s
M lld/test/ELF/aarch64-undefined-weak.s
A lld/test/ELF/arm-rwpi-debug-relocs.s
M lld/test/ELF/hexagon-jump-error.s
M lld/test/ELF/hexagon.s
M lld/test/ELF/incompatible.s
M lld/test/ELF/invalid-eh-frame3.s
M lld/test/ELF/invalid-eh-frame6.s
M lld/test/ELF/invalid/x86-64-tlsdesc-gd.s
M lld/test/ELF/linkerscript/i386-sections-max-va-overflow.s
M lld/test/ELF/linkerscript/locationcountererr-arm-exidx.test
M lld/test/ELF/linkerscript/sections-max-va-overflow.s
M lld/test/ELF/linkerscript/symbol-location.s
M lld/test/ELF/lto/riscv-attributes.ll
A lld/test/ELF/merge-addr.s
M lld/test/ELF/merge-reloc.s
R lld/test/ELF/merge-relocatable.s
R lld/test/ELF/merge-shared-str.s
R lld/test/ELF/merge-shared.s
R lld/test/ELF/merge-string.s
R lld/test/ELF/merge-to-non-alloc.s
M lld/test/ELF/pack-dyn-relocs-loop.s
M lld/test/ELF/pack-dyn-relocs-tls-x86-64.s
M lld/test/ELF/ppc64-local-exec-tls.s
M lld/test/ELF/reproduce.s
M lld/test/ELF/riscv-attributes.s
M lld/test/ELF/tls-opt.s
M lld/test/ELF/tls.s
M lld/test/ELF/undef-multi.s
M lld/test/ELF/undef.s
M lld/test/ELF/x86-64-gotpc-no-relax-err.s
M lld/test/ELF/x86-64-gotpc-relax-nopic.s
M lld/test/ELF/x86-64-gotpc-relax.s
M lld/test/ELF/x86-64-tls-ie-local.s
M lld/test/ELF/x86-64-tlsdesc-gd.s
A lld/test/MachO/allowable-client.s
A lld/test/MachO/cgdata-generate-merge.s
M lld/test/MachO/icf-safe-thunks-dwarf.ll
A lld/test/MachO/ltopasses-extension.ll
M lld/test/MinGW/driver.test
M lld/test/wasm/tls-non-shared-memory.s
M lld/wasm/Driver.cpp
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
M lldb/bindings/interface/SBTargetExtensions.i
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/resources/build.rst
M lldb/docs/use/aarch64-linux.md
M lldb/docs/use/links.rst
M lldb/examples/python/templates/scripted_process.py
M lldb/examples/synthetic/libcxx.py
M lldb/include/lldb/API/SBBreakpointName.h
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/API/SBStructuredData.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Core/Disassembler.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Expression/UserExpression.h
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Host/MainLoopBase.h
M lldb/include/lldb/Host/Socket.h
M lldb/include/lldb/Host/common/TCPSocket.h
M lldb/include/lldb/Host/common/UDPSocket.h
M lldb/include/lldb/Host/linux/AbstractSocket.h
M lldb/include/lldb/Host/posix/ConnectionFileDescriptorPosix.h
M lldb/include/lldb/Host/posix/DomainSocket.h
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/include/lldb/Host/windows/MainLoopWindows.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Symbol/Block.h
M lldb/include/lldb/Symbol/Function.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Target/Language.h
M lldb/include/lldb/Target/LanguageRuntime.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/ThreadPlanStack.h
M lldb/include/lldb/Utility/CompletionRequest.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-private-interfaces.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBFunction.cpp
M lldb/source/API/SBSymbol.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointResolverFileLine.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectDisassemble.h
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Host/common/MainLoopBase.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/common/TCPSocket.cpp
M lldb/source/Host/common/UDPSocket.cpp
M lldb/source/Host/linux/AbstractSocket.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/posix/DomainSocket.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/Architecture/Mips/ArchitectureMips.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h
M lldb/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.h
M lldb/source/Plugins/Language/ObjCPlusPlus/ObjCPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/ObjCPlusPlus/ObjCPlusPlusLanguage.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
M lldb/source/Plugins/ObjectFile/CMakeLists.txt
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
A lldb/source/Plugins/ObjectFile/XCOFF/CMakeLists.txt
A lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
A lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.cpp
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/Function.cpp
M lldb/source/Symbol/Symbol.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Target/Language.cpp
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStack.cpp
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/source/Target/ThreadPlanTracer.cpp
M lldb/source/Target/TraceDumper.cpp
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/Status.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
M lldb/test/API/commands/expression/fixits/TestFixIts.py
M lldb/test/API/commands/process/detach-resumes/TestDetachResumes.py
M lldb/test/API/commands/statistics/basic/TestStats.py
A lldb/test/API/commands/statistics/basic/second.cpp
M lldb/test/API/functionalities/data-formatter/setvaluefromcstring/main.m
A lldb/test/API/functionalities/scripted_process_empty_memory_region/Makefile
A lldb/test/API/functionalities/scripted_process_empty_memory_region/TestScriptedProcessEmptyMemoryRegion.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/dummy_scripted_process.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/main.c
M lldb/test/API/lang/c/stepping/TestStepAndBreakpoints.py
A lldb/test/API/lang/cpp/forward/Makefile
A lldb/test/API/lang/cpp/forward/TestCPPForwardDeclaration.py
A lldb/test/API/lang/cpp/forward/foo.cpp
A lldb/test/API/lang/cpp/forward/foo.h
A lldb/test/API/lang/cpp/forward/main.cpp
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
M lldb/test/API/lang/cpp/stl/TestStdCXXDisassembly.py
A lldb/test/API/lang/objc/languageinfo/Makefile
A lldb/test/API/lang/objc/languageinfo/TestObjCLanguageSpecificData.py
A lldb/test/API/lang/objc/languageinfo/main.m
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/API/python_api/value/change_values/TestChangeValueAPI.py
M lldb/test/API/python_api/value/change_values/main.c
M lldb/test/API/source-manager/TestSourceManager.py
R lldb/test/API/source-manager/artificial_location.c
A lldb/test/API/source-manager/artificial_location.cpp
A lldb/test/API/source-manager/artificial_location.h
M lldb/test/API/symbol_ondemand/shared_library/TestSharedLibOnDemand.py
A lldb/test/API/terminal/TestEditlineCompletions.py
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/test/API/tools/lldb-dap/evaluate/main.cpp
A lldb/test/Shell/Commands/command-disassemble-cpu-features.yaml
M lldb/test/Shell/Commands/command-disassemble-mixed.c
M lldb/test/Shell/Commands/command-expr-diagnostics.test
M lldb/test/Shell/Commands/command-target-create-resolve-exe.test
M lldb/test/Shell/Expr/TestAnonNamespaceParamFunc.cpp
M lldb/test/Shell/Expr/TestIRMemoryMapWindows.test
M lldb/test/Shell/Minidump/Windows/find-module.test
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
A lldb/test/Shell/ObjectFile/XCOFF/basic-info.yaml
M lldb/test/Shell/Process/Windows/exception_access_violation.cpp
M lldb/test/Shell/Process/Windows/process_load.cpp
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
M lldb/test/Shell/SymbolFile/DWARF/packed.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_ranges-missing-section.s
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-inline-function.s
M lldb/test/Shell/SymbolFile/DWARF/x86/member-pointers.cpp
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
M lldb/test/Shell/SymbolFile/NativePDB/local-variables.cpp
M lldb/test/Shell/SymbolFile/NativePDB/stack_unwinding01.cpp
M lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
M lldb/test/Shell/SymbolFile/PDB/class-layout.test
M lldb/test/Shell/SymbolFile/PDB/compilands.test
M lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
M lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
M lldb/test/Shell/SymbolFile/PDB/pointers.test
M lldb/test/Shell/SymbolFile/PDB/type-quals.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
M lldb/test/Shell/SymbolFile/PDB/variables-locations.test
M lldb/test/Shell/SymbolFile/PDB/vbases.test
M lldb/test/Shell/Target/dependent-modules-nodupe-windows.test
M lldb/test/Shell/Unwind/windows-unaligned-x86_64.test
M lldb/test/Shell/lit.cfg.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
Log Message:
-----------
rebase
Created using spr 1.3.6-beta.1
Compare: https://github.com/llvm/llvm-project/compare/e428a45e9638...a76366496be1
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