[all-commits] [llvm/llvm-project] 2e30df: [TableGen] Fix validateOperandClass for non Phyica...

[Jinsong Ji via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2e30df740ef0b9f8edb7075768540ce08678023d
      https://github.com/llvm/llvm-project/commit/2e30df740ef0b9f8edb7075768540ce08678023d
  Author: Jinsong Ji <jinsong.ji at intel.com>
  Date:   2024-11-30 (Sat, 30 Nov 2024)

  Changed paths:
    M llvm/utils/TableGen/AsmMatcherEmitter.cpp

  Log Message:
  -----------
  [TableGen] Fix validateOperandClass for non Phyical Reg (#118146)

https://github.com/llvm/llvm-project/commit/b71704436e61
Rewrote the register operands handling,
but the Table only contains physical regs, we will SEGV when there are
non physical regs.

---------

Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>



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