[all-commits] [llvm/llvm-project] d714b2: [AArch64] Guard against getRegisterBitWidth return...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d714b221c77203107284544b8f5543bd4c35ccc9
      https://github.com/llvm/llvm-project/commit/d714b221c77203107284544b8f5543bd4c35ccc9
  Author: David Green <david.green at arm.com>
  Date:   2024-11-29 (Fri, 29 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    A llvm/test/Analysis/CostModel/AArch64/extract_float_streaming.ll

  Log Message:
  -----------
  [AArch64] Guard against getRegisterBitWidth returning zero in vector instr cost. (#117749)

If the getRegisterBitWidth is zero (such as in sme streaming functions),
then we could hit a crash from using % RegWidth.



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