[all-commits] [llvm/llvm-project] e4ee97: [AArch64] Implement intrinsics for F1CVTL/F2CVTL a...

[SpencerAbson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e4ee970c4b286b472a4c0b0cb43da85f77e97d79
      https://github.com/llvm/llvm-project/commit/e4ee970c4b286b472a4c0b0cb43da85f77e97d79
  Author: SpencerAbson <Spencer.Abson at arm.com>
  Date:   2024-11-28 (Thu, 28 Nov 2024)

  Changed paths:
    M clang/include/clang/Basic/TargetBuiltins.h
    M clang/include/clang/Basic/arm_sve.td
    M clang/include/clang/Basic/arm_sve_sme_incl.td
    M clang/lib/CodeGen/CGBuiltin.cpp
    A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_cvt.c
    A clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_cvt.c
    M clang/utils/TableGen/SveEmitter.cpp
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll

  Log Message:
  -----------
  [AArch64] Implement intrinsics for F1CVTL/F2CVTL and BF1CVTL/BF2CVTL (#116959)

This patch implements the following intrinsics:

8-bit floating-point convert to deinterleaved half-precision or
BFloat16.
``` c
  // Variant is also available for: _bf16[_mf8]_x2
  svfloat16x2_t svcvtl1_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
  svfloat16x2_t svcvtl2_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
```

Defined in https://github.com/ARM-software/acle/pull/323

Co-authored-by: Caroline Concatto caroline.concatto at arm.com
Co-authored-by: Marian Lukac marian.lukac at arm.com



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