[all-commits] [llvm/llvm-project] 89b08c: [TableGen] Simplify generated code for isSubclass ...

Jay Foad via All-commits all-commits at lists.llvm.org
Thu Nov 28 00:52:23 PST 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 89b08c8ee7b5184f8cfb0d356f2762173fb87d42
      https://github.com/llvm/llvm-project/commit/89b08c8ee7b5184f8cfb0d356f2762173fb87d42
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-11-28 (Thu, 28 Nov 2024)

  Changed paths:
    M llvm/utils/TableGen/AsmMatcherEmitter.cpp

  Log Message:
  -----------
  [TableGen] Simplify generated code for isSubclass (#117351)

Implement isSubclass with direct lookup into some tables instead of
nested switches.

Part of the motivation for this is improving compile time when clang-18
is used as a host compiler, since it seems to have trouble with very
large switch statements.



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