[all-commits] [llvm/llvm-project] 4c11c6: AMDGPU: Simplify demanded bits on readlane/writeli...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu-simplify-demanded-readlane-index
  Home:   https://github.com/llvm/llvm-project
  Commit: 4c11c64bac4ba4816e070fef3af8a4e59cce2318
      https://github.com/llvm/llvm-project/commit/4c11c64bac4ba4816e070fef3af8a4e59cce2318
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
    M llvm/test/Transforms/InstCombine/AMDGPU/lane-index-simplify-demanded-bits.ll

  Log Message:
  -----------
  AMDGPU: Simplify demanded bits on readlane/writeline index arguments

The main goal is to fold away wave64 code when compiled for wave32.
If we have out of bounds indexing, these will now clamp down to
a low bit which may CSE with the operations on the low half of the
wave.



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