[all-commits] [llvm/llvm-project] e3fdc3: [RISCV] Allow hoisting VXRM writes out of loops sp...

[Felipe Magno de Almeida via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e3fdc3aa81c7e8196d804fbde1a3f76796dbd5dd
      https://github.com/llvm/llvm-project/commit/e3fdc3aa81c7e8196d804fbde1a3f76796dbd5dd
  Author: Felipe Magno de Almeida <felipe.m.almeida at gmail.com>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
    M llvm/lib/Target/RISCV/RISCVProcessors.td
    A llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll

  Log Message:
  -----------
  [RISCV] Allow hoisting VXRM writes out of loops speculatively (#110044)

Change the intersect for the anticipated algorithm to ignore unknown
when anticipating. This effectively allows VXRM writes speculatively
because it could do a VXRM write even when there's branches where VXRM
is unneeded.

The importance of this change is because VXRM writes causes pipeline
flushes in some micro-architectures and so it makes sense to allow more
aggressive hoisting even if it causes some degradation for the slow
path.

An example is this code:
```
typedef unsigned char uint8_t;
__attribute__ ((noipa))
void foo (uint8_t *dst,  int i_dst_stride,
           uint8_t *src1, int i_src1_stride,
           uint8_t *src2, int i_src2_stride,
           int i_width, int i_height )
{
   for( int y = 0; y < i_height; y++ )
     {
       for( int x = 0; x < i_width; x++ )
         dst[x] = ( src1[x] + src2[x] + 1 ) >> 1;
       dst  += i_dst_stride;
       src1 += i_src1_stride;
       src2 += i_src2_stride;
     }
}
```
With this patch, the code above generates a hoisting VXRM writes out of
the outer loop.



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