[all-commits] [llvm/llvm-project] b71704: [TableGen] Simplify generated code for validateOpe...

Jay Foad via All-commits all-commits at lists.llvm.org
Wed Nov 27 08:49:56 PST 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b71704436e61057a5bd6426915c368e5d76cb7de
      https://github.com/llvm/llvm-project/commit/b71704436e61057a5bd6426915c368e5d76cb7de
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M llvm/utils/TableGen/AsmMatcherEmitter.cpp

  Log Message:
  -----------
  [TableGen] Simplify generated code for validateOperandClass (#117889)

Implement the register operand handling in validateOperandClass with a
table lookup instead of a potentially huge switch.

Part of the motivation for this is improving compile time when clang-18
is used as a host compiler, since it seems to have trouble with very
large switch statements.



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