[all-commits] [llvm/llvm-project] 318c69: Reland "[AArch64] Define high bits of FPR and GPR ...

[Sander de Smalen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 318c69de52b61d64d5ea113dc2e9f307f7fd4d51
      https://github.com/llvm/llvm-project/commit/318c69de52b61d64d5ea113dc2e9f307f7fd4d51
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M bolt/unittests/Core/MCPlusBuilder.cpp
    M llvm/include/llvm/MC/MCRegisterInfo.h
    M llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
    M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
    M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
    M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
    M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
    M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
    M llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
    M llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
    M llvm/test/CodeGen/AArch64/misched-bundle.mir
    M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
    M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
    M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
    M llvm/test/CodeGen/AArch64/preserve.ll
    M llvm/test/CodeGen/AArch64/strpre-str-merge.mir
    M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.mir
    M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryComm-merging.mir
    M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryCommWithRev-merging.mir
    A llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
    M llvm/unittests/Target/AArch64/CMakeLists.txt
    M llvm/utils/TableGen/RegisterInfoEmitter.cpp

  Log Message:
  -----------
  Reland "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)"

The issue with slow compile-time was caused by an assert in
AArch64RegisterInfo.cpp. The assert invokes 'checkAllSuperRegsMarked'
after adding all the reserved registers. This call gets very expensive
after adding the _HI registers due to the way the function searches
in the 'Exception' list, which is expected to be a small list but isn't
(the patch added 190 _HI regs).

It was possible to rewrite the code in such a way that the _HI registers
are marked as reserved after the check. This makes the problem go away
entirely and restores compile-time to what it was before (tested for
`check-runtimes`, which previously showed a ~5x slowdown).

This reverts commits:
  1434d2ab215e3ea9c5f34689d056edd3d4423a78
  2704647fb7986673b89cef1def729e3b022e2607



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