[all-commits] [llvm/llvm-project] f6f292: [X86] Fix HSW/BDW masked store schedules

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6f2929fc6fa39f62e2c3109b7a1b0f866c1c17b
      https://github.com/llvm/llvm-project/commit/f6f2929fc6fa39f62e2c3109b7a1b0f866c1c17b
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86SchedBroadwell.td
    M llvm/lib/Target/X86/X86SchedHaswell.td
    M llvm/test/tools/llvm-mca/X86/Broadwell/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Broadwell/resources-avx2.s
    M llvm/test/tools/llvm-mca/X86/Haswell/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Haswell/resources-avx2.s

  Log Message:
  -----------
  [X86] Fix HSW/BDW masked store schedules

Vector masked stores don't use Port5 or Port 7.

Confirmed by augner/uops.info


  Commit: 124b1f8d85af71e512e6dc6250c8bfa370a33d48
      https://github.com/llvm/llvm-project/commit/124b1f8d85af71e512e6dc6250c8bfa370a33d48
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86SchedBroadwell.td
    M llvm/lib/Target/X86/X86SchedHaswell.td
    M llvm/test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s
    M llvm/test/tools/llvm-mca/X86/Haswell/resources-x86_64.s

  Log Message:
  -----------
  [X86] Fix HSW/BDW shift/rotate by CL schedules

This is just Port06 not Port0156 - fixes reported thoughputs

Confirmed by augner/uops.info


  Commit: 37aebcf4e60e5c913e3d99675548b3e2c631398b
      https://github.com/llvm/llvm-project/commit/37aebcf4e60e5c913e3d99675548b3e2c631398b
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86SchedBroadwell.td
    M llvm/lib/Target/X86/X86SchedHaswell.td
    M llvm/lib/Target/X86/X86SchedIceLake.td
    M llvm/lib/Target/X86/X86SchedSandyBridge.td
    M llvm/lib/Target/X86/X86SchedSkylakeClient.td
    M llvm/lib/Target/X86/X86SchedSkylakeServer.td
    M llvm/test/tools/llvm-mca/X86/Barcelona/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Barcelona/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/Broadwell/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Broadwell/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/Generic/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Generic/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/Haswell/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Haswell/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/barrier_output.s

  Log Message:
  -----------
  [X86] Cleanup SFENCE/MFENCE schedules

Remove unnecessary overrides.

UOp + Port usage confirmed by augner/uops.info


Compare: https://github.com/llvm/llvm-project/compare/0cb5846a68cc...37aebcf4e60e

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