[all-commits] [llvm/llvm-project] ddb0c5: AMDGPU: Allocate different registers for vdst & sr...

[Pravin Jagtap via All-commits]

  Branch: refs/heads/users/arsenm/gfx950/allocate-different-regs-v_cvt_scalef32
  Home:   https://github.com/llvm/llvm-project
  Commit: ddb0c55a456edcfbc47d8be753e134ca3f36c909
      https://github.com/llvm/llvm-project/commit/ddb0c55a456edcfbc47d8be753e134ca3f36c909
  Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll

  Log Message:
  -----------
  AMDGPU: Allocate different registers for vdst & src in v_cvt_scalef32*

For multipass instructions, overlap on VDST and SRC’s
would result in HW race & undefined results.

Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>



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