[all-commits] [llvm/llvm-project] df8901: AMDGPU: Builtins & Codegen support for v_cvt_scale...

[Pravin Jagtap via All-commits]

  Branch: refs/heads/users/arsenm/gfx950/codegen-v_cvt_scalef32_pk_f32_f8_bf8
  Home:   https://github.com/llvm/llvm-project
  Commit: df8901506b5e0d39baddf57ca1d2e19994bcf9e9
      https://github.com/llvm/llvm-project/commit/df8901506b5e0d39baddf57ca1d2e19994bcf9e9
  Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.def
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
    M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll

  Log Message:
  -----------
  AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp8|bf8} for gfx950

OPSEL[0] determines low/high 16 bits of src0 to read.

Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>



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