[all-commits] [llvm/llvm-project] b5c247: AMDGPU: Builtins & CodeGen support for v_cvt_scale...

[Pravin Jagtap via All-commits]

  Branch: refs/heads/users/arsenm/gfx950/codegen-v_cvt_scalef32_pk_f16_bf16_fp4
  Home:   https://github.com/llvm/llvm-project
  Commit: b5c2479e4d0e87b5a866b783b70cf371c3b94aff
      https://github.com/llvm/llvm-project/commit/b5c2479e4d0e87b5a866b783b70cf371c3b94aff
  Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
  Date:   2024-11-26 (Tue, 26 Nov 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.def
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
    M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll

  Log Message:
  -----------
  AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{f|bf}16_fp4 for gfx950

OPSEL ASM Syntax for v_cvt_scalef32_pk_{f|bf}16_fp4 : opsel:[x,y,z]
where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read.

Note: Conventional Inst{13} i.e. OPSEL[2] is ignored in asm syntax.

Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications