[all-commits] [llvm/llvm-project] d0df1b: AMDGPU: Builtins & Codegen support for: v_cvt_scal...

[Pravin Jagtap via All-commits]

  Branch: refs/heads/users/arsenm/gfx950/codegen-v_cvt_scalef32_f16_f32_fp8_bf8
  Home:   https://github.com/llvm/llvm-project
  Commit: d0df1b683f6bf5cd4e21997b2a32634a002ec29f
      https://github.com/llvm/llvm-project/commit/d0df1b683f6bf5cd4e21997b2a32634a002ec29f
  Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
  Date:   2024-11-26 (Tue, 26 Nov 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.def
    M clang/test/CodeGenOpenCL/amdgpu-features.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
    M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/TargetParser/TargetParser.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll

  Log Message:
  -----------
  AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]_[bf8|fp8]

OPSEL[1:0] collectively decide which byte to read
from src input.

Builtin takes additional imm argument which
represents index (with valid values:[0:3]) of src
byte read. Out of bounds checks will added in next
patch.

OPSEL ASM Syntax: opsel:[x,y,z]
where,
    opsel[x] = Inst{11} = src0_modifier{2}
    opsel[y] = Inst{12} = src1_modifier{2}
    opsel[z] = Inst{14} = src0_modifier{3}

Note: Inst{13} i.e. OPSEL[2] is ignored in
asm syntax and opsel[z] is meaningless
for v_cvt_scalef32_f32_{fp|bf}8

Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications