[all-commits] [llvm/llvm-project] 72ed6e: AMDGPU: Handle v_mfma_f64_16x16x4_f64 write VGPR r...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/gfx950/v_mfma_f64_16x16x4_f64-write-vgpr-read-srca-srcb-hazard
  Home:   https://github.com/llvm/llvm-project
  Commit: 72ed6e17ba542b47c53f35490b74b8a6ea908cf1
      https://github.com/llvm/llvm-project/commit/72ed6e17ba542b47c53f35490b74b8a6ea908cf1
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-11-23 (Sat, 23 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir

  Log Message:
  -----------
  AMDGPU: Handle v_mfma_f64_16x16x4_f64 write VGPR read srca/srcb hazard change for gfx950

Increase in wait states from 11 to 19. The index for smfmac counts as like srcA/srcB.



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