[all-commits] [llvm/llvm-project] ac9fc9: AMDGPU: Handle v_mfma_f64_16x16x4_f64 srcc write V...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/gfx950/v_mfma_f64_16x16x4_f64-srcc-write-vgpr-hazard
  Home:   https://github.com/llvm/llvm-project
  Commit: ac9fc9da1521e412d31b5ed9acdc3932573d6c7c
      https://github.com/llvm/llvm-project/commit/ac9fc9da1521e412d31b5ed9acdc3932573d6c7c
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-11-22 (Fri, 22 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir

  Log Message:
  -----------
  AMDGPU: Handle v_mfma_f64_16x16x4_f64 srcc write VGPR hazard change for gfx950

Read by sgemm/dgemm in srcc after v_mfma_f64_16x16x4_f64 increases from 9 to 17
wait states.



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