[all-commits] [llvm/llvm-project] 29f11f: [X86] Add missing reg/imm attributes to VRNDSCALES...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 29f11f0a3240dff1e10ed3d4a5412ecb8c762327
      https://github.com/llvm/llvm-project/commit/29f11f0a3240dff1e10ed3d4a5412ecb8c762327
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-11-22 (Fri, 22 Nov 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86CompressEVEX.cpp
    M llvm/lib/Target/X86/X86InstrAVX512.td
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86SchedSapphireRapids.td
    M llvm/test/CodeGen/X86/evex-to-vex-compress.mir
    M llvm/test/TableGen/x86-fold-tables.inc
    M llvm/test/TableGen/x86-instr-mapping.inc
    M llvm/utils/TableGen/X86ManualInstrMapping.def

  Log Message:
  -----------
  [X86] Add missing reg/imm attributes to VRNDSCALES instruction names (#117203)

More canonicalization of the instruction names to make the predictable - more closely matches VRNDSCALEP / VROUND equivalent instructions



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