[all-commits] [llvm/llvm-project] 9e1faa: [NFC] Delete stray file introduced by #116181 (#11...
Pengcheng Wang via All-commits
all-commits at lists.llvm.org
Fri Nov 22 04:03:32 PST 2024
Branch: refs/heads/users/wangpc-pp/spr/riscv-support-__builtin_cpu_is
Home: https://github.com/llvm/llvm-project
Commit: 9e1faa834173f57344a12b1a0a2f90b8e903c7bd
https://github.com/llvm/llvm-project/commit/9e1faa834173f57344a12b1a0a2f90b8e903c7bd
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
R .icslock
Log Message:
-----------
[NFC] Delete stray file introduced by #116181 (#116235)
Commit: 0192ae5ce047424caf4ff51c8ce813a8cdf298ed
https://github.com/llvm/llvm-project/commit/0192ae5ce047424caf4ff51c8ce813a8cdf298ed
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 9f06129e55a0
Commit: 562d235cbc0dfc2e54d268df5db118c461b10d97
https://github.com/llvm/llvm-project/commit/562d235cbc0dfc2e54d268df5db118c461b10d97
Author: Joe Nash <joseph.nash at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
Log Message:
-----------
[AMDGPU][True16][MC] Copy True16Predicate from pseudo to real in VOP1 (#116098)
This is a necessary change for consistency and an upcoming patch.
Cleanup an affected extra whitespace and wrong CHECK prefix in
v_swap_b16.
Commit: 8ac46d6b4f8dff07730c4c0dff20d969efcf14f2
https://github.com/llvm/llvm-project/commit/8ac46d6b4f8dff07730c4c0dff20d969efcf14f2
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/iaddcarry-builtin.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
A llvm/test/CodeGen/SPIRV/isubborrow-builtin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types-vs-calllowering-unwrapped.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types-vs-calllowering.ll
Log Message:
-----------
[SPIR-V] Implement builtins for OpIAddCarry/OpISubBorrow and improve/fix type inference (#115192)
This PR is to solve several intertwined issues with type inference while
adding support for builtins for OpIAddCarry and OpISubBorrow:
* OpIAddCarry and OpISubBorrow generation in a way of supporting SPIR-V
friendly builtins `__spirv_...` -- introduces a new element to account
for, namely, `ptr sret (%struct) %0` argument that is a place to put a
result of the instruction;
* fix early definition of SPIR-V types during call lowering -- namely,
the goal of the PR is to ensure that correct types are applied to
virtual registers which were used as arguments in call lowering and so
caused early definition of SPIR-V types; reproducers are attached as a
new test cases;
* improve parsing of builtin names (e.g., understand a name of a kind
`"anon<int, int> __spirv_IAddCarry<int, int>(int, int)"` that was
incorrectly parsed as `anon` before the PR);
* improve type inference and fix access to erased from parent after
visit instructions -- before the PR visiting of instructions in
emitintrinsics pass replaced old alloca's, bitcast's, etc. instructions
with a newly generated internal SPIR-V intrinsics and after erasing old
instructions there were still references to them in a postprocessing
working list, while records for newly deduced pointee types were lost;
this PR fixes the issue by adding as consistent wrt. internal data
structures action `SPIRVEmitIntrinsics::replaceAllUsesWith()` that fixes
above mentioned problems;
* LLVM IR add/sub instructions result in logical SPIR-V instructions
when applied to bool type;
* fix validation of pointer types for frexp and lgamma_r,
* fix hardcoded reference to AS0 as a Function storage class in
lib/Target/SPIRV/SPIRVBuiltins.cpp -- now it's
`storageClassToAddressSpace(SPIRV::StorageClass::Function)`,
* re-use the same OpTypeStruct for two identical references to struct's
in arithmetic with overflow instructions.
Commit: b7f7e6454877846d2ee4be8cae821b2c32501b1e
https://github.com/llvm/llvm-project/commit/b7f7e6454877846d2ee4be8cae821b2c32501b1e
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-default-ast.cpp
A clang/test/SemaOpenACC/combined-construct-default-clause.c
A clang/test/SemaOpenACC/combined-construct-default-clause.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
Log Message:
-----------
[OpenACC] Implement 'default' clause for Combined Constructs
This clause takes one of two fixed values, and can apply to all three of
the combined constructs. Tests/etc are all exactly like the compute
constructs, so committing them all here.
Commit: d84d0caf28902843e0aae7ac435daed9aa04e3e2
https://github.com/llvm/llvm-project/commit/d84d0caf28902843e0aae7ac435daed9aa04e3e2
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M flang/test/Transforms/omp-map-info-finalization.fir
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-data-use-dev-ordering.mlir
M mlir/test/Target/LLVMIR/omptarget-llvm.mlir
A offload/test/Inputs/target-use-dev-ptr.c
A offload/test/offloading/fortran/target-use-dev-ptr.f90
Log Message:
-----------
[Flang][OpenMP] Update MapInfoFinalization to use BlockArgs Interface and modify use_device_ptr/addr to be order independent (#113919)
This patch primarily updates the MapInfoFinalization pass to utilise the
BlockArgument interface. It also shuffles newly added arguments the
MapInfoFinalization passes to the end of the BlockArg/Relevant MapInfo
lists, instead of one prior to the owning descriptor type.
During this it was noted that the use_device_ptr/addr handling of target
data was a little bit too order dependent so I've attempted to make it
less so, as we cannot depend on argument ordering to be the same as
Fortran for any future frontends.
Commit: 4cdfa2a2c80d59db10d1a17e4ff0ec9902952759
https://github.com/llvm/llvm-project/commit/4cdfa2a2c80d59db10d1a17e4ff0ec9902952759
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/test/SemaOpenACC/compute-construct-firstprivate-clause.cpp
Log Message:
-----------
[OpenACC] Fix test that didn't actually test the clause it claimed to
Apparently a copy/paste issue, we were testing private instead of
firstprivate for oen of the tests.
Commit: 4610e5c78647983f79d1bd5264afff254774e13e
https://github.com/llvm/llvm-project/commit/4610e5c78647983f79d1bd5264afff254774e13e
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
M clang/test/Analysis/store-dump-orders.cpp
Log Message:
-----------
[analyzer] Don't copy field-by-field conjured LazyCompoundVals (2/4) (#115917)
Split from #114835
Commit: f71cb9dbb739bb58ce7e52e49fe384ff2ff11687
https://github.com/llvm/llvm-project/commit/f71cb9dbb739bb58ce7e52e49fe384ff2ff11687
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
M llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
M llvm/lib/Target/PowerPC/PPCCCState.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoopsVerify.cpp
M llvm/lib/Target/PowerPC/PPCCallingConv.cpp
M llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
M llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCVSXCopy.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
Log Message:
-----------
[PowerPC] Remove unused includes (NFC) (#116163)
Identified with misc-include-cleaner.
Commit: a8a1e9033a902d961ad050a139b97ac0319b9e25
https://github.com/llvm/llvm-project/commit/a8a1e9033a902d961ad050a139b97ac0319b9e25
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
Log Message:
-----------
[TableGen] Remove unused includes (NFC) (#116168)
Identified with misc-include-cleaner.
Commit: 6fb7cdff3d90c565b87a253ff7dbd36319879111
https://github.com/llvm/llvm-project/commit/6fb7cdff3d90c565b87a253ff7dbd36319879111
Author: Daniel Zabawa <daniel.zabawa at intel.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
A llvm/test/CodeGen/X86/pr114265.mir
Log Message:
-----------
[X86] Recognize POP/ADD/SUB modifying rsp in getSPAdjust. (#114265)
This code assumed only PUSHes would appear in call sequences. However,
if calls require frame-pointer/base-pointer spills, only the PUSH
operations inserted by spillFPBP will be recognized, and the adjustments
to frame object offsets in prologepilog will be incorrect.
This change correctly reports the SP adjustment for POP and ADD/SUB to
rsp, and an assertion for unrecognized instructions that modify rsp.
Commit: 76bb9633a77965cbfce9c3a8985d9a59cf420877
https://github.com/llvm/llvm-project/commit/76bb9633a77965cbfce9c3a8985d9a59cf420877
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaType.cpp
M clang/test/Frontend/noderef.cpp
Log Message:
-----------
No longer assert when using noderef on an _Atomic type (#116237)
When filling out the type locations for a declarator, we handled atomic
types and we handled noderef types, but we didn't handle atomic noderef
types.
Fixes #116124
Commit: 44b33f5d3b7ec1f29235acee34938d52bb987619
https://github.com/llvm/llvm-project/commit/44b33f5d3b7ec1f29235acee34938d52bb987619
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/test/CodeGen/ifunc-win.c
Log Message:
-----------
Filter test based on backend support. (#116244)
ifunc support for Windows on AArch64 needs AArch64 support in the
backend so restrict the test to it's availability.
Commit: 03730cdd3d10c5270fe436777a37d50b0838a3bf
https://github.com/llvm/llvm-project/commit/03730cdd3d10c5270fe436777a37d50b0838a3bf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/amdgpu-openmp-system-arch-fail.c
M clang/test/Driver/nvptx-cuda-system-arch.c
M clang/test/Driver/openmp-system-arch.c
Log Message:
-----------
clang: Remove requires system-linux from some driver tests (#111976)
Works for me on macos.
Commit: 3a20a5f5108dc43f8a831013ef6a69fd484cf4d4
https://github.com/llvm/llvm-project/commit/3a20a5f5108dc43f8a831013ef6a69fd484cf4d4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M offload/cmake/caches/Offload.cmake
Log Message:
-----------
[Offload] Move compiler-rt to runtimes in cache
Commit: 8ed3b05582e504c545fbadcc384f474220e42d3f
https://github.com/llvm/llvm-project/commit/8ed3b05582e504c545fbadcc384f474220e42d3f
Author: Joe Nash <joseph.nash at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
Log Message:
-----------
[AMDGPU][True16][MC] Implement V_CVT_PK_F32_FP8/BF8 (#116106)
Existing Fake16 versions of these instructions do not support op_sel on
the _e32 encoding, which leaves a hole in the disassembler support.
Implement the true16 version of the instructions in the MC layer.
Commit: 310351d94d7abab5d29e4171aca9dc61a97209cc
https://github.com/llvm/llvm-project/commit/310351d94d7abab5d29e4171aca9dc61a97209cc
Author: cmtice <cmtice at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/Target.h
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
Log Message:
-----------
[LLDB] Add framework for Data Inspection Language (DIL) work. (#115666)
Add the framework code for hooking up and calling the Data Inspection
Language (DIL) implementation, as an alternate implementation for the
'frame variable' command. For now, this is an opt-in option, via a
target setting 'target.experimental.use-DIL'. See
https://discourse.llvm.org/t/rfc-data-inspection-language/69893 for more
information about this project.
This PR does not actually call any of the DIL code; instead the piece
that will eventually call the DIL code
(StackFrame::DILEvaluateVariableExpression) calls back into the original
'frame variable' implementation.
Commit: 6cb1847815b8f0d8ee15280f549ced6310be7135
https://github.com/llvm/llvm-project/commit/6cb1847815b8f0d8ee15280f549ced6310be7135
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
Fix typo "necessarilly"
Commit: d133a3ee9dce92050e3f573155c03ae7fa8eda5e
https://github.com/llvm/llvm-project/commit/d133a3ee9dce92050e3f573155c03ae7fa8eda5e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Add conversion after CUFGetDeviceAddress to avoid issue when emboxing (#116145)
Commit: be15fd5085680cc5ed9ec4f4f2258b504cdd55db
https://github.com/llvm/llvm-project/commit/be15fd5085680cc5ed9ec4f4f2258b504cdd55db
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/test/CodeGen/AArch64/init-undef.mir
Log Message:
-----------
[InitUndef] handleSubReg should skip artificial subregs. (#116248)
When enabling subreg liveness tracking for AArch64, this pass fails
because it tries to get the register class for the artificial subreg
`sub_32_hi` of a 64-bit GPR. It tries to create an INIT_UNDEF
instruction for the top 32-bits of the 64-bit GPR, which are not
directly addressable, so getSubRegisterClass() returns a nullptr,
crashing this pass.
It should instead just avoid trying to create the INIT_UNDEF
instruction.
Commit: 36c639483f26c2052c21594695d93c75e348f720
https://github.com/llvm/llvm-project/commit/36c639483f26c2052c21594695d93c75e348f720
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
Log Message:
-----------
[RISCV] Add VTs to some multi instruction isel patterns to resolve ambiguity.
See also #81192. These were found by disabling tablegen's
ForceArbitraryInstResultType.
For one of the patterns I was able to get a failure if Zfh was enabled,
but Zfbfmin was not. It appears ForceArbitraryInstResultType picks
bf16 over f16.
I think something like #116165 is a better long term fix for these
issues. I will update that to include f16/bf16.
Commit: c9719ad5cd7e0fa65b52333f28aa62c05052d989
https://github.com/llvm/llvm-project/commit/c9719ad5cd7e0fa65b52333f28aa62c05052d989
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-load-store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-load-store.mir
Log Message:
-----------
[RISCV][GISel] Add regbank and instruction selection tests for f16 load/store. NFC (#116101)
The legalizer doesn't think these are legal yet so I had to disable the
legality check.
Commit: 593be023615a456ca6ee0ef9bedc21301d73b73c
https://github.com/llvm/llvm-project/commit/593be023615a456ca6ee0ef9bedc21301d73b73c
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
Log Message:
-----------
[lldb] Remove broken comments originally written as table headers (NFC) (#116089)
Automatic formatting has removed the utility of these comments.
Commit: ed5aaddd7b35850a7c427aec5d2ea9dd0131904b
https://github.com/llvm/llvm-project/commit/ed5aaddd7b35850a7c427aec5d2ea9dd0131904b
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/IR/AutoUpgrade.cpp
A llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
Log Message:
-----------
[IR] Vector extract last active element intrinsic (#113587)
As discussed in #112738, it may be better to have an intrinsic to represent vector element extracts based on mask bits. This intrinsic is for the case of extracting the last active element, if any, or a default value if the mask is all-false.
The target-agnostic SelectionDAG lowering is similar to the IR in #106560.
Commit: 0019565e9322350145c2b3bbc06a3a042f3a8ee1
https://github.com/llvm/llvm-project/commit/0019565e9322350145c2b3bbc06a3a042f3a8ee1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/rv32-zve-bitcast-crash.ll
Log Message:
-----------
[RISCV] Don't create BuildPairF64 or SplitF64 nodes without D or Zdinx. (#116159)
The fix in ReplaceNodeResults is the only one really required for the
known crash.
I couldn't hit the case in LowerOperation because that requires (f64
(bitcast i64)), but the result type is softened before the input so we
don't get a chance to legalize the input.
The change to the setOperationAction call was an observation that a
i64<->vector cast should not be custom legalized on RV32. The custom
code already calls isTypeLegal on the scalar type.
Commit: 2e9f8696e9533fdd464e025bd504302fa1a22f14
https://github.com/llvm/llvm-project/commit/2e9f8696e9533fdd464e025bd504302fa1a22f14
Author: Justin Fargnoli <justinfargnoli at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/docs/Passes.rst
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/Transforms/Utils/IRNormalizer.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/IRNormalizer.cpp
A llvm/test/Transforms/IRNormalizer/naming-args-instr-blocks.ll
A llvm/test/Transforms/IRNormalizer/naming-arguments.ll
A llvm/test/Transforms/IRNormalizer/naming.ll
A llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll
A llvm/test/Transforms/IRNormalizer/regression-coro-elide-musttail.ll
A llvm/test/Transforms/IRNormalizer/regression-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-dont-hoist-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll
A llvm/test/Transforms/IRNormalizer/reordering-basic.ll
A llvm/test/Transforms/IRNormalizer/reordering.ll
Log Message:
-----------
Reland "[LLVM] Add IRNormalizer Pass" (#113780)
`IRNormalizer` will reorder instructions. Thus, we need to invalidate
analyses. Done in cd500d28cba3177c213f2f2faf50f14ea56e230b. This should
resolve the [BuildBot
failure](https://github.com/llvm/llvm-project/pull/68176#issuecomment-2428243474).
---
Original PR: #68176
Original commit: 1295d2e6da2fe90f3b770ab1d35bf5caecd38bed
Reverted with: 8a12e0131f3d84b470fac63af042aa96a1b19f56
---
Add the llvm-canon tool. Description from the [original
PR](https://reviews.llvm.org/D66029#change-wZv3yOpDdxIu):
> Added a new llvm-canon tool which aims to transform LLVM Modules into
a canonical form by reordering and renaming instructions while
preserving the same semantics. This tool makes it easier to spot
semantic differences while diffing two modules which have undergone
different transformation passes.
The current version of this tool can:
- Reorder instructions within a function.
- Rename instructions based on the operands.
- Sort commutative operands.
This code was originally written by @michalpaszkowski and [submitted to
mainline
LLVM](https://github.com/llvm/llvm-project/commit/14d358537f124a732adad1ec6edf3981dc9baece).
However, it was quickly
[reverted](https://github.com/llvm/llvm-project/commit/335de55fa3384946f1e62050f2545c0966163236)
to do BuildBot errors.
Michal presented his version of the tool in [LLVM-Canon: Shooting for
Clear Diffs](https://www.youtube.com/watch?v=c9WMijSOEUg).
@AidanGoldfarb and I ported the code to the new pass manager, added more
tests, and fixed some bugs related to PHI nodes that may have been the
root cause of the BuildBot errors that caused the patch to be reverted.
Additionally, we rewrote the implementation of instruction reordering to
fix cases where the original algorithm would break use-def chains.
Note that this is @AidanGoldfarb and I's first time submitting to LLVM.
Please liberally critique the PR!
CC @plotfi for initial review.
---------
Co-authored-by: Aidan <aidan.goldfarb at mail.mcgill.ca>
Commit: 1cd981a5f3c89058edd61cdeb1efa3232b1f71e6
https://github.com/llvm/llvm-project/commit/1cd981a5f3c89058edd61cdeb1efa3232b1f71e6
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-default-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-clause.c
A clang/test/SemaOpenACC/combined-construct-private-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-firstprivate-ast.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
Log Message:
-----------
[OpenACC] Implement private/firstprivate for combined constructs
This is another pair of clauses where the work is already done from
previous constructs, so this just has to allow them and include tests
for them. This patch adds testing, does a few little cleanup bits on the
clause checking, and enables these.
Commit: 38eec3a7e328cf5aa34f90dc755ff52999761eac
https://github.com/llvm/llvm-project/commit/38eec3a7e328cf5aa34f90dc755ff52999761eac
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
Log Message:
-----------
[flang][cuda][NFC] Add dependent dialect for cuf-convert (#116093)
This pass will create gpu dialect operation. Add the dialect as
dependency so fir-opt will not crash on it
Commit: 5300ba7f4fce46160a7097292a9b0a56daa92cff
https://github.com/llvm/llvm-project/commit/5300ba7f4fce46160a7097292a9b0a56daa92cff
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port 2e9f8696e953
Commit: 6f5a145aebee4a925da28d409d69ec7f4ea19f40
https://github.com/llvm/llvm-project/commit/6f5a145aebee4a925da28d409d69ec7f4ea19f40
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV][GISel] Remove isel pattern that is no longer tested after other recent changes.
Commit: 02018cf7931de1a09184d3313bceaba9e21d5c48
https://github.com/llvm/llvm-project/commit/02018cf7931de1a09184d3313bceaba9e21d5c48
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
Log Message:
-----------
[flang][cuda][NFC] Use mlir::emitError to get location (#116267)
Use `mlir::emitError` so we can get location information on error.
Commit: 531acf9e2f24977d2556b39229b22f4518a1faa5
https://github.com/llvm/llvm-project/commit/531acf9e2f24977d2556b39229b22f4518a1faa5
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/tests/sanitizer_block_signals.cpp
Log Message:
-----------
Reapply "[sanitizer_common] AND signals in BlockSignals instead of deleting (#113443)" for non-Android Linux only (#115790)
The original patch (25fd366d6a7d40266ff27c134ed8beb0a90cc33b) was
reverted in 083a5cdbeab09517d8345868970d4f41170d7ed2 because it broke
some buildbots.
This revised patch makes two changes:
- Reverts to *pre-#98200* behavior for Android. This avoids a build
breakage on Android.
- Only define KeepUnblocked if SANITIZER_LINUX: this avoids a build
breakage on solaris, which does not support internal_sigdelset.
N.B. Other buildbot failures were non-sanitizer tests and are therefore
unrelated.
Original commit message:
My earlier patch https://github.com/llvm/llvm-project/pull/98200
caused a regression because it unconditionally unblocked synchronous
signals, even if the user program had deliberately blocked them.
This patch fixes the issue by checking the current signal mask, as
suggested by Vitaly. It also adds tests.
Fixes #113385
Commit: 7d20ea9d32954e8e5becab8495fa509a3f67b710
https://github.com/llvm/llvm-project/commit/7d20ea9d32954e8e5becab8495fa509a3f67b710
Author: ZijunZhaoCCK <zijunzhao at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Headers/limits.h
M clang/test/Headers/limits.cpp
Log Message:
-----------
[clang] Extend clang's <limits.h> to define *LONG_LONG*_ macros for bionic (#115406)
*LONG_LONG*_ macros are not GNU-only extensions any more. Bionic also
defines them.
Commit: 081a80f2b56763422183542ad10b5a6b0814312e
https://github.com/llvm/llvm-project/commit/081a80f2b56763422183542ad10b5a6b0814312e
Author: David Peixotto <peix at meta.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/LibcBenchmark.h
M libc/benchmarks/MemorySizeDistributions.cpp
Log Message:
-----------
Fix build issues with libc mem* benchmarks (#115982)
Fix a few issues found when trying to build the benchmark:
Errors
1. Unable to find include "src/__support/macros/config.h" in
LibcMemoryBenchmarkMain.cpp
Warnings
2. Unused variable warning `Index` in MemorySizeDistributions.cpp
3. Fix deprecation warning for const-ref version of `DoNotOptimize`.
warning: 'DoNotOptimize<void *>' is deprecated: The const-ref version of
this method can permit undesired compiler optimizations in benchmarks
Commit: c923ac08f0e9905a5522e9f78118623583a3f845
https://github.com/llvm/llvm-project/commit/c923ac08f0e9905a5522e9f78118623583a3f845
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBSaveCoreOptions.h
Log Message:
-----------
[lldb] Make Doxygen commits consistent with the rest of LLDB (NFC) (#116269)
This fixes a warning that '\class' command should not be used in a
comment attached to a non-class declaration. It also makes the Doxygen
comments in SBSaveCoreOptions consistent with the rest of LLDB.
rdar://139848370
Commit: c7605bfd4eaf1b0fe46fa91bd0e3f7aa17585d89
https://github.com/llvm/llvm-project/commit/c7605bfd4eaf1b0fe46fa91bd0e3f7aa17585d89
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/source/Host/macosx/objcxx/Host.mm
Log Message:
-----------
[lldb] Fix cast-function-type-mismatch warning in Host.mm (NFC)
Fixes warning: cast from 'void (*)(xpc_object_t _Nonnull)' (aka 'void
(*)(NSObject<OS_xpc_object> * _Nonnull)') to 'xpc_finalizer_t' (aka
'void (*)(void * _Nullable)') converts to incompatible function type
[-Wcast-function-type-mismatch]
Commit: 1b44c3a1424924a06f5eb00204e57effd7af7874
https://github.com/llvm/llvm-project/commit/1b44c3a1424924a06f5eb00204e57effd7af7874
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
A clang/test/SemaOpenACC/combined-construct-async-clause.c
A clang/test/SemaOpenACC/combined-construct-async-clause.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-default-clause.cpp
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
Log Message:
-----------
[OpenACC] enable 'async' clause for combined constructs
No additional work required over what we did for other constructs, so
this is just adding the tests and enabling the clauses.
Commit: 9f96f1cb6f2c7a987de590cbb02780df15c60f18
https://github.com/llvm/llvm-project/commit/9f96f1cb6f2c7a987de590cbb02780df15c60f18
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary64.h
Log Message:
-----------
[sanitizer] print both class id and corresponding size when region is exhausted (#116186)
Commit: e3e7c756fb439f4e92691c6f8c891fecd2c918ed
https://github.com/llvm/llvm-project/commit/e3e7c756fb439f4e92691c6f8c891fecd2c918ed
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
Log Message:
-----------
AMDGPU: Update pattern matching from "x&(-1>>(32-y))" to "bfe x, 0, y" (#116115)
It is not correct to lower "x&(-1>>(32-y))" to "bfe x, 0, y". When y
equals 32, "-1" is not shifted, so x&(-1>>(32-32) is still x, but "bfe
x, 0, 32" is 0. However, if we know y is at most of 5 bits (< 32), we
can still do the pattern matching.
Commit: 7b7ae72b5863c4090bf06d1f10cd676823e02fb1
https://github.com/llvm/llvm-project/commit/7b7ae72b5863c4090bf06d1f10cd676823e02fb1
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/msp430-char.c
Log Message:
-----------
[MSP430] Default to unsigned char (#115964)
This matches the ABI document at https://www.ti.com/lit/pdf/slaa534 as well as the GCC implementation.
Partially fixes https://github.com/llvm/llvm-project/issues/115957
Commit: 90cbd4adb3ecee72319c320ed62a9d1329a49bb9
https://github.com/llvm/llvm-project/commit/90cbd4adb3ecee72319c320ed62a9d1329a49bb9
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
Log Message:
-----------
[NVPTX] Add folding for cvt.rn.bf16x2.f32 (#116109)
Commit: 5d16fbc275d57b88866a2606453ead6a024ffee0
https://github.com/llvm/llvm-project/commit/5d16fbc275d57b88866a2606453ead6a024ffee0
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
Log Message:
-----------
[lldb] Support any flag to _regexp-bt (#116260)
In particular, this allows `bt -u`.
Note that this passthrough behavior has precedent in `_regexp-break`,
where `b (-.*)` is expanded to `breakpoint set %1`.
Commit: bb3f5e1fed7c6ba733b7f273e93f5d3930976185
https://github.com/llvm/llvm-project/commit/bb3f5e1fed7c6ba733b7f273e93f5d3930976185
Author: Matin Raayai <30674652+matinraayai at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/docs/WritingAnLLVMBackend.rst
A llvm/include/llvm/CodeGen/CodeGenTargetMachineImpl.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
M llvm/include/llvm/CodeGen/MachineModuleInfo.h
M llvm/include/llvm/CodeGen/RegisterUsageInfo.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
R llvm/lib/CodeGen/LLVMTargetMachine.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineModuleInfo.cpp
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.h
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.h
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.h
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.h
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.h
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.h
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.h
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.h
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.h
M llvm/lib/Target/VE/VETargetMachine.cpp
M llvm/lib/Target/VE/VETargetMachine.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.h
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaTargetMachine.h
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.h
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
M llvm/tools/llvm-exegesis/lib/LlvmState.h
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
M llvm/unittests/CodeGen/AsmPrinterDwarfTest.cpp
M llvm/unittests/CodeGen/CCStateTest.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
M llvm/unittests/CodeGen/LexicalScopesTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MLRegAllocDevelopmentFeatures.cpp
M llvm/unittests/CodeGen/MachineBasicBlockTest.cpp
M llvm/unittests/CodeGen/MachineDomTreeUpdaterTest.cpp
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/CodeGen/PassManagerTest.cpp
M llvm/unittests/CodeGen/RegAllocScoreTest.cpp
M llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/CodeGen/TargetOptionsTest.cpp
M llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/MIR/MachineMetadata.cpp
M llvm/unittests/MIR/MachineStableHashTest.cpp
M llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/AArch64SVESchedPseudoTest.cpp
M llvm/unittests/Target/AArch64/InstSizes.cpp
M llvm/unittests/Target/AArch64/MatrixRegisterAliasing.cpp
M llvm/unittests/Target/ARM/InstSizes.cpp
M llvm/unittests/Target/ARM/MachineInstrTest.cpp
M llvm/unittests/Target/LoongArch/InstSizes.cpp
M llvm/unittests/Target/VE/MachineInstrTest.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
M llvm/unittests/Target/X86/TernlogTest.cpp
M llvm/unittests/tools/llvm-exegesis/Common/AssemblerUtils.h
M llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M offload/plugins-nextgen/common/src/JIT.cpp
Log Message:
-----------
Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)
Following discussions in #110443, and the following earlier discussions
in https://lists.llvm.org/pipermail/llvm-dev/2017-October/117907.html,
https://reviews.llvm.org/D38482, https://reviews.llvm.org/D38489, this
PR attempts to overhaul the `TargetMachine` and `LLVMTargetMachine`
interface classes. More specifically:
1. Makes `TargetMachine` the only class implemented under
`TargetMachine.h` in the `Target` library.
2. `TargetMachine` contains target-specific interface functions that
relate to IR/CodeGen/MC constructs, whereas before (at least on paper)
it was supposed to have only IR/MC constructs. Any Target that doesn't
want to use the independent code generator simply does not implement
them, and returns either `false` or `nullptr`.
3. Renames `LLVMTargetMachine` to `CodeGenCommonTMImpl`. This renaming
aims to make the purpose of `LLVMTargetMachine` clearer. Its interface
was moved under the CodeGen library, to further emphasis its usage in
Targets that use CodeGen directly.
4. Makes `TargetMachine` the only interface used across LLVM and its
projects. With these changes, `CodeGenCommonTMImpl` is simply a set of
shared function implementations of `TargetMachine`, and CodeGen users
don't need to static cast to `LLVMTargetMachine` every time they need a
CodeGen-specific feature of the `TargetMachine`.
5. More importantly, does not change any requirements regarding library
linking.
cc @arsenm @aeubanks
Commit: 46d8aa8d6a6538b8cd22c8670f40d412399ad742
https://github.com/llvm/llvm-project/commit/46d8aa8d6a6538b8cd22c8670f40d412399ad742
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/string
Log Message:
-----------
[libc++] Make __throw_ member functions static (#116233)
Fixes #116092
Commit: b05d37d0d25e5f3ef181e11eb2a61dd816ae72e1
https://github.com/llvm/llvm-project/commit/b05d37d0d25e5f3ef181e11eb2a61dd816ae72e1
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
Log Message:
-----------
Revert "Respect the [[clang::unsafe_buffer_usage]] attribute for field and constructor initializers (#91991)"
This reverts commit a518ed2d815c16010a6262edd0414a5f60a63a39 because it causes regression. See https://github.com/llvm/llvm-project/pull/91991#issuecomment-2477456171 for detail.
Commit: 949caf39e4a445cc0600735ac0755dd0d4aa28f6
https://github.com/llvm/llvm-project/commit/949caf39e4a445cc0600735ac0755dd0d4aa28f6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv32zba.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Zba testing improvements. NFC
Add lshr+gep tests for RV32. These patterns are already handled, but we only tested for RV64.
Remove stale FIXMEs and adjust test case names in rv64zba..l
Commit: 23e9b49b88dc9b8be3edd2e46485d59e05f9f6ba
https://github.com/llvm/llvm-project/commit/23e9b49b88dc9b8be3edd2e46485d59e05f9f6ba
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zba.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
Log Message:
-----------
[RISCV][GISel] Copy some Zba IR test cases from SelectionDAG. NFC
Commit: 196d5fdff1cb7b600dcf11b5464be4fc72dba675
https://github.com/llvm/llvm-project/commit/196d5fdff1cb7b600dcf11b5464be4fc72dba675
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove most patterns that look for a zext i32->i64 and another integer instruction.
For the most part integer code should promote G_ZEXT to G_AND now.
The exception may be when the G_ZEXT is fed by a bitcast from FP,
but we don't have any testing of that now.
I had to adjust one test that was looking for G_TRUNC+G_ZEXT instead
of G_AND.
Commit: 691bd184e628bac8a2d7385dba1057cfcd844689
https://github.com/llvm/llvm-project/commit/691bd184e628bac8a2d7385dba1057cfcd844689
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/updateCounter.ll
Log Message:
-----------
[HLSL][DIRECTX] Fixing update counter signature (#115913)
This PR changes the return type on `bufferUpdateCounter` to `uint`
Fixes #115614
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 6bd3f2e8986f4eb7972bc0102ff4a706dacc0d48
https://github.com/llvm/llvm-project/commit/6bd3f2e8986f4eb7972bc0102ff4a706dacc0d48
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGen/blocks.c
Log Message:
-----------
[clang codegen] Add CreateRuntimeFunction overload that takes a clang type. (#113506)
Correctly computing the LLVM types/attributes is complicated in general,
so add a variant which does that for you.
Commit: ba623e10b4064c410a1b79280ec7fb963463eb29
https://github.com/llvm/llvm-project/commit/ba623e10b4064c410a1b79280ec7fb963463eb29
Author: Tyler Nowicki <tyler.nowicki at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[NFC][Coroutines] Remove integer indexing in several CoroSplit loops (#115954)
Use helpers such as llvm::enumerate and llvm::zip in places to avoid
using loop counters. Also refactored AnyRetconABI::splitCoroutine to
avoid some awkward indexing that came about by putting ContinuationPhi
into the ReturnPHIs vector and mistaking i with I and e with E.
Commit: aa68dd57838d29f1e020fa6e5a726c2e2317bb75
https://github.com/llvm/llvm-project/commit/aa68dd57838d29f1e020fa6e5a726c2e2317bb75
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/include/flang/Common/Fortran-features.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call38.f90
Log Message:
-----------
[flang] Disable extension by default (#114875)
f18 allows, as an extension, an assumed-rank array to be associated with
a dummy argument that is not assumed-rank. This usage is non-conforming
and supported by only one other compiler, perhaps unintentionally.
Disable the extension by default, but also make it controllable so that
we can turn it back on later if it's really needed. (If it turns out to
not appear in applications after more exposure, I'll remove it
entirely.)
Fixes https://github.com/llvm/llvm-project/issues/114080.
Commit: b3026bab91bd05453e7385377c40213a5b518dae
https://github.com/llvm/llvm-project/commit/b3026bab91bd05453e7385377c40213a5b518dae
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/bind-c17.f90
Log Message:
-----------
[flang] Soften interoperability error when standard allows (#115092)
The standard doesn't require that an interoperable procedure's dummy
arguments have interoperable derived types in some cases. Although
nearly all extant Fortran compilers emit errors, some don't, and things
should work; so reduce the current fatal error message to an optional
portability warning.
Fixes https://github.com/llvm/llvm-project/issues/115010.
Commit: 2bc30f37ce7143fd30f21bd232e14aa787f6b08f
https://github.com/llvm/llvm-project/commit/2bc30f37ce7143fd30f21bd232e14aa787f6b08f
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Semantics/c_f_pointer.f90
Log Message:
-----------
[flang] Make interoperability warning an off-by-default portability one (#115096)
The FPTR= argument to the C_F_POINTER intrinsic procedure should be a
pointer with an interoperable type, but isn't required to be, and most
compilers don't mention it. Change the warning from an on-by-default
interoperability warning into an off-by-default portability warning.
Fixes https://github.com/llvm/llvm-project/issues/115012.
Commit: ebc0163cea1cb1ad44f9c438064a52df7e5fc517
https://github.com/llvm/llvm-project/commit/ebc0163cea1cb1ad44f9c438064a52df7e5fc517
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Evaluate/int8.f90
Log Message:
-----------
[flang] INT2 & INT8 can't be specific intrinsic functions (#115360)
I recently added support for the extension intrinsic functions INT2 and
INT8, and took the shortcut of defining them as specific intrinsic
functions that map to the standard INT() with hard-wired KIND= values
for the result. This works fine for references to these functions, but
leads to a compiler crash for an attempt to use their names in contexts
other than calling them, since their argument types aren't restricted to
single types and no concrete interface can be characterized for them. So
move them out of the table of specific intrinsic functions and into the
general table of intrinsics, and then handle them afterwards as if they
had been INT().
Fixes https://github.com/llvm/llvm-project/issues/115324.
Commit: d68332d0627f6492866298038e1085e4aff0f476
https://github.com/llvm/llvm-project/commit/d68332d0627f6492866298038e1085e4aff0f476
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/bug115674.f90
Log Message:
-----------
[flang] Fix spurious error messages due to INTRINSIC nested in BLOCK (#115889)
When skimmming executable parts to collect names used in procedure
calls, it is important to exclude names that have local declarations in
nested BLOCK constructs. The mechanism for handling these nested
declarations was catching only names whose declarations include an
"entity-decl", and so names appearing in other declaration statements
(like INTRINSIC and EXTERNAL statements) were not hidden from the scan,
leading to absurd error messages when such names turn out to be
procedures in the nested BLOCK construct but to not be procedures
outside it.
This patch fixes the code that detects local declarations in BLOCK for
all of the missed cases that don't use entity-decls; only INTRINSIC and
EXTERNAL could affect the procedures whose names are of interest to the
executable part skimmer, but perhaps future work will want to collect
non-procedures as well, so I plugged all of the holes that I could find.
Fixes https://github.com/llvm/llvm-project/issues/115674.
Commit: 17daa84348f55aac7b0264a3e545a1cc4b16fe1a
https://github.com/llvm/llvm-project/commit/17daa84348f55aac7b0264a3e545a1cc4b16fe1a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Evaluate/check-expression.cpp
M flang/test/Evaluate/folding09.f90
M flang/test/Lower/HLFIR/maxloc.f90
M flang/test/Lower/HLFIR/maxval.f90
M flang/test/Lower/HLFIR/minloc.f90
M flang/test/Lower/HLFIR/minval.f90
Log Message:
-----------
[flang] Better IS_CONTIGUOUS folding for substrings (#115970)
At present, the compiler doesn't analyze substring references for
contiguity. But there are cases where substrings can be known to be
contiguous (scalar base, empty substring, or complete substring) or can
be known to be discontiguous, and references to the intrinsic function
IS_CONTIGUOUS in those cases may appear in constant expressions.
Fixes https://github.com/llvm/llvm-project/issues/115675.
Commit: 376713ff505f31b698a3ab095fad7b6e08f99e74
https://github.com/llvm/llvm-project/commit/376713ff505f31b698a3ab095fad7b6e08f99e74
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/runtime/transformational.cpp
A flang/test/Evaluate/bug115923.f90
Log Message:
-----------
[flang] Accept CLASS(*) array in EOSHIFT (#116114)
The intrinsic processing code wasn't allowing the ARRAY= argument to the
EOSHIFT intrinsic function to be CLASS(*). That case seems to conform to
the standard, although only one compiler could actually handle it, so
allow for it.
Fixes https://github.com/llvm/llvm-project/issues/115923.
Commit: 2d6459cb284505e54af53f519f2d230bb973d453
https://github.com/llvm/llvm-project/commit/2d6459cb284505e54af53f519f2d230bb973d453
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
Log Message:
-----------
[libc++] Fix CI issues recently introduced by localization changes (#116216)
After a recent Github Actions runner policy change [1], the version of
Xcode included in the macos-14 image went from Xcode 16 to Xcode 15,
breaking our build bots.
This moves the bots to the macos 15 (public preview) image, which
contains Xcode 16.
Also, adjust an UNSUPPORTED annotation that was incorrectly targeting
macos 13.7 when it should have been targeting a version of AppleClang.
[1]: https://github.com/actions/runner-images/issues/10703
Commit: 44adc245d8e7e16b730fb247f3b8b47428e2864b
https://github.com/llvm/llvm-project/commit/44adc245d8e7e16b730fb247f3b8b47428e2864b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
Log Message:
-----------
[memprof] Use ArrayRef instead of std::vector<LinearFrameId> (NFC) (#116279)
LLVM Programmer's Manual prefers ArrayRef over actual sequential
container types for read accesses.
Commit: 0f0e2fe97b6c771b7a70964bf321ad91788e6a22
https://github.com/llvm/llvm-project/commit/0f0e2fe97b6c771b7a70964bf321ad91788e6a22
Author: Konstantin Schwarz <konstantin.schwarz at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-freeze.mir
A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-ext.ll
M llvm/test/CodeGen/AArch64/arm64-extract_subvector.ll
M llvm/test/CodeGen/AArch64/ext-narrow-index.ll
Log Message:
-----------
[GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (#115377)
Commit: abff8fe2a940212b1c43af2d86a68fc92849f019
https://github.com/llvm/llvm-project/commit/abff8fe2a940212b1c43af2d86a68fc92849f019
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
M llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir
A llvm/test/MC/AMDGPU/vinterp.s
M llvm/test/MC/Disassembler/AMDGPU/vinterp.txt
Log Message:
-----------
[AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (#113634)
Update VInterp instructions with true16 and fake16 formats.
This patch includes instructions:
v_interp_p10_f16_f32
v_interp_p2_f16_f32
v_interp_p10_rtz_f16_f32
v_interp_p2_rtz_f16_f32
dasm test vinterp-fake16.txt is removed and the testline are merged into
vinterp.txt which handles both true16/fake16 cases
Commit: aa81c28cd54ec6be370a3a04c8546e9b65a1e6a0
https://github.com/llvm/llvm-project/commit/aa81c28cd54ec6be370a3a04c8546e9b65a1e6a0
Author: Thomas Peters <thomas.d.peters at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
Log Message:
-----------
[MLIR][mlir-opt] Add option to turn off verifier on parsing (#116287)
Sometimes, a developer may not wish to wait for the verifier
(imagine they did not follow the verifier guidelines and chased use-def
chains), or may wish to disable it.
Add a command-line option,
`--mlir-very-unsafe-disable-verifier-on-parsing`, which turns off the
verifier on parsing.
------
This implements the discussion from
https://discourse.llvm.org/t/optionally-turn-off-verifier-during-parsing/82805
Commit: b3134fa2338388adf8cfb2d77339d0b042eab9f6
https://github.com/llvm/llvm-project/commit/b3134fa2338388adf8cfb2d77339d0b042eab9f6
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
Log Message:
-----------
Reland [CGData] Refactor Global Merge Functions (#115750)
This is a follow-up PR to refactor the initial global merge function
pass implemented in #112671.
It first collects stable functions relevant to the current module and
iterates over those only, instead of iterating through all stable
functions in the stable function map.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: 9c7701fa78037af03be10ed168fd3c75a2ed1aef
https://github.com/llvm/llvm-project/commit/9c7701fa78037af03be10ed168fd3c75a2ed1aef
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/StackFrame.h
M lldb/source/API/SBFrame.cpp
M lldb/source/Target/StackFrame.cpp
Log Message:
-----------
[lldb/API] Hoist some of SBFrame logic to lldb_private::StackFrame (NFC) (#116298)
This patch moves some of the logic implemented in the SBFrame APIs to
the lldb_private::StackFrame class so it can be re-used elsewhere.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: d761b7485dbf0d951db34abcca270c405be1e93a
https://github.com/llvm/llvm-project/commit/d761b7485dbf0d951db34abcca270c405be1e93a
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[rtsan] NFC: Add comment about O_NONBLOCK behavior (#116189)
Commit: 59da1afd2ad74af2a8b8475412353c5d54a7d7f5
https://github.com/llvm/llvm-project/commit/59da1afd2ad74af2a8b8475412353c5d54a7d7f5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
Log Message:
-----------
[memprof] Speed up caller-callee pair extraction (#116184)
We know that the MemProf profile has a lot of duplicate call stacks.
Extracting caller-callee pairs from a call stack we've seen before is
a wasteful effort.
This patch makes the extraction more efficient by first coming up with
a work list of linear call stack IDs -- the set of starting positions
in the radix tree array -- and then extract caller-callee pairs from
each call stack in the work list.
We implement the work list as a bit vector because we expect the work
list to be dense in the range [0, RadixTreeSize). Also, we want the
set insertion to be cheap.
Without this patch, it takes 25 seconds to extract caller-callee pairs
from a large MemProf profile. This patch shortenes that down to 4
seconds.
Commit: 3121f7522a0dc1463362cb6c11243d4352d4c857
https://github.com/llvm/llvm-project/commit/3121f7522a0dc1463362cb6c11243d4352d4c857
Author: John Harrison <harjohn at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactor lldb-dap.cpp to not use global DAP variable. (#116272)
This removes the global DAP variable and instead allocates a DAP
instance in main. This should allow us to refactor lldb-dap to enable a
server mode that accepts multiple connections.
Commit: 1857d297354fd307d2b30ff69036cc343d2fd692
https://github.com/llvm/llvm-project/commit/1857d297354fd307d2b30ff69036cc343d2fd692
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/source/Target/StackFrame.cpp
Log Message:
-----------
[lldb/Target] Add null-check before dereferencing inlined_info (NFC) (#116300)
This patch is a follow-up to 9c7701fa78037af03be10ed168fd3c75a2ed1aef
and adds extra-null checks before dereferencing the inlined_info
pointer.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: eec21ccee0950d52926a79685573db1996e3ba5b
https://github.com/llvm/llvm-project/commit/eec21ccee0950d52926a79685573db1996e3ba5b
Author: Matin Raayai <raayaiardakani.m at northeastern.edu>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.h
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
Log Message:
-----------
Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets (#116290)
This PR fixes a set of build issues with experimental targets happened
in result of merging #111234 to master.
Commit: 2f55de4e317ee93cdca839558acf8be2b5ac2b46
https://github.com/llvm/llvm-project/commit/2f55de4e317ee93cdca839558acf8be2b5ac2b46
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[llvm] `APFloat`: Query `hasNanOrInf` from semantics (#116158)
Whether a floating point type supports NaN or infinity can be queried
from its semantics. No need to hard-code a list of types.
Commit: 478c24b5f86911d14256bad71c85ed0ff061070a
https://github.com/llvm/llvm-project/commit/478c24b5f86911d14256bad71c85ed0ff061070a
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
Log Message:
-----------
[HLSL] Add implicit resource element type concepts to AST (#112600)
This PR is step one on the journey to implement resource element type
validation via C++20 concepts. The PR sets up the infrastructure for
injecting implicit concept decls / concept specialization expressions
into the AST, which will then be evaluated after template arguments are
instantiated. This is not meant to be a complete implementation of the
desired validation for HLSL,
there are a couple of missing elements:
1. We need the __builtin_hlsl_is_typed_resource_element_compatible
builtin to be implemented.
2. We need other constraints, like is_intangible
3. We need to put the first 2 points together, and construct a finalized
constraint expression, which should differ between typed and raw buffers
This is just an initial PR that puts some of the core infrastructure in
place.
Commit: 47889cdd23e57c0acb68adff44ce5657dc86640e
https://github.com/llvm/llvm-project/commit/47889cdd23e57c0acb68adff44ce5657dc86640e
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
[HLSL] Add empty struct test cases to `__builtin_hlsl_is_typed_resource_element_compatible` test file (#115045)
This PR adds empty struct cases to the test file for the builtin.
Commit: c1f6cb74634509d0e4204dadd46566185fa33e2b
https://github.com/llvm/llvm-project/commit/c1f6cb74634509d0e4204dadd46566185fa33e2b
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
Log Message:
-----------
Revert "[HLSL] Add implicit resource element type concepts to AST" (#116305)
Reverts llvm/llvm-project#112600
Commit: 40a647fc7dc6048c92e2d580b61f5feca0785980
https://github.com/llvm/llvm-project/commit/40a647fc7dc6048c92e2d580b61f5feca0785980
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll
Log Message:
-----------
[IndVarSimplify] Drop samesign flags after narrowing compares (#116263)
Samesign flag cannot be preserved after narrowing the compare since the
position of the sign bit is changed.
Closes https://github.com/llvm/llvm-project/issues/116249.
Commit: 17bc738324274f1cf54d30552d65751d216e7ad0
https://github.com/llvm/llvm-project/commit/17bc738324274f1cf54d30552d65751d216e7ad0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[memprof] Make ContextNode smaller (#116271)
With this patch, sizeof(ContextNode) goes down from 144 to 128.
Note that SmallVector<T, 0> uses uint32_t for its capacity and size
fields.
I could change other instances of std::vector to SmallVector<T, 0>,
but that would require updates to many places, so I am leaving them
alone for now.
Commit: 98daf22638aec08ec3a3ea022984828fbf89f28f
https://github.com/llvm/llvm-project/commit/98daf22638aec08ec3a3ea022984828fbf89f28f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize the box in memory when src is emboxed (#116289)
Commit: 618f231a6d3ef41d231e2a4d1e2eca4c0d709802
https://github.com/llvm/llvm-project/commit/618f231a6d3ef41d231e2a4d1e2eca4c0d709802
Author: Jinyun (Joey) Ye <jinyunye at huawei.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/python/mlir/dialects/transform/structured.py
M mlir/test/Dialect/Linalg/continuous-tiling-full.mlir
M mlir/test/Dialect/Linalg/continuous-tiling-multiway-split.mlir
M mlir/test/Dialect/Linalg/multisize-tiling-full.mlir
M mlir/test/Dialect/Linalg/transform-op-split.mlir
M mlir/test/Dialect/Linalg/transform-ops.mlir
M mlir/test/python/dialects/transform_structured_ext.py
Log Message:
-----------
[MLIR][Transform] Consolidate result of structured.split into one list (#111171)
Follow-up a review comment from
https://github.com/llvm/llvm-project/pull/82792#discussion_r1604925239
as a separate PR:
E.g.:
```
%0:2 = transform.structured.split
```
is changed to
```
%t = transform.structured.split
%0:2 = transform.split_handle %t
```
Commit: 4f2651c36361468cf35cdcdf841d3abed9d0d1cc
https://github.com/llvm/llvm-project/commit/4f2651c36361468cf35cdcdf841d3abed9d0d1cc
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M compiler-rt/test/profile/ContinuousSyncMode/basic.c
M compiler-rt/test/profile/ContinuousSyncMode/get-filename.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-no-counters.c
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
M compiler-rt/test/profile/ContinuousSyncMode/pid-substitution.c
M compiler-rt/test/profile/ContinuousSyncMode/reset-default-profile.c
M compiler-rt/test/profile/ContinuousSyncMode/set-filename.c
M compiler-rt/test/profile/lit.cfg.py
Log Message:
-----------
[PGO][test] Enable continuous mode PGO tests on AIX (#115987)
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 6be567bfc22e0d165a4b927beab3933be7ef98e6
https://github.com/llvm/llvm-project/commit/6be567bfc22e0d165a4b927beab3933be7ef98e6
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
Log Message:
-----------
[Webkit Checkers] Treat const member variables as a safe origin (#115594)
Treat const Ref, RefPtr, CheckedRef, CheckedPtr member variables as safe
pointer origin in WebKit's local variable and call arguments checkers.
Commit: c2a9bba4a30349f5411f3b3f9cbe4a6f379816bc
https://github.com/llvm/llvm-project/commit/c2a9bba4a30349f5411f3b3f9cbe4a6f379816bc
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
A llvm/test/DebugInfo/Generic/artificial-static-member.ll
Log Message:
-----------
[DebugInfo] Add DW_AT_artificial for compiler generated static member. (#115851)
Consider the case when the compiler generates a static member. Any
consumer of the debug info generated for that case, would benefit if
that member has the DW_AT_artificial flag.
Commit: 4e600751d2f7e8e7b85a71b7128b68444bdde91b
https://github.com/llvm/llvm-project/commit/4e600751d2f7e8e7b85a71b7128b68444bdde91b
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/unittests/AST/EvaluateAsRValueTest.cpp
M clang/unittests/Analysis/CloneDetectionTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Tooling/ASTSelectionTest.cpp
A clang/unittests/Tooling/CRTPTestVisitor.h
M clang/unittests/Tooling/CastExprTest.cpp
M clang/unittests/Tooling/CommentHandlerTest.cpp
M clang/unittests/Tooling/ExecutionTest.cpp
M clang/unittests/Tooling/LexicallyOrderedRecursiveASTVisitorTest.cpp
M clang/unittests/Tooling/LookupTest.cpp
M clang/unittests/Tooling/QualTypeNamesTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestDeclVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestPostOrderVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestTypeLocVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Attr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/BitfieldInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXBoolLiteralExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMemberCall.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXOperatorCallExprTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CallbacksCommon.h
M clang/unittests/Tooling/RecursiveASTVisitorTests/Class.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Concept.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ConstructExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeclRefExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeductionGuide.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtorInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/IntegerLiteral.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaDefaultCapture.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaTemplateParams.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/MemberPointerTypeLoc.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/NestedNameSpecifiers.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ParenExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TemplateArgumentLocTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TraversalScope.cpp
M clang/unittests/Tooling/RefactoringTest.cpp
M clang/unittests/Tooling/SourceCodeTest.cpp
M clang/unittests/Tooling/TestVisitor.h
Log Message:
-----------
[Clang] [Tests] Refactor most unit tests to use DynamicRecursiveASTVisitor (#115132)
This pr refactors most tests that use RAV to use DRAV instead; this also
has the nice effect of testing both the RAV and DRAV implementations at
the same time w/o having to duplicate all of our AST visitor tests.
Some tests rely on features that DRAV doesn’t support (mainly post-order
traversal), so those haven’t been migrated. At the same time,
`TestVisitor` is now a DRAV, so I’ve had to introduce a new
`CTRPTestVisitor` for any tests that need to use RAV directly.
Commit: 7b54976d11a5fc6aa1f22e9d96bcb4c81bbf2abf
https://github.com/llvm/llvm-project/commit/7b54976d11a5fc6aa1f22e9d96bcb4c81bbf2abf
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/RegisterUsageInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen][NewPM] Port RegisterUsageInfo to NPM (#113873)
And add to the codegen pipeline if ipra is enabled with a `RequireAnalysisPass` since this is a module pass.
Commit: 1b23ebe0770aaf85f37e085b53067066d2d99cc8
https://github.com/llvm/llvm-project/commit/1b23ebe0770aaf85f37e085b53067066d2d99cc8
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Add Op for TMA Prefetch (#116232)
PR #115527 adds intrinsics for TMA prefetch.
This patch adds an NVVM Dialect Op for the same.
Lit tests to verify the lowering to LLVM intrinsics as well as
verifier tests (for invalid cases) are added.
PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cp-async-bulk-prefetch-tensor
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 9ae21b073ab48b376687ecd7fbae12e08b4ae86e
https://github.com/llvm/llvm-project/commit/9ae21b073ab48b376687ecd7fbae12e08b4ae86e
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clangd] fix extract-to-function for overloaded operators (#81640)
When selecting code that contains the use of overloaded operators,
the SelectionTree will attribute the operator to the operator
declaration, not to the `CXXOperatorCallExpr`. To allow
extract-to-function to work with these operators, make unselected
`CXXOperatorCallExpr`s valid root statements, just like `DeclStmt`s.
Partially fixes clangd/clangd#1254
---------
Co-authored-by: Nathan Ridge <zeratul976 at hotmail.com>
Commit: b4adce0056bac9f650ec883a1dc5e082aa649b5c
https://github.com/llvm/llvm-project/commit/b4adce0056bac9f650ec883a1dc5e082aa649b5c
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/vector-tuple-align.ll
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
Log Message:
-----------
[RISCV] Tuple intrinsics are creating overly aligned memory operands (#115804)
The alignment should be same as its element type.
Commit: e24457a330923dbc43a0e056deddb2d42c682e6c
https://github.com/llvm/llvm-project/commit/e24457a330923dbc43a0e056deddb2d42c682e6c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Driver.cpp
M lld/ELF/Driver.h
M lld/ELF/DriverUtils.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Migrate away from global ctx
Commit: 56e56c9e6673cc17f4bc7cdb3a5dbffc1557b446
https://github.com/llvm/llvm-project/commit/56e56c9e6673cc17f4bc7cdb3a5dbffc1557b446
Author: Luohao Wang <luohaothu at live.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
Log Message:
-----------
[clang][CIR] Fix missing dependency of MLIRCIR (#116221)
Building `MLIRCIR` will report an error `CIROpsDialect.h.inc` not found.
This is because `MLIRCIR` hasn't declared its dependence on the tablegen
target `MLIRCIROpsIncGen`. This patch fixes the issue.
Commit: 2de1e067360055b5fb17568dc474fbfd7c4b1ffb
https://github.com/llvm/llvm-project/commit/2de1e067360055b5fb17568dc474fbfd7c4b1ffb
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A llvm/include/llvm/CodeGen/RegUsageInfoCollector.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
M llvm/test/CodeGen/X86/ipra-inline-asm.ll
M llvm/test/CodeGen/X86/ipra-reg-usage.ll
Log Message:
-----------
[CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM (#113874)
Commit: d69cc05bcfeaf43853a509ec47ec742464fd60a0
https://github.com/llvm/llvm-project/commit/d69cc05bcfeaf43853a509ec47ec742464fd60a0
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Migrate away from global ctx
Commit: 47928ab16b675c17826ada16f23aa0569e93a474
https://github.com/llvm/llvm-project/commit/47928ab16b675c17826ada16f23aa0569e93a474
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A llvm/include/llvm/CodeGen/RegUsageInfoPropagate.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/preserve.ll
Log Message:
-----------
[CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM (#114010)
Commit: 3d57c79728968e291df4929b377b3580d16af7b9
https://github.com/llvm/llvm-project/commit/3d57c79728968e291df4929b377b3580d16af7b9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lld/ELF/EhFrame.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Migrate away from global ctx
Commit: dde802b153d5cb41505bf4d377be753576991297
https://github.com/llvm/llvm-project/commit/dde802b153d5cb41505bf4d377be753576991297
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Analysis/CallGraph.h
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/lib/Analysis/CallGraph.cpp
M clang/lib/Analysis/CalledOnceCheck.cpp
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/ReachableCode.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/StaticAnalyzer/Checkers/CastToStructChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
M clang/lib/StaticAnalyzer/Checkers/IdenticalExprChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCMissingSuperCallChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
Log Message:
-----------
[Clang] [NFC] Refactor AST visitors in Sema and the static analyser to use DynamicRecursiveASTVisitor (#115144)
This pr refactors all recursive AST visitors in `Sema`, `Analyze`, and
`StaticAnalysis` to inherit from DRAV instead. This is over half of the
visitors that inherit from RAV directly.
See also #115132, #110040, #93462
LLVM Compile-Time Tracker link for this branch:
https://llvm-compile-time-tracker.com/compare.php?from=5adb5c05a2e9f31385fbba8b0436cbc07d91a44d&to=b58e589a86c06ba28d4d90613864d10be29aa5ba&stat=instructions%3Au
Commit: 942928f3df16c01ea2b905f441d72cca138032e9
https://github.com/llvm/llvm-project/commit/942928f3df16c01ea2b905f441d72cca138032e9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/OutputSections.cpp
Log Message:
-----------
[ELF] Migrate away from global ctx
Commit: bc6c0681271788ca7078fb679ac67b56944de1a6
https://github.com/llvm/llvm-project/commit/bc6c0681271788ca7078fb679ac67b56944de1a6
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/clip.hlsl
A clang/test/SemaHLSL/BuiltIns/clip-errors.hlsl
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/DirectX/discard.ll
A llvm/test/CodeGen/DirectX/discard_error.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
Log Message:
-----------
[HLSL] Adding HLSL `clip` function. (#114588)
Adding HLSL `clip` function.
- adding llvm intrinsic
- adding sema checks
- adding dxil lowering
- ading spirv lowering
- adding sema tests
- adding codegen tests
- adding lowering tests
Closes #99093
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 1799d57ffadd2f01c6d4caae7eb635cc51f5562d
https://github.com/llvm/llvm-project/commit/1799d57ffadd2f01c6d4caae7eb635cc51f5562d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libc++] Add a Github action to build libc++'s Docker images (#110020)
This patch adds a Github action that runs whenever changes to the libc++
Docker images are pushed to `main`. The action will rebuild the Docker
images and push them to LLVM's container registry so that we can then
point to those images from our CI nodes.
Commit: 4fb1f2e58a2f423362b75f233896ea0d7179fc7a
https://github.com/llvm/llvm-project/commit/4fb1f2e58a2f423362b75f233896ea0d7179fc7a
Author: Michael Park <mcypark at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp
Log Message:
-----------
[clangd] Fix the modification detection logic in `ClangdLSPServer::applyConfiguration`. (#115438)
Prior to this, the "old != new" check would always evaluate to true because it was comparing a pre-mangling new command to a post-mangling old command.
Commit: 878b03e0b96698ced5fb6a70dc80df05ef884f8c
https://github.com/llvm/llvm-project/commit/878b03e0b96698ced5fb6a70dc80df05ef884f8c
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
Log Message:
-----------
Remove an unused Passes include from CodeGen/RegUsageInfoPropagate.cpp
CodeGen should not depend on Passes component.
Commit: a809405f78980d216737e8e4903bf0f5ab9314d3
https://github.com/llvm/llvm-project/commit/a809405f78980d216737e8e4903bf0f5ab9314d3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libc++] Adjust the workflow file for building a Docker image (#116333)
Commit: 073159004fe3781571b6fbc9efb68ef1cb24ad75
https://github.com/llvm/llvm-project/commit/073159004fe3781571b6fbc9efb68ef1cb24ad75
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
R libcxx/utils/ci/macos-ci-setup
Log Message:
-----------
[libc++] Remove obsolete 'macos-ci-setup' script
We don't use it anymore since we moved to Github hosted runners
for mac instead of the Foundation-provided runners.
Commit: 87bfa58a5a4b85416d2486797d0f21fc67da5cf3
https://github.com/llvm/llvm-project/commit/87bfa58a5a4b85416d2486797d0f21fc67da5cf3
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/DebugInfo/Generic/artificial-static-member.ll
Log Message:
-----------
[DebugInfo] Add DW_AT_artificial for compiler generated static member. (#116327)
Consider the case when the compiler generates a static member. Any
consumer of the debug info generated for that case, would benefit if
that member has the DW_AT_artificial flag.
Fix buildbot failure on: llvm-clang-aarch64-darwin
- Add specific configuration: x86_64-linux
Commit: a1a1a4ced9d4ecba428175c45a24da476bdc55f4
https://github.com/llvm/llvm-project/commit/a1a1a4ced9d4ecba428175c45a24da476bdc55f4
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/source/Target/Process.cpp
A lldb/test/API/functionalities/scripted_process_empty_memory_region/Makefile
A lldb/test/API/functionalities/scripted_process_empty_memory_region/TestScriptedProcessEmptyMemoryRegion.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/dummy_scripted_process.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/main.c
Log Message:
-----------
[lldb] Handle an empty SBMemoryRegionInfo from scripted process (#115963)
A scripted process implementation might return an SBMemoryRegionInfo
object in its implementation of `get_memory_region_containing_address`
which will have an address 0 and size 0, without realizing the problems
this can cause. Several algorithms in lldb will try to iterate over the
MemoryRegions of the process, starting at address 0 and expecting to
iterate up to the highest vm address, stepping by the size of each
region, so a 0-length region will result in an infinite loop. Add a
check to Process::GetMemoryRegionInfo that rejects a MemoryRegion which
does not contain the requested address; a 0-length memory region will
therefor always be rejected.
rdar://139678032
Commit: 4163136e2ee121a5d7b86cb1262a524dde4a5ec4
https://github.com/llvm/llvm-project/commit/4163136e2ee121a5d7b86cb1262a524dde4a5ec4
Author: Ding Fei <fding at feysh.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Core/ConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/RangedConstraintManager.cpp
A clang/test/Analysis/solver-sym-simplification-on-assumption.c
A clang/test/Analysis/std-c-library-functions-bufsize-nocrash-with-correct-solver.c
M clang/test/Analysis/symbol-simplification-fixpoint-two-iterations.cpp
Log Message:
-----------
[analyzer][Solver] Early return if sym is concrete on assuming (#115579)
This could deduce some complex syms derived from simple ones whose
values could be constrainted to be concrete during execution, thus
reducing some overconstrainted states.
This commit also fix `unix.StdCLibraryFunctions` crash due to these
overconstrainted states being added to the graph, which is marked as
sink node (PosteriorlyOverconstrained). The 'assume' API is used in
non-dual style so the checker should protectively test whether these
newly added nodes are actually impossible.
1. The crash: https://godbolt.org/z/8KKWeKb86
2. The solver needs to solve equivalent: https://godbolt.org/z/ed8WqsbTh
Commit: e54365006a46850e25bb2546c78a7e0ec88a544e
https://github.com/llvm/llvm-project/commit/e54365006a46850e25bb2546c78a7e0ec88a544e
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/sve-mov-imm-pred.ll
Log Message:
-----------
[AArch64][SVE] Detect MOV (imm, pred, zeroing/merging) (#116032)
Add patterns to fold MOV (scalar, predicated) to MOV (imm, pred,
merging) or MOV (imm, pred, zeroing) as appropriate.
This affects the `@llvm.aarch64.sve.dup` intrinsics, which currently
generate MOV (scalar, predicated) instructions even when the
immediate forms are possible. For example:
```
svuint8_t mov_z_b(svbool_t p) {
return svdup_u8_z(p, 1);
}
```
Currently generates:
```
mov_z_b(__SVBool_t):
mov z0.b, #0
mov w8, #1
mov z0.b, p0/m, w8
ret
```
Instead of:
```
mov_z_b(__SVBool_t):
mov z0.b, p0/z, #1
ret
```
Commit: fda4a324a384af8dc57cbe0a9b6284c2e8ca073f
https://github.com/llvm/llvm-project/commit/fda4a324a384af8dc57cbe0a9b6284c2e8ca073f
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
M lldb/test/API/functionalities/scripted_process_empty_memory_region/TestScriptedProcessEmptyMemoryRegion.py
Log Message:
-----------
[lldb] Only run scripted process test on x86_64/arm64
The newly added
test/API/functionalities/scripted_process_empty_memory_region/dummy_scripted_process.py
imports
examples/python/templates/scripted_process.py
which only has register definitions for x86_64 and arm64.
Only run this test on those two architectures for now.
Commit: 91aad9bfb24347db4c4fed7b0ab5e4180ddcdc7f
https://github.com/llvm/llvm-project/commit/91aad9bfb24347db4c4fed7b0ab5e4180ddcdc7f
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/test/AST/arm-mfp8.cpp
M clang/test/CodeGen/AArch64/debug-types.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/Sema/arm-mfp8.c
M clang/test/Sema/arm-mfp8.cpp
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[Clang][AArch64]Fix Name and Mangle name for scalar fp8 (#114983)
The scalar __mfp8 type has the wrong name and mangle name in
AArch64SVEACLETypes.def
According to the ACLE[1] the name should be __mfp8
This patch fixes this problem by replacing
the Name __MFloat8_t by __mfp8
and
the Mangle Name __MFloat8_t by u6__mfp8
And we revert the incorrect typedef in NeonEmitter.
[1]https://github.com/ARM-software/acle
Commit: 182275479208492d2a1c67438ad6b4e23ca32288
https://github.com/llvm/llvm-project/commit/182275479208492d2a1c67438ad6b4e23ca32288
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/MC/AArch64/SVE2/aesd.s
M llvm/test/MC/AArch64/SVE2/aese.s
M llvm/test/MC/AArch64/SVE2/aesimc.s
M llvm/test/MC/AArch64/SVE2/aesmc.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/pmullb-128.s
M llvm/test/MC/AArch64/SVE2/pmullt-128.s
Log Message:
-----------
[AArch64] Allow SVE_AES instructions in streaming mode with SSVE_AES (#115526)
In accordance with
https://developer.arm.com/documentation/ddi0602/latest/, the following
SVE2 instructions are available in streaming SVE mode if the target has
FEAT_SSVE_AES
- PMULLB, PMULLT (128-bit element)
- AESE (vectors)
- AESD (vectors)
- AESMC
- AESIMC
This patch updates the predication of these instructions to reflect this
architecture change.
Note that the assembler predicates here always require at least one of
sve2,ssve-aes due to the following condition on
[FEAT_SVE_AES](https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/The-Armv9-0-architecture-extension?lang=en#md457-the-armv90-architecture-extension__feat_FEAT_SVE_AES)
>If FEAT_SVE_AES is implemented, then FEAT_SVE2 or FEAT_SSVE_AES is
implemented.
Commit: 8d43c880a5be1cd624052eb009d1f3983d4c5459
https://github.com/llvm/llvm-project/commit/8d43c880a5be1cd624052eb009d1f3983d4c5459
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Core/ConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/RangedConstraintManager.cpp
R clang/test/Analysis/solver-sym-simplification-on-assumption.c
R clang/test/Analysis/std-c-library-functions-bufsize-nocrash-with-correct-solver.c
M clang/test/Analysis/symbol-simplification-fixpoint-two-iterations.cpp
Log Message:
-----------
Revert "[analyzer][Solver] Early return if sym is concrete on assuming" (#116362)
Reverts llvm/llvm-project#115579
This introduced a breakage:
https://lab.llvm.org/buildbot/#/builders/46/builds/7928
Commit: 469f9d5fb8fcfe7dc42baa2daa7e230147f234de
https://github.com/llvm/llvm-project/commit/469f9d5fb8fcfe7dc42baa2daa7e230147f234de
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
Log Message:
-----------
[MLIR][Affine] Rewrite fusion helper hasNonAffineUsersOnPath for efficiency (#115588)
The hasNonAffineUsersOnPath utility used during fusion was terribly
inefficient in its approach. Rewrite it efficiently to simply work based
on use lists (sparse) instead of having to traverse all nodes of an MDG
repeatedly and all operands of all ops of each node in the relevant
range.
On large models (with 10s of thousands of loop nests), this reduces
fusion pass time by nearly 2x (cutting down several tens of seconds).
Commit: 53e92e48d0c03a2475e8517dd4c28968d84fc217
https://github.com/llvm/llvm-project/commit/53e92e48d0c03a2475e8517dd4c28968d84fc217
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/docs/doxygen.cfg.in
M clang/docs/tools/dump_ast_matchers.py
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M clang/unittests/ASTMatchers/CMakeLists.txt
A clang/utils/generate_ast_matcher_doc_tests.py
Log Message:
-----------
Reland: [clang][test] add testing for the AST matcher reference (#112168)
## Problem Statement
Previously, the examples in the AST matcher reference, which gets
generated by the Doxygen comments in `ASTMatchers.h`, were untested and
best effort.
Some of the matchers had no or wrong examples of how to use the matcher.
## Solution
This patch introduces a simple DSL around Doxygen commands to enable
testing the AST matcher documentation in a way that should be relatively
easy to use.
In `ASTMatchers.h`, most matchers are documented with a Doxygen comment.
Most of these also have a code example that aims to show what the
matcher will match, given a matcher somewhere in the documentation text.
The way that the documentation is tested, is by using Doxygen's alias
feature to declare custom aliases. These aliases forward to
`<tt>text</tt>` (which is what Doxygen's `\c` does, but for multiple
words). Using the Doxygen aliases is the obvious choice, because there
are (now) four consumers:
- people reading the header/using signature help
- the Doxygen generated documentation
- the generated HTML AST matcher reference
- (new) the generated matcher tests
This patch rewrites/extends the documentation such that all matchers
have a documented example.
The new `generate_ast_matcher_doc_tests.py` script will warn on any
undocumented matchers (but not on matchers without a Doxygen comment)
and provides diagnostics and statistics about the matchers.
The current statistics emitted by the parser are:
```text
Statistics:
doxygen_blocks : 519
missing_tests : 10
skipped_objc : 42
code_snippets : 503
matches : 820
matchers : 580
tested_matchers : 574
none_type_matchers : 6
```
The tests are generated during building, and the script will only print
something if it found an issue with the specified tests (e.g., missing
tests).
## Description
DSL for generating the tests from documentation.
TLDR:
```
\header{a.h}
\endheader <- zero or more header
\code
int a = 42;
\endcode
\compile_args{-std=c++,c23-or-later} <- optional, the std flag supports std ranges and
whole languages
\matcher{expr()} <- one or more matchers in succession
\match{42} <- one or more matches in succession
\matcher{varDecl()} <- new matcher resets the context, the above
\match will not count for this new
matcher(-group)
\match{int a = 42} <- only applies to the previous matcher (not to the
previous case)
```
The above block can be repeated inside a Doxygen command for multiple
code examples for a single matcher.
The test generation script will only look for these annotations and
ignore anything else like `\c` or the sentences where these annotations
are embedded into: `The matcher \matcher{expr()} matches the number
\match{42}.`.
### Language Grammar
[] denotes an optional, and <> denotes user-input
```
compile_args j:= \compile_args{[<compile_arg>;]<compile_arg>}
matcher_tag_key ::= type
match_tag_key ::= type || std || count || sub
matcher_tags ::= [matcher_tag_key=<value>;]matcher_tag_key=<value>
match_tags ::= [match_tag_key=<value>;]match_tag_key=<value>
matcher ::= \matcher{[matcher_tags$]<matcher>}
matchers ::= [matcher] matcher
match ::= \match{[match_tags$]<match>}
matches ::= [match] match
case ::= matchers matches
cases ::= [case] case
header-block ::= \header{<name>} <code> \endheader
code-block ::= \code <code> \endcode
testcase ::= code-block [compile_args] cases
```
### Language Standard Versions
The 'std' tag and '\compile_args' support specifying a specific language
version, a whole language and all of its versions, and thresholds
(implies ranges). Multiple arguments are passed with a ',' separator.
For a language and version to execute a tested matcher, it has to match
the specified '\compile_args' for the code, and the 'std' tag for the
matcher. Predicates for the 'std' compiler flag are used with
disjunction between languages (e.g. 'c || c++') and conjunction for all
predicates specific to each language (e.g. 'c++11-or-later &&
c++23-or-earlier').
Examples:
- `c` all available versions of C
- `c++11` only C++11
- `c++11-or-later` C++11 or later
- `c++11-or-earlier` C++11 or earlier
- `c++11-or-later,c++23-or-earlier,c` all of C and C++ between 11 and
23 (inclusive)
- `c++11-23,c` same as above
### Tags
#### `type`:
**Match types** are used to select where the string that is used to
check if a node matches comes from.
Available: `code`, `name`, `typestr`, `typeofstr`. The default is
`code`.
- `code`: Forwards to `tooling::fixit::getText(...)` and should be the
preferred way to show what matches.
- `name`: Casts the match to a `NamedDecl` and returns the result of
`getNameAsString`. Useful when the matched AST node is not easy to spell
out (`code` type), e.g., namespaces or classes with many members.
- `typestr`: Returns the result of `QualType::getAsString` for the type
derived from `Type` (otherwise, if it is derived from `Decl`, recurses
with `Node->getTypeForDecl()`)
**Matcher types** are used to mark matchers as sub-matcher with 'sub' or
as deactivated using 'none'. Testing sub-matcher is not implemented.
#### `count`:
Specifying a 'count=n' on a match will result in a test that requires
that the specified match will be matched n times. Default is 1.
#### `std`:
A match allows specifying if it matches only in specific language
versions. This may be needed when the AST differs between language
versions.
#### `sub`:
The `sub` tag on a `\match` will indicate that the match is for a node
of a bound sub-matcher.
E.g., `\matcher{expr(expr().bind("inner"))}` has a sub-matcher that
binds to `inner`, which is the value for the `sub` tag of the expected
match for the sub-matcher `\match{sub=inner$...}`. Currently,
sub-matchers are not tested in any way.
### What if ...?
#### ... I want to add a matcher?
Add a Doxygen comment to the matcher with a code example, corresponding
matchers and matches, that shows what the matcher is supposed to do.
Specify the compile arguments/supported languages if required, and run
`ninja check-clang-unit` to test the documentation.
#### ... the example I wrote is wrong?
The test-failure output of the generated test file will provide
information about
- where the generated test file is located
- which line in `ASTMatcher.h` the example is from
- which matches were: found, not-(yet)-found, expected
- in case of an unexpected match: what the node looks like using the
different `type`s
- the language version and if the test ran with a windows `-target` flag
(also in failure summary)
#### ... I don't adhere to the required order of the syntax?
The script will diagnose any found issues, such as `matcher is missing
an example` with a `file:line:` prefix,
which should provide enough information about the issue.
#### ... the script diagnoses a false-positive issue with a Doxygen
comment?
It hopefully shouldn't, but if you, e.g., added some non-matcher code
and documented it with Doxygen, then the script will consider that as a
matcher documentation. As a result, the script will print that it
detected a mismatch between the actual and the expected number of
failures. If the diagnostic truly is a false-positive, change the
`expected_failure_statistics` at the top of the
`generate_ast_matcher_doc_tests.py` file.
Fixes #57607
Fixes #63748
Commit: 649e4bf5d88fa0880e7a42f613bdc7b17568ad37
https://github.com/llvm/llvm-project/commit/649e4bf5d88fa0880e7a42f613bdc7b17568ad37
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libc++] Update the docker-compose file for actions CI
Commit: 5bbe63ec91226c0026c6f1ed726c45bb117544e0
https://github.com/llvm/llvm-project/commit/5bbe63ec91226c0026c6f1ed726c45bb117544e0
Author: anatawa12 <anatawa12 at icloud.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/test/API/commands/process/detach-resumes/TestDetachResumes.py
Log Message:
-----------
fix: Target Process may crash or freezes on detaching process on windows (#115712)
Fixes #67825 Fixes #89077
Fixes
[RIDER-99436](https://youtrack.jetbrains.com/issue/RIDER-99436/Unity-Editor-will-be-crashed-when-detaching-LLDB-debugger-in-Rider),
which is upstream issue of #67825.
This PR changes the timing of calling `DebugActiveProcessStop` to after
calling `ContinueDebugEvent` for last debugger exception.
I confirmed the crashing behavior is because we call
`DebugActiveProcessStop` before `ContinueDebugEvent` for last debugger
exception with https://github.com/anatawa12/debug-api-test.
Commit: 9122c5235ec85ce0c0ad337e862b006e7b349d84
https://github.com/llvm/llvm-project/commit/9122c5235ec85ce0c0ad337e862b006e7b349d84
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/add-imm.ll
M llvm/test/CodeGen/RISCV/addcarry.ll
M llvm/test/CodeGen/RISCV/addimm-mulimm.ll
M llvm/test/CodeGen/RISCV/alu16.ll
M llvm/test/CodeGen/RISCV/alu8.ll
M llvm/test/CodeGen/RISCV/and.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/avgceils.ll
M llvm/test/CodeGen/RISCV/avgceilu.ll
M llvm/test/CodeGen/RISCV/avgfloors.ll
M llvm/test/CodeGen/RISCV/avgflooru.ll
M llvm/test/CodeGen/RISCV/bf16-promote.ll
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/bfloat-br-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat.ll
M llvm/test/CodeGen/RISCV/bitextract-mac.ll
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
M llvm/test/CodeGen/RISCV/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/compress.ll
M llvm/test/CodeGen/RISCV/condbinops.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div-pow2.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
M llvm/test/CodeGen/RISCV/double_reduct.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/float-arith.ll
M llvm/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/fold-binop-into-select.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/fpenv.ll
M llvm/test/CodeGen/RISCV/ghccc-rv32.ll
M llvm/test/CodeGen/RISCV/ghccc-rv64.ll
M llvm/test/CodeGen/RISCV/ghccc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
M llvm/test/CodeGen/RISCV/half-arith-strict.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/half-br-fcmp.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/half-fcmp.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-mem.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-select-fcmp.ll
M llvm/test/CodeGen/RISCV/iabs.ll
M llvm/test/CodeGen/RISCV/imm.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-modifier-N.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
M llvm/test/CodeGen/RISCV/lsr-legaladdimm.ll
M llvm/test/CodeGen/RISCV/machine-combiner.ll
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/machinelicm-constant-phys-reg.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr51206.ll
M llvm/test/CodeGen/RISCV/pr56457.ll
M llvm/test/CodeGen/RISCV/pr58511.ll
M llvm/test/CodeGen/RISCV/pr65025.ll
M llvm/test/CodeGen/RISCV/pr68855.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/pr84653_pr85190.ll
M llvm/test/CodeGen/RISCV/pr95271.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/riscv-shifted-extend.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv32zbs.ll
M llvm/test/CodeGen/RISCV/rv64-double-convert.ll
M llvm/test/CodeGen/RISCV/rv64-float-convert.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
M llvm/test/CodeGen/RISCV/rv64-trampoline.ll
M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll
M llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/rvv/65704-illegal-instruction.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access-zve32x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-scalarized.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-rotate.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrol.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vror.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
M llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/frint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/frm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-combine.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mutate-prior-vsetvli-avl.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr52475.ll
M llvm/test/CodeGen/RISCV/rvv/pr61561.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/sshl_sat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfirst-byte-compare-index.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vzext-vp.ll
M llvm/test/CodeGen/RISCV/sadd_sat.ll
M llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shift-amount-mod.ll
M llvm/test/CodeGen/RISCV/shift-and.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shlimm-addimm.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/RISCV/signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/split-offsets.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/unroll-loop-cse.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/usub_sat_plus.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xtheadmac.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
Log Message:
-----------
[RISCV] Enable bidirectional scheduling and tracking register pressure (#115445)
This is based on other targets like PPC/AArch64 and some experiments.
This PR will only enable bidirectional scheduling and tracking register
pressure.
Disclaimer: I haven't tested it on many cores, maybe we should make
some options being features. I believe downstreams must have tried
this before, so feedbacks are welcome.
Commit: 0dfae0676014ca961fa404fd40d609f58d935b63
https://github.com/llvm/llvm-project/commit/0dfae0676014ca961fa404fd40d609f58d935b63
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
Log Message:
-----------
[analyzer] Trigger copy event when copying empty structs (3/4) (#115918)
Previously, ExprEngine would just skip copying empty structs.
Let's make trigger the copy event even for empty structs.
Split from #114835
Commit: e5ac9145ba2951b6454b13499f375284bdbde689
https://github.com/llvm/llvm-project/commit/e5ac9145ba2951b6454b13499f375284bdbde689
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/test/Analysis/taint-generic.cpp
Log Message:
-----------
[analyzer][taint] Recognize tainted LazyCompoundVals (4/4) (#115919)
returned by-value from opaque function calls.
If a struct is returned by-value from an opaque call, the "value" of the
whole struct is represented by a Conjured symbol.
Later fields may slice off smaller subregions by creating Derived
symbols of that Conjured symbol, but those are handled well, and
"isTainted" returns true as expected.
However, passing the whole struct to "isTainted" would be false, because
LazyCompoundVals and CompoundVals are not handled.
This patch addresses this.
Fixes #114270
Split from #114835
Commit: 7c8e05aa45f006401b71b37127537c4682fe16ee
https://github.com/llvm/llvm-project/commit/7c8e05aa45f006401b71b37127537c4682fe16ee
Author: Julian Nagele <j.nagele at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
Log Message:
-----------
[SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (#113915)
This patch aims to strengthen collection of loop guards by processing
PHI nodes with multiple incoming values as follows: collect guards for
all incoming values/blocks and try to merge them into a single one for
the PHI node.
The goal is to determine tighter bounds on the trip counts of scalar
tail loops after vectorization, helping to avoid unnecessary transforms.
In particular we'd like to avoid vectorizing scalar tails of
hand-vectorized loops, for example in
[Transforms/PhaseOrdering/X86/pr38280.ll](https://github.com/llvm/llvm-project/blob/231e03ba7e82896847dbc27d457dbb208f04699c/llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll),
discovered via https://github.com/llvm/llvm-project/pull/108190
Compile-time impact: https://llvm-compile-time-tracker.com/compare.php?from=a55248789ed3f653740e0723d016203b9d585f26&to=500e4c46e79f60b93b11a752698c520e345948e3&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/113915
Commit: e9fc2faf0c2551eb4f9f932da09bdf1af24ac7e2
https://github.com/llvm/llvm-project/commit/e9fc2faf0c2551eb4f9f932da09bdf1af24ac7e2
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
Log Message:
-----------
[flang][CodeGen] fix bug hoisting allocas using a shared constant arg (#116251)
When hoisting the allocas with a constant integer size, the constant
integer was moved to where the alloca is hoisted to unconditionally.
By CodeGen there have been various iterations of mlir canonicalization
and dead code elimination. This can cause lots of unrelated bits of code
to share the same constant values. If for some reason the alloca
couldn't be hoisted all of the way to the entry block of the function,
moving the constant might result in it no-longer dominating some of the
remaining uses.
In theory, there should be dominance analysis to ensure the location of
the constant does dominate all uses of it. But those constants are
effectively free anyway (they aren't even separate instructions in LLVM
IR), so it is less expensive just to leave the old one where it was and
insert a new one we know for sure is immediately before the alloca.
Commit: 4e1db6a318775d9d0c49357baea6ca02fe5b5389
https://github.com/llvm/llvm-project/commit/4e1db6a318775d9d0c49357baea6ca02fe5b5389
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[AArch64][SVE] Add AArch64ISD nodes for wide add instructions (#115895)
When lowering from a partial reduction to a pair of wide adds,
previously the corresponding intrinsics were returned as nodes. Now
there are AArch64ISD nodes that are returned.
Commit: e5a62d45fb1aa3b97ae47588cdc61d0d28f0c1a7
https://github.com/llvm/llvm-project/commit/e5a62d45fb1aa3b97ae47588cdc61d0d28f0c1a7
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
Log Message:
-----------
[StaticAnalyzer] Fix -Wunused-but-set-variable in ExprEngineCXX.cpp (NFC)
/llvm-project/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp:48:24:
error: variable 'ThisRD' set but not used [-Werror,-Wunused-but-set-variable]
const CXXRecordDecl *ThisRD = nullptr;
^
1 error generated.
Commit: 56720a47bb421c487d33aabad86e44e7cf2790bf
https://github.com/llvm/llvm-project/commit/56720a47bb421c487d33aabad86e44e7cf2790bf
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/CodeGen/X86/vec-strict-cmp-128.ll
Log Message:
-----------
[X86][StrictFP] Add missing patterns for AVX512 fmin/fmax (#116240)
Fix crash after #109512, see https://godbolt.org/z/M6aP5Ka4j
Commit: 10b048c8922d746b14e991f468e00b3ca67c9d95
https://github.com/llvm/llvm-project/commit/10b048c8922d746b14e991f468e00b3ca67c9d95
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
A lldb/test/API/lang/cpp/forward/Makefile
A lldb/test/API/lang/cpp/forward/TestCPPForwardDeclaration.py
A lldb/test/API/lang/cpp/forward/foo.cpp
A lldb/test/API/lang/cpp/forward/foo.h
A lldb/test/API/lang/cpp/forward/main.cpp
Log Message:
-----------
[lldb] Make CompilerDecl::GetName (always) return template args (#116068)
I ran into this while look at a different bug (patch coming soon). This
function has only two callers. The first is SBTypeStaticField::GetName
(which doesn't care about templates), and the other is
CompilerDecl::GetCompilerContext (in the TypeQuery constructor), which
does want template arguments.
This function was (normally) returning the name without template args.
Since this code is only used when looking up a type in another shared
library, the odds of running into this bug are relatively low, but I add
a test to demonstrate the scenario and the fix for it nonetheless.
Amazingly (and scarily), this test actually passes without this change
in the default configuration -- and only fails with
-gsimple-template-names. The reason for that is that in the
non-simplified case we create a regular CXXRecordDecl whose name is
"bar<int>" (instead of a template record "foo" with an argument of
"int"). When evaluating the expression, we are somehow able to replace
this with a proper template specialization decl.
Commit: 33694245cba0e935f516edf9d20c9062692b1289
https://github.com/llvm/llvm-project/commit/33694245cba0e935f516edf9d20c9062692b1289
Author: Guozhi Wei <carrot at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/extract-select-agg.ll
Log Message:
-----------
[InstCombine] Add additional tests for extract of select (NFC)
Tests from https://github.com/llvm/llvm-project/pull/115969.
Commit: 58f107f38838275f0727521558cc06646d8c205d
https://github.com/llvm/llvm-project/commit/58f107f38838275f0727521558cc06646d8c205d
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
Log Message:
-----------
[AMDGPU] Remove unused template argument after #113634. NFC.
Commit: 0b0d61101fa0648a09ebc1dc7a26ee9a89e91be8
https://github.com/llvm/llvm-project/commit/0b0d61101fa0648a09ebc1dc7a26ee9a89e91be8
Author: Michael Toguchi <michael.d.toguchi at intel.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
A clang/lib/Driver/ToolChains/SYCL.cpp
A clang/lib/Driver/ToolChains/SYCL.h
A clang/test/Driver/sycl-offload-jit.cpp
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
[Driver][SYCL] Add initial SYCL offload compilation support (#107493)
Introduces the SYCL based toolchain and initial toolchain construction
when using the '-fsycl' option. This option will enable SYCL based
offloading, creating a SPIR-V based IR file packaged into the compiled
host object.
This includes early support for creating the host/device object using
the new offloading model. The device object is created using the
spir64-unknown-unknown target triple.
New/Updated Options:
-fsycl Enables SYCL offloading for host and device
-fsycl-device-only
Enables device only compilation for SYCL
-fsycl-host-only
Enables host only compilation for SYCL
RFC Reference:
https://discourse.llvm.org/t/rfc-sycl-driver-enhancements/74092
Commit: 3d474738df573b89eedf344463a0c9a005078f1d
https://github.com/llvm/llvm-project/commit/3d474738df573b89eedf344463a0c9a005078f1d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 0b0d61101fa0
Commit: 6d058317e60c25b71df8b8dc45b69e5202362678
https://github.com/llvm/llvm-project/commit/6d058317e60c25b71df8b8dc45b69e5202362678
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/test/CodeGen/NVPTX/i1-param.ll
A llvm/test/CodeGen/NVPTX/kernel-param-align.ll
Log Message:
-----------
Enable .ptr .global .align attributes for kernel attributes for CUDA (#114874)
Emit .ptr, .address-space, and .align attributes for kernel
args in CUDA (previously handled only for OpenCL).
This allows for more vectorization opportunities if the PTX consumer
is able to know about the pointer alignments.
If no alignment is explicitly specified, .align 1 will be emitted
to match the LLVM IR semantics in this case.
PTX ISA doc -
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#kernel-parameter-attribute-ptr
This is a rework of the original patch proposed in #79646
---------
Co-authored-by: Vandana <vandanak at nvidia.com>
Commit: 40afff7bd95090a75bc68a0d26b8017cc0ae65c1
https://github.com/llvm/llvm-project/commit/40afff7bd95090a75bc68a0d26b8017cc0ae65c1
Author: lfrenot <leon.frenot at ens-lyon.fr>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
A mlir/test/Target/LLVMIR/Import/disjoint.ll
A mlir/test/Target/LLVMIR/disjoint.mlir
Log Message:
-----------
[mlir][LLVM] Add disjoint flag (#115855)
The implementation is mostly based on the one existing for the exact
flag.
disjoint means that for each bit, that bit is zero in at least one of
the inputs. This allows the Or to be treated as an Add since no carry
can occur from any bit. If the disjoint keyword is present, the result
value of the or is a [poison
value](https://llvm.org/docs/LangRef.html#poisonvalues) if both inputs
have a one in the same bit position. For vectors, only the element
containing the bit is poison.
Commit: b9d678d22f74ebd6e34f0a3501fb01d3d80984e7
https://github.com/llvm/llvm-project/commit/b9d678d22f74ebd6e34f0a3501fb01d3d80984e7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang/include/clang/AST/CanonicalType.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaFixItUtils.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/CodeGen/target-addrspace.cpp
A clang/test/Sema/amdgcn-address-spaces.c
A clang/test/Sema/nvptx-address-spaces.c
Log Message:
-----------
[Clang] Use TargetInfo when deciding if an address space is compatible (#115777)
Summary:
Address spaces are used in several embedded and GPU targets to describe
accesses to different types of memory. Currently we use the address
space enumerations to control which address spaces are considered
supersets of eachother, however this is also a target level property as
described by the C standard's passing mentions. This patch allows the
address space checks to use the target information to decide if a
pointer conversion is legal. For AMDGPU and NVPTX, all supported address
spaces can be converted to the default address space.
More semantic checks can be added on top of this, for now I'm mainly
looking to get more standard semantics working for C/C++. Right now the
address space conversions must all be done explicitly in C/C++ unlike
the offloading languages which define their own custom address spaces
that just map to the same target specific ones anyway. The main question
is if this behavior is a function of the target or the language.
Commit: cb4b943294fad949b1965f3eea2c5b492e7e3eba
https://github.com/llvm/llvm-project/commit/cb4b943294fad949b1965f3eea2c5b492e7e3eba
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Aaron Puchert as the maintainer for thread safety analysis (#115920)
Aaron has been helping out with TSA for several years and is highly
knowledgeable about the implementation.
Commit: d33a5bfa6032486747a93d142a24498755f882c2
https://github.com/llvm/llvm-project/commit/d33a5bfa6032486747a93d142a24498755f882c2
Author: Tom Natan <tomnatan at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
Log Message:
-----------
Revert "[NVPTX] Add folding for cvt.rn.bf16x2.f32" (#116376)
Reverts llvm/llvm-project#116109
This change is breaking triton tests (results in huge numeric
disparities, e.g.
https://github.com/triton-lang/triton/blob/main/python/test/unit/language/test_core.py),
we'll need to revert until a fix forward can be merged.
Commit: 62c3c1cad78b3354432fe44285f3472d9c93a45a
https://github.com/llvm/llvm-project/commit/62c3c1cad78b3354432fe44285f3472d9c93a45a
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
R clang/lib/Driver/ToolChains/SYCL.cpp
R clang/lib/Driver/ToolChains/SYCL.h
R clang/test/Driver/sycl-offload-jit.cpp
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
Revert "[Driver][SYCL] Add initial SYCL offload compilation support" (#116381)
Reverts llvm/llvm-project#107493
Failing bots include:
https://lab.llvm.org/buildbot/#/builders/190/builds/9546
https://lab.llvm.org/buildbot/#/builders/46/builds/7938
Commit: a41ae90c0c9f063de1231b454da2631c07b44535
https://github.com/llvm/llvm-project/commit/a41ae90c0c9f063de1231b454da2631c07b44535
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
Log Message:
-----------
[MergeLodstore] Add tests for preserving metadata when sinking stores.
Commit: e0b76bafde197c4813aa52dbcfeaf6bd1f9d96da
https://github.com/llvm/llvm-project/commit/e0b76bafde197c4813aa52dbcfeaf6bd1f9d96da
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
Log Message:
-----------
[lldb][test] Disable inline_sites_live.cpp for non-Windows targets (#116196)
This is a follow-up for the conversation here
https://github.com/llvm/llvm-project/pull/115722/.
This test is designed for Windows target/PDB format, so it shouldn't be
built and run for DWARF/etc.
Commit: 9cbf2dd6f3900045f1bbbdf44142f572d8f3b339
https://github.com/llvm/llvm-project/commit/9cbf2dd6f3900045f1bbbdf44142f572d8f3b339
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Analysis/ProgramPoint.cpp
M clang/utils/analyzer/exploded-graph-rewriter.py
Log Message:
-----------
[analyzer] Print the callee name in CallEnter in exploded-graph-rewriter (#116225)
Commit: 9d02264b03ea9cff356c2f1aecb9606864a671f2
https://github.com/llvm/llvm-project/commit/9d02264b03ea9cff356c2f1aecb9606864a671f2
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-nonzero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-zero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize.ll
M llvm/test/CodeGen/RISCV/global-merge-offset.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
Log Message:
-----------
[RISCV] Enable global merging by default (#115495)
>From the discussion at the round-table at the RISC-V Summit it was clear
people see cases where global merging would help. So the direction of
enabling it by default and iteratively working to enable it in more
cases or to improve the heuristics seems sensible. This patch tries to
make a minimal step in that direction.
Commit: 4b928608f8865689d51bf7c9646a049328b9ac62
https://github.com/llvm/llvm-project/commit/4b928608f8865689d51bf7c9646a049328b9ac62
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 62c3c1cad78b
Commit: 35710ab392b50c815765f03c12409147502dfb86
https://github.com/llvm/llvm-project/commit/35710ab392b50c815765f03c12409147502dfb86
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrDFP.td
M llvm/test/MC/Disassembler/SystemZ/insns.txt
M llvm/test/MC/SystemZ/insn-bad.s
M llvm/test/MC/SystemZ/insn-good.s
Log Message:
-----------
[SystemZ] Fix wrong register class for some DFP instructions
Certain DFP instructions have GPR arguments, which are currently
incorrectly treated as FPR registers. Since we do not use DFP
in codegen, this only affects the assembler and disassembler.
Commit: 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3
https://github.com/llvm/llvm-project/commit/7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
A llvm/test/CodeGen/RISCV/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
A llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
[IR] Initial introduction of llvm.experimental.memset_pattern (#97583)
Supersedes the draft PR #94992, taking a different approach following
feedback:
* Lower in PreISelIntrinsicLowering
* Don't require that the number of bytes to set is a compile-time
constant
* Define llvm.memset_pattern rather than llvm.memset_pattern.inline
As discussed in the [RFC
thread](https://discourse.llvm.org/t/rfc-introducing-an-llvm-memset-pattern-inline-intrinsic/79496),
the intent is that the intrinsic will be lowered to loops, a sequence of
stores, or libcalls depending on the expected cost and availability of
libcalls on the target. Right now, there's just a single lowering path
that aims to handle all cases. My intent would be to follow up with
additional PRs that add additional optimisations when possible (e.g.
when libcalls are available, when arguments are known to be constant
etc).
Commit: fa5a10d6313e94795739c79eb3c0774d5f8e3461
https://github.com/llvm/llvm-project/commit/fa5a10d6313e94795739c79eb3c0774d5f8e3461
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaCUDA.cpp
Log Message:
-----------
[clang] [NFC] Merge two ifs to a single one (#116226)
Commit: 8ee638fd175245eff88d77e1607e478db237dd41
https://github.com/llvm/llvm-project/commit/8ee638fd175245eff88d77e1607e478db237dd41
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/Transforms/HotColdSplit/X86/do-not-split.ll
M llvm/test/Transforms/HotColdSplit/addr-taken.ll
M llvm/test/Transforms/HotColdSplit/apply-noreturn-bonus.ll
M llvm/test/Transforms/HotColdSplit/apply-penalty-for-inputs.ll
M llvm/test/Transforms/HotColdSplit/apply-penalty-for-outputs.ll
M llvm/test/Transforms/HotColdSplit/eh-typeid-for.ll
M llvm/test/Transforms/HotColdSplit/forward-dfs-reaches-marked-block.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-2.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-3.ll
M llvm/test/Transforms/HotColdSplit/minsize.ll
M llvm/test/Transforms/HotColdSplit/outline-cold-asm.ll
M llvm/test/Transforms/HotColdSplit/outline-disjoint-diamonds.ll
M llvm/test/Transforms/HotColdSplit/phi-with-distinct-outlined-values.ll
M llvm/test/Transforms/HotColdSplit/section-splitting-custom.ll
M llvm/test/Transforms/HotColdSplit/section-splitting-default.ll
M llvm/test/Transforms/HotColdSplit/split-cold-2.ll
M llvm/test/Transforms/HotColdSplit/succ-block-with-self-edge.ll
M llvm/test/Transforms/HotColdSplit/swifterror.ll
M llvm/test/Transforms/IndVarSimplify/2003-12-10-RemoveInstrCrash.ll
M llvm/test/Transforms/IndVarSimplify/2003-12-15-Crash.ll
M llvm/test/Transforms/IndVarSimplify/2005-11-18-Crash.ll
M llvm/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
M llvm/test/Transforms/IndVarSimplify/2009-05-24-useafterfree.ll
M llvm/test/Transforms/IndVarSimplify/2011-09-10-widen-nsw.ll
M llvm/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll
M llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll
M llvm/test/Transforms/IndVarSimplify/2014-06-21-congruent-constant.ll
M llvm/test/Transforms/IndVarSimplify/2020-12-15-trunc-bug-expensive-range-inference.ll
M llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
M llvm/test/Transforms/IndVarSimplify/X86/2011-11-15-multiexit.ll
M llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll
M llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr24804.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr24956.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr25576.ll
M llvm/test/Transforms/IndVarSimplify/X86/variable-stride-ivs-1.ll
M llvm/test/Transforms/IndVarSimplify/X86/verify-scev.ll
M llvm/test/Transforms/IndVarSimplify/avoid-i0.ll
M llvm/test/Transforms/IndVarSimplify/const_phi.ll
M llvm/test/Transforms/IndVarSimplify/crash.ll
M llvm/test/Transforms/IndVarSimplify/divide-pointer.ll
M llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
M llvm/test/Transforms/IndVarSimplify/lcssa-preservation.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate11.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate7.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate8.ll
M llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
M llvm/test/Transforms/IndVarSimplify/phi-uses-value-multiple-times.ll
M llvm/test/Transforms/IndVarSimplify/pr25578.ll
M llvm/test/Transforms/IndVarSimplify/pr26974.ll
M llvm/test/Transforms/IndVarSimplify/pr40454.ll
M llvm/test/Transforms/IndVarSimplify/sentinel.ll
M llvm/test/Transforms/IndVarSimplify/single-element-range.ll
M llvm/test/Transforms/Inline/infinite-loop-two-predecessors.ll
M llvm/test/Transforms/Inline/inline-indirect-chain.ll
M llvm/test/Transforms/Inline/inline-invoke-with-asm-call.ll
M llvm/test/Transforms/Inline/inline_cleanup.ll
M llvm/test/Transforms/Inline/pr33637.ll
M llvm/test/Transforms/Inline/pr53206.ll
M llvm/test/Transforms/InstSimplify/dead-code-removal.ll
M llvm/test/Transforms/InstSimplify/require-dominator.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#116161)
This PR removes tests with `br i1 undef` under
`llvm/tests/Transforms/HotColdSplit` and `llvm/tests/Transforms/I*`.
Commit: 6c1fc8213ee40896681ed84a3f91b1b5b56a4de8
https://github.com/llvm/llvm-project/commit/6c1fc8213ee40896681ed84a3f91b1b5b56a4de8
Author: Nikolay Panchenko <npanchen at modular.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/sub-gep.ll
Log Message:
-----------
[InstCombine] fold `sub(zext(ptrtoint),zext(ptrtoint))` (#115369)
On a 32-bit target if pointer arithmetic with `addrspace` is used in i64
computation, the missed folding in InstCombine results to suboptimal
performance, unlike same code compiled for 64bit target.
Commit: 6b9952759f66c8bc62ef4c6700f586053f009296
https://github.com/llvm/llvm-project/commit/6b9952759f66c8bc62ef4c6700f586053f009296
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/PhaseOrdering/switch-sext.ll
M llvm/test/Transforms/SimplifyCFG/ForwardSwitchConditionToPHI.ll
M llvm/test/Transforms/SimplifyCFG/HoistCode.ll
A llvm/test/Transforms/SimplifyCFG/switch-dup-bbs.ll
M llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll
Log Message:
-----------
[SimplifyCFG] Simplify switch instruction that has duplicate arms (#114262)
I noticed that the two C functions emitted different IR:
```
int switch_duplicate_arms(int switch_val, int v, int w) {
switch (switch_val) {
default:
break;
case 0:
w = v;
break;
case 1:
w = v;
break;
}
return w;
}
int if_duplicate_arms(int switch_val, int v, int w) {
if (switch_val == 0)
w = v;
else if (switch_val == 1)
w = v;
return v0;
}
```
We generate IR that looks like this:
```
define i32 @switch_duplicate_arms(i32 %0, i32 %1, i32 %2, i32 %3) {
switch i32 %1, label %7 [
i32 0, label %5
i32 1, label %6
]
5:
br label %7
6:
br label %7
7:
%8 = phi i32 [ %3, %4 ], [ %2, %6 ], [ %2, %5 ]
ret i32 %8
}
define i32 @if_duplicate_arms(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp ult i32 %1, 2
%6 = select i1 %5, i32 %2, i32 %3
ret i32 %6
}
```
For `switch_duplicate_arms`, taking case 0 and 1 are the same since %5
and %6
branch to the same location and the incoming values for %8 are the same
from
those blocks. We could remove one on the duplicate switch targets and
update
the switch with the single target.
On RISC-V, prior to this patch, we generate the following code:
```
switch_duplicate_arms:
li a4, 1
beq a1, a4, .LBB0_2
mv a0, a3
bnez a1, .LBB0_3
.LBB0_2:
mv a0, a2
.LBB0_3:
ret
if_duplicate_arms:
li a4, 2
mv a0, a2
bltu a1, a4, .LBB1_2
mv a0, a3
.LBB1_2:
ret
```
After this patch, the O3 code is optimized to the icmp + select pair,
which
gives us the same code gen as `if_duplicate_arms`, as desired. This
results
is one less branch instruction in the final assembly.
This may help with both code size and further switch simplification. I
found
that this patch causes no significant impact to spec2006/int/ref and
spec2017/intrate/ref.
---------
Co-authored-by: Min Hsu <min at myhsu.dev>
Commit: b828608ca1313a0b80055840bd896c7eb6709366
https://github.com/llvm/llvm-project/commit/b828608ca1313a0b80055840bd896c7eb6709366
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add maintainer for NumericalStabilitySanitizer (NFC) (#115899)
@alexander-shaposhnikov is already listed as the nsan maintainer on the
compiler-rt side
(https://github.com/llvm/llvm-project/blob/a55248789ed3f653740e0723d016203b9d585f26/compiler-rt/CODE_OWNERS.TXT#L75-L77),
so I'd like to mirror this to the LLVM part of the sanitizer as well.
Commit: dad9e4a1657b74bc351c1e98ce4774f32fdc77fc
https://github.com/llvm/llvm-project/commit/dad9e4a1657b74bc351c1e98ce4774f32fdc77fc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/XCore/float-intrinsics.ll
Log Message:
-----------
[RuntimeLibCalls] Consistently disable unavailable libcalls (#116214)
The logic for marking runtime libcalls unavailable currently duplicates
essentially the same logic for some random subset of targets, where
someone reported an issue and then someone went and fixed the issue for
that specific target only. However, the availability for most of these
is completely target independent. In particular:
* MULO_I128 is never available in libgcc
* Various I128 libcalls are not available for 32-bit targets in libgcc
* powi is never available in MSVCRT
Unify the logic for these, so we don't miss any targets. This fixes
https://github.com/llvm/llvm-project/issues/16778 on AArch64, which is
one of the targets that was previously missed in this logic.
Commit: 0fb8fac5d6c10610574e6e472670823eaff0c949
https://github.com/llvm/llvm-project/commit/0fb8fac5d6c10610574e6e472670823eaff0c949
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
R llvm/test/CodeGen/RISCV/memset-pattern.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
R llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
R llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
Revert "[IR] Initial introduction of llvm.experimental.memset_pattern (#97583)"
This reverts commit 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3.
Recent scheduling changes means tests need to be re-generated. Reverting
to green while I do that.
Commit: a9d94834cd91fe93d8723ac4232fe7becdca61a7
https://github.com/llvm/llvm-project/commit/a9d94834cd91fe93d8723ac4232fe7becdca61a7
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
A llvm/test/tools/llvm-dlltool/arm64ec-invalid-name.test
A llvm/test/tools/llvm-lib/arm64ec-invalid-name.test
Log Message:
-----------
[llvm-lib][llvm-dlltool] Fix handling of invalid ARM64EC function names (#116250)
This is a follow-up to #115567. Emit an error for invalid function
names, similar to MSVC's `lib.exe` behavior.
Returning an error from `writeImportLibrary` exposed bugs in error
handling by its callers, which have been addressed in this patch.
Commit: e6cc58922f5f36e1eecdaf2f44a5ef7501acc139
https://github.com/llvm/llvm-project/commit/e6cc58922f5f36e1eecdaf2f44a5ef7501acc139
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LLD] Add ARM64EC release note (#116282)
Commit: 298127dcbe2ecd1f3c49c2109ac96654778f20be
https://github.com/llvm/llvm-project/commit/298127dcbe2ecd1f3c49c2109ac96654778f20be
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
A llvm/test/CodeGen/RISCV/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
A llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
Reapply [IR] Initial introduction of llvm.experimental.memset_pattern (#97583)
Relands 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3 after regenerating the
test case.
Supersedes the draft PR #94992, taking a different approach following
feedback:
* Lower in PreISelIntrinsicLowering
* Don't require that the number of bytes to set is a compile-time
constant
* Define llvm.memset_pattern rather than llvm.memset_pattern.inline
As discussed in the [RFC
thread](https://discourse.llvm.org/t/rfc-introducing-an-llvm-memset-pattern-inline-intrinsic/79496),
the intent is that the intrinsic will be lowered to loops, a sequence of
stores, or libcalls depending on the expected cost and availability of
libcalls on the target. Right now, there's just a single lowering path
that aims to handle all cases. My intent would be to follow up with
additional PRs that add additional optimisations when possible (e.g.
when libcalls are available, when arguments are known to be constant
etc).
Commit: 4d6a5fc702e568b0456c4d8f9e2307eb6d81e955
https://github.com/llvm/llvm-project/commit/4d6a5fc702e568b0456c4d8f9e2307eb6d81e955
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/DriverOptions.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
Log Message:
-----------
[Driver] Remove unused includes (NFC) (#116316)
Identified with misc-include-cleaner.
Commit: d73d5c8c9b56fadcbd89dd1dab71dca2c8f5e38d
https://github.com/llvm/llvm-project/commit/d73d5c8c9b56fadcbd89dd1dab71dca2c8f5e38d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
Log Message:
-----------
[MC] Remove unused includes (NFC) (#116317)
Identified with misc-include-cleaner.
Commit: 43570a2841e2a8f1efd00503beee751cc1e72513
https://github.com/llvm/llvm-project/commit/43570a2841e2a8f1efd00503beee751cc1e72513
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyNullifyDebugValueLists.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetObjectFile.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
Log Message:
-----------
[WebAssembly] Remove unused includes (NFC) (#116318)
Identified with misc-include-cleaner.
Commit: af3295bd3dccd91c102d6a9b0d30c30844967e02
https://github.com/llvm/llvm-project/commit/af3295bd3dccd91c102d6a9b0d30c30844967e02
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
Log Message:
-----------
[SLP]Enable splat ordering for loads
Enables splat support for loads with lanes> 2 or number of operands> 2.
Allows better detect splats of loads and reduces number of shuffles in
some cases.
X86, AVX512, -O3+LTO
Metric: size..text
results results0 diff
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 154867.00 156723.00 1.2%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12467735.00 12468023.00 0.0%
Better vectorization quality
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/115173
Commit: 1cab8d9adb7e039b73c87fd3b9a1186b76e198f5
https://github.com/llvm/llvm-project/commit/1cab8d9adb7e039b73c87fd3b9a1186b76e198f5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add maintainers for SandboxIR and SandboxVectorizer (#115896)
I'm currently looking through some recently added components, and
noticed that SandboxIR/SandboxVec don't have a listed maintainer. I'd
like to propose vporpo and slackito as the maintainers for this
component. vporpo is the one who originally proposed this and drives
most of the implementation effort. slackito is the second most active
contributor.
Commit: cdda76a8cfc3b0c5def836f68f6f58efba03e01c
https://github.com/llvm/llvm-project/commit/cdda76a8cfc3b0c5def836f68f6f58efba03e01c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/arm64ec-invalid-name.s
Log Message:
-----------
[LLD][COFF] Fix handling of invalid ARM64EC function names (#116252)
Since these symbols cannot be mangled or demangled, there is no symbol
to check for conflicts in `checkLazyECPair`, nor is there an alias to
create in `addUndefined`. Attempting to create an import library with
such symbols results in an error; the patch includes a test to ensure
the error is handled correctly.
This is a follow-up to #115567.
Commit: bc3b0fadd5120bd88ed6635583941f7763523c0a
https://github.com/llvm/llvm-project/commit/bc3b0fadd5120bd88ed6635583941f7763523c0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/AST/Type.h
Log Message:
-----------
[AST] Remove unnecessary include (NFC)
This was introduced in #115777, but isn't actually used.
Commit: f6e1d64458130643377511baeec430de67ddddfb
https://github.com/llvm/llvm-project/commit/f6e1d64458130643377511baeec430de67ddddfb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/segmented-stores.ll
Log Message:
-----------
[SLP]Enable interleaved stores support
Enables interaleaved stores, results in better estimation for segmented
stores for RISC-V
Reviewers: preames, topperc, RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/115354
Commit: 9513f2fdf2ad50f55726154a6b6a4aa463bc457f
https://github.com/llvm/llvm-project/commit/9513f2fdf2ad50f55726154a6b6a4aa463bc457f
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/test/ThinLTO/X86/memprof-aliased-location1.ll
M llvm/test/ThinLTO/X86/memprof-aliased-location2.ll
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/aliased-location1.ll
M llvm/test/Transforms/MemProfContextDisambiguation/aliased-location2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Verifier/memprof-metadata-bad.ll
Log Message:
-----------
[MemProf] Print full context hash when reporting hinted bytes (#114465)
Improve the information printed when -memprof-report-hinted-sizes is
enabled. Now print the full context hash computed from the original
profile, similar to what we do when reporting matching statistics. This
will make it easier to correlate with the profile.
Note that the full context hash must be computed at profile match time
and saved in the metadata and summary, because we may trim the context
during matching when it isn't needed for distinguishing hotness.
Similarly, due to the context trimming, we may have more than one full
context id and total size pair per MIB in the metadata and summary,
which now get a list of these pairs.
Remove the old aggregate size from the metadata and summary support.
One other change from the prior support is that we no longer write the
size information into the combined index for the LTO backends, which
don't use this information, which reduces unnecessary bloat in
distributed index files.
Commit: 3eb1bc5edfc69895bfdc0a8ddd31af3969e6aacc
https://github.com/llvm/llvm-project/commit/3eb1bc5edfc69895bfdc0a8ddd31af3969e6aacc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Clang] Change 'gpuintrin.h' to use target specific address spceas
Summary:
A recent patch allowed the target specific address spcaces to be handled
correctly. The one downside here is that we no long get semantic errors
for initializers, but that will error in the backend anyway.
Commit: 798a8941824dc2f83a169812e0edf7971d5f772b
https://github.com/llvm/llvm-project/commit/798a8941824dc2f83a169812e0edf7971d5f772b
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/test/MC/SystemZ/insn-bad-z13.s
M llvm/test/MC/SystemZ/insn-good-z13.s
M llvm/test/MC/SystemZ/insn-good.s
M llvm/test/MC/SystemZ/tokens.s
Log Message:
-----------
[SystemZ] Fix address operand parsing incompatibilities with GAS
The LLVM AsmParser showed different behavior compared to GAS when
parsing address operands in the following two ways:
- If the address operand only has a single register (no comma),
it is always interpreted as base register by GAS, even in the
vector-index case (vgef etc.) This means the following is
actually incorrect usage, as the base cannot be a vector
register: vgef %v0, 0(%v1), 0.
- GAS allows specifying a missing base register by using a
comma after the first register, e.g. vgef %v0, 0(%v1,), 0.
Commit: ff7fca7fa8646d73f884ab8a351e4178499c4d05
https://github.com/llvm/llvm-project/commit/ff7fca7fa8646d73f884ab8a351e4178499c4d05
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Lower/StatementContext.h
M flang/lib/Lower/Bridge.cpp
A flang/test/Lower/CUDA/cuda-return01.cuf
A flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Support memory cleanup at a return statement (#116304)
We generate `cuf.free` and `func.return` twice if a return statement
exists at the end of program.
```f90
program test
integer, device :: a(10)
return
end
```
```
% flang -x cuda test.cuf -mmlir --mlir-print-ir-after-all
error: loc("/path/to/test.cuf":3:3): 'func.return' op must be the last operation in the parent block
// -----// IR Dump After Fortran::lower::VerifierPass Failed () //----- //
```
Dumped IR:
```mlir
"func.func"() <{function_type = () -> (), sym_name = "_QQmain"}> ({
...
"cuf.free"(%5#1) <{data_attr = #cuf.cuda<device>}> : (!fir.ref<!fir.array<10xi32>>) -> ()
"func.return"() : () -> ()
"cuf.free"(%5#1) <{data_attr = #cuf.cuda<device>}> : (!fir.ref<!fir.array<10xi32>>) -> ()
"func.return"() : () -> ()
}
...
```
The routine `genExitRoutine` in `Bridge.cpp` is guarded by
`blockIsUnterminated()` to make sure that `func.return` is generated
only at the end of a block. However, we redundantly run
`bridge.fctCtx().finalizeAndKeep()` before `genExitRoutine` in this
case, resulting in two pairs of `cuf.free` and `func.return`. This PR
fixes `Bridge.cpp` by using `blockIsUnterminated()` to guard
`finalizeAndKeep` as well.
Commit: 0b344b4feff5cd04d63db7b914d783fd941fbda0
https://github.com/llvm/llvm-project/commit/0b344b4feff5cd04d63db7b914d783fd941fbda0
Author: higher-performance <higher.performance.github at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
Log Message:
-----------
Extend bugprone-use-after-move check to handle std::optional::reset() and std::any::reset() (#114255)
These need to be handled similarly to the standard smart pointers; they
all have a `reset` method.
Commit: 31ee667eb02c68ad186cb129f9dcb72a9d2222bc
https://github.com/llvm/llvm-project/commit/31ee667eb02c68ad186cb129f9dcb72a9d2222bc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
Log Message:
-----------
[Clang] Fix gpuintrin_lang test for OpenCL
Commit: f37bc8cfbfd47c89aedd43b68fd09b4525612f16
https://github.com/llvm/llvm-project/commit/f37bc8cfbfd47c89aedd43b68fd09b4525612f16
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/debugloc-load-select.ll
Log Message:
-----------
[DebugInfo][GVN] Propagate DebugLoc from load-of-select to select (#114233)
When replacing a load from a selected pointer with a select of the known
stored values, we currently assign no DebugLoc to the select; this patch
propagates the load's DebugLoc to the new select, since it is a direct
replacement.
Commit: fd5fcfb1e620823e4ec896fb8e0520c1e7286cdb
https://github.com/llvm/llvm-project/commit/fd5fcfb1e620823e4ec896fb8e0520c1e7286cdb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang] Add 'gpuintrin.h' to the release notes (#116410)
Commit: e67e09a77ea1e4802c0f6bc0409c9f5e9d1fae9a
https://github.com/llvm/llvm-project/commit/e67e09a77ea1e4802c0f6bc0409c9f5e9d1fae9a
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
M flang/test/Lower/OpenMP/Todo/reduction-modifiers.f90
A flang/test/Parser/OpenMP/scan.f90
M flang/test/Semantics/OpenMP/do05.f90
M flang/test/Semantics/OpenMP/nested-barrier.f90
M flang/test/Semantics/OpenMP/nested-master.f90
M flang/test/Semantics/OpenMP/nested-simd.f90
M flang/test/Semantics/OpenMP/ordered-simd.f90
M flang/test/Semantics/OpenMP/reduction-modifiers.f90
A flang/test/Semantics/OpenMP/scan1.f90
A flang/test/Semantics/OpenMP/scan2.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (#102792)
Commit: 92cc8051932c0e3dd3b20cb30af86621e8527f5d
https://github.com/llvm/llvm-project/commit/92cc8051932c0e3dd3b20cb30af86621e8527f5d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
Log Message:
-----------
[IR] Add ICmpInst::isCommutative and FCmpInst::isCommutative static wrappers (#116398)
Add static variants that can used with the Predicate enum directly.
Commit: 2188a56a752a886c43203d54b1079686b64ff49c
https://github.com/llvm/llvm-project/commit/2188a56a752a886c43203d54b1079686b64ff49c
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/dbgloc-merge-invoke.ll
Log Message:
-----------
[DebugInfo][SimplifyCFG] Fully propagate merged invoke DILocations (#114235)
Currently when we merge invokes as part of SimplifyCFG we apply a merge
of the invoke DILocations to the merged invoke. We also insert an
unconditional branch to the merged invoke at the positions previously
occupied by the original invokes; as this branch is part of the
substitution for the invoke it has replaced, we should propagate the
original invoke DebugLoc to it.
Commit: 2d48489cc35ec9bb1c15ff115595e62d67ca8989
https://github.com/llvm/llvm-project/commit/2d48489cc35ec9bb1c15ff115595e62d67ca8989
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/darwin-subframeworks.c
M llvm/lib/TextAPI/Utils.cpp
M llvm/test/tools/llvm-readtapi/stubify-delete.test
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (#115048)
* Have clang always append & pass System/Library/SubFrameworks when determining default sdk search paths.
* Teach clang-installapi to traverse there for framework input.
* Teach llvm-readtapi that the library files (TBD or binary) in there should be considered private.
resolves: rdar://137457006
Commit: e9e8f59dd4f88229b731a0b5951db176a03bd8c4
https://github.com/llvm/llvm-project/commit/e9e8f59dd4f88229b731a0b5951db176a03bd8c4
Author: Eric Astor <epastor at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/SemaCXX/attr-annotate-ast.cpp
Log Message:
-----------
[clang] Instantiate attributes on LabelDecls (#115924)
Start propagating attributes on (e.g.) labels inside of templated
functions to their instances.
Commit: 032014ef103157bfd8403418538e25f3f58efa9d
https://github.com/llvm/llvm-project/commit/032014ef103157bfd8403418538e25f3f58efa9d
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/test/CodeGen/PowerPC/const-nonsplat-array-init.ll
M llvm/test/CodeGen/PowerPC/const-splat-array-init.ll
M llvm/test/CodeGen/PowerPC/extract-and-store.ll
M llvm/test/CodeGen/PowerPC/f128-fma.ll
M llvm/test/CodeGen/PowerPC/f128-passByValue.ll
M llvm/test/CodeGen/PowerPC/merge_stores_dereferenceable.ll
M llvm/test/CodeGen/PowerPC/pr45301.ll
M llvm/test/CodeGen/PowerPC/pr47891.ll
M llvm/test/CodeGen/PowerPC/pr59074.ll
M llvm/test/CodeGen/PowerPC/swaps-le-1.ll
M llvm/test/CodeGen/PowerPC/vec-itofp.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
Log Message:
-----------
[PowerPC] Add `SDNPMemOperand` to some nodes (#115580)
Nodes created with `getMemIntrinsicNode` have memory operands. In order
for operands to be propagated to machine instructions, the nodes should
have `SDNPMemOperand` property.
Similar to 3c8c385a.
Commit: d82422f69c573d051cf08d6d267b619197aab363
https://github.com/llvm/llvm-project/commit/d82422f69c573d051cf08d6d267b619197aab363
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Remove errorOrWarn
Commit: f2e42d9324f488ef113b8d2157f52ef1699b95f9
https://github.com/llvm/llvm-project/commit/f2e42d9324f488ef113b8d2157f52ef1699b95f9
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/test/Dialect/Arith/int-range-interface.mlir
Log Message:
-----------
[mlir][IntRangeInference] Handle ceildivsi(INT_MIN, x > 1) as expected (#116284)
Fixes #115293
While the definition of ceildivsi is integer division, rounding up, most
implementations will use `-(-a / b)` for dividing `a ceildiv b` with `a`
negative and `b` positive.
Mathematically, and for most integers, these two definitions are
equivalent. However, with `a == INT_MIN`, the initial negation is a
noop, which means that, while divinding and rounding up would give a
negative result, `-((- INT_MIN) / b)` is `-(INT_MIN / b)`, which is
positive.
This commit adds a special case to ceilDivSI inference to handle this
case and bring it in line with the operational instead of the
mathematical semantics of ceiling division.
Commit: 3130691a6053f90e1bac8026645b7bf95d6279cc
https://github.com/llvm/llvm-project/commit/3130691a6053f90e1bac8026645b7bf95d6279cc
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[C23] Move WG14 N2754 to the TS 18661 section
This paper is about the quantum exponent of NAN, which only applies if
we support decimal floating-point types from the TS. That is why the
status changed from Unknown to No.
Commit: 0398cb4592aa72cae5828ccdc56a60568d404db0
https://github.com/llvm/llvm-project/commit/0398cb4592aa72cae5828ccdc56a60568d404db0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP][OpenACC] Use iterator_range in check-directive-struct… (#115872)
…ure, NFC
The OpenMP code is already using iterator_range, lift it to the shared
header file.
Commit: ef92aba52a58cda8d670de8ce936455949746468
https://github.com/llvm/llvm-project/commit/ef92aba52a58cda8d670de8ce936455949746468
Author: lialan <me at alanli.org>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
Log Message:
-----------
[MLIR] Fix VectorEmulateNarrowType constant op mask bug (#116064)
This commit adds support for handling mask constants generated by the
`arith.constant` op in the `VectorEmulateNarrowType` pattern.
Previously, this pattern would not match due to the lack of mask
constant handling in `getCompressedMaskOp`.
The changes include:
1. Updating `getCompressedMaskOp` to recognize and handle
`arith.constant` ops as mask value sources.
2. Handling cases where the mask is not aligned with the emulated load
width. The compressed mask is adjusted to account for the offset.
Limitations:
- The arith.constant op can only have 1-dimensional constant values.
Resolves: #115742
Signed-off-by: Alan Li <me at alanli.org>
Commit: 098b0d18add97dea94e16006486b2fded65e228d
https://github.com/llvm/llvm-project/commit/098b0d18add97dea94e16006486b2fded65e228d
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[LLD][AArch64] Detach Landing Pad creation from Thunk creation (#116402)
Move Landing Pad Creation to a new function that checks each thunk every
pass to see if it needs a landing pad. This permits a thunk to be
created without needing a landing pad, but later needing one due to
drifting out of direct branch range and requiring an indirect branch.
We record all the Thunks created so far in a new vector rather than
trying to iterate over the DenseMap as we need a deterministic order of
adding LandingPadThunks due to the short branch fall through. We cannot
use normalizeExistingThunk() either as that only iterates through live
thunks.
Fixes: https://crbug.com/377438309
Original PR: https://github.com/llvm/llvm-project/pull/108989
Sending without a new test case to fix existing test. A new regression
test will come in a separate PR as coming up with a small enough
reproducer for this case is non-trivial.
Commit: bd9145c8c21334e099d51b3e66f49d51d24931ee
https://github.com/llvm/llvm-project/commit/bd9145c8c21334e099d51b3e66f49d51d24931ee
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
A llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
A llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
Log Message:
-----------
Reapply [AMDGPU] Avoid resource propagation for recursion through multiple functions (#112251)
I was wrong last patch. I viewed the `Visited` set purely as a possible
recursion deterrent where functions calling a callee multiple times are
handled elsewhere. This doesn't consider cases where a function is
called multiple times by different callers still part of the same call
graph. New test shows the aforementioned case.
Reapplies #111004, fixes #115562.
Commit: 47a0e24a3b6328d18b960fe6de200b309b6a3142
https://github.com/llvm/llvm-project/commit/47a0e24a3b6328d18b960fe6de200b309b6a3142
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[GISel][RISCV] Add G_SMIN/SMAX/UMIN/UMAX to GISelKnownBits::computeNumSignBits. (#116321)
Commit: 1e492285f33ca7c7efa97671990d47a32eaf31f7
https://github.com/llvm/llvm-project/commit/1e492285f33ca7c7efa97671990d47a32eaf31f7
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Include runtimes for armv8.1m.main-none-eabi (#116420)
These are needed by some of our users.
Commit: 9a5e5e28eca97ca06adc0cc60273dcf6cd61e32f
https://github.com/llvm/llvm-project/commit/9a5e5e28eca97ca06adc0cc60273dcf6cd61e32f
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
Log Message:
-----------
[AMDGPU] Newly added test modified for recent SGPR use change (#116427)
Mistimed rebase for #112251 which added new tests which did not consider
the changes introduced in #112403 yet
Commit: 92f3f2710641003a7bc558e6d766ea6be6c099b9
https://github.com/llvm/llvm-project/commit/92f3f2710641003a7bc558e6d766ea6be6c099b9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/add.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/implicit-def.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/load.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/splatvector-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sub.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vmclr-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vmclr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/zext.mir
Log Message:
-----------
[RISCV][GISel] Remove -disable-gisel-legality-check from most RVV tests. NFC
Commit: 94eebf721a2f8630412730f51d5071816a686ea0
https://github.com/llvm/llvm-project/commit/94eebf721a2f8630412730f51d5071816a686ea0
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
A llvm/test/Transforms/InstSimplify/select-equivalence-fp.ll
Log Message:
-----------
InstSimplify: support floating-point equivalences (#115152)
Since cd16b07 (IR: introduce CmpInst::isEquivalence), there is now an
isEquivalence routine in CmpInst that we can use to determine
equivalence in simplifySelectWithICmpEq. Implement this, extending the
code from integer-equalities to integer and floating-point equivalences.
Commit: 3734e4c0c4966f794b9588445448004fee769ab9
https://github.com/llvm/llvm-project/commit/3734e4c0c4966f794b9588445448004fee769ab9
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp
M llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
Log Message:
-----------
[MergedLoadStore] Preserve common metadata when sinking stores. (#116382)
When sinking a store, preserve common metadata present on stores on both
sides of the diamond.
PR: https://github.com/llvm/llvm-project/pull/116382
Commit: ec353b7418e272e96cd63cc61bec586ab49da92f
https://github.com/llvm/llvm-project/commit/ec353b7418e272e96cd63cc61bec586ab49da92f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[memprof] Use llvm::function_ref instead of std::function (#116306)
We've seen bugs where we lost track of error states stored in the
functor because we passed the functor by value (that is,
std::function) as opposed to reference (llvm::function_ref).
This patch fixes a couple of places we pass functors by value.
While we are at it, this patch adds curly braces around a "for" loop
spanning multiple lines.
Commit: 9204eba9121546c0e9c16d8a75d5735bad9dee16
https://github.com/llvm/llvm-project/commit/9204eba9121546c0e9c16d8a75d5735bad9dee16
Author: Ognyan Mirev <12432824+OgnianM at users.noreply.github.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/cuda_wrappers/new
Log Message:
-----------
Remove device override for operator new when the C++ standard >= 26 (#114056)
Related to https://github.com/llvm/llvm-project/issues/114048
Commit: 34ebfabc34476b73a3d65d3bd046c35ffab411c4
https://github.com/llvm/llvm-project/commit/34ebfabc34476b73a3d65d3bd046c35ffab411c4
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-alignment.c
Log Message:
-----------
[llvm][ARM] Restore the default to -mstrict-align on Apple firmwares (#115546)
This is a partial revert of e314622f204a01ffeda59cbe046dd403b01f8b74
rdar://139237593
Commit: 4b50ec43d03d9ba9b43edd9a4743951f6498b964
https://github.com/llvm/llvm-project/commit/4b50ec43d03d9ba9b43edd9a4743951f6498b964
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
Log Message:
-----------
[Clang] Avoid Using `byval` for `ndrange_t` when emitting `__enqueue_kernel_basic` (#116435)
AMDGPU disabled the use of `byval` for struct argument passing in commit
d77c620. However, when emitting `__enqueue_kernel_basic`, Clang still
adds the
`byval` attribute by default. Emitting the `byval` attribute by default
in this
context doesn’t seem like a good idea, as argument-passing conventions
are
highly target-dependent, and assumptions here could lead to issues. This
PR
removes the addition of the `byval` attribute, aligning the behavior
with other
`__enqueue_kernel_*` functions.
Commit: e8469f157725ffb8f0b707b7219e342ecc3429a8
https://github.com/llvm/llvm-project/commit/e8469f157725ffb8f0b707b7219e342ecc3429a8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Add support for character type in cuf.alloc and cuf.data_transfer (#116277)
Add support for character type in bytes computation
Commit: 012fad975ecf8649a24c75410b84758ff56c38f9
https://github.com/llvm/llvm-project/commit/012fad975ecf8649a24c75410b84758ff56c38f9
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize the box in memory when dst is emboxed (#116320)
Similar to #116289 but for the dst.
Commit: 3be3b33e570fbdf3be37952c0ed4ecd47f304948
https://github.com/llvm/llvm-project/commit/3be3b33e570fbdf3be37952c0ed4ecd47f304948
Author: vporpo <vporpodas at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Implement pack of scalars (#115549)
This patch implements packing of scalar operands when the vectorizer
decides to stop vectorizing. Packing is implemented with a sequence of
InsertElement instructions.
Packing vectors requires different instructions so it's implemented in a
follow-up patch.
Commit: 816c975ea7b27a784c8f0d6a9b92571ebc97d4a3
https://github.com/llvm/llvm-project/commit/816c975ea7b27a784c8f0d6a9b92571ebc97d4a3
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalMergeFunctions.h
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
A llvm/test/CodeGen/Generic/cgdata-merge-crash.ll
Log Message:
-----------
Fix crash from [CGData] Global Merge Functions (#112671) (#116241)
Module summary index is optional for this pass, and we shouldn't run it,
but import it as necessary.
Commit: 64c455077abe583f96fc19398712da9c1187ad61
https://github.com/llvm/llvm-project/commit/64c455077abe583f96fc19398712da9c1187ad61
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/docs/AddressSanitizer.rst
M clang/docs/LeakSanitizer.rst
Log Message:
-----------
[docs][asan][lsan] Drop list of supported architechures (#116302)
Full list is quite long, and quality of implementation can
vary.
Drop the lists to avoid confusion like
https://github.com/rust-lang/rust/pull/123617#issuecomment-2471695102
We don't maintain these for other sanitizers.
Commit: b1fa9d154b3765cab951162f5e4777a824bc9fa7
https://github.com/llvm/llvm-project/commit/b1fa9d154b3765cab951162f5e4777a824bc9fa7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Correctly embox logical constant (#116445)
Commit: 57ed628fb397c6427f820fb217c8a58e67f8e10a
https://github.com/llvm/llvm-project/commit/57ed628fb397c6427f820fb217c8a58e67f8e10a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[memprof] Speed up caller-callee pair extraction (Part 2) (#116441)
This patch further speeds up the extraction of caller-callee pairs
from the profile.
Recall that we reconstruct a call stack by traversing the radix tree
from one of its leaf nodes toward a root. The implication is that
when we decode many different call stacks, we end up visiting nodes
near the root(s) repeatedly. That in turn adds many duplicates to our
data structure:
DenseMap<uint64_t, SmallVector<CallEdgeTy, 0>> Calls;
only to be deduplicated later with sort+unique for each vector.
This patch makes the extraction process more efficient by keeping
track of indices of the radix tree array we've visited so far and
terminating traversal as soon as we encounter an element previously
visited.
Note that even with this improvement, we still add at least one
caller-callee pair to the data structure above for each call stack
because we do need to add a caller-callee pair for the leaf node with
the callee GUID being 0.
Without this patch, it takes 4 seconds to extract caller-callee pairs
from a large MemProf profile. This patch shortenes that down to
900ms.
Commit: 0d38f64e7df94b062dde89627de28125f292b6bb
https://github.com/llvm/llvm-project/commit/0d38f64e7df94b062dde89627de28125f292b6bb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Remove MemProf format Version 0 (#116442)
This patch removes MemProf format Version 0 now that version 2 and 3
seem to be working well.
I'm not touching version 1 for now because some tests still rely on
version 1.
Note that Version 0 is identical to Version 1 except that the MemProf
section of the indexed format has a MemProf version field.
Commit: 1be98277547d3a9b9966f055c8e4939390ac4697
https://github.com/llvm/llvm-project/commit/1be98277547d3a9b9966f055c8e4939390ac4697
Author: vporpo <vporpodas at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Implement packing of vectors (#116447)
Up until now we could only support packing of scalar elements. This
patch fixes this by implementing packing of vector elements, by
generating extractelement and insertelement instruction pairs.
Commit: 131d73ed3483f2ad43a2c7c0834522c0150936bb
https://github.com/llvm/llvm-project/commit/131d73ed3483f2ad43a2c7c0834522c0150936bb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
Log Message:
-----------
[RegAlloc] Remove redundant prints of LiveInterval weight. (#116451)
LiveInterval::print has included the weight since early 2018. We don't
need to print again after we print the interval.
Commit: 6a0905d11ede27f2ac52338dc9d4bcd5c6e8a2f5
https://github.com/llvm/llvm-project/commit/6a0905d11ede27f2ac52338dc9d4bcd5c6e8a2f5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Add isel patterns for i16 load/store (#116293)
In order to support f16 load/store we need to make load/stores with s16
register type legal. If regbank selection doesn't pick the FPR bank,
we'll be left with a GPR load or store which we don't have isel patterns
for from SelectionDAG.
In order to add the patterns we need to make i16 a legal type for the
GPR register class.
Tests are currently disabling the legality check because I haven't
update the legalizer yet.
Commit: ab27253ad395881c0798ac5c8efc2f6fc2922399
https://github.com/llvm/llvm-project/commit/ab27253ad395881c0798ac5c8efc2f6fc2922399
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/MachO/Driver.cpp
M lld/MachO/InputSection.h
A lld/test/MachO/cgdata-generate-merge.s
Log Message:
-----------
[CGData][lld-macho] Merge CG Data by LLD (#112674)
LLD now processes raw CG data for stable functions, similar to how it
handles raw CG data for the outliner's hash tree. This data is encoded
in the custom section (`__llvm_merge`) within object files. LLD merges
this information into the indexed CG data file specified by the
`-codegen-data-generate-path={path}` option. For the linker that does
not support this feature, we could use `llvm-cgdata` tool --
https://github.com/llvm/llvm-project/blob/main/llvm/docs/CommandGuide/llvm-cgdata.rst.
Depends on #115750.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: 43cb424a54c9452b60d96ef07d0699fc3b1ceb87
https://github.com/llvm/llvm-project/commit/43cb424a54c9452b60d96ef07d0699fc3b1ceb87
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Specialize entry point for scalar to desc data transfer (#116457)
The runtime Assign function is not meant to initialize an array from a
scalar. For that we need to use DoAssignFromSource. Update the data
transfer from scalar to descriptor to use a new entry point that use
this function underneath.
Commit: 70b9440c888b93217172f4eb425ff8b59b00ea24
https://github.com/llvm/llvm-project/commit/70b9440c888b93217172f4eb425ff8b59b00ea24
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
Revert "[flang][cuda] Specialize entry point for scalar to desc data transfer" (#116458)
Reverts llvm/llvm-project#116457
Commit: 309c890921b8d2f33e32aac4890317b887189a1f
https://github.com/llvm/llvm-project/commit/309c890921b8d2f33e32aac4890317b887189a1f
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[llvm] `APFloat`: Add helpers to query NaN/inf semantics (#116315)
`APFloat` changes extracted from #116176 as per reviewer comments.
Commit: 42be165dde50c29e1d104f38938c03c95b4471cf
https://github.com/llvm/llvm-project/commit/42be165dde50c29e1d104f38938c03c95b4471cf
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Runtime/freestanding-tools.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
Reland '[flang][cuda] Specialize entry point for scalar to desc data transfer'
Commit: ec0a27f6589c5407e98efd9ffcc5edd17c63a108
https://github.com/llvm/llvm-project/commit/ec0a27f6589c5407e98efd9ffcc5edd17c63a108
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/docs/doxygen.cfg.in
M clang/docs/tools/dump_ast_matchers.py
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M clang/unittests/ASTMatchers/CMakeLists.txt
R clang/utils/generate_ast_matcher_doc_tests.py
Log Message:
-----------
Revert "Reland: [clang][test] add testing for the AST matcher reference" (#116477)
Reverts llvm/llvm-project#112168
Commit: 2906fcadb8563a02949f852867cebc63e0539cb7
https://github.com/llvm/llvm-project/commit/2906fcadb8563a02949f852867cebc63e0539cb7
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelperArtifacts.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
Log Message:
-----------
[GlobalISel] Combine G_MERGE_VALUES of x and zero (#116283)
into zext x
LegalizerHelper has two padding strategies: undef or zero.
see LegalizerHelper:273
see LegalizerHelper:315
This PR is about zero sugar and Coke Zero.
; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES %a(s32),
[[C]](s32)
Please continue padding merge values.
// %bits_8_15:(s8) = G_CONSTANT i8 0
// %0:(s16) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8)
%bits_8_15 is defined by zero. For optimization, we pick zext.
// %0:_(s16) = G_ZEXT %bits_0_7:(s8)
The upper bits of %0 are zero and the lower bits come from %bits_0_7.
Commit: db115ba3efee9c940539667842a1092d8d956850
https://github.com/llvm/llvm-project/commit/db115ba3efee9c940539667842a1092d8d956850
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/rank-reduce-contraction-ops.mlir
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
Log Message:
-----------
[mlir][Linalg] Fix non-matmul linalg structured ops (#116412)
https://github.com/llvm/llvm-project/commit/3ad0148020ca91cc288bffd8ad36e25f7555a3bb
broke linalg structured ops other than MatmulOp.
The patch:
- Changes the printer to hide additional attributes, which weren't
hidden before: "indexing_maps".
- Changes the build of every linalg structured op to have an indexing
map for matmul.
These changes combined, hide the problem until you print the operation
in it's generic form.
Reproducer:
```mlir
func.func public @bug(%arg0 : tensor<5x10x20xf32>, %arg1 : tensor<5x20x40xf32>, %arg3 : tensor<5x10x40xf32>) -> tensor<5x10x40xf32> {
%out = linalg.batch_matmul ins(%arg0, %arg1 : tensor<5x10x20xf32>, tensor<5x20x40xf32>)
outs(%arg3 : tensor<5x10x40xf32>) -> tensor<5x10x40xf32>
func.return %out : tensor<5x10x40xf32>
}
```
Prints fine, with `mlir-opt <file>`, but if you do `mlir-opt
--mlir-print-op-generic <file>`:
```
#map = affine_map<(d0, d1, d2) -> (d0, d2)>
#map1 = affine_map<(d0, d1, d2) -> (d2, d1)>
#map2 = affine_map<(d0, d1, d2) -> (d0, d1)>
#map3 = affine_map<(d0, d1, d2, d3) -> (d0, d1, d3)>
#map4 = affine_map<(d0, d1, d2, d3) -> (d0, d3, d2)>
#map5 = affine_map<(d0, d1, d2, d3) -> (d0, d1, d2)>
"builtin.module"() ({
"func.func"() <{function_type = (tensor<5x10x20xf32>, tensor<5x20x40xf32>, tensor<5x10x40xf32>) -> tensor<5x10x40xf32>, sym_name = "bug", sym_visibility = "public"}> ({
^bb0(%arg0: tensor<5x10x20xf32>, %arg1: tensor<5x20x40xf32>, %arg2: tensor<5x10x40xf32>):
%0 = "linalg.batch_matmul"(%arg0, %arg1, %arg2) <{operandSegmentSizes = array<i32: 2, 1>}> ({
^bb0(%arg3: f32, %arg4: f32, %arg5: f32):
%1 = "arith.mulf"(%arg3, %arg4) <{fastmath = #arith.fastmath<none>}> : (f32, f32) -> f32
%2 = "arith.addf"(%arg5, %1) <{fastmath = #arith.fastmath<none>}> : (f32, f32) -> f32
"linalg.yield"(%2) : (f32) -> ()
}) {indexing_maps = [#map, #map1, #map2], linalg.memoized_indexing_maps = [#map3, #map4, #map5]} : (tensor<5x10x20xf32>, tensor<5x20x40xf32>, tensor<5x10x40xf32>) -> tensor<5x10x40xf32>
"func.return"(%0) : (tensor<5x10x40xf32>) -> ()
}) : () -> ()
}) : () -> ()
```
The batch_matmul operation's builder now always inserts a indexing_map
which is unrelated to the operation itself. This was caught when a
transformation from one LinalgStructuredOp to another, tried to pass
it's attributes to the other ops builder and there were multiple
indexing_map attributes in the result.
This patch fixes this by specializing the builders for MatmulOp with
indexing map information.
Commit: dc3156d8e6dc6494bc47ba074d0c990eb27b7564
https://github.com/llvm/llvm-project/commit/dc3156d8e6dc6494bc47ba074d0c990eb27b7564
Author: Martin Storsjö <martin at martin.st>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M openmp/runtime/cmake/LibompDefinitions.cmake
Log Message:
-----------
[OpenMP] Don't hardcode _WIN32_WINNT for MinGW targets (#115708)
Instead respect what the toolchain default is (or what the user sets via
CMAKE_CXX_FLAGS).
This fixes builds with libcxx, with mingw toolchains targeting
msvcrt.dll, after 5d8be4c036aa5ce4a94f1f37a9155d5c877e23db; after that
commit, the libcxx public headers reference symbols such as iswspace_l,
which are unavailable when targeting msvcrt.dll on older versions of
Windows (it's only available in msvcrt.dll since Windows Vista).
Commit: 89cb0eefcbb6303ba6813238d5ad37b103495d11
https://github.com/llvm/llvm-project/commit/89cb0eefcbb6303ba6813238d5ad37b103495d11
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
Log Message:
-----------
[AMDGPU] Move GCNPreRAOptimizations after MachineScheduler (#116211)
This is in preparation for adding a new optimization to the pass that
cares about the order of instructions. The existing optimization does
not care, so this just causes minor codegen differences.
Commit: b69f646c46de14279c35c3733e049f1e78e92983
https://github.com/llvm/llvm-project/commit/b69f646c46de14279c35c3733e049f1e78e92983
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
Log Message:
-----------
[AArch64] Remove unused SDNodes (NFC) (#116236)
The corresponding enum members were only used by `EmitMOPS`, which
immediately translated them to machine opcodes. Just pass the machine
opcodes instead.
Commit: f97f96492dd08cdcb4b83775f764f09a396ed610
https://github.com/llvm/llvm-project/commit/f97f96492dd08cdcb4b83775f764f09a396ed610
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll
Log Message:
-----------
[GlobalISel][ARM] Legalize reset_fpmode (#115859)
Implement lowering intrinsic `reset_fpmode` in Global Selector for ARM
target.
Commit: 100376a2fa07f59f11cc4a02c216aaef65d59294
https://github.com/llvm/llvm-project/commit/100376a2fa07f59f11cc4a02c216aaef65d59294
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/phi.ll
Log Message:
-----------
[AArch64] Add a test for phis of different types. NFC
Commit: 0fd6f684b9c84c32d6cbfd9742402e788b2879f1
https://github.com/llvm/llvm-project/commit/0fd6f684b9c84c32d6cbfd9742402e788b2879f1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libc++] Adjust workflow file for building the libc++ docker image (#116366)
Commit: 372344995568cae076477a8b0e98fcdec7c49379
https://github.com/llvm/llvm-project/commit/372344995568cae076477a8b0e98fcdec7c49379
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M offload/test/offloading/fortran/basic-target-region-1D-array-section.f90
M offload/test/offloading/fortran/basic-target-region-3D-array-section.f90
M offload/test/offloading/fortran/basic-target-region-3D-array.f90
M offload/test/offloading/fortran/constant-arr-index.f90
M offload/test/offloading/fortran/declare-target-vars-in-target-region.f90
M offload/test/offloading/fortran/double-target-call-with-declare-target.f90
M offload/test/offloading/fortran/dtype-array-constant-index-map.f90
A offload/test/offloading/fortran/dtype-member-map-syntax-1.f90
A offload/test/offloading/fortran/dtype-member-map-syntax-2.f90
M offload/test/offloading/fortran/dump_map_tables.f90
M offload/test/offloading/fortran/local-descriptor-map-regress.f90
M offload/test/offloading/fortran/target-depend.f90
M offload/test/offloading/fortran/target-map-all-common-block-members.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-alloca-array-of-dtype.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-alloca-array.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-and-alloca-array-v2.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-and-alloca-array.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-array-and-scalar.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-array-of-dtype.f90
M offload/test/offloading/fortran/target-map-allocatable-array-section-1d-bounds.f90
M offload/test/offloading/fortran/target-map-allocatable-array-section-3d-bounds.f90
A offload/test/offloading/fortran/target-map-allocatable-dtype.f90
M offload/test/offloading/fortran/target-map-allocatable-map-scopes.f90
M offload/test/offloading/fortran/target-map-common-block.f90
M offload/test/offloading/fortran/target-map-declare-target-link-common-block.f90
M offload/test/offloading/fortran/target-map-derived-type-full-1.f90
M offload/test/offloading/fortran/target-map-derived-type-full-2.f90
M offload/test/offloading/fortran/target-map-derived-type-full-implicit-1.f90
M offload/test/offloading/fortran/target-map-derived-type-full-implicit-2.f90
M offload/test/offloading/fortran/target-map-double-large-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-array-bounds.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-double-array-bounds.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-single-member.f90
A offload/test/offloading/fortran/target-map-dtype-3d-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-and-non-alloca-array.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-and-non-alloca-dtype.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-of-dtype.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-dtype-allocatable-array.f90
A offload/test/offloading/fortran/target-map-dtype-allocatable-scalar-and-array.f90
M offload/test/offloading/fortran/target-map-dtype-arr-bounds-member-enter-exit-update.f90
M offload/test/offloading/fortran/target-map-dtype-arr-bounds-member-enter-exit.f90
M offload/test/offloading/fortran/target-map-dtype-explicit-individual-array-member.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-3D-member-bounds.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-member-bounds.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-member.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-member.f90
M offload/test/offloading/fortran/target-map-enter-exit-allocatables.f90
M offload/test/offloading/fortran/target-map-enter-exit-array-2.f90
M offload/test/offloading/fortran/target-map-enter-exit-array-bounds.f90
M offload/test/offloading/fortran/target-map-enter-exit-array.f90
M offload/test/offloading/fortran/target-map-enter-exit-scalar.f90
M offload/test/offloading/fortran/target-map-first-common-block-member.f90
M offload/test/offloading/fortran/target-map-individual-dtype-member-map.f90
M offload/test/offloading/fortran/target-map-large-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-mix-imp-exp-common-block-members.f90
A offload/test/offloading/fortran/target-map-multi-alloca-dtypes-with-multi-alloca-members.f90
A offload/test/offloading/fortran/target-map-multi-alloca-dtypes-with-multi-mixed-members.f90
A offload/test/offloading/fortran/target-map-nested-alloca-dtype-3d-alloca-array-bounds.f90
A offload/test/offloading/fortran/target-map-nested-alloca-dtype-alloca-array-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-3d-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-and-non-alloca-array.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array-and-non-alloca-dtype.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array.f90
M offload/test/offloading/fortran/target-map-nested-dtype-complex-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-derived-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-single-member.f90
M offload/test/offloading/fortran/target-map-pointer-scopes-enter-exit.f90
M offload/test/offloading/fortran/target-map-pointer-target-array-section-3d-bounds.f90
M offload/test/offloading/fortran/target-map-pointer-target-scopes.f90
A offload/test/offloading/fortran/target-map-pointer-to-dtype-allocatable-member.f90
M offload/test/offloading/fortran/target-map-second-common-block-member.f90
M offload/test/offloading/fortran/target-map-two-dtype-explicit-member.f90
M offload/test/offloading/fortran/target-map-two-dtype-individual-member-array-1D-bounds.f90
M offload/test/offloading/fortran/target-map-two-dtype-mixed-implicit-explicit-capture-1.f90
M offload/test/offloading/fortran/target-map-two-dtype-mixed-implicit-explicit-capture-2.f90
M offload/test/offloading/fortran/target-map-two-dtype-multi-member-array-1D-bounds.f90
M offload/test/offloading/fortran/target-map-two-nested-dtype-member-array-map.f90
M offload/test/offloading/fortran/target-nested-target-data.f90
M offload/test/offloading/fortran/target-region-implicit-array.f90
Log Message:
-----------
[OpenMP] Allocatable explicit member mapping fortran offloading tests (#113555)
This PR is one in a series of 3 that aim to add support for explicit
member mapping of allocatable components in derived types within
OpenMP+Fortran for Flang.
This PR provides all of the runtime tests that are currently
upstreamable, unfortunately some of the other tests would require
linking of the fortran runtime for offload which we currently do not do.
But regardless, this is plenty to ensure that the mapping is working in
most cases.
Commit: b5db75bfce0feac70f95a8e10d4ceba068d07bd3
https://github.com/llvm/llvm-project/commit/b5db75bfce0feac70f95a8e10d4ceba068d07bd3
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
R mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
A mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
A mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
Log Message:
-----------
[OpenMP][MLIR] Descriptor explicit member map lowering changes (#113556)
This is one of 3 PRs in a PR stack that aims to add support for explicit
mapping of allocatable members in derived types.
The primary changes in this PR are the OpenMPToLLVMIRTranslation.cpp
changes, which are small and seek to alter the current member mapping to
add an additional map insertion for pointers. Effectively, if the member
is a pointer (currently indicated by having a varPtrPtr field) we add an
additional map for the pointer and then alter the subsequent mapping of
the member (the data) to utilise the member rather than the parents base
pointer. This appears to be necessary in certain cases when mapping
pointer data within record types to avoid segfaulting on device (due to
incorrect data mapping). In general this record type mapping may be
simplifiable in the future.
There are also additions of tests which should help to showcase the
affect of the changes above.
Commit: e508bacce45d4fb2ba07d02c55391b858000c3b3
https://github.com/llvm/llvm-project/commit/e508bacce45d4fb2ba07d02c55391b858000c3b3
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
A flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Transforms/omp-map-info-finalization.fir
M mlir/test/Target/LLVMIR/omptarget-data-use-dev-ordering.mlir
Log Message:
-----------
[Flang][OpenMP] Derived type explicit allocatable member mapping (#113557)
This PR is one of 3 in a PR stack, this is the primary change set which
seeks to extend the current derived type explicit member mapping support
to handle descriptor member mapping at arbitrary levels of nesting. The
PR stack seems to do this reasonably (from testing so far) but as you
can create quite complex mappings with derived types (in particular when
adding allocatable derived types or arrays of allocatable derived types)
I imagine there will be hiccups, which I am more than happy to address.
There will also be further extensions to this work to handle the
implicit auto-magical mapping of descriptor members in derived types and
a few other changes planned for the future (with some ideas on
optimizing things).
The changes in this PR primarily occur in the OpenMP lowering and the
OMPMapInfoFinalization pass.
In the OpenMP lowering several utility functions were added or extended
to support the generation of appropriate intermediate member mappings
which are currently required when the parent (or multiple parents) of a
mapped member are descriptor types. We need to map the entirety of these
types or do a "deep copy" for lack of a better term, where we map both
the base address and the descriptor as without the copying of both of
these we lack the information in the case of the descriptor to access
the member or attach the pointers data to the pointer and in the latter
case we require the base address to map the chunk of data. Currently we
do not segment descriptor based derived types as we do with regular
non-descriptor derived types, we effectively map their entirety in all
cases at the moment, I hope to address this at some point in the future
as it adds a fair bit of a performance penalty to having nestings of
allocatable derived types as an example. The process of mapping all
intermediate descriptor members in a members path only occurs if a
member has an allocatable or object parent in its symbol path or the
member itself is a member or allocatable. This occurs in the
createParentSymAndGenIntermediateMaps function, which will also generate
the appropriate address for the allocatable member within the derived
type to use as a the varPtr field of the map (for intermediate
allocatable maps and final allocatable mappings). In this case it's
necessary as we can't utilise the usual Fortran::lower functionality
such as gatherDataOperandAddrAndBounds without causing issues later in
the lowering due to extra allocas being spawned which seem to affect the
pointer attachment (at least this is my current assumption, it results
in memory access errors on the device due to incorrect map information
generation). This is similar to why we do not use the MLIR value
generated for this and utilise the original symbol provided when mapping
descriptor types external to derived types. Hopefully this can be
rectified in the future so this function can be simplified and more
closely aligned to the other type mappings. We also make use of
fir::CoordinateOp as opposed to the HLFIR version as the HLFIR version
doesn't support the appropriate lowering to FIR necessary at the moment,
we also cannot use a single CoordinateOp (similarly to a single GEP) as
when we index through a descriptor operation (BoxType) we encounter
issues later in the lowering, however in either case we need access to
intermediate descriptors so individual CoordinateOp's aid this
(although, being able to compress them into a smaller amount of
CoordinateOp's may simplify the IR and perhaps result in a better end
product, something to consider for the future).
The other large change area was in the OMPMapInfoFinalization pass,
where the pass had to be extended to support the expansion of box types
(or multiple nestings of box types) within derived types, or box type
derived types. This requires expanding each BoxType mapping from one
into two maps and then modifying all of the existing member indices of
the overarching parent mapping to account for the addition of these new
members alongside adjusting the existing member indices to support the
addition of these new maps which extend the original member indices (as
a base address of a box type is currently considered a member of the box
type at a position of 0 as when lowered to LLVM-IR it's a pointer
contained at this position in the descriptor type, however, this means
extending mapped children of this expanded descriptor type to
additionally incorporate the new member index in the correct location in
its own index list). I believe there is a reasonable amount of comments
that should aid in understanding this better, alongside the test
alterations for the pass.
A subset of the changes were also aimed at making some of the utilities
for packing and unpacking the DenseIntElementsAttr containing the member
indices shareable across the lowering and OMPMapInfoFinalization, this
required moving some functions to the Lower/Support/Utils.h header, and
transforming the lowering structure containing the member index data
into something more similar to the version used in
OMPMapInfoFinalization. There we also some other attempts at tidying
things up in relation to the member index data generation in the
lowering, some of which required creating a logical operator for the
OpenMP ID class so it can be utilised as a map key (it simply utilises
the symbol address for the moment as ordering isn't particularly
important).
Otherwise I have added a set of new tests encompassing some of the
mappings currently supported by this PR (unfortunately as you can have
arbitrary nestings of all shapes and types it's not very feasible to
cover them all).
Commit: 51809e4a26a8c6db6cce115822d185fe662dc0fc
https://github.com/llvm/llvm-project/commit/51809e4a26a8c6db6cce115822d185fe662dc0fc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-ld1.ll
Log Message:
-----------
[DAG] SimplifyDemandedVectorElts - add SimplifyMultipleUse handling to SEXT/ZEXT/TRUNC nodes (#116227)
Allows us to bypass multiple uses of a SEXT/ZEXT/TRUNC node operand
Commit: c95daac4c19fe54eeeb4d0ec5ca23f2673d1de71
https://github.com/llvm/llvm-project/commit/c95daac4c19fe54eeeb4d0ec5ca23f2673d1de71
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Spell out alias attribute/metadata violations are UB. (#116220)
Update the documentation for the noalias attribute, !alias.scope and
!loop.parallel_accesses metadata to clarify they are UB on voilation the
noalias property.
PR: https://github.com/llvm/llvm-project/pull/116220
---------
Co-authored-by: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Commit: e8a6624325e0c628ec23e5f124f1d2002f138dd5
https://github.com/llvm/llvm-project/commit/e8a6624325e0c628ec23e5f124f1d2002f138dd5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/LinkInModulesPass.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
Log Message:
-----------
[CodeGen] Remove unused includes (NFC) (#116459)
Identified with misc-include-cleaner.
Commit: 46d750be2e19220c318bc907dfaf6c61d3a0de92
https://github.com/llvm/llvm-project/commit/46d750be2e19220c318bc907dfaf6c61d3a0de92
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/ScopeInfo.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
Log Message:
-----------
[Sema] Remove unused includes (NFC) (#116461)
Identified with misc-include-cleaner.
Commit: b88e938b1f95e60a8dfe33d1b2b131027d1acf25
https://github.com/llvm/llvm-project/commit/b88e938b1f95e60a8dfe33d1b2b131027d1acf25
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[NFC] Remove whitespaces in `llvm/CMakeLists.txt`
Commit: 71b3b32c6ec8e4691b67b2571b4f44cdd15cb588
https://github.com/llvm/llvm-project/commit/71b3b32c6ec8e4691b67b2571b4f44cdd15cb588
Author: Maurice Heumann <MauriceHeumann at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/Driver/cl-zc.cpp
Log Message:
-----------
[Clang] [MS] Add /Zc:tlsGuards option to control tls guard emission (#113830)
This adds an option to control whether guards for on-demand TLS
initialization in combination with Microsoft's CXX ABI are emitted or
not.
The behaviour should match with Microsoft:
https://learn.microsoft.com/en-us/cpp/build/reference/zc-tlsguards?view=msvc-170
This fixes #103484
Commit: 1636580b0a9afb2272d94b125313e4b35e9af2a9
https://github.com/llvm/llvm-project/commit/1636580b0a9afb2272d94b125313e4b35e9af2a9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/fstream
M libcxx/include/strstream
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
Log Message:
-----------
[libc++] Avoid including <ostream> in <fstream> and <strstream> (#116014)
This reduces the include time of `<fstream>` from ~800ms to ~500ms.
Commit: 764834d63d5b1bf5852ae90acdedf66056c54c87
https://github.com/llvm/llvm-project/commit/764834d63d5b1bf5852ae90acdedf66056c54c87
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
A libcxx/include/__locale_dir/pad_and_output.h
M libcxx/include/__ostream/basic_ostream.h
A libcxx/include/__ostream/put_character_sequence.h
M libcxx/include/iomanip
M libcxx/include/locale
M libcxx/include/module.modulemap
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove <istream> and <ostream> includes from <iomanip> (#116223)
This reduces the include time of `<filesystem>` by ~50ms.
Commit: 15ca79998ae7f2a3919b8c1c3573730f4c5e13ed
https://github.com/llvm/llvm-project/commit/15ca79998ae7f2a3919b8c1c3573730f4c5e13ed
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 764834d63d5b
Commit: 4f48a81a620bc9280be4780f3554cdc9bda55bd3
https://github.com/llvm/llvm-project/commit/4f48a81a620bc9280be4780f3554cdc9bda55bd3
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/Makefile
A lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Support column breakpoints (#113787)
This commit adds support for column breakpoints to lldb-dap.
To do so, support for the `breakpointLocations` request was
added. To find all available breakpoint positions, we iterate over
the line table.
The `setBreakpoints` request already forwarded the column correctly to
`SBTarget::BreakpointCreateByLocation`. However, `SourceBreakpointMap`
did not keep track of multiple breakpoints in the same line. To do so,
the `SourceBreakpointMap` is now indexed by line+column instead of by
line only.
See http://jonasdevlieghere.com/post/lldb-column-breakpoints/ for a
high-level introduction to column breakpoints.
Commit: 47e6673006a0f27b39867f49b25bddc4e1116cd2
https://github.com/llvm/llvm-project/commit/47e6673006a0f27b39867f49b25bddc4e1116cd2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace toString(RelType) with operator<< while using ELFSyncStream
Commit: e2b4a700fd927e50a68ac0a42e4807a104495186
https://github.com/llvm/llvm-project/commit/e2b4a700fd927e50a68ac0a42e4807a104495186
Author: Tobias Hieta <tobias at hieta.se>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/release/merge-release-pr.py
Log Message:
-----------
[Utils] Fixed rebase in merge-release-pr script (#116340)
Recently GitHub changed something on their side so we no longer can
rebase release PR's with the API. This means that we now have to
manually rebase the PR locally and then push the results. This fixes
the script that I use to merge PRs to the release branch by changing
the rebase part to do the local rebase and also adds a new option
--rebase-only so that you can rebase the PRs easier.
Minor change is that the script now can take a URL to the pull request
as well as just the PR ID.
Commit: adb80d8a4cdc04936980fd88c6c8dd85ccac3135
https://github.com/llvm/llvm-project/commit/adb80d8a4cdc04936980fd88c6c8dd85ccac3135
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/__utility/scope_guard.h
Log Message:
-----------
[libc++] Address post-commit comments for __scope_guard (#116291)
Fixes #116204
Commit: dedc5159997ebd3573a2e6397ba9b08faeb1b015
https://github.com/llvm/llvm-project/commit/dedc5159997ebd3573a2e6397ba9b08faeb1b015
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__mutex/unique_lock.h
M libcxx/include/__system_error/system_error.h
A libcxx/include/__system_error/throw_system_error.h
M libcxx/include/__thread/thread.h
M libcxx/include/module.modulemap
M libcxx/include/print
M libcxx/include/shared_mutex
M libcxx/src/chrono.cpp
M libcxx/src/filesystem/filesystem_clock.cpp
M libcxx/src/random.cpp
M libcxx/src/system_error.cpp
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Avoid including <string> in <mutex> (#116254)
Commit: 3f67544b4dc81a3286e50d540a4fdabb161ea8b6
https://github.com/llvm/llvm-project/commit/3f67544b4dc81a3286e50d540a4fdabb161ea8b6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port dedc5159997e
Commit: 935d753c6dca0cd9bc5ea14fde5b00386ebcc5be
https://github.com/llvm/llvm-project/commit/935d753c6dca0cd9bc5ea14fde5b00386ebcc5be
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage fir ld1r combines. NFC
Commit: 612b779963c21c8028dc0651e956097b161b0a8a
https://github.com/llvm/llvm-project/commit/612b779963c21c8028dc0651e956097b161b0a8a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Update a comment (NFC) (#116500)
Note that Version0 has been removed in #116442.
Commit: 3fb83f65c4f38d7651b46d51b8e431417a69d539
https://github.com/llvm/llvm-project/commit/3fb83f65c4f38d7651b46d51b8e431417a69d539
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace toString(RelType) with operator<< while using ELFSyncStream
Commit: 797330e96c5abf0f1c623c1eb5ca69de28b484be
https://github.com/llvm/llvm-project/commit/797330e96c5abf0f1c623c1eb5ca69de28b484be
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/DepthFirstIterator.h
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/unittests/ADT/BreadthFirstIteratorTest.cpp
M llvm/unittests/ADT/DepthFirstIteratorTest.cpp
M llvm/unittests/ADT/PostOrderIteratorTest.cpp
Log Message:
-----------
[ADT][NFCI]: Fix iterator category for graph iterators with external storage (#116403)
Set the iterator category for graph iterators to input_iterator_tag when
the visited set is stored externally. In that case we can't provide
multi-pass guarantee, so we should not claim to be a forward iterator.
Fixes: #116400
Commit: 549413fa4034898250c506098c3602e0b07680a2
https://github.com/llvm/llvm-project/commit/549413fa4034898250c506098c3602e0b07680a2
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GIMatchTableExecutor.cpp
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
Log Message:
-----------
[AArch64][GlobalISel] Protect against folding loads across basic blocks.
isObviouslySafeToFold can look between a load and an instruction it can be
folded into, to check that no other memory operations prevents the fold. It
doesn't handle multiple basic blocks which we needs to guard against.
Commit: 58a971f42f1f2b2e25995c8cad439f4aa07c024d
https://github.com/llvm/llvm-project/commit/58a971f42f1f2b2e25995c8cad439f4aa07c024d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace contex-less toString(x) with toStr(ctx, x)
so that we can remove the global `ctx` from toString implementations.
Rename lld::toString (to lld::elf::toStr) to simplify name lookup (we
have many llvm::toString and another lld::toString(const llvm::opt::Arg
&)).
Commit: 64b9753d03946d8100e017a5cc4861d5d671c6d0
https://github.com/llvm/llvm-project/commit/64b9753d03946d8100e017a5cc4861d5d671c6d0
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/Analysis/BranchProbabilityInfoTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
Log Message:
-----------
[llvm] Replace `UndefValue` placeholders with `PoisonValue` in unit tests [NFC] (#116453)
This PR replaces all `UndefValue` act as placeholders with `PoisonValue`
in `llvm/unittests`.
Commit: a6755bdad1fb1a195841a2e803007dda029b5a6a
https://github.com/llvm/llvm-project/commit/a6755bdad1fb1a195841a2e803007dda029b5a6a
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Replace global ctx with getCtx()
Commit: 73e89cf66d4b88d568ff4c718ae7bf55588ef2be
https://github.com/llvm/llvm-project/commit/73e89cf66d4b88d568ff4c718ae7bf55588ef2be
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsFrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsMulMulBugPass.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
Log Message:
-----------
[Mips] Remove unused includes (NFC) (#116499)
Identified with misc-include-cleaner.
Commit: 764275949897533a4be0728250e69a94d228fbc5
https://github.com/llvm/llvm-project/commit/764275949897533a4be0728250e69a94d228fbc5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/MacroArgs.cpp
M clang/lib/Lex/MacroInfo.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPCallbacks.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/PreprocessingRecord.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/PreprocessorLexer.cpp
M clang/lib/Lex/TokenLexer.cpp
Log Message:
-----------
[Lex] Remove unused includes (NFC) (#116460)
Identified with misc-include-cleaner.
Commit: be5dad012eb75d61935f6c76034a8867f7443731
https://github.com/llvm/llvm-project/commit/be5dad012eb75d61935f6c76034a8867f7443731
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Target.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Replace internalLinkerError(getErrorLoc(ctx, buf) + ...) with InternalErr(ctx, buf)
and simplify `+ toStr(ctx, x)` to `<< x`.
The trailing '\n' << llvm::getBugReportMsg() is not very useful and
therefore removed.
Commit: 38870fe124eb5e6e24136f9d3e4551a62370faee
https://github.com/llvm/llvm-project/commit/38870fe124eb5e6e24136f9d3e4551a62370faee
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Remove unneeded toString(Error) when using ELFSyncStream
Commit: 6c19fa4bfc54a8cdb0c48b5024650ff5c630ea8d
https://github.com/llvm/llvm-project/commit/6c19fa4bfc54a8cdb0c48b5024650ff5c630ea8d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Remove unneeded toString(Error) when using ELFSyncStream
Commit: 4a6f59ac3c13e5c4df0b2deb3e6918d0ce219e57
https://github.com/llvm/llvm-project/commit/4a6f59ac3c13e5c4df0b2deb3e6918d0ce219e57
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Replace lld::warn with Warn(ctx)
Commit: 3f6a1d179305f266835242ac7d1e55249c50c074
https://github.com/llvm/llvm-project/commit/3f6a1d179305f266835242ac7d1e55249c50c074
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
Log Message:
-----------
Guard against self-assignment in the DominatorTreeBase move assignment operator. (#116464)
The `DominatorTreeBase` move assignment operator was not self-assignment
safe because the last thing it does before returning is to release all
resources held by the source object. This issue was reported by a static
analysis tool; no self-assignment is known to occur in practice.
Commit: 24c7d97cff189071a3c2195258bc52c7d0e609a5
https://github.com/llvm/llvm-project/commit/24c7d97cff189071a3c2195258bc52c7d0e609a5
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace context-less errorHandler() and error() with ctx.errHandler
Commit: baf59be89ba297b26aff9f62bbda161941512793
https://github.com/llvm/llvm-project/commit/baf59be89ba297b26aff9f62bbda161941512793
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[SelectionDAG] Fix return types of TC_RETURN for several targets (#116504)
TC_RETURN nodes do not have a glue result.
Commit: a626eb2a2fcda460eaad7bd6f2bdfdfa8f0f23c2
https://github.com/llvm/llvm-project/commit/a626eb2a2fcda460eaad7bd6f2bdfdfa8f0f23c2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Pass ctx to bAlloc/saver/uniqueSaver
Commit: ce13dd1f7e5a86dc2a60e12f90e958fb0c7daec0
https://github.com/llvm/llvm-project/commit/ce13dd1f7e5a86dc2a60e12f90e958fb0c7daec0
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputFiles.h
Log Message:
-----------
[ELF] Replace fatal with Fatal(ctx)
Commit: 3b75a5c4c84d17d6647ba079391722ed9be09f85
https://github.com/llvm/llvm-project/commit/3b75a5c4c84d17d6647ba079391722ed9be09f85
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Symbols.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Replace message(...) with Msg(ctx)
Commit: 4a67b93fe8ffa330f3e9018232589e75c58f5806
https://github.com/llvm/llvm-project/commit/4a67b93fe8ffa330f3e9018232589e75c58f5806
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Make checkError context-aware
Commit: 7d13775486b5e83959b0d96137176f366c41e13a
https://github.com/llvm/llvm-project/commit/7d13775486b5e83959b0d96137176f366c41e13a
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/DriverUtils.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Pass ctx &
Commit: 6f87d1437ebd6a72ee67f26fbe5b1fa906ffb574
https://github.com/llvm/llvm-project/commit/6f87d1437ebd6a72ee67f26fbe5b1fa906ffb574
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
Log Message:
-----------
[ELF] Initialize Ctx members
Prevent use of uninitialized memory when `ctx` becomes a local variable.
Commit: abbb0d9c94511c9e10ec2f5ca65f059b6fa5761f
https://github.com/llvm/llvm-project/commit/abbb0d9c94511c9e10ec2f5ca65f059b6fa5761f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Remove unneeded toStr(ctx, x) when using ELFSyncStream
This patch removes the last use of the global `elf::ctx` outside of
elf::link.
Commit: 33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f
https://github.com/llvm/llvm-project/commit/33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Move SharedFile::vernauxNum to Ctx
Commit: 7379a194d5c18de38e32c29ec5c60964e6784296
https://github.com/llvm/llvm-project/commit/7379a194d5c18de38e32c29ec5c60964e6784296
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/PPC64.cpp
Log Message:
-----------
[ELF] Replace PPC64 writeSequence static variables with bAlloc
to reduce global state.
Commit: 73bb022b469a32eb5aee30f2947f3cea5e903caa
https://github.com/llvm/llvm-project/commit/73bb022b469a32eb5aee30f2947f3cea5e903caa
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Remove global ctx
This commit completes the work that eliminates global variables like
config/target/inputSections/symTab from lld/ELF.
Key changes:
* Introduced `lld::elf::ctx` to encapsulate global state.
* Moved global variables into `Ctx lld::elf::ctx`
* Updated many functions to accept `Ctx &ctx`
* Made `ctx` a local variable (this commit)
If we don't count `static std::mutex`, this is the last major global
state within lld/ELF (minor ones like `SharedFile::vernauxNum`
(33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f) might not all be eliminated
yet).
Commit: dc6229bd662cf74a3f4fad75f1e7832123d00db7
https://github.com/llvm/llvm-project/commit/dc6229bd662cf74a3f4fad75f1e7832123d00db7
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[lld] Use context-aware outs() and errs()
Commit: 1bfe55aff5f01e81f268f4ba8dbf25c7fcebdc7c
https://github.com/llvm/llvm-project/commit/1bfe55aff5f01e81f268f4ba8dbf25c7fcebdc7c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/DriverUtils.cpp
M lld/COFF/Writer.cpp
Log Message:
-----------
[lld-link] Replace errorHandler() with ctx.e
errorHandler() uses the global state, which should be avoided in
lld/COFF code.
Commit: 5bb9465d35914e9833c4fe9278a855a4cd75c7af
https://github.com/llvm/llvm-project/commit/5bb9465d35914e9833c4fe9278a855a4cd75c7af
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
[llvm-exegesis] Reserve members in array
This patch reserves members in the RegisterSetUp vector as we statically
know the size.
Commit: 8c7c8eaa1933d24c1eb869ba85469908547e3677
https://github.com/llvm/llvm-project/commit/8c7c8eaa1933d24c1eb869ba85469908547e3677
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/DriverUtils.cpp
M lld/COFF/Writer.cpp
Log Message:
-----------
[lld-link] Replace global lld::errs() with ctx.e.errs()
Commit: fd9f3beb0f3f1745c0eb71e4dbd29ed7c1d04ff6
https://github.com/llvm/llvm-project/commit/fd9f3beb0f3f1745c0eb71e4dbd29ed7c1d04ff6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Upgrade a unit test to Version 3 (#116516)
I'm planning to remove MemProf Version 1, which is a maintenance
burden because it uses a different set of struct fields in
IndexedAllocationInfo and IndexedMemProfRecord compared to Version 2
and 3. (FWIW, Version 2 and 3 are much closer to each other.)
Before we remove the old version, we need to upgrade
test_memprof_merge to Version 3. Here are some remarks:
- Without this patch, we call Writer.addMemProfFrame, which I don't
think is correct. This way, we are adding IndexedMemProfRecord to
Writer2 without any frame. I'm changing that to
Writer2.addMemProfFrame.
- This patch adds a call to getCallStackMapping. Version 2 and 3
require a map from call stack IDs to call stacks.
- I'm calling makeRecordV2 instead of makeRecord to populate the
struct fields used by Version 2 and 3.
- Version 1 uses MemProfRecord::MemProfRecord (that is, a constructor)
to convert IndexedMemProfRecord to MemProfRecord. Version 2 and 3
use MemProfRecord::toMemProfRecord, a member function, to do the
same task.
Commit: 9664ce6d5955647d00eac7d74188008917857b21
https://github.com/llvm/llvm-project/commit/9664ce6d5955647d00eac7d74188008917857b21
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Simplify complex diagnostics
Commit: e57331ec6344fd0a5cd04e2f2da38d139cbf2417
https://github.com/llvm/llvm-project/commit/e57331ec6344fd0a5cd04e2f2da38d139cbf2417
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Move global relocMutex/undefs into Ctx
Commit: c1a6defd9ff1540638d660888c5f32ea5cf4fa7d
https://github.com/llvm/llvm-project/commit/c1a6defd9ff1540638d660888c5f32ea5cf4fa7d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[ELF] Make RelType a struct type
otherwise operator<<(const ELFSyncStream &s, RelType type) applies to
non-reloc-type uint32_t, which can be confusing.
Commit: 483516fd83f000fd6b2ac1cde943f5639f72b9e9
https://github.com/llvm/llvm-project/commit/483516fd83f000fd6b2ac1cde943f5639f72b9e9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Remove unneeded Twine()
Commit: a6140af4f063f9b116e50d1b66b94fc912d822a4
https://github.com/llvm/llvm-project/commit/a6140af4f063f9b116e50d1b66b94fc912d822a4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
Log Message:
-----------
[Mips] Reduce number of selectVSplatUimm/Simm functions by using templates. (#116475)
The implementaton of methods only vary by what arguments they pass to
selectVSplatCommon.
Turn selectVSplatCommon into a virtual function and use template methods
in the base class to pass the immediate size.
Commit: 834457a1342c0a7e32fa36238c877636a19198ba
https://github.com/llvm/llvm-project/commit/834457a1342c0a7e32fa36238c877636a19198ba
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Simplify relocateNonAlloc diagnostic
Commit: ddc0eb70c8b60de9fa5e55f550ff3ac822c849f1
https://github.com/llvm/llvm-project/commit/ddc0eb70c8b60de9fa5e55f550ff3ac822c849f1
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/MinGW/Driver.cpp
Log Message:
-----------
[lld,MinGW] Use context-aware outs() and errs()
lld::outs() and lld::errs() use the global errorHandler() and should be
avoided.
Commit: 2f4572f5e7e2d7f4626e825404c11f07d191fb05
https://github.com/llvm/llvm-project/commit/2f4572f5e7e2d7f4626e825404c11f07d191fb05
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
Log Message:
-----------
[Mips] Change vsplat_imm_eq_1 to a ComplexPattern. (#116471)
Resolves a FIXME and avoids needing to workaround #116075.
Adding parentheses around the (vsplat_imm_eq_1) fixes the error cited in
the FIXME by changing the ComplexPattern from a leaf node to an
operator.
Commit: fcb6b132fa7284426349d6d0063d3a0ed8864683
https://github.com/llvm/llvm-project/commit/fcb6b132fa7284426349d6d0063d3a0ed8864683
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/DriverUtils.cpp
M lld/Common/ErrorHandler.cpp
M lld/MachO/Driver.cpp
M lld/MachO/Driver.h
M lld/MachO/DriverUtils.cpp
M lld/include/lld/Common/ErrorHandler.h
M lld/include/lld/Common/LLVM.h
M lld/wasm/Driver.cpp
Log Message:
-----------
[lld] Use context-aware outs() and errs()
For COFF and ELF that are mostly free of global states, lld::errs() and
lld::outs() should not be used. This migration change allows us to
remove lld::errs, which uses the global errorHandler().
Commit: 3c5f33717cc596df286c6439419b84db599681f9
https://github.com/llvm/llvm-project/commit/3c5f33717cc596df286c6439419b84db599681f9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove unused tablegen class. NFC
Commit: 34712c345561870de871e6831735a5683c9660c2
https://github.com/llvm/llvm-project/commit/34712c345561870de871e6831735a5683c9660c2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove unnecessary casts from some isel patterns. NFC
Commit: 275bcd02380fb3bd40b747ed320fcac266b971bc
https://github.com/llvm/llvm-project/commit/275bcd02380fb3bd40b747ed320fcac266b971bc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove some duplicate PatFrags. NFC
Commit: b3230dd452bc8eb9ab4479cdb98f944838cb58b6
https://github.com/llvm/llvm-project/commit/b3230dd452bc8eb9ab4479cdb98f944838cb58b6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove roots from ComplexPatterns that are never used as roots. NFC
Commit: 8f238f662c8237b88392f8a94469cd50d86636d6
https://github.com/llvm/llvm-project/commit/8f238f662c8237b88392f8a94469cd50d86636d6
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/LTO.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Make Ctx inherit from CommonLinkerContext
link calls `new CommonLinkerContext`. Now that `Ctx ctx` is a local
variable, we can make it inherit from CommonLinkerContext.
Commit: 2991a4e2097ab3f32d37fdceab08c658836e312c
https://github.com/llvm/llvm-project/commit/2991a4e2097ab3f32d37fdceab08c658836e312c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace functions bAlloc/saver/uniqueSaver with member access
Commit: dbf37e956a0dd60ac84e3c08bc1fe8170cf44d22
https://github.com/llvm/llvm-project/commit/dbf37e956a0dd60ac84e3c08bc1fe8170cf44d22
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
Log Message:
-----------
[ELF] Move InputFile storage from make<> to LinkerDriver::files
Commit: 53dc4e7600f95ae232bc49b9051f77199e79ec13
https://github.com/llvm/llvm-project/commit/53dc4e7600f95ae232bc49b9051f77199e79ec13
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] createSyntheticSections: replace some make<> with unique_ptr
This removes some SpecificAlloc instantiations and makes lld smaller.
This drops the small memory waste due to the separate BumpPtrAllocator.
Commit: 5b1b6a62b8bd986adc711d0c0be5b6a8182be263
https://github.com/llvm/llvm-project/commit/5b1b6a62b8bd986adc711d0c0be5b6a8182be263
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Make elfHeader/programHeaders unique_ptr
This removes some SpecificAlloc instantiations, makes lld smaller, and
drops the small memory waste due to the separate BumpPtrAllocator.
Commit: 49b29368f72c493e61506b4203e7852f55e17062
https://github.com/llvm/llvm-project/commit/49b29368f72c493e61506b4203e7852f55e17062
Author: David Green <david.green at arm.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/phi.ll
Log Message:
-----------
[AArch64][GlobalISel] Expand handling of phi operations
Like other operations, non-power-2 vectors are widened to a power-2, larger
vectors with i128 elements are scalarized and smaller vectors are widened to be
at least 64bit.
Commit: f0b8025ca27f722777dcf3fe8b9e367d18bb2eb1
https://github.com/llvm/llvm-project/commit/f0b8025ca27f722777dcf3fe8b9e367d18bb2eb1
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
Log Message:
-----------
[mlir][Quant][NFC] Apply clang-format to `StripFuncQuantTypes.cpp` (#116535)
Commit: 811186764d1add4d83972db3ad0d2e7c96bb15a7
https://github.com/llvm/llvm-project/commit/811186764d1add4d83972db3ad0d2e7c96bb15a7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__ranges/to.h
Log Message:
-----------
[libc++] Fix a few problems found by clang-tidy
Commit: 206ee7191834186ae78bf57fcf21d29dd7ce24cf
https://github.com/llvm/llvm-project/commit/206ee7191834186ae78bf57fcf21d29dd7ce24cf
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Change vector tuple type's TypeSize to scalable (#114329)
Vector tuple is basically multiple grouped vector, so its size is also
determined by vscale, we need not to model it as a vector type but its
size need to be scalable.
Commit: 7c010bfdc540890e33c5db2424e0cfb9df08d410
https://github.com/llvm/llvm-project/commit/7c010bfdc540890e33c5db2424e0cfb9df08d410
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/include/__chrono/time_point.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/ratio
Log Message:
-----------
[libc++] Remove some unnecessary boilerplate in <__chrono/duration.h> (#116238)
Commit: 2edfa50e7fb8f34736b8d9d216ac908d08b2b0f8
https://github.com/llvm/llvm-project/commit/2edfa50e7fb8f34736b8d9d216ac908d08b2b0f8
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M offload/README.md
Log Message:
-----------
[Offload][NFC] Update README.md
Commit: 63aa8cf6becbeb4983e3d1a7fa3cd8a7c7147118
https://github.com/llvm/llvm-project/commit/63aa8cf6becbeb4983e3d1a7fa3cd8a7c7147118
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/ClangDataCollectorsEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
Log Message:
-----------
[NFC][Clang][TableGen] Fix file header comments (#116491)
Commit: 5c8c90d8212d8720fd8630aecc634bdff6261ad6
https://github.com/llvm/llvm-project/commit/5c8c90d8212d8720fd8630aecc634bdff6261ad6
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
M llvm/lib/LTO/LTOBackend.cpp
Log Message:
-----------
[NFC][LLVM] Fix a couple of build warnings (#116490)
- Fix `HANDLE_EXTENSION` macro redefinition warning in LTOBackend.cpp
- Fix "unnecessary brackets" around rf/df variable definitions warning.
Commit: 7e8bc5cf77bdda9e32b984b3fa91953361f24abb
https://github.com/llvm/llvm-project/commit/7e8bc5cf77bdda9e32b984b3fa91953361f24abb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
M llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
M llvm/lib/Target/Hexagon/HexagonGenMemAbsolute.cpp
M llvm/lib/Target/Hexagon/HexagonGenMux.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/Hexagon/HexagonPeephole.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
M llvm/lib/Target/Hexagon/RDFCopy.cpp
Log Message:
-----------
[Hexagon] Remove unused includes (NFC) (#116529)
Identified with misc-include-cleaner.
Commit: 5b7102d1f37eab7a8f17b7bf4124ca76fbdbd66d
https://github.com/llvm/llvm-project/commit/5b7102d1f37eab7a8f17b7bf4124ca76fbdbd66d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ObjectYAML/ArchiveEmitter.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLTypeHashing.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFYAML.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/ObjectYAML/MinidumpYAML.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/ObjectYAML/yaml2obj.cpp
Log Message:
-----------
[ObjectYAML] Remove unused includes (NFC) (#116530)
Identified with misc-include-cleaner.
Commit: 54dad9e269f365d0eff2f63c5ee843564eecca7e
https://github.com/llvm/llvm-project/commit/54dad9e269f365d0eff2f63c5ee843564eecca7e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ObjCopy/Archive.cpp
M llvm/lib/ObjCopy/COFF/COFFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
M llvm/lib/ObjCopy/ObjCopy.cpp
M llvm/lib/ObjCopy/XCOFF/XCOFFObjcopy.cpp
M llvm/lib/ObjCopy/wasm/WasmObject.cpp
M llvm/lib/ObjCopy/wasm/WasmWriter.cpp
Log Message:
-----------
[ObjCopy] Remove unused includes (NFC) (#116534)
Identified with misc-include-cleaner.
Commit: dec6324cb05ac1d339c1b2bd43add968f2931c62
https://github.com/llvm/llvm-project/commit/dec6324cb05ac1d339c1b2bd43add968f2931c62
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/CommentCommandTraits.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DeclarationName.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OSLog.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtIterator.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTTBuilder.cpp
Log Message:
-----------
[AST] Remove unused includes (NFC) (#116549)
Identified with misc-include-cleaner.
Commit: 2d7ec7f0d39cb4b816fc9b9d535519c726980121
https://github.com/llvm/llvm-project/commit/2d7ec7f0d39cb4b816fc9b9d535519c726980121
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Rename the label for libc++ self-hosted runners (#116540)
Commit: 875d24c2302cf0194fdd44b012623f395a705863
https://github.com/llvm/llvm-project/commit/875d24c2302cf0194fdd44b012623f395a705863
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Config.h
Log Message:
-----------
[ELF] Avoid list initialization with incomplete unique_ptr<OutputSection> member to work around clang < 16
Commit 5b1b6a62b8bd986adc711d0c0be5b6a8182be263 introduced the following
issue for older clang with libstdc++
```
In file included from /home/ray/llvm/lld/ELF/EhFrame.cpp:18:
In file included from /home/ray/llvm/lld/ELF/EhFrame.h:12:
In file included from /home/ray/llvm/lld/include/lld/Common/LLVM.h:21:
In file included from /home/ray/llvm/llvm/include/llvm/Support/Casting.h:20:
In file included from /usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/memory:78:
/usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/bits/unique_ptr.h:91:16: error: invalid application of 'sizeof' to an incomplete type 'lld::elf::OutputSection'
static_assert(sizeof(_Tp)>0,
^~~~~~~~~~~
/usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/bits/unique_ptr.h:398:4: note: in instantiation of member function 'std::default_delete<lld::elf::OutputSection>::operator()' requested here
get_deleter()(std::move(__ptr));
^
/home/ray/llvm/lld/ELF/Config.h:574:19: note: in instantiation of member function 'std::unique_ptr<lld::elf::OutputSection>::~unique_ptr' requested here
OutSections out{};
^
```
Commit: 0060c54e0da6d1429875da2d30895faa7562b706
https://github.com/llvm/llvm-project/commit/0060c54e0da6d1429875da2d30895faa7562b706
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp
M llvm/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugStringTableSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugSubsectionVisitor.cpp
M llvm/lib/DebugInfo/CodeView/GlobalTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/LazyRandomTypeCollection.cpp
M llvm/lib/DebugInfo/CodeView/MergingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/SymbolSerializer.cpp
M llvm/lib/DebugInfo/CodeView/TypeTableCollection.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/GSYM/ExtractRanges.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/DebugInfo/GSYM/InlineInfo.cpp
M llvm/lib/DebugInfo/GSYM/LookupResult.cpp
M llvm/lib/DebugInfo/GSYM/ObjectFileTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSort.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSupport.cpp
M llvm/lib/DebugInfo/LogicalView/LVReaderHandler.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/DebugInfo/PDB/Native/DbiModuleList.cpp
M llvm/lib/DebugInfo/PDB/Native/FormatUtil.cpp
M llvm/lib/DebugInfo/PDB/Native/GlobalsStream.cpp
M llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
M llvm/lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp
M llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumGlobals.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumInjectedSources.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumLineNumbers.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumSymbols.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeSession.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeArray.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeVTShape.cpp
M llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolCompiland.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFunc.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolPublicSymbol.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp
M llvm/lib/DebugInfo/Symbolize/Markup.cpp
M llvm/lib/DebugInfo/Symbolize/MarkupFilter.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
Log Message:
-----------
[DebugInfo] Remove unused includes (NFC) (#116551)
Identified with misc-include-cleaner.
Commit: 6d98f11f3b5498262917802323942c8dfc2a226f
https://github.com/llvm/llvm-project/commit/6d98f11f3b5498262917802323942c8dfc2a226f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Work around extra "warning: $" with MSVC 14.41.34120
Commit: ec950b206353cfc36fb0701f1a77cc18aa2d18aa
https://github.com/llvm/llvm-project/commit/ec950b206353cfc36fb0701f1a77cc18aa2d18aa
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/test/ELF/aarch64-abs64-dyn.s
M lld/test/ELF/aarch64-cortex-a53-843419-address.s
M lld/test/ELF/aarch64-cortex-a53-843419-large.s
M lld/test/ELF/aarch64-cortex-a53-843419-large2.s
M lld/test/ELF/aarch64-cortex-a53-843419-nopatch.s
M lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
M lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
M lld/test/ELF/aarch64-fpic-abs16.s
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-adr_prel_lo21.s
M lld/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s
M lld/test/ELF/aarch64-fpic-got.s
M lld/test/ELF/aarch64-fpic-ldst32_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst64_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst8_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-prel16.s
M lld/test/ELF/aarch64-fpic-prel32.s
M lld/test/ELF/aarch64-fpic-prel64.s
M lld/test/ELF/aarch64-gnu-ifunc-address.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable2.s
M lld/test/ELF/aarch64-gnu-ifunc-nosym.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-gnu-ifunc.s
M lld/test/ELF/aarch64-gnu-ifunc2.s
M lld/test/ELF/aarch64-got-weak-undef.s
M lld/test/ELF/aarch64-ifunc-bti.s
M lld/test/ELF/aarch64-lo12-alignment.s
M lld/test/ELF/aarch64-memtag-android-abi.s
M lld/test/ELF/aarch64-memtag-globals.s
M lld/test/ELF/aarch64-undefined-weak.s
M lld/test/ELF/pack-dyn-relocs-loop.s
Log Message:
-----------
[ELF,test] Replace aarch64-none-* with aarch64
"none" is valid OS component and can cause confusion when used together
with linux/freebsd.
Commit: feb9b3701bf6650f91e12e7f4efbe72383f3f60b
https://github.com/llvm/llvm-project/commit/feb9b3701bf6650f91e12e7f4efbe72383f3f60b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Address post-commit comments for #113915.
Address post-commit comments for
https://github.com/llvm/llvm-project/pull/113915.
Commit: a8538b9138574142b9338ad0fce0f8ba1065fcbc
https://github.com/llvm/llvm-project/commit/a8538b9138574142b9338ad0fce0f8ba1065fcbc
Author: Julian Nagele <j.nagele at apple.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
A llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
Log Message:
-----------
[LV] Vectorize Epilogues for loops with small VF but high IC (#108190)
- Consider MainLoopVF * IC when determining whether Epilogue
Vectorization is profitable
- Allow the same VF for the Epilogue as for the main loop
- Use an upper bound for the trip count of the Epilogue when choosing
the Epilogue VF
PR: https://github.com/llvm/llvm-project/pull/108190
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: eed9af95e6133e94449c7be585bc3b5fad8ad769
https://github.com/llvm/llvm-project/commit/eed9af95e6133e94449c7be585bc3b5fad8ad769
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-load-store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Make loads/stores with s16 register type and s16 memory type legal.
This is needed to support Zfh loads/stores.
This requires supporting extends from sext/zext form i16 and s16
G_FREEZE to support the current tests we have.
Commit: c4eeef32d5dc8ec7560edabf18ac29416a7551e5
https://github.com/llvm/llvm-project/commit/c4eeef32d5dc8ec7560edabf18ac29416a7551e5
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
[TBAA] Add test for generating pointer-tbaa for unnamed structs.
Currently we generate incorrect metadata not considering compatible
types in C.
Commit: 93a4244523b171c8a9cc2ba23e1107ef0ddf7436
https://github.com/llvm/llvm-project/commit/93a4244523b171c8a9cc2ba23e1107ef0ddf7436
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
Log Message:
-----------
[BOLT] Use new assembler directives for EH table emission (#116294)
When emitting C++ exception tables (LSDAs), BOLT used to estimate the
size of the tables beforehand. This implementation was necessary as the
assembler/streamer lacked the emitULEB128IntValue() functionality.
As I plan to introduce [u|s]uleb128-encoded exception tables in BOLT,
now is a perfect time to switch to the new API and eliminate the need
to pre-compute the size of the tables.
Commit: 315519917368dce841f1cb1e7b296846d13497c3
https://github.com/llvm/llvm-project/commit/315519917368dce841f1cb1e7b296846d13497c3
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
Log Message:
-----------
Thread safety analysis: Eliminate unneeded const_cast, NFC
Commit: 521c99627690e09ba25383c83232f94ff457f00c
https://github.com/llvm/llvm-project/commit/521c99627690e09ba25383c83232f94ff457f00c
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
Log Message:
-----------
[JITLink] Move Symbol to new block before updating size.
Symbol::setSize asserts that the new size does not overflow the containing
block, so we need to point the Symbol at the correct Block before updating its
size (otherwise we may get a spurious overflow assertion).
Commit: 224290d44899be4614eb6795aa514103cd76e597
https://github.com/llvm/llvm-project/commit/224290d44899be4614eb6795aa514103cd76e597
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
A llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
[ORC] Add LazyObjectLinkingLayer, lazy-linking support to llvm-jitlink (#116002)
LazyObjectLinkingLayer can be used to add object files that will not be linked
into the executor unless some function that they define is called at runtime.
(References to data members defined by these objects will still trigger
immediate linking)
To implement lazy linking, LazyObjectLinkingLayer uses the lazyReexports
utility to construct stubs for each function in a given object file, and an
ObjectLinkingLayer::Plugin to rename the function bodies at link-time. (Data
symbols are not renamed)
The llvm-jitlink utility is extended with a -lazy option that can be
passed before input files or archives to add them using the lazy linking
layer rather than the base ObjectLinkingLayer.
Commit: 723dec66f0a74888bb05862a543b0d7e7f96e1de
https://github.com/llvm/llvm-project/commit/723dec66f0a74888bb05862a543b0d7e7f96e1de
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 224290d44899
Commit: 826b845c9e97448395431be3e4e5da585bd98c5e
https://github.com/llvm/llvm-project/commit/826b845c9e97448395431be3e4e5da585bd98c5e
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
[X86] Support -march=diamondrapids (#113881)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 90e92239bd0706c44ef4add018c702e53101b253
https://github.com/llvm/llvm-project/commit/90e92239bd0706c44ef4add018c702e53101b253
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
Revert "[X86] Support -march=diamondrapids (#113881)" (#116563)
This reverts commit 826b845c9e97448395431be3e4e5da585bd98c5e.
Commit: 18ee00323f5fc22d32a74b636fcac84e697241f3
https://github.com/llvm/llvm-project/commit/18ee00323f5fc22d32a74b636fcac84e697241f3
Author: Alexander Belyaev <32522095+pifon2a at users.noreply.github.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][complex] Add a numerically-stable lowering for complex.expm1. (#115082)
The current conversion to Standard in the MLIR repo is not stable for
small imag(arg).
Commit: 6349c1c2819549565186f6b3b031b5f8fdd52bca
https://github.com/llvm/llvm-project/commit/6349c1c2819549565186f6b3b031b5f8fdd52bca
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Disable lazy-linking test on armv8 and powerpc.
These architectures are not supported yet.
Commit: c0cbcb4efe80eacfbfae1dac92657d7913270c4b
https://github.com/llvm/llvm-project/commit/c0cbcb4efe80eacfbfae1dac92657d7913270c4b
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Tweak lazy-link testcase's UNSUPPORTED condition for armv8a.
The previous attempt in 6349c1c28195 didn't seem to work: the test is still
failing as of https://lab.llvm.org/buildbot/#/builders/154/builds/7609.
Commit: 06011fee3ae0e9683aa8dbad50bf6ae35ee27e19
https://github.com/llvm/llvm-project/commit/06011fee3ae0e9683aa8dbad50bf6ae35ee27e19
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
Log Message:
-----------
[mlir] Fix -Wsign-compare in ComplexToStandard.cpp (NFC)
/llvm-project/mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp:529:21:
error: comparison of integers of different signs: 'int' and 'size_t' (aka 'unsigned long') [-Werror,-Wsign-compare]
529 | for (int i = 1; i < coefficients.size(); ++i) {
| ~ ^ ~~~~~~~~~~~~~~~~~~~
1 error generated.
Commit: 97836bed6357664f9b2fb87cfe10656b08309bac
https://github.com/llvm/llvm-project/commit/97836bed6357664f9b2fb87cfe10656b08309bac
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
Reland "[X86] Support -march=diamondrapids (#113881)" (#116564)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 61d1b7c5eded9b0e6e8adcd74cf181b3458656ed
https://github.com/llvm/llvm-project/commit/61d1b7c5eded9b0e6e8adcd74cf181b3458656ed
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Tweak lazy-link testcase's UNSUPPORTED condition for armv8a some more.
The change in c0cbcb4efe8 was insufficient: The armv8a subarch is a property of
the compiled testcase, not the test target triple. Having double-checked the
EPCIndirectionUtils::Create method we want to disable this test for all arm.*
prefixes except arm64 (we want the test to continue working on Darwin).
Commit: 92ffefe3510e0cbf5b9ded0f2e2caff4e6803f17
https://github.com/llvm/llvm-project/commit/92ffefe3510e0cbf5b9ded0f2e2caff4e6803f17
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
Log Message:
-----------
[Tablegen] Add more comments for result numbers to DAGISelEmitter.cpp (#116533)
Print what result number the Emit* nodes are storing their results in.
This makes it easy to track the inputs of later opcodes that consume
these results.
Commit: 45e882e2bfdb62b5930c22687525e0d8f7788f03
https://github.com/llvm/llvm-project/commit/45e882e2bfdb62b5930c22687525e0d8f7788f03
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
Log Message:
-----------
[RISCV] Add IsRV32 to some isel patterns not needed for RV64.
Commit: d9eda6b2f3843cf63fa36e7d5d670ca225cbcbd7
https://github.com/llvm/llvm-project/commit/d9eda6b2f3843cf63fa36e7d5d670ca225cbcbd7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/Inputs/input.ll
Log Message:
-----------
[MLGO] Remove extranous check lines from test input
This patch removes check lines from a test input. It was originally
copied from a test that had assertions automatically generated, but
given we only use it as an input, the check lines do absolutely nothing.
Remove them to improve readability of the test/prevent confusion.
Commit: 24feaab8380c69d5fa3eb8c21ef2d660913fd4a9
https://github.com/llvm/llvm-project/commit/24feaab8380c69d5fa3eb8c21ef2d660913fd4a9
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/statistics/basic/TestStats.py
A lldb/test/API/commands/statistics/basic/second.cpp
Log Message:
-----------
Fix statistics dump to report per-target (#113723)
"statistics dump" currently report the statistics of all targets in
debugger instead of current target. This is wrong because there is a
"statistics dump --all-targets" option that supposed to include
everything.
This PR fixes the issue by only report statistics for current target
instead of all. It also includes the change to reset statistics debug
info/symbol table parsing/indexing time during debugger destroy. This is
required so that we report current statistics if we plan to reuse
lldb/lldb-dap across debug sessions
---------
Co-authored-by: jeffreytan81 <jeffreytan at fb.com>
Commit: 686a291cdc909e9ab7c8659aa1cab82d0182d0d2
https://github.com/llvm/llvm-project/commit/686a291cdc909e9ab7c8659aa1cab82d0182d0d2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
Log Message:
-----------
[ELF] Change Msg to respect stdoutOS
Commit: 1c4f335ec29c6bb269d0f8b2d6149d439312c69a
https://github.com/llvm/llvm-project/commit/1c4f335ec29c6bb269d0f8b2d6149d439312c69a
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/test/ELF/aarch64-feature-pauth.s
Log Message:
-----------
[PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (#113945)
Assume PAC instructions being supported with PAuth core info different from (0,0). The (0,0) value means that an ELF file is incompatible with PAuth - see https://github.com/ARM-software/abi-aa/blob/2024Q3/pauthabielf64/pauthabielf64.rst#core-information. With PAC non-hint instructions supported, `autia1716; br x17` can be replaced with `braa x17, x16; nop`, where `braa` is an authenticated branch instruction using IA key, discriminator from x16 and signed target address from x17.
Commit: fd3ff2007ab30c74772572798f3e494fdaac7ac2
https://github.com/llvm/llvm-project/commit/fd3ff2007ab30c74772572798f3e494fdaac7ac2
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/loop-directive.f90
A flang/test/Lower/OpenMP/loop-directive.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[flang][OpenMP] Add basic support to lower `loop` directive to MLIR (#114199)
Adds initial support for lowering the `loop` directive to MLIR.
The PR includes basic suport and testing for the following clauses:
* `collapse`
* `order`
* `private`
* `reduction`
Parent PR: #113911, only the latest commit is relevant to this PR.
Commit: 00aa08119aa03ea4722196bc7d0e84a4e2a044c7
https://github.com/llvm/llvm-project/commit/00aa08119aa03ea4722196bc7d0e84a4e2a044c7
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
[NFC] Clang format PeepholeOptimizer (#116325)
Commit: 3f9d02aae87b7c778b86cb79ebd4b64760653079
https://github.com/llvm/llvm-project/commit/3f9d02aae87b7c778b86cb79ebd4b64760653079
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/PeepholeOptimizer.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
M llvm/test/CodeGen/ARM/cmp1-peephole-thumb.mir
M llvm/test/CodeGen/Lanai/peephole-compare.mir
M llvm/test/CodeGen/PowerPC/bitcast-peephole.mir
Log Message:
-----------
[CodeGen][NewPM] Port PeepholeOptimizer to NPM (#116326)
With this, all machine SSA optimization passes are available in the new codegen pipeline.
Commit: 5ff52436fd0c7739765f1d849992713a3e9ae237
https://github.com/llvm/llvm-project/commit/5ff52436fd0c7739765f1d849992713a3e9ae237
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
Relax clang/test/CodeGen/tbaa-pointers.c for -Asserts.
Fixes c4eeef32d5dc (llvmorg-20-init-12475-gc4eeef32d5dc)
Commit: c2a3ed22695ee81f41452c8350c313c620aa75e6
https://github.com/llvm/llvm-project/commit/c2a3ed22695ee81f41452c8350c313c620aa75e6
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Bump libc++ CI to a more recent version of the Docker image (#116558)
The Docker image was built using the recently introduced Action that
builds and pushes to the LLVM Docker registry.
Commit: 3c31ee740669fc80ff1bb4ae3724aa778cd1659e
https://github.com/llvm/llvm-project/commit/3c31ee740669fc80ff1bb4ae3724aa778cd1659e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
Log Message:
-----------
[APInt] Call countTrailingZerosSlowCase() directly from isShiftedMask. NFC
We checked the single word case already and we already call
countLeadingZerosSlowCase and countPopulationSlowCase.
Commit: b4c0ef18226b7d1f82d71fc0171b99caec0d8d12
https://github.com/llvm/llvm-project/commit/b4c0ef18226b7d1f82d71fc0171b99caec0d8d12
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
Log Message:
-----------
[flang][OpenMP] Add MLIR lowering for `loop ... bind` (#114219)
Extends MLIR lowering support for the `loop` directive by adding
lowering support for the `bind` clause.
Parent PR: https://github.com/llvm/llvm-project/pull/114199, only the
latest commit is relevant to this PR.
Commit: 1dcb3db0ac1255bf556bf6b62d03a113bd5191d8
https://github.com/llvm/llvm-project/commit/1dcb3db0ac1255bf556bf6b62d03a113bd5191d8
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-phi.ll
M llvm/test/Transforms/LowerConstantIntrinsics/objectsize_basic.ll
Log Message:
-----------
[llvm] Fix behavior of llvm.objectsize in presence of negative / large offset (#115504)
The internal structure used to carry intermediate computations hold
signed values. If an object size happens to overflow signed values, we
can get invalid result, so make sure this situation never happens.
This is not very limitative as static allocation of such large values
should scarcely happen.
Commit: 63b926af5ff43a90dac285bbe0750e41e622eb3f
https://github.com/llvm/llvm-project/commit/63b926af5ff43a90dac285bbe0750e41e622eb3f
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
A mlir/test/Dialect/Linalg/lit.local.cfg
A mlir/test/Dialect/Linalg/td/generalize-pack.mlir
Log Message:
-----------
[mlir] Add apply_patterns.linalg.generalize_pack_unpack TD Op (#116373)
This PR introduces populateGeneralizePatterns, which collects the
following patterns:
* `GeneralizeOuterUnitDimsPackOpPattern`,
* `GeneralizeOuterUnitDimsUnPackOpPattern` (currently a TODO).
These patterns are wrapped in a new Transform Dialect Op:
`apply_patterns.linalg.generalize_pack_unpack`. This Op facilitates
creating more involved end-to-end compilation pipelines for
`tensor.pack` and `tensor.unpack` operations. It will be required in an
upcoming PR building on top of #115698.
No new tests are added in this PR. Instead, existing tests from:
* "generalize-tensor-pack.mlir"
are reused. To achieve this:
* I've updated the test to use
`transform.apply_patterns.linalg.generalize_pack_unpack` instead of
the flag
`--test-linalg-transform-patterns="test-generalize-tensor-pack"`,
avoiding artificial tests solely for the TD Op.
* The TD sequence is saved to a new file, "generalize_pack.mlir", and
pre-loaded using the option:
`--transform-preload-library='transform-library-paths=%p/td/generalize_pack.mlir'`
This avoids duplicating the sequence for every "split" in the input
file.
* Added "lit.local.cfg" to exclude the "test/Dialect/Linalg/td"
directory from test discovery, ensuring "generalize_pack.mlir" is
not treated as a test file.
Commit: 4548bff0e8139d4f375f1078dd50a74116eae0a2
https://github.com/llvm/llvm-project/commit/4548bff0e8139d4f375f1078dd50a74116eae0a2
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/test/IR/invalid-builtin-attributes.mlir
Log Message:
-----------
[mlir][Parser] Deduplicate floating-point parsing functionality (#116172)
The following functionality is duplicated in multiple places: trying to
parse an APFloat from a floating point literal or an integer in
hexadecimal representation (bit pattern). Move it to a common helper
function.
NFC apart from the slightly changed error messages. (We now print the
exact same error messages regardless of whether the float is parsed
standalone or inside of a tensor literal, etc.)
Commit: 4f78f8519056953d26102c7426fbb028caf13bc9
https://github.com/llvm/llvm-project/commit/4f78f8519056953d26102c7426fbb028caf13bc9
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAttributes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/decorations.mlir
Log Message:
-----------
[MLIR][SPIRV] Add definition and (de)serialization for cache controls (#115461)
[SPV_INTEL_cache_controls](https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_cache_controls.html)
defines decorations for load and store cache control. Add support for
this extension in the SPIR-V dialect.
As several `CacheControlLoadINTEL` and `CacheControlStoreINTEL` may be
applied to the same value, these are represented as array attributes.
(De)Serialization takes care of this representation.
---------
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: b5bc528c140f6dab6600a64c020cdbf6003e4d35
https://github.com/llvm/llvm-project/commit/b5bc528c140f6dab6600a64c020cdbf6003e4d35
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale_dir/pad_and_output.h
Log Message:
-----------
[libc++] Guard `__pad_and_output` with `_LIBCPP_HAS_LOCALIZATION` (#116580)
This fixes errors for no-localization builds (possibly introduced by
#116223).
Commit: 3fc5bb601ee1072605f1290b246874e01f3c26d9
https://github.com/llvm/llvm-project/commit/3fc5bb601ee1072605f1290b246874e01f3c26d9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
Log Message:
-----------
[Mips] Use getSignedConstant() for signed values (#116405)
This also adds a getSignedTargetConstant() helper, as these seem to be
fairly common in general.
Commit: 9a844a36eb9a21de27882b6193a82fda49986347
https://github.com/llvm/llvm-project/commit/9a844a36eb9a21de27882b6193a82fda49986347
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/cast-mul-select.ll
M llvm/test/Transforms/InstCombine/extract-select-agg.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
Log Message:
-----------
[InstCombine] Use InstSimplify in FoldOpIntoSelect (#116073)
Instead of only trying to constant fold the select arms, try to simplify
them. This subsumes https://github.com/llvm/llvm-project/pull/115969
which implements this for extractvalue only.
This is still fairly limited in that we will usually only call
FoldOpIntoSelect in the first place if we have a constant operand. This
can be relaxed in the future if worthwhile.
Commit: 6a12b43ac00096976a886bd6d3a1b70a804d09ca
https://github.com/llvm/llvm-project/commit/6a12b43ac00096976a886bd6d3a1b70a804d09ca
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .ci/generate_test_report.py
Log Message:
-----------
[ci] Fix error when no junit files are passed to report generator
This resulted in the style being None and despite the report being
empty as well, we tried to send it to the agent and Python can't
send None as an argument.
To fix this return "success" style and also check whether the
report has any content before calling the agent.
Commit: db90673d16e722726aa35fc009cbe6bd0b76b0c0
https://github.com/llvm/llvm-project/commit/db90673d16e722726aa35fc009cbe6bd0b76b0c0
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
Log Message:
-----------
[InstCombine] Re-queue users of phi when nsw/nuw flags of add are inferred (#113933)
This patch re-queue users of phi when one of its incoming add
instructions is updated. If an add instruction is updated, the analysis
results of phis may be improved. Thus we may further fold some users of
this phi node.
See the following case:
```
define i8 @trunc_in_loop_exit_block() {
; CHECK-LABEL: @trunc_in_loop_exit_block(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[IV_NEXT]], [[LOOP_LATCH]] ]
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[IV]], 100
; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_LATCH]], label [[EXIT:%.*]]
; CHECK: loop.latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT: br label [[LOOP]]
; CHECK: exit:
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[PHI]] to i8
; CHECK-NEXT: ret i8 [[TRUNC]]
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
%phi = phi i32 [ 1, %entry ], [ %iv.next, %loop.latch ]
%cmp = icmp ult i32 %iv, 100
br i1 %cmp, label %loop.latch, label %exit
loop.latch:
%iv.next = add i32 %iv, 1
br label %loop
exit:
%trunc = trunc i32 %phi to i8
ret i8 %trunc
}
```
`%iv u< 100` -> infer `nsw/nuw` for `%iv.next = add i32 %iv, 1`
-> `%iv` is non-negative -> infer `samesign` for `%cmp = icmp ult i32
%iv, 100`.
Without re-queuing users of phi nodes, we cannot improve `%cmp` in one
iteration.
Address review comment
https://github.com/llvm/llvm-project/pull/112642#discussion_r1804712271.
This patch also fixes some non-fixpoint issues in tests.
Commit: 4e7682b1c47d4bd81acb6bcb028b48a4ebff9117
https://github.com/llvm/llvm-project/commit/4e7682b1c47d4bd81acb6bcb028b48a4ebff9117
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.cpp
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_ranges-missing-section.s
Log Message:
-----------
[lldb] rm DWARFDebugRanges (#116379)
The class is only used from one place, which is trivial to implement
using the llvm class.
The main difference is that in the new implementation, the ranges are
parsed each time anew (instead of being parsed at startup and cached). I
believe this is fine because:
- this is already how things work with DWARF v5 debug_rnglists
- parsing debug_ranges is fairly fast (definitely faster than rnglists)
- generally, this result will be cached at a higher level anyway.
Browsing the code I did find one instance where that is not the case --
SymbolFileDWARF::ResolveFunctionAndBlock -- which is called each time we
resolve an address (to the block level). However, this function is
already pretty suboptimal: it first traverses the DIE tree (which
involves parsing all the DIE attributes) to find the correct block, then
it parses them again to construct the `lldb_private::Block`
representation, and *then* it uses the ID of the block DIE it found in
the first step to look up the `Block` object. If this turns out to be a
bottleneck, I think there are better ways to optimize it than caching
the debug_ranges parse.
The motiviation for this is that DWARFDebugRanges sorts the block
ranges, even though the order of the ranges is load-bearing (in the
absence of DW_AT_low_pc, the "base address" of a scope is determined by
the first range entry). Delaying the parsing (and sorting) step makes it
easier to access the first entry.
Commit: 0c04d43e8060f7b5bd4745c3400431abb3ad10b6
https://github.com/llvm/llvm-project/commit/0c04d43e8060f7b5bd4745c3400431abb3ad10b6
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[RISCV][NFC] refactor CFI emitting (#114227)
This patch refactor PR https://github.com/llvm/llvm-project/pull/110810
to remove code duplication.
Commit: 2b9edabe969e2f59f067ed7d49e2b0eca5411113
https://github.com/llvm/llvm-project/commit/2b9edabe969e2f59f067ed7d49e2b0eca5411113
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/docs/Dialects/Linalg/OpDSL.md
Log Message:
-----------
[docs] Add deprecation warning to OpDSL.md
As discussed in the forums, we're slowly moving ops away from OpDSL into TableGen. Adding a note to avoid people work on this area downstream.
Commit: 85a2d2df5777b7a0b468ec9c129f91fda1430240
https://github.com/llvm/llvm-project/commit/85a2d2df5777b7a0b468ec9c129f91fda1430240
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
Log Message:
-----------
[gn build] Port 4e7682b1c47d
Commit: 5a48162dc88e0c3db7bc0a63dee0eb3182ef00e3
https://github.com/llvm/llvm-project/commit/5a48162dc88e0c3db7bc0a63dee0eb3182ef00e3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
Log Message:
-----------
[libc++] Remove unnecessary std::vector accessors (#114423)
Now that we don't use __compressed_pair anymore inside std::vector, we
can remove some unnecessary accessors. This is a mechanical replacement
of the __alloc() and __end_cap() accessors, and similar for
std::vector<bool>.
Note that I consistently used this->__alloc_ instead of just __alloc_
since most of the code in <vector> uses that pattern to access members.
I don't think this is necessary anymore (and I'm even less certain I
like this), but I went for consistency with surrounding code. If we want
to change that, we can do a follow-up mechanical change.
Commit: 20d8f8ca1a9de3506c7cad55abcea501a0c57afa
https://github.com/llvm/llvm-project/commit/20d8f8ca1a9de3506c7cad55abcea501a0c57afa
Author: Bruno De Fraine <brunodf at synopsys.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/DebugInfo/X86/global-sra-struct-fit-segment.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/Transforms/GlobalOpt/globalsra-align.ll
A llvm/test/Transforms/GlobalOpt/pr115282.ll
Log Message:
-----------
[GlobalOpt] Fix global SRA incorrect alignment on some elements (#115328)
The logic had a flaw where the alignment from the original aggregate is
unintentionally retained for elements when the calculated known
alignment is not higher than the element's ABI type alignment.
Fixes #115282.
Commit: 20c653c3130899dc2d69003577a48c507891b89e
https://github.com/llvm/llvm-project/commit/20c653c3130899dc2d69003577a48c507891b89e
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
[bazel] port 63b926af5ff43a90dac285bbe0750e41e622eb3f
Commit: 9fc4654462c44569bab950c18d25ca7624f10691
https://github.com/llvm/llvm-project/commit/9fc4654462c44569bab950c18d25ca7624f10691
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Fix mislabeling in calling convention name (NFC)
We have explained how musttail can be guaranteed when the calling
convention is not `swifttailcc` or `tailcc`, ensure what needs to
adhere when it is the opposite case.
Commit: e370946978c3b50cc2716878122be332df554c6f
https://github.com/llvm/llvm-project/commit/e370946978c3b50cc2716878122be332df554c6f
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/member-pointers.cpp
Log Message:
-----------
[lldb] Infer MSInheritanceAttr for CXXRecordDecl with DWARF on Windows (#115177)
Following up from https://github.com/llvm/llvm-project/pull/112928, we
can reuse the approach from Clang Sema to infer the MSInheritanceModel
and add the necessary attribute manually. This allows the inspection of
member function pointers with DWARF on Windows.
Commit: 9d7026500df1023cee67c5bd10119e1ca9805241
https://github.com/llvm/llvm-project/commit/9d7026500df1023cee67c5bd10119e1ca9805241
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
Log Message:
-----------
[RISCV] Correct the precedence in isVRegClass (#116579)
Right shift has higher precedence than bitwise and, so it should be
parentheses around & operator. This case works as expected because
IsVRegClassShift is 0, other cases will fail.
Commit: 37feced61eb576aa93e2ea2dea700246b67e3a62
https://github.com/llvm/llvm-project/commit/37feced61eb576aa93e2ea2dea700246b67e3a62
Author: sondre-teigen <sondre.teigen at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][Tosa] Fix typo in avg_pool2d summary (#116538)
Commit: b64095c795ad0fd264bddd63b834bca431673f04
https://github.com/llvm/llvm-project/commit/b64095c795ad0fd264bddd63b834bca431673f04
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] port e370946978c3b50cc2716878122be332df554c6f
Commit: a6385a3fc8a88f092d07672210a1e773481c2919
https://github.com/llvm/llvm-project/commit/a6385a3fc8a88f092d07672210a1e773481c2919
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[mlir][OpenMP][NFC] use llvm::zip_equal for firstprivate copy region translation (#116416)
I think this is a bit easier to read.
Commit: 2f925d75dee8b4012d747d889ac4bb1d8a31d5a0
https://github.com/llvm/llvm-project/commit/2f925d75dee8b4012d747d889ac4bb1d8a31d5a0
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
Log Message:
-----------
[mlir][Vector] Move insert/extractelement distribution patterns to insert/extract (#116425)
This is a NFC-ish change that moves
vector.extractelement/vector.insertelement vector distribution patterns
to vector.insert/vector.extract.
Before:
0-d/1-d vector.extract -> vector.extractelement -> distributed
vector.extractelement
2-d+ vector.extract -> distributed vector.extract
After:
scalar input vector.extract -> distributed vector.extract
vector.extractelement -> distributed vector.extract
2d+ vector.extract -> distributed vector.extract
The same changes are done for insertelement/insert. The change allows us
to remove reliance on vector.extractelement/vector.insertelement, which
are soon to be depreciated:
https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops/71116/8
No extra tests are included because this patch doesn't introduce /
remove any functionality. It only changes the chain of lowerings. This
change can be completly NFC if we make the distributed operation
vector.extractelement/vector.insertelement, but that is slightly weird,
because you are going from extractelement -> extract -> extractelement.
Commit: ad3b291879b781b974b02091b9115f444fcbf59d
https://github.com/llvm/llvm-project/commit/ad3b291879b781b974b02091b9115f444fcbf59d
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
Log Message:
-----------
[MLIR][SPIRV] Add definition for `SPV_INTEL_split_barrier` ops (#115738)
The [`SPV_INTEL_split_barrier` extension](https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_split_barrier.html)
defines operations to split control barrier semantics in two operations.
Add support for these operations (arrive and wait) to the dialect.
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 030179c2cb113ab35e5cc71229816075e51dd8ab
https://github.com/llvm/llvm-project/commit/030179c2cb113ab35e5cc71229816075e51dd8ab
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
A flang/test/Transforms/debug-class-type.fir
Log Message:
-----------
[flang][debug] Support ClassType. (#114809)
This PR adds the handling of `ClassType`. It is treated as pointer to
the underlying type. Note that `ClassType` when passed to the function
have double indirection so it is represented as pointer to type
(compared to other types which may have a single indirection).
If `ClassType` wraps a pointer or allocatable then we take care to
generate it as PTR -> type (and not PTR -> PTR -> type).
This is how it looks like in the debugger.
```
subroutine test_proc (this)
class(test_type), intent (inout) :: this
allocate (this%b (3, 2))
call fill_array_2d (this%b)
print *, this%a
end
```
```
(gdb) p this
$6 = (PTR TO -> ( Type test_type )) 0x2052a0
(gdb) p this%a
$7 = 0
(gdb) p this%b
$8 = ((1, 2, 3) (4, 5, 6))
```
Commit: c25c6c32494c8d1038438b6208d42ba40f25270e
https://github.com/llvm/llvm-project/commit/c25c6c32494c8d1038438b6208d42ba40f25270e
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/unittests/Host/MainLoopTest.cpp
Log Message:
-----------
[lldb] Unify/improve MainLoop signal handling (#115197)
Change the signal handler to use a pipe to notify about incoming
signals. This has two benefits:
- the signal no longer has to happen on the MainLoop thread. With the
previous implementation, this had to be the case as that was the only
way to ensure that ppoll gets interrupted correctly. In a multithreaded
process, this would mean that all other threads have to have the signal
blocked at all times.
- we don't need the android-specific workaround, which was necessary due
to the syscall being implemented in a non-atomic way
When the MainLoop class was first implemented, we did not have the
interrupt self-pipe, so syscall interruption was the most
straight-forward implementation. Over time, the class gained new
abilities (the pipe being one of them), so we can now piggy-back on
those.
This patch also changes the kevent-based implementation to use the pipe
for signal notification as well. The motivation there is slightly
different:
- it makes the implementations more uniform
- it makes sure we handle all kinds of signals, like we do with the
linux version (EVFILT_SIGNAL only catches process-directed signals)
Commit: 1e4646d8191b13ac9c4d8c2cd3bb20a184f1966f
https://github.com/llvm/llvm-project/commit/1e4646d8191b13ac9c4d8c2cd3bb20a184f1966f
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in reduce add function. (#116243)
Part of #51787.
This patch adds constexpr support for the built-in reduce add function.
If this is the right way to go, I will add support for other reduce
functions in later patches.
---------
Co-authored-by: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Commit: 4c4a4134d5c0a0f9476b157862d378a7e571e9f0
https://github.com/llvm/llvm-project/commit/4c4a4134d5c0a0f9476b157862d378a7e571e9f0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Lower/OpenMP/Todo/defaultmap-clause.f90
M flang/test/Lower/OpenMP/Todo/task_detach.f90
M flang/test/Lower/OpenMP/Todo/task_untied.f90
A flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v50.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
Log Message:
-----------
[flang][OpenMP] Update frontend support for DEFAULTMAP clause (#116506)
Add ALL variable category, implement semantic checks to verify the
validity of the clause, improve error messages, add testcases.
The variable category modifier is optional since 5.0, make sure we allow
it to be missing. If it is missing, assume "all" in clause conversion.
Commit: 696c108703896e528c6b88824ba10402261f8635
https://github.com/llvm/llvm-project/commit/696c108703896e528c6b88824ba10402261f8635
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/test/MinGW/driver.test
Log Message:
-----------
[LLD][MinGW] Add support for --functionpadmin option (#116511)
This introduces the MinGW counterpart of `lld-link`'s `-functionpadmin`.
Commit: 40ea61b41d3b70ccf39d5ec11ac54100c9b0b388
https://github.com/llvm/llvm-project/commit/40ea61b41d3b70ccf39d5ec11ac54100c9b0b388
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw.cpp
Log Message:
-----------
[Clang][MinGW] Pass --functionpadmin to the linker when -fms-hotpatch is used (#116512)
Commit: 748a29f052749b9938480edbf29717bd6742fc66
https://github.com/llvm/llvm-project/commit/748a29f052749b9938480edbf29717bd6742fc66
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__memory/allocator_arg_t.h
Log Message:
-----------
[libc++][NFC] Fix incorrect include guard
Commit: 222f6aff3db1cfee0a1461482584dc374886da73
https://github.com/llvm/llvm-project/commit/222f6aff3db1cfee0a1461482584dc374886da73
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_util.h
Log Message:
-----------
[libc] Remove more libc dependencies from the RPC header (#116437)
Summary:
The end goal is to make `rpc.h` a standalone header so that other
projects can include it without leaking `libc` internals. I'm trying to
replace stuff slowly before pulling it out all at once to reduce the
size of the changes.
This patch removes the atomic and a few sparse dependencies. Now we
mostly rely on the GPU utils, the sleep function, optional, and the
type traits. I'll clean these up in future patches. This removed the old
stuff I had around the memcpy, but I think that it's not quite as bad as
it once was, as it removes a branch and only uses a few extra VGPRs
since I believe the builtin memcpy was improved for AMD.
Commit: 32506126fb9c7fa38f215ec2fafa3ad4f17469db
https://github.com/llvm/llvm-project/commit/32506126fb9c7fa38f215ec2fafa3ad4f17469db
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/test/tools/llvm-readobj/ELF/reloc-types-aarch64.test
Log Message:
-----------
[PAC][llvm-readobj][ELF][AArch64] Define static AUTH TLSDESC relocations (#113716)
See specification https://github.com/ARM-software/abi-aa/pull/295
Commit: 756fe54dc7f7e7fcdfefb11d8f51b1687322daf7
https://github.com/llvm/llvm-project/commit/756fe54dc7f7e7fcdfefb11d8f51b1687322daf7
Author: Steven Perron <stevenperron at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
Log Message:
-----------
[SPIRV] Add write to image buffer for shaders. (#115927)
This commit adds an intrinsic that will write to an image buffer. We
chose to match the name of the DXIL intrinsic for simplicity in clang.
We cannot reuse the existing openCL write_image function because that is
not a reserved name in HLSL. There is not much common code to factor
out.
Commit: a52cb0a2b9c44cdd3b36e414b8d2b809ec8b2ec8
https://github.com/llvm/llvm-project/commit/a52cb0a2b9c44cdd3b36e414b8d2b809ec8b2ec8
Author: Romain Thomas <7450402+romainthomas at users.noreply.github.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
Log Message:
-----------
[PDB] Fix missing `consumeError` which raise error with asserts enabled (#116480)
As mentioned in the title, the missing `consumeError` triggers assertions.
Commit: abda8ce2ee2ad35af7f069fab851adaa4646d0ef
https://github.com/llvm/llvm-project/commit/abda8ce2ee2ad35af7f069fab851adaa4646d0ef
Author: André Rösti <an.roesti at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
M llvm/lib/MCA/HardwareUnits/LSUnit.cpp
M llvm/lib/MCA/HardwareUnits/Scheduler.cpp
Log Message:
-----------
llvm-mca: Disentangle `MemoryGroup` from `LSUnitBase` (#114159)
In MCA, the load/store unit is modeled through a `LSUnitBase` class.
Judging from the name `LSUnitBase`, I believe there is an intent to
allow for different specialized load/store unit implementations.
(However, currently there is only one implementation used in-tree,
`LSUnit`.)
PR #101534 fixed one instance where the specialized `LSUnit` was
hard-coded, opening the door for other subclasses to be used, but what
subclasses can do is, in my opinion, still overly limited due to a
reliance on the `MemoryGroup` class, e.g.
[here](https://github.com/llvm/llvm-project/blob/8b55162e195783dd27e1c69fb4d97971ef76725b/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#L88).
The `MemoryGroup` class is currently used in the default `LSUnit`
implementation to model data dependencies/hazards in the pipeline.
`MemoryGroups` form a graph of memory dependencies that inform the
scheduler when load/store instructions can be executed relative to each
other.
In my eyes, this is an implementation detail. Other `LSUnit`s may want
to keep track of data dependencies in different ways. As a concrete
example, a downstream use I am working on<sup>[1]</sup> uses a custom
load/store unit that makes use of available aliasing information. I
haven't been able to shoehorn our additional aliasing information into
the existing `MemoryGroup` abstraction. I think there is no need to
force subclasses to use `MemoryGroup`s; users of `LSUnitBase` are only
concerned with when, and for how long, a load/store instruction
executes.
This PR makes changes to instead leave it up to the subclasses how to
model such dependencies, and only prescribes an abstract interface in
`LSUnitBase`. It also moves data members and methods that are not
necessary to provide an abstract interface from `LSUnitBase` to the
`LSUnit` subclass. I decided to make the `MemoryGroup` a protected
subclass of `LSUnit`; that way, specializations may inherit from
`LSUnit` and still make use of `MemoryGroup`s if they wish to do so
(e.g. if they want to only overwrite the `dispatch` method).
**Drawbacks / Considerations**
My reason for suggesting this PR is an out-of-tree use. As such, these
changes don't introduce any new functionality for in-tree LLVM uses.
However, in my opinion, these changes improve code clarity and prescribe
a clear interface, which would be the main benefit for the LLVM
community.
A drawback of the more abstract interface is that virtual dispatching is
used in more places. However, note that virtual dispatch is already
currently used in some critical parts of the `LSUnitBase`, e.g. the
`isAvailable` and `dispatch` methods. As a quick check to ensure these
changes don't significantly negatively impact performance, I also ran
`time llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2
-iterations=3000 llvm/test/tools/llvm-mca/X86/BtVer2/dot-product.s`
before and after the changes; there was no observable difference in
runtimes (`0.292 s` total before, `0.286 s` total after changes).
<sup>[1]: MCAD started by @mshockwave and @chinmaydd.</sup>
Commit: 6e1acdcdc1b33c8d3cccf09b8d38279eef2ba69e
https://github.com/llvm/llvm-project/commit/6e1acdcdc1b33c8d3cccf09b8d38279eef2ba69e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Host/posix/MainLoopPosix.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Host/posix/MainLoopPosix.cpp:64:11: error: unused
variable 'bytes_written' [-Werror,-Wunused-variable]
Commit: 834dfd23155351c9885eddf7b9664f7697326946
https://github.com/llvm/llvm-project/commit/834dfd23155351c9885eddf7b9664f7697326946
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
R clang/include/clang/Parse/ParseDiagnostic.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/module.modulemap
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
Log Message:
-----------
[Parse] Remove ParseDiagnostic.h (#116496)
This patch removes clang/Parse/ParseDiagnostic.h because it just
forwards to clang/Basic/DiagnosticParse.h.
Commit: ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52
https://github.com/llvm/llvm-project/commit/ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRFrameLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRSubtarget.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetObjectFile.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.cpp
M llvm/lib/Target/BPF/BPFIRPeephole.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFPreserveDIType.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/GISel/BPFCallLowering.cpp
M llvm/lib/Target/BPF/GISel/BPFInstructionSelector.cpp
M llvm/lib/Target/BPF/GISel/BPFLegalizerInfo.cpp
M llvm/lib/Target/BPF/GISel/BPFRegisterBankInfo.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSubtarget.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
M llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp
M llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
M llvm/lib/Target/SystemZ/SystemZTDC.cpp
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/LVLGen.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEFrameLowering.cpp
M llvm/lib/Target/VE/VEISelDAGToDAG.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VERegisterInfo.cpp
M llvm/lib/Target/VE/VESubtarget.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
Log Message:
-----------
[Target] Remove unused includes (NFC) (#116577)
Identified with misc-include-cleaner.
Commit: 8f8016fe66dd260b03a4d1c2b50636e36e02942b
https://github.com/llvm/llvm-project/commit/8f8016fe66dd260b03a4d1c2b50636e36e02942b
Author: Hugh Delaney <hugh.delaney at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
A llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
A llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
Log Message:
-----------
[NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (#114977)
Add patterns to lower `fmaxnum(fma(a, b, c), 0)` to `fma.rn{.ftz}.relu`
for `f16`, `f16x2`, `bf16`, `bf16x2` types, when `nnan` is used.
`fma_relu` honours `NaN`, so the substitution is only made if the `fma`
is `nnan`, since `fmaxnum` returns the non NaN argument when passed a
NaN value.
This patch also removes some `bf16` ftz instructions since `FTZ` is not
supported with the `bf16` type, according to the PTX ISA docs.
Commit: c25e09e238c6f872a116d10bbefba0beff145a57
https://github.com/llvm/llvm-project/commit/c25e09e238c6f872a116d10bbefba0beff145a57
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/GenerateInput.h
Log Message:
-----------
[libc++][test] Speed up input generating functions for benchmark tests (#115544)
The input generating functions for benchmark tests in the GenerateInput.h
file can be slightly improved by invoking vector::reserve before calling
vector::push_back. This slight performance improvement could potentially
speed-up all benchmark tests for containers and algorithms that use these
functions as inputs.
Commit: 52361d0368b79841be12156bf03cf8c1851e5df7
https://github.com/llvm/llvm-project/commit/52361d0368b79841be12156bf03cf8c1851e5df7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
Log Message:
-----------
[ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627)
This patch bails out non-dedicated exits to avoid adding exiting
conditions to invalid context.
Closes https://github.com/llvm/llvm-project/issues/116553.
Commit: dcd62070cf45f793f321fecdb4139a79628c4132
https://github.com/llvm/llvm-project/commit/dcd62070cf45f793f321fecdb4139a79628c4132
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
A flang/test/Lower/OpenMP/Todo/depend-clause-depobj.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
Log Message:
-----------
[Flang][OpenMP] Error gracefully for dependence-type with depobj (#116621)
It also modifies the error message to specify it is the dependence-type
that is not supported.
Resolves the crash in
https://github.com/llvm/llvm-project/issues/115647. A fix can come in
later as part of future OpenMP version support.
Commit: ceeb08b9e0a51a4d2e0804baeb579fe8a6485885
https://github.com/llvm/llvm-project/commit/ceeb08b9e0a51a4d2e0804baeb579fe8a6485885
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/Makefile
R lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
Revert "[lldb-dap] Support column breakpoints (#113787)"
This reverts commit 4f48a81a620bc9280be4780f3554cdc9bda55bd3.
The newly added test was failing on the public macOS Arm64 bots:
```
======================================================================
FAIL: test_column_breakpoints (TestDAP_breakpointLocations.TestDAP_setBreakpoints)
Test retrieving the available breakpoint locations.
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py", line 77, in test_column_breakpoints
self.assertEqual(
AssertionError: Lists differ: [{'co[70 chars]e': 41}, {'column': 3, 'line': 42}, {'column': 18, 'line': 42}] != [{'co[70 chars]e': 42}, {'column': 18, 'line': 42}]
First differing element 2:
{'column': 3, 'line': 41}
{'column': 3, 'line': 42}
First list contains 1 additional elements.
First extra element 4:
{'column': 18, 'line': 42}
[{'column': 39, 'line': 40},
{'column': 51, 'line': 40},
- {'column': 3, 'line': 41},
{'column': 3, 'line': 42},
{'column': 18, 'line': 42}]
Config=arm64-/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang
----------------------------------------------------------------------
Ran 1 test in 1.554s
FAILED (failures=1)
```
Commit: 68a3908148c6b6424b1ad4d0ed19d56435252832
https://github.com/llvm/llvm-project/commit/68a3908148c6b6424b1ad4d0ed19d56435252832
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
Log Message:
-----------
emitc: func: Set default dialect to 'emitc' (#116297)
Makes `emitc.func` implement the `OpAsmOpInterface` and overwrite the
`getDefaultDialect`. This allows ops inside `emitc.func`'s body to omit
the 'emitc.' prefix in the assembly.
Commit: b7d635ed30da49cc32b5b46d00e67ecc3ff9522f
https://github.com/llvm/llvm-project/commit/b7d635ed30da49cc32b5b46d00e67ecc3ff9522f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
AMDGPU: Copy correct predicates for SDWA reals (#116288)
There are a lot of messes in the special case
predicate handling. Currently broad let blocks
override specific predicates with more general
cases. For instructions with SDWA, the HasSDWA
predicate was overriding the SubtargetPredicate
for the instruction.
This fixes enough to properly disallow new instructions
that support SDWA on older targets.
Commit: 6bf8f08989420ccd10efed5fac88052ca16e1250
https://github.com/llvm/llvm-project/commit/6bf8f08989420ccd10efed5fac88052ca16e1250
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfWriter.h
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Add InstrProfWriter::addMemProfData (#116528)
This patch adds InstrProfWriter::addMemProfData, which adds the
complete MemProf profile (frames, call stacks, and records) to the
writer context.
Without this function, functions like loadInput in llvm-profdata.cpp
and InstrProfWriter::mergeRecordsFromWriter must add one item (frame,
call stack, or record) at a time. The new function std::moves the
entire MemProf profile to the writer context if the destination is
empty, which is the common use case. Otherwise, we fall back to
adding one item at a time behind the scene.
Here are a couple of reasons why we should add this function:
- We've had a bug where we forgot to add one of the three data
structures (frames, call stacks, and records) to the writer context,
resulting in a nearly empty indexed profile. We should always
package the three data structures together, especially on API
boundaries.
- We expose a little too much of the MemProf detail to
InstrProfWriter. I'd like to gradually transform
InstrProfReader/Writer to entities managing buffers (sequences of
bytes), with actual serialization/deserialization left to external
classes. We already do some of this in InstrProfReader, where
InstrProfReader "contracts out" to IndexedMemProfReader to handle
MemProf details.
I am not changing loadInput or InstrProfWriter::mergeRecordsFromWriter
for now because MemProfReader uses DenseMap for frames and call
stacks, whereas MemProfData uses MapVector. I'll resolve these
mismatches in subsequent patches.
Commit: 4092c0deef466e5b96a221e4066a78ae72efa7af
https://github.com/llvm/llvm-project/commit/4092c0deef466e5b96a221e4066a78ae72efa7af
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF,ARM] Move global sectionMap into the ARM class
Otherwise, LLD_IN_TEST=2 testing arm-plt-reloc.s crashes.
Follow-up to https://reviews.llvm.org/D150870
Commit: 2444b6f0df56d2aeb0ae6dce946443b23a3a9d3b
https://github.com/llvm/llvm-project/commit/2444b6f0df56d2aeb0ae6dce946443b23a3a9d3b
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
Log Message:
-----------
[llvm-objcopy] Replace custom -- parsing with DashDashParsing
The custom -- parsing from https://reviews.llvm.org/D102665 can be
replaced with the generic feature from https://reviews.llvm.org/D152286
Pull Request: https://github.com/llvm/llvm-project/pull/116565
Commit: c9260e21d092c3acbb77bb9f6fcd0820f6a138c1
https://github.com/llvm/llvm-project/commit/c9260e21d092c3acbb77bb9f6fcd0820f6a138c1
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeLayout] Do not rebuild chains with -apply-ext-tsp-for-size (#115934)
https://github.com/llvm/llvm-project/pull/109711 disables
`buildCFGChains()` when `-apply-ext-tsp-for-size` is used to improve
codesize. Tail merging can change the layout and normally requires
`buildCFGChains()` to be called again, but we want to prevent this when
optimizing for codesize. We saw slight size improvement on large
binaries with this change. If `-apply-ext-tsp-for-size` is not used,
this should be a NFC.
Commit: 1c4caece05f1885ba6ed80755d6b5de1b9f99579
https://github.com/llvm/llvm-project/commit/1c4caece05f1885ba6ed80755d6b5de1b9f99579
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
Log Message:
-----------
[Mips] Use APInt::isMask/isShiftedMask to simplify code. (#116582)
Commit: de2e270ee6fb29cfb7730dcf6aaa2552cd4a5efd
https://github.com/llvm/llvm-project/commit/de2e270ee6fb29cfb7730dcf6aaa2552cd4a5efd
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize box when src or dst are rebox (#116494)
Commit: 9161e6ab745adeef67a129b4e1b6724f026125f0
https://github.com/llvm/llvm-project/commit/9161e6ab745adeef67a129b4e1b6724f026125f0
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Add debug checker to compare IR before/after a revert (#115968)
This will help us catch mistakes in change tracking. It's only enabled
when EXPENSIVE_CHECKS are enabled.
Commit: 4615cc38f35d111f09073f51cc734e29c9211067
https://github.com/llvm/llvm-project/commit/4615cc38f35d111f09073f51cc734e29c9211067
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
A llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
A llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
Log Message:
-----------
[RISCV] Inline Assembly Support for GPR Pairs ('R') (#112983)
This patch adds support for getting even-odd general purpose register
pairs into and out of inline assembly using the `R` constraint as
proposed in riscv-non-isa/riscv-c-api-doc#92
There are a few different pieces to this patch, each of which need their
own explanation.
- Renames the Register Class used for f64 values on rv32i_zdinx from
`GPRPair*` to `GPRF64Pair*`. These register classes are kept broadly
unmodified, as their primary value type is used for type inference
over selection patterns. This rename affects quite a lot of files.
- Adds new `GPRPair*` register classes which will be used for `R`
constraints and for instructions that need an even-odd GPR pair. This
new type is used for `amocas.d.*`(rv32) and `amocas.q.*`(rv64) in
Zacas, instead of the `GPRF64Pair` class being used before.
- Marks the new `GPRPair` class legal as for holding a `MVT::Untyped`.
Two new RISCVISD node types are added for creating and destructing a
pair - `BuildGPRPair` and `SplitGPRPair`, and are introduced when
bitcasting to/from the pair type and `untyped`.
- Adds functionality to `splitValueIntoRegisterParts` and
`joinRegisterPartsIntoValue` to handle changing `i<2*xlen>` MVTs into
`untyped` pairs.
- Adds an override for `getNumRegisters` to ensure that `i<2*xlen>`
values, when going to/from inline assembly, only allocate one (pair)
register (they would otherwise allocate two). This is due to a bug in
SelectionDAGBuilder.cpp which other backends also work around.
- Ensures that Clang understands that `R` is a valid inline assembly
constraint.
- This also allows `R` to be used for `f64` types on `rv32_zdinx`
architectures, where doubles are stored in a GPR pair.
Commit: 0ae58c45330d7b66eabf3db2684aa53144c06063
https://github.com/llvm/llvm-project/commit/0ae58c45330d7b66eabf3db2684aa53144c06063
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
Revert "[SandboxIR] Add debug checker to compare IR before/after a revert" (#116666)
Reverts llvm/llvm-project#115968. It caused buildbot failures.
Commit: 900c0565314618ec142b020cea1f9c86e2f8282b
https://github.com/llvm/llvm-project/commit/900c0565314618ec142b020cea1f9c86e2f8282b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV] Add an implementation of findRepresentativeClass to assign i32 to GPRRegClass for RV64. (#116165)
This is an alternative fix for #81192. This allows the SelectionDAG
scheduler to be able to find a representative register class for i32 on
RV64. The representative register class is the super register class with
the largest spill size that is also legal. The default implementation of
findRepresentativeClass only works for legal types which i32 is not for
RV64.
I did some investigation of why tablegen uses i32 in output patterns on
RV64. It appears it comes down to a function called
ForceArbitraryInstResultType that picks a type for the output
pattern when the isel pattern isn't specific enough. I believe it picks
the smallest type(lowested numbered) to resolve the conflict.
A similar issue occurs for f16 and bf16 which both use the FPR16
register class. If the isel pattern doesn't specify, tablegen may find
both f16 and bf16 and may pick bf16 from Zfh pattern when Zfbfmin isn't
present. Since bf16 isn't legal in that case, findRepresentativeClass
will fail.
For i8, i16, i32, this patch calls the base class with XLenVT to get the
representative class since XLenVT is always legal.
For bf16/f16, we call the base class with f32 since all of the f16/bf16
extensions depend on either F or Zfinx which will make f32 a legal type.
The final representative register class further depends on whether D or
Zdinx is also enabled, but that should be handled by the default
implementation.
Commit: 589ab28d87616006d7f8cf2402379811e2a6183f
https://github.com/llvm/llvm-project/commit/589ab28d87616006d7f8cf2402379811e2a6183f
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBBreakpointName.h
Log Message:
-----------
[lldb][sbapi][NFC] Remove commented out typedef from SBBreakpointName (#116434)
SBBreakpointName has a typedef for BreakpointHitCallback used in
SetCallback(), but this typedef has been commented out in
SBBreakpointName and added instead to SBDefines. Since SB API callbacks
are placed in SBDefines, this commit removes this commented out portion.
Commit: a7b2e73bcaa91255a20f1f2e692bec9eb6c17022
https://github.com/llvm/llvm-project/commit/a7b2e73bcaa91255a20f1f2e692bec9eb6c17022
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Add support for reading the dynamic symbol table from PT_DYNAMIC (#112596)
Allow LLDB to parse the dynamic symbol table from an ELF file or memory
image in an ELF file that has no section headers. This patch uses the
ability to parse the PT_DYNAMIC segment and find the DT_SYMTAB,
DT_SYMENT, DT_HASH or DT_GNU_HASH to find and parse the dynamic symbol
table if the section headers are not present. It also adds a helper
function to read data from a .dynamic key/value pair entry correctly
from the file or from memory.
Commit: ab4253f6dff194a1e09448c8628809d21f148df9
https://github.com/llvm/llvm-project/commit/ab4253f6dff194a1e09448c8628809d21f148df9
Author: Michele Scandale <michele.scandale at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/PassManager.h
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
M llvm/unittests/Analysis/PluginInlineOrderAnalysisTest.cpp
Log Message:
-----------
[Analysis] Remove global state from `PluginInline{Advisor,Order}Analysis`. (#114615)
The plugin analysis for `InlineAdvisor` and `InlineOrder` currently
relies on shared global state to keep track if the analysis is
available.
This causes issues when pipelines using plugins and pipelines not using
plugins are run in the same process.
The shared global state can be easily replaced by checking in the given
instance of `ModuleAnalysisManager` if the plugin analysis has been
registered.
Commit: ed8ebad6eb84af60d1c1a8826f55d4d347d2e7bd
https://github.com/llvm/llvm-project/commit/ed8ebad6eb84af60d1c1a8826f55d4d347d2e7bd
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
Log Message:
-----------
[SelectionDAG] Support integer promotion for VP_LOAD and VP_STORE (#81299)
Add integer promotion support for for VP_LOAD and VP_STORE via legalization of extend
and truncate of each form.
Patch commandeered from: https://reviews.llvm.org/D109377
Commit: 18be88e20abd9046217d79954c0477ee01ddd2f3
https://github.com/llvm/llvm-project/commit/18be88e20abd9046217d79954c0477ee01ddd2f3
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x2-instructions.ll
Log Message:
-----------
[NVPTX][NFC] Regenerate some tests checks (#116605)
Use update_llc_test_checks.py to automate the test checks in some files
I was observing changes in locally.
Commit: a6fc489bb7a2e9fb3a7f70cccc181e4ee70374bf
https://github.com/llvm/llvm-project/commit/a6fc489bb7a2e9fb3a7f70cccc181e4ee70374bf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/MC/AMDGPU/flat-scratch-gfx940.s
M llvm/test/MC/AMDGPU/gfx940_asm_features.s
A llvm/test/MC/AMDGPU/gfx950-unsupported.s
A llvm/test/MC/AMDGPU/gfx950_invalid_encoding.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
M offload/DeviceRTL/CMakeLists.txt
Log Message:
-----------
AMDGPU: Add gfx950 subtarget definitions (#116307)
Mostly a stub, but adds some baseline tests and
tests for removed instructions.
Commit: cab732861c4885b714c70f2945de9f1dd4d725fa
https://github.com/llvm/llvm-project/commit/cab732861c4885b714c70f2945de9f1dd4d725fa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
Log Message:
-----------
AMDGPU: Add subtarget features for minimum3/maximum3 instructions (#116308)
gfx12 and gfx950 managed to produce 3 different permutations of this feature.
gfx12 supports f32 and f16, and gfx950 supports f32 and v2f16.
Commit: 5a556d55fb753d7e6e7a310a3fc0f7e83f8f9144
https://github.com/llvm/llvm-project/commit/5a556d55fb753d7e6e7a310a3fc0f7e83f8f9144
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
A llvm/test/CodeGen/AMDGPU/lds-limit-diagnostics.ll
A llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
A llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx950.ll
A llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx950.s
Log Message:
-----------
AMDGPU: Increase the LDS size to support to 160 KB for gfx950 (#116309)
Commit: ca1b35a6c80d7075f4058c642d8c015e4fc8d304
https://github.com/llvm/llvm-project/commit/ca1b35a6c80d7075f4058c642d8c015e4fc8d304
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.prng.ll
A llvm/test/MC/AMDGPU/gfx950_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx950_asm_vop1_dpp16.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop1.txt
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Add v_prng_b32 instruction for gfx950 (#116310)
Rand num instruction for stochastic rounding.
Commit: de5e4ebb5a1b82df5b1d27f423dbad30f872aac6
https://github.com/llvm/llvm-project/commit/de5e4ebb5a1b82df5b1d27f423dbad30f872aac6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/bit
M libcxx/include/charconv
M libcxx/include/compare
M libcxx/include/expected
M libcxx/include/mdspan
M libcxx/include/memory_resource
M libcxx/include/ranges
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
Log Message:
-----------
[libc++] Remove transitive includes from empty headers (#116295)
This removes transitive includes that are only in a header that is empty
in a given C++ version.
Commit: 486e1d91e30068381f7ef4157361fe35c15abdee
https://github.com/llvm/llvm-project/commit/486e1d91e30068381f7ef4157361fe35c15abdee
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[RISCV][docs] Release Notes
These cover recent additions and changes to assembly and inline assembly
support.
Commit: 85ef9666c892d5e11fce3a0b84e4eaf4603256ee
https://github.com/llvm/llvm-project/commit/85ef9666c892d5e11fce3a0b84e4eaf4603256ee
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/future
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/thread/futures/futures.async/async.pass.cpp
Log Message:
-----------
[libc++] Avoid including all of <thread> in <future> (#116541)
Commit: 3b8606be547acbc7ae93d943645e6d6c83f66983
https://github.com/llvm/llvm-project/commit/3b8606be547acbc7ae93d943645e6d6c83f66983
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
Re-land "[SandboxIR] Add debug checker to compare IR before/after a revert (#115968)" (#116671)
This PR re-lands https://github.com/llvm/llvm-project/pull/115968 with a
fix for a buildbot failure.
The `IRSnapshotChecker` class is only defined in debug mode, so its unit
tests must also be inside `#ifndef NDEBUG`.
Commit: f14e1a8597f83fa5bbc78befcb7059144d58ff5c
https://github.com/llvm/llvm-project/commit/f14e1a8597f83fa5bbc78befcb7059144d58ff5c
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
R lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Revert "Add support for reading the dynamic symbol table from PT_DYNAMIC (#112596)"
This reverts commit a7b2e73bcaa91255a20f1f2e692bec9eb6c17022.
This patch broke the greendragon bot
Failed Tests (10):
lldb-api :: python_api/sbplatform/TestLocateModuleCallback.py
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithModuleAndSymbol
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithOnlySymbol
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithSymbolAsModule
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithSymbolAsModuleAndSymbol
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithSymbolByPlatformUUID
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleWithCachedModuleAndSymbol
lldb-unit :: Target/./TargetTests/ModuleCacheTest/GetAndPut
lldb-unit :: Target/./TargetTests/ModuleCacheTest/GetAndPutStrangeHostname
lldb-unit :: Target/./TargetTests/ModuleCacheTest/GetAndPutUuidExists
Commit: b769e3544a763a90abefd0dbe9254d83c765e1dc
https://github.com/llvm/llvm-project/commit/b769e3544a763a90abefd0dbe9254d83c765e1dc
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
Log Message:
-----------
[clang][serialization] Blobify IMPORTS strings and signatures (#116095)
This PR changes a part of the PCM format to store string-like things in
the blob attached to a record instead of VBR6-encoding them into the
record itself. Applied to the `IMPORTS` section (which is very hot),
this speeds up dependency scanning by 2.8%.
Commit: 7b525495e8574285c19188be11e7ef8a51382ff3
https://github.com/llvm/llvm-project/commit/7b525495e8574285c19188be11e7ef8a51382ff3
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
Log Message:
-----------
[test][PGO] Use -fprofile-update=atomic instead of mllvm option in ContinuousSyncMode/online-merging.c
Commit: 842fd1537521d38913aec5c9a081afedf97d88fe
https://github.com/llvm/llvm-project/commit/842fd1537521d38913aec5c9a081afedf97d88fe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
M llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
Log Message:
-----------
[llvm-exegesis] Add explicit support for setting DF in X86 (#115644)
While llvm-exegesis has explicit support for setting EFLAGS which
contains DF, it can be nice sometimes to explicitly set DF, especially
given that it is modeled as a separate register within LLVM. This patch
adds the ability to do that by lowering setting the value to 0 or 1 to
cld and std respectively.
Commit: 3d172f3dff25ce70f7158330ac4068e48e2b364d
https://github.com/llvm/llvm-project/commit/3d172f3dff25ce70f7158330ac4068e48e2b364d
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
Log Message:
-----------
[Linker] Remove dead code handling recursive types. NFC. (#116652)
Commit: eac02611048a81bd78e461b651158c3c6557cb74
https://github.com/llvm/llvm-project/commit/eac02611048a81bd78e461b651158c3c6557cb74
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
Log Message:
-----------
[Linker] Remove a use of StructType::setBody. NFC. (#116653)
This falls out naturally after inlining finishType into its only
remaining use.
Commit: 1d0b2851224b1ef97c49faac2c666535f1997363
https://github.com/llvm/llvm-project/commit/1d0b2851224b1ef97c49faac2c666535f1997363
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/test/Shell/Unwind/windows-unaligned-x86_64.test
Log Message:
-----------
[lldb] Relax check for breakpoint site in Unwind/windows-unaligned-x86_64.test (#115318)
This test checks the thread backtrace for entries of intermediate frames
that aren't aligned to 16 bytes. In order to do that, it sets a single
breakpoint and makes sure we stop there. It seems sufficient, however,
to check that we hit the breakpoint itself and not which particular
site.
Commit: ac17b50f50bad5c1cc306e1813322ed2ae6e1ef0
https://github.com/llvm/llvm-project/commit/ac17b50f50bad5c1cc306e1813322ed2ae6e1ef0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV] Use getSignedTargetConstant. NFC
Commit: 6a863f7e2679a60f2f38ae6a920d0b6e1a2c1690
https://github.com/llvm/llvm-project/commit/6a863f7e2679a60f2f38ae6a920d0b6e1a2c1690
Author: lntue <lntue at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/tanhf16.cpp
Log Message:
-----------
[libc] Fix signed zeros for exp10m1f16 and tanhf16. (#116654)
Commit: e59582b6f8f1be3e675866f6a5d661eb4c8ed448
https://github.com/llvm/llvm-project/commit/e59582b6f8f1be3e675866f6a5d661eb4c8ed448
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libc/fuzzing/__support/hashtable_fuzz.cpp
M libc/src/__support/HashTable/generic/bitmask_impl.inc
M libc/src/__support/hash.h
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/HashTable/table_test.cpp
Log Message:
-----------
[libc] avoid type-punning with inactive union member (#116685)
Commit: ce0cc8e9eb1ee5613a6fb442179a92c3fabf27c5
https://github.com/llvm/llvm-project/commit/ce0cc8e9eb1ee5613a6fb442179a92c3fabf27c5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/VE/VEInstrInfo.td
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[AArch64][VE][X86] Use getSignedTargetConstant. NFC
Commit: cde4ae789e4a2f408d06d2b0045cca22c201c47b
https://github.com/llvm/llvm-project/commit/cde4ae789e4a2f408d06d2b0045cca22c201c47b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
Log Message:
-----------
[ARM] Use getSignedTargetConstant. NFC
Commit: b42a81631491571c4b78d095917ebdddee69b04f
https://github.com/llvm/llvm-project/commit/b42a81631491571c4b78d095917ebdddee69b04f
Author: jimingham <jingham at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanStack.h
M lldb/source/Target/ThreadPlanStack.cpp
Log Message:
-----------
Convert ThreadPlanStack's mutex to a shared mutex. (#116438)
I have some reports of A/B inversion deadlocks between the
ThreadPlanStack and the StackFrameList accesses. There's a fair bit of
reasonable code in lldb that does "While accessing the ThreadPlanStack,
look at that threads's StackFrameList", and also plenty of "While
accessing the ThreadPlanStack, look at the StackFrameList."
In all the cases I've seen so far, there was at most one of the locks
taken that were trying to mutate the list, the other three were just
reading. So we could solve the deadlock by converting the two mutexes
over to shared mutexes.
This patch is the easy part, the ThreadPlanStack mutex.
The tricky part was because these were originally recursive mutexes, and
recursive access to shared mutexes is undefined behavior according to
the C++ standard, I had to add a couple NoLock variants to make sure it
didn't get used recursively. Then since the only remaining calls are out
to ThreadPlans and ThreadPlans don't have access to their containing
ThreadPlanStack, converting this to a non-recursive lock should be safe.
Commit: e44c28f07ede2bd693e2372317880f57a635fa73
https://github.com/llvm/llvm-project/commit/e44c28f07ede2bd693e2372317880f57a635fa73
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticRefactoringKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-inline.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-weak.c
M clang/test/CodeGen/PowerPC/musttail-indirect.cpp
M clang/test/CodeGen/PowerPC/musttail-inline.c
M clang/test/CodeGen/PowerPC/musttail-undefined.c
M clang/test/CodeGen/PowerPC/musttail-weak.c
M clang/test/CodeGen/PowerPC/musttail.c
M clang/test/CodeGen/X86/x86_64-PR42672.c
M clang/test/Driver/module-output.cppm
M clang/test/Misc/pragma-attribute-strict-subjects.c
M clang/test/Modules/no-eager-load.cppm
M clang/test/Modules/same-decl-in-different-modules.cppm
M clang/test/OpenMP/for_simd_loop_messages.cpp
M clang/test/OpenMP/masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/parallel_for_simd_messages.cpp
M clang/test/OpenMP/parallel_masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/simd_linear_messages.cpp
M clang/test/OpenMP/target_parallel_for_simd_ordered_messages.cpp
M clang/test/OpenMP/taskloop_simd_linear_messages.cpp
M clang/test/Parser/pragma-attribute.cpp
M clang/test/Refactor/Extract/ObjCProperty.m
M clang/test/Sema/asm.c
M clang/test/Sema/pragma-attribute-strict-subjects.c
M clang/test/SemaObjC/comptypes-legal.m
M clang/test/SemaOpenCL/access-qualifier.cl
Log Message:
-----------
[clang] Replace "can't" and "can not" in diagnostics with "cannot" (#116623)
See
https://discourse.llvm.org/t/cant-cannot-can-not-in-diagnostic-messages/83171
Commit: 6dceb0e34ed3dd4be72d211abb8c9c447bd57735
https://github.com/llvm/llvm-project/commit/6dceb0e34ed3dd4be72d211abb8c9c447bd57735
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop1.txt
Log Message:
-----------
AMDGPU: Add V_CVT_F32_BF16 for gfx950 (#116311)
Commit: 0c421687f897b530a0fd3481fa03a2d29fd0b97c
https://github.com/llvm/llvm-project/commit/0c421687f897b530a0fd3481fa03a2d29fd0b97c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
A llvm/test/MC/AMDGPU/mai-gfx950.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
A llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add first gfx950 mfma instructions (#116312)
Scheduling info and hazards are wrong and TBD.
Commit: f8d1905a24c16bf6db42d428672401156ef6a473
https://github.com/llvm/llvm-project/commit/f8d1905a24c16bf6db42d428672401156ef6a473
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
Log Message:
-----------
[GlobalISel] Combine [S,U]SUBO (#116489)
We import the llvm.ssub.with.overflow.* Intrinsics, but the Legalizer
also builds them while legalizing other opcodes, see narrowScalarAddSub.
Commit: 31aa7f34e07c901773993dac0f33568307f96da6
https://github.com/llvm/llvm-project/commit/31aa7f34e07c901773993dac0f33568307f96da6
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Affine/Utils.h
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/invalid.mlir
M mlir/test/python/dialects/affine.py
Log Message:
-----------
[mlir][Affine] Let affine.[de]linearize_index omit outer bounds (#116103)
The affine.delinearize_index and affine.linearize_index operations, as
currently defined, require providing a length N basis to [de]linearize N
values. The first value in this basis is never used during lowering and
is unused during lowering. (Note that, even though it isn't used during
lowering it can still be used to, for example, remove length-1 outputs
from a delinearize).
This dead value makes sense in the original context of these operations,
which is linearizing or de-linearizing indexes to memref<>s, vector<>s,
and other shaped types, where that outer bound is avaliable and may be
useful for analysis.
However, other usecases exist where the outer bound is not known. For
example:
%thread_id_x = gpu.thread_id x : index
%0:3 = affine.delinearize_index %thread_id_x into (4, 16) : index,index,
index
In this code, we don't know the upper bound of the thread ID, but we do
want to construct the ?x4x16 grid of delinearized values in order to
further partition the GPU threads.
In order to support such usecases, we broaden the definition of
affine.delinearize_index and affine.linearize_index to make the outer
bound optional.
In the case of affine.delinearize_index, where the number of results is
a function of the size of the passed-in basis, we augment all existing
builders with a `hasOuterBound` argument, which, for backwards
compatibilty and to preserve the natural usage of the op, defaults to
`true`. If this flag is true, the op returns one result per basis
element, if it is false, it returns one extra result in position 0.
We also update existing canonicalization patterns (and move one of them
into the folder) to handle these cases. Note that disagreements about
the outer bound now no longer prevent delinearize/linearize
cancelations.
Commit: 55876278d362020503db5f0e66313829c40ff640
https://github.com/llvm/llvm-project/commit/55876278d362020503db5f0e66313829c40ff640
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/f16-abs.ll
Log Message:
-----------
[NVPTX] Add support for f16 fabs (#116107)
Add support for f16 and f16x2 support for abs. See PTX ISA 9.7.4.6. Half
Precision Floating Point Instructions: abs
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#half-precision-floating-point-instructions-abs
Commit: e0b522dd94e48229d587a54a3103ba1c198b16a7
https://github.com/llvm/llvm-project/commit/e0b522dd94e48229d587a54a3103ba1c198b16a7
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/test/CodeGen/DirectX/flatten-array.ll
Log Message:
-----------
[DirectX] Fix crash in DXILFlattenArrays for function declarations (#116690)
We were skipping intrinsics here, but really we need to skip all
function declarations - if the function doesn't have a body there's
nothing to walk.
Commit: a4e1a3dc8bc9bb971d8a38130254b4570f8b7a03
https://github.com/llvm/llvm-project/commit/a4e1a3dc8bc9bb971d8a38130254b4570f8b7a03
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Add another constructor to IndexedAllocationInfo (NFC) (#116684)
This patch adds another constructor to IndexedAllocationInfo that is
identical to the existing constructor except that the new one leaves
the CallStack field empty.
I'm planning to remove MemProf format Version 1. Then we will migrate
the users of the existing constructor to the new one as nobody will be
using the CallStack field anymore.
Adding the new constructor now allows us to migrate a few existing
users of the old constructor even before we remove the CallStack
field. In turn, that simplifies the patch to actually remove the
field.
Commit: ad9c0b369e86e75d56e229f294782a4eaf527226
https://github.com/llvm/llvm-project/commit/ad9c0b369e86e75d56e229f294782a4eaf527226
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
Log Message:
-----------
[SLP]Check if the gathered loads form full vector before attempting build it
Need to check that the number of gathered loads in the slice forms the
build vector to avoid compiler crash.
Fixes #116691
Commit: b083340cb663b6bd785dbd5864e5afd950745e35
https://github.com/llvm/llvm-project/commit/b083340cb663b6bd785dbd5864e5afd950745e35
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
A llvm/test/CodeGen/NVPTX/misched_func_call.ll
Log Message:
-----------
[llvm][NVPTX] Don't reorder MIs that construct a PTX function call (#116522)
With "-enable-misched", MachineScheduler can reorder MIs that must stick
together (in initially set order) to generate legal PTX code for a
function call.
When generating PTX code for the attached test (using LLVM before this
revision), the following invalid PTX code is generated:
```
{ // callseq 0, 0
.param .b64 param0;
st.param.f64 [param0], 0d0000000000000000;
.param .b64 retval0;
call.uni (retval0),
mul.lo.s32 %r7, %r10, %r3;
or.b32 %r8, %r4, %r7;
mul.lo.s32 %r9, %r2, %r8;
cvt.rn.f64.s32 %fd3, %r9;
quux,
(
param0
);
ld.param.f64 %fd1, [retval0];
} // callseq 0
```
Commit: ec67ad594b82fc2e763237d4e8d6bb2aea59110b
https://github.com/llvm/llvm-project/commit/ec67ad594b82fc2e763237d4e8d6bb2aea59110b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++][NFC] Format <string>
Commit: 50209e994200c98236a27b54e87e8c598d160402
https://github.com/llvm/llvm-project/commit/50209e994200c98236a27b54e87e8c598d160402
Author: David Green <david.green at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
R llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
A llvm/test/CodeGen/AArch64/freeze.ll
Log Message:
-----------
[AArch64][GlobalISel] Move and update freeze.ll test. NFC
This adds a number of extra vector cases, notably the ptr vectors.
Commit: 36d47f88786d29d381545a5f88a7964b47d9a595
https://github.com/llvm/llvm-project/commit/36d47f88786d29d381545a5f88a7964b47d9a595
Author: David Green <david.green at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/freeze.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalize ptr vector freeze and implicit defs.
They can be treated the same as other s64 operations.
Commit: 1ced56540071476d0a4aa8cb5134106d02b5b7f1
https://github.com/llvm/llvm-project/commit/1ced56540071476d0a4aa8cb5134106d02b5b7f1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/scoped-fence-ops.c
Log Message:
-----------
[Clang] Add support for scoped atomic thread fence (#115545)
Summary:
Previously we added support for all of the atomic GNU extensions with
optional memory scoped except for `__atomic_thread_fence`. This patch
adds support for that. This should ideally allow us to generically emit
these LLVM scopes.
Commit: 94d100f2ba81c2bf0ef495f68d66ba8c94c71d2a
https://github.com/llvm/llvm-project/commit/94d100f2ba81c2bf0ef495f68d66ba8c94c71d2a
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
A lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
[lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#112811)
This is the second half of
https://github.com/llvm/llvm-project/pull/90008.
Essentially, it replaces the work of resolving template types when we
just need the qualified names with walking the DIE tree using
`DWARFTypePrinter`.
### Result
For an internal target, the time spent on `expr *this` for the first
time reduced from 28 secs to 17 secs.
Commit: b35f40688e3079d888932e0a35caa0b02d90db97
https://github.com/llvm/llvm-project/commit/b35f40688e3079d888932e0a35caa0b02d90db97
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/test/Bitcode/summary_version.ll
A llvm/test/ThinLTO/X86/Inputs/memprof-old-stackid-summary.bc
A llvm/test/ThinLTO/X86/memprof-old-stackid-summary.ll
Log Message:
-----------
[MemProf] Change the STACK_ID record to fixed width values (#116448)
The stack ids are hashes that are close to 64 bits in size, so emitting
as a pair of 32-bit fixed-width values is more efficient than a VBR.
This reduced the summary bitcode size for a large target by about 1%.
Bump the index version and ensure we can read the old format.
Commit: 5d33010f5edee8030d7b7d78c6e6f6992b659082
https://github.com/llvm/llvm-project/commit/5d33010f5edee8030d7b7d78c6e6f6992b659082
Author: David Truby <david.truby at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/test/Driver/dynamic-linker.f90
M flang/test/Driver/isysroot.f90
Log Message:
-----------
[NFC][flang] Fix driver linker tests on Windows (#116667)
Commit: 9c3665c8d26ba041a6e582e83cc2de0a1f63be48
https://github.com/llvm/llvm-project/commit/9c3665c8d26ba041a6e582e83cc2de0a1f63be48
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[rtsan] Add I/O multiplexing interceptors (#115227)
Intercepts in the family of `poll`, `select` and modern equivalents
`epoll` (linux only) and `kqueue` bsd family only.
These calls mirror the names of the system calls they call, which have
been verified on mac at least (e.g. kevent calls the system call
kevent).
Commit: dc087d1a338ca07b77c28522abb063e712b3877d
https://github.com/llvm/llvm-project/commit/dc087d1a338ca07b77c28522abb063e712b3877d
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/IR/DIExpressionOptimizer.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Avoid undefined behavior in shift operators during constant folding of DIExpressions. (#116466)
Bit shift operations with a shift operand greater than or equal to the bit width
of the (promoted) value type result in undefined behavior according to C++
[expr.shift]p1. This change adds checking for this situation and avoids attempts
to constant fold DIExpressions that would otherwise provoke such behavior.
An existing test that presumably intended to exercise shifts at the UB boundary
has been updated; it now checks for shifts of 64 bits instead of 65. This issue
was reported by a static analysis tool; no actual cases of shift operations that
would result in undefined behavior in practice have been identified.
Commit: 2310e3e3f2ccdab156abc7f9d186b2605027d8fe
https://github.com/llvm/llvm-project/commit/2310e3e3f2ccdab156abc7f9d186b2605027d8fe
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Log Message:
-----------
[GlobalISel] Move DemandedElt's APInt size assert after isValid() check (#115979)
This prevents the assertion from wrongly triggering on invalid LLT's
Commit: 2de78815604e9027efd93cac27c517bf732587d2
https://github.com/llvm/llvm-project/commit/2de78815604e9027efd93cac27c517bf732587d2
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
A llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/DroppedVariableStatsIRTest.cpp
R llvm/unittests/IR/DroppedVariableStatsTest.cpp
Log Message:
-----------
[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible. (#115563)
Move DroppedVariableStats code to its own file and change the class to
have an extensible design so that we can use it to add dropped
statistics to MIR passes and the instruction selector.
Commit: 3a3517c5e9d45a1d1aae5320887478b228b0f8be
https://github.com/llvm/llvm-project/commit/3a3517c5e9d45a1d1aae5320887478b228b0f8be
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/deque.bench.cpp
M libcxx/test/benchmarks/vector_operations.bench.cpp
A libcxx/test/std/containers/sequences/vector/vector.modifiers/common.h
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter_iter.pass.cpp
Log Message:
-----------
[libc++] Improve the tests for vector::erase (#116265)
In particular, test everything with both a normal and a min_allocator,
add tests for a few corner cases and add tests with types that are
trivially relocatable. Also add tests that count the number of
assignments performed by vector::erase, since that is mandated by the
Standard.
This patch is a preparation for optimizing vector::erase.
Commit: 6e2b77d4696d4a672635c0ba1ead4824e2158a7d
https://github.com/llvm/llvm-project/commit/6e2b77d4696d4a672635c0ba1ead4824e2158a7d
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/CodeGen/MachineFunctionPass.h
M llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/unittests/MIR/CMakeLists.txt
A llvm/unittests/MIR/DroppedVariableStatsMIRTest.cpp
Log Message:
-----------
Add a pass to collect dropped var stats for MIR. (#115566)
This patch uses the DroppedVariableStats class to add dropped variable
statistics for MIR passes.
Commit: 78606af606deca9dd4de2ac1aec17a966c114bc2
https://github.com/llvm/llvm-project/commit/78606af606deca9dd4de2ac1aec17a966c114bc2
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix bug in unsafe casts to incomplete types (#116433)
Fixed the crash coming from attempting to get size of incomplete types.
Casting `span.data()` to a pointer-to-incomplete-type should be
immediately considered unsafe.
Solving issue #116286.
Co-authored-by: Ziqing Luo <ziqing_luo at apple.com>
Commit: 39bdf7a9db64927dfa4ad7fa85bcdf7a77a32ece
https://github.com/llvm/llvm-project/commit/39bdf7a9db64927dfa4ad7fa85bcdf7a77a32ece
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
Log Message:
-----------
[Clang] SemaFunctionEffects: Fix bug where lambdas produced by template expansion weren't verified. (#116505)
---------
Co-authored-by: Doug Wyatt <dwyatt at apple.com>
Commit: 81924ac1fb63273fc4648029301869a085bb9dac
https://github.com/llvm/llvm-project/commit/81924ac1fb63273fc4648029301869a085bb9dac
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/CodeGen/MachineFunctionPass.h
M llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/unittests/MIR/CMakeLists.txt
R llvm/unittests/MIR/DroppedVariableStatsMIRTest.cpp
Log Message:
-----------
Revert "Add a pass to collect dropped var stats for MIR. (#115566)"
This reverts commit 6e2b77d4696d4a672635c0ba1ead4824e2158a7d.
Reverting due to buildbot failure:
unittests/IR/CMakeFiles/IRTests.dir/DroppedVariableStatsIRTest.cpp.o:DroppedVariableStatsIRTest.cpp:function llvm::DroppedVariableStatsIR::runAfterPass(llvm::StringRef, llvm::Any): error: undefined reference to 'llvm::DroppedVariableStatsIR::runOnModule(llvm::Module const*, bool)'
Commit: e914d97327ce5887e51c2d650987f2f48eda85c1
https://github.com/llvm/llvm-project/commit/e914d97327ce5887e51c2d650987f2f48eda85c1
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
R llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/unittests/IR/CMakeLists.txt
R llvm/unittests/IR/DroppedVariableStatsIRTest.cpp
A llvm/unittests/IR/DroppedVariableStatsTest.cpp
Log Message:
-----------
Revert "[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible. (#115563)"
This reverts commit 2de78815604e9027efd93cac27c517bf732587d2.
Reverted due to buildbot failure:
unittests/IR/CMakeFiles/IRTests.dir/DroppedVariableStatsIRTest.cpp.o:DroppedVariableStatsIRTest.cpp:function llvm::DroppedVariableStatsIR::runAfterPass(llvm::StringRef, llvm::Any): error: undefined reference to 'llvm::DroppedVariableStatsIR::runOnModule(llvm::Module const*, bool)'
Commit: 170e1fe5a5211420923e32995d8bf3da196c2a54
https://github.com/llvm/llvm-project/commit/170e1fe5a5211420923e32995d8bf3da196c2a54
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/bindings/interface/SBTargetExtensions.i
M lldb/test/API/lang/cpp/stl/TestStdCXXDisassembly.py
Log Message:
-----------
[lldb] Fix regex support in SBTarget.modules_access (#116452)
First, `SRE_Pattern` does not exist on newer Python's, use
`type(re.compile(''))` like other Python extensions do. The dynamic type
is because some earlier versions of Python 3 do not have `re.Pattern`.
Second, `SBModule` has a `file` property, not a `path` property.
Commit: 5ae4d505c38872b3faaeea5779f6c25a9138bbc5
https://github.com/llvm/llvm-project/commit/5ae4d505c38872b3faaeea5779f6c25a9138bbc5
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Add support for reading the dynamic symbol table from PT_DYNAMIC (#116689)
Resubmissions of https://github.com/llvm/llvm-project/pull/112596 with
buildbot fixes.
Allow LLDB to parse the dynamic symbol table from an ELF file or memory
image in an ELF file that has no section headers. This patch uses the
ability to parse the PT_DYNAMIC segment and find the DT_SYMTAB,
DT_SYMENT, DT_HASH or DT_GNU_HASH to find and parse the dynamic symbol
table if the section headers are not present. It also adds a helper
function to read data from a .dynamic key/value pair entry correctly
from the file or from memory.
Commit: 204234a69c068032a1adac31f00b51f3b9efa778
https://github.com/llvm/llvm-project/commit/204234a69c068032a1adac31f00b51f3b9efa778
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorDescriptor.h
Log Message:
-----------
[mlir][SparseTensor][NFC] Pass tensor type to descriptor helper (#116468)
`getDescriptorFromTensorTuple` and `getMutDescriptorFromTensorTuple`
extract the tensor type from an `unrealized_conversion_cast` op that
serves as a workaround for missing 1:N dialect conversion support.
This commit changes these functions so that they explicitly receive the
tensor type as a function argument. This is in preparation of merging
the 1:1 and 1:N conversion drivers. The conversion patterns in this file
will soon start receiving multiple SSA values (`ValueRange`) from their
adaptors (instead of a single value that is the result of
`unrealized_conversion_cast`). It will no longer be possible to take the
tensor type from the `unrealized_conversion_cast` op. The
`unrealized_conversion_cast` workaround will disappear entirely.
Commit: cfc574a6cd13d2d0b77110b579c5cfcec744129f
https://github.com/llvm/llvm-project/commit/cfc574a6cd13d2d0b77110b579c5cfcec744129f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV] Use the OperandTransform field of a couple PatLeafs to simplify isel patterns. NFC
Commit: c51786b022bbff6c902cbcd2af5cc6535f6d9b5d
https://github.com/llvm/llvm-project/commit/c51786b022bbff6c902cbcd2af5cc6535f6d9b5d
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
R lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
Revert "[lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#112811)"
This reverts commit 94d100f2ba81c2bf0ef495f68d66ba8c94c71d2a.
Reverted because of greendragon failure on the incremental arm64 bot
******************** TEST 'lldb-shell :: SymbolFile/DWARF/x86/simplified-template-names.cpp' FAILED ********************
Exit Code: 1
RUN: at line 7: /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang --driver-mode=g++ --target=specify-a-target-or-use-a-_host-substitution --target=x86_64-pc-linux -g -gsimple-template-names /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp -o /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/test/Shell/SymbolFile/DWARF/x86/Output/simplified-template-names.cpp.tmp
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang --driver-mode=g++ --target=specify-a-target-or-use-a-_host-substitution --target=x86_64-pc-linux -g -gsimple-template-names /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp -o /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/test/Shell/SymbolFile/DWARF/x86/Output/simplified-template-names.cpp.tmp
ld: warning: -m is obsolete
ld: unknown option: --hash-style=gnu
clang: error: linker command failed with exit code 1 (use -v to see invocation)
Commit: 6626ed6f9fae79d35aba504f50bac4375686a03b
https://github.com/llvm/llvm-project/commit/6626ed6f9fae79d35aba504f50bac4375686a03b
Author: lialan <me at alanli.org>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-transforms.mlir
Log Message:
-----------
[MLIR] Fix `BubbleDownVectorBitCastForExtract` crash on non-static index (#116518)
Previously the patch was not expecting to handle non-static index, when
the index is a non constant value it will crash.
This patch is to make sure it return gracefully instead of crashing.
Commit: 6fe94c3bae596271c1f3b112d7635339a21c776d
https://github.com/llvm/llvm-project/commit/6fe94c3bae596271c1f3b112d7635339a21c776d
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .github/new-issues-labeler.yml
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
[Workflows] Enable commit access requests via GitHub issues (#100458)
This updates the auto-labeler to match a specific issue title that is
going to be used for requesting commit access and then add the
infrastructure:commit-access-request label.
This will notify the admin team who will be able to handle the request.
See
https://discourse.llvm.org/t/rfc-change-the-process-for-requesting-commit-access/80184
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Commit: e17c91341be2f6a2d229ab44a4290e7d0ef2e094
https://github.com/llvm/llvm-project/commit/e17c91341be2f6a2d229ab44a4290e7d0ef2e094
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/python/mlir/extras/types.py
M mlir/test/python/ir/builtin_types.py
Log Message:
-----------
[mlir][python] Add `T.tf32` and missing tests for `tf32` (#116725)
Commit: cd418030de7ae75750bc4e48d1238baf03c675e5
https://github.com/llvm/llvm-project/commit/cd418030de7ae75750bc4e48d1238baf03c675e5
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/attributes.ll
Log Message:
-----------
[RISCV] Remove +a from the attribute test for zacas and zabha. NFC.
zacas and zabha don't require the 'a' or 'zaamo' extension after
https://github.com/llvm/llvm-project/pull/115694.
Commit: c526eb891bda371c0481fcdc1507adc496431d03
https://github.com/llvm/llvm-project/commit/c526eb891bda371c0481fcdc1507adc496431d03
Author: Greg Clayton <clayborg at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Fix buildbots with no x86 target.
Fix for: https://github.com/llvm/llvm-project/pull/116689
Commit: 31a4d2c2eb265708b2ff50f6f9c53685a3df8d10
https://github.com/llvm/llvm-project/commit/31a4d2c2eb265708b2ff50f6f9c53685a3df8d10
Author: vporpo <vporpodas at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][DAG] Cleanup: Move callback registration from Scheduler to DAG (#116455)
This is a refactoring patch that moves the callback registration for
getting notified about new instructions from the scheduler to the DAG.
This makes sense from a design and testing point of view:
- the DAG should not rely on the scheduler for getting notified
- the notifiers don't need to be public
- it's easier to test the notifiers directly from within the DAG unit
tests
Commit: 1eaa17975dc568cff4fe31a79c0d147ef5c55301
https://github.com/llvm/llvm-project/commit/1eaa17975dc568cff4fe31a79c0d147ef5c55301
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
Log Message:
-----------
[LoopInterchange] Bail out early if minimum loop nest is not met (#115128)
This patch bails out early if minimum depth
is not met. As it stands today, the pass computes
CacheCost before it attempts to do the transform.
This is not needed if minimum depth is not met.
This handles basic cases where depth is typically 1.
As the patch avoids unnecessary computation, it is aimed to improve
compile-time.
Commit: 08ef9396377cd60239a6312640f4fdc9c91a1703
https://github.com/llvm/llvm-project/commit/08ef9396377cd60239a6312640f4fdc9c91a1703
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/eh-frame-hdr.test
Log Message:
-----------
[BOLT] Overwrite .eh_frame_hdr in-place (#116730)
If the new EH frame header can fit into the original .eh_frame_hdr
section, overwrite it in-place and pad with zeroes.
Commit: a17f11baa1b622359547604555173384e220eef3
https://github.com/llvm/llvm-project/commit/a17f11baa1b622359547604555173384e220eef3
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
A compiler-rt/test/profile/ContinuousSyncMode/multi-threaded.cpp
M compiler-rt/test/profile/lit.cfg.py
Log Message:
-----------
[test][PGO] Add a multi-threaded test for continuous PGO.
Commit: ff9509e7d8ffac11ec25cea6c0dd7783097d3181
https://github.com/llvm/llvm-project/commit/ff9509e7d8ffac11ec25cea6c0dd7783097d3181
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
Log Message:
-----------
[SandboxVec][BottomUpVec][NFC] Add some comments
Commit: 661c593850715881d2805a59e90e6d87d8b9fbb8
https://github.com/llvm/llvm-project/commit/661c593850715881d2805a59e90e6d87d8b9fbb8
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-zero.ll
M llvm/test/Other/optimize-inrange-gep.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
A llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/PGOProfile/memprof_internal_linkage.ll
M llvm/test/Transforms/PhaseOrdering/X86/unroll-vectorizer.ll
M llvm/test/Transforms/PhaseOrdering/memcpy-offset.ll
M llvm/test/Transforms/PhaseOrdering/pr95152.ll
Log Message:
-----------
[FunctionAttrs] Add the "initializes" attribute inference (#97373)
Add the "initializes" attribute inference.
This change is expected to have ~0.09% compile time regression, which
seems acceptable for interprocedural DSE.
https://llvm-compile-time-tracker.com/compare.php?from=9f10252c4ad7cffbbcf692fa9c953698f82ac4f5&to=56345c1cee4375eb5c28b8e7abf4803d20216b3b&stat=instructions%3Au
Commit: 738bdd49694f2722c9b58b6a1bb99eaa6c0ba051
https://github.com/llvm/llvm-project/commit/738bdd49694f2722c9b58b6a1bb99eaa6c0ba051
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
A llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Add V_CVT_PK_BF16_F32 for gfx950 (#116678)
Commit: 130a3150ec9cdaecdf9b0fa773b8c23a6b9bc527
https://github.com/llvm/llvm-project/commit/130a3150ec9cdaecdf9b0fa773b8c23a6b9bc527
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Define v_mfma_f32_32x32x16_bf16 for gfx950 (#116679)
Unlike the existing gfx940 intrinsics using short/i16 in place of
bfloat, this uses the natural bfloat type.
Commit: 50224bd5ba009f02a012e22c0f87eba0028d6d88
https://github.com/llvm/llvm-project/commit/50224bd5ba009f02a012e22c0f87eba0028d6d88
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
A llvm/test/MC/AMDGPU/gfx950_asm_features.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950.txt
Log Message:
-----------
AMDGPU: Handle gfx950 global_load_lds_* instructions (#116680)
Define global_load_lds_dwordx3 and global_load_dwordx4.
Oddly it seems dwordx2 was skipped.
Commit: 927032807dfdca5d94eb0a8707d38b605e95e407
https://github.com/llvm/llvm-project/commit/927032807dfdca5d94eb0a8707d38b605e95e407
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.gfx950.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.gfx950.ll
A llvm/test/MC/AMDGPU/mubuf-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950.txt
Log Message:
-----------
AMDGPU: Handle gfx950 96/128-bit buffer_load_lds (#116681)
Enforcing this limit in the clang builtin will come later.
Commit: 545917cb4b1c122b3626ea8d35fa7f93a44ae27f
https://github.com/llvm/llvm-project/commit/545917cb4b1c122b3626ea8d35fa7f93a44ae27f
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
Log Message:
-----------
[clangd] Harden incomingCalls() against possible misinterpretation of a range as pertaining to the wrong file (#111616)
`CallHierarchyIncomingCall::fromRanges` are interpreted as ranges in the
same file as the `CallHierarchyItem` representing the caller
(`CallHierarchyIncomingCall::from`).
In C/C++, it's possible for the calls to be in a different file than the caller,
as illustrated in the added test case.
With this patch, such calls are dropped, rather than their ranges being
incorrectly interpreted as pertaining to the wrong file.
Commit: 44a41b0660912a90be903a843e8b6f234fa0a2be
https://github.com/llvm/llvm-project/commit/44a41b0660912a90be903a843e8b6f234fa0a2be
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
Log Message:
-----------
[clangd] Check for other clangd extension capabilities under 'experimental' (#116531)
This is a follow-up to PR114699, with the same motivation: to support
clients which only support adding custom (language-specific or
server-specific) capabilities under 'experimental'.
Commit: 2e0a3c281b31eeffb1c12b53360f22760e246af2
https://github.com/llvm/llvm-project/commit/2e0a3c281b31eeffb1c12b53360f22760e246af2
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/DebugInfo/Generic/artificial-static-member.ll
Log Message:
-----------
[DebugInfo] Correct an overly-restrictive REQUIRES clause. (#116429)
Include a regular expression in the 'REQUIRES' clause, to run
the test on all matching targets (x86_64 *linux*).
The original patch restricted to test just to 'x86_64-linux'
https://github.com/llvm/llvm-project/pull/116327
Commit: 0488d1774b197513cf91d973e103f4e7de293c00
https://github.com/llvm/llvm-project/commit/0488d1774b197513cf91d973e103f4e7de293c00
Author: Florian Mayer <fmayer at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/msan/tests/msan_test.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Log Message:
-----------
Reland "[Sanitizers] Intercept timer_create" (#113710) (#116717)
Original commit 2ec5c69b6872b8b474f3d37b9125d3d57d144d1b only
intercepted timer_create.
Because of how versioned libc symbols work, this could cause problems
where a newer `timer_create`
was used, and the result would be used by an older version. This would
cause crashes. This is why we
need to intercept all of the related functions.
Addresses https://github.com/llvm/llvm-project/issues/111847
Commit: 3b162f73d8027dcd8261666a40e9bdfb40f4dacc
https://github.com/llvm/llvm-project/commit/3b162f73d8027dcd8261666a40e9bdfb40f4dacc
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Features.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/CodeGen/AArch64/elf-pauthabi.c
A clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/Preprocessor/ptrauth_feature.c
Log Message:
-----------
[PAC][clang] Add signed GOT cc1 flag (#96160)
Add `-fptrauth-elf-got` clang cc1 flag and set `ptrauth_elf_got`
preprocessor feature and `PointerAuthELFGOT` LangOption correspondingly.
No additional checks like ensuring OS binary format is ELF are
performed: it should be done on clang driver level when a pauth-enabled
environment implying signed GOT enabled is requested.
If the cc1 flag is passed, "ptrauth-elf-got" IR module flag is set.
Commit: 456e60904b7b9de0a2bfabdac37ce9b8ac054750
https://github.com/llvm/llvm-project/commit/456e60904b7b9de0a2bfabdac37ce9b8ac054750
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Dialect Conversion: Delete dead code from `ConversionValueMapping` (#116758)
Commit: 55068dc3b7725f24de82dd4510162865c91a4f5e
https://github.com/llvm/llvm-project/commit/55068dc3b7725f24de82dd4510162865c91a4f5e
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/MainLoopBase.h
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/include/lldb/Host/windows/MainLoopWindows.h
M lldb/source/Host/common/MainLoopBase.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/unittests/Host/MainLoopTest.cpp
Log Message:
-----------
[lldb] Add timed callbacks to the MainLoop class (#112895)
The motivating use case is being able to "time out" certain operations
(by adding a timed callback which will force the termination of the
loop), but the design is flexible enough to accomodate other use cases
as well (e.g. running a periodic task in the background).
The implementation builds on the existing "pending callback" mechanism,
by associating a time point with each callback -- every time the loop
wakes up, it runs all of the callbacks which are past their point, and
it also makes sure to sleep only until the next callback is scheduled to
run.
I've done some renaming as names like "TriggerPendingCallbacks" were no
longer accurate -- the function may no longer cause any callbacks to be
called (it may just cause the main loop thread to recalculate the time
it wants to sleep).
Commit: 980d5fb2d014f87fa3f6249e9196bb28d7afd9c6
https://github.com/llvm/llvm-project/commit/980d5fb2d014f87fa3f6249e9196bb28d7afd9c6
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][omp] Add omp operations for OpenMP workshare (#101443)
Add the `omp.workshare` and `omp.workshare.loop_wrapper` operations used for the implementation of the `workshare` construct in flang.
Commit: 02b8ee281947f6cb39c7eb3c4bbba59322e9015b
https://github.com/llvm/llvm-project/commit/02b8ee281947f6cb39c7eb3c4bbba59322e9015b
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
A llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
Log Message:
-----------
[llvm] Improve llvm.objectsize computation by computing GEP, alloca and malloc parameters bound (#115522)
Using a naive expression walker, it is possible to compute valuable
information for
allocation functions, GEP and alloca, even in the presence of some
dynamic
information.
We don't rely on computeConstantRange to avoid taking advantage of
undefined behavior, which would be counter-productive wrt. usual
llvm.objectsize usage.
llvm.objectsize plays an important role in _FORTIFY_SOURCE definitions,
so improving its diagnostic in turns improves the security of compiled
application.
As a side note, as a result of recent optimization improvements, clang
no
longer passes
https://github.com/serge-sans-paille/builtin_object_size-test-suite
This commit restores the situation and greatly improves the scope of
code handled by the static version of __builtin_object_size.
Commit: 7d6713db600af1b4381149a0e794cbce99ca6cb2
https://github.com/llvm/llvm-project/commit/7d6713db600af1b4381149a0e794cbce99ca6cb2
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/workshare.f90
Log Message:
-----------
[flang][omp] Emit omp.workshare in frontend (#101444)
Emit the contents of OpenMP workshare constructs in `omp.workshare`.
Commit: 8bb21ae6c92c03b2487ee9b0df584c7a17446863
https://github.com/llvm/llvm-project/commit/8bb21ae6c92c03b2487ee9b0df584c7a17446863
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
Log Message:
-----------
[flang] Introduce custom loop nest generation for loops in workshare construct (#101445)
This alternative loop nest generation is used to generate an OpenMP loop nest instead of fir loops to facilitate parallelizing statements in an OpenMP `workshare` construct.
Commit: e7e5541616435b62da56e0a1fcc587c10b25321c
https://github.com/llvm/llvm-project/commit/e7e5541616435b62da56e0a1fcc587c10b25321c
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/OpenMP/Passes.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Fir/basic-program.fir
A flang/test/Transforms/OpenMP/lower-workshare-alloca.mlir
A flang/test/Transforms/OpenMP/lower-workshare-binding.mlir
A flang/test/Transforms/OpenMP/lower-workshare-cleanup.mlir
A flang/test/Transforms/OpenMP/lower-workshare-copyprivate.mlir
A flang/test/Transforms/OpenMP/lower-workshare-correct-parallelize.mlir
A flang/test/Transforms/OpenMP/lower-workshare-no-single.mlir
A flang/test/Transforms/OpenMP/lower-workshare-nowait.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg-dom.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg.mlir
M flang/tools/bbc/bbc.cpp
M flang/tools/tco/tco.cpp
Log Message:
-----------
[flang] Lower omp.workshare to other omp constructs (#101446)
Add a new pass that lowers an `omp.workshare` with its binding `omp.workshare.loop_wrapper` loop nests into other OpenMP constructs that can be lowered to LLVM.
More specifically, in order to preserve the sequential execution semantics of the code contained, it wraps portions that needs to be executed on a single thread in `omp.single` blocks, converts code that must be parallelized into `omp.wsloop` nests and inserts the appropriate synchronization.
Commit: 752dbd6112affa418e33910ac08bf9921f9c270b
https://github.com/llvm/llvm-project/commit/752dbd6112affa418e33910ac08bf9921f9c270b
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Interpreter/Wasm.h
Log Message:
-----------
[clang-repl] Improve flags responsible for generating shared wasm binaries (#116735)
There are a couple changes in this PR that help getting clang-repl to
run in the browser. Using a jupyterlite instance for the example pasted
below
1) Updating flags responsible for generating shared wasm binaries that
need to be dynamically loaded Most Importantly as can be seen in the
changes `shared` and `allow-undefined` are crucial.
2) While exiting we encounter this.
Now as can be seen here
https://github.com/llvm/llvm-project/blob/cd418030de7ae75750bc4e48d1238baf03c675e5/clang/lib/Interpreter/Interpreter.cpp#L421-L430
We call cleanUP in the destructor. Now cleanUP through
IncrementalExecutor tries to deinitialize the JIT which wasn't even
intialized as runCtors in wasm.cpp is a no-op
https://github.com/llvm/llvm-project/blob/cd418030de7ae75750bc4e48d1238baf03c675e5/clang/lib/Interpreter/IncrementalExecutor.cpp#L94-L101
https://github.com/llvm/llvm-project/blob/cd418030de7ae75750bc4e48d1238baf03c675e5/clang/lib/Interpreter/Wasm.cpp#L107-L109
Commit: ead9ad2960ab72bf6142d8aeb164a097a7e407db
https://github.com/llvm/llvm-project/commit/ead9ad2960ab72bf6142d8aeb164a097a7e407db
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Transforms/JumpThreading/PR33357-lvi-recursion.ll
M llvm/test/Transforms/JumpThreading/basic.ll
M llvm/test/Transforms/JumpThreading/crash.ll
M llvm/test/Transforms/JumpThreading/ddt-crash.ll
M llvm/test/Transforms/JumpThreading/ddt-crash4.ll
M llvm/test/Transforms/JumpThreading/landing-pad.ll
M llvm/test/Transforms/JumpThreading/pr22086.ll
M llvm/test/Transforms/JumpThreading/pr9331.ll
M llvm/test/Transforms/JumpThreading/preserving-debugloc-br.ll
M llvm/test/Transforms/JumpThreading/unreachable-loops.ll
M llvm/test/Transforms/LCSSA/indirectbr.ll
M llvm/test/Transforms/LCSSA/invoke-dest.ll
M llvm/test/Transforms/LCSSA/pr28424.ll
M llvm/test/Transforms/LCSSA/pr28608.ll
M llvm/test/Transforms/LCSSA/remove-phis.ll
M llvm/test/Transforms/LCSSA/unused-phis.ll
M llvm/test/Transforms/LICM/2009-12-10-LICM-Indbr-Crash.ll
M llvm/test/Transforms/LICM/alias-set-tracker-loss.ll
M llvm/test/Transforms/LICM/assume.ll
M llvm/test/Transforms/LICM/callbr-crash.ll
M llvm/test/Transforms/LICM/crash.ll
M llvm/test/Transforms/LICM/debug-value.ll
M llvm/test/Transforms/LICM/gc-relocate.ll
M llvm/test/Transforms/LICM/hoist-phi.ll
M llvm/test/Transforms/LICM/lcssa-ssa-promoter.ll
M llvm/test/Transforms/LICM/loopsink-pr39570.ll
M llvm/test/Transforms/LICM/outer-loop-deleted-before-licm.ll
M llvm/test/Transforms/LICM/pr32129.ll
M llvm/test/Transforms/LICM/pr37323.ll
M llvm/test/Transforms/LICM/pr38513.ll
M llvm/test/Transforms/LICM/pr50367.ll
M llvm/test/Transforms/LICM/sink-promote.ll
M llvm/test/Transforms/LICM/sinking.ll
M llvm/test/Transforms/LoopDeletion/2011-06-21-phioperands.ll
M llvm/test/Transforms/LoopDeletion/2017-07-11-incremental-dt.ll
M llvm/test/Transforms/LoopDeletion/bbi-59728.ll
M llvm/test/Transforms/LoopDeletion/crashbc.ll
M llvm/test/Transforms/LoopDeletion/pr53969.ll
M llvm/test/Transforms/LoopDeletion/simplify-then-delete.ll
M llvm/test/Transforms/LoopIdiom/non-canonical-loop.ll
M llvm/test/Transforms/LoopIdiom/scev-invalidation_topmostloop.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#116739)
This PR removes tests with br i1 undef under
`llvm/tests/Transforms/JumpThreading, LCSSA, LICM, LoopDeletion,
LoopIdiom`.
Commit: 0a27e4eed4bb6ad83b5705558245c20f1083e6a1
https://github.com/llvm/llvm-project/commit/0a27e4eed4bb6ad83b5705558245c20f1083e6a1
Author: Ivan Radanov Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M offload/plugins-nextgen/common/src/JIT.cpp
Log Message:
-----------
[offload] Fix copy-paste defect in error message
Commit: 1e897ed28d26e192178247991158bd476e4a1106
https://github.com/llvm/llvm-project/commit/1e897ed28d26e192178247991158bd476e4a1106
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
Log Message:
-----------
[TTI][RISCV] Deduplicate type-based VP costing (#115983)
We have a lot of code in RISCVTTIImpl::getIntrinsicInstrCost for vp
intrinsics, which just forward the cost to the underlying non-vp cost
function.
However I just also noticed that there is generic code in BasicTTIImpl's
getIntrinsicInstrCost that does the same thing, added in #67178. The
only difference is that BasicTTIImpl doesn't yet handle it for
type-based costing. There doesn't seem to be any reason that it can't
since it's just inspecting the argument types.
This shuffles the VP costing up to handle both regular and type-based
costing, which allows us to deduplicate some of the VP specific costing
in RISCVTTIImpl by delegating it to BasicTTIImpl.h. More of those nodes
can be moved over to BasicTTIImpl.h later.
It's not NFC since it picks up a couple of VP nodes that had slipped
through the cracks. Future PRs can begin to move more of the code from
RISCVTTIImpl to BasicTTIImpl.
Commit: 7e85cb8a8a9de57ed10635b843662148a87b17e5
https://github.com/llvm/llvm-project/commit/7e85cb8a8a9de57ed10635b843662148a87b17e5
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
Log Message:
-----------
[AArch64][NFC] Add test as a representative of scalarizing a vector i… (#114107)
…nteger division
The last resort to vectorize a bundle of integer divisions is considered
scalarizing it. Currently, the cost estimates for scalarizing a vector
division can be considerably overestimated as is the scenario with this
motivating test case i.e. vector cost should not deviate much from the
scalar cost.
Future patch will try to improve the scalarization cost.
Commit: 3093b29b597b9a936a3e4d1c8bc4a7ccba8fc848
https://github.com/llvm/llvm-project/commit/3093b29b597b9a936a3e4d1c8bc4a7ccba8fc848
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
Log Message:
-----------
[RegisterCoalescer] Fix up subreg lanemasks after rematerializing. (#116191)
In a situation like the following:
```
undef %2.subreg = INST %1 ; DefMI (rematerializable),
; DefSubIdx = subreg
%3 = COPY %2 ; SrcIdx = DstIdx = 0
.... = SOMEINSTR %3, %2
```
there are no subranges for `%3` because the entire register is copied,
but after rematerialization the subrange of the rematerialized value
must be fixed up with the appropriate subranges for `.subreg`.
(To me this issue seemed a bit similar to the issue fixed by #96839, but
then related to rematerialization)
Commit: 3097c60928c773d8c7f97432491c0e4367b6215c
https://github.com/llvm/llvm-project/commit/3097c60928c773d8c7f97432491c0e4367b6215c
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maximize-bandwidth-invalidate.ll
M llvm/test/Transforms/LoopVectorize/AArch64/no_vector_instructions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-fp-ext-trunc-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-shiftcost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-02.ll
M llvm/test/Transforms/LoopVectorize/X86/fneg-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/mul_slm_16bit.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/redundant-vf2-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/uint64_to_fp64-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll
M llvm/test/Transforms/LoopVectorize/X86/vector-scalar-select-cost.ll
Log Message:
-----------
[LoopVectorize][NFC] Rewrite tests to check output of vplan cost model (#113697)
Currently it's very difficult to improve the cost model for tail-folded
loops because as soon as you add a VPInstruction::computeCost function
that adds the costs of instructions such as
VPInstruction::ActiveLaneMask
and VPInstruction::ExplicitVectorLength the assert in
LoopVectorizationPlanner::computeBestVF fails for some tests. This is
because the VF chosen by the legacy cost model doesn't match the vplan
cost model. See PR #90191. This assert is currently making it difficult
to improve the cost model.
Hopefully we will be in a position to remove the assert soon, however
in order to do that we have to fix up a whole bunch of tests that rely
upon the legacy cost model output. I've tried my best to update
these tests to use vplan output instead.
There is still work needed for the VF=1 case because the vplan cost
model is not printed out in this case. I've not attempted to fix those
in this patch.
Commit: 91c1699943a7f41c337d44b965c63bb6fc96de16
https://github.com/llvm/llvm-project/commit/91c1699943a7f41c337d44b965c63bb6fc96de16
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
[clang] [NFC] Merge conditions (#116612)
Commit: 0775088234f1a98d1b18a2ff846d851509f5c023
https://github.com/llvm/llvm-project/commit/0775088234f1a98d1b18a2ff846d851509f5c023
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
A mlir/test/Dialect/Linalg/decompose-tensor-pack-tile.mlir
A mlir/test/Dialect/Linalg/decompose-tensor-pack.mlir
A mlir/test/Dialect/Linalg/decompose-tensor-unpack-tile.mlir
A mlir/test/Dialect/Linalg/decompose-tensor-unpack.mlir
R mlir/test/Dialect/Linalg/generalize-tensor-pack-tile.mlir
R mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
R mlir/test/Dialect/Linalg/generalize-tensor-unpack-tile.mlir
R mlir/test/Dialect/Linalg/generalize-tensor-unpack.mlir
A mlir/test/Dialect/Linalg/td/decompose-pack.mlir
R mlir/test/Dialect/Linalg/td/generalize-pack.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Log Message:
-----------
[mlir] Rename `GeneralizeOuterUnitDims{Un}PackOpPattern`s (#116439)
Renames:
* `GeneralizeOuterUnitDimsPackOpPattern`,
* `GeneralizeOuterUnitDimsUnPackOpPattern`,
as
* `DecomposeOuterUnitDimsPackOpPattern`,
* `DecomposeOuterUnitDimsUnPackOpPattern`,
respectively. The new name better describes the underlying
transformation.
Commit: 6aa80f00574826a0c2f2972a659517a9bf1efece
https://github.com/llvm/llvm-project/commit/6aa80f00574826a0c2f2972a659517a9bf1efece
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/builtin-bit-cast.cpp
Log Message:
-----------
[Clang] [NFC] Add single quotes around __builtin_bit_cast (#116120)
Fixes #116118
Commit: 8cd348c96a845e4afb3e924355e98b5558683d01
https://github.com/llvm/llvm-project/commit/8cd348c96a845e4afb3e924355e98b5558683d01
Author: Davide <39653004+Tazdevil971 at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/test/CodeGen/Mips/fp16-promote.ll
Log Message:
-----------
[MIPS] Updated MIPS N calling conventions so that fp16 arguments no longer cause a crash (#116569)
This PR fixes a bug introduced by #110199, which causes any half float
argument to crash the compiler on MIPS64.
Currently compiling this bit of code with `llc -mtriple=mips64`:
```
define void @half_args(half %a) nounwind {
entry:
ret void
}
```
Crashes with the following log:
```
LLVM ERROR: unable to allocate function argument #0
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: llc -mtriple=mips64
1. Running pass 'Function Pass Manager' on module '<stdin>'.
2. Running pass 'MIPS DAG->DAG Pattern Instruction Selection' on function '@half_args'
#0 0x000055a3a4013df8 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x32d0df8)
#1 0x000055a3a401199e llvm::sys::RunSignalHandlers() (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x32ce99e)
#2 0x000055a3a40144a8 SignalHandler(int) Signals.cpp:0:0
#3 0x00007f00bde558c0 __restore_rt libc_sigaction.c:0:0
#4 0x00007f00bdea462c __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
#5 0x00007f00bde55822 gsignal ./signal/../sysdeps/posix/raise.c:27:6
#6 0x00007f00bde3e4af abort ./stdlib/abort.c:81:7
#7 0x000055a3a3f80e3c llvm::report_fatal_error(llvm::Twine const&, bool) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x323de3c)
#8 0x000055a3a2e20dfa (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x20dddfa)
#9 0x000055a3a2a34e20 llvm::MipsTargetLowering::LowerFormalArguments(llvm::SDValue, unsigned int, bool, llvm::SmallVectorImpl<llvm::ISD::InputArg> const&, llvm::SDLoc const&, llvm::SelectionDAG&, llvm::SmallVectorImpl<llvm::SDValue>&) const MipsISelLowering.cpp:0:0
#10 0x000055a3a3d896a9 llvm::SelectionDAGISel::LowerArguments(llvm::Function const&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x30466a9)
#11 0x000055a3a3e0b3ec llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x30c83ec)
#12 0x000055a3a3e09e21 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x30c6e21)
#13 0x000055a3a2aae1ca llvm::MipsDAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&) MipsISelDAGToDAG.cpp:0:0
#14 0x000055a3a3e07706 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x30c4706)
#15 0x000055a3a3051ed6 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x230eed6)
#16 0x000055a3a35a3ec9 llvm::FPPassManager::runOnFunction(llvm::Function&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x2860ec9)
#17 0x000055a3a35ac3b2 llvm::FPPassManager::runOnModule(llvm::Module&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x28693b2)
#18 0x000055a3a35a499c llvm::legacy::PassManagerImpl::run(llvm::Module&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x286199c)
#19 0x000055a3a262abbb main (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x18e7bbb)
#20 0x00007f00bde3fc4c __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#21 0x00007f00bde3fd05 call_init ./csu/../csu/libc-start.c:128:20
#22 0x00007f00bde3fd05 __libc_start_main at GLIBC_2.2.5 ./csu/../csu/libc-start.c:347:5
#23 0x000055a3a2624921 _start /builddir/glibc-2.39/csu/../sysdeps/x86_64/start.S:117:0
```
This is caused by the fact that after the change, `f16`s are no longer
lowered as `f32`s in calls.
Two possible fixes are available:
- Update calling conventions to properly support passing `f16` as
integers.
- Update `useFPRegsForHalfType()` to return `true` so that `f16` are
still kept in `f32` registers, as before #110199.
This PR implements the first solution to not introduce any more ABI
changes as #110199 already did.
As of what is the correct ABI for halfs, I don't think there is a
correct answer. GCC doesn't support halfs on MIPS, and I couldn't find
any information on old MIPS ABI manuals either.
Commit: 4818dd33d84fcf41c08419a9960cadd473d536a9
https://github.com/llvm/llvm-project/commit/4818dd33d84fcf41c08419a9960cadd473d536a9
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
Log Message:
-----------
[HLSL] Rename resource's "h" member to "__handle". NFC (#116696)
This makes it clearer that the handle is an implementation detail by
using a name that's reserved.
Commit: 497b1ae15f7984c673e2d7af7bb365645723ca93
https://github.com/llvm/llvm-project/commit/497b1ae15f7984c673e2d7af7bb365645723ca93
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Type.h
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/target-type-properties.ll
Log Message:
-----------
[IR] Improve check for target extension types disallowed in globals. (#116639)
For target extension types that are not allowed to be used as globals,
also disallow them nested inside array and structure types.
Commit: f77126c549ced0db57d912bcd87145b1309843be
https://github.com/llvm/llvm-project/commit/f77126c549ced0db57d912bcd87145b1309843be
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-zero.ll
M llvm/test/Other/optimize-inrange-gep.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
R llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/PGOProfile/memprof_internal_linkage.ll
M llvm/test/Transforms/PhaseOrdering/X86/unroll-vectorizer.ll
M llvm/test/Transforms/PhaseOrdering/memcpy-offset.ll
M llvm/test/Transforms/PhaseOrdering/pr95152.ll
Log Message:
-----------
Revert "[FunctionAttrs] Add the "initializes" attribute inference (#97373)"
This reverts commit 661c593850715881d2805a59e90e6d87d8b9fbb8.
Multiple buildbot failures, e.g. https://lab.llvm.org/buildbot/#/builders/108/builds/6096
Commit: 4bd982d528ac2b2cb73d9fe6e534db84cfc16aaf
https://github.com/llvm/llvm-project/commit/4bd982d528ac2b2cb73d9fe6e534db84cfc16aaf
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
Log Message:
-----------
[HLSL] Fix resource kind for RasterizerOrderedStructuredBuffer (#116700)
This is a kind of StructuredBuffer, so it should be "Raw" and not
"Typed".
Commit: 43f84e7937d12a4d868a51244e9b3572812a1572
https://github.com/llvm/llvm-project/commit/43f84e7937d12a4d868a51244e9b3572812a1572
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaType.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp
Log Message:
-----------
[Clang] Enhance diagnostic by attaching source location to deduced type in trailing return without auto (#115786)
Fixes #78694
Commit: 738a047ed6380efdfd4b64968881675347d7f915
https://github.com/llvm/llvm-project/commit/738a047ed6380efdfd4b64968881675347d7f915
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/warn-shadow.cpp
Log Message:
-----------
[Clang] Skip shadow warnings for enum constants in distinct class scopes (#115656)
Fixes #62588
Commit: d4f2b71c3fd89da4dbdec0091a97a6a2c411145d
https://github.com/llvm/llvm-project/commit/d4f2b71c3fd89da4dbdec0091a97a6a2c411145d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86] Fix position of immediate argument in AVX512 VPCMP comparisons (#116646)
The 'i' arg was being put between the 'm' and 'b' args instead of afterwards like other avx512 instructions (VCMPPS/D, VPERMILPS/D etc.).
Commit: 51ad2901ca54a01a72db71622b116eb27ea6dcf2
https://github.com/llvm/llvm-project/commit/51ad2901ca54a01a72db71622b116eb27ea6dcf2
Author: Yihe Li <winmikedows at hotmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/Expr.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p3.cpp
M clang/test/Sema/c2x-nodiscard.c
M clang/test/SemaCXX/warn-unused-result.cpp
Log Message:
-----------
[Clang] Improve diagnostic on `[[nodiscard]]` attribute (#112521)
A follow-up to #112289.
When diagnosing an unused return value, if the diagnostic
is triggered by an attribute attached to a type, the type name
is now included in the diagnostic.
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Commit: b3e2b1a7eb258a7c9c55691d08342eface083499
https://github.com/llvm/llvm-project/commit/b3e2b1a7eb258a7c9c55691d08342eface083499
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.h
Log Message:
-----------
[clang-tidy][NFC] fix typo in ExceptionAnalyzer; `replace count()>0` with `contains` (#116635)
Commit: b2ec416aa5bcd89c4bc295163d60e5a2ecb99212
https://github.com/llvm/llvm-project/commit/b2ec416aa5bcd89c4bc295163d60e5a2ecb99212
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_mve.td
M clang/include/clang/Basic/arm_mve_defs.td
M clang/test/CodeGen/arm-mve-intrinsics/compare.c
Log Message:
-----------
[ARM] Fix NaN behaviour for MVE compare intrinsics (#116371)
The MVE intrinsics are defined as having the same behaviour as the
instructions which they correspond to. In particular, the vcmpleq and
vcmpltq intrinsics correspond to the VCMP instruction with the LE or LT
condition. However, these instructions with these two conditions do not
match the normal IEEE754 behaviour for NaNs, they return true if either
operand is a NaN, instead of false. Therefore we need to generate `fcmp`
IR instructions with the `ule` and `ult` conditions, instead of `ole`
and `olt`.
This differs from AdvSIMD, where only instructions with the EQ, GE and
GT conditions are available, and the intrinsics for the others are
defined by swapping the condition and operand order, so the results
match the IEEE754 behaviour for NaNs.
Commit: 61726add1b03a13906bd618a784d040a182e5968
https://github.com/llvm/llvm-project/commit/61726add1b03a13906bd618a784d040a182e5968
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve-intrinsics-fexpa.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll
M llvm/test/MC/AArch64/SVE/fexpa.s
Log Message:
-----------
[AArch64] Update predicate for FEXPA (#116613)
This patch updates predicate and backend tests for FEXPA instructions to
match [latest
spec](https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions/FEXPA--Floating-point-exponential-accelerator-).
Commit: 6f53ae6e613f5f7011c1752b94038114f4e1cc94
https://github.com/llvm/llvm-project/commit/6f53ae6e613f5f7011c1752b94038114f4e1cc94
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll
Log Message:
-----------
[X86] Properly chain PROBED_ALLOCA / SEG_ALLOCA (#116508)
These nodes should appear between CALLSEQ_START / CALLSEQ_END.
Previously, they could be scheduled after CALLSEQ_END because the nodes
didn't update the chain.
The change in a test is due to X86 call frame optimizer pass bailing out
for a particular call when CALLSEQ_START / CALLSEQ_END are not in the
same basic block. This happens because SEG_ALLOCA is expanded into a
sequence of basic blocks early. It didn't bail out before because the
closing CALLSEQ_END was scheduled before SEG_ALLOCA, in the same basic
block as CALLSEQ_START.
While here, simplify creation of these nodes: allocating a virtual
register and copying `Size` into it were unnecessary.
Commit: 95ab42661e8d1f57a4ef8e9d058b44627af0e58d
https://github.com/llvm/llvm-project/commit/95ab42661e8d1f57a4ef8e9d058b44627af0e58d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/subvector-broadcast.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Log Message:
-----------
[X86] Attempt to canonicalize vXf64 SHUFPD shuffle masks with undef elts to improve further folding (#116419)
Currently when creating a SHUFPD immediate mask, any undef shuffle elements are set to 0, which can limit options for further shuffle combining.
This patch attempts to canonicalize the mask to improve folding: first by detecting a per-lane broadcast style mask (which can allow us to fold to UNPCK instead), and second ensure any undef elements are set to an 'inplace' value to improve chances of the SHUFPD later folding to a BLENDPD (or be bypassed in a SimplifyMultipleUseDemandedVectorElts call).
This is very similar to canonicalization we already attempt in getV4X86ShuffleImm for vXi32/vXf32 SHUFPS/SHUFD shuffles.
Commit: 843498d4545b86fbd9c5b83d28bd39a22df52ef4
https://github.com/llvm/llvm-project/commit/843498d4545b86fbd9c5b83d28bd39a22df52ef4
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
A lld/test/ELF/aarch64-thunk-bti-multipass.s
M lld/test/ELF/aarch64-thunk-bti.s
Log Message:
-----------
[LLD][AArch64] Add test for missing AArch64 BTI thunk (#116665)
A follow up to PR #116402 to add a regression test. The original change
fixed the reproducer but that was not suitable to use as a regression
test.
This test case will fail with a LLD prior to #116402.
The disassembly for the thunk that starts as a short thunk but is later
a long thunk isn't quite right. It is missing a $d mapping symbol. I
think this can be fixed, but I've not done that in this patch to keep it
test only. It is not a regression introduced in #116402.
I've also removed a spurious --threads=1 I noticed in the original test
aarch64-thunk-bti.s
Commit: 7dcefb37a42e61ec6763f0c1e48a7a2e8ea2f6b1
https://github.com/llvm/llvm-project/commit/7dcefb37a42e61ec6763f0c1e48a7a2e8ea2f6b1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86] Tidyup up AVX512 FPCLASS instruction naming (#116661)
FPCLASS is a unary instruction with an immediate operand - update the naming to match similar instructions (e.g. VPSHUFD) by only using the source reg/mem and immediate in the instruction name
Commit: 129a1a27da34eab1e358f4a403f05e8efe44c586
https://github.com/llvm/llvm-project/commit/129a1a27da34eab1e358f4a403f05e8efe44c586
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
R clang/tools/amdgpu-arch/AMDGPUArchByHSA.cpp
A clang/tools/amdgpu-arch/AMDGPUArchByKFD.cpp
M clang/tools/amdgpu-arch/CMakeLists.txt
Log Message:
-----------
[amdgpu-arch] Replace use of HSA with reading sysfs directly (#116651)
Summary:
For Linux systems, we currently use the HSA library to determine the
installed GPUs. However, this isn't really necessary and adds a
dependency on the HSA runtime as well as a lot of overhead. Instead,
this patch uses the `sysfs` interface exposed by `amdkfd` to do this
directly.
Commit: cac6f2114974ca57e34600e21ae8df063c7edc10
https://github.com/llvm/llvm-project/commit/cac6f2114974ca57e34600e21ae8df063c7edc10
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/unique-dep-matrix.ll
Log Message:
-----------
[LoopInterchange] Make the entries of the Dependency Matrix unique (#116195)
The entries in the dependency matrix can contain a lot of duplicates,
which is unnecessary and results in more checks that we can avoid, and
this patch adds that.
Commit: 8a6a76b1e122536858531a8612cbbe6869803393
https://github.com/llvm/llvm-project/commit/8a6a76b1e122536858531a8612cbbe6869803393
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
Log Message:
-----------
[clangd] Let DefineOutline tweak handle member function templates (#112345)
Commit: b24acc06e1d465b3e3e4e28515dd437f6a7454f2
https://github.com/llvm/llvm-project/commit/b24acc06e1d465b3e3e4e28515dd437f6a7454f2
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
A flang/test/Fir/target-rewrite-integer-loongarch64.fir
Log Message:
-----------
[Flang][LoongArch] Add sign extension for i32 arguments and returns in function signatures. (#116146)
In loongarch64 LP64D ABI, `unsigned 32-bit` types, such as unsigned int,
are stored in general-purpose registers as proper sign extensions of
their 32-bit values. Therefore, Flang also follows it if a function
needs to be interoperable with C.
Reference:
https://github.com/loongson/la-abi-specs/blob/release/lapcs.adoc#Fundamental-types
Commit: a59976bea8ad76f18119a11391dc8ba3e6ba07d5
https://github.com/llvm/llvm-project/commit/a59976bea8ad76f18119a11391dc8ba3e6ba07d5
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
Log Message:
-----------
[InstCombine] Drop noundef attributes in `foldCttzCtlz` (#116718)
Closes https://github.com/llvm/llvm-project/issues/112068.
Commit: 42ed7757835122a63477b5783215e1100cd0b709
https://github.com/llvm/llvm-project/commit/42ed7757835122a63477b5783215e1100cd0b709
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstSimplify/logic-of-fcmps.ll
Log Message:
-----------
[InstSimplify] Generalize `simplifyAndOrOfFCmps` to handle fabs (#116590)
This patch generalizes https://github.com/llvm/llvm-project/issues/81027
to handle pattern `and/or (fcmp ord/uno X, 0), (fcmp pred fabs(X), Y)`.
Alive2: https://alive2.llvm.org/ce/z/tsgUrz
The correctness is straightforward because `fcmp ord/uno X, 0.0` is
equivalent to `fcmp ord/uno fabs(X), 0.0`. We may generalize it to
handle fneg as well.
Address comment
https://github.com/llvm/llvm-project/pull/116065#pullrequestreview-2434796846
Commit: 55fad5e980efbcc4a581057c558fedaadf91e877
https://github.com/llvm/llvm-project/commit/55fad5e980efbcc4a581057c558fedaadf91e877
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/tools/amdgpu-arch/AMDGPUArchByKFD.cpp
Log Message:
-----------
[amdgpu-arch] Fix unused StringRef result
Commit: 12180717cb1f94741c1cc63a9684aa20af7b6140
https://github.com/llvm/llvm-project/commit/12180717cb1f94741c1cc63a9684aa20af7b6140
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[NFC][LoopVectorize] Introduce new getEstimatedRuntimeVF function (#116247)
There are lots of places where we try to estimate the runtime
vectorisation factor based on the getVScaleForTuning TTI hook.
I've added a new getEstimatedRuntimeVF function and taught
several places in the vectoriser to use this new function.
Commit: c4030c896de00efa5eb2f79bba7902c5198ba893
https://github.com/llvm/llvm-project/commit/c4030c896de00efa5eb2f79bba7902c5198ba893
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
Log Message:
-----------
[RISCV] Fix FP64 DinX R Regclass (#116688)
This was a typo in llvm/llvm-project#112983 that didn't cause build
failures but is still wrong.
Commit: b03a747fc0fc27ddcad3b50f2117d8150ee262f1
https://github.com/llvm/llvm-project/commit/b03a747fc0fc27ddcad3b50f2117d8150ee262f1
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in reduce mul function. (#116626)
Part of #51787.
Follow up of #116243.
This patch adds constexpr support for the built-in reduce mul function.
Commit: 2153672ba32741de19a063ed26a2a5ed4b1c4b59
https://github.com/llvm/llvm-project/commit/2153672ba32741de19a063ed26a2a5ed4b1c4b59
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/CompilationInterfaces.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
Log Message:
-----------
[MLIR] Add callback functions for ModuleToObject (#116007)
In ModuleToObject flow, users may want to add some callback functions
invoked with LLVM IR/ISA for debugging or other purposes.
Commit: 01a1ca72e86e293822dedb7fb1bd6f2095f2dbe4
https://github.com/llvm/llvm-project/commit/01a1ca72e86e293822dedb7fb1bd6f2095f2dbe4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libcxx/test/std/utilities/utility/pairs/pairs.pair/ctor.default.pass.cpp
Log Message:
-----------
[libc++][NFC] Format a pait test
I'll be modifying this test in a future PR.
Commit: 4f0403fe96c0e93a1e75cbca6077c46ea3a5aad8
https://github.com/llvm/llvm-project/commit/4f0403fe96c0e93a1e75cbca6077c46ea3a5aad8
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/sinksplat.ll
Log Message:
-----------
[CodeGen][AArch64] Sink splat operands of FMul instructions (#116222)
Sink shuffle operands of FMul instructions if these are splats, as we
can generate lane-indexed variants for these.
Commit: 75a04c656061fb72c9259c4ae5fb8e41c396dd65
https://github.com/llvm/llvm-project/commit/75a04c656061fb72c9259c4ae5fb8e41c396dd65
Author: WÁNG Xuěruì <git at xen0n.name>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
Log Message:
-----------
[LoongArch][NFC] Fix the operand constraint of AMCAS instructions (#114508)
The `rd` operand of AMCAS instructions is both read and written, because
of the nature of compare-and-swap operations, but currently it is not
declared as such. Fix it for upcoming codegen enablement changes. In
order to do that, a piece of LoongArchAsmParser logic that relied on
TableGen-erated enum variants being ordered in a specific way needs
updating; this will be addressed in a following refactor. No functional
change intended.
While at it, restore vertical alignment for the definition lines.
Suggested-by: tangaac <tangyan01 at loongson.cn>
Link:
https://github.com/llvm/llvm-project/pull/114398#discussion_r1825362676
Commit: 9e0ea8c8816d9f5837ad3357be32dddce28c7fb1
https://github.com/llvm/llvm-project/commit/9e0ea8c8816d9f5837ad3357be32dddce28c7fb1
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
Log Message:
-----------
[InstCombine] Add extra test for preserving !llvm.access.group
Add variant with different metadata on all loads, for
https://github.com/llvm/llvm-project/pull/115868
Commit: c727b48287cc96888f9e262f23d53cf635cf3b3d
https://github.com/llvm/llvm-project/commit/c727b48287cc96888f9e262f23d53cf635cf3b3d
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/test/CodeGen/LoongArch/lsx/pr116008.ll
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
[SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075)
On loongarch64 with lsx extension, we select `VBITREV_W` for `v4i32 (xor
X, (shl splat(1), Y))`:
https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td#L1583-L1584
And `vsplat_imm_eq_1` is defined as:
https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td#L77-L87
For the `(bitconvert (v4i32 (build_vector)))` case, the pattern is
expected to be:
```
PATTERN: (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, (shl:{ *:[v4i32] } (bitconvert:{ *:[v4i32] } (build_vector:{ *:[v4i32] }))<<P:Predicate_vsplat_imm_eq_1>>, v4i32:{ *:[v4i32] }:$vk))
RESULT: (VBITREV_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, v4i32:{ *:[v4i32] }:$vk)
```
However, `simplifyTree` drops the `bitconvert` node and its predicates:
https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp#L3036-L3062
Then llvm will match `vsplat_imm_eq_1` for any v4i32 splats and cause a
miscompilation:
```
PATTERN: (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, (shl:{ *:[v4i32] } (build_vector:{ *:[v4i32] }), v4i32:{ *:[v4i32] }:$vk))
RESULT: (VBITREV_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, v4i32:{ *:[v4i32] }:$vk)
```
This patch adds additional checks for predicates associated with the
trivial bitconvert node. Unused patterns in the LoongArch target are
also removed.
Fixes https://github.com/llvm/llvm-project/issues/116008.
Commit: 681939e1545193b428a5f59175017c1c3741ea32
https://github.com/llvm/llvm-project/commit/681939e1545193b428a5f59175017c1c3741ea32
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/select-dependence.ll
Log Message:
-----------
[LAA] Add phi test variant for cross-iteration dependence (NFC)
Commit: 4728ac750295af12ba484ef4b7df4f7c4893eb4c
https://github.com/llvm/llvm-project/commit/4728ac750295af12ba484ef4b7df4f7c4893eb4c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/COFF/DLL.cpp
Log Message:
-----------
[LLD][COFF][NFC] Always align null chunks (#116677)
Currently, null chunks always follow other aligned chunks, so this patch
is NFC. However, it will become observable once support for ARM64X
imports is added. The import tables are shared between the native and EC
views. They are usually very similar, but in cases where they differ,
ARM64X relocations handle the discrepancies. If a DLL is only imported
by EC code, the native view will see it as importing zero functions from
this DLL (with ARM64X relocations replacing those null chunks with
actual imports). In this scenario, the null chunks may appear as the
very first chunks, meaning there is nothing else forcing their
alignment.
Commit: ee4fb3a8761b0abe231a8fdc127cd668cd9478f7
https://github.com/llvm/llvm-project/commit/ee4fb3a8761b0abe231a8fdc127cd668cd9478f7
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/docs/HowToAddABuilder.rst
Log Message:
-----------
[llvm][docs] Correct setence in How To Add A Builder
Looks like a few different phrasings got mashed up together.
Commit: a8744066e9ef252b687c1206ccbd1a6e3ae1c890
https://github.com/llvm/llvm-project/commit/a8744066e9ef252b687c1206ccbd1a6e3ae1c890
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Interpreter/PartialTranslationUnit.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
[clang-repl] Include consistency using the default clang actions. (#116610)
This patch improves the code reuse of the actions system and adds
several improvements for easier debugging via clang-repl
--debug-only=clang-repl.
The change inimproves the consistency of the TUKind when actions are
handled within a WrapperFrontendAction. In this case instead of falling
back to default TU_Complete, we forward to the TUKind of the ASTContext
which presumably was created by the intended action. This enables the
incremental infrastructure to reuse code.
This patch also clones the first llvm::Module because the first PTU now
can come from -include A.h and the presumption of llvm::Module being
empty does not hold. The changes are a first step to fix the issues with
`clang-repl --cuda`.
Commit: edf56f1fa27dce36c2b537290c26fec1af1a1140
https://github.com/llvm/llvm-project/commit/edf56f1fa27dce36c2b537290c26fec1af1a1140
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
A llvm/test/Transforms/LoopInterchange/call-instructions-remarks.ll
M llvm/test/Transforms/LoopInterchange/call-instructions.ll
A llvm/test/Transforms/LoopInterchange/inner-indvar-depend-on-outer-indvar-remark.ll
M llvm/test/Transforms/LoopInterchange/inner-indvar-depend-on-outer-indvar.ll
M llvm/test/Transforms/LoopInterchange/innermost-latch-uses-values-in-middle-header.ll
M llvm/test/Transforms/LoopInterchange/interchange-flow-dep-outer.ll
M llvm/test/Transforms/LoopInterchange/interchange-no-deps.ll
M llvm/test/Transforms/LoopInterchange/interchanged-loop-nest-3.ll
M llvm/test/Transforms/LoopInterchange/not-interchanged-dependencies-1.ll
M llvm/test/Transforms/LoopInterchange/not-interchanged-loop-nest-3.ll
M llvm/test/Transforms/LoopInterchange/not-interchanged-tightly-nested.ll
Log Message:
-----------
[LoopInterchange] Don't rely on ASSERTS build for tests. NFC. (#116780)
A lot of interchange tests unnecessary relied on a build with ASSERTS
enabled. Instead, simply check the IR output for both negative and
positive tests so that we don't rely on debug messages. This increases
test coverage as these tests will now also run with non-assert builds.
For a couple of files keeping some of the debug tests was useful, so
separated out them out and moved them to a similarly named *-remarks.ll
file.
Commit: f69646e51c61a6f3b7e1bc5c1df7d720026edfde
https://github.com/llvm/llvm-project/commit/f69646e51c61a6f3b7e1bc5c1df7d720026edfde
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.td
Log Message:
-----------
[XCore] Pattern match LADD/LSUB/LMUL/MACCU/MACCS/CRC8 (#116245)
Commit: bdf00e2216280edef1ec91ccc07987db92197b59
https://github.com/llvm/llvm-project/commit/bdf00e2216280edef1ec91ccc07987db92197b59
Author: Yadong Chen <cyd.matt at qq.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir
M mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/abi-load-store.mlir
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
M mlir/test/Dialect/SPIRV/Transforms/inlining.mlir
M mlir/test/Dialect/SPIRV/Transforms/layout-decoration.mlir
M mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir
M mlir/test/Target/SPIRV/array-two-step-roundtrip.mlir
M mlir/test/Target/SPIRV/array.mlir
M mlir/test/Target/SPIRV/debug.mlir
M mlir/test/Target/SPIRV/global-variable.mlir
M mlir/test/Target/SPIRV/loop.mlir
M mlir/test/Target/SPIRV/matrix.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/Target/SPIRV/physical-storage-buffer.mlir
M mlir/test/Target/SPIRV/undef.mlir
Log Message:
-----------
[mlir][spirv] Use assemblyFormat to define AccessChainOp assembly (#116545)
see #73359
Declarative assemblyFormat ODS is more concise and requires less
boilerplate than filling out cpp interfaces.
Changes:
- updates the AccessChainOp defined in SPIRVMemoryOps.td to use
assemblyFormat.
- Removes part print/parse from MemoryOps.cpp which is now generated by
assemblyFormat
- Updates tests to updated format
Commit: 03d8831fa8ef5b7e32172c718b550a454645faea
https://github.com/llvm/llvm-project/commit/03d8831fa8ef5b7e32172c718b550a454645faea
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/ptrmask.ll
Log Message:
-----------
[InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794)
Closes https://github.com/llvm/llvm-project/issues/116775.
Commit: abac5be673a2053cceab8ce25009722e45021b9f
https://github.com/llvm/llvm-project/commit/abac5be673a2053cceab8ce25009722e45021b9f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/conditional-variable-length-signext-after-high-bit-extract.ll
Log Message:
-----------
[InstCombine] Fix APInt ctor assertion
The (extended) bit width might not fit into the (non-extended)
type, resulting in an incorrect truncation of the compared value.
Fix this by using m_SpecificInt(), which is both simpler and
handles this correctly.
Fixes the assertion failure reported in:
https://github.com/llvm/llvm-project/pull/114539#issuecomment-2485799395
Commit: 26a89d2d0d73bc1ea4869c3409ce15059e4cae8e
https://github.com/llvm/llvm-project/commit/26a89d2d0d73bc1ea4869c3409ce15059e4cae8e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
Log Message:
-----------
[InstCombine] Make access.group metadata tags distinct in test.
Make access.group metadata tags used in b56e03fccd distinct.
Commit: af41c55673ab4342310f19bd2ef506803e9dc91c
https://github.com/llvm/llvm-project/commit/af41c55673ab4342310f19bd2ef506803e9dc91c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/CompilationInterfaces.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
Log Message:
-----------
Revert "[MLIR] Add callback functions for ModuleToObject" (#116811)
Reverts llvm/llvm-project#116007
Bot is broken.
Commit: 27dcae53eb9ea7b4d722d650e63567ca54e12d7d
https://github.com/llvm/llvm-project/commit/27dcae53eb9ea7b4d722d650e63567ca54e12d7d
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
[lldb] Convert file address to load address when reading memory for DW_OP_piece (#116411)
When parsing an optimized value and reading a piece from a file address,
LLDB tries to read the data from memory using that address.
This patch converts file address to load address before reading the
memory.
Fixes #111313
Fixes #97484
Commit: aff98e4be05a1060e489ce62a88ee0ff365e571a
https://github.com/llvm/llvm-project/commit/aff98e4be05a1060e489ce62a88ee0ff365e571a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMScheduleM7.td
M llvm/lib/Target/ARM/ARMScheduleM85.td
M llvm/test/CodeGen/ARM/urem-seteq-illegal-types.ll
Log Message:
-----------
[ARM] Stop gluing 1-bit shifts (#116547)
1. When two (or more) nodes are glued, DAG scheduler will always
schedule them as one piece, i.e. it will not allow any instructions to
be scheduled between them. It does so because if nodes are glued this
usually means that there is an implicit register dependency between
them, and an intervening node could clobber this physical register. When
emitting such nodes into machine IR, they will also be stuck together,
e.g.:
```
%9:gpr = MOVsrl_glue killed %8, implicit-def $cpsr
%10:gpr = RRX %3, implicit $cpsr
```
2. If a node has Glue result, SelectionDAG will not try to CSE this
node. If it did, it would break the implicit physical register
dependency. In practice this means that if a node with Glue result has
multiple uses, it has to be duplicated before each use. This the reason
for `ARMTargetLowering::duplicateCmp` to exist.
When using normal data dependency, dependent nodes can freely be
scheduled around. If there is a physical register dependency between
nodes, the physical register will be copied to/from a virtual register,
allowing other nodes to intervene between them. The resulting machine IR
might look like this:
```
%9:gpr = LSRs1 killed %8, implicit-def $cpsr
%10:gpr = COPY $cpsr
%11:gpr = ORRrsi killed %9, %3, 242, 14 /* CC::al */, $noreg, $noreg
%12:gpr = BICri killed %11, -2147483648, 14 /* CC::al */, $noreg, $noreg
$cpsr = COPY %10
%13:gpr = RRX %3, implicit $cpsr
```
The two copies are likely to be eliminated by register coalescer, given
that there are no instructions between them that clobber this physical
register. If the copies are unwanted in the first place (they could be
expensive or impossible), DAG scheduler will try to avoid inserting them
wherever possible, and the resulting machine IR will look like this:
```
%9:gpr = LSRs1 killed %8, implicit-def $cpsr
%10:gpr = ORRrsi killed %9, %3, 242, 14 /* CC::al */, $noreg, $noreg
%11:gpr = BICri killed %10, -2147483648, 14 /* CC::al */, $noreg, $noreg
%12:gpr = RRX %3, implicit $cpsr
```
On ARM, arithmetic operations and LSLS already use the new data flow
approach. This patch extends it to include 1-bit shifts.
Pull Request: https://github.com/llvm/llvm-project/pull/116547
Commit: 8e4423eb0888e5fe381a23ec1fa6969f2d096ed1
https://github.com/llvm/llvm-project/commit/8e4423eb0888e5fe381a23ec1fa6969f2d096ed1
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
A llvm/test/CodeGen/PowerPC/global-merge-aix-sections.ll
Log Message:
-----------
[AsmPrinter] Fix handling in emitGlobalConstantImpl for AIX (#116255)
When GlobalMerge creates a MergedGlobal of statics all initialized to
zero, emitGlobalConstantImpl sees a ConstantAggregateZero. This results
in just emitting zeros followed by labels for the aliases. We need to
handle it more like how emitGlobalConstantStruct does by emitting each
global inside the aggregate.
---------
Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
Commit: b0afa6bab9581abc91f23c854b3bb45095cbb057
https://github.com/llvm/llvm-project/commit/b0afa6bab9581abc91f23c854b3bb45095cbb057
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[clang] Change some placeholders from undef to poison [NFC]
Commit: 64e3466fd09ec0b02f27ec15a176611fe65ed961
https://github.com/llvm/llvm-project/commit/64e3466fd09ec0b02f27ec15a176611fe65ed961
Author: Alexey Karyakin <akaryaki at quicinc.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
M lld/test/ELF/hexagon-jump-error.s
M lld/test/ELF/hexagon.s
Log Message:
-----------
[lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925)
Range checks for R_HEX_B22_PCREL did not account for the fact that
offset is measured in instructions, not bytes.
Add a test for all range-checked relocations.
Commit: de6d1683d4163a384ce529bf9bd70bb9bcd16a41
https://github.com/llvm/llvm-project/commit/de6d1683d4163a384ce529bf9bd70bb9bcd16a41
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
R lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
Revert "[lldb] Convert file address to load address when reading memory for DW_OP_piece" (#116824)
Reverts llvm/llvm-project#116411
Commit: 21fc36bb193740a4e79e22a8d04fea09d394d27c
https://github.com/llvm/llvm-project/commit/21fc36bb193740a4e79e22a8d04fea09d394d27c
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
Log Message:
-----------
Revert "[FunctionAttrs] Add the "initializes" attribute inference" (#116825)
Reverts llvm/llvm-project#97373
clang tests fail
Commit: b3995aa338a2837626d31ae8fffc340d95b888ca
https://github.com/llvm/llvm-project/commit/b3995aa338a2837626d31ae8fffc340d95b888ca
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-cse.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
[AMDGPU] Decrease default NSA threshold from 3 to 2 (#116624)
In graphics shaders it is better overall to use NSA encoding for IMAGE
instructions, because the benefit of less constrained register
allocation outweighs the cost of larger encoding. In particular NSA form
often avoids the need for extra V_MOV_B32 instructions between IMAGE
instructions, which can allow the IMAGE instructions to be claused.
Note that in GFX12 there is no longer a bit in the encoding to choose
between NSA and non-NSA forms, so this only affects GFX10 and GFX11.
Commit: 03506bc0a99fd53d0f4e3d0bd77eb2f7bad96102
https://github.com/llvm/llvm-project/commit/03506bc0a99fd53d0f4e3d0bd77eb2f7bad96102
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/TextAPI/InterfaceFile.cpp
M llvm/unittests/TextAPI/TextStubV5Tests.cpp
Log Message:
-----------
[TextAPI] Add missing attribute to remove/merge/extract operations (#116729)
Commit: 48591953e97b9ecf32e60fe0233ca0ba2765184e
https://github.com/llvm/llvm-project/commit/48591953e97b9ecf32e60fe0233ca0ba2765184e
Author: Kai Luo <gluokai at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
A llvm/test/tools/llvm-mca/ARM/m4-ldr-str-w.s
Log Message:
-----------
[Thumb2][ARMAsmParser] Fix processing of `t2{LDR,STR}{*}_{PRE,POST}_imm` when changing to its concrete form (#116757)
`t2{LDR,STR}{*}_{PRE,POST}_imm` is pseudo instruction and is expected to
be `t2{LDR,STR}{*}_{PRE,POST}`. During building the new MCInst of
`t2{LDR,STR}{*}_{PRE,POST}`, the order of operands looks incorrect.
Fixes https://github.com/llvm/llvm-project/issues/97020.
---------
Co-authored-by: Kai Luo <luokai at vivo.com>
Commit: 30fad6a97611ac397bdaa429730851f53752d013
https://github.com/llvm/llvm-project/commit/30fad6a97611ac397bdaa429730851f53752d013
Author: Aaron Puchert <aaron.puchert at sap.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ThreadSafetyAnalysis.rst
Log Message:
-----------
Thread safety analysis: Implement MutexLocker factory functions in documentation
We skipped adding definitions in 54bfd0484615 because we'd emit false
positive warnings on the closing braces. But these have been fixed in
commit e64ef634bbd9.
Commit: 0d9dc421143a0acd414a23f343b555c965a471f1
https://github.com/llvm/llvm-project/commit/0d9dc421143a0acd414a23f343b555c965a471f1
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/test/CAPI/execution_engine.c
M mlir/test/mlir-cpu-runner/simple.mlir
M mlir/unittests/ExecutionEngine/Invoke.cpp
Log Message:
-----------
[MLIR] Add SystemZ arg extensions for some tests (#116314)
The SystemZ ABI requires that i32 values should be extended when passed
between functions.
This patch fixes some tests that were lacking this, either by adding
some SystemZ specific inlinings of test functions or by disabling the
verification of this with the CL option controlling this.
Fixes #115564
Commit: d37554b69b414ee00eacfd35eaa2e051b1ade2d7
https://github.com/llvm/llvm-project/commit/d37554b69b414ee00eacfd35eaa2e051b1ade2d7
Author: Benson Chu <bensonchu457 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
Log Message:
-----------
[ARM] Specifically delineate between different GPRCS2 positions
Currently, the relative position of GPRCS2 (with respect to other
instructions in the prologue of a function) can be different depending
on the type of ARMSubtarget::PushPopSplitVariant.
When the PushPopSpiltVariant is SplitR11WindowsSEH, GPRCS2 comes
after both GPRCS1 and DPRCS2:
GPRCS1
DPRCS1
GPRCS2
However, in all other cases, GPRCS2 comes before DPRCS1, like so:
GPRCS1
GPRCS2
DPRCS1
This makes the MI walking code in ARMFrameLowering::emitPrologue a bit
confusing. If GPRCS2Size is non-zero, we also have to check the
PushPopSplitVariant to know if we will encounter the DPRCS1 push
instruction first or the GPRCS2 push instruction first.
This commit changes to SplitR11WindowsSEH such that the spill area is
as follows:
GPRCS1
DPRCS1
GPRCS3
This disambiguates a lot of the ARMFrameLowering.cpp MI traversal
code.
Commit: 1bfcf89107349b03ac8ab113387ced0deef4fc4c
https://github.com/llvm/llvm-project/commit/1bfcf89107349b03ac8ab113387ced0deef4fc4c
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] port a8744066e9ef252b687c1206ccbd1a6e3ae1c890
Commit: 8b2dff960d9d987c583c3a6d5729f01d101dc401
https://github.com/llvm/llvm-project/commit/8b2dff960d9d987c583c3a6d5729f01d101dc401
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
Log Message:
-----------
[lldb] Fix a positioning bug in diagnostics output (#116711)
The old code did not take the indentation into account.
Commit: 3e552ed58980d240993d7e937dd38c404c03ed66
https://github.com/llvm/llvm-project/commit/3e552ed58980d240993d7e937dd38c404c03ed66
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Add release notes for LLDB inline diagnostics (#116841)
Commit: 6b4f67545d87d5305cbbc20a678fb97ede995579
https://github.com/llvm/llvm-project/commit/6b4f67545d87d5305cbbc20a678fb97ede995579
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
Log Message:
-----------
[lldb] Improve rendering of inline diagnostics on the same column (#116727)
depends on https://github.com/llvm/llvm-project/pull/116711
[lldb] Improve rendering of inline diagnostics on the same column by
fixing the indentation and printing these annotations in the original
order.
Before
a+b+c;
^ ^ ^
| | error: 3
| |note: 2b
| error: 2a
error: 1
After
a+b+c;
^ ^ ^
| | error: 3
| error: 2a
| note: 2b
error: 1
Commit: 0611a668d1389c8573e83eeafa6d5f6172c4cbc2
https://github.com/llvm/llvm-project/commit/0611a668d1389c8573e83eeafa6d5f6172c4cbc2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
Log Message:
-----------
[ARM] Fix a warning
This patch fixes:
llvm/lib/Target/ARM/ARMFrameLowering.cpp:1404:39: error: unused
variable 'PushPopSplit' [-Werror,-Wunused-variable]
Commit: 197e0125c3ed991f11d97d27e529c02af06e9f37
https://github.com/llvm/llvm-project/commit/197e0125c3ed991f11d97d27e529c02af06e9f37
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libc/src/__support/OSUtil/gpu/exit.cpp
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_util.h
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdlib/gpu/abort.cpp
Log Message:
-----------
[libc] Replace usage of GPU helpers with ones from 'gpuintrin.h' (#116454)
Summary:
These are provided by a resource header now, cut these from the
dependencies and only provide the ones we use for RPC.
Commit: c84a99dfd391eb4d89aff8d6453016045098b444
https://github.com/llvm/llvm-project/commit/c84a99dfd391eb4d89aff8d6453016045098b444
Author: Michele Scandale <michele.scandale at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/unittests/Analysis/InlineAdvisorPlugin/InlineAdvisorPlugin.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
Log Message:
-----------
[InlineAdvisor] Update documentation for `PluginInlineAdvisorAnalysis` (NFC). (#116715)
This commit updates the documentation for `PluginInlineAdvisorAnalysis`
based on the feedback in PR#114615 suggesting that
`registerAnalysisRegistrationCallback` should be the preferred method to
register the plugin inline advisor analysis.
Commit: def22f4e718daa74c2d0c03a32e32d4913a46278
https://github.com/llvm/llvm-project/commit/def22f4e718daa74c2d0c03a32e32d4913a46278
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_client.h
M libc/src/__support/RPC/rpc_util.h
Log Message:
-----------
[libc] Pull last dependencies into rpc_util.h (#116693)
Summary:
Last bit in-place to remove the dependencies on LLVM libc headers. This
just pulls the `sleep_briefly`, `std::optinal` and `type_traits`
definitions into the
`rpc_util.h` header. This duplicates some code for now but will soon be
moved into the `include/rpc` directory. At that point I will remove all
the `LIBC_INLINE` and just make it `RPC_INLINE`. Internal use will then
have a wrapper to make it all LIBC namespaced, implementations will then
implement their own handling.
Commit: 39e65b87066f6de43b1c57ff08cb6ce95219ce15
https://github.com/llvm/llvm-project/commit/39e65b87066f6de43b1c57ff08cb6ce95219ce15
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vl.s
Log Message:
-----------
[llvm-mca][x86] Add AVX512 VMOVNTDQA instruction test coverage
Commit: 8bdf13b11638d2f3e6792a573fc2be830a03790a
https://github.com/llvm/llvm-project/commit/8bdf13b11638d2f3e6792a573fc2be830a03790a
Author: apple-fcloutier <75502309+apple-fcloutier at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Parse/ParseObjc.cpp
A clang/test/SemaObjC/method-param-named-id.m
Log Message:
-----------
[ObjC] Name lookup in methods shouldn't allow shadowing types (#116683)
Arguably as a bug, Clang has previously not mixed up Objective-C
parameter names with types. This allows developers to write parameter
names that _should_ shadow type names, but don't. For instance:
@interface Foo
-(void)foo:(int)id bar:(id)name; // OK
@end
Commit 97788089988a2ace63d717cadbcfe3443f380f9c changed the way that
parameters are parsed to bring it more in line with how C parameters are
parsed, but it breaks the example above. Given an expectation that the
change wouldn't introduce source breaks, this is not something we can go
forward with.
97788089988a2ace63d717cadbcfe3443f380f9c did this so that late-parsed
attributes could reference Objective-C parameters. This change buffers
Objective-C parameter info until after all parameters are parsed and
turns them into parameter declarations before realizing late-parsed
attributes instead.
Radar-ID: 139996306
Commit: 2186a008c98e8bb6738fe9120441d6bd15c272f3
https://github.com/llvm/llvm-project/commit/2186a008c98e8bb6738fe9120441d6bd15c272f3
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
Log Message:
-----------
[HLSL] Fix placement of `const` for resource operator[] (#116698)
We had an incorrect AST here - We want `const T &`, not `T &const`.
Commit: b28eebf9264a6b6843b15d4e17be70604f3e4ad8
https://github.com/llvm/llvm-project/commit/b28eebf9264a6b6843b15d4e17be70604f3e4ad8
Author: Yashas Andaluri <quic_yandalur at quicinc.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RDFGraph.cpp
A llvm/test/CodeGen/Hexagon/rdf-dce-double-cover.mir
Log Message:
-----------
[RDF] Fix cover check when linking refs to defs (#113888)
During RDF graph construction, linkRefUp method links a register ref to
its upward reaching defs until all RegUnits of the ref have been covered
by defs.
However, when a sub-register def covers some, but not all, of the
RegUnits of a previous super-register def, a super-register ref is not
linked to the super-register def.
This can result in certain super register defs being dead code
eliminated.
This patch fixes the cover check for a register ref. A def must be
skipped only when all RegUnits of that def have already been covered by
a previously seen def.
Commit: dd78d7c7be5b8948cf5841e8033e59adebf230ad
https://github.com/llvm/llvm-project/commit/dd78d7c7be5b8948cf5841e8033e59adebf230ad
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/Editline.h
M lldb/source/Host/common/Editline.cpp
A lldb/test/API/terminal/TestEditlineCompletions.py
Log Message:
-----------
[lldb] Improve editline completion formatting (#116456)
This patch improves the formatting of editline completions. The current
implementation is naive and doesn't account for the terminal width.
Concretely, the old implementation suffered from the following issues:
- We would unconditionally pad to the longest completion. If that
completion exceeds the width of the terminal, that would result in a lot
of superfluous white space and line wrapping.
- When printing the description, we wouldn't account for the presence of
newlines, and they would continue without leading padding.
The new code accounts for both. If the completion exceeds the available
terminal width, we show what fits on the current lined followed by
ellipsis. We also no longer pad beyond the length of the current line.
Finally, we print the description line by line, with the proper leading
padding. If a line of the description exceeds the available terminal
width, we print ellipsis and won't print the next line.
Before:
```
Available completions:
_regexp-attach -- Attach to process by ID or name.
_regexp-break -- Set a breakpoint using one of several shorthand
formats.
_regexp-bt -- Show backtrace of the current thread's call sta
ck. Any numeric argument displays at most that many frames. The argument 'al
l' displays all threads. Use 'settings set frame-format' to customize the pr
inting of individual frames and 'settings set thread-format' to customize th
e thread header. Frame recognizers may filter thelist. Use 'thread backtrace
-u (--unfiltered)' to see them all.
_regexp-display -- Evaluate an expression at every stop (see 'help
target stop-hook'.)
```
After:
```
Available completions:
_regexp-attach -- Attach to process by ID or name.
_regexp-break -- Set a breakpoint using one of several shorth...
_regexp-bt -- Show backtrace of the current thread's call ...
_regexp-display -- Evaluate an expression at every stop (see 'h...
```
rdar://135818198
Commit: 61057b0f6fa8975c2ebc20ed339d59d28bbc6b03
https://github.com/llvm/llvm-project/commit/61057b0f6fa8975c2ebc20ed339d59d28bbc6b03
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/docs/use/links.rst
Log Message:
-----------
[lldb/www] Garbage collect old videos and add new ones (#116838)
Fixes #66476
Commit: 68b7ab127f580bdc422c0dde4bfcd4a2daaeb630
https://github.com/llvm/llvm-project/commit/68b7ab127f580bdc422c0dde4bfcd4a2daaeb630
Author: ddubov100 <155631080+ddubov100 at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Interfaces/TilingInterface.td
Log Message:
-----------
[MLIR] Fully qualify entities in the ::mlir namespace in TilingInterface.td. (#116765)
Adding mlir namespace to TilingInterface.td.
Otherwise it can't be used with dialects not nested under the mlir
namespace.
Commit: d8a1c6d72739c99f4b52a84e907b96b685b44c5e
https://github.com/llvm/llvm-project/commit/d8a1c6d72739c99f4b52a84e907b96b685b44c5e
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/test/Parser/cxx2c-delete-with-message.cpp
Log Message:
-----------
[Clang] update reasoned delete diagnostic kind to use Extension, making it pedantic only (#114713)
Fixes #109311
---
https://github.com/llvm/llvm-project/issues/109311#issuecomment-2422963686
Commit: 79682c4d57620e623fb30271cc8003d0c9e14a01
https://github.com/llvm/llvm-project/commit/79682c4d57620e623fb30271cc8003d0c9e14a01
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/bv-root-part-of-graph.ll
Log Message:
-----------
[SLP]Check if the buildvector root is not a part of the graph before deletion
If the buildvector root has no uses, it might be still needed as a part
of the graph, so need to check that it is not a part of the graph before
deletion.
Fixes #116852
Commit: eff60d83b0533954eda153fbbabb3e99d46bde94
https://github.com/llvm/llvm-project/commit/eff60d83b0533954eda153fbbabb3e99d46bde94
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Make extended loads and truncating stores with s16 register type and s8 memory type legal.
This addresses some failures I've seen in testing on real code.
Commit: ca79e126482084fe4681dd777fdd2948d4e7c81b
https://github.com/llvm/llvm-project/commit/ca79e126482084fe4681dd777fdd2948d4e7c81b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
[flang][cuda] Handle implicit global in cuf kernel and nested statement (#116846)
Update the implicit global detection by looking for them in the CUF
kernel and also update to a walk so nested `fir.address_of` in nested
statement are also accounted for.
Commit: 565a9ac7df3815ed038938942be4cf1471de4755
https://github.com/llvm/llvm-project/commit/565a9ac7df3815ed038938942be4cf1471de4755
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
Log Message:
-----------
[SPIR-V] Disable Machine Sink pass in SPIR-V Backend (#116060)
Some standard passes that optimize machine instructions in SSA form uses
MI.isPHI() that doesn't account for OpPhi in SPIR-V and so are able to
break the CFG. MachineSink is among such passes (see for example
https://github.com/llvm/llvm-project/blob/1884ffc41c20b1e08b30eef4e8ebbcc54543a139/llvm/lib/CodeGen/MachineSink.cpp#L630),
so this PR disables the pass to ensure correctness of the generated
code.
There is a reproducer of the issue that demonstrates how MachineSink is
able to generate an invalid code for the SPIR-V Backend
```
error: line 6837: OpPhi must appear within a non-entry block before all non-OpPhi instructions (except for OpLine, which can be mixed with OpPhi).
%z_fra_3_1 = OpPhi %uint %and187 %4250 %inc194 %4257 %uint_0 %4264
```
The reproducer is a part of SYCL end-to-end test suite
(https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/DeviceLib/imf_fp32_rounding_test.cpp).
At the moment it doesn't seem feasible to make it a part of the SPIR-V
Backend test suite due to a far too big size of the intermediate LLVM IR
that causes the problem.
Commit: 996553228f8b2f3219451a2514bd6f9380f13e28
https://github.com/llvm/llvm-project/commit/996553228f8b2f3219451a2514bd6f9380f13e28
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinarySection.h
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/eh-frame-overwrite.test
Log Message:
-----------
[BOLT] Overwrite .eh_frame and .gcc_except_table (#116755)
Under --use-old-text or --strict, we completely rewrite contents of EH
frames and exception tables sections. If new contents of either section
do not exceed the size of the original section, rewrite the section
in-place.
Commit: 5681f756c058204d7e41d065f91c5f3c36a434a7
https://github.com/llvm/llvm-project/commit/5681f756c058204d7e41d065f91c5f3c36a434a7
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/docs/use/links.rst
Log Message:
-----------
Fix broken link
Commit: 5b79152937722a5b80c92146b7c2453401739d5f
https://github.com/llvm/llvm-project/commit/5b79152937722a5b80c92146b7c2453401739d5f
Author: David Green <david.green at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/phi.ll
Log Message:
-----------
[AArch64] Make sure there is test coverage for ptr phis. NFC
Commit: 174899f738b31216750ac59562475966b0b0be42
https://github.com/llvm/llvm-project/commit/174899f738b31216750ac59562475966b0b0be42
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Utility/DiagnosticsRendering.cpp
Log Message:
-----------
[lldb] Refactor helper by using iterators and in-place edits (NFC) (#116876)
Based on post-commit review feedback by Felipe Piovezan!
Commit: df13acf344a4233777789d0052b3d09bec6a5180
https://github.com/llvm/llvm-project/commit/df13acf344a4233777789d0052b3d09bec6a5180
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
A clang/test/SemaCUDA/spirv-attrs.cu
Log Message:
-----------
[CudaSPIRV] Add support for optional spir-v attributes (#116589)
Add support for optional spir-v attributes.
Test plan:
ninja check-all
Commit: 27046bad9751e85ba79db9248ff1f36e9d4d19eb
https://github.com/llvm/llvm-project/commit/27046bad9751e85ba79db9248ff1f36e9d4d19eb
Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
Log Message:
-----------
[mlir][XeGPU] Add a builder for xegpu.create_nd_tdesc op. (#116472)
The builder is needed to support dynamic meref as source operand in
xegpu.create_nd_tdesc op.
Commit: 47ef5c4b7f85bc1c8a859d721db9fd1dde7b8d8e
https://github.com/llvm/llvm-project/commit/47ef5c4b7f85bc1c8a859d721db9fd1dde7b8d8e
Author: annuasd <97934297+annuasd at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/DialectQuant.cpp
M mlir/python/mlir/_mlir_libs/_mlir/dialects/quant.pyi
M mlir/test/python/dialects/quant.py
Log Message:
-----------
[mlir][Bindings] Fix missing return value of functions and incorrect type hint in pyi. (#116731)
The zero points of UniformQuantizedPerAxisType should be List[int].
And there are two methods missing return value.
Co-authored-by: 牛奕博 <niuyibo at niuyibodeMacBook-Pro.local>
Commit: e3ff649abe975c04aa179622c6f4757e7aa66aaf
https://github.com/llvm/llvm-project/commit/e3ff649abe975c04aa179622c6f4757e7aa66aaf
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Target/Thread.cpp
Log Message:
-----------
[lldb] Fix comment in ~Thread (NFC) (#116850)
Commit: 1073e9049bb2483a6ff554cbc5da1c2fd0b9d75d
https://github.com/llvm/llvm-project/commit/1073e9049bb2483a6ff554cbc5da1c2fd0b9d75d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Clean up more real instruction predicate overrides (#116868)
In general real instructions should not have manually specified
predicates.
Commit: 1c1fbf51b5ec9657e5da7fa94ee892273255544a
https://github.com/llvm/llvm-project/commit/1c1fbf51b5ec9657e5da7fa94ee892273255544a
Author: Sam Clegg <sbc at chromium.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/test/wasm/tls-non-shared-memory.s
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
Log Message:
-----------
[lld][WebAssembly] Fix TLS-relative relocations when linking without shared memory (#116136)
TLS-relative relocations always need to be relative the TLS section
since they get added to `__tls_base` at runtime.
Without this change the tls base address was effectively being added to
the final value twice in this case.
This only effects code the is built with `-pthread` but linked without
shared memory (i.e. without threads).
Fixes: https://github.com/emscripten-core/emscripten/issues/22880
Commit: 076513646cfd922b42ea0e87e2f07397a3ff41a4
https://github.com/llvm/llvm-project/commit/076513646cfd922b42ea0e87e2f07397a3ff41a4
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/InstCombine/intersect-accessgroup.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/PhaseOrdering/X86/preserve-access-group.ll
Log Message:
-----------
[Local] Only intersect llvm.access.group metadata if instr moves. (#115868)
Preserve llvm.access.group metadata on the replacement instruction, if
it does not move. In that case, the program would be UB, if the parallel
property encoded in the metadata does not hold.
This matches the LangRef recently updated in #116220
PR https://github.com/llvm/llvm-project/pull/115868
Commit: 4d7df40c084d9c551761027f873a59ac83cb398d
https://github.com/llvm/llvm-project/commit/4d7df40c084d9c551761027f873a59ac83cb398d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize constant src in memory (#116851)
When the src of the data transfer is a constant, it needs to be
materialized in memory to be able to perform a data transfer.
```
subroutine sub1()
real, device :: a(10)
integer :: I
do i = 5, 10
a(i) = -4.0
end do
end
```
Commit: 41c86ca714a68eea8c73cf57fba28718d466660b
https://github.com/llvm/llvm-project/commit/41c86ca714a68eea8c73cf57fba28718d466660b
Author: Petr Penzin <penzin.dev at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add TT-Ascalon-d8 processor (#115100)
Ascalon is an out-of-order CPU core from Tenstorrent. Overview:
https://tenstorrent.com/ip/tt-ascalon
Adding 8-wide version, -mcpu=tt-ascalon-d8. Scheduling model will be
added in a separate PR.
---------
Co-authored-by: Anton Blanchard <antonb at tenstorrent.com>
Commit: 012dd8be4b5a4c00deb22345c630990f160b3aa3
https://github.com/llvm/llvm-project/commit/012dd8be4b5a4c00deb22345c630990f160b3aa3
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/CMakeLists.txt
Log Message:
-----------
[libcxx] Passthrough the necessary CMake variables to benchmarks (#116644)
This addresses the issue uncovered by #115361. Previously, we weren't
building benchmarks in many cases due to the following block:
https://github.com/llvm/llvm-project/blob/e58949632e91477af58d983f3b66369e6a2c8233/libcxx/CMakeLists.txt#L162-L172
We need to passthrough the necessary variables into the benchmarks
subbuild and use correct syntax.
Commit: 7c41b5ccdcf0f5de1b9b254693635283faff3658
https://github.com/llvm/llvm-project/commit/7c41b5ccdcf0f5de1b9b254693635283faff3658
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.h
A compiler-rt/test/rtsan/report_error_summary.cpp
Log Message:
-----------
[rtsan] Add support for ReportErrorSummary (#116424)
Adding support for the extra SUMMARY line that is output by most
compilers. This also adds the ability for end-users to specify their own
handlers for reporting these errors (see the test).
Commit: 3c8818cf2deaa050817ecec1c99cf939295feced
https://github.com/llvm/llvm-project/commit/3c8818cf2deaa050817ecec1c99cf939295feced
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[rtsan] Add more file descriptor interceptors - dup*, lseek (#116853)
# Why we think these are real-time unsafe
They correspond directly to system calls in linux and OSX, they are
manipulating a shared resource, which likely takes some operating-system
synchronization.
Commit: 944478dd62a78f6bb43d4da210643affcc4584b6
https://github.com/llvm/llvm-project/commit/944478dd62a78f6bb43d4da210643affcc4584b6
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
A clang/tools/clang-shlib/simple_version_script.map.in
M llvm/CMakeLists.txt
Log Message:
-----------
Introduce symbol versioning for clang-cpp (#116556)
The situation that required symbol versions on the LLVM shared library
can also happen for clang-cpp, although it is less common: different
tools require different versions of the library, and through transitive
dependencies a process ends up with multiple copies of clang-cpp. This
causes havoc with ELF, because calls meant to go one version of the
library end up with another.
I've also considered introducing a symbol version globally, but for
example the clang (C) library and other targets outside of LLVM/Clang,
e.g. libc++, would not want that. So it's probably best if we keep it to
those libraries.
Commit: 3a63407686313f46f9abc664fd10b01f4359ee27
https://github.com/llvm/llvm-project/commit/3a63407686313f46f9abc664fd10b01f4359ee27
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__atomic/atomic.h
R libcxx/include/__atomic/atomic_base.h
M libcxx/include/atomic
M libcxx/include/barrier
M libcxx/include/latch
M libcxx/include/module.modulemap
M libcxx/include/semaphore
M libcxx/src/barrier.cpp
Log Message:
-----------
[libc++] Make __atomic_base into an implementation detail of std::atomic (#115764)
The __atomic_base base class is only useful to conditionalize the
operations we provide inside std::atomic. It shouldn't be used directly
from other places in the library which can use std::atomic directly
instead.
Since we've granularized our includes, using std::atomic directly should
not make much of a difference compile-time wise.
This patch starts using std::atomic directly from other classes like
std::barrier and std::latch. Changing this shouldn't be an ABI break
since both classes have the same size and layout.
The benefits of this patch are isolating other parts of the code base
from implementation details of std::atomic and simplifying the mental
model for std::atomic's layers of implementation by making it clear that
__atomic_base is only an implementation detail of std::atomic.
Commit: d8bd7f11c8c781646406e76731dd8d76ed5425dd
https://github.com/llvm/llvm-project/commit/d8bd7f11c8c781646406e76731dd8d76ed5425dd
Author: Kyle Wang <ec1wng at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir] Support ROCDL::ReadlaneOp (#116593)
Support ROCDL::ReadlaneOp to solve
https://github.com/ROCm/triton-internal/issues/411.
Commit: 581f755a2a22910da8a9a160c4ea5efeb43a40b4
https://github.com/llvm/llvm-project/commit/581f755a2a22910da8a9a160c4ea5efeb43a40b4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 3a6340768631
Commit: 21df32511b558b2c1e24fe23f677fffaad4da333
https://github.com/llvm/llvm-project/commit/21df32511b558b2c1e24fe23f677fffaad4da333
Author: Perry Gibson <Wheest at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/value.py
Log Message:
-----------
[mlir,python] Expose replaceAllUsesExcept to Python bindings (#115850)
Problem originally described in [the forums
here](https://discourse.llvm.org/t/mlir-python-expose-replaceallusesexcept/83068/1).
Using the MLIR Python bindings, the method
[`replaceAllUsesWith`](https://mlir.llvm.org/doxygen/classmlir_1_1Value.html#ac56b0fdb6246bcf7fa1805ba0eb71aa2)
for `Value` is exposed, e.g.,
```python
orig_value.replace_all_uses_with(
new_value
)
```
However, in my use-case I am separating a block into multiple blocks, so
thus want to exclude certain Operations from having their Values
replaced (since I want them to diverge).
Within Value, we have
[`replaceAllUsesExcept`](https://mlir.llvm.org/doxygen/classmlir_1_1Value.html#a9ec8d5c61f8a6aada4062f609372cce4),
where we can pass the Operations which should be skipped.
This is not currently exposed in the Python bindings: this PR fixes
this. Adds `replace_all_uses_except`, which works with individual
Operations, and lists of Operations.
Commit: d29a50f358e71a695b23e456d66ed2924617deb9
https://github.com/llvm/llvm-project/commit/d29a50f358e71a695b23e456d66ed2924617deb9
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
Revert "[lldb] Allow fetching of RA register when above fault handler (#98566)"
This reverts commit fd424179dcb3417fc0675f77d2bf06c750dd1c33.
This patch has two problems. First, it is unnecessary, Pavel landed
a fix a week or so before mine which solves this problem in
bbd54e08b08f5ccd38c4665178e65c58f7b14459 . Second, the fix is
incorrect; for a function above a trap handler, where all registers
are available, this patch would have lldb fetch the return address
register from frame 0. This might be 10 frames up in the stack;
the frame 0 return address register is incorrect. The change would
have been correct a short bit later than this, but Pavel's fix is
executed earlier in the function and none of this is needed.
Commit: e72209db3586ee03f433fe30c3bfac6c9c4d9d6f
https://github.com/llvm/llvm-project/commit/e72209db3586ee03f433fe30c3bfac6c9c4d9d6f
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[MachineSink] Fix stable sort comparator (#116705)
Fix the comparator in `stable_sort()` to satisfy the strict weak
ordering requirement.
In https://github.com/llvm/llvm-project/pull/115367 this comparator was
changed to use `getCycleDepth()` when `shouldOptimizeForSize()` is true.
However, I mistakenly changed to logic so that we use `LHSFreq <
RHSFreq` if **either** of them are zero. This causes us to fail the last
requirment (https://en.cppreference.com/w/cpp/named_req/Compare).
> if comp(a, b) == true and comp(b, c) == true then comp(a, c) == true
Commit: 73216cd71229fc7ccd380c334d45f809787f41b1
https://github.com/llvm/llvm-project/commit/73216cd71229fc7ccd380c334d45f809787f41b1
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
Log Message:
-----------
[flang] Rework CUDA kernel DO host array check (#116301)
Don't worry about derived type components unless they are pointers or
allocatables.
Commit: 300370c27b31ced572b957b6efdbb2bcee277392
https://github.com/llvm/llvm-project/commit/300370c27b31ced572b957b6efdbb2bcee277392
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-io.cpp
M flang/test/Semantics/io03.f90
M flang/test/Semantics/io04.f90
M flang/test/Semantics/undef-result01.f90
Log Message:
-----------
[flang] Catch I/O statement error (#116647)
Fortran doesn't have unformatted internal I/O, so catch attempts to use
internal units without a format or namelist specifier.
Fixes https://github.com/llvm/llvm-project/issues/116586.
Commit: d20f55fbd5786f056ff8417bddc7c47df6c7f90b
https://github.com/llvm/llvm-project/commit/d20f55fbd5786f056ff8417bddc7c47df6c7f90b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/pointer02.f90
Log Message:
-----------
[flang] Silence bogus error on local proc pointer initializer (#116663)
A procedure pointer is allowed to be initialized with the subprogram in
which it is local, assuming that other requirements are satisfied.
Add a good test for local procedure pointer initialization, as no test
existed for the error message in question.
Fixes https://github.com/llvm/llvm-project/issues/116566.
Commit: a54e8b2cc45f079881ee8013143494e9a1315929
https://github.com/llvm/llvm-project/commit/a54e8b2cc45f079881ee8013143494e9a1315929
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/tools.cpp
A flang/test/Semantics/smp-def02.f90
Log Message:
-----------
[flang] Silence bogus error about insufficiently defined interfaces (#116694)
The interfaces of separate module procedures are sufficiently well
defined in a submodule to be used in a local generic interface; the
compiler just needed to work a little harder to find them.
Fixes https://github.com/llvm/llvm-project/issues/116567.
Commit: 6e4821487fcab23bf9ca7f7c667826956bee4d1b
https://github.com/llvm/llvm-project/commit/6e4821487fcab23bf9ca7f7c667826956bee4d1b
Author: vporpo <vporpodas at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
Log Message:
-----------
[SandboxVec][DAG] Register callback for erase instr (#116742)
This patch adds the callback registration logic in the DAG's constructor
and the corresponding deregistration logic in the destructor. It also
implements the code that makes sure that SchedBundle and DGNodes can be
safely destroyed in any order.
Commit: e394fecd5b351e9108d0600c872759d8dea88a42
https://github.com/llvm/llvm-project/commit/e394fecd5b351e9108d0600c872759d8dea88a42
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/docs/Bufferization.md
M mlir/include/mlir/Dialect/Func/Transforms/Passes.h
M mlir/include/mlir/Dialect/Func/Transforms/Passes.td
M mlir/lib/Dialect/Func/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Func/Transforms/FuncBufferize.cpp
R mlir/test/Dialect/Func/func-bufferize.mlir
M mlir/test/Dialect/Transform/test-pass-application.mlir
M mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
Log Message:
-----------
[mlir][func] Remove `func-bufferize` pass (#114152)
The dialect conversion-based bufferization passes have been migrated to
One-Shot Bufferize about two years ago. To clean up the code base, this
commit removes the `func-bufferize` pass, one of the few remaining parts
of the old infrastructure. Most bufferization passes have already been
removed.
Note for LLVM integration: If you depend on this pass, migrate to
One-Shot Bufferize or copy the pass to your codebase.
Commit: 066dd91ad8c5d80bf7a301cd9d77aa8267cd4dcd
https://github.com/llvm/llvm-project/commit/066dd91ad8c5d80bf7a301cd9d77aa8267cd4dcd
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
Log Message:
-----------
[BOLT] Offset LPStart to avoid unnecessary instructions (#116713)
For C++ exception handling, when we write a call site table, we must
avoid emitting 0-value offsets for landing pads unless the call site has
no landing pad. However, 0 can be a real offset from the start of the
FDE if the FDE corresponds to a function fragment that starts with a
landing pad. In such cases, we used to emit a trap instruction at the
start of the fragment to guarantee non-zero LP offset.
To avoid emitting unnecessary trap instructions, we can instead set
LPStart to an offset from the FDE. If we emit it as [FDEStart - 1], then
all real offsets from LPStart in FDE become non-negative.
Commit: f981ee7efc3e0be0d91d2163c0e04e01a134b4a6
https://github.com/llvm/llvm-project/commit/f981ee7efc3e0be0d91d2163c0e04e01a134b4a6
Author: lialan <me at alanli.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
Log Message:
-----------
[MLIR] extend `getCompressedMaskOp` support in `VectorEmulateNarrowType` (#116122)
Previously when `numFrontPadElems` is not zero, `getCompressedMaskOp`
produces wrong result if the mask generator op is a
`vector.create_mask`.
This patch resolves the issue by including `numFrontPadElems` into the
mask generation.
Signed-off-by: Alan Li <me at alanli.org>
Commit: 673b5dd380e8457c887d5b321195d81ea90f134d
https://github.com/llvm/llvm-project/commit/673b5dd380e8457c887d5b321195d81ea90f134d
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
R clang/tools/clang-shlib/simple_version_script.map.in
M llvm/CMakeLists.txt
Log Message:
-----------
Revert "Introduce symbol versioning for clang-cpp (#116556)"
This reverts commit 944478dd62a78f6bb43d4da210643affcc4584b6.
Reverted because of following error on greendragon
ld: unknown options: --version-script
clang: error: linker command failed with exit code 1 (use -v to see invocation)
Commit: 2187738508478372409132ee636393086b46746f
https://github.com/llvm/llvm-project/commit/2187738508478372409132ee636393086b46746f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
Log Message:
-----------
[RISCV] Add additional CHECK prefixes to fixed-vectors-strided-load-store-asm.ll. NFC
We had 2 RUN lines with conflicting output sharing prefixes. The
script unfortunately did not report the error.
Commit: 01cd7ad2ba222b0fc400a820a9ef176131a82a06
https://github.com/llvm/llvm-project/commit/01cd7ad2ba222b0fc400a820a9ef176131a82a06
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFCommon.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
[flang][cuda] Do not generate NVVM target attribute when creating the module (#116882)
Leave it to the `NVVMAttachTargetPass` so we can set compute capability
and features.
Commit: 46389ebc4f4185700ed3322db533fdbd5de7f9a3
https://github.com/llvm/llvm-project/commit/46389ebc4f4185700ed3322db533fdbd5de7f9a3
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
Log Message:
-----------
[mlir][memref] Fix broken test after #114152 (#116898)
Commit: 58280c0e97ee8f843db0fc2719c7e599831d6626
https://github.com/llvm/llvm-project/commit/58280c0e97ee8f843db0fc2719c7e599831d6626
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
[flang][cuda] Update test after #116882
Commit: 04de524c7e5d4dfe3ec6cdd83dcb6dfed46f3e8b
https://github.com/llvm/llvm-project/commit/04de524c7e5d4dfe3ec6cdd83dcb6dfed46f3e8b
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/CMakeLists.txt
Log Message:
-----------
[mlir][arith] Fix build after #114152 (part 2) (#116901)
Since #114152, `MLIRFuncTransforms` no longer depends on
`MLIRBufferizationDialect`. This commit adds a missing dependency that
is no longer transitively included.
Commit: 1df199812296d6f4d1698ac228f3e85d29e96e29
https://github.com/llvm/llvm-project/commit/1df199812296d6f4d1698ac228f3e85d29e96e29
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/CMakeLists.txt
Log Message:
-----------
[mlir][arith] Fix build after #114152 (part 3) (#116903)
Since https://github.com/llvm/llvm-project/pull/114152,
`MLIRFuncTransforms` no longer depends on `MLIRBufferizationTransforms`.
This commit adds a missing dependency that is no longer transitively
included.
Commit: 50e38cc85663de27cfed59b8f09edf3437fbf164
https://github.com/llvm/llvm-project/commit/50e38cc85663de27cfed59b8f09edf3437fbf164
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/cmake/caches/CrossWinToARMLinux.cmake
Log Message:
-----------
[CMake] Update CMake cache file for the ARM/Aarch64 cross toolchain builds. NFC. (#116744)
Forcely disable the libc++ benchmarks on Windows build hosts. The
benchmark configuration currently does not support the cross builds on
Windows hosts.
Also removed unnecessary `CMAKE_CROSSCOMPILING` CMake option.
Commit: 40c8938ff8447fc46bd2aa1605e3147cc38ffb8d
https://github.com/llvm/llvm-project/commit/40c8938ff8447fc46bd2aa1605e3147cc38ffb8d
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
A flang/test/HLFIR/bufferize-workshare.fir
A flang/test/Integration/OpenMP/workshare-array-array-assign.f90
A flang/test/Integration/OpenMP/workshare-axpy.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
A flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
Log Message:
-----------
[flang] Introduce hlfir.elemental lowerings to omp.workshare_loop_nest (#104748)
This patch adds parallelization support for the following expression in OpenMP
workshare constructs:
* Elemental procedures in array expressions
Commit: fa22100d57631bbb0a507dd27e3ebb24b1354623
https://github.com/llvm/llvm-project/commit/fa22100d57631bbb0a507dd27e3ebb24b1354623
Author: Ivan Radanov Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
R flang/test/HLFIR/bufferize-workshare.fir
R flang/test/Integration/OpenMP/workshare-array-array-assign.f90
R flang/test/Integration/OpenMP/workshare-axpy.f90
R flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
R flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
R flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
Log Message:
-----------
Revert "[flang] Introduce hlfir.elemental lowerings to omp.workshare_loop_nest (#104748)"
This reverts commit 40c8938ff8447fc46bd2aa1605e3147cc38ffb8d.
Linking errors in buildbot build
Commit: 461e58e75dc3e2a0d6e0448c1ebcb8bd14e3d65c
https://github.com/llvm/llvm-project/commit/461e58e75dc3e2a0d6e0448c1ebcb8bd14e3d65c
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
A clang/tools/clang-shlib/simple_version_script.map.in
M llvm/CMakeLists.txt
Log Message:
-----------
Introduce symbol versioning for clang-cpp (#116556)
The situation that required symbol versions on the LLVM shared library
can also happen for clang-cpp, although it is less common: different
tools require different versions of the library, and through transitive
dependencies a process ends up with multiple copies of clang-cpp. This
causes havoc with ELF, because calls meant to go one version of the
library end up with another.
I've also considered introducing a symbol version globally, but for
example the clang (C) library and other targets outside of LLVM/Clang,
e.g. libc++, would not want that. So it's probably best if we keep it to
those libraries.
Commit: 8234c612eda1cdff702f5ede1d7db7baf3bf0e47
https://github.com/llvm/llvm-project/commit/8234c612eda1cdff702f5ede1d7db7baf3bf0e47
Author: WÁNG Xuěruì <git at xen0n.name>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrFormats.td
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h
M llvm/test/MC/LoongArch/Basic/Integer/invalid64.s
Log Message:
-----------
[LoongArch] Record the special AMO operand constraint with TableGen (#114398)
Depends on #114508
The LoongArch Reference Manual says that the 3-register atomic memory
operations cannot have their rd equal to either rj or rk [^1], and both
GNU as and LLVM IAS enforce the constraint for non-zero rd. However,
currently LoongArch AsmParser is checking for the opcode with a direct
numerical comparison on the opcode, which is enum-typed: the fact that
all AMO insns have adjacent numerical values is merely a coincidence,
and it is better to not rely on the current TableGen implementation
behavior.
Instead, start to leverage the target-specific flags field of
MCInstrDesc, and record the constraint with TableGen, so we can stop
treating the opcode value as number. In doing so, we also have to mark
whether the instruction is AMCAS, because the operand index of rj and rk
for the AMCAS instructions is different.
While documenting the new flag, it was found that v1.10 of the Manual
did not specify the similar constraint for the AMCAS instructions.
Experiments were done on a Loongson 3A6000 (LA664 uarch) and it turned
out that at least AMCAS will still signal INE with `rd == rj`. The `rd
== rk` case should be a no-op according to the semantics, but as it is
meaningless to perform CAS with the "old value" same as the "new value",
it is not worth special-casing. So the current behavior of also
enforcing the constraint for AMCAS is kept.
[^1]: if `rd == rj` an INE would be signaled; if `rd == rk` it is UB.
Commit: b246d5f0556114d9a454bf2471f9c0577f1dce2f
https://github.com/llvm/llvm-project/commit/b246d5f0556114d9a454bf2471f9c0577f1dce2f
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
Log Message:
-----------
Disable symbol versions for clang-cpp also with MSVC
It seems we can get there with MSVC if LLVM_BUILD_LLVM_DYLIB_VIS is set.
Slightly surprising because I didn't know that MSVC supports the flag
-Bsymbolic-functions, but let's play it safe.
Commit: 314e9b1cffbda767e9f4ac088a3caea80a9212bb
https://github.com/llvm/llvm-project/commit/314e9b1cffbda767e9f4ac088a3caea80a9212bb
Author: lifengxiang1025 <lifengxiang at kuaishou.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] fix typo (#116754)
Commit: a2e266b3463844b92b082698aaf201fdd8757c32
https://github.com/llvm/llvm-project/commit/a2e266b3463844b92b082698aaf201fdd8757c32
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Add computeUndriftMap (#116478)
This patch adds computeUndriftMap, a function to compute mappings from
source locations in the MemProf profile to source locations in the IR.
Commit: f97c610d1f824bcd3e078560c836aaaffaaf69b0
https://github.com/llvm/llvm-project/commit/f97c610d1f824bcd3e078560c836aaaffaaf69b0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[memprof] Add MemProfReader::takeMemProfData (#116769)
This patch adds MemProfReader::takeMemProfData, a function to return
the complete MemProf profile from the reader. We can directly pass
its return value to InstrProfWriter::addMemProfData without having to
deal with the indivual components of the MemProf profile. The new
function is named "take", but it doesn't do std::move yet because of
type differences (DenseMap v.s. MapVector).
The end state I'm trying to get to is roughly as follows:
- MemProfReader accepts IndexedMemProfData as a parameter as opposed
to the three individual components (frames, call stacks, and
records).
- MemProfReader keeps IndexedMemProfData as a class member without
decomposing it into its individual components.
- MemProfReader returns IndexedMemProfData like:
IndexedMemProfData takeMemProfData() {
return std::move(MemProfData);
}
Commit: 1f4d91ecb8529678a3d3919d7523743bd21942ca
https://github.com/llvm/llvm-project/commit/1f4d91ecb8529678a3d3919d7523743bd21942ca
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
M llvm/lib/ExecutionEngine/ExecutionEngineBindings.cpp
M llvm/lib/ExecutionEngine/GDBRegistrationListener.cpp
M llvm/lib/ExecutionEngine/JITLink/COFF.cpp
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
M llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
M llvm/lib/ExecutionEngine/Orc/CompileOnDemandLayer.cpp
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/DebugUtils.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/IRTransformLayer.cpp
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/Mangling.cpp
M llvm/lib/ExecutionEngine/Orc/MapperJITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectFileInterface.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp
M llvm/lib/ExecutionEngine/SectionMemoryManager.cpp
Log Message:
-----------
[ExecutionEngine] Remove unused includes (NFC) (#116749)
Identified with misc-include-cleaner.
Commit: e9c8106a90d49e75bac87341ade57c6049357a97
https://github.com/llvm/llvm-project/commit/e9c8106a90d49e75bac87341ade57c6049357a97
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Object/Archive.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/MachOUniversal.cpp
M llvm/lib/Object/Minidump.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/Object/RelocationResolver.cpp
M llvm/lib/Object/TapiFile.cpp
M llvm/lib/Object/TapiUniversal.cpp
M llvm/lib/Object/WasmObjectFile.cpp
Log Message:
-----------
[Object] Remove unused includes (NFC) (#116750)
Identified with misc-include-cleaner.
Commit: 4f1b20f023626a2ae9aab627e918974ce81199fe
https://github.com/llvm/llvm-project/commit/4f1b20f023626a2ae9aab627e918974ce81199fe
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp
M llvm/lib/ProfileData/Coverage/CoverageMappingWriter.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
Log Message:
-----------
[ProfileData] Remove unused includes (NFC) (#116751)
Identified with misc-include-cleaner.
Commit: 27d25d1c12a34d0cfd47416e77cd83b7b768f1e7
https://github.com/llvm/llvm-project/commit/27d25d1c12a34d0cfd47416e77cd83b7b768f1e7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libc/docs/gpu/rpc.rst
M libc/include/llvm-libc-types/rpc_opcodes_t.h
M libc/src/__support/RPC/rpc.h
M libc/src/stdio/gpu/file.h
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/utils/gpu/server/llvmlibc_rpc_server.h
M libc/utils/gpu/server/rpc_server.cpp
Log Message:
-----------
[libc] Increase RPC opcode to 32-bit and use a class byte (#116905)
Summary:
Currently, the RPC interface uses a basic opcode to communicate with the
server. This currently is 16 bits. There's no reason for this to be 16
bits, because on the GPU a 32-bit write is the same as a 16-bit write
performance wise.
Additionally, I am now making all the `libc` based opcodes qualified
with the 'c' type, mimiciing how Linux handles `ioctls` all coming from
the same driver. This will make it easier to extend the interface when
it's exported directly.
Commit: 0ff8b79160509b25fd913ffa320b9dab5b87b55e
https://github.com/llvm/llvm-project/commit/0ff8b79160509b25fd913ffa320b9dab5b87b55e
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Stop crashing on slightly off Verilog module headers (#116000)
This piece of code made the program crash.
```Verilog
function pkg::t get
(int t = 2,
int f = 2);
```
The way the code is supposed to be parsed is that UnwrappedLineParser
should identify the function header, and then TokenAnnotator should
recognize the result. But the code in UnwrappedLineParser would
mistakenly not recognize it due to the `::`. Then TokenAnnotator would
recognize the comma both as TT_VerilogInstancePortComma and
TT_VerilogTypeComma. The code for annotating the instance port comma
used `setFinalizedType`. The program would crash when it tried to set
it to another type.
The code in UnwrappedLineParser now recognizes the `::` token.
The are other cases in which TokenAnnotator would recognize the comma as
both of those types, for example if the `function` keyword is removed.
The type is now set using `setType` instead so that the program does not
crash. The developer no longer knows why he used `setFinalizedType`
back then.
Commit: 2bf6751522e8683d719d5651a4555147dd7d6acd
https://github.com/llvm/llvm-project/commit/2bf6751522e8683d719d5651a4555147dd7d6acd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
Log Message:
-----------
[RISCV] Add IsRV32 some patterns in RISCVInstrInfoXTHead.td.
This restores the code to its original state before I experimented
with making i32 a legal type.
Commit: c6bce68f9a357d13b4ad85a1a0b74ce4ee768885
https://github.com/llvm/llvm-project/commit/c6bce68f9a357d13b4ad85a1a0b74ce4ee768885
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Coroutines/ABI.h
Log Message:
-----------
[NFC] [Coroutines] Use std::move to avoid copying (#116776)
Commit: fa4d1860d20a5afa6f96673ba02a99f09f69869c
https://github.com/llvm/llvm-project/commit/fa4d1860d20a5afa6f96673ba02a99f09f69869c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.h
Log Message:
-----------
[ELF] Move PhdrEntry to SyntheticSections
The next change will change Partition::phdrs to a unique_ptr vector,
which requires PhdrEntry to be a complete type.
And make OutputSection::getLMA out-of-line, since it should not include
either SyntheticSections.h or Writer.h.
Commit: a52032448efb5d24af9c57418580206f17931401
https://github.com/llvm/llvm-project/commit/a52032448efb5d24af9c57418580206f17931401
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Avoid make<PhdrEntry>
Store them in Partition::phdrs instead.
Commit: 37e39667ccdbf96645515ff6ad8f86d499f472e8
https://github.com/llvm/llvm-project/commit/37e39667ccdbf96645515ff6ad8f86d499f472e8
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Make ThunkCreator take ownership of thunks
This removes many SpecificAlloc instantiations and makes my lld (x86-64
Release+Assertions) smaller by ~36k.
Commit: 1ff22f8a71b8557018b4a877aff08c194970a909
https://github.com/llvm/llvm-project/commit/1ff22f8a71b8557018b4a877aff08c194970a909
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector] Add more tests for ConvertVectorToLLVM (9/n) (#116795)
Adds tests with scalable vectors for the Vector-To-LLVM conversion pass.
Covers the following Ops:
* `vector.load`,
* `vector.store`.
In addition:
* For consistency with other tests, renamed test function names
(e.g. `@vector_load_op_nontemporal` -> `vector_load_nontemporal`)
* Moved `@vector_load_0d` near other test for `vector.load` (as opposed
to next to `@vector_store_0d`).
Commit: 560dd940f5731fc255b67dde076427cabcddb149
https://github.com/llvm/llvm-project/commit/560dd940f5731fc255b67dde076427cabcddb149
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/lib/Sema/JumpDiagnostics.cpp
Log Message:
-----------
[clang] [NFC] In GetDiagForGotoScopeDecl(), limit Init to inside the if condition (#116080)
Commit: d33673ab05e5027b78a21eb3ecd9c0ae9a0ace9f
https://github.com/llvm/llvm-project/commit/d33673ab05e5027b78a21eb3ecd9c0ae9a0ace9f
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/test/Dialect/Vector/eliminate-masks.mlir
Log Message:
-----------
[mlir][vector][nfc] Update test for mask elimination (#112130)
Updates one example so that:
* it uses `vector.mask`,
* upper loop bound is a multiple of the loop step,
* use `vector.outerproduct` instead of "test.some_computation".
This makes this example a bit closer to realistic cases, which has
always been the goal for this test.
Commit: 0394e08bfbb110d606ace49bd10d951eb904e5d6
https://github.com/llvm/llvm-project/commit/0394e08bfbb110d606ace49bd10d951eb904e5d6
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/source/Target/StackFrame.cpp
M lldb/test/API/source-manager/TestSourceManager.py
Log Message:
-----------
[lldb] Reword the "line 0" warning (#116827)
We got a bug report that this message is confusing. In this particular
case, the line zero was due to compiler tail merging (in optimized
code). The main issue was the "no source code" part: in this case it's
kind of incorrect because -- even though we can't really know that --
the address is arguably associated with *multiple* lines of source code.
I've tried to make the new wording more neutral, and added a wink
towards compiler optimizations. I left out the "compiler generated" part
of the message because I couldn't find a way to squeeze that in nicely.
I'm also not entirely sure what it was referring to -- if this was
(just) function prologue/epilogue, then maybe leaving it out is fine, as
we're not likely to stop there anyway (?)
I also left out the function name, because:
- for template functions it gets rather long
- it's already present in the message, potentially twice (once in the
"frame summary" line and once in the snippet of code we show for the
function declaration)
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 3a5cf6d99b9988a013da3a87ab8f117e5c541f4b
https://github.com/llvm/llvm-project/commit/3a5cf6d99b9988a013da3a87ab8f117e5c541f4b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86ReplaceableInstrs.def
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/CodeGen/X86/GlobalISel/select-extract-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-extract-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-unmerge-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-unmerge-vec512.mir
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/utils/TableGen/X86ManualFoldTables.def
M llvm/utils/TableGen/X86ManualInstrMapping.def
Log Message:
-----------
[X86] Rename AVX512 VEXTRACT/INSERT??x? to VEXTRACT/INSERT??X? (#116826)
Use uppercase in the subvector description ("32x2" -> "32X4" etc.) - matches what we already do in VBROADCAST??X?, and we try to use uppercase for all x86 instruction mnemonics anyway (and lowercase just for the arg description suffix).
Commit: 67a1fdb014790a38a205d28e1748634de34471dd
https://github.com/llvm/llvm-project/commit/67a1fdb014790a38a205d28e1748634de34471dd
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/IR/attribute.mlir
Log Message:
-----------
[mlir][IR] Treat `tf32` as 19-bit float (#116738)
TF32 is a variant of F32 that is truncated to 19 bits. There used to be
special handling in `FloatType::getWidth()` so that TF32 was treated as
a 32-bit float in some places. (Some places use `FloatType::getWidth`,
others directly query the `APFloat` semantics.) This caused problems
because `FloatType::getWidth` did not agree with the underlying
`APFloat` semantics.
In particular, creating an elements attr / array attr with `tf32`
element type crashed. E.g.:
```
"foo"() {attr = dense<4.0> : tensor<tf32>} : () -> ()
mlir-opt: llvm-project/llvm/lib/Support/APFloat.cpp:4108: void llvm::detail::IEEEFloat::initFromAPInt(const fltSemantics *, const APInt &): Assertion `api.getBitWidth() == Sem->sizeInBits' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
```
```
"foo"() {f32attr = array<tf32: 1024.>} : () -> ()
mlir-opt: llvm-project/mlir/lib/AsmParser/AttributeParser.cpp:847: void (anonymous namespace)::DenseArrayElementParser::append(const APInt &): Assertion `data.getBitWidth() % 8 == 0' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
```
It is unclear why the special handling for TF32 is needed. For
reference: #107372
Commit: 1e32a7d42c8cec56246c124bdc4292ae294f8884
https://github.com/llvm/llvm-project/commit/1e32a7d42c8cec56246c124bdc4292ae294f8884
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
M llvm/include/llvm/Transforms/Scalar/MemCpyOptimizer.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
Log Message:
-----------
[AA] Rename CaptureInfo -> CaptureAnalysis (NFC) (#116842)
I'd like to use the name CaptureInfo to represent the new attribute
proposed at
https://discourse.llvm.org/t/rfc-improvements-to-capture-tracking/81420,
but it's already taken by AA, and I can't think of great alternatives
(CaptureEffects would be something of a stretch).
As such, I'd like to rename CaptureInfo -> CaptureAnalysis in AA, which
also seems like the more accurate terminology.
Commit: 596bfb804ba70241ce2ac7d387505c9562e09632
https://github.com/llvm/llvm-project/commit/596bfb804ba70241ce2ac7d387505c9562e09632
Author: Dragan Mladjenovic <Dragan.Mladjenovic at syrmia.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Log Message:
-----------
[MLIR][AMDGPU] Support gpu::ShuffleMode::DOWN lowering in ROCDL (#106237)
Commit: d49ee7d54fe2142976494c1c9b930820f0f62259
https://github.com/llvm/llvm-project/commit/d49ee7d54fe2142976494c1c9b930820f0f62259
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update SelectionDAG maintainers (#116408)
bogner is listed as the current SDAG maintainer, but mostly works on
DirectX nowadays and isn't directly involved with SDAG work anymore.
Add RKSimon and topperc as new SelectionDAG maintainers.
Commit: ac38ab594f1b7c9a9f67007f7684e4d46b2588be
https://github.com/llvm/llvm-project/commit/ac38ab594f1b7c9a9f67007f7684e4d46b2588be
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M compiler-rt/lib/lsan/lsan_common.cpp
Log Message:
-----------
[lsan] Use VReport if not REGISTERS_AVAILABLE (#116555)
Certain tests (many are from lld/test) run `... '2>&1 | count 0` to
ensure that there is no stderr message.
GetRegistersAndSP may rarely fail, leading to
a spurious failure like (with a local hack to make `count` dump the
input):
```
+ /home/ray/llvm/out/asan/bin/ld.lld func1-gcs.o func2-gcs.o func3-gcs.o -o /dev/null -z gcs-report=warning -z gcs=never
+ /home/ray/llvm/out/asan/bin/count 0
Expected 0 lines, got 1.
==2403039==Unable to get registers from thread 2403018.
```
The failure can reliably be reproduced by running `ninja check-lld` a
few times under asan+lsan (see the bot
sanitizer-x86_64-linux-bootstrap-asan).
Commit: ddc0c5c7a3bb39067f11c87ab7ca0ed934ad27e7
https://github.com/llvm/llvm-project/commit/ddc0c5c7a3bb39067f11c87ab7ca0ed934ad27e7
Author: Raul Tambre <raul at tambre.ee>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/cmake/config-ix.cmake
Log Message:
-----------
[CMake] Do all availability checks with -D_GNU_SOURCE (#116640)
When compiling LLVM with -std=c++ instead of -std=gnu we'd fail to detect many newer POSIX functions.
We define it for the whole of LLVM anyway so moving the definition to the top fixes detection of a bunch of these on such setups.
Keeping it at the top also avoids accidentally introducing new dependent checks before it being defined.
Commit: aeb88f6778756ea889918308241a2b34bd7f64e2
https://github.com/llvm/llvm-project/commit/aeb88f6778756ea889918308241a2b34bd7f64e2
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/X86/redundant-vf2-cost.ll
Log Message:
-----------
Fix test failures introduced by PR #113697 (#116941)
Don't match the entire floating point debug output since it's prone to
rounding errors depending upon the target.
Commit: bca846d462e989a6e7a2ef085dbf367aeca106bd
https://github.com/llvm/llvm-project/commit/bca846d462e989a6e7a2ef085dbf367aeca106bd
Author: David Green <david.green at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
Log Message:
-----------
[AArch64] Improve mull generation (#114997)
This attempts to clean up and improve where we generate smull/umull
using known-bits. For v2i64 types (where no mul is present), we try to
create mull more aggressively to avoid scalarization.
Commit: 34881138ed94709d09f690a27cd457d6a830f123
https://github.com/llvm/llvm-project/commit/34881138ed94709d09f690a27cd457d6a830f123
Author: JaydeepChauhan14 <167076022+JaydeepChauhan14 at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
Log Message:
-----------
[NFC] Fixed indentation issue (#116942)
Commit: 5310855316a8356d5862714a21e1e6344f84225e
https://github.com/llvm/llvm-project/commit/5310855316a8356d5862714a21e1e6344f84225e
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
Log Message:
-----------
[clangd] Fix erroneous qualification of template type parameters (#116821)
...in DefineOutline tweak.
E.g. moving the following definition:
`template<typename T> struct S { T f^oo() const { return T(); } };`
would result in:
`template<typename T> S<T>::T S::foo() const { return T(); }`
instead of:
`template<typename T> T S::foo() const { return T(); }`
Commit: 9111d531d85a743986ebc51b68fc1734086531ea
https://github.com/llvm/llvm-project/commit/9111d531d85a743986ebc51b68fc1734086531ea
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
R flang/CODE_OWNERS.TXT
A flang/Maintainers.txt
Log Message:
-----------
[flang] Rename Code Owners to Maintainers (#116009)
https://llvm.org/docs/DeveloperPolicy.html#maintainers
Commit: 92604d7c8061615dfb77568cc9cb2169f648290a
https://github.com/llvm/llvm-project/commit/92604d7c8061615dfb77568cc9cb2169f648290a
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/OpenMP/Todo/map-mapper.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
A flang/test/Semantics/OpenMP/map-clause-symbols.f90
M flang/test/Semantics/OpenMP/map-clause.f90
Log Message:
-----------
[flang][OpenMP]Add parsing support for MAP(MAPPER(name) ...) (#116274)
This prepares for using the DECLARE MAPPER construct.
A check in lowering will say "Not implemented" when trying to use a
mapper as some code is required to tie the mapper to the declared one.
Senantics check for the symbol generated.
Commit: b7ddb97ac2cfb57f17c7f68815606cbd57918417
https://github.com/llvm/llvm-project/commit/b7ddb97ac2cfb57f17c7f68815606cbd57918417
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
A flang/test/Lower/OpenMP/Todo/scope-allocate.f90
A flang/test/Lower/OpenMP/Todo/scope-firstprivate.f90
Log Message:
-----------
[flang][OpenMP]Add TODO checking for scope allocate and firstprivate (#116801)
For the situation where scope is implemented to 5.1 standard, check that
the 5.2 are still "not yet implemented" (or some other partial
implementation).
Commit: 288f05f63e5f3246657aca9561d75b2aa02cb6f5
https://github.com/llvm/llvm-project/commit/288f05f63e5f3246657aca9561d75b2aa02cb6f5
Author: Md Asghar Ahmad Shahid <md.asghar.ahmad.shahid at intel.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Log Message:
-----------
[NFC][MLIR][Linalg] Refactor linalg.matmul tablegen ODS and related C++ code. (#116377)
This commit refactors part of the code in preparation for the migration
of other *matmul* variants from OpDSL to ODS.
Moves getDefaultIndexingmaps() helper into the MatmulOp class.
Commit: 2b5214b9e16cdc784def1d521ce38074a2e8c90f
https://github.com/llvm/llvm-project/commit/2b5214b9e16cdc784def1d521ce38074a2e8c90f
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/ExpandMemCmp.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
IR: de-duplicate two CmpInst routines (NFC) (#116866)
De-duplicate the functions getSignedPredicate and getUnsignedPredicate,
nearly identical versions of which were present in CmpInst and ICmpInst,
creating less confusion.
Commit: 9bccf61f5fd20a52f997b23a56c13ada72c46eae
https://github.com/llvm/llvm-project/commit/9bccf61f5fd20a52f997b23a56c13ada72c46eae
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
A llvm/test/Transforms/LoopVectorize/AArch64/neoverse-epilogue-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-vscale-tune.ll
Log Message:
-----------
[AArch64][LV] Set MaxInterleaving to 4 for Neoverse V2 and V3 (#100385)
Set the maximum interleaving factor to 4, aligning with the number of available
SIMD pipelines. This increases the number of vector instructions in the vectorised
loop body, enhancing performance during its execution. However, for very low
iteration counts, the vectorised body might not execute at all, leaving only the
epilogue loop to run. This issue affects e.g. cam4_r from SPEC FP, which
experienced a performance regression. To address this, the patch reduces the
minimum epilogue vectorisation factor from 16 to 8, enabling the epilogue to be
vectorised and largely mitigating the regression.
Commit: 09c41246ed58344892a1a82f7256a4ad6e1c49d7
https://github.com/llvm/llvm-project/commit/09c41246ed58344892a1a82f7256a4ad6e1c49d7
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
Log Message:
-----------
[AMDGPU] Fix restores in chain functions (#116193)
When spilling a VGPR in `emitPrologue`, chain functions prefer to use
offsets to access the stack instead of the SP.
This patch fixes `emitEpilogue` to do the same. It also brings back some
test coverage that was lost in #93526, when WWM registers started being
shifted to the lowest available range (which meant that tests that were
originally spilling v8 would shift to spill v0, which is a scratch
register for chain functions and didn't get spilled).
Change-Id: Icb07fccd859b563cd45f74c25ae578ecb38bdeeb
Commit: 9568f88b7f05015a438ed8beb4f4d07782c34dc2
https://github.com/llvm/llvm-project/commit/9568f88b7f05015a438ed8beb4f4d07782c34dc2
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-binop-cmp.ll
M llvm/test/Transforms/InstCombine/select-value-equivalence.ll
Log Message:
-----------
InstCombine: support floating-point equivalences (#114975)
Since cd16b07 (IR: introduce CmpInst::isEquivalence), there is now an
isEquivalence routine in CmpInst that we can use to determine
equivalence in foldSelectValueEquivalence. Implement this, extending it
to include floating-point equivalences as well.
Commit: 62bf5840a63fbe0856c47df3f9ed6b8f1202b385
https://github.com/llvm/llvm-project/commit/62bf5840a63fbe0856c47df3f9ed6b8f1202b385
Author: Xi Ruoyao <xry111 at xry111.site>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
M clang/include/clang/Basic/BuiltinsLoongArchLSX.def
M clang/lib/Headers/lasxintrin.h
M clang/lib/Headers/lsxintrin.h
Log Message:
-----------
[LoongArch][Clang] Make the parameters and return value of {x,}vorn.v builti ns `unsigned char` vectors (#114514)
All other bitwise vector builtins use `unsigned char` vector operands,
so it does not make too much sense to use `signed char` for the orn
operation alone.
The same change has been also proposed for GCC:
https://gcc.gnu.org/pipermail/gcc-patches/2024-October/667065.html.
Depends on #114513.
Commit: 77bf34c3154408eb49eda171fbf4d50e3d66f019
https://github.com/llvm/llvm-project/commit/77bf34c3154408eb49eda171fbf4d50e3d66f019
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/windows.inc
Log Message:
-----------
[AArch64][compiler-rt] Add LSE support for Windows. (#116706)
Commit: 408659c5b5c7d745042ae71db344d1ed10601512
https://github.com/llvm/llvm-project/commit/408659c5b5c7d745042ae71db344d1ed10601512
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
Log Message:
-----------
[RISCV] Merge GPRPair and GPRF64Pair (#116094)
As suggested by Craig, this tries to merge the two sets of register
classes created in #112983, GPRPair* and GPRF64Pair*.
- I added some explicit annotations to `RISCVInstrInfoD.td` which fixed
the type inference issues I was seeing from tablegen for select
patterns.
- I've had to make the behaviour of `splitValueIntoRegisterParts` and
`joinRegisterPartsIntoValue` cover more cases, because you cannot
bitcast to/from untyped (the bitcast would otherwise have been inserted
automatically by TargetLowering code).
- I apparently didn't need to change `getNumRegisters` again, which
continues to tell me there's a bug in the code for tied inputs. I added
some more test coverage of this case but it didn't seem to help find the
asserts I was finding before - I think the difference is between the
default behaviour for integers which doesn't apply to floats.
- There's still a difference between BuildGPRPair and BuildPairF64 (and
the same for SplitGPRPair and SplitF64). I'm not happy with this, I
think it's quite confusing, as they're very similar, just differing in
whether they give a `untyped` or a `f64`. I haven't really worked out
how the DAGCombiner copes if one meets the other, I know we have some of
this for the f64 variants already, but they're a lot more complex than
the GPRPair variants anyway.
Commit: 1b792252e3d52dc60ddadac1ba8f1ad7b40d60c9
https://github.com/llvm/llvm-project/commit/1b792252e3d52dc60ddadac1ba8f1ad7b40d60c9
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU] Remove hasPostISelHook for atomics. NFC. (#116791)
This is not required since 2147b6c89d44 changed that way that no-ret
atomic ops are selected.
Commit: 5f1a7f274969728801f20a0239848f5f93a39baa
https://github.com/llvm/llvm-project/commit/5f1a7f274969728801f20a0239848f5f93a39baa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSkylakeClient.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse41.s
M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-sse41.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse41.s
Log Message:
-----------
[X86] Fix scheduler class for EVEX VMOVNTDQA variants and cleanup Skylake/Icelake resource usage (#116946)
Ensure we use the SchedWriteVecMoveLSNT class for all (V)MOVNTDQA instructions, remove unnecessary scheduler overrides and adjust resource pipe usage to match uops.info/Agner numbers
Commit: 0a1795f781163a8e7b72fee492f87ab27d5e3995
https://github.com/llvm/llvm-project/commit/0a1795f781163a8e7b72fee492f87ab27d5e3995
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Log Message:
-----------
[SDAG] Generalize FSINCOS type legalization (NFC) (#116848)
There's nothing that specific to FSINCOS about these; they could be used
for similar nodes in the future.
Commit: 18b02bbf441660683df7f3925946984203d49bab
https://github.com/llvm/llvm-project/commit/18b02bbf441660683df7f3925946984203d49bab
Author: DianQK <dianqk at dianqk.net>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemorySSAUpdater.h
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
A llvm/test/Transforms/LICM/PR116813-memoryssa-outdated.ll
Log Message:
-----------
[LICM] allow MemoryAccess creation failure (#116813)
Fixes #116809.
After running some passes (SimpleLoopUnswitch, LoopInstSimplify, etc.),
MemorySSA might be outdated, and the instruction `I` may have become a
non-memory touching instruction.
LICM has already handled this, but it does not pass
`CreationMustSucceed=false` to `createDefinedAccess`.
Commit: af0e0ded7be29a7007c08105a0329e85cd937499
https://github.com/llvm/llvm-project/commit/af0e0ded7be29a7007c08105a0329e85cd937499
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in reduce and function. (#116822)
Part of #51787.
Follow up of #116626.
This patch adds constexpr support for the built-in reduce and function.
Commit: d0522f4a9af84a3b402586f71cacd3c14269711a
https://github.com/llvm/llvm-project/commit/d0522f4a9af84a3b402586f71cacd3c14269711a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSkylakeClient.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-ssse3.s
M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-ssse3.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-ssse3.s
Log Message:
-----------
[X86] Fix PSHUFB port usage on Skylake/Icelake
MMX PSHUFB has an additional Port0 dependency (as do most MMX instructions) - confirmed with uops.info
Commit: 33fcd6acc75535c8b5e27b00eb99d35abf52954d
https://github.com/llvm/llvm-project/commit/33fcd6acc75535c8b5e27b00eb99d35abf52954d
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
Log Message:
-----------
[NFC][LLVM] Migrate tests to use update_test_checks.py.
Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
Transforms/InstCombine/scalable-const-fp-splat.ll
Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
Commit: 08e7609692af3cb84da510deac70eeb02cbceb6d
https://github.com/llvm/llvm-project/commit/08e7609692af3cb84da510deac70eeb02cbceb6d
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/CompilationInterfaces.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp
Log Message:
-----------
[mlir][fix] Add callback functions for ModuleToObject (#116916)
Here is the [merged
MR](https://github.com/llvm/llvm-project/pull/116007) which caused a
failure and [was
reverted](https://github.com/llvm/llvm-project/pull/116811).
Thanks to @joker-eph for the help, I fix it (miss constructing
`ModuleObject` with callback functions in
`mlir/lib/Target/LLVM/NVVM/Target.cpp`) and split unit tests from origin
test which don't need `ptxas` to make the test runs more widely.
Commit: 05bcf83c5c25625df1caf86ef4070644907947b6
https://github.com/llvm/llvm-project/commit/05bcf83c5c25625df1caf86ef4070644907947b6
Author: Christian Oliveros <christianol_01 at hotmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/tools/message-converter.py
Log Message:
-----------
[OpenMP][Build][Wasm][116552] Fixed build problem when compiling with Emscripten on Windows (#116874)
Commit: a160e51500ea625b97618d882b97b06367978ea4
https://github.com/llvm/llvm-project/commit/a160e51500ea625b97618d882b97b06367978ea4
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
Log Message:
-----------
[AArch64] Fix SDNode type mismatches between *.td files and ISel (#116523)
* `MRS`, `PTEST` and FP comparisons were missing "flags" result, and
were sometimes created with invalid types (f32, Glue, Other).
* `REV16`, `REV32`, `REV64`, and `CMGEz` were sometimes created with an
extra operand.
* `TLSDESC_CALLSEQ` had `SDNPInGlue` property, but the node was never
created with a glue operand.
Commit: 1ca853b2ee1b68daaec6fdc23a085755146d102d
https://github.com/llvm/llvm-project/commit/1ca853b2ee1b68daaec6fdc23a085755146d102d
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/test/Driver/relax.s
M lld/ELF/Arch/X86_64.cpp
M lld/test/ELF/x86-64-gotpc-no-relax-err.s
M lld/test/ELF/x86-64-gotpc-relax-nopic.s
M lld/test/ELF/x86-64-gotpc-relax.s
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/test/MC/ELF/relocation-alias.s
M llvm/test/MC/X86/gotpcrelx.s
M llvm/test/MC/X86/reloc-directive-elf-64.s
Log Message:
-----------
[X86][MC,LLD][NFC] Rename R_X86_64_REX2_GOTPCRELX (#116737)
Rename R_X86_64_REX2_GOTPCRELX to R_X86_64_CODE_4_GOTPCRELX, to align
with GCC/binutils and ABI.
GCC/binutils:
https://github.com/bminor/binutils-gdb/commit/3d5a60de52556f6a53d71d7e607c6696450ae3e4
and
https://github.com/bminor/binutils-gdb/commit/4a54cb06585f568031dfd291d0fe45979ad75e98
ABI:
https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/357de358ba68eb779822dfcbb45f7ee2d9d09193
Commit: 8c56dd3040f295874e3d5742b5dfc109adf1f728
https://github.com/llvm/llvm-project/commit/8c56dd3040f295874e3d5742b5dfc109adf1f728
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMRegisterInfo.td
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fp16-instructions.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
Log Message:
-----------
[ARM] Stop gluing FP comparisons to FMSTAT (#116676)
Following #116547, this changes the result of `ARMISD::CMPFP*` and the
operand of `ARMISD::FMSTAT` from a special `Glue` type to a normal type.
This change allows comparisons to be CSEd and scheduled around as can be
seen in the test changes.
Note that `ARMISD::FMSTAT` is still glued to its consumer nodes; this is
going to be changed in a separate patch.
This patch also sets `CopyCost` of `cl_FPSCR_NZCV` register class to a
negative value. The reason is the same as for CCR register class: it
makes DAG scheduler and InstrEmitter try to avoid copies of `FPCSR_NZCV`
register to / from virtual registers. Previously, this was not
necessary, since no attempt was made to create copies in the first
place.
There might be a case when a copy can't be avoided (although not found
in existing tests). If a copy is necessary, the virtual register will be
created with `cl_FPSCR_NZCV` register class. If this register class is
inappropriate, `TRI::getCrossCopyRegClass` should be modified to return
the correct class.
Pull Request: https://github.com/llvm/llvm-project/pull/116676
Commit: 2c094ac761912eea0d7e8ccb140bc647b5378bdf
https://github.com/llvm/llvm-project/commit/2c094ac761912eea0d7e8ccb140bc647b5378bdf
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/bit_ceil.ll
Log Message:
-----------
[InstCombine] Drop range attributes in `foldBitCeil` (#116641)
Closes https://github.com/llvm/llvm-project/issues/112076
Commit: fe697efe0c4ac34f30e28b77bb155c4fa996dab0
https://github.com/llvm/llvm-project/commit/fe697efe0c4ac34f30e28b77bb155c4fa996dab0
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Analysis/CFG.cpp
M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp
Log Message:
-----------
[Clang] avoid adding consteval condition as the last statement to preserve valid CFG (#116513)
Fixes #116485
Commit: f710e4c0219c97d4726742b294446b833e604819
https://github.com/llvm/llvm-project/commit/f710e4c0219c97d4726742b294446b833e604819
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/docs/InternalsManual.rst
Log Message:
-----------
Clarify use of contractions in diagnostic messages (#116803)
This dissuades contributors from using contractions when writing
diagnostic wording for Clang. Contractions should be avoided because of
the potential for visual confusion with single quoting syntactic
constructs and because they can be harder to understand for non-native
English speakers.
Commit: ddc2e364aace37ce614106dcfaf4cffd2ec85f70
https://github.com/llvm/llvm-project/commit/ddc2e364aace37ce614106dcfaf4cffd2ec85f70
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] getSHUFPDImm - allow general shuffle mask size
#116419 assumed that getSHUFPDImm incorrectly hardcoded the mask size to 4 (cut+pasta typo from getV4X86ShuffleImm).
Waiting on reduced test case from @metaflow
Commit: c0fdedfedf16317253619aa65b7c60102aa36fee
https://github.com/llvm/llvm-project/commit/c0fdedfedf16317253619aa65b7c60102aa36fee
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang-tools-extra/test/CMakeLists.txt
Log Message:
-----------
[clang-tidy][NFC]remove deps of clang in clang tidy test (#116588)
It is introduced in https://reviews.llvm.org/D59528, but I don't find
any usage of clang in clang tidy test.
Commit: d0d726e56da39bfbc583769a673842c0f05e72cb
https://github.com/llvm/llvm-project/commit/d0d726e56da39bfbc583769a673842c0f05e72cb
Author: Md Asghar Ahmad Shahid <md.asghar.ahmad.shahid at intel.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Log Message:
-----------
Fix GCC build problem with 288f05f related to SmallVector. (#116958)
Below is the error message for reference.
/llvm-project/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp: In static member
function 'static llvm::SmallVector<mlir::AffineMap>
mlir::linalg::MatmulOp::getDefaultIndexingMaps(mlir::MLIRContext*)':
/llvm-project/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp:3468:10: error:
could not convert 'indexingMaps' from 'SmallVector<[...],3>' to
'SmallVector<[...],6>'
3468 | return indexingMaps;
| ^~~~~~~~~~~~
| |
| SmallVector<[...],3>
Here is the link to the failure.
https://lab.llvm.org/buildbot/#/builders/117/builds/3919
...
Commit: b17f6077036296cb0f475f16adcdce4af6aea3e9
https://github.com/llvm/llvm-project/commit/b17f6077036296cb0f475f16adcdce4af6aea3e9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Remove unnecessary std::optional around Factor value
Commit: 71b87d12678cbdb900c3a8fb673dcaf14d0433be
https://github.com/llvm/llvm-project/commit/71b87d12678cbdb900c3a8fb673dcaf14d0433be
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
Log Message:
-----------
[LLVM][SVE] Ensure all fixed length mask bits are defined. (#116819)
convertFixedMaskToScalableVector expects the mask input to honour the
BoolContents scheme employed by the target. For AArch64 this means a
mask should be zero or all ones, and thus when promoting a mask we must
use a sign extend.
Commit: 3e15bce9e1e144c0e568eed10010fa0e359e8ec2
https://github.com/llvm/llvm-project/commit/3e15bce9e1e144c0e568eed10010fa0e359e8ec2
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/lib/FuzzMutate/Operations.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/unittests/FuzzMutate/OperationsTest.cpp
Log Message:
-----------
[FuzzMutate] replace undef placeholders with poison
Commit: c22bb6f5b1b43484b47dd896a147bf54f8f44c9a
https://github.com/llvm/llvm-project/commit/c22bb6f5b1b43484b47dd896a147bf54f8f44c9a
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
A clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
Log Message:
-----------
[clang] Implement lifetime analysis for lifetime_capture_by(X) (#115921)
This PR uses the existing lifetime analysis for the `capture_by`
attribute.
The analysis is behind `-Wdangling-capture` warning and is disabled by
default for now. Once it is found to be stable, it will be default
enabled.
Planned followup:
- add implicit inference of this attribute on STL container methods like
`std::vector::push_back`.
- (consider) warning if capturing `X` cannot capture anything. It should
be a reference, pointer or a view type.
- refactoring temporary visitors and other related handlers.
- start discussing `__global` vs `global` in the annotation in a
separate PR.
---------
Co-authored-by: Boaz Brickner <brickner at google.com>
Commit: b49c4af186a6de8f201ed6a4c326ebf822d4fd84
https://github.com/llvm/llvm-project/commit/b49c4af186a6de8f201ed6a4c326ebf822d4fd84
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
Fix GCC signed/unsigned comparison warning.
Commit: cfd67c214938a1f4ab3eff45a79a5a3da543d4b6
https://github.com/llvm/llvm-project/commit/cfd67c214938a1f4ab3eff45a79a5a3da543d4b6
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/affinity-clause.f90
M flang/test/Parser/OpenMP/depobj-construct.f90
M flang/test/Parser/OpenMP/from-clause.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/target-update-to-clause.f90
Log Message:
-----------
[flang][OpenMP] Normalize clause modifiers that exist on their own (#116655)
This is the first part of the effort to make parsing of clause modifiers
more uniform and robust. Currently, when multiple modifiers are allowed,
the parser will expect them to appear in a hard-coded order.
Additionally, modifier properties (such as "ultimate") are checked
separately for each case.
The overall plan is
1. Extract all modifiers into their own top-level classes, and then
equip them with sets of common properties that will allow performing the
property checks generically, without refering to the specific kind of
the modifier.
2. Define a parser (as a separate class) for each modifier.
3. For each clause define a union (std::variant) of all allowable
modifiers, and parse the modifiers as a list of these unions.
The intent is also to isolate parts of the code that could eventually be
auto-generated.
OpenMP modifier overhaul: #1/3
Commit: 12cfa414a343dc86623d049083752184bf494dee
https://github.com/llvm/llvm-project/commit/12cfa414a343dc86623d049083752184bf494dee
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port for 08e7609692af3cb84da510deac70eeb02cbceb6d
Commit: d44ea7186befe38eb2b3804b15cd1ee1777458ed
https://github.com/llvm/llvm-project/commit/d44ea7186befe38eb2b3804b15cd1ee1777458ed
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Support/ARMBuildAttrs.cpp
M llvm/lib/Support/ConvertUTFWrapper.cpp
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/MSP430AttributeParser.cpp
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/NativeFormatting.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/Process.cpp
M llvm/lib/Support/RWMutex.cpp
M llvm/lib/Support/SuffixTreeNode.cpp
M llvm/lib/Support/Threading.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Support/raw_ostream.cpp
M llvm/lib/Support/raw_socket_stream.cpp
Log Message:
-----------
[Support] Remove unused includes (NFC) (#116752)
Identified with misc-include-cleaner.
Commit: 36ada1b9b26eeff34a9427214672cf1540c01667
https://github.com/llvm/llvm-project/commit/36ada1b9b26eeff34a9427214672cf1540c01667
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Frontend/Atomic/Atomic.cpp
M llvm/lib/Frontend/HLSL/HLSLResource.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenACC/ACC.cpp
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[Frontend] Remove unused includes (NFC) (#116927)
Identified with misc-include-cleaner.
Commit: 4d6d56315d4ea2ae2b8059b99e45bdfee764861a
https://github.com/llvm/llvm-project/commit/4d6d56315d4ea2ae2b8059b99e45bdfee764861a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/SubtargetFeature.cpp
Log Message:
-----------
[TargetParser] Remove unused includes (NFC) (#116929)
Identified with misc-include-cleaner.
Commit: 84d853a708b267ed937e101e72d7cb93dbb7c70a
https://github.com/llvm/llvm-project/commit/84d853a708b267ed937e101e72d7cb93dbb7c70a
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/test/integration/scudo/CMakeLists.txt
Log Message:
-----------
[libc] fix scudo integration build (#116979)
Commit: 5174d00365b619b5dcd2a451aaf7d844c36ce04d
https://github.com/llvm/llvm-project/commit/5174d00365b619b5dcd2a451aaf7d844c36ce04d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Support/RWMutex.cpp
Log Message:
-----------
[llvm] Add back Allocator.h include to RWMutex.cpp.
This unbreaks the build on macOS.
Without the include, the build fails with
llvm/lib/Support/RWMutex.cpp:47:36: error: use of undeclared identifier 'safe_malloc'
47 |
static_cast<pthread_rwlock_t*>(safe_malloc(sizeof(pthread_rwlock_t)));
| ^
Commit: a9b3ec154d7ab2d0896ac5c9f1e9a1266a37be80
https://github.com/llvm/llvm-project/commit/a9b3ec154d7ab2d0896ac5c9f1e9a1266a37be80
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
Log Message:
-----------
[MachineLICM] Add test case showing load hoisted across memory barrier.
Commit: c97478cfaf5610fabbe3c2e298d846c585d0f32c
https://github.com/llvm/llvm-project/commit/c97478cfaf5610fabbe3c2e298d846c585d0f32c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lld/COFF/DLL.cpp
M lld/test/COFF/arm64ec-delayimport.test
Log Message:
-----------
[LLD][COFF] Emit tail merge pdata for delay load thunks on ARM64EC (#116810)
Commit: d2a22367a6b3ae5b2b63c09021a18d9f7da434ed
https://github.com/llvm/llvm-project/commit/d2a22367a6b3ae5b2b63c09021a18d9f7da434ed
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/src/__support/RPC/rpc.h
Log Message:
-----------
[libc][NFC] Remove redundant [[convergent]] attributes from RPC
Commit: acc32667b051d84b1660460344dabdc64b9244c1
https://github.com/llvm/llvm-project/commit/acc32667b051d84b1660460344dabdc64b9244c1
Author: 7mile <i at 7li.moe>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
A clang/lib/Basic/TargetDefines.h
M clang/lib/Basic/Targets.h
Log Message:
-----------
[Clang][NFC] Refactor `Targets.h` to make it publicly accessible (#116090)
This PR is motivated by the requirements of ClangIR, which includes
compilation pipelines that do not always start from the Clang driver. In
these cases, accessing some target-specific information, such as
obtaining a data layout string for a given target triple or querying
other target details, requires foundational infrastructure like
`clang::TargetInfo`. Since ClangIR is actively being upstreamed, sharing
this logic across components has become essential, which leads to this
PR.
The function `clang::targets::AllocateTarget` serves as the factory for
Clang's `TargetInfo`. To enable sharing, this PR moves `AllocateTarget`
to a public header.
The existing header `clang/lib/Basic/Targets.h` previously contained two
parts: the `AllocateTarget` function and target-specific macro helpers.
With `AllocateTarget` moved, only the macro stuff remain in `Targets.h`.
To better organize the code, the macro helpers have been relocated to a
new file, `clang/lib/Basic/TargetDefines.h` (essentially a rename). The
original `Targets.h` now serves as a proxy header that includes both
headers to maintain compatibility.
Commit: fce917d39d97b8697e04fc52b1727307fc341212
https://github.com/llvm/llvm-project/commit/fce917d39d97b8697e04fc52b1727307fc341212
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Add pipe, mkfifo interceptors (#116915)
## Why we think this are unsafe
Again, these correspond directly to system calls on linux and OSX. They
are two ways to do interprocess communication so it would make sense
that they take some synchronization by the OS.
Commit: a62c5497c90eb0960860dbc6352e53833d3c407d
https://github.com/llvm/llvm-project/commit/a62c5497c90eb0960860dbc6352e53833d3c407d
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
Log Message:
-----------
[SLP][REVEC] The vectorized result for ShuffleVector may not be ShuffleVectorInst. (#116940)
Commit: 9d5b3c80175da59728d13c779051eaf5311c64f7
https://github.com/llvm/llvm-project/commit/9d5b3c80175da59728d13c779051eaf5311c64f7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Fix Maintainers.md formatting (NFC)
In the inactive maintainers section, don't render everything on
one line. Also order alphabetically by last name.
Commit: b8e1d4dbea8905e48d51a70bf75cb8fababa4a60
https://github.com/llvm/llvm-project/commit/b8e1d4dbea8905e48d51a70bf75cb8fababa4a60
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
[AMDGPU] prevent shrinking udiv/urem if either operand is in (SignedMax,UnsignedMax] (#116733)
Do this by using ComputeKnownBits and checking for !isNonNegative and
isUnsigned. This rejects shrinking unsigned div/rem if operands exceed
smax_bitwidth since we know NumSignBits will be always 0.
Commit: 934140a3353f6d480a01a1f68d42899c926ee056
https://github.com/llvm/llvm-project/commit/934140a3353f6d480a01a1f68d42899c926ee056
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Remove mkfifoat interceptor (#116997)
This partially reverts #116915
[fce917d](https://github.com/llvm/llvm-project/commit/fce917d39d97b8697e04fc52b1727307fc341212)
mkfifoat was improperly guarded against in MacOS systems
Commit: 9fb01fcd9fd5ccffa2421096e5e058156b86aa84
https://github.com/llvm/llvm-project/commit/9fb01fcd9fd5ccffa2421096e5e058156b86aa84
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp8.txt
Log Message:
-----------
[AMDGPU][MC][True16] Support VOP2 instructions with true16 format (#115233)
Support true16 format for VOP2 instructions in MC
This patch updates the true16 and fake16 vop_profile for the following
instructions and update the asm/dasm tests:
v_fmac_f16
v_fmamk_f16
v_fmaak_f16
It seems vop2_t16_promote.s files are not yet updated with true16 flag
in the previous batch update. It will be updated seperately
Commit: 1b7f690a0b345f63020ef12e059f86240e6346b9
https://github.com/llvm/llvm-project/commit/1b7f690a0b345f63020ef12e059f86240e6346b9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Add Github account for SundeepKushwaha (NFC)
Commit: 5bf017ca0c158316d9b060154a1e80304de970f3
https://github.com/llvm/llvm-project/commit/5bf017ca0c158316d9b060154a1e80304de970f3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Use LineLocation in a unit test (NFC) (#116917)
This patch uses LineLocation in preference to FieldsAre to improve the
readability. The change makes the unit test a little more consistent
because we already use LineLocation in other tests in the same file.
Commit: f88c913f8aa1c2bb8e8636ccd9defcb7755a8a40
https://github.com/llvm/llvm-project/commit/f88c913f8aa1c2bb8e8636ccd9defcb7755a8a40
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Add a new constructor to MemProfReader (NFC) (#116918)
This patch adds a new constructor to MemProfReader that takes
IndexedMemProfData, a complete package of MemProf profile. To
showcase its usage, I'm updating one of the unit tests to use the new
constructor.
Because of type mismatches between DenseMap and MapVector, I'm copying
Frames and CallStacks for now. Once we remove the methods and old
constructors that take or return individual components (frames, call
stacks, and records), we will drop the copying, and the new
constructor will collapse down to:
MemProfReader(IndexedMemProfData MemProfData)
: MemProfData(std::move(MemProfData)) {}
Since nobody in the LLVM codebase uses the constructor that takes the
three indivdual components, I'm deprecating the old constructor.
Commit: ab7201a8a39a94bf446f247c6be2602976fbbb5b
https://github.com/llvm/llvm-project/commit/ab7201a8a39a94bf446f247c6be2602976fbbb5b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
Log Message:
-----------
[memprof] Deprecate MemProfReader::getFrameMapping and its friends (NFC) (#116919)
All the consumers of the data from MemProfReader have switched to
MemProfReader::takeMemProfData. This patch deprecates
MemProfReader::getFrameMapping and its friends.
Commit: 4acba0697e7d8068927753f3bdabad478df91dc4
https://github.com/llvm/llvm-project/commit/4acba0697e7d8068927753f3bdabad478df91dc4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Use a new constructor of IndexedAllocationInfo (NFC) (#116920)
IndexedAllocationInfo now has a new constructor that allows us to omit
the inline call stack, which is going away soon. This patch migrates
away from the old constructor.
Commit: 4b3b74dffa0aa76169cb67c3cb7ccf152c2c03aa
https://github.com/llvm/llvm-project/commit/4b3b74dffa0aa76169cb67c3cb7ccf152c2c03aa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Use InstrProfWriter::addMemProfData in a unit test (NFC) (#116921)
This patch uses InstrProfWriter::addMemProfData to add the complete
MemProf profile to the writer context.
Commit: fb4ecada815ceee37536a26b4ff5ce231226b23e
https://github.com/llvm/llvm-project/commit/fb4ecada815ceee37536a26b4ff5ce231226b23e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
A flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Semantics/CMakeLists.txt
A flang/lib/Semantics/openmp-modifiers.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/lib/Frontend/OpenMP/OMP.cpp
Log Message:
-----------
[flang][OpenMP] Change clause modifier representation in parser (#116656)
The main issue to solve is that OpenMP modifiers can be specified in any
order, so the parser cannot expect any specific modifier at a given
position. To solve that, define modifier to be a union of all allowable
specific modifiers for a given clause.
Additionally, implement modifier descriptors: for each modifier the
corresponding descriptor contains a set of properties of the modifier
that allow a common set of semantic checks. Start with the syntactic
properties defined in the spec: Required, Unique, Exclusive, Ultimate,
and implement common checks to verify each of them.
OpenMP modifier overhaul: #2/3
Commit: e660e6503ba14684bd460b7baaf3da7336d0f46e
https://github.com/llvm/llvm-project/commit/e660e6503ba14684bd460b7baaf3da7336d0f46e
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/API/SBStructuredData.h
M lldb/include/lldb/Target/LanguageRuntime.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/source/API/SBFrame.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/StackFrame.cpp
A lldb/test/API/lang/objc/languageinfo/Makefile
A lldb/test/API/lang/objc/languageinfo/TestObjCLanguageInfo.py
A lldb/test/API/lang/objc/languageinfo/main.m
Log Message:
-----------
[lldb] Add an API to derive language-specific runtime information (#116904)
This is motivated by exposing some Swift language-specific flags through
the API, in the example here it is used to communicate the Objective-C
runtime version. This could also be a meaningful extension point to get
information about "embedded: languages, such as extracting the C++
version in an Objective-C++ frame or something along those lines.
Commit: e2368afbd0d9b7e8fb900f54c8d71787e44d5774
https://github.com/llvm/llvm-project/commit/e2368afbd0d9b7e8fb900f54c8d71787e44d5774
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
Fix GCC Wparentheses warning in assert condition / message. NFC.
Commit: fa9bcb4d9f47beaea0898d00f77971549603e25e
https://github.com/llvm/llvm-project/commit/fa9bcb4d9f47beaea0898d00f77971549603e25e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Update links to subproject maintainer lists
Some of these have been migrated to Maintainers.rst/Maintainers.txt
in the meantime.
Commit: ae023f3499dda3975e6379bc4c0a8d097ac18f60
https://github.com/llvm/llvm-project/commit/ae023f3499dda3975e6379bc4c0a8d097ac18f60
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/include/flang/Semantics/openmp-modifiers.h
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/include/flang/Semantics/openmp-modifiers.h:45:69: error: extra
';' outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
Commit: ba7cc955662cfebb614c6a37a7341ba6072a0b70
https://github.com/llvm/llvm-project/commit/ba7cc955662cfebb614c6a37a7341ba6072a0b70
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/fprofile-sample-use.c
Log Message:
-----------
[Driver] Remove ignored Flag form of -fauto-profile/-fprofile-sample-use
The Flag form options are accepted and silently ignored, which can be
surprising. The Eq form is supposed to be used instead, e.g.
-fprofile-sample-use=a.afdo.
Since we does not intend to support GCC's "fbaata.afdo" filename, just
remove the two options. While here, clean up code as -fauto-profile= is
an alias.
Pull Request: https://github.com/llvm/llvm-project/pull/113528
Commit: 81c2024311ab1f0a30c73df8d0957b86c5dac282
https://github.com/llvm/llvm-project/commit/81c2024311ab1f0a30c73df8d0957b86c5dac282
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Remove an unused using directive (#117004)
We've switched to LineLocation from FieldsAre, so we don't need this
"using" directive anymore.
Commit: 0733f384142b02558b80b3e9a4633dc4d202a14b
https://github.com/llvm/llvm-project/commit/0733f384142b02558b80b3e9a4633dc4d202a14b
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/test/Dialect/Arith/int-range-interface.mlir
Log Message:
-----------
[mlir][int-range] Limit xor int range inference to i1 (#116968)
Fixes https://github.com/llvm/llvm-project/issues/82168
`intrange::inferXor` was incorrectly handling ranges for widths > i1
(see example in code). Limit it to i1 for now. For bigger widths it will
return maxRange.
Commit: 81055ff070e128bff78c8fa2d8ffe4c92ae692a6
https://github.com/llvm/llvm-project/commit/81055ff070e128bff78c8fa2d8ffe4c92ae692a6
Author: arthurqiu <arthurq at nvidia.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[mlir][nvvm] Add attributes for cluster dimension PTX directives (#116973)
PTX programming models provides cluster dimension directives, which are
leveraged by the downstream `ptxas` compiler. See
https://docs.nvidia.com/cuda/nvvm-ir-spec/#supported-properties and
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#cluster-dimension-directives
This PR introduces the cluster dimension directives to MLIR's NVVM
dialect as listed below:
```
cluster_dim_{x,y,z} -> exact number of CTAs per cluster
cluster_max_blocks -> max number of CTAs per cluster
```
Commit: 74046855981bad2847c8f03114efd731da4d216c
https://github.com/llvm/llvm-project/commit/74046855981bad2847c8f03114efd731da4d216c
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/ICF.cpp
M lld/MachO/ICF.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Target.h
M lld/test/MachO/icf-safe-thunks-dwarf.ll
Log Message:
-----------
[lld-macho] Fix compatibility between --icf=safe_thunks and --keep-icf-stabs (#116687)
Currently when `--icf=safe_thunks` is used, `STABS` entries cannot be
generated for ICF'ed functions. This is because if ICF converts a full
function into a thunk and then we generate a `STABS` entry for the
thunk, `dsymutil` will expect to find the entire function body at the
location of the thunk. Because just a thunk will be present at the
location of the `STABS` entry - dsymutil will generate invalid debug
info for such scenarios.
With this change, if `--icf=safe_thunks` is used and `--keep-icf-stabs`
is also specified, STABS entries will be created for all functions, even
merged ones. However, the STABS entries will point at the actual (full)
function body while having the name of the thunk. This way we still get
program correctness as well as correct DWARF data. When doing this, the
debug data will be identical to the scenario where we're using
`--icf=all` and `--keep-icf-stabs`, but the actual program will also
contain thunks, which won't show up in the DWARF data.
Commit: 8f8dcedb007c21412956208e524ff245c0ba5f58
https://github.com/llvm/llvm-project/commit/8f8dcedb007c21412956208e524ff245c0ba5f58
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/Target/LanguageRuntime.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/source/API/SBFrame.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/StackFrame.cpp
R lldb/test/API/lang/objc/languageinfo/TestObjCLanguageInfo.py
A lldb/test/API/lang/objc/languageinfo/TestObjCLanguageSpecificData.py
Log Message:
-----------
Rename GetLanguageInfo to GetLanguageSpecificData (#117012)
Unbeknownst to me the Swift LLDB branch already had an almost identical
API with this name, so it makes sense to merge the two.
Commit: 1f342f94b258bbf31efa2a6dc458229832fb5c6f
https://github.com/llvm/llvm-project/commit/1f342f94b258bbf31efa2a6dc458229832fb5c6f
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/intrinsic-vector-match.ll
A llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
Log Message:
-----------
[RISCV] Add coverage for recently added vectorization intrinsics
vector.match was added in e52238.
extract.last.active was added in ed5aad.
We have oppurtunities for better codegen in both, but neither are
terrible out of the box.
Commit: 6473a36edc571cf0734a2e8d4354e332efb170e9
https://github.com/llvm/llvm-project/commit/6473a36edc571cf0734a2e8d4354e332efb170e9
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBFrame.h
M lldb/source/API/SBFrame.cpp
Log Message:
-----------
Make SBFrame::GetLanguageSpecificData() const (#117019)
One last diff I missed between Swift and LLVM.
Commit: e14827f0828d14ef17ab76316e8449d1b76e2617
https://github.com/llvm/llvm-project/commit/e14827f0828d14ef17ab76316e8449d1b76e2617
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[MemProf] Templatize CallStackRadixTreeBuilder (NFC) (#117014)
Prepare for usage in the bitcode reader/writer where we already have a
LinearFrameId:
- templatize input frame id type in CallStackRadixTreeBuilder
- templatize input frame id type in computeFrameHistogram
- make the map from FrameId to LinearFrameId optional
We plan to use the same radix format in the ThinLTO summary records,
where we already have a LinearFrameId.
Commit: 2c63e6d94261d6c9d045523f37f350f9e60ed35b
https://github.com/llvm/llvm-project/commit/2c63e6d94261d6c9d045523f37f350f9e60ed35b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/source/Host/common/Editline.cpp
Log Message:
-----------
[lldb] Fix double newline typo in PrintCompletion
While addressing code review feedback I accidentally introduced a
spurious second newline.
Commit: d5032b9f4b6aa415e7fd39701f29edb93028d8b3
https://github.com/llvm/llvm-project/commit/d5032b9f4b6aa415e7fd39701f29edb93028d8b3
Author: Tyler Nowicki <tyler.nowicki at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[NFC][Coroutines] Use structured binding with llvm::enumerate in CoroSplit (#116879)
Avoid repeated calls to value() and index() using structured binding
with llvm::enumerate.
Commit: b170ab21c3cd16c1fc1917d91092b221b4163442
https://github.com/llvm/llvm-project/commit/b170ab21c3cd16c1fc1917d91092b221b4163442
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Construct MemProfReader with IndexedMemProfData (#117022)
This patch updates a unit test to construct MemProfReader with
IndexedMemProfData, a complete package of MemProf profile.
With this change, nobody in the LLVM codebase is using the
MemProfReader constructor that takes individual components of the
MemProf profile, so this patch deprecates the constructor.
Commit: 201f4f6bcccf3f0ac0c9d3e8c484fb2c53bfb016
https://github.com/llvm/llvm-project/commit/201f4f6bcccf3f0ac0c9d3e8c484fb2c53bfb016
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
A llvm/test/MC/AMDGPU/mai-gfx950-err.s
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_ld_scale_b32 for gfx950 (#116722)
Commit: c0efcc08e67325dc813d9acb7cc3560fd444fc8f
https://github.com/llvm/llvm-project/commit/c0efcc08e67325dc813d9acb7cc3560fd444fc8f
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/CMakeLists.txt
M libc/newhdrgen/yaml_to_classes.py
Log Message:
-----------
[libc] support fully OOT build (#101287)
Fully OOT build along with SCUDO:
```
mkdir oot
cp -r cmake libc compiler-rt oot
cp ./llvm/cmake/modules/* ./oot/cmake/Modules/
cd oot
mkdir build
cd build
cmake ../libc -DLIBC_USE_NEW_HEADER_GEN=On -DLLVM_LIBC_FULL_BUILD=On -DLLVM_LIBC_FULL_BUILD=On -DLLVM_LIBC_INCLUDE_SCUDO=On -DCOMPILER_RT_BUILD_SCUDO_STANDALONE_WITH_LLVM_LIBC=On -DCOMPILER_RT_SCUDO_STANDALONE_BUILD_SHARED=Off -DCMAKE_CXX_COMPILER=clang++ -DCMAKE_C_COMPILER=clang -DLLVM_LIBC_COMPILER_RT_PATH=../compiler-rt/ -DCOMPILER_RT_STANDALONE_BUILD=On -GNinja -DLLVM_COMPILER_IS_GCC_COMPATIBLE=On -DLLVM_RUNTIMES_BUILD=On
```
Commit: 0bb1b683302e41bb1bdbcec1cbe724f54add0fa3
https://github.com/llvm/llvm-project/commit/0bb1b683302e41bb1bdbcec1cbe724f54add0fa3
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/JumpThreading/thread-loads.ll
M llvm/test/Transforms/NewGVN/tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/preserve-access-group.ll
Log Message:
-----------
[Local] Only intersect tbaa metadata if instr moves. (#116682)
Preserve tbaa metadata on the replacement instruction, if it does not
move. In that case, the program would be UB, if the aliasing property
encoded in the metadata does not hold.
This makes use of the clarification re tbaa metadata implying UB if the
property does not hold: https://github.com/llvm/llvm-project/pull/116220
Same as https://github.com/llvm/llvm-project/pull/115868, but for !tbaa
PR: https://github.com/llvm/llvm-project/pull/116682
Commit: 77ee94e78a52cf65e66c67804bf5b9bb5fe29b07
https://github.com/llvm/llvm-project/commit/77ee94e78a52cf65e66c67804bf5b9bb5fe29b07
Author: bahareh-farhadi <53280095+bahareh-farhadi at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
Add IsText parameter to open yaml file (#116992)
Add IsText parameter to open yaml file
this fixes `FAIL: LLVM :: Transforms/LowerTypeTests/cfi-icall-alias.ll`
Co-authored-by: Abhina Sreeskantharajan <Abhina.Sreeskantharajan at ibm.com>
Commit: c0ee8e22f4093ea1fda42cc037d50cb4619e1445
https://github.com/llvm/llvm-project/commit/c0ee8e22f4093ea1fda42cc037d50cb4619e1445
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SeedCollectorTest.cpp
Log Message:
-----------
[SandboxVec][SeedCollector] Reject non-simple memory ops for memory seeds (#116891)
Load/Store isSimple is a necessary condition for VectorSeeds, but not
sufficient, so reverse the condition and return value, and continue the
check. Add relevant tests.
Commit: 81d93af7d65aea9ca665d73e77290ea36301720c
https://github.com/llvm/llvm-project/commit/81d93af7d65aea9ca665d73e77290ea36301720c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
Log Message:
-----------
[memprof] Fix arm-polly-linux builds
arm-polly-linux seems to be failing because we don't include
<unordered_map>.
https://lab.llvm.org/buildbot/#/builders/90/builds/3090
Commit: 86734c857724b382665c6f1c2244a22edee97f84
https://github.com/llvm/llvm-project/commit/86734c857724b382665c6f1c2244a22edee97f84
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Log Message:
-----------
[NFC][AMDGPU] Remove redundant code in `AMDGPUAsmPrinter.cpp`
Commit: 3282be1f8d278836135cc1bda130abb031155701
https://github.com/llvm/llvm-project/commit/3282be1f8d278836135cc1bda130abb031155701
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
Log Message:
-----------
[BOLT] Use ULEB128 encoding for PIE/DSO exception tables (#116911)
Use ULEB128 encoding for call sites in PIE/DSO binaries. The encoding
reduces the size of the tables compared to sdata4 and is the default
format used by Clang.
Note that for fixed-address executables we still use absolute addressing
to cover cases where landing pads can reside in different function
fragments.
For testing, we rely on runtime EH tests.
Commit: aee3f5b2951edb6791802fcc53e93795e3f16140
https://github.com/llvm/llvm-project/commit/aee3f5b2951edb6791802fcc53e93795e3f16140
Author: Amara Emerson <amara at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
Log Message:
-----------
[AArch64][SME] Fix naming of FMLA_VG2_M2Z4Z_H -> FMLA_VG2_M2Z2Z_H instruction. NFC.
Looks like this one is the odd one out. Doesn't affect any functionality and
now matches the naming convention of the other type variants.
Commit: 19f58e3cbe92d8bcf281a6fb95e6ed62722f2a13
https://github.com/llvm/llvm-project/commit/19f58e3cbe92d8bcf281a6fb95e6ed62722f2a13
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c-fake16.s
Log Message:
-----------
[AMDGPU][True16][MC] fix a typo in fake16 test (#117033)
This is a NFC change to fix a typo in dasm test of VOPC instructions.
Fake16 test should use "-real-true16" attribute. Test are passing
previously because the true16 of VOPC instructions are not yet
implemented
Commit: e468653ee77cd8e0268e5e8d83d5430114f1f4c8
https://github.com/llvm/llvm-project/commit/e468653ee77cd8e0268e5e8d83d5430114f1f4c8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Use LineLocation in a unit test (NFC) (#117031)
We've switched to LineLocation from FieldsAre in MemProfUseTest.cpp.
This patch does the same thing in InstrProfTest.cpp.
llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Commit: a3f2e01c95df67126ab5a75eca1b47e207486bee
https://github.com/llvm/llvm-project/commit/a3f2e01c95df67126ab5a75eca1b47e207486bee
Author: peterbell10 <peterbell10 at openai.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/test/Transforms/InstCombine/extractelement.ll
M llvm/test/Transforms/InstCombine/vector_insertelt_shuffle.ll
Log Message:
-----------
[InstCombine] Only fold extract element to trunc if vector `hasOneUse` (#115627)
This fixes a missed optimization caused by the `foldBitcastExtElt`
pattern interfering with other combine patterns. In the case I was
hitting, we have IR that combines two vectors into a new larger vector
by extracting elements and inserting them into the new vector.
```llvm
define <4 x half> @bitcast_extract_insert_to_shuffle(i32 %a, i32 %b) {
%avec = bitcast i32 %a to <2 x half>
%a0 = extractelement <2 x half> %avec, i32 0
%a1 = extractelement <2 x half> %avec, i32 1
%bvec = bitcast i32 %b to <2 x half>
%b0 = extractelement <2 x half> %bvec, i32 0
%b1 = extractelement <2 x half> %bvec, i32 1
%ins0 = insertelement <4 x half> undef, half %a0, i32 0
%ins1 = insertelement <4 x half> %ins0, half %a1, i32 1
%ins2 = insertelement <4 x half> %ins1, half %b0, i32 2
%ins3 = insertelement <4 x half> %ins2, half %b1, i32 3
ret <4 x half> %ins3
}
```
With the current behavior, `InstCombine` converts each vector extract
sequence to
```llvm
%tmp = trunc i32 %a to i16
%a0 = bitcast i16 %tmp to half
%a1 = extractelement <2 x half> %avec, i32 1
```
where the extraction of `%a0` is now done by truncating the original
integer. While on it's own this is fairly reasonable, in this case it
also blocks the pattern which converts `extractelement` -
`insertelement` into shuffles which gives the overall simpler result:
```llvm
define <4 x half> @bitcast_extract_insert_to_shuffle(i32 %a, i32 %b) {
%avec = bitcast i32 %a to <2 x half>
%bvec = bitcast i32 %b to <2 x half>
%ins3 = shufflevector <2 x half> %avec, <2 x half> %bvec, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x half> %ins3
}
```
In this PR I fix the conflict by obeying the `hasOneUse` check even if
there is no shift instruction required. In these cases we can't remove
the vector completely, so the pattern has less benefit anyway.
Also fwiw, I think dropping the `hasOneUse` check for the 0th element
might have been a mistake in the first place. Looking at
https://github.com/llvm/llvm-project/commit/535c5d56a7bc9966036a11362d8984983a4bf090
the commit message only mentions loosening the `isDesirableIntType`
requirement and doesn't mention changing the `hasOneUse` check at all.
Commit: 4acf935b95778d8625898730edbfe296005b4b49
https://github.com/llvm/llvm-project/commit/4acf935b95778d8625898730edbfe296005b4b49
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Add release note for parallel module creation in LLDB (#116857)
Release note #110646 and #114507.
Commit: 4087b871c5aa80ae2f5425533eb83d909231caa7
https://github.com/llvm/llvm-project/commit/4087b871c5aa80ae2f5425533eb83d909231caa7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/jumptable.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-medium-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-pic-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-small-rv64.mir
Log Message:
-----------
[RISCV][GISel] Move G_BRJT expansion to legalization (#73711)
Instead of custom selecting a bunch of instructions, we can expand to
generic MIR during legalization.
Commit: c3207c31fce8afa4e5ae728804f18b4e863197e7
https://github.com/llvm/llvm-project/commit/c3207c31fce8afa4e5ae728804f18b4e863197e7
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
[libc] Use best-fit binary trie to make malloc logarithmic (#106259)
This reworks the free store implementation in libc's malloc to use a
dlmalloc-style binary trie of circularly linked FIFO free lists. This
data structure can be maintained in logarithmic time, but it still
permits a relatively small implementation compared to other
logarithmic-time ordered maps.
The implementation doesn't do the various bitwise tricks or
optimizations used in actual dlmalloc; it instead optimizes for
(relative) readability and minimum code size. Specific optimization can
be added as necessary given future profiling.
Commit: 9be475af81ee36f1d360ad1d70b695c4b26c98fa
https://github.com/llvm/llvm-project/commit/9be475af81ee36f1d360ad1d70b695c4b26c98fa
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
R libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
R libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
R libc/src/__support/freestore.h
R libc/src/__support/freetrie.cpp
R libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
R libc/test/src/__support/freestore_test.cpp
R libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Revert "[libc] Use best-fit binary trie to make malloc logarithmic" (#117065)
Reverts llvm/llvm-project#106259
Unit tests break on AArch64.
Commit: ec5b729e651c48dfff67487e6bb24c218c35cda9
https://github.com/llvm/llvm-project/commit/ec5b729e651c48dfff67487e6bb24c218c35cda9
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Upgrade a unit test to MemProf Version 3 (#117063)
This patch upgrades a unit test to MemProf Version 3 while removing
those bits that cannot be upgraded to Version 3.
The bits being removed expect instrprof_error::hash_mismatch from a
broken MemProf profile that references a frame that doesn't actually
exist. Now, Version 3 no longer issues
instrprof_error::hash_mismatch. Even if it still issued
instrprof_error::hash_mismatch, we would have a couple of hurdles:
- InstrProfWriter::addMemProfData will soon require all (or none) of
the fields (frames, call stacks, and records) be populated. That
is, it won't accept an instance of IndexedMemProfData with frames
missing.
- writeMemProfV3 asserts that every frame occurs at least once:
assert(MemProfData.Frames.size() == FrameHistogram.size());
This patch gives up on instrprof_error::hash_mismatch and tries to
trigger instrprof_error::unknown_function with the empty profile.
Commit: 8f53a67bb8fa157d1767b0299ef2a19328cf26e9
https://github.com/llvm/llvm-project/commit/8f53a67bb8fa157d1767b0299ef2a19328cf26e9
Author: Ryan Prichard <rprichard at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.cat/is_array.pass.cpp
Log Message:
-----------
[libc++][Android] Allow testing libc++ with clang-r536225 (#116149)
The Android clang-r536225 compiler identifies as Clang 19, but it is
based on commit fc57f88f007497a4ead0ec8607ac66e1847b02d6, which predates
the official LLVM 19.0.0 release.
Some tests need fixes:
* The sized delete tests fail because clang-r536225 leaves sized
deallocation off by default.
* std::array<T[0]> is true when this Android Clang version is used with
a trunk libc++, but we expect it to be false in the test. In practice,
Clang and libc++ usually come from the same commit on Android.
Commit: 9ebc6f5d6d333ec38d9a8231414bbd4d58fa83e9
https://github.com/llvm/llvm-project/commit/9ebc6f5d6d333ec38d9a8231414bbd4d58fa83e9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libcxx/include/thread
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/libcxx/thread/thread.stoptoken/atomic_unique_lock.pass.cpp
M libcxx/test/std/thread/thread.semaphore/max.pass.cpp
Log Message:
-----------
[libc++] Include headers in <thread> conditionally (#116539)
Commit: 1c8ac4c620fa1532cd597aa5c478c8faf7ea14e4
https://github.com/llvm/llvm-project/commit/1c8ac4c620fa1532cd597aa5c478c8faf7ea14e4
Author: Ryan Prichard <rprichard at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libc++][Android] BuildKite CI: update Clang and sysroot versions (#116151)
Android clang-r536225 identifies as Clang 19 but it predates LLVM
19.0.0. It is based off of fc57f88f007497a4ead0ec8607ac66e1847b02d6.
Commit: f06c187799d910fd3ac3e9106397e5eecff9f265
https://github.com/llvm/llvm-project/commit/f06c187799d910fd3ac3e9106397e5eecff9f265
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
A lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
[lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#117071)
This is a reland of https://github.com/llvm/llvm-project/pull/112811.
Fixed the bot breakage by running ld.lld explicitly.
Commit: a44d60f06fe1381e261e3da5c47ddab1c428a67a
https://github.com/llvm/llvm-project/commit/a44d60f06fe1381e261e3da5c47ddab1c428a67a
Author: Florian Mayer <fmayer at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
R llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
Log Message:
-----------
Revert "[llvm] Improve llvm.objectsize computation by computing GEP, alloca and malloc parameters bound" (#117020)
Reverts llvm/llvm-project#115522
This caused UBSan errors in multi-stage clang build:
https://lab.llvm.org/buildbot/#/builders/25/builds/4241/steps/10/logs/stdio
Commit: c58c22638e17a659fbda94d364bda08e0db1fd53
https://github.com/llvm/llvm-project/commit/c58c22638e17a659fbda94d364bda08e0db1fd53
Author: Amara Emerson <amara at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
Log Message:
-----------
[AArch64][SME] Fix naming of FMLS_VG4_M4Z2Z_H -> FMLS_VG4_M4Z4Z_H. NFC.
Similar to the FMLA_VG2_M2Z2Z_H one.
Commit: 07137ce3e1d7b9f18f579a9a2a4f47ec4270f156
https://github.com/llvm/llvm-project/commit/07137ce3e1d7b9f18f579a9a2a4f47ec4270f156
Author: Daniel Hoekwater <hoekwater at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/CFIFixup.cpp
A llvm/test/CodeGen/AArch64/cfi-fixup-multi-section.mir
Log Message:
-----------
[CFIFixup] Add frame info to the first block of each section (#113626)
Now that `-fbasic-block-sections=list` is enabled for Arm, functions may
be split aross multiple sections, and CFI information must be handled
independently for each section.
On x86, this is handled in `llvm/lib/CodeGen/CFIInstrInserter.cpp`.
However, this pass does not run on Arm, so we must add logic for it
to `llvm/lib/CodeGen/CFIFixup.cpp`.
Commit: 14667119bcc78fe7d8a2d8f6c31407f2b6a6f8a5
https://github.com/llvm/llvm-project/commit/14667119bcc78fe7d8a2d8f6c31407f2b6a6f8a5
Author: lntue <lntue at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/src/__support/common.h
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[libc] Allow each function can have extra attributes by defining LLVM_LIBC_FUNCTION_ATTR_func macro. (#116160)
Commit: 668f2c7fab288db90d474a7f6f72b11e5a120328
https://github.com/llvm/llvm-project/commit/668f2c7fab288db90d474a7f6f72b11e5a120328
Author: Axel Lundberg <19574357+Zonotora at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize.c
Log Message:
-----------
[clang][UBSan] Make sure that the implicit-conversion group is compatible with minimal runtime (#114865)
We are currently getting:
`clang: error: invalid argument '-fsanitize-minimal-runtime' not allowed
with '-fsanitize=implicit-conversion'`
when running
`-fsanitize=implicit-conversion -fsanitize-minimal-runtime`
because `implicit-conversion` now includes
`implicit-bitfield-conversion` which is not included in the `integer`
check. The `integer` check includes the `implicit-integer-conversion`
checks and is supported by the trapping option and because of that
compatible with the minimal runtime. It is thus reasonable to make
`implicit-bitfield-conversion` compatible with the minimal runtime.
Commit: ecda14069f0e98f6ec06ca98277505f4798f486e
https://github.com/llvm/llvm-project/commit/ecda14069f0e98f6ec06ca98277505f4798f486e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
A flang/test/Fir/CUDA/cuda-extranal-mangling.mlir
Log Message:
-----------
[flang][cuda] Adapt ExternalNameConversion to work in gpu module (#117039)
Commit: f5002a0faee76609a6b054d579e1e09312ab9ac9
https://github.com/llvm/llvm-project/commit/f5002a0faee76609a6b054d579e1e09312ab9ac9
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[Utils] Extract CollectDebugInfoForCloning from CloneFunctionInto (#114537)
Summary:
Consolidate the logic in a single function. We do an extra pass over
Instructions but this is necessary to untangle things and extract
metadata cloning in a future diff.
Test Plan:
```
$ ninja check-llvm-unit check-llvm
[211/213] Running the LLVM regression tests
Testing Time: 106.06s
Total Discovered Tests: 62601
Skipped : 17 (0.03%)
Unsupported : 2518 (4.02%)
Passed : 59911 (95.70%)
Expectedly Failed: 155 (0.25%)
[212/213] Running lit suite
Testing Time: 12.47s
Total Discovered Tests: 8474
Skipped: 17 (0.20%)
Passed : 8457 (99.80%)
```
Extracted from #109032 (commit 3) (there are more refactors and cleanups
in subsequent commits)
Commit: 53a6a11e0d51229d341b8906252645cd8a5de796
https://github.com/llvm/llvm-project/commit/53a6a11e0d51229d341b8906252645cd8a5de796
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
A clang/test/CodeGen/embed-bitcode-marker-with-nonzero-as.c
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Log Message:
-----------
[LLVM][NFC] Use `used`'s element type if available (#116804)
When embedding, if `compiler.used` exists, we should re-use it's element
type instead of blindly assuming it's an unqualified pointer.
Commit: 97e3f62fc5cecbda3cc0337aceb6ee3178f62934
https://github.com/llvm/llvm-project/commit/97e3f62fc5cecbda3cc0337aceb6ee3178f62934
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/CMakeLists.txt
M libc/newhdrgen/yaml_to_classes.py
Log Message:
-----------
Revert "[libc] support fully OOT build (#101287)"
This reverts commit c0efcc08e67325dc813d9acb7cc3560fd444fc8f.
Commit: 905e831f8c8341e53e7e3adc57fd20b8e08eb999
https://github.com/llvm/llvm-project/commit/905e831f8c8341e53e7e3adc57fd20b8e08eb999
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
Revert "[AMDGPU] prevent shrinking udiv/urem if either operand is in (SignedMax,UnsignedMax] (#116733)"
This reverts commit b8e1d4dbea8905e48d51a70bf75cb8fababa4a60.
Causes failures on the `libc` test suite https://lab.llvm.org/buildbot/#/builders/73/builds/8871
Commit: c86899d2d218e19f5a69d9f97f6ff43abc6c897c
https://github.com/llvm/llvm-project/commit/c86899d2d218e19f5a69d9f97f6ff43abc6c897c
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/CodeGen/CGDecl.cpp
A clang/test/CodeGenCXX/auto-var-init-attr.cpp
Log Message:
-----------
[clang] Add support for `__declspec(no_init_all)` (#116847)
In MSVC, when `/d1initall` is enabled, `__declspec(no_init_all)` can be
applied to a type to suppress auto-initialization for all instances of
that type or to a function to suppress auto-initialization for all
locals within that function.
This change does the same for Clang, except that it applies to the
`-ftrivial-auto-var-init` flag instead.
NOTE: I did not add a Clang-specific spelling for this but would be
happy to make a followup PR if folks are interested in that.
Commit: fe33bd0617ef4905ad144566bb26b1e177875e1a
https://github.com/llvm/llvm-project/commit/fe33bd0617ef4905ad144566bb26b1e177875e1a
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
Log Message:
-----------
[test] Precommit test for #116936
Commit: 1de9bc1a27137a7559a247b73c14cfab3be81b54
https://github.com/llvm/llvm-project/commit/1de9bc1a27137a7559a247b73c14cfab3be81b54
Author: Carlo Cabrera <github at carlo.cab>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/DriverUtils.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputFiles.h
M lld/MachO/Options.td
A lld/test/MachO/Inputs/liballowable_client.dylib
A lld/test/MachO/allowable-client.s
Log Message:
-----------
[lld][MachO] Respect dylibs linked with `-allowable_client` (#114638)
ld64.lld would previously allow you to link against dylibs linked with
`-allowable_client`, even if the client's name does not match any
allowed client.
This change fixes that. See #114146 for related discussion.
The test binary `liballowable_client.dylib` was created on macOS with:
echo | clang -xc - -dynamiclib -mmacosx-version-min=10.11 -arch x86_64
-Wl,-allowable_client,allowed -o lib/liballowable_client.dylib
Commit: 7b5b01980c3b14a0260e9c15ab505cf14abd0753
https://github.com/llvm/llvm-project/commit/7b5b01980c3b14a0260e9c15ab505cf14abd0753
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
R llvm/test/CodeGen/X86/pr114265.mir
Log Message:
-----------
Revert "[X86] Recognize POP/ADD/SUB modifying rsp in getSPAdjust. (#114265) (#117089)
This reverts commit 6fb7cdff3d90c565b87a253ff7dbd36319879111.
Commit: aa65473c9ddcf3cbb80e63c38af842d05346374b
https://github.com/llvm/llvm-project/commit/aa65473c9ddcf3cbb80e63c38af842d05346374b
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase (#116934)
The dialect conversion driver has three phases:
- **Create** `IRRewrite` objects as the IR is traversed.
- **Finalize** `IRRewrite` objects. During this phase, source
materializations for mismatching value types are created. (E.g., when
`Value` is replaced with a `Value` of different type, but there is a
user of the original value that was not modified because it is already
legal.)
- **Commit** `IRRewrite` objects. During this phase, all remaining IR
modifications are materialized. In particular, SSA values are actually
being replaced during this phase.
This commit removes the "finalize" phase. This simplifies the code base
a bit and avoids one traversal over the `IRRewrite` stack. Source
materializations are now built during the "commit" phase, right before
an SSA value is being replaced.
This commit also removes the "inverse mapping" of the conversion value
mapping, which was used to predict if an SSA value will be dead at the
end of the conversion. This check is replaced with an approximate check
that does not require an inverse mapping. (A false positive for `v` can
occur if another value `v2` is mapped to `v` and `v2` turns out to be
dead at the end of the conversion. This case is not expected to happen
very often.) This reduces the complexity of the driver a bit and removes
one potential source of bugs. (There have been bugs in the usage of the
inverse mapping in the past.)
`BlockTypeConversionRewrite` no longer stores a pointer to the type
converter. This pointer is now stored in `ReplaceBlockArgRewrite`.
This commit is in preparation of merging the 1:1 and 1:N dialect
conversion driver. It simplifies the upcoming changes around the
conversion value mapping. (API surface of the conversion value mapping
is reduced.)
Commit: 4056d93be5a9ac7228f9022af40c199419b706cc
https://github.com/llvm/llvm-project/commit/4056d93be5a9ac7228f9022af40c199419b706cc
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
Revert "[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase" (#117094)
Reverts llvm/llvm-project#116934
This commit broke the build.
Commit: 258a5d499e87dc85109d97d1708abef61893a5a0
https://github.com/llvm/llvm-project/commit/258a5d499e87dc85109d97d1708abef61893a5a0
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
Log Message:
-----------
[ORC][arm64e] Add PAC signing/stripping support to ExecutorAddr toPtr/fromPtr.
On arm64e, uses the "wrap" and "unwrap" operations introduced in f14cb494a34d to
sign and strip pointers by default. Signing / striping can be overriden at the
toPtr / fromPtr callside by passing an explicit wrap / unwrap operation.
Commit: cbc780223374740fcc6771a6d5f53070a7bed2e7
https://github.com/llvm/llvm-project/commit/cbc780223374740fcc6771a6d5f53070a7bed2e7
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/Bufferize.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
R mlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
Log Message:
-----------
[mlir][bufferization] Remove `finalizing-bufferize` pass (#114154)
The dialect conversion-based bufferization passes have been migrated to
One-Shot Bufferize about two years ago. To clean up the code base, this
commit removes the `finalizing-bufferize` pass, one of the few remaining
parts of the old infrastructure. Most bufferization passes have already
been removed.
Note for LLVM integration: If you depend on this pass, migrate to
One-Shot Bufferize or copy the pass to your codebase.
Depends on #114152.
Commit: 5d38e6e42a90f5d469b5ff9e25e5e8865606776a
https://github.com/llvm/llvm-project/commit/5d38e6e42a90f5d469b5ff9e25e5e8865606776a
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/CMakeLists.txt
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
A flang/test/HLFIR/bufferize-workshare.fir
A flang/test/Integration/OpenMP/workshare-array-array-assign.f90
A flang/test/Integration/OpenMP/workshare-axpy.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
A flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
Log Message:
-----------
[flang] Introduce hlfir.elemental lowerings to omp.workshare_loop_nest (#104748)
This patch adds parallelization support for the following expression in OpenMP
workshare constructs:
* Elemental procedures in array expressions
(reapplied with linking fix)
Commit: 036cd27da250de7fab37d25ea5836b52ae2e7783
https://github.com/llvm/llvm-project/commit/036cd27da250de7fab37d25ea5836b52ae2e7783
Author: Jim Tsung-Chun Lin <jim at andestech.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Fix typo in RISCVISAInfoTest.cpp. NFC.
ExtsRV32G -> ExtsRV64G.
Commit: 69cc3f096ccbdef526bbd5a065a25c95122e87ee
https://github.com/llvm/llvm-project/commit/69cc3f096ccbdef526bbd5a065a25c95122e87ee
Author: Jeremy Kun <jkun at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Add mlir-query bazel rules (#116063)
I noticed there's no bazel query for `mlir-query`, unlike the other MLIR
tools, so adding one.
Commit: 4d6e69143dc449814884ac649583d3b35bc4ae91
https://github.com/llvm/llvm-project/commit/4d6e69143dc449814884ac649583d3b35bc4ae91
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/SystemZ/zos-mixed-ptr-sizes.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/arm-vfp16-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/CodeGen/tbaa-struct-bitfield-endianness.cpp
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-zero.ll
M llvm/test/Other/optimize-inrange-gep.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
A llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/PhaseOrdering/X86/unroll-vectorizer.ll
M llvm/test/Transforms/PhaseOrdering/memcpy-offset.ll
M llvm/test/Transforms/PhaseOrdering/pr95152.ll
Log Message:
-----------
Add the initializes attribute inference (#117104)
reland https://github.com/llvm/llvm-project/pull/97373 after fixing
clang tests.
Confirmed with "ninja check-llvm" and "ninja check-clang"
Commit: a432f11a52dd5ec21a3438bdaa8f623e32a3234c
https://github.com/llvm/llvm-project/commit/a432f11a52dd5ec21a3438bdaa8f623e32a3234c
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-globals.s
Log Message:
-----------
[JITLink][arm64] Support arm64e JIT'd code (initially enabled for MachO only).
Adds two new JITLink passes to create and populate a pointer-signing function
that can be called via an allocation-action attached to the LinkGraph:
* createEmptyPointerSigningFunction creates a pointer signing function in a
custome section, reserving sufficient space for the signing code. It should
be run as a post-prune pass (to ensure that memory is reserved prior to
allocation).
* lowerPointer64AuthEdgesToSigningFunction pass populates the signing function
by walking the graph, decoding the ptrauth info (encoded in the edge addend) and
writing an instruction sequence to sign all ptrauth fixup locations.
rdar://61956998
Commit: 922282eacfc054ddadbec04825d6573179e66200
https://github.com/llvm/llvm-project/commit/922282eacfc054ddadbec04825d6573179e66200
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
A clang/test/Sema/attr-target-version-unsupported.c
Log Message:
-----------
[TargetVersion] Only enable on RISC-V and AArch64 (#115991)
Address https://github.com/llvm/llvm-project/issues/115000.
This patch constrains the target_version feature to work only on RISC-V
and AArch64 to prevent crashes in Clang.
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 75b8f98ef69cc43289af4bddfa04e1cf90cc3d86
https://github.com/llvm/llvm-project/commit/75b8f98ef69cc43289af4bddfa04e1cf90cc3d86
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Change the comment to match the code execution. (#116022)
Make code execute like the comment will modify many tests and affect the
performance. As a result, we change the comment instead of the code.
Commit: c4be13cb9c81469060e2018f4e4673440772db03
https://github.com/llvm/llvm-project/commit/c4be13cb9c81469060e2018f4e4673440772db03
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
R clang/test/Sema/attr-target-version-unsupported.c
Log Message:
-----------
Revert "[TargetVersion] Only enable on RISC-V and AArch64" (#117110)
Reverts llvm/llvm-project#115991
Due to build fail
https://lab.llvm.org/buildbot/#/builders/66/builds/6511
Commit: 197fb270cc2f947bdde047d9aac65b653f4f6f26
https://github.com/llvm/llvm-project/commit/197fb270cc2f947bdde047d9aac65b653f4f6f26
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/materialize-vector-of-consts.ll
Log Message:
-----------
[AArch64][NFC] NFC for const vector as Instruction operand (#116790)
Current cost-modelling does not take into account cost of materializing
const vector. This results in some cases, as the test shows, being
vectorized but this may not always be profitable. Future patch will try
to address this issue.
Commit: 32913724acf9e02beed46999fee1424086b8c884
https://github.com/llvm/llvm-project/commit/32913724acf9e02beed46999fee1424086b8c884
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
Log Message:
-----------
[mlir][vector] Fix 0-d vector transfer mask inference (#116526)
When inferring the mask of a transfer operation that results in a single `i1` element,
we could represent it using either `vector<i1>` or vector<1xi1>. To avoid type mismatches,
this PR updates the mask inference logic to consistently generate `vector<1xi1>` for
these cases. We can enable 0-D masks if they are needed in the future.
See: https://github.com/llvm/llvm-project/issues/116197
Commit: 42775a44c9a6ba8dc03ad4c88fa9321e78ebd434
https://github.com/llvm/llvm-project/commit/42775a44c9a6ba8dc03ad4c88fa9321e78ebd434
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
Log Message:
-----------
[ControlHeightReduction] Add assert to avoid underflow (#116339)
`NumCHRedBranches - 1` is used later, we should add an assertion to make
sure it will not underflow.
Commit: dbe159b3f74ea41e16782fe5708756507d4a014f
https://github.com/llvm/llvm-project/commit/dbe159b3f74ea41e16782fe5708756507d4a014f
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/IR/BuiltinAttributes.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/Dialect/Affine/memref-stride-calculation.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/IR/invalid-builtin-types.mlir
Log Message:
-----------
[mlir] [IR] Allow zero strides in StridedLayoutAttr (#116463)
Disabling memrefs with a stride of 0 was intended to prevent internal
aliasing, but this does not address all cases : internal aliasing can
still occur when the stride is less than the shape.
On the other hand, a stride of 0 can be very useful in certain
scenarios. For example, in architectures that support multi-dimensional
DMA, we can use memref::copy with a stride of 0 to achieve a broadcast
effect.
This commit removes the restriction that strides in memrefs cannot be 0.
Commit: e9c561e93434a5d0cbc274b7efd73d6e252b6ba4
https://github.com/llvm/llvm-project/commit/e9c561e93434a5d0cbc274b7efd73d6e252b6ba4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
A llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll
Log Message:
-----------
[RISCV][GISel] Add atomic load/store test. Add additional atomic load/store isel patterns."
Commit: 476b208e0115e766605e9f850982996a1d51c287
https://github.com/llvm/llvm-project/commit/476b208e0115e766605e9f850982996a1d51c287
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix ToType/FromType diagnostic ordering (#116988)
We need to check the ToType first, then the FromType. Additionally,
remove qualifiers from the parent type of the field we're emitting a
note for.
Commit: 7c0786363e6b14e05a868cfe7614074cf742e7cc
https://github.com/llvm/llvm-project/commit/7c0786363e6b14e05a868cfe7614074cf742e7cc
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A compiler-rt/test/orc/TestCases/Darwin/Generic/trivial-cxx-constructor.cpp
Log Message:
-----------
[ORC-RT] Test basic C++ static initialization support in the ORC runtime.
This tests that a simple C++ static initializer works as expected.
Compared to the architecture specific, assembly level regression tests for the
ORC runtime; this test is expected to catch cases where the compiler adopts
some new MachO feature that the ORC runtime does not yet support (e.g. a new
initializer section).
Commit: a6fefc82450e054336a52a5d2d915b780b8c3ef7
https://github.com/llvm/llvm-project/commit/a6fefc82450e054336a52a5d2d915b780b8c3ef7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/logical-select.ll
Log Message:
-----------
[InstCombine] Convert logical and/or with `icmp samesign` into bitwise ops (#116983)
See the following case:
```
define i1 @test_logical_and_icmp_samesign(i8 %x) {
%cmp1 = icmp ne i8 %x, 9
%cmp2 = icmp samesign ult i8 %x, 11
%and = select i1 %cmp1, i1 %cmp2, i1 false
ret i1 %and
}
```
Currently we cannot convert this logical and into a bitwise and due to
the `samesign` flag. But if `%cmp2` evaluates to `poison`, we can infer
that `%cmp1` is either `poison` or `true` (`samesign` violation
indicates that X is negative). Therefore, `%and` still evaluates to
`poison`.
This patch converts a logical and into a bitwise and iff TV is poison
implies that Cond is either poison or true. Likewise, we convert a
logical or into a bitwise or iff FV is poison implies that Cond is
either poison or false.
Note:
1. This logic is implemented in InstCombine. Not sure whether it is
profitable to move it into ValueTracking and call `impliesPoison(TV/FV,
Sel)` instead.
2. We only handle the case that `ValAssumedPoison` is `icmp samesign
pred X, C1` and `V` is `icmp pred X, C2`. There are no suitable variants
for `isImpliedCondition` to pass the fact that X is [non-]negative.
Alive2: https://alive2.llvm.org/ce/z/eorFfa
Motivation: fix [a major
regression](https://github.com/dtcxzyw/llvm-opt-benchmark/pull/1724#discussion_r1849663863)
to unblock https://github.com/llvm/llvm-project/pull/112742.
Commit: 97b2903455fbe2de0c88cf07b92a09dc8cb7e699
https://github.com/llvm/llvm-project/commit/97b2903455fbe2de0c88cf07b92a09dc8cb7e699
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Log Message:
-----------
[NFCI][WPD]Use unique string saver to store type id (#106932)
Currently, both
[TypeIdMap](https://github.com/llvm/llvm-project/blob/67a1fdb014790a38a205d28e1748634de34471dd/llvm/include/llvm/IR/ModuleSummaryIndex.h#L1356)
and
[TypeIdCompatibleVtableMap](https://github.com/llvm/llvm-project/blob/67a1fdb014790a38a205d28e1748634de34471dd/llvm/include/llvm/IR/ModuleSummaryIndex.h#L1363)
keep type-id as `std::string` in the combined index for LTO indexing
analysis.
With this change, index uses a unique-string-saver to own the string
copies and two maps above can use string references to save some memory.
This shows a 3% memory reduction (from 8.2GiB to 7.9GiB) in an internal
binary with high indexing memory usage.
Commit: abb9f9fa06ef22be2b0287b9047d5cfed71d91d4
https://github.com/llvm/llvm-project/commit/abb9f9fa06ef22be2b0287b9047d5cfed71d91d4
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopInterchange/lcssa.ll
M llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43473-invalid-lcssa-phis-in-inner-exit.ll
M llvm/test/Transforms/LoopInterchange/pr43797-lcssa-for-multiple-outer-loop-blocks.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
M llvm/test/Transforms/LoopLoadElim/pr-48150.ll
M llvm/test/Transforms/LoopLoadElim/pr47457.ll
M llvm/test/Transforms/LoopPredication/predicate-exits.ll
M llvm/test/Transforms/LoopRotate/crash.ll
M llvm/test/Transforms/LoopRotate/multiple-exits.ll
M llvm/test/Transforms/LoopRotate/pr22337.ll
M llvm/test/Transforms/LoopRotate/pr33701.ll
M llvm/test/Transforms/LoopRotate/pr37205.ll
M llvm/test/Transforms/LoopRotate/preserve-loop-simplify.ll
M llvm/test/Transforms/LoopRotate/preserve-mssa.ll
M llvm/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll
M llvm/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll
M llvm/test/Transforms/LoopSimplify/dup-preds.ll
M llvm/test/Transforms/LoopSimplify/indirectbr.ll
M llvm/test/Transforms/LoopSimplify/notify-scev.ll
M llvm/test/Transforms/LoopSimplify/pr28272.ll
M llvm/test/Transforms/LoopSimplify/pr30454.ll
M llvm/test/Transforms/LoopSimplify/unreachable-loop-pred.ll
M llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
M llvm/test/Transforms/LoopSimplifyCFG/update_parents.ll
M llvm/test/Transforms/LoopStrengthReduce/2011-10-14-IntPtr.ll
M llvm/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll
M llvm/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/pr47329.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll
M llvm/test/Transforms/LoopStrengthReduce/ARM/addrec-is-loop-invariant.ll
M llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2009-11-10-LSRCrash.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/no_superflous_induction_vars.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/pr40514.ll
M llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting.ll
M llvm/test/Transforms/LoopStrengthReduce/dominate-assert.ll
M llvm/test/Transforms/LoopStrengthReduce/funclet.ll
M llvm/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll
M llvm/test/Transforms/LoopStrengthReduce/ivchain.ll
M llvm/test/Transforms/LoopStrengthReduce/nonintegral.ll
M llvm/test/Transforms/LoopStrengthReduce/pr12048.ll
M llvm/test/Transforms/LoopStrengthReduce/pr50765.ll
M llvm/test/Transforms/LoopStrengthReduce/scaling-factor-incompat-type.ll
M llvm/test/Transforms/LoopStrengthReduce/scaling_factor_cost_crash.ll
M llvm/test/Transforms/LoopStrengthReduce/scev-after-loopinstsimplify.ll
M llvm/test/Transforms/LoopStrengthReduce/scev-expander-lcssa.ll
M llvm/test/Transforms/LoopStrengthReduce/uglygep-address-space.ll
M llvm/test/Transforms/LoopStrengthReduce/uglygep.ll
M llvm/test/Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll
M llvm/test/Transforms/LoopUnroll/full-unroll-crashers.ll
M llvm/test/Transforms/LoopUnroll/pr10813.ll
M llvm/test/Transforms/LoopUnroll/pr14167.ll
M llvm/test/Transforms/LoopUnroll/pr27157.ll
M llvm/test/Transforms/LoopUnroll/pr28132.ll
M llvm/test/Transforms/LoopUnroll/rebuild_lcssa.ll
M llvm/test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll
M llvm/test/Transforms/LoopUnroll/unloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
M llvm/test/Transforms/LoopVectorize/X86/rauw-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-crash.ll
M llvm/test/Transforms/LoopVectorize/if-conv-crash.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/nsw-crash.ll
M llvm/test/Transforms/LoopVectorize/pr36311.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LowerConstantIntrinsics/stale-worklist-phi.ll
M llvm/test/Transforms/LowerSwitch/condition-phi-unreachable-default.ll
M llvm/test/Transforms/LowerSwitch/do-not-handle-impossible-values.ll
M llvm/test/Transforms/LowerSwitch/phi-in-dead-block.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#117112)
This PR removes tests with `br i1 undef` under
`llvm/tests/Transforms/Loop*, Lower*`.
Commit: 46f43b6d92e49b80df13e8a537a95767ffbaac9f
https://github.com/llvm/llvm-project/commit/46f43b6d92e49b80df13e8a537a95767ffbaac9f
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
Log Message:
-----------
[DebugInfo][InstrRef][MIR][GlobalIsel][MachineLICM] NFC Use std::move to avoid copying (#116935)
Commit: 6f76b2a3c010cd25acf4efb56cbde2a678b6242c
https://github.com/llvm/llvm-project/commit/6f76b2a3c010cd25acf4efb56cbde2a678b6242c
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/test/MC/ELF/relocation.s
Log Message:
-----------
[X86][MC] Add R_X86_64_CODE_4_GOTTPOFF (#116633)
For
mov name at GOTTPOFF(%rip), %reg
add name at GOTTPOFF(%rip), %reg
add
`R_X86_64_CODE_4_GOTTPOFF` = 44
if the instruction starts at 4 bytes before the relocation offset. It's
similar to R_X86_64_GOTTPOFF.
Linker can treat `R_X86_64_CODE_4_GOTTPOFF` as `R_X86_64_GOTTPOFF` or
convert the instructions above to
mov $name at tpoff, %reg
add $name at tpoff, %reg
if the first byte of the instruction at the relocation `offset - 4` is
`0xd5` (namely, encoded w/REX2 prefix) when possible.
Binutils patch:
https://github.com/bminor/binutils-gdb/commit/a533c8df598b5ef99c54a13e2b137c98b34b043c
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2023-December/131463.html
ABI discussion:
https://groups.google.com/g/x86-64-abi/c/ACwD-UQXVDs/m/vrgTenKyFwAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: ade0750e3529ee251cbfb60ce66904a8553381e4
https://github.com/llvm/llvm-project/commit/ade0750e3529ee251cbfb60ce66904a8553381e4
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
Log Message:
-----------
[AMDGPU] Fix some cache policy checks for GFX12+ (#116396)
Fix coding errors found by inspection and check that the swz bit still
serves to prevent merging of buffer loads/stores on GFX12+.
Commit: bc7f24cd8d6180ba297ea33ef5b4631a1bd26aea
https://github.com/llvm/llvm-project/commit/bc7f24cd8d6180ba297ea33ef5b4631a1bd26aea
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Basic/SourceManager.cpp
Log Message:
-----------
[clang] [NFC] Remove SourceLocation() parameter from Diag.Report() calls in SourceManager, and use the equivalent Report() overload instead (#116937)
Commit: 6377ae46a83e52fe1850a42ce8e1ee3e840243ba
https://github.com/llvm/llvm-project/commit/6377ae46a83e52fe1850a42ce8e1ee3e840243ba
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/test/CodeGen/LoongArch/code-models.ll
M llvm/test/CodeGen/LoongArch/expand-adjacency.ll
M llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/test/CodeGen/LoongArch/tls-models.ll
Log Message:
-----------
[LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model
This commit fixes an issue in the large code model where non-dso_local
function calls did not use the GOT as expected in PIC mode. Instead,
direct PC-relative access was incorrectly applied, leading to linker
errors when building shared libraries.
For `ExternalSymbol`, it is not possible to determine whether it is
dso_local during pseudo-instruction expansion. We use target flags to
differentiate whether GOT should be used.
Reviewed By: heiher, SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/117099
Commit: 458dfbd855806461b4508bf8845cafe0411dbfd4
https://github.com/llvm/llvm-project/commit/458dfbd855806461b4508bf8845cafe0411dbfd4
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/pr116483.ll
A llvm/test/Transforms/IndVarSimplify/pr116483.ll
Log Message:
-----------
[SCEV] Fix sext handling for `getConstantMultiple` (#117093)
Counterexample: 219 is a multiple of 73. But `sext i8 219 to i16 =
65499` is not.
Fixes https://github.com/llvm/llvm-project/issues/116483.
Commit: 4086ead63c7e0b56b3b07873117bb7ad7a02d41c
https://github.com/llvm/llvm-project/commit/4086ead63c7e0b56b3b07873117bb7ad7a02d41c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector] Add more tests for ConvertVectorToLLVM (10/n) (#117041)
Adds tests with scalable vectors for the Vector-To-LLVM conversion pass.
Covers the following Ops:
* `vector.maskedload`,
* `vector.maskedstore`,
* `vector.gather`,
* `vector.scatter`.
In addition:
* For consistency with other tests, renamed test function names
(e.g. `@masked_load_op` -> `@masked_load_op`)
* Made some test names more descriptive, e.g `@gather_op_2d` ->
`@gather_1d_from_2d`.
Commit: bbafe590880e6efb9e6b9e587d7dea7c19e7809b
https://github.com/llvm/llvm-project/commit/bbafe590880e6efb9e6b9e587d7dea7c19e7809b
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Headers/larchintrin.h
M clang/lib/Headers/lasxintrin.h
M clang/lib/Headers/lsxintrin.h
Log Message:
-----------
[LoongArch] Add conditional compilation for FP approximation intrinsics (#117132)
Introduce a check for `__loongarch_frecipe` macro around the FP
approximation intrinsic implementation. This ensures that these
intrinsics are only included when this macro is defined, providing
better flexibility and control over the usage of FP approximation
instructions.
Commit: a23260087db14032094d62dcf8be9be6f4e3d788
https://github.com/llvm/llvm-project/commit/a23260087db14032094d62dcf8be9be6f4e3d788
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/X86/vec-strict-cmp-512-skx.ll
Log Message:
-----------
[SDAG] [X86] Extend SplitVecOp_VSETCC for STRICT_FSETCCS (#116768)
Closes #116767
Commit: 00d383ee9d6fe66799bf9b242b59753d175d51cb
https://github.com/llvm/llvm-project/commit/00d383ee9d6fe66799bf9b242b59753d175d51cb
Author: Jonathan Cohen <jcohen22 at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Limit steps in shouldCombineToPostInc (#116030)
Currently the function will walk the entire DAG to find other candidates
to perform a post-inc store. This leads to very long compilation times
on large functions. Added a MaxSteps limit to avoid this, which is also
aligned to how hasPredecessorHelper is used elsewhere in the code.
Commit: eb48e1100a1f9dc26c6f2e56301c0a55394465c5
https://github.com/llvm/llvm-project/commit/eb48e1100a1f9dc26c6f2e56301c0a55394465c5
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
Log Message:
-----------
[ARM] Fix undefined behaviour in bf16->float conversion (#116985)
This was implementing the bf16->float conversion function using a
left-shift of a signed integer, so for negative floating-point values a
1 was being shifted into the sign bit of the signed integer intermediate
value. This is undefined behaviour, and was caught by UBSan.
The vector versions are code-generated via Neon builtin functions, so
probably don't have the same UB problem, but I've updated them anyway to
be consistent.
Fixes #61983.
Commit: ef102b4a6333a304e36dc623d5381257a7ef1ed6
https://github.com/llvm/llvm-project/commit/ef102b4a6333a304e36dc623d5381257a7ef1ed6
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
M llvm/test/CodeGen/Mips/lcb5.ll
Log Message:
-----------
[MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987)
The improvements in 63917e1 / #70796 do not check for memory
barriers/unmodelled sideeffects, which means we may incorrectly hoist
loads across memory barriers.
Fix this by checking any machine instruction in the loop is a load-fold
barrier.
PR: https://github.com/llvm/llvm-project/pull/116987
Commit: aaba8406c52f369898c7b43fbc7c782f939d38d5
https://github.com/llvm/llvm-project/commit/aaba8406c52f369898c7b43fbc7c782f939d38d5
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_neon_incl.td
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[NFC][Clang][AArch64]Refactor implementation of Neon vectors MFloat8… (#114804)
…x8 and MFloat8x16
This patch adds MFloat8 as a TypeFlag and Kind on Neon to generate the
typedefs using emitNeonTypeDefs.
It does not need any change in Clang, because SEMA and CodeGen use the
Builtins defined in AArch64SVEACLETypes.def
Commit: a7427410dd71072cbd1d44a6f78a08268b19a73b
https://github.com/llvm/llvm-project/commit/a7427410dd71072cbd1d44a6f78a08268b19a73b
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Analysis/CFG.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.noreturn/p1.cpp
M clang/test/SemaCXX/warn-missing-noreturn.cpp
Log Message:
-----------
[Clang] Handle `[[noreturn]]` constructors in CFG (#115558)
Fixes #63009.
Commit: 97ac84846a724809d28e167651b81355696d0d0b
https://github.com/llvm/llvm-project/commit/97ac84846a724809d28e167651b81355696d0d0b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-compare-all_of.ll
Log Message:
-----------
[X86] Add test coverage for #116977
Commit: 600a83bf9ba2bee5ed1e9867e201f7707b1d8102
https://github.com/llvm/llvm-project/commit/600a83bf9ba2bee5ed1e9867e201f7707b1d8102
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-compare-all_of.ll
Log Message:
-----------
[X86] IsNOT - match or(not(X),not(Y)) -> and(X,Y)
Fixes #116977
Commit: 5bdee35544eb21762857390014598748c64ad485
https://github.com/llvm/llvm-project/commit/5bdee35544eb21762857390014598748c64ad485
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[bazel] format utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Commit: 83c7784c35918ce037823f29d29918c5542cdf9c
https://github.com/llvm/llvm-project/commit/83c7784c35918ce037823f29d29918c5542cdf9c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/zero-call-used-regs.ll
Log Message:
-----------
[AArch64] Don't emit Neon in streaming[-compatible] functions with -fzero-call-used-regs (#116995)
Previously, with `-fzero-call-used-regs` clang/LLVM would incorrectly
emit Neon instructions in streaming functions, and streaming-compatible
functions without SVE.
With this change:
* In streaming functions, Z/p registers will be zeroed
* In streaming compatible functions w/o SVE, D registers will be zeroed
- (As Neon vector instructions are illegal including `movi v..`)
Commit: bdd10d9d249bd1c2a45e3de56a5accd97e953458
https://github.com/llvm/llvm-project/commit/bdd10d9d249bd1c2a45e3de56a5accd97e953458
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ToolingTest.cpp
Log Message:
-----------
[NFC] Explicitly pass a VFS when creating DiagnosticsEngine (#115852)
Starting with 41e3919ded78d8870f7c95e9181c7f7e29aa3cc4 DiagnosticsEngine
creation might perform IO. It was implicitly defaulting to
getRealFileSystem. This patch makes it explicit by pushing the decision
making to callers.
It uses ambient VFS if one is available, and keeps using
`getRealFileSystem` if there aren't any VFS.
Commit: 56c091ea7106507b36015297ee9005c9d5fab0bf
https://github.com/llvm/llvm-project/commit/56c091ea7106507b36015297ee9005c9d5fab0bf
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
M clang/test/CodeGenCXX/aarch64-sve-vector-conditional-op.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Bitcode/vscale-shuffle.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
M llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll
M llvm/test/Transforms/AggressiveInstCombine/vector-or-load.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/large-immediate.ll
M llvm/test/Transforms/ConstraintElimination/geps-ptrvector.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-insr.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sdiv.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/exp2-to-ldexp.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-vec.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
M llvm/test/Transforms/InstCombine/pow-to-ldexp.ll
M llvm/test/Transforms/InstCombine/pr83931.ll
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
M llvm/test/Transforms/InstCombine/scalable-select.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/udiv-simplify.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vscale_cmp.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale.ll
M llvm/test/Transforms/InstSimplify/cmp-vec-fast-path.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/vscale-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/vscale.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopIdiom/RISCV/byte-compare-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blend-any-of-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/MemCpyOpt/vscale-crashes.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
M llvm/test/Transforms/SCCP/no-fold-fcmp-dynamic-denormal-mode-issue114947.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
M llvm/test/Transforms/VectorCombine/pr88796.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856)
This brings the printing of scalable vector constant splats inline with
their fixed length counterparts.
Commit: 0b06301a1d839eb5f73559f6c3daf9049c34f3af
https://github.com/llvm/llvm-project/commit/0b06301a1d839eb5f73559f6c3daf9049c34f3af
Author: Nabeel Omer <nabeel.omer at sony.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/MC/X86/vinsertps_decode.s
Log Message:
-----------
[X86] Fix shuffle comment decoding for vinsertps immediate operand (#117009)
The relevant bit from the Intel SDM for vinsertps semantics:
```
IF (SRC = REG) THEN COUNT_S := imm8[7:6] ELSE COUNT_S := 0
```
This is now taken into account.
Commit: a1153cd6fedd4c906a9840987934ca4712e34cb2
https://github.com/llvm/llvm-project/commit/a1153cd6fedd4c906a9840987934ca4712e34cb2
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ToolingTest.cpp
Log Message:
-----------
Revert "[NFC] Explicitly pass a VFS when creating DiagnosticsEngine (#115852)"
Reverted for causing:
https://github.com/llvm/llvm-project/issues/117145
This reverts commit bdd10d9d249bd1c2a45e3de56a5accd97e953458.
Commit: af641ff260f01d6cf9f668e6edbe6a14646d059d
https://github.com/llvm/llvm-project/commit/af641ff260f01d6cf9f668e6edbe6a14646d059d
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/IR/ConstantFold.cpp
M llvm/test/Transforms/InstCombine/bitcast.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
Log Message:
-----------
[LLVM][IR] Refactor ConstantFold:FoldBitCast to fully support vector ConstantInt/FP. (#116787)
This fixes the code quality issue reported in
https://github.com/llvm/llvm-project/pull/111149.
Commit: 1425fa915dd4815e10b97373380e049db3a01cd3
https://github.com/llvm/llvm-project/commit/1425fa915dd4815e10b97373380e049db3a01cd3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Check FromPtr in BitCastPtr (#117142)
Commit: d7d6fb1804415b0f3e7f1cc9290bfb3d711cb707
https://github.com/llvm/llvm-project/commit/d7d6fb1804415b0f3e7f1cc9290bfb3d711cb707
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
Log Message:
-----------
[mlir][linalg][nfc] Update pack-dynamic-inner-tile.mlir (#116788)
Following on from #116373, updates "pack-dynamic-inner-tile.mlir" to use
TD Ops for all transformations except for lowering to LLVM.
This is an intermediate step before introducing vectorization.
Commit: 4872ecf1cc3cb9c4939a9e6210a9b9e9a9032e9f
https://github.com/llvm/llvm-project/commit/4872ecf1cc3cb9c4939a9e6210a9b9e9a9032e9f
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/test/Transforms/InstCombine/extractelement.ll
M llvm/test/Transforms/InstSimplify/extract-element.ll
Log Message:
-----------
[LLVM][IR] Teach extractelement folds about constant ConstantInt/FP. (#116793)
Commit: 2e60048641e86b7a414aec51d920bc4e1e3fbeb6
https://github.com/llvm/llvm-project/commit/2e60048641e86b7a414aec51d920bc4e1e3fbeb6
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-add.ll
Log Message:
-----------
[InstCombine] Fold zext(X) + C2 pred C -> X + C3 pred C4 (#110511)
Motivating case from
https://github.com/torvalds/linux/blob/9852d85ec9d492ebef56dc5f229416c925758edc/drivers/gpu/drm/drm_edid.c#L5238-L5240:
```
define i1 @src(i8 noundef %v13) {
entry:
%conv1 = zext i8 %v13 to i32
%add = add nsw i32 %conv1, -4
%cmp = icmp ult i32 %add, 3
%cmp4 = icmp slt i8 %v13, 4
%cond = select i1 %cmp4, i1 true, i1 %cmp
ret i1 %cond
}
define i1 @tgt(i8 noundef %v13) {
entry:
%cmp4 = icmp slt i8 %v13, 7
ret i1 %cmp4
}
```
Commit: ddb62d26cb988b6dfee545dcbd7412d297d9b99b
https://github.com/llvm/llvm-project/commit/ddb62d26cb988b6dfee545dcbd7412d297d9b99b
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in reduce `or` and `xor` function. (#116976)
Part of #51787.
Follow up of #116822.
This patch adds constexpr support for the built-in reduce `or` and `xor`
functions.
Commit: aa746495affb3ab94daafcbe09bfb229dd27429f
https://github.com/llvm/llvm-project/commit/aa746495affb3ab94daafcbe09bfb229dd27429f
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine] Remove unused variable in InstCombineCompares.cpp (NFC)
/llvm-project/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp:3190:14:
error: unused variable 'CmpBW' [-Werror,-Wunused-variable]
unsigned CmpBW = Ty->getScalarSizeInBits();
^
1 error generated.
Commit: 9cada109115ec67b573b988b5408b2caaaa2abf7
https://github.com/llvm/llvm-project/commit/9cada109115ec67b573b988b5408b2caaaa2abf7
Author: Abhina Sreeskantharajan <Abhina.Sreeskantharajan at ibm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/raw_ostream.cpp
Log Message:
-----------
[SystemZ][z/OS] Add back removed AutoConvert.h headers that were incorrectly identified as unused to fix a build error on z/OS
Commit: d23449d99c816b2d5b507f8d44f6e324e658e8bc
https://github.com/llvm/llvm-project/commit/d23449d99c816b2d5b507f8d44f6e324e658e8bc
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaCXX/cxx2b-warn-shadow.cpp
Log Message:
-----------
[Clang] Eliminate shadowing warnings for parameters of explicit object member functions (#114813)
Fixes #95707.
Commit: d800ea7cb12245f65f886e18545ba83355825246
https://github.com/llvm/llvm-project/commit/d800ea7cb12245f65f886e18545ba83355825246
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
Log Message:
-----------
Adjust MSVC disabled optimization pragmas to be _MSC_VER only (#116704)
Alter the #ifdef values from #110986 and #115292 to use _MSC_VER instead of _WIN32 to stop the pragmas being used on gcc/mingw builds
Noticed by @mstorsjo
Commit: df9a14d7bbf1180e4f1474254c9d7ed6bcb4ce55
https://github.com/llvm/llvm-project/commit/df9a14d7bbf1180e4f1474254c9d7ed6bcb4ce55
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ToolingTest.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
Log Message:
-----------
Reapply "[NFC] Explicitly pass a VFS when creating DiagnosticsEngine (#115852)"
This reverts commit a1153cd6fedd4c906a9840987934ca4712e34cb2 with fixes
to lldb breakages.
Fixes https://github.com/llvm/llvm-project/issues/117145.
Commit: cc70e12ebdacd09d5e4e124df81af6e9626be7d7
https://github.com/llvm/llvm-project/commit/cc70e12ebdacd09d5e4e124df81af6e9626be7d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/IR/Operator.cpp
M llvm/test/Transforms/InstCombine/gep-custom-dl.ll
Log Message:
-----------
[Operator] Truncate large type sizes in GEP calculations
If the size is larger than the index width, truncate it instead
of asserting.
Longer-term we should consider rejecting types larger than the
index size in the verifier, though this is probably tricky in
practice (it's address space dependent, and types are owned by
the context, not the module).
Fixes https://github.com/llvm/llvm-project/issues/116960.
Commit: 86fd4d4b5b95d58844e521cf7319965eea7d8d0b
https://github.com/llvm/llvm-project/commit/86fd4d4b5b95d58844e521cf7319965eea7d8d0b
Author: Yuxuan Chen <ych at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
A llvm/test/Transforms/Coroutines/gh114487-crash-in-cgscc-2.ll
Log Message:
-----------
[Coroutines] Fix another crash related to CallGraph update (#116756)
The previous fix
https://github.com/llvm/llvm-project/commit/c6414970d76ad79168fe7ec3c4400c5a5ca89d2d
failed to consider the fact that the call graph update doesn't make any
sense if the caller node hasn't been populated in the LazyCallGraph yet.
This patch changes to skip this CG update step when that happens.
Commit: 27923f7e1ab6fd2239835722f3cc2b6c7a46027c
https://github.com/llvm/llvm-project/commit/27923f7e1ab6fd2239835722f3cc2b6c7a46027c
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lld/ELF/Thunks.cpp
M lld/test/ELF/aarch64-thunk-bti-multipass.s
Log Message:
-----------
[LLD][AArch64][ARM] Delay adding long thunk mapping symbols (#116975)
When we create a thunk we don't know whether it will be short or long.
Move the emission of the long thunk mapping symbol to when we transition
to a long thunk. This improves disassembly and binary analysis as tools
like BOLT identify thunks by disassembly.
This removes a FIXME added in #108989 aarch64-thunk-bti-multipass.s
which had a corrupt disassembly due to missing mapping symbols.
Commit: 963b8e36bb3443ab858b83b65ec9c9723b263bd0
https://github.com/llvm/llvm-project/commit/963b8e36bb3443ab858b83b65ec9c9723b263bd0
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Add sched_yield interceptor (#117084)
This calls the system calls switch_pri and sys_ulock_wait. It also is
one of the more straightforwardly rt-unsafe, in that it gives up this
thread's timeslice.
Commit: 595e484c0808f2410fa7f1ac4d630c1871c447fb
https://github.com/llvm/llvm-project/commit/595e484c0808f2410fa7f1ac4d630c1871c447fb
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_flags.inc
M compiler-rt/test/rtsan/deduplicate_errors.cpp
Log Message:
-----------
[rtsan] Add option to allow printing of duplicate stacks (suppress_equal_stacks) (#117069)
Following the example of tsan, where we took the name
This would allow users to determine if they want to see ALL output from
rtsan.
Additionally, remove the UNLIKELY hint, as it is now up to the flag whether or
not it is likely that we go through this conditional.
Commit: a12e79a85fc18d535c58f2c82d2b2e80586e43d7
https://github.com/llvm/llvm-project/commit/a12e79a85fc18d535c58f2c82d2b2e80586e43d7
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/RealtimeSanitizer.rst
Log Message:
-----------
[rtsan] NFC: Update docs with customizable functions (#117086)
Commit: 95f4aa44ae660c649560fd32868fef14d7925551
https://github.com/llvm/llvm-project/commit/95f4aa44ae660c649560fd32868fef14d7925551
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Add assert to ensure correct state restoration in CallBI function (#115496)
This commit adds an assert statement to the CallBI function to ensure
that the interpreter state (S.Current) is correctly reset to the
previous frame (FrameBefore) after InterpretBuiltin returns true. This
helps catch any potential issues during development and debugging.
Commit: d6fc7d3ab186fee1c95c00992206e0914cb25f42
https://github.com/llvm/llvm-project/commit/d6fc7d3ab186fee1c95c00992206e0914cb25f42
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/src/string/string_utils.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__cxx03/__chrono/formatter.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/tools/llvm-objcopy/ELF/Inputs/ihex-elf-segments.yaml
Log Message:
-----------
Fix typo "intead"
Commit: 685e41e7774386b78c9527ebf70d3552aef383d7
https://github.com/llvm/llvm-project/commit/685e41e7774386b78c9527ebf70d3552aef383d7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
Log Message:
-----------
[clang][ExprConst] Reject field access with nullptr base (#113885)
Reject them if the base is null, not only if the entire pointer is null.
Fixes #113821
Commit: 8bfa87cadffd0e2148fa6bb500dd48777cc631f2
https://github.com/llvm/llvm-project/commit/8bfa87cadffd0e2148fa6bb500dd48777cc631f2
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Release note lldb completion improvements (#117058)
Commit: e8b5c009b68715434bcd4942bab08ca4b0a5abbb
https://github.com/llvm/llvm-project/commit/e8b5c009b68715434bcd4942bab08ca4b0a5abbb
Author: Christopher McGirr <7071833+chrsmcgrr at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
Log Message:
-----------
[mlir][spirv]: Add Broadcom Vendor (#116600)
This PR is simply adding the Broadcom vendor ID to the SPIRV list. In
order to enable the use of this vendor ID in a SPIRV pipeline for the
Videocore GPUs.
Commit: 7b61ff2c263b7122c23783385662f6ff67764352
https://github.com/llvm/llvm-project/commit/7b61ff2c263b7122c23783385662f6ff67764352
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaExprMember.cpp
Log Message:
-----------
[Clang] Prevent null dereferences (#115502)
This commit addresses several Static Analyzer issues related to
potential null dereference by replacing dyn_cast<> with cast<> and
getAs<> with castAs<> in various parts of the codes.
The cast function asserts that the cast is valid, ensuring that the
pointer is not null and preventing null dereference errors.
The changes are made in the following files:
CGBuiltin.cpp: Ensure vector types have exactly 3 elements.
CGExpr.cpp: Ensure member declarations are field declarations.
AnalysisBasedWarnings.cpp: Ensure operations are member expressions.
SemaExprMember.cpp: Ensure base types are extended vector types.
These changes ensure that the types are correctly cast and prevent
potential null dereference issues, improving the robustness and safety
of the code.
Commit: 0cb1cca055596f87a101c488b3aeb26797296851
https://github.com/llvm/llvm-project/commit/0cb1cca055596f87a101c488b3aeb26797296851
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
Log Message:
-----------
[XCore] Use getSignedConstant()
Commit: 5d32a1409df0df39357557df0363196eba08f0fc
https://github.com/llvm/llvm-project/commit/5d32a1409df0df39357557df0363196eba08f0fc
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMRegisterInfo.td
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fp16-instructions.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
Log Message:
-----------
Revert "[ARM] Stop gluing FP comparisons to FMSTAT" (#117175)
Reverts llvm/llvm-project#116676
Reverting per post-commit feedback (causes miscompilation errors and/or
assertion failures).
Commit: 5889f6845d181348b83a5c18e517192ffdbd6fd0
https://github.com/llvm/llvm-project/commit/5889f6845d181348b83a5c18e517192ffdbd6fd0
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[NFC][SPIRV] Cleanup selectOpWithSrc functions (#117077)
As a follow up request from
https://github.com/llvm/llvm-project/pull/111082#discussion_r1811132876
the following non functional changes have been make
- `selectNAryOpWithSrcs` has been renamed to `selectOpWithSrcs`
- Calls to `selectUnOpWithSrc` have been replaced with
`selectOpWithSrcs`
- `selectUnOpWithSrc` has been deleted
Commit: 4b5a8d6835897477873242ef1ee529d00dedd9a1
https://github.com/llvm/llvm-project/commit/4b5a8d6835897477873242ef1ee529d00dedd9a1
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/include/lldb/Utility/CompletionRequest.h
Log Message:
-----------
[lldb] Make sure completions don't end with newlines (#117054)
The logic that prints completions and their descriptions assumes neither
the completion itself nor the description ends with a newline. I
considered making this an assert, but decided against it as completions
can indirectly come from user input (e.g. oddly crafted names). Instead,
avoid the potential for mistakes by defensively stripping them.
Commit: 32da1fd8c7d45d5209c6c781910c51940779ec52
https://github.com/llvm/llvm-project/commit/32da1fd8c7d45d5209c6c781910c51940779ec52
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vop3 mc test with update script (#116859)
This is a NFC change. Update gfx11/gfx12 vop3 test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 915d588b1a4762685b788020beadcd7aad5f50a0
https://github.com/llvm/llvm-project/commit/915d588b1a4762685b788020beadcd7aad5f50a0
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
Reapply "[lldb] Convert file address to load address when reading memory for DW_OP_piece" (#117168)
This commit fixes the test so that the breakpoint is triggered correctly
after `array` usage on AArch64.
Reapplies #116411 with a fix.
Commit: 9424f3dcc5a3f1dada99831b87b0b502a7667d48
https://github.com/llvm/llvm-project/commit/9424f3dcc5a3f1dada99831b87b0b502a7667d48
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
A llvm/test/Transforms/InstCombine/fold-aggregate-reconstruction.ll
M llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll
M llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
Log Message:
-----------
[InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (#100828)
Function foldAggregateConstructionIntoAggregateReuse can fold
insertvalue(phi(extractvalue(src1), extractvalue(src2)))
into
phi(src1, src2)
when we can find source aggregates in all predecessors.
This patch extends it to handle following case
insertvalue(phi(extractvalue(src1), elm2))
into
phi(src1, insertvalue(elm2))
with the condition that the predecessor without source aggregate has
only one successor.
Commit: d936c0cef0bddc577c9615ac46537413b92b19ee
https://github.com/llvm/llvm-project/commit/d936c0cef0bddc577c9615ac46537413b92b19ee
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[Clang] [OMPIRBuilder] Prevent Null Pointer Dereference in OpenMP IR Builder (#115506)
This commit addresses Static Analyzer issues related to potential null
dereference by replacing dyn_cast<> with cast<> in OMPIRBuilder.cpp to
ensure that ArgStructType is not null before it is used, improving the
stability and reliability of the code.
Commit: 3535ea0ba6c6fda69acaf215d7e9e93045466b50
https://github.com/llvm/llvm-project/commit/3535ea0ba6c6fda69acaf215d7e9e93045466b50
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libcxx/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
[libc++] Fix linking benchmarks (#116495)
On my system the library path ends with `lib64` instead of `lib`.
Commit: 68ca2ae81be374c4c40a5e502222f4e99cc3cc9f
https://github.com/llvm/llvm-project/commit/68ca2ae81be374c4c40a5e502222f4e99cc3cc9f
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vop2 mc test with update script (#116860)
This is a NFC change. Update gfx11/gfx12 vop2 test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 002adfa46ec8b2379884c6bc113fd5d742a5cc7a
https://github.com/llvm/llvm-project/commit/002adfa46ec8b2379884c6bc113fd5d742a5cc7a
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vopc mc test with update script (#116873)
This is a NFC change. Update gfx11/gfx12 vopc test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 01c9a14ccf98dba257bb36d9e9242b0bf5cdcaf2
https://github.com/llvm/llvm-project/commit/01c9a14ccf98dba257bb36d9e9242b0bf5cdcaf2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx950_vop3px2.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)
These use a new VOP3PX encoding for the v_mfma_scale_* instructions,
which bundles the pre-scale v_mfma_ld_scale_b32. None of the modifiers
are supported yet (op_sel, neg or clamp).
I'm not sure the intrinsic should really expose op_sel (or any of the
others). If I'm reading the documentation correctly, we should be able
to just have the raw scale operands and auto-match op_sel to byte
extract patterns.
The op_sel syntax also seems extra horrible in this usage, especially with the
usual assumed op_sel_hi=-1 behavior.
Commit: a4f835c520fcf8c6df8be96fad931fc6f4a2b1e4
https://github.com/llvm/llvm-project/commit/a4f835c520fcf8c6df8be96fad931fc6f4a2b1e4
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Fix uninitialized pointer field. (#117173)
Non-static class member `PP` is not initialized in this constructor nor
in any functions that it calls.
Commit: 8f1d1e3cd3fd8cb13512a94af6b2a56dfd807f1e
https://github.com/llvm/llvm-project/commit/8f1d1e3cd3fd8cb13512a94af6b2a56dfd807f1e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
Log Message:
-----------
AMDGPU: Optimize mfma_scale intrinsics with 0 inputs (#116724)
We can use the unscaled form of the instruction if we know the scale
factors are both 0.
Commit: 76b24640e5dc5716f6fac8ef80dac18757753113
https://github.com/llvm/llvm-project/commit/76b24640e5dc5716f6fac8ef80dac18757753113
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_i32_16x16x64_i8 for gfx950 (#116728)
Commit: 0a6e8741ddb4ed8cfb4bf92df863665197be2ccc
https://github.com/llvm/llvm-project/commit/0a6e8741ddb4ed8cfb4bf92df863665197be2ccc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
A llvm/test/Transforms/InstCombine/AMDGPU/mfma-scale.ll
Log Message:
-----------
AMDGPU: Shrink used number of registers for mfma scale based on format (#117047)
Currently the builtins assume you are using an 8-bit format that requires
an 8 element vector. We can shrink the number of registers if the format
requires 4 or 6.
Commit: f4ed79b160cbd2ec537304f095a62750078a0254
https://github.com/llvm/llvm-project/commit/f4ed79b160cbd2ec537304f095a62750078a0254
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_i32_32x32x32_i8 for gfx950 (#117052)
Commit: 7f19b1e49c172772390a3c2e71631115da80af4b
https://github.com/llvm/llvm-project/commit/7f19b1e49c172772390a3c2e71631115da80af4b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/Transforms/LICM/hoist-metadata.ll
Log Message:
-----------
[LICM] Add test showing incorrectly setting alasing metadata.
The new test illustrates a case where LICM introduces UB-implying
metadata on speculated loads that may not execute in the original
version.
The aliasing metadata behavior has been clarified in
https://github.com/llvm/llvm-project/pull/116220.
Commit: 6f68d039a5bdf11f6d7c84bed8d5a0da5950daef
https://github.com/llvm/llvm-project/commit/6f68d039a5bdf11f6d7c84bed8d5a0da5950daef
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
M llvm/test/Transforms/GVN/PRE/rle.ll
Log Message:
-----------
[MemDepAnalysis] Don't reuse NonLocalPointerDeps cache if memory location size differs (#116936)
As seen in #111585, we can end up using a previous cache entry where the
size was too large and was UB.
Compile time impact:
https://llvm-compile-time-tracker.com/compare.php?from=6a863f7e2679a60f2f38ae6a920d0b6e1a2c1690&to=faccf4e1f47fcd5360a438de2a56d02b770ad498&stat=instructions:u.
Fixes #111585.
Commit: 0ac889b6b0bd467cf1ecbc26e80959badcdd5b55
https://github.com/llvm/llvm-project/commit/0ac889b6b0bd467cf1ecbc26e80959badcdd5b55
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][Affine] Extend linearize/delinearize cancelation to partial tails (#116872)
xisting patterns would cancel out the linearize_index /
delinearize_index pairs that had the exact same basis, like
%0 = affine.linearize_index [%w, %x, %y, %z] by (X, Y, Z) : index
%1:4 = affine.delinearize_index %0 into (W, X, Y, Z) : index, ...
This commit extends the canonicalization to handle instances where the
entire basis doesn't match, as in
%0 = affine.linearize_index [%w, %x, %y, %z] by (X, Y, Z) : index
%1:3 = affine.delinearize_index %0 into (XY, Y, Z) : index, ...
where we can replace the last two results of the delinearize_index
operation with the last two inputs of the linearize_index, creating a
more canonical (fewer total computations to perform) result.
Commit: 9e8200c7184431e0dd0e235b70cabfbe8bfe351d
https://github.com/llvm/llvm-project/commit/9e8200c7184431e0dd0e235b70cabfbe8bfe351d
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/include/mlir/Dialect/Affine/Passes.h
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
A mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOpsAsAffine.cpp
M mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
A mlir/test/Dialect/Affine/affine-expand-index-ops-as-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
Log Message:
-----------
[mlir][Affine] Expand affine.[de]linearize_index without affine maps (#116703)
As the documentation for -affine-expand-index-ops says,
affine.delinearize_index and affine.linearize_index don't need to be
expanded into the affine dialect.
Expanding these operations into affine.apply operations can introduce
unwanted "simplifications", mainly translations of `(dN mod C + ...)` to
`(dN + ... - (dN floordiv C) * C)` and similar, which create worse
generated code. This commit resolves this issue by expanding out
affine.delanierize_index directly.
In addition, the lowering of affine.linearize_index now sorts the
operands by loop-independence, allowing an increased amount of
loop-invariant code motion after lowering.
The old behavior is preserved as -expand-affine-index-ops-as-affine but
is no longer the default
Commit: cdd1e27124b7b0d768a4d68a098f4660e289dc65
https://github.com/llvm/llvm-project/commit/cdd1e27124b7b0d768a4d68a098f4660e289dc65
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86][RISCV] Don't emit JumpTableDebugInfo unless triple is OSBinFormatCOFF. (#117083)
This makes the override in RISCV and X86 consistent with the base class
implementation of expandIndirectJTBranch.
Commit: 6735c5ebd414b4f0a28dfc6549187c06c67c1e32
https://github.com/llvm/llvm-project/commit/6735c5ebd414b4f0a28dfc6549187c06c67c1e32
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
A clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/DirectX/WaveActiveAnyTrue.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll
Log Message:
-----------
[HLSL] Implement WaveActiveAnyTrue intrinsic (#115902)
Resolves https://github.com/llvm/llvm-project/issues/99160
- [x] Implement `WaveActiveAnyTrue` clang builtin,
- [x] Link `WaveActiveAnyTrue` clang builtin with `hlsl_intrinsics.h`
- [x] Add sema checks for `WaveActiveAnyTrue` to
`CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [x] Add codegen for `WaveActiveAnyTrue` to `EmitHLSLBuiltinExpr` in
`CGBuiltin.cpp`
- [x] Add codegen tests to
`clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl`
- [x] Add sema tests to
`clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl`
- [x] Create the `int_dx_WaveActiveAnyTrue` intrinsic in
`IntrinsicsDirectX.td`
- [x] Create the `DXILOpMapping` of `int_dx_WaveActiveAnyTrue` to `113`
in `DXIL.td`
- [x] Create the `WaveActiveAnyTrue.ll` and
`WaveActiveAnyTrue_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [x] Create the `int_spv_WaveActiveAnyTrue` intrinsic in
`IntrinsicsSPIRV.td`
- [x] In SPIRVInstructionSelector.cpp create the `WaveActiveAnyTrue`
lowering and map it to `int_spv_WaveActiveAnyTrue` in
`SPIRVInstructionSelector::selectIntrinsic`.
- [x] Create SPIR-V backend test case in
`llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll`
---------
Co-authored-by: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Co-authored-by: Greg Roth <grroth at microsoft.com>
Commit: 9b43078e4c4da6b17b25c18945639c9232ef68c0
https://github.com/llvm/llvm-project/commit/9b43078e4c4da6b17b25c18945639c9232ef68c0
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
Log Message:
-----------
[SPIR-V] Extend support for __spirv_ builtins (#117190)
This PR extends support for `__spirv_` builtins by adding missed
builtins (`GroupNonUniformBroadcast*`) and supporting more "_R<type>"
builtins.
Commit: 58c8d73172a13d750c80ca0ef6849e52a0993e8d
https://github.com/llvm/llvm-project/commit/58c8d73172a13d750c80ca0ef6849e52a0993e8d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/horizontal-list.ll
Log Message:
-----------
[SLP][NFC]Add a test with multi reductions, NFC
Commit: cec52960fdc8eeecab340ffe4cd12f8a8c43bd3b
https://github.com/llvm/llvm-project/commit/cec52960fdc8eeecab340ffe4cd12f8a8c43bd3b
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/TableGen/InstrDocsEmitter.cpp
Log Message:
-----------
[TableGen] Use `const auto&` instead of `auto` to avoid copy (#113053)
Commit: b22c3c1e88ad5be4ef9ee70ac6517620e1441336
https://github.com/llvm/llvm-project/commit/b22c3c1e88ad5be4ef9ee70ac6517620e1441336
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
M llvm/lib/SandboxIR/Region.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
Register callbacks in Region for instruction creation/deletion. (#117088)
This will keep the current Region updated when region passes add/delete
instructions.
Commit: 391bf068f2c124e98e18bbc027f4cfc6f0b413d6
https://github.com/llvm/llvm-project/commit/391bf068f2c124e98e18bbc027f4cfc6f0b413d6
Author: AdityaK <hiraditya at msn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
M llvm/test/LTO/X86/codemodel-3.ll
M llvm/test/LTO/X86/largedatathreshold-3.ll
M llvm/test/Linker/module-flags-6-a.ll
M llvm/test/Transforms/FunctionImport/module-flags.ll
Log Message:
-----------
[LTO] Print conflicting operands between Src and Dest modules (#115104)
The current error message doesn't give sufficient details to help with
debugging. This patch will log the operand values that are conflicting.
After this patch the output is of the form:
```
'Large Data Threshold': IDs have conflicting values: 'i32 101' from /usr/local/home/llvm-project/build/test/LTO/X86/Output/largedatathreshold-3.ll.tmp1.o, and 'i32 100' from ld-temp.o
```
Commit: 667e1fadcf4376ce41f5cae7cabab9f5ccc77b15
https://github.com/llvm/llvm-project/commit/667e1fadcf4376ce41f5cae7cabab9f5ccc77b15
Author: Josh Stone <jistone at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
A compiler-rt/test/profile/Linux/binary-id-offset.c
Log Message:
-----------
[profile] Use base+vaddr for `__llvm_write_binary_ids` note pointers (#114907)
This function is always examining its own ELF headers in memory, but it
was trying to use conditions between examining files or memory, and it
wasn't accounting for LOAD offsets at runtime. This is especially bad if
a loaded segment has additional padding that's not in the file offsets.
Now we do a first scan of the program headers to figure out the runtime
base address based on `PT_PHDR` and/or `PT_DYNAMIC` (else assume zero),
similar to libc's `do_start`. Then each `PT_NOTE` pointer is simply the
base plus the segments's `pt_vaddr`, which includes LOAD offsets.
Fixes #114605
Commit: 0298c5921d3b9fbeb5fefc2555321ea82ade6090
https://github.com/llvm/llvm-project/commit/0298c5921d3b9fbeb5fefc2555321ea82ade6090
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))
Currently sequences reduction_add(ext(<n x i1>)) are modeled as vector
extensions + reduction add, but later instcombiner transforms it into
ext(ctcpop(bitcast <n x i1> to int n)). Patch adds direct support for
this in SLP vectorizer, which enables better cost estimation.
AVX512, -O3+LTO
CINT2006/445.gobmk - extra vector code
Prolangs-C/bison - extra vector code
Benchmarks/NPB-serial/is - 16 x + 8 x reductions vectorized as 24
x reduction
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/116875
Commit: f881a3815a6b58afa64277eee0bb6b91a4dde103
https://github.com/llvm/llvm-project/commit/f881a3815a6b58afa64277eee0bb6b91a4dde103
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[CodeGen] Fix a warning
This patch fixes:
clang/lib/CodeGen/CGBuiltin.cpp:19287:17: error: unused variable
'Ty' [-Werror,-Wunused-variable]
Commit: a76609dd72743c0d678504042b00d434e6cebe1a
https://github.com/llvm/llvm-project/commit/a76609dd72743c0d678504042b00d434e6cebe1a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/CUFCommon.h
M flang/lib/Optimizer/Transforms/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
A flang/test/Fir/CUDA/cuda-device-context.mlir
Log Message:
-----------
[flang][cuda] Avoid intrinsics simplification in device context (#117026)
Commit: 3f594741cf8e1537fb25f84ef3cf2245b08d8089
https://github.com/llvm/llvm-project/commit/3f594741cf8e1537fb25f84ef3cf2245b08d8089
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/runtime/sum.cpp
Log Message:
-----------
[flang] Fix implementation of Kahan summation (#116897)
In the runtime's implementation of floating-point SUM, the
implementation of Kahan's algorithm for increased precision is
incorrect. The running correction factor should be subtracted from each
new data item, not added to it. This fix ensures that the sum of 100M
random default real values between 0. and 1. is close to 5.E7.
See https://en.wikipedia.org/wiki/Kahan_summation_algorithm.
Commit: be6bc6a1e5beb84984b8e1419393c80a3fe2d3d8
https://github.com/llvm/llvm-project/commit/be6bc6a1e5beb84984b8e1419393c80a3fe2d3d8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/docs/ParserCombinators.md
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/type-parsers.h
A flang/test/Parser/recovery07.f90
Log Message:
-----------
[flang] Better recovery from errors in a loop control (#117025)
When there's an error in a DO statement loop control, error recovery
isn't great. A bare "DO" is a valid statement, so a failure to parse its
loop control doesn't fail on the whole statement. Its partial parse ends
after the keyword, and as some other statement parsers can get further
into the input before failing, errors in the loop control can lead to
confusing error messages about bad pointer assignment statements and
others. So just check that a bare "DO" is followed by the end of the
statement.
Commit: bde2f39ae076c893d881d73b0d9c4ef4ea89c853
https://github.com/llvm/llvm-project/commit/bde2f39ae076c893d881d73b0d9c4ef4ea89c853
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/pp046.F
Log Message:
-----------
[flang] Don't check fixed form label field too early (#117040)
When a fixed form source line begins with the name of a macro, don't
emit the usual warning message about a non-decimal character in the
label field. (The check for a macro was only being applied to free form
source lines, and the label field checking was unconditional).
Fixes https://github.com/llvm/llvm-project/issues/116914.
Commit: bb23ac65a1e25747231a10240e78c7ce336602bf
https://github.com/llvm/llvm-project/commit/bb23ac65a1e25747231a10240e78c7ce336602bf
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/not-an-exponent.F90
Log Message:
-----------
[flang] Don't tokenize an exponent that isn't one (#117061)
The character 'e' or 'd' (either case) shouldn't be tokenized as part of
a real literal during preprocessing if it is not followed by an
optionally-signed digit string. Doing so prevents it from being
recognized as a macro name, or as the start of one.
Fixes https://github.com/llvm/llvm-project/issues/115676.
Commit: 84b70869e6227720e93aad35bd184a8742c94d82
https://github.com/llvm/llvm-project/commit/84b70869e6227720e93aad35bd184a8742c94d82
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/RealtimeSanitizer.rst
Log Message:
-----------
[rtsan] NFC: Update docs with suppress_equal_stacks (#117187)
Commit: 040f1c78117f9ec90d951f7560198ec9b2fcaf65
https://github.com/llvm/llvm-project/commit/040f1c78117f9ec90d951f7560198ec9b2fcaf65
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/collect_and_build_with_pgo.py
Log Message:
-----------
[llvm] Update pgo collection script to reflect Mainainers file (#117197)
The collect_and_build_with_pgo.py script used CODE_OWNERS.TXT as part of
its heuristic, but now that its gone, the script will fail to recognize
an LLVM checkout.
Commit: 0165f8817cbda4dc6a83db0d2994f7ece12726ff
https://github.com/llvm/llvm-project/commit/0165f8817cbda4dc6a83db0d2994f7ece12726ff
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvknhb.s
Log Message:
-----------
[RISCV] Fix the worst case for VSHA2MS in SiFive P400/P600 scheduling models (#116893)
For each RVV instruction we should have a single WriteRes assignment to
the worst case scheduling class. This assignment is usually equal to
that of the largest LMUL + smallest SEW. My #114317 accidentally made
two of these assignments on `WriteVSHA2MSV_WorstCase`. This won't affect
our MachineScheduler nor most of our llvm-mca use cases (assuming you
populate the correct LMUL and SEW), yet it's not ideal either.
This patch fixes this issue by assigning the correct numbers and
resource mapping to `WriteVSHA2MSV_WorstCase`, which is equal to that of
largest LMUL + _largest_ SEW (Zvknh's scheduling properties are
special). I also added a MCA test to make sure we always pick up the
correct worst case numbers for P600's scheduling model.
Original issue was reported by @reidtatge
Commit: f7497b10f7face081cc5ae2528276d919a5c6ca2
https://github.com/llvm/llvm-project/commit/f7497b10f7face081cc5ae2528276d919a5c6ca2
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia][CMake] Enable new libc header gen (#116938)
All issues blocking this were resolved.
Commit: 8663b8777e8108f74f91a2a33115b3a00d57c043
https://github.com/llvm/llvm-project/commit/8663b8777e8108f74f91a2a33115b3a00d57c043
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[NFC][VectorUtils][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (#114849)
This changes allows target intrinsics to specify and overwrite overloaded types.
- Updates `ReplaceWithVecLib` to not provide TTI as there most probably won't be a use-case
- Updates `SLPVectorizer` to use available TTI
- Updates `VPTransformState` to pass down TTI
- Updates `VPlanRecipe` to use passed-down TTI
This change will let us add scalarization for `asdouble`: #114847
Commit: a3e2f0acdf5ee452c8eb177b56f476b432539e08
https://github.com/llvm/llvm-project/commit/a3e2f0acdf5ee452c8eb177b56f476b432539e08
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
Log Message:
-----------
[lldb] Fix a regression in Status::GetErrorType() (#117095)
The refactored code did not correctly determine the type of expression
errors.
rdar://139699028
Commit: 29afbd5893fbf68a2b64321bee0c82233b8b852e
https://github.com/llvm/llvm-project/commit/29afbd5893fbf68a2b64321bee0c82233b8b852e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/combine-ctpop-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
Log Message:
-----------
[RISCV] Add DAG combine to convert (iX ctpop (bitcast (vXi1 A))) into vcpop.m. (#117062)
This only handles the simplest case where vXi1 is a legal vector type.
If the vector type isn't legal we need to go through type legalization,
but the pattern gets much harder to recognize after that. Either because
ctpop gets expanded due to Zbb not being enabled, or the bitcast
becoming a bitcast+extractelt, or the ctpop being split into multiple
ctpops and adds, etc.
Commit: 4fc1141e7650901b34cc8eec0c770e9015204087
https://github.com/llvm/llvm-project/commit/4fc1141e7650901b34cc8eec0c770e9015204087
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Parser/OpenMP/defaultmap-unparse.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
Log Message:
-----------
[flang][OpenMP] Apply modifier representation to semantic checks (#116658)
Also, define helper macros in parse-tree.h.
Apply the new modifier representation to the DEFAULTMAP and REDUCTION
clauses, with testcases utilizing the new modifier validation.
OpenMP modifier overhaul: #3/3
Commit: 30df65949598f298b508d5d32688e901c6f66a57
https://github.com/llvm/llvm-project/commit/30df65949598f298b508d5d32688e901c6f66a57
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Log Message:
-----------
[GlobalISel] Correct comment about type vs register class (#116083)
Type and register class aren't mutually exclusive in gMIR but there's also
no target-independent requirement (yet?) to have both on target instructions.
Commit: 51cdf1f6627ae369cbe15e50861806842e39a013
https://github.com/llvm/llvm-project/commit/51cdf1f6627ae369cbe15e50861806842e39a013
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] Skip MemProfUsePass on the empty module (#117210)
This patch teaches the MemProfUsePass to return immediately on
the empty module.
Aside from saving time to deserialize the MemProf profile, this patch
ensures that we can obtain TLI like so:
TargetLibraryInfo &TLI =
FAM.getResult<TargetLibraryAnalysis>(*M.begin());
when we undrift the MemProf profile in near future.
Commit: b05600d96f46697e21f6b1b7ad901391326243a8
https://github.com/llvm/llvm-project/commit/b05600d96f46697e21f6b1b7ad901391326243a8
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Reapply "[libc] Use best-fit binary trie to make malloc logarithmic" (#117065)
- Fix assertion expressions.
- Fix incorrect small size in freestore_test.
- There may only be one small size for high alignment and small
pointers (riscv32).
- Don't rely on stack alignment in FreeList test.
Commit: 505e049aa078c8961f00cacefc3983398a46fb04
https://github.com/llvm/llvm-project/commit/505e049aa078c8961f00cacefc3983398a46fb04
Author: Raul Tambre <raul at tambre.ee>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M cmake/Modules/CMakePolicy.cmake
Log Message:
-----------
[CMake] Enable CMP0179 alongside CMP0156 for deduplication on LLD (#116497)
LLD has a bug regarding ordering of static link libraries in the ELF backend, which has been reported as #116669.
CMake 3.31.0 started properly deduplicating static libraries for LLD causing the following linking failure for `libclang-cpp.so` with `-DLLVM_LINK_LLVM_DYLIB=ON`:
```
ld.lld: error: undefined symbol: llvm::omp::getOpenMPClauseName(llvm::omp::Clause)
>>> referenced by OpenMPKinds.cpp
>>> tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/OpenMPKinds.cpp.o:(clang::getOpenMPSimpleClauseTypeName(llvm::omp::Clause, unsigned int))
>>> referenced by SemaOpenMP.cpp
>>> tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaOpenMP.cpp.o:(clang::SemaOpenMP::CheckOMPRequiresDecl(clang::SourceLocation, llvm::ArrayRef<clang::OMPClause*>))
>>> referenced by SemaOpenMP.cpp
>>> tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaOpenMP.cpp.o:(clang::SemaOpenMP::CheckOMPRequiresDecl(clang::SourceLocation, llvm::ArrayRef<clang::OMPClause*>))
>>> referenced 166 more times
[tons more]
```
CMake 3.31 also introduced CMP0179, which builds on CMP0156 and makes the deduplication consistent across platforms.
By coincidence this works around the above LLD deficiency and is the fix that CMake 3.31.1 will implement.
However, the fix is to ignore CMP0156 unless CMP0179 is also enabled, i.e. no more deduplication.
So enable CMP0179 to keep the benefits of deduplication from CMP0156 on LLD and fix the build for CMake 3.31.0.
See: #116669
See: https://gitlab.kitware.com/cmake/cmake/-/issues/26447
Fixes: cb90d5b
Commit: 31ce47b5d602996406a516184af054a45118beca
https://github.com/llvm/llvm-project/commit/31ce47b5d602996406a516184af054a45118beca
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[TableGen] Use `std::move` to avoid copy (#113061)
Commit: 93b83642ee34d0092b94776728dad0117c2b72a1
https://github.com/llvm/llvm-project/commit/93b83642ee34d0092b94776728dad0117c2b72a1
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
R libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
R libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
R libc/src/__support/freestore.h
R libc/src/__support/freetrie.cpp
R libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
R libc/test/src/__support/freestore_test.cpp
R libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Revert "[libc] Use best-fit binary trie to make malloc logarithmic (#117065)"
This reverts commit b05600d96f46697e21f6b1b7ad901391326243a8.
riscv32 unit test still broken
Commit: decb87452d8e3b93b21ab9e4c3dd03d85cbebfa5
https://github.com/llvm/llvm-project/commit/decb87452d8e3b93b21ab9e4c3dd03d85cbebfa5
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/test/CXX/drs/cwg158.cpp
Log Message:
-----------
[TBAA] Only emit pointer tbaa metedata for record types. (#116991)
Be conservative if the type isn't a record type. Handling other types
may
require stripping const-qualifiers inside the type, e.g.
MemberPointerType.
Also look through array types same as through pointer types, to not
pessimize
arrays of pointers.
Without this, we assign different tags to the accesses for p an q in the
second test in cwg158.
PR: https://github.com/llvm/llvm-project/pull/116991
Commit: b89e774672678ef26baf8f94c616f43551d29428
https://github.com/llvm/llvm-project/commit/b89e774672678ef26baf8f94c616f43551d29428
Author: bernhardu <bernhardu at mailbox.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] Avoid warnings in compiling interception_win_test.cpp. (#116887)
Example:
warning: unused variable 'kPatchableCode12' [-Wunused-const-variable]
Commit: 9ba6672b9f0e82a1f6d4100dc832c84447ea545c
https://github.com/llvm/llvm-project/commit/9ba6672b9f0e82a1f6d4100dc832c84447ea545c
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[sanitizer_common] Intercept timespec_get except for hwasan (#117080)
Intercept timespec_get for all sanitizers except for hwasan
Commit: b62557aaeb9762bcc0d17a0db976cda74dc6b667
https://github.com/llvm/llvm-project/commit/b62557aaeb9762bcc0d17a0db976cda74dc6b667
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
Revert "[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))"
This reverts commit 0298c5921d3b9fbeb5fefc2555321ea82ade6090 to fix
a buildbot crash reported by https://lab.llvm.org/buildbot/#/builders/113/builds/4079.
Commit: fd2e0483de089fb1459bf440d74e5b4e648a429f
https://github.com/llvm/llvm-project/commit/fd2e0483de089fb1459bf440d74e5b4e648a429f
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
Log Message:
-----------
[clang-tidy] ignore consteval function in `ExceptionAnalyzer` (#116643)
`ExceptionAnalyzer` can ignore `consteval` function even if it will
throw exception. `consteval` function must produce compile-time
constant. But throw statement cannot appear in constant evaluation.
Fixed: #104457.
Commit: ba668eb99c5dc37d3c5cf2775079562460fd7619
https://github.com/llvm/llvm-project/commit/ba668eb99c5dc37d3c5cf2775079562460fd7619
Author: Alex Langford <alangford at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
Re-apply [lldb] Do not use LC_FUNCTION_STARTS data to determine symbol size as symbols are created (#117079)
I backed this out due to a problem on one of the bots that myself and
others have problems reproducing locally. I'd like to try to land it
again, at least to gain more information.
Summary:
This improves the performance of ObjectFileMacho::ParseSymtab by
removing eager and expensive work in favor of doing it later in a
less-expensive fashion.
Experiment:
My goal was to understand LLDB's startup time.
First, I produced a Debug build of LLDB (no dSYM) and a
Release+NoAsserts build of LLDB. The Release build debugged the Debug
build as it debugged a small C++ program. I found that
ObjectFileMachO::ParseSymtab accounted for somewhere between 1.2 and 1.3
seconds consistently. After applying this change, I consistently
measured a reduction of approximately 100ms, putting the time closer to
1.1s and 1.2s on average.
Background:
ObjectFileMachO::ParseSymtab will incrementally create symbols by
parsing nlist entries from the symtab section of a MachO binary. As it
does this, it eagerly tries to determine the size of symbols (e.g. how
long a function is) using LC_FUNCTION_STARTS data (or eh_frame if
LC_FUNCTION_STARTS is unavailable). Concretely, this is done by
performing a binary search on the function starts array and calculating
the distance to the next function or the end of the section (whichever
is smaller).
However, this work is unnecessary for 2 reasons:
1. If you have debug symbol entries (i.e. STABs), the size of a function
is usually stored right after the function's entry. Performing this work
right before parsing the next entry is unnecessary work.
2. Calculating symbol sizes for symbols of size 0 is already performed
in `Symtab::InitAddressIndexes` after all the symbols are added to the
Symtab. It also does this more efficiently by walking over a list of
symbols sorted by address, so the work to calculate the size per symbol
is constant instead of O(log n).
Commit: 07507cb5919cae0ae880bfee538ebc993b97dd6c
https://github.com/llvm/llvm-project/commit/07507cb5919cae0ae880bfee538ebc993b97dd6c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/entries-shuffled-diff-sizes.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
Log Message:
-----------
[SLP]Fix shuffling of entries of the different sizes
Need to choose the size of vector factor for mask based on the entries
vector factors, not mask size, to generate correct code.
Fixes #117170
Commit: 320038579d3c23b78f99618b71640f51423fe321
https://github.com/llvm/llvm-project/commit/320038579d3c23b78f99618b71640f51423fe321
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
Log Message:
-----------
[VPlan] Return cost of PHI for scalar VFs in computeCost for FORs.
This fixes a crash when the VF is scalar.
Fixes https://github.com/llvm/llvm-project/issues/116375.
Commit: 4d1959b70b4e6634561273374046e85d54b7bf6d
https://github.com/llvm/llvm-project/commit/4d1959b70b4e6634561273374046e85d54b7bf6d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
Log Message:
-----------
[VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (#115066)
Generalize collectUsersInExitBlock to collecting exit users in multiple
exit blocks. Exit blocks are leaf nodes in the VPlan (without
successors) except the scalar header.
Split off in preparation for
https://github.com/llvm/llvm-project/pull/112138
PR: https://github.com/llvm/llvm-project/pull/115066
Commit: 6c52a18a1d67fd7d0d68e1434469e0a4aee980a9
https://github.com/llvm/llvm-project/commit/6c52a18a1d67fd7d0d68e1434469e0a4aee980a9
Author: bernhardu <bernhardu at mailbox.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Fix `8A 05 ...` to return 6 again. (#116889)
This was already the case before 3bd8f4e,
which probably accidentally inserted
a few new instructions and a return 4 in between.
Commit: a62e1c8eddcda420abec57976dc48f97669277dc
https://github.com/llvm/llvm-project/commit/a62e1c8eddcda420abec57976dc48f97669277dc
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Core/FormatEntity.cpp
Log Message:
-----------
[lldb] Fix incorrect nullptr check in DumpAddressAndContent (#117219)
When checking the section load list, the existing code assumed that a
valid execution context guaranteed a valid target. This is a speculative
fix for a crash report (without a reproducer).
rdar://133969831
Commit: 9492744dc3bb483f6a723a6abef0195b93e25cde
https://github.com/llvm/llvm-project/commit/9492744dc3bb483f6a723a6abef0195b93e25cde
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Fix debug assertion failure. (#117090)
Only call getThisType() on an instance method.
Commit: 1b413c8aa41e31f0c1e3ce5b37369f66d6554931
https://github.com/llvm/llvm-project/commit/1b413c8aa41e31f0c1e3ce5b37369f66d6554931
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/src/__support/time/linux/CMakeLists.txt
A libc/src/__support/time/linux/clock_gettime.cpp
M libc/src/__support/time/linux/clock_gettime.h
Log Message:
-----------
[libc] fix clock_gettime symbols being undefined (#117224)
`clock_gettime` being a header library discards the dependency chain
behind it.
Commit: 8e65b7269121b49814b7f0d44e740d1a6c274c6d
https://github.com/llvm/llvm-project/commit/8e65b7269121b49814b7f0d44e740d1a6c274c6d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
Log Message:
-----------
[RISCV] Fix double counting CSRs with Zcmp in RISCVFrameLowering::getFrameIndexReference. (#117207)
The Zcmp callee saved registers are already accounted for in
getCalleeSavedStackSize(). Subtracting RVPushStackSize subtracts
them a second time leading to incorrect stack offsets during frame
index elimination.
This should have been removed in
0de2b26942f890a6ec84cd75ac7abe3f6f2b2e37
when Zcmp handling was changed. Prior to that, RVPushStackSize was
not included in getCalleeSavedStackSize(). The commit message at the
time noted that Zcmp+RVV was likely broken.
Commit: 926a71f0c9ff11a7b07231439505808780e88fe5
https://github.com/llvm/llvm-project/commit/926a71f0c9ff11a7b07231439505808780e88fe5
Author: Mirko <mirkomueller97 at live.de>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86WinEHState.cpp
A llvm/test/CodeGen/WinEH/wineh-dynamic-alloca.ll
A llvm/test/CodeGen/WinEH/wineh-inlined-inalloca.ll
Log Message:
-----------
[CodeGen][WinEH] Update saved esp for inlined inallocas (#116585)
This fixes issue #116583
When inalloca calls are inlined the static stack pointer saving prolog
of X86WinEHState breaks due to dynamic allocas.
In this case we need to update the saved esp for every inalloca and for
every stackrestore also related to inalloca.
Commit: bcf654c7f5fb84dd7cff5fe112d96658853cd8f5
https://github.com/llvm/llvm-project/commit/bcf654c7f5fb84dd7cff5fe112d96658853cd8f5
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
Log Message:
-----------
[lldb] Fix loading UUIDs from ELF headers. (#117028)
A previous patch added the ability to load UUID from ELF headers using
the program header and finding PT_NOTE entries. The fix would attempt to
read the data for the PT_NOTE from memory, but it didn't slide the
address so it ended up only working for the main executable if it wasn't
moved in memory. This patch slides the address and adds logging.
All processes map the ELF header + program headers + some program header
contents into memory. The program header for the `PT_NOTE` entries are
mapped, but the p_vaddr doesn't get relocated and is relative to the
load address of the ELF header. So we take a "p_vaddr" (file address)
and convert it into a load address in the process so we can load the
correct bytes that contain the `PT_NOTE` contents.
Commit: 41a0c66f4379d43dcf7643bced22b9048e7ace96
https://github.com/llvm/llvm-project/commit/41a0c66f4379d43dcf7643bced22b9048e7ace96
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
[TBAA] Don't emit pointer tbaa for unnamed structs or unions. (#116596)
For unnamed structs or unions, C's compatible types rule applies. Two
compatible types in different compilation units can have different
mangled names, meaning the metadata emitted below would incorrectly mark
them as no-alias. Use AnyPtr for such types in both C and C++, as C and
C++ types may be visible when doing LTO.
PR: https://github.com/llvm/llvm-project/pull/116596
Commit: 1c47d67abc72c8e4bca0f1d09cf1a025050fe60c
https://github.com/llvm/llvm-project/commit/1c47d67abc72c8e4bca0f1d09cf1a025050fe60c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_f32_16x16x32_bf16 for gfx950 (#117053)
Commit: 68ce528defae06bfc0faeee7e107337f0a2413fd
https://github.com/llvm/llvm-project/commit/68ce528defae06bfc0faeee7e107337f0a2413fd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP]Fix vector factor calculation for adjusted mask
Need to choose max vector factor as max(Mask.size(), prev-val-size).
Fixes build erros in https://lab.llvm.org/buildbot/#/builders/95/builds/6504
Commit: dcd69ddefb66c0627f41547b5fdc166030d76ccb
https://github.com/llvm/llvm-project/commit/dcd69ddefb66c0627f41547b5fdc166030d76ccb
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/idot.ll
Log Message:
-----------
[SPIRV] Use `Op[S|U]Dot` when possible for integer dot product (#115095)
```
- use the new OpSDot/OpUDot instructions when capabilites allow in SPIRVInstructionSelector.cpp
- correct functionality of capability check onto input operand and not return operand type in SPIRVModuleAnalysis.cpp
- add test cases to demonstrate use case in idot.ll
```
Resolves #114632
Commit: 52544e14d7c001772eb01dc5808b45b6f6ae0ac1
https://github.com/llvm/llvm-project/commit/52544e14d7c001772eb01dc5808b45b6f6ae0ac1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
A llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
Log Message:
-----------
AMDGPU: Add a baseline, non-comprehensive test for scaled mfma hazards (#117055)
Add some tests which will demonstrate that we treat the number of cycles
differently depending on whether the first matrix uses an f8 format.
Commit: 2ab178820b903453dbb13b4495f163dc910b243a
https://github.com/llvm/llvm-project/commit/2ab178820b903453dbb13b4495f163dc910b243a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x64_f16 for gfx950 (#117202)
Commit: e50eaa2cf199b6e8b07eb0ea18493053cd12559a
https://github.com/llvm/llvm-project/commit/e50eaa2cf199b6e8b07eb0ea18493053cd12559a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x32_f16 for gfx950 (#117205)
Commit: 95ddc1a63b47a5dcfb044632eec2e840d41ff793
https://github.com/llvm/llvm-project/commit/95ddc1a63b47a5dcfb044632eec2e840d41ff793
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x64_bf16 for gfx950 (#117211)
Commit: 0a7242959f5d3f9ccf7b149009b9eebd45b785b0
https://github.com/llvm/llvm-project/commit/0a7242959f5d3f9ccf7b149009b9eebd45b785b0
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.h
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
Log Message:
-----------
[LLDB][ProcessELFCore] Add Description to ProcessELFCore/ELFThread stop reasons (#110065)
This fixes a functionality gap with GDB, where GDB will properly decode
the stop reason and give the address for SIGSEGV. I also added
descriptions to all stop reasons, following the same code path that the
Native Linux Thread uses.
Commit: 42dd114a464885a93daa7d2beacc3437cde6ea01
https://github.com/llvm/llvm-project/commit/42dd114a464885a93daa7d2beacc3437cde6ea01
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x32_bf16 for gfx950 (#117212)
Commit: eaa0a21d21962280dc2c03a09152510f6162a576
https://github.com/llvm/llvm-project/commit/eaa0a21d21962280dc2c03a09152510f6162a576
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
Log Message:
-----------
Limit symbol versioning in clang-cpp to Linux for now
There was a build bot failure on AIX after #116556, and who knows what
other systems don't support symbol versioning. So let's limit this to
Linux for now. We can always add more cases later.
Commit: 8c53036146758acf6b195867fbc9ec447e4a228f
https://github.com/llvm/llvm-project/commit/8c53036146758acf6b195867fbc9ec447e4a228f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_i32_16x16x128_i8 for gfx950 (#117213)
Commit: 3e6f3508adac947bf7b85aec88e796bbfbdebf70
https://github.com/llvm/llvm-project/commit/3e6f3508adac947bf7b85aec88e796bbfbdebf70
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_i32_32x32x64_i8 for gfx950 (#117214)
Commit: 4862febdce572e6952b02283a6c7e53617e3aac0
https://github.com/llvm/llvm-project/commit/4862febdce572e6952b02283a6c7e53617e3aac0
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
M clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/lifetimebound.cpp
Log Message:
-----------
[clang][APINotes] Do not add duplicate lifetimebound annotations (#117194)
In case a method already is lifetimebound annotated we should not add a
second annotation to the type.
Commit: 385961d7b23d5500d20954ad8137b27ecced2692
https://github.com/llvm/llvm-project/commit/385961d7b23d5500d20954ad8137b27ecced2692
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Reapply "[libc] Use best-fit binary trie to make malloc logarithmic (#117065)"
This reverts commit 93b83642ee34d0092b94776728dad0117c2b72a1.
- Correct riscv32 assumption about alignment (bit of a hack).
- Fix test case where the largest_small and smallest sizes are the
same.
Commit: 3709c2d15a38efaf8007570b1434293a9274487a
https://github.com/llvm/llvm-project/commit/3709c2d15a38efaf8007570b1434293a9274487a
Author: Chuvak <demenev2002 at yandex.ru>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/math/Compare.h
Log Message:
-----------
[libc] Fix wrong name in Compare.h (#117223)
Fix for some mistakes in source code found using PVS Studio.
Inspired by: https://pvs-studio.com/en/blog/posts/cpp/1188/
Fixed:
- [Bug 5](https://pvs-studio.com/en/blog/posts/cpp/1188/#IDF23EA2CEAB)
Commit: bd8a953e9bb934d51f98327bbea5baef65f3d710
https://github.com/llvm/llvm-project/commit/bd8a953e9bb934d51f98327bbea5baef65f3d710
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Fix mfma scale source legalization (#117238)
Code inside assert changes the variable instead of the comparison.
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 7672216ed7f480c8d461a2d046a74453307f6298
https://github.com/llvm/llvm-project/commit/7672216ed7f480c8d461a2d046a74453307f6298
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[LLVM] Add environment triple for 'llvm' (#117218)
Summary:
The LLVM C library is an in-development environment for running
executables on various systems. Similarly how we have `-gnu` to indicate
that we are using a GNU toolchain we should support `-llvm` to indicate
the LLVM C library. This patch only adds the basic support for the
triple and does not do any necessary clang changes to handle compiling
with it.
Fixes https://github.com/llvm/llvm-project/issues/117251
Commit: 6a8a4d51a4415aa453b79f999bed411bad6c3723
https://github.com/llvm/llvm-project/commit/6a8a4d51a4415aa453b79f999bed411bad6c3723
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/include/lldb/Expression/UserExpression.h
M lldb/source/Expression/REPL.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/expression/fixits/TestFixIts.py
Log Message:
-----------
[lldb] Refactor UserExpression::Evaluate to only have one error channel. (#117186)
Prior to this patch, the function returned an exit status, sometimes a
ValueObject with an error and a Status object. This patch removes the
Status object and ensures the error is consistently returned as the
error of the ValueObject.
Commit: 7553fb127485d034e2ffdbb5461fef2b6f04b989
https://github.com/llvm/llvm-project/commit/7553fb127485d034e2ffdbb5461fef2b6f04b989
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/API/SBValue.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
Log Message:
-----------
[lldb] Fix a regression in SBValue::GetObjectDescription() (#117242)
The old behavior was to return a null string in the error case,when
refactoring the error handling I thought it would be a good idea to
print the error in the description, but that breaks clients that try to
print a description first and then do something else in the error case.
The API is not great but it's clear that in-band errors are also not a
good idea.
rdar://133956263
Commit: ab28d387fafede5d56a005b2597903fe6a2fbf9a
https://github.com/llvm/llvm-project/commit/ab28d387fafede5d56a005b2597903fe6a2fbf9a
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/test/src/__support/freestore_test.cpp
Log Message:
-----------
[libc] Fix forward freestore test on riscv32
Commit: e79cd2467622d6e388888a4e7ca2e9fbc3fbbc50
https://github.com/llvm/llvm-project/commit/e79cd2467622d6e388888a4e7ca2e9fbc3fbbc50
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/test/Parser/OpenMP/order-clause01.f90
Log Message:
-----------
[flang][OpenMP] Use new modifier code in ORDER and SCHEDULE clauses (#117081)
This actually simplifies the AST node for the schedule clause: the two
allowed modifiers can be easily classified as the ordering-modifier and
the chunk-modifier during parsing without the need to create additional
classes.
Commit: 1a08b155899ee3ed6a6c441799991a8be5df801e
https://github.com/llvm/llvm-project/commit/1a08b155899ee3ed6a6c441799991a8be5df801e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP] Avoid early returns, NFC (#117231)
Frontend code is generally nested.
Follow-up to https://github.com/llvm/llvm-project/pull/116658.
Commit: 9894cd5febbb89ad5b97c006179aaee77b824f91
https://github.com/llvm/llvm-project/commit/9894cd5febbb89ad5b97c006179aaee77b824f91
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp:53:32: error:
field 'm_thread_reg_ctx_sp' will be initialized after field
'm_thread_name' [-Werror,-Wreorder-ctor]
Commit: 0cfd20ed1b8561a5d4587e8f624f9b4c8efd8b6f
https://github.com/llvm/llvm-project/commit/0cfd20ed1b8561a5d4587e8f624f9b4c8efd8b6f
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
Log Message:
-----------
[JITLink][arm64][MachO] Apply PAC signing to __mod_init_func pointers.
The __mod_init_func section contains pointers to static initializer functions.
In the static compilation model for MachO/arm64e these are unsigned pointers
that are signed by dyld before being called. This patch teaches JITLink's
MachO/arm64 backend to sign __mod_init_func pointers using the PAC signing
function introduced in a432f11a52d (signing is triggered by rewriting all
Pointer64 edges in the section to Pointer64Authenticated edges). This means
that unlike the static compilation model the linked __mod_init_func section
will contain signed pointers.
Note: Signing of init pointers could instead have been handled by the ORC
runtime in a manner similar to dyld, but this would have come at the cost of
adding an extra signing oracle. Using the signing function avoids this.
Testing this change requires execution. It is covered by the
trivial-cxx-constructor.cpp testcase that was added to the ORC runtime in
7c0786363e6.
Commit: 3f540e1a2195b34969b7c4741ba24855bd393c56
https://github.com/llvm/llvm-project/commit/3f540e1a2195b34969b7c4741ba24855bd393c56
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-globals.s
Log Message:
-----------
[JITLink] Restrict execution of MachO_ptrauth-globals.s test to arm64 hosts.
Should fix the bot failures on Darwin x86-64 machines.
Commit: 7baadb2a4e48df88c9fdd09629d6f03e66bb30d7
https://github.com/llvm/llvm-project/commit/7baadb2a4e48df88c9fdd09629d6f03e66bb30d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_bf8_bf8 for gfx950 (#117232)
Commit: 3678f8a8aae4f318c82d290044f3d19a05e74ffc
https://github.com/llvm/llvm-project/commit/3678f8a8aae4f318c82d290044f3d19a05e74ffc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_bf8_fp8 for gfx950 (#117233)
Commit: 33124910c9f4877c069c0358159763c03e10ca31
https://github.com/llvm/llvm-project/commit/33124910c9f4877c069c0358159763c03e10ca31
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_fp8_bf8 for gfx950 (#117234)
Commit: 836d2dcf601a736804670ba6fbc85ec5cfbfeff1
https://github.com/llvm/llvm-project/commit/836d2dcf601a736804670ba6fbc85ec5cfbfeff1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_fp8_fp8 for gfx950 (#117235)
Commit: 2369a582c260aafd46ce09e75e884fb654fd330d
https://github.com/llvm/llvm-project/commit/2369a582c260aafd46ce09e75e884fb654fd330d
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
[Clang] Fix handling of non-member functions in isNormalAssignmentOperator() (#115880)
This patch correctes the handling of non-member functions in the
`isNormalAssignmentOperator` function within `CheckExprLifetime.cpp`.
The previous implementation incorrectly assumed that `FunctionDecl` is
always a `CXXMethodDecl`, leading to potential null pointer
dereferencing.
Change: - Correctly handle the case where `FD` is not a `CXXMethodDecl`
by using `FD->getParamDecl(0)->getType()`.
This fix ensures that the function correctly handles non-member
assignment operators, such as:
`struct S {}; void operator|=(S, S) {}`
This change improves the robustness of the `isNormalAssignmentOperator`
function by correctly identifying and handling different types of
function declarations.
Commit: 8223982eba22323f7a737a62259d6d6048504107
https://github.com/llvm/llvm-project/commit/8223982eba22323f7a737a62259d6d6048504107
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/test/MC/X86/tlsdesc-64.s
Log Message:
-----------
[X86][MC] Support R_X86_64_CODE_4_GOTPC32_TLSDESC (#116908)
For
lea name at tlsdesc(%rip), %reg
add
R_X86_64_CODE_4_GOTPC32_TLSDESC = 45
if the instruction starts at 4 bytes before the relocation offset. This
should be used if reg is one of the additional general-purpose
registers, r16-r31, in Intel APX. It is similar to
R_X86_64_GOTPC32_TLSDESC and linker optimization must take the different
instruction encoding into account.
Linker can convert the instructions with R_X86_64_CODE_4_GOTPC32_TLSDESC
to
mov $name at tpoff, %reg
if the first byte of the instruction at the relocation offset - 4 is
0xd5 (namely, encoded w/REX2 prefix) when possible.
Binutils patch:
https://github.com/bminor/binutils-gdb/commit/a533c8df598b5ef99c54a13e2b137c98b34b043c
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2023-December/131463.html
ABI discussion:
https://groups.google.com/g/x86-64-abi/c/ACwD-UQXVDs/m/vrgTenKyFwAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: ca9f358b1404132ab327a13b2546ee23a526876e
https://github.com/llvm/llvm-project/commit/ca9f358b1404132ab327a13b2546ee23a526876e
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_loongarch64_relocations.s
Log Message:
-----------
[JITLink][LoongArch] Add support for R_LARCH_CALL36 relocation
This relocation is used for function calls with medium code model.
Reviewed By: lhames, SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/117127
Commit: dc580c9cf65d9bdad92e127325b50e712422379b
https://github.com/llvm/llvm-project/commit/dc580c9cf65d9bdad92e127325b50e712422379b
Author: James Y Knight <jyknight at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
Log Message:
-----------
Switch test back from getRealFileSystem to createPhysicalFileSystem
The tests change the VFS's working directory, but, we don't want to
change the actual process's working-directory, or it can break other
tests (depending on run order).
Fixes: df9a14d7bbf1180e4f1474254c9d7ed6bcb4ce55
Commit: 105ecd8bb2c90c874375100e61f85678a0f6e310
https://github.com/llvm/llvm-project/commit/105ecd8bb2c90c874375100e61f85678a0f6e310
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/SplitFunctions.cpp
A bolt/test/X86/pie-eh-split-undo.s
M bolt/test/runtime/X86/Inputs/pie-exceptions-failed-split.s
R bolt/test/runtime/X86/pie-exceptions-failed-split.test
A bolt/test/runtime/X86/pie-exceptions-split.test
Log Message:
-----------
[BOLT] Avoid EH trampolines for PIEs/DSOs (#117106)
We used to emit EH trampolines for PIE/DSO whenever a function fragment
contained a landing pad outside of it. However, it is common to have all
landing pads in a cold fragment even when their throwers are in a hot
one.
To reduce the number of trampolines, analyze landing pads for any given
function fragment, and if they all belong to the same (possibly
different) fragment, designate that fragment as a landing pad fragment
for the "thrower" fragment. Later, emit landing pad fragment symbol as
an LPStart for the thrower LSDA.
Commit: 3f1e7ef5344c3236bcabf3982dbdc985c43bc078
https://github.com/llvm/llvm-project/commit/3f1e7ef5344c3236bcabf3982dbdc985c43bc078
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/test/MC/LoongArch/Directives/cfi.s
Log Message:
-----------
[LoongArch] Support parsing register names in CFI instructions
Reviewed By: MQ-mengqing, heiher, xen0n
Pull Request: https://github.com/llvm/llvm-project/pull/117120
Commit: 454398ab04e2cd773a4b264433eb841e8cec0470
https://github.com/llvm/llvm-project/commit/454398ab04e2cd773a4b264433eb841e8cec0470
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
Log Message:
-----------
[MLIR] Add missing memory read effect on memref.reshape (#117130)
The memory read effect on a memref.reshape argument was missing. This in
turn led to
analyses relying on memory effects making incorrect conclusions.
Commit: bd15c7c1ca314708799bdc7bf8a7f27288cf7c85
https://github.com/llvm/llvm-project/commit/bd15c7c1ca314708799bdc7bf8a7f27288cf7c85
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M lld/test/ELF/lto/riscv-attributes.ll
M lld/test/ELF/riscv-attributes.s
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/attribute.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Make A implies Zaamo and Zalrsc (#116907)
Ref:
https://github.com/riscv/riscv-isa-manual/blob/main/src/a-st-ext.adoc.
Commit: 6b22e39f2615b6391e097500a70482da4b3ef63b
https://github.com/llvm/llvm-project/commit/6b22e39f2615b6391e097500a70482da4b3ef63b
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove the useless check for alternate instruction. (#117116)
Only BinaryOperator and CastInst support alternate instruction. It
always returns false for TreeEntry::isAltShuffle if an instruction is
ExtractElementInst, ExtractValueInst, LoadInst, StoreInst or
InsertElementInst.
Commit: ce66b56865426fc1760b5a090ca2748c046094f5
https://github.com/llvm/llvm-project/commit/ce66b56865426fc1760b5a090ca2748c046094f5
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][VPlan] Remove any-of reduction from precomputeCost. NFC (#117109)
The any-of reduction contains phi and select instructions.
The select instruction might be optimized and removed in the vplan which
may cause VF difference between legacy and VPlan-based model. But if the
select instruction be removed, `planContainsAdditionalSimplifications()`
will catch it and disable the assertion.
Therefore, we can just remove the ayn-of reduction calculation in the
precomputeCost().
Commit: 764cfd7d09647d7d49d5e0ae7b19ce0bd4b0968d
https://github.com/llvm/llvm-project/commit/764cfd7d09647d7d49d5e0ae7b19ce0bd4b0968d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
Revert "[flang][OpenMP] Avoid early returns, NFC (#117231)"
This reverts commit 1a08b155899ee3ed6a6c441799991a8be5df801e.
Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/157/builds/13427
Commit: 0e3c791916a918cd2d7391ddb633fbe5faa00b86
https://github.com/llvm/llvm-project/commit/0e3c791916a918cd2d7391ddb633fbe5faa00b86
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
Revert "[LV][VPlan] Remove any-of reduction from precomputeCost. NFC" (#117280)
Reverts llvm/llvm-project#117109
Some test cases need to update.
Commit: f082782c1b3ec98f50237ddfc92e6776013bf62f
https://github.com/llvm/llvm-project/commit/f082782c1b3ec98f50237ddfc92e6776013bf62f
Author: thetruestblue <bblueconway at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Log Message:
-----------
[NFC][Fuzzer] Extract CreateGateBranch method. (#117236)
A Pre-commit for use in adding gated tracing callbacks support to
trace-cmp
[#113227](https://github.com/llvm/llvm-project/pull/113227/commits/53b316d74683064f2db88ec401f6c3018ee6896a)
rdar://135404160
Patch by: Andrea Fioraldi
Commit: f84fc44f1a46969817bfd1b38991f7e43a8efe1d
https://github.com/llvm/llvm-project/commit/f84fc44f1a46969817bfd1b38991f7e43a8efe1d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
Log Message:
-----------
[RISCV][GISel] Make s16->s32 G_ANYEXT/SEXT/ZEXT legal.
Commit: 3761b675196f2c5ac31bf5fe027f6bb2907ff2a9
https://github.com/llvm/llvm-project/commit/3761b675196f2c5ac31bf5fe027f6bb2907ff2a9
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase (#117097)
This is a re-upload of #116934, which was reverted.
The dialect conversion driver has three phases:
- **Create** `IRRewrite` objects as the IR is traversed.
- **Finalize** `IRRewrite` objects. During this phase, source
materializations for mismatching value types are created. (E.g., when
`Value` is replaced with a `Value` of different type, but there is a
user of the original value that was not modified because it is already
legal.)
- **Commit** `IRRewrite` objects. During this phase, all remaining IR
modifications are materialized. In particular, SSA values are actually
being replaced during this phase.
This commit removes the "finalize" phase. This simplifies the code base
a bit and avoids one traversal over the `IRRewrite` stack. Source
materializations are now built during the "commit" phase, right before
an SSA value is being replaced.
This commit also removes the "inverse mapping" of the conversion value
mapping, which was used to predict if an SSA value will be dead at the
end of the conversion. This check is replaced with an approximate check
that does not require an inverse mapping. (A false positive for `v` can
occur if another value `v2` is mapped to `v` and `v2` turns out to be
dead at the end of the conversion. This case is not expected to happen
very often.) This reduces the complexity of the driver a bit and removes
one potential source of bugs. (There have been bugs in the usage of the
inverse mapping in the past.)
`BlockTypeConversionRewrite` no longer stores a pointer to the type
converter. This pointer is now stored in `ReplaceBlockArgRewrite`.
This commit is in preparation of merging the 1:1 and 1:N dialect
conversion driver. It simplifies the upcoming changes around the
conversion value mapping. (API surface of the conversion value mapping
is reduced.)
Commit: 1490f38b2253a10fcb186a18dd2875cbbeb89fd1
https://github.com/llvm/llvm-project/commit/1490f38b2253a10fcb186a18dd2875cbbeb89fd1
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Avoid make<ArmCmseSGVeneer>
Store them as unique_ptr in sgVeneers instead.
Commit: d71fa331df49450361a9e5cd4e48ae4a79b6126b
https://github.com/llvm/llvm-project/commit/d71fa331df49450361a9e5cd4e48ae4a79b6126b
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/SymbolContext.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-inline-function.s
Log Message:
-----------
[lldb] Fix inline function resolution for discontinuous functions (#116777)
The problem here is the assumption that the entire function will be
placed in a single section. This will ~never be the case for a
discontinuous function, as the point of splitting the function is to let
the linker group parts of the function according to their "hotness".
The fix is to change the offset computation to use file addresses
instead.
Commit: 994c544c18c86cbdb6536aae5d27ef7e2f592486
https://github.com/llvm/llvm-project/commit/994c544c18c86cbdb6536aae5d27ef7e2f592486
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
doc: Clarify that ffile-prefix-map applies to fcoverage-prefix-map, too [NFC] (#117135)
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: 925e1956cd5039fa2489b802d25555e247c34175
https://github.com/llvm/llvm-project/commit/925e1956cd5039fa2489b802d25555e247c34175
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseExpr.cpp
M clang/test/AST/ast-dump-recovery.cpp
Log Message:
-----------
[Clang] enhance error recovery with RecoveryExpr for trailing commas in call arguments (#114684)
Fixes #100921
Commit: a9882bda96228ca23e166a817f93a7dbc99763cb
https://github.com/llvm/llvm-project/commit/a9882bda96228ca23e166a817f93a7dbc99763cb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
Log Message:
-----------
[libc++] Mark charconv test as unsupported under msan (#116933)
Commit: 5518bb215b51cc339c3ecac064032f6791ae6476
https://github.com/llvm/llvm-project/commit/5518bb215b51cc339c3ecac064032f6791ae6476
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
Log Message:
-----------
[clangd] Check getFunctionTypeLoc() for validity in InlayHintVisitor (#117296)
Fixes https://github.com/clangd/clangd/issues/2223
Commit: eac8ea323a2a478dcf53f994c7b0369bfb10747c
https://github.com/llvm/llvm-project/commit/eac8ea323a2a478dcf53f994c7b0369bfb10747c
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
[SystemZ] Modify tests for constrained rounding functions (#116952)
The existing tests for constrained functions often use constant
arguments. If constant evaluation is enhanced, such tests will not check
code generation of the tested functions. To avoid it, the tests are
modified to use loaded value instead of constants. Now only the tests
for rounding functions are changed.
Commit: 562c93a165e5bb85b0cf464bbb157b33a668af83
https://github.com/llvm/llvm-project/commit/562c93a165e5bb85b0cf464bbb157b33a668af83
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/include/mlir/Query/QuerySession.h
Log Message:
-----------
[mlir] IWYU mlir/include/mlir/Query/QuerySession.h
Commit: 92301180f7e2d240c560f621f6fc1b07217cac01
https://github.com/llvm/llvm-project/commit/92301180f7e2d240c560f621f6fc1b07217cac01
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/SplitFunctions.cpp
A bolt/test/X86/exceptions-compact.s
Log Message:
-----------
[BOLT] Use compact EH format for fixed-address executables (#117274)
Use ULEB128 format for emitting LSDAs for fixed-address executables,
similar to what we use for PIEs/DSOs. Main difference is that we don't
use landing pad trampolines when landing pads are not contained in a
single fragment. Instead, we fallback to emitting larger fixed-address
LSDAs, which is still better than adding trampoline instructions.
Commit: 2cc5b493cb5c7df4d7f3acfb493725b2bb7082f5
https://github.com/llvm/llvm-project/commit/2cc5b493cb5c7df4d7f3acfb493725b2bb7082f5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add fhahn as ConstraintElimination maintainer (#117006)
Commit: 157d847ba737b4136aeb1d92912f549ea1c96d4c
https://github.com/llvm/llvm-project/commit/157d847ba737b4136aeb1d92912f549ea1c96d4c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
[PowerPC] Use getSignedConstant() where necessary (#117177)
This is to prevent assertion failures when we disable implicit
truncation in getConstant().
getCanonicalConstSplat() works with a mix of unsigned and signed values,
so I explicitly truncate the APInt there.
Commit: 632c5d29919ce93dc5f33fd729a0b97adc7c831b
https://github.com/llvm/llvm-project/commit/632c5d29919ce93dc5f33fd729a0b97adc7c831b
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
Log Message:
-----------
[VPlan] Support VPReverseVectorPointer in DataWithEVL vectorization (#113667)
VPReverseVectorPointer relies on the runtime VF, but in DataWithEVL
tail-folding, EVL (which can be less than VF at runtime) should be used
instead.
This patch updates the logic to check the users of VF and replaces the
second operand if the user is VPReverseVectorPointer.
Commit: 05fcdd555eaac74717cd132ca434c90ae99381dd
https://github.com/llvm/llvm-project/commit/05fcdd555eaac74717cd132ca434c90ae99381dd
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir
Log Message:
-----------
[MLIR][SPIRV-TO-LLVM] Support SPV_INTEL_split_barrier ops (#116648)
Add conversion to LLVM for `SPV_INTEL_split_barrier` operations via
conversion to SPIR-V built-ins.
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 1d4602070f96c9a6921d51a3b907f90cd2e3ae32
https://github.com/llvm/llvm-project/commit/1d4602070f96c9a6921d51a3b907f90cd2e3ae32
Author: tangaac <tangyan01 at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mld-seq-sa.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
Log Message:
-----------
[LoongArch] Support LA V1.1 feature ld-seq-sa that don't generate dbar 0x700. (#116762)
Two options for clang
-mld-seq-sa: Do not generate load-load barrier instructions (dbar 0x700)
-mno-ld-seq-sa: Generate load-load barrier instructions (dbar 0x700)
The default is -mno-ld-seq-sa
Commit: ef206446f2bbcb1bacc73d7611a96c457f59499f
https://github.com/llvm/llvm-project/commit/ef206446f2bbcb1bacc73d7611a96c457f59499f
Author: Youngsuk Kim <joseph942010 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/integer-overflow.cpp
Log Message:
-----------
[clang] Warn const integer-overflow of member in temporary struct bound to rvalue reference (#117225)
Fixes #46755
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Commit: 294c5cb2bea88fa048e00757188749f074c5b09f
https://github.com/llvm/llvm-project/commit/294c5cb2bea88fa048e00757188749f074c5b09f
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Type.h
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/target-type-properties.ll
Log Message:
-----------
[IR] Add TargetExtType::CanBeLocal property (#99016)
Add a property to allow marking target extension types that cannot be
used in an alloca instruction or byval argument, similar to CanBeGlobal
for global variables.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: cc721dba4e94c1d28214f81da0f1af79b6ca4218
https://github.com/llvm/llvm-project/commit/cc721dba4e94c1d28214f81da0f1af79b6ca4218
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-extract-subvector.ll
Log Message:
-----------
[AArch64][Codegen] Improve small shufflevector/concat lowering for SME (#116662)
This now tries to widen the shuffle before generating a possibly
expensive SVE TBL, this may allow the shuffle to be matched as something
cheaper like a ZIP1.
Commit: fdb1bf9b5949b2a97041922405a812a060fce5f4
https://github.com/llvm/llvm-project/commit/fdb1bf9b5949b2a97041922405a812a060fce5f4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
Log Message:
-----------
[LoongArch] Use getSignedConstant() where necessary (#117172)
To prevent assertion failures when we disable implicit truncation in
getConstant().
Commit: 063a6f70a6e86deb81fe6b1f24fecb7774d8cb44
https://github.com/llvm/llvm-project/commit/063a6f70a6e86deb81fe6b1f24fecb7774d8cb44
Author: Martin Storsjö <martin at martin.st>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lld/MinGW/Options.td
Log Message:
-----------
[LLD] [MinGW] Get rid of trailing whitespace. NFC.
Commit: 55e9afab6e5fc2fd2d456567657cfdf08920bb65
https://github.com/llvm/llvm-project/commit/55e9afab6e5fc2fd2d456567657cfdf08920bb65
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove the useless check for alternate instruction. (#117293)
Only BinaryOperator and CastInst support alternate instruction. It
always returns false for TreeEntry::isAltShuffle if an instruction is
ExtractElementInst, ExtractValueInst, LoadInst, StoreInst or
InsertElementInst.
Commit: 68aa6ac58c2bd59cac15417e7d8356ef8382dabd
https://github.com/llvm/llvm-project/commit/68aa6ac58c2bd59cac15417e7d8356ef8382dabd
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove redundant computation in getReorderingData. (#117295)
Commit: cac13606c20ee6e78b04dd3b36af2c0ee61ab9ef
https://github.com/llvm/llvm-project/commit/cac13606c20ee6e78b04dd3b36af2c0ee61ab9ef
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/EdgeBundles.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/EdgeBundles.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SpillPlacement.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
Log Message:
-----------
[CodeGen][NewPM] Port EdgeBundles analysis to NPM (#116616)
Commit: dde9477d8c0b85d445f10b08b0120f3d361cb77f
https://github.com/llvm/llvm-project/commit/dde9477d8c0b85d445f10b08b0120f3d361cb77f
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/SparseSet.h
M llvm/unittests/ADT/SparseSetTest.cpp
Log Message:
-----------
[NFC] Use unique_ptr in SparseSet (#116617)
This allows implementing the move constructor.
Commit: 775148f2367600f90d28684549865ee9ea2f11be
https://github.com/llvm/llvm-project/commit/775148f2367600f90d28684549865ee9ea2f11be
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
We can get these information via `sys_riscv_hwprobe`.
This can be used to implement `__builtin_cpu_is`.
Commit: 4feaa9db8fde5f5bfd9a1e4b65587da5a87fbfde
https://github.com/llvm/llvm-project/commit/4feaa9db8fde5f5bfd9a1e4b65587da5a87fbfde
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M .ci/generate_test_report.py
M .github/new-issues-labeler.yml
M .github/workflows/libcxx-build-and-test.yaml
A .github/workflows/libcxx-build-containers.yml
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/X86/exceptions-compact.s
A bolt/test/X86/pie-eh-split-undo.s
A bolt/test/eh-frame-hdr.test
A bolt/test/eh-frame-overwrite.test
M bolt/test/runtime/X86/Inputs/pie-exceptions-failed-split.s
R bolt/test/runtime/X86/pie-exceptions-failed-split.test
A bolt/test/runtime/X86/pie-exceptions-split.test
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.h
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang-tools-extra/test/CMakeLists.txt
A clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
M clang/Maintainers.rst
M clang/cmake/caches/CrossWinToARMLinux.cmake
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/AddressSanitizer.rst
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LeakSanitizer.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/CanonicalType.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
M clang/include/clang/Analysis/CallGraph.h
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
M clang/include/clang/Basic/BuiltinsLoongArchLSX.def
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticRefactoringKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_mve.td
M clang/include/clang/Basic/arm_mve_defs.td
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_neon_incl.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Interpreter/PartialTranslationUnit.h
R clang/include/clang/Parse/ParseDiagnostic.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/module.modulemap
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/CommentCommandTraits.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DeclarationName.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OSLog.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtIterator.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTTBuilder.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/CallGraph.cpp
M clang/lib/Analysis/CalledOnceCheck.cpp
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/ProgramPoint.cpp
M clang/lib/Analysis/ReachableCode.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/SourceManager.cpp
A clang/lib/Basic/TargetDefines.h
M clang/lib/Basic/Targets.h
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/LinkInModulesPass.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/DriverOptions.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/cuda_wrappers/new
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/larchintrin.h
M clang/lib/Headers/lasxintrin.h
M clang/lib/Headers/limits.h
M clang/lib/Headers/lsxintrin.h
A clang/lib/Headers/movrsintrin.h
M clang/lib/Headers/nvptxintrin.h
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/IncrementalExecutor.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Interpreter/Wasm.h
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/MacroArgs.cpp
M clang/lib/Lex/MacroInfo.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPCallbacks.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/PreprocessingRecord.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/PreprocessorLexer.cpp
M clang/lib/Lex/TokenLexer.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/ScopeInfo.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaFixItUtils.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M clang/lib/StaticAnalyzer/Checkers/CastToStructChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
M clang/lib/StaticAnalyzer/Checkers/IdenticalExprChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCMissingSuperCallChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
M clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/lifetimebound.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
M clang/test/AST/arm-mfp8.cpp
M clang/test/AST/ast-dump-recovery.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
M clang/test/Analysis/store-dump-orders.cpp
M clang/test/Analysis/taint-generic.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p3.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.noreturn/p1.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp
M clang/test/CXX/drs/cwg158.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/CodeGen/AArch64/debug-types.c
M clang/test/CodeGen/AArch64/elf-pauthabi.c
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-inline.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-weak.c
M clang/test/CodeGen/PowerPC/musttail-indirect.cpp
M clang/test/CodeGen/PowerPC/musttail-inline.c
M clang/test/CodeGen/PowerPC/musttail-undefined.c
M clang/test/CodeGen/PowerPC/musttail-weak.c
M clang/test/CodeGen/PowerPC/musttail.c
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/SystemZ/zos-mixed-ptr-sizes.c
A clang/test/CodeGen/X86/movrs-builtins.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/X86/x86_64-PR42672.c
M clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGen/arm-mve-intrinsics/compare.c
M clang/test/CodeGen/arm-vfp16-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-ifunc.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/blocks.c
A clang/test/CodeGen/embed-bitcode-marker-with-nonzero-as.c
A clang/test/CodeGen/ifunc-win.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
A clang/test/CodeGen/ptrauth-module-flags.c
A clang/test/CodeGen/scoped-fence-ops.c
A clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/tbaa-struct-bitfield-endianness.cpp
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
A clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
M clang/test/CodeGenCXX/aarch64-sve-vector-conditional-op.cpp
A clang/test/CodeGenCXX/auto-var-init-attr.cpp
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
A clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
A clang/test/CodeGenHLSL/builtins/clip.hlsl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp
M clang/test/Driver/aarch64-implied-sme-features.c
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/amdgpu-openmp-system-arch-fail.c
M clang/test/Driver/arm-alignment.c
M clang/test/Driver/cl-zc.cpp
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/darwin-subframeworks.c
A clang/test/Driver/fprofile-sample-use.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mld-seq-sa.c
M clang/test/Driver/mingw.cpp
M clang/test/Driver/module-output.cppm
A clang/test/Driver/msp430-char.c
M clang/test/Driver/nvptx-cuda-system-arch.c
M clang/test/Driver/openmp-system-arch.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/relax.s
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/x86-march.c
M clang/test/Frontend/noderef.cpp
M clang/test/Headers/limits.cpp
M clang/test/Misc/pragma-attribute-strict-subjects.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Modules/no-eager-load.cppm
M clang/test/Modules/same-decl-in-different-modules.cppm
M clang/test/OpenMP/for_simd_loop_messages.cpp
M clang/test/OpenMP/masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/parallel_for_simd_messages.cpp
M clang/test/OpenMP/parallel_masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/simd_linear_messages.cpp
M clang/test/OpenMP/target_parallel_for_simd_ordered_messages.cpp
M clang/test/OpenMP/taskloop_simd_linear_messages.cpp
M clang/test/Parser/cxx2c-delete-with-message.cpp
M clang/test/Parser/pragma-attribute.cpp
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/ptrauth_feature.c
M clang/test/Refactor/Extract/ObjCProperty.m
A clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
A clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/arm-mfp8.c
M clang/test/Sema/arm-mfp8.cpp
M clang/test/Sema/asm.c
M clang/test/Sema/attr-nonblocking-constraints.cpp
M clang/test/Sema/c2x-nodiscard.c
M clang/test/Sema/constant_builtins_vector.cpp
A clang/test/Sema/nvptx-address-spaces.c
M clang/test/Sema/pragma-attribute-strict-subjects.c
A clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
A clang/test/SemaCUDA/spirv-attrs.cu
A clang/test/SemaCXX/attr-annotate-ast.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/builtin-bit-cast.cpp
M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp
A clang/test/SemaCXX/cxx2b-warn-shadow.cpp
M clang/test/SemaCXX/integer-overflow.cpp
M clang/test/SemaCXX/warn-missing-noreturn.cpp
M clang/test/SemaCXX/warn-shadow.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
M clang/test/SemaCXX/warn-unused-result.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/clip-errors.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
M clang/test/SemaObjC/comptypes-legal.m
A clang/test/SemaObjC/method-param-named-id.m
A clang/test/SemaOpenACC/combined-construct-async-clause.c
A clang/test/SemaOpenACC/combined-construct-async-clause.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-default-ast.cpp
A clang/test/SemaOpenACC/combined-construct-default-clause.c
A clang/test/SemaOpenACC/combined-construct-default-clause.cpp
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-clause.c
A clang/test/SemaOpenACC/combined-construct-private-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-firstprivate-ast.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
M clang/test/SemaOpenACC/compute-construct-firstprivate-clause.cpp
M clang/test/SemaOpenCL/access-qualifier.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
R clang/tools/amdgpu-arch/AMDGPUArchByHSA.cpp
A clang/tools/amdgpu-arch/AMDGPUArchByKFD.cpp
M clang/tools/amdgpu-arch/CMakeLists.txt
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-shlib/CMakeLists.txt
A clang/tools/clang-shlib/simple_version_script.map.in
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/EvaluateAsRValueTest.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/Analysis/CloneDetectionTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/ASTSelectionTest.cpp
A clang/unittests/Tooling/CRTPTestVisitor.h
M clang/unittests/Tooling/CastExprTest.cpp
M clang/unittests/Tooling/CommentHandlerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ExecutionTest.cpp
M clang/unittests/Tooling/LexicallyOrderedRecursiveASTVisitorTest.cpp
M clang/unittests/Tooling/LookupTest.cpp
M clang/unittests/Tooling/QualTypeNamesTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestDeclVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestPostOrderVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestTypeLocVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Attr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/BitfieldInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXBoolLiteralExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMemberCall.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXOperatorCallExprTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CallbacksCommon.h
M clang/unittests/Tooling/RecursiveASTVisitorTests/Class.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Concept.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ConstructExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeclRefExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeductionGuide.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtorInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/IntegerLiteral.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaDefaultCapture.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaTemplateParams.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/MemberPointerTypeLoc.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/NestedNameSpecifiers.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ParenExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TemplateArgumentLocTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TraversalScope.cpp
M clang/unittests/Tooling/RefactoringTest.cpp
M clang/unittests/Tooling/SourceCodeTest.cpp
M clang/unittests/Tooling/TestVisitor.h
M clang/unittests/Tooling/ToolingTest.cpp
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/ClangDataCollectorsEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/analyzer/exploded-graph-rewriter.py
M clang/www/c_status.html
M cmake/Modules/CMakePolicy.cmake
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/windows.inc
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/msan/tests/msan_test.cpp
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.h
M compiler-rt/lib/rtsan/rtsan_flags.inc
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary64.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/tests/sanitizer_block_signals.cpp
A compiler-rt/test/orc/TestCases/Darwin/Generic/trivial-cxx-constructor.cpp
M compiler-rt/test/profile/ContinuousSyncMode/basic.c
M compiler-rt/test/profile/ContinuousSyncMode/get-filename.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-no-counters.c
A compiler-rt/test/profile/ContinuousSyncMode/multi-threaded.cpp
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
M compiler-rt/test/profile/ContinuousSyncMode/pid-substitution.c
M compiler-rt/test/profile/ContinuousSyncMode/reset-default-profile.c
M compiler-rt/test/profile/ContinuousSyncMode/set-filename.c
A compiler-rt/test/profile/Linux/binary-id-offset.c
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/rtsan/deduplicate_errors.cpp
A compiler-rt/test/rtsan/report_error_summary.cpp
R flang/CODE_OWNERS.TXT
A flang/Maintainers.txt
M flang/docs/ParserCombinators.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Lower/StatementContext.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/OpenMP/Passes.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/CUFCommon.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/memory.h
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Runtime/freestanding-tools.h
M flang/include/flang/Semantics/openmp-directive-sets.h
A flang/include/flang/Semantics/openmp-modifiers.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/CMakeLists.txt
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/type-parsers.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/CMakeLists.txt
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/runtime/sum.cpp
M flang/runtime/transformational.cpp
M flang/test/Driver/dynamic-linker.f90
M flang/test/Driver/isysroot.f90
A flang/test/Evaluate/bug115923.f90
M flang/test/Evaluate/folding09.f90
M flang/test/Evaluate/int8.f90
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
A flang/test/Fir/CUDA/cuda-device-context.mlir
M flang/test/Fir/CUDA/cuda-device-global.f90
A flang/test/Fir/CUDA/cuda-extranal-mangling.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
A flang/test/Fir/target-rewrite-integer-loongarch64.fir
A flang/test/HLFIR/bufferize-workshare.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
A flang/test/Integration/OpenMP/workshare-array-array-assign.f90
A flang/test/Integration/OpenMP/workshare-axpy.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
A flang/test/Lower/CUDA/cuda-return01.cuf
A flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/HLFIR/maxloc.f90
M flang/test/Lower/HLFIR/maxval.f90
M flang/test/Lower/HLFIR/minloc.f90
M flang/test/Lower/HLFIR/minval.f90
A flang/test/Lower/OpenMP/Todo/defaultmap-clause.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-depobj.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
R flang/test/Lower/OpenMP/Todo/loop-directive.f90
A flang/test/Lower/OpenMP/Todo/map-mapper.f90
M flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
M flang/test/Lower/OpenMP/Todo/reduction-modifiers.f90
A flang/test/Lower/OpenMP/Todo/scope-allocate.f90
A flang/test/Lower/OpenMP/Todo/scope-firstprivate.f90
M flang/test/Lower/OpenMP/Todo/task_detach.f90
M flang/test/Lower/OpenMP/Todo/task_untied.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
A flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
A flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M flang/test/Lower/OpenMP/workshare.f90
M flang/test/Parser/OpenMP/affinity-clause.f90
A flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Parser/OpenMP/defaultmap-unparse.f90
M flang/test/Parser/OpenMP/depobj-construct.f90
M flang/test/Parser/OpenMP/from-clause.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
A flang/test/Parser/OpenMP/scan.f90
M flang/test/Parser/OpenMP/target-update-to-clause.f90
A flang/test/Parser/recovery07.f90
A flang/test/Preprocessing/not-an-exponent.F90
A flang/test/Preprocessing/pp046.F
M flang/test/Semantics/OpenMP/combined-constructs.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v50.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/do05.f90
A flang/test/Semantics/OpenMP/map-clause-symbols.f90
M flang/test/Semantics/OpenMP/map-clause.f90
M flang/test/Semantics/OpenMP/nested-barrier.f90
M flang/test/Semantics/OpenMP/nested-master.f90
M flang/test/Semantics/OpenMP/nested-simd.f90
M flang/test/Semantics/OpenMP/ordered-simd.f90
M flang/test/Semantics/OpenMP/reduction-modifiers.f90
A flang/test/Semantics/OpenMP/scan1.f90
A flang/test/Semantics/OpenMP/scan2.f90
A flang/test/Semantics/bind-c17.f90
A flang/test/Semantics/bug115674.f90
M flang/test/Semantics/c_f_pointer.f90
M flang/test/Semantics/call38.f90
M flang/test/Semantics/io03.f90
M flang/test/Semantics/io04.f90
A flang/test/Semantics/pointer02.f90
A flang/test/Semantics/smp-def02.f90
M flang/test/Semantics/undef-result01.f90
A flang/test/Transforms/OpenMP/lower-workshare-alloca.mlir
A flang/test/Transforms/OpenMP/lower-workshare-binding.mlir
A flang/test/Transforms/OpenMP/lower-workshare-cleanup.mlir
A flang/test/Transforms/OpenMP/lower-workshare-copyprivate.mlir
A flang/test/Transforms/OpenMP/lower-workshare-correct-parallelize.mlir
A flang/test/Transforms/OpenMP/lower-workshare-no-single.mlir
A flang/test/Transforms/OpenMP/lower-workshare-nowait.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg-dom.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg.mlir
A flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
A flang/test/Transforms/debug-class-type.fir
M flang/test/Transforms/omp-map-info-finalization.fir
M flang/tools/bbc/bbc.cpp
M flang/tools/tco/tco.cpp
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/LibcBenchmark.h
M libc/benchmarks/MemorySizeDistributions.cpp
M libc/docs/gpu/rpc.rst
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/fuzzing/__support/hashtable_fuzz.cpp
M libc/fuzzing/math/Compare.h
M libc/include/llvm-libc-types/rpc_opcodes_t.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/HashTable/generic/bitmask_impl.inc
M libc/src/__support/OSUtil/gpu/exit.cpp
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_client.h
M libc/src/__support/RPC/rpc_util.h
M libc/src/__support/block.h
M libc/src/__support/common.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/__support/hash.h
M libc/src/__support/time/linux/CMakeLists.txt
A libc/src/__support/time/linux/clock_gettime.cpp
M libc/src/__support/time/linux/clock_gettime.h
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/tanhf16.cpp
M libc/src/stdio/gpu/file.h
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/src/stdlib/gpu/abort.cpp
M libc/src/string/string_utils.h
M libc/test/integration/scudo/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/HashTable/table_test.cpp
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
M libc/utils/gpu/server/llvmlibc_rpc_server.h
M libc/utils/gpu/server/rpc_server.cpp
M libcxx/CMakeLists.txt
M libcxx/include/CMakeLists.txt
M libcxx/include/__atomic/atomic.h
R libcxx/include/__atomic/atomic_base.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/include/__chrono/time_point.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__cxx03/__chrono/formatter.h
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale_dir/locale_base_api.h
A libcxx/include/__locale_dir/pad_and_output.h
M libcxx/include/__memory/allocator_arg_t.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__mutex/unique_lock.h
M libcxx/include/__ostream/basic_ostream.h
A libcxx/include/__ostream/put_character_sequence.h
M libcxx/include/__ranges/to.h
M libcxx/include/__system_error/system_error.h
A libcxx/include/__system_error/throw_system_error.h
M libcxx/include/__thread/thread.h
M libcxx/include/__utility/scope_guard.h
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/atomic
M libcxx/include/barrier
M libcxx/include/bit
M libcxx/include/charconv
M libcxx/include/compare
M libcxx/include/expected
M libcxx/include/forward_list
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/iomanip
M libcxx/include/latch
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/mdspan
M libcxx/include/memory_resource
M libcxx/include/module.modulemap
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/ratio
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/string
M libcxx/include/strstream
M libcxx/include/thread
M libcxx/src/barrier.cpp
M libcxx/src/chrono.cpp
M libcxx/src/filesystem/filesystem_clock.cpp
M libcxx/src/random.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/CMakeLists.txt
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/GenerateInput.h
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/deque.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/benchmarks/vector_operations.bench.cpp
M libcxx/test/configs/cmake-bridge.cfg.in
M libcxx/test/libcxx/thread/thread.stoptoken/atomic_unique_lock.pass.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
A libcxx/test/std/containers/sequences/vector/vector.modifiers/common.h
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter_iter.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
M libcxx/test/std/thread/futures/futures.async/async.pass.cpp
M libcxx/test/std/thread/thread.semaphore/max.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.cat/is_array.pass.cpp
M libcxx/test/std/utilities/utility/pairs/pairs.pair/ctor.default.pass.cpp
M libcxx/utils/ci/docker-compose.yml
R libcxx/utils/ci/macos-ci-setup
M libcxx/utils/libcxx/test/format.py
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/DriverUtils.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Writer.cpp
M lld/Common/ErrorHandler.cpp
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Driver.h
M lld/ELF/DriverUtils.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Driver.h
M lld/MachO/DriverUtils.cpp
M lld/MachO/ICF.cpp
M lld/MachO/ICF.h
M lld/MachO/InputFiles.cpp
M lld/MachO/InputFiles.h
M lld/MachO/InputSection.h
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Target.h
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/docs/ReleaseNotes.rst
M lld/include/lld/Common/ErrorHandler.h
M lld/include/lld/Common/LLVM.h
M lld/test/COFF/arm64ec-delayimport.test
A lld/test/COFF/arm64ec-invalid-name.s
M lld/test/ELF/aarch64-abs64-dyn.s
M lld/test/ELF/aarch64-cortex-a53-843419-address.s
M lld/test/ELF/aarch64-cortex-a53-843419-large.s
M lld/test/ELF/aarch64-cortex-a53-843419-large2.s
M lld/test/ELF/aarch64-cortex-a53-843419-nopatch.s
M lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
M lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
M lld/test/ELF/aarch64-feature-pauth.s
M lld/test/ELF/aarch64-fpic-abs16.s
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-adr_prel_lo21.s
M lld/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s
M lld/test/ELF/aarch64-fpic-got.s
M lld/test/ELF/aarch64-fpic-ldst32_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst64_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst8_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-prel16.s
M lld/test/ELF/aarch64-fpic-prel32.s
M lld/test/ELF/aarch64-fpic-prel64.s
M lld/test/ELF/aarch64-gnu-ifunc-address.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable2.s
M lld/test/ELF/aarch64-gnu-ifunc-nosym.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-gnu-ifunc.s
M lld/test/ELF/aarch64-gnu-ifunc2.s
M lld/test/ELF/aarch64-got-weak-undef.s
M lld/test/ELF/aarch64-ifunc-bti.s
M lld/test/ELF/aarch64-lo12-alignment.s
M lld/test/ELF/aarch64-memtag-android-abi.s
M lld/test/ELF/aarch64-memtag-globals.s
A lld/test/ELF/aarch64-thunk-bti-multipass.s
M lld/test/ELF/aarch64-thunk-bti.s
M lld/test/ELF/aarch64-undefined-weak.s
M lld/test/ELF/hexagon-jump-error.s
M lld/test/ELF/hexagon.s
M lld/test/ELF/lto/riscv-attributes.ll
M lld/test/ELF/pack-dyn-relocs-loop.s
M lld/test/ELF/riscv-attributes.s
M lld/test/ELF/x86-64-gotpc-no-relax-err.s
M lld/test/ELF/x86-64-gotpc-relax-nopic.s
M lld/test/ELF/x86-64-gotpc-relax.s
A lld/test/MachO/Inputs/liballowable_client.dylib
A lld/test/MachO/allowable-client.s
A lld/test/MachO/cgdata-generate-merge.s
M lld/test/MachO/icf-safe-thunks-dwarf.ll
M lld/test/MinGW/driver.test
M lld/test/wasm/tls-non-shared-memory.s
M lld/wasm/Driver.cpp
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
M lldb/bindings/interface/SBTargetExtensions.i
M lldb/docs/use/links.rst
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/API/SBBreakpointName.h
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/API/SBStructuredData.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Expression/UserExpression.h
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Host/MainLoopBase.h
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/include/lldb/Host/windows/MainLoopWindows.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Target/LanguageRuntime.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/ThreadPlanStack.h
M lldb/include/lldb/Utility/CompletionRequest.h
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Host/common/MainLoopBase.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.h
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.cpp
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStack.cpp
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
M lldb/test/API/commands/expression/fixits/TestFixIts.py
M lldb/test/API/commands/process/detach-resumes/TestDetachResumes.py
M lldb/test/API/commands/statistics/basic/TestStats.py
A lldb/test/API/commands/statistics/basic/second.cpp
A lldb/test/API/functionalities/scripted_process_empty_memory_region/Makefile
A lldb/test/API/functionalities/scripted_process_empty_memory_region/TestScriptedProcessEmptyMemoryRegion.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/dummy_scripted_process.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/main.c
A lldb/test/API/lang/cpp/forward/Makefile
A lldb/test/API/lang/cpp/forward/TestCPPForwardDeclaration.py
A lldb/test/API/lang/cpp/forward/foo.cpp
A lldb/test/API/lang/cpp/forward/foo.h
A lldb/test/API/lang/cpp/forward/main.cpp
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
M lldb/test/API/lang/cpp/stl/TestStdCXXDisassembly.py
A lldb/test/API/lang/objc/languageinfo/Makefile
A lldb/test/API/lang/objc/languageinfo/TestObjCLanguageSpecificData.py
A lldb/test/API/lang/objc/languageinfo/main.m
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/API/source-manager/TestSourceManager.py
A lldb/test/API/terminal/TestEditlineCompletions.py
M lldb/test/Shell/Minidump/Windows/find-module.test
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_ranges-missing-section.s
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-inline-function.s
M lldb/test/Shell/SymbolFile/DWARF/x86/member-pointers.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
M lldb/test/Shell/Unwind/windows-unaligned-x86_64.test
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Host/MainLoopTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/cmake/config-ix.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/HowToAddABuilder.rst
M llvm/docs/LangRef.rst
M llvm/docs/Passes.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SPIRVUsage.rst
M llvm/docs/WritingAnLLVMBackend.rst
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/DepthFirstIterator.h
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/ADT/iterator_range.h
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/Analysis/MemorySSAUpdater.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/include/llvm/CodeGen/CodeGenTargetMachineImpl.h
M llvm/include/llvm/CodeGen/EdgeBundles.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalMergeFunctions.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
M llvm/include/llvm/CodeGen/MachineModuleInfo.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/PeepholeOptimizer.h
A llvm/include/llvm/CodeGen/RegUsageInfoCollector.h
A llvm/include/llvm/CodeGen/RegUsageInfoPropagate.h
M llvm/include/llvm/CodeGen/RegisterUsageInfo.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
A llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/InstrProfWriter.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/include/llvm/Transforms/Coroutines/ABI.h
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/include/llvm/Transforms/Scalar/MemCpyOptimizer.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
A llvm/include/llvm/Transforms/Utils/IRNormalizer.h
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/CFIFixup.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
A llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/EdgeBundles.cpp
M llvm/lib/CodeGen/ExpandMemCmp.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelperArtifacts.cpp
M llvm/lib/CodeGen/GlobalISel/GIMatchTableExecutor.cpp
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
M llvm/lib/CodeGen/InitUndef.cpp
R llvm/lib/CodeGen/LLVMTargetMachine.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineModuleInfo.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SpillPlacement.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp
M llvm/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugStringTableSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugSubsectionVisitor.cpp
M llvm/lib/DebugInfo/CodeView/GlobalTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/LazyRandomTypeCollection.cpp
M llvm/lib/DebugInfo/CodeView/MergingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/SymbolSerializer.cpp
M llvm/lib/DebugInfo/CodeView/TypeTableCollection.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/GSYM/ExtractRanges.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/DebugInfo/GSYM/InlineInfo.cpp
M llvm/lib/DebugInfo/GSYM/LookupResult.cpp
M llvm/lib/DebugInfo/GSYM/ObjectFileTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSort.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSupport.cpp
M llvm/lib/DebugInfo/LogicalView/LVReaderHandler.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/DebugInfo/PDB/Native/DbiModuleList.cpp
M llvm/lib/DebugInfo/PDB/Native/FormatUtil.cpp
M llvm/lib/DebugInfo/PDB/Native/GlobalsStream.cpp
M llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
M llvm/lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp
M llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumGlobals.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumInjectedSources.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumLineNumbers.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumSymbols.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeSession.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeArray.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeVTShape.cpp
M llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolCompiland.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFunc.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolPublicSymbol.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp
M llvm/lib/DebugInfo/Symbolize/Markup.cpp
M llvm/lib/DebugInfo/Symbolize/MarkupFilter.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
M llvm/lib/ExecutionEngine/ExecutionEngineBindings.cpp
M llvm/lib/ExecutionEngine/GDBRegistrationListener.cpp
M llvm/lib/ExecutionEngine/JITLink/COFF.cpp
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileOnDemandLayer.cpp
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/DebugUtils.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/IRTransformLayer.cpp
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
A llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/Mangling.cpp
M llvm/lib/ExecutionEngine/Orc/MapperJITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectFileInterface.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp
M llvm/lib/ExecutionEngine/SectionMemoryManager.cpp
M llvm/lib/Frontend/Atomic/Atomic.cpp
M llvm/lib/Frontend/HLSL/HLSLResource.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenACC/ACC.cpp
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/Operations.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantFold.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/DIExpressionOptimizer.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Operator.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
M llvm/lib/MCA/HardwareUnits/LSUnit.cpp
M llvm/lib/MCA/HardwareUnits/Scheduler.cpp
M llvm/lib/ObjCopy/Archive.cpp
M llvm/lib/ObjCopy/COFF/COFFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
M llvm/lib/ObjCopy/ObjCopy.cpp
M llvm/lib/ObjCopy/XCOFF/XCOFFObjcopy.cpp
M llvm/lib/ObjCopy/wasm/WasmObject.cpp
M llvm/lib/ObjCopy/wasm/WasmWriter.cpp
M llvm/lib/Object/Archive.cpp
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/MachOUniversal.cpp
M llvm/lib/Object/Minidump.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/Object/RelocationResolver.cpp
M llvm/lib/Object/TapiFile.cpp
M llvm/lib/Object/TapiUniversal.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/ArchiveEmitter.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLTypeHashing.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFYAML.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/ObjectYAML/MinidumpYAML.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/ObjectYAML/yaml2obj.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp
M llvm/lib/ProfileData/Coverage/CoverageMappingWriter.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/ARMBuildAttrs.cpp
M llvm/lib/Support/ConvertUTFWrapper.cpp
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/MSP430AttributeParser.cpp
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/NativeFormatting.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/Process.cpp
M llvm/lib/Support/SuffixTreeNode.cpp
M llvm/lib/Support/Threading.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/ARMScheduleM7.td
M llvm/lib/Target/ARM/ARMScheduleM85.td
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRFrameLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRSubtarget.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.h
M llvm/lib/Target/AVR/AVRTargetObjectFile.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.cpp
M llvm/lib/Target/BPF/BPFIRPeephole.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFPreserveDIType.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.h
M llvm/lib/Target/BPF/GISel/BPFCallLowering.cpp
M llvm/lib/Target/BPF/GISel/BPFInstructionSelector.cpp
M llvm/lib/Target/BPF/GISel/BPFLegalizerInfo.cpp
M llvm/lib/Target/BPF/GISel/BPFRegisterBankInfo.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.h
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
M llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
M llvm/lib/Target/Hexagon/HexagonGenMemAbsolute.cpp
M llvm/lib/Target/Hexagon/HexagonGenMux.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/Hexagon/HexagonPeephole.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
M llvm/lib/Target/Hexagon/RDFCopy.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSubtarget.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.h
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrFormats.td
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.h
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.h
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsFrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsMulMulBugPass.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.h
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
M llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
M llvm/lib/Target/PowerPC/PPCCCState.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoopsVerify.cpp
M llvm/lib/Target/PowerPC/PPCCallingConv.cpp
M llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
M llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCVSXCopy.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.h
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
M llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp
M llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrDFP.td
M llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
M llvm/lib/Target/SystemZ/SystemZTDC.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.h
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/LVLGen.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEFrameLowering.cpp
M llvm/lib/Target/VE/VEISelDAGToDAG.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.td
M llvm/lib/Target/VE/VERegisterInfo.cpp
M llvm/lib/Target/VE/VESubtarget.cpp
M llvm/lib/Target/VE/VETargetMachine.cpp
M llvm/lib/Target/VE/VETargetMachine.h
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyNullifyDebugValueLists.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetObjectFile.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86DiscriminateMemOps.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86ReplaceableInstrs.def
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeClient.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.td
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.h
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaTargetMachine.h
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/SubtargetFeature.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/TextAPI/InterfaceFile.cpp
M llvm/lib/TextAPI/Utils.cpp
M llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
A llvm/lib/Transforms/Utils/IRNormalizer.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/LoopAccessAnalysis/select-dependence.ll
A llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
A llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
A llvm/test/Analysis/ScalarEvolution/pr116483.ll
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/target-type-properties.ll
M llvm/test/Bitcode/summary_version.ll
M llvm/test/Bitcode/vscale-shuffle.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
R llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-ext.ll
M llvm/test/CodeGen/AArch64/arm64-extract_subvector.ll
M llvm/test/CodeGen/AArch64/arm64-ld1.ll
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
A llvm/test/CodeGen/AArch64/cfi-fixup-multi-section.mir
M llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
M llvm/test/CodeGen/AArch64/ext-narrow-index.ll
A llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/init-undef.mir
M llvm/test/CodeGen/AArch64/ls64-inline-asm.ll
M llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
A llvm/test/CodeGen/AArch64/phi.ll
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AArch64/preserve.ll
A llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
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A llvm/test/CodeGen/DirectX/discard_error.ll
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M llvm/test/CodeGen/RISCV/llvm.exp10.ll
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M llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
M llvm/test/CodeGen/RISCV/lsr-legaladdimm.ll
M llvm/test/CodeGen/RISCV/machine-combiner.ll
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/machinelicm-constant-phys-reg.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
A llvm/test/CodeGen/RISCV/memset-pattern.ll
M llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr51206.ll
M llvm/test/CodeGen/RISCV/pr56457.ll
M llvm/test/CodeGen/RISCV/pr58511.ll
M llvm/test/CodeGen/RISCV/pr65025.ll
M llvm/test/CodeGen/RISCV/pr68855.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/pr84653_pr85190.ll
M llvm/test/CodeGen/RISCV/pr95271.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/riscv-shifted-extend.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
A llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zba.ll
M llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv32zbs.ll
M llvm/test/CodeGen/RISCV/rv64-double-convert.ll
M llvm/test/CodeGen/RISCV/rv64-float-convert.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
A llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv64-trampoline.ll
M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll
M llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/rvv/65704-illegal-instruction.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
A llvm/test/CodeGen/RISCV/rvv/combine-ctpop-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access-zve32x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-scalarized.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-rotate.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrol.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vror.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
M llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/frint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/frm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
A llvm/test/CodeGen/RISCV/rvv/intrinsic-vector-match.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-combine.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mutate-prior-vsetvli-avl.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr52475.ll
M llvm/test/CodeGen/RISCV/rvv/pr61561.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
A llvm/test/CodeGen/RISCV/rvv/rv32-zve-bitcast-crash.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/sshl_sat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
A llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
A llvm/test/CodeGen/RISCV/rvv/vector-tuple-align.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfirst-byte-compare-index.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.ll
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vzext-vp.ll
M llvm/test/CodeGen/RISCV/sadd_sat.ll
M llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shift-amount-mod.ll
M llvm/test/CodeGen/RISCV/shift-and.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shlimm-addimm.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/RISCV/signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/split-offsets.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/unroll-loop-cse.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/usub_sat_plus.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xtheadmac.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/idot.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
A llvm/test/CodeGen/SPIRV/iaddcarry-builtin.ll
M llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
A llvm/test/CodeGen/SPIRV/isubborrow-builtin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types-vs-calllowering-unwrapped.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types-vs-calllowering.ll
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
A llvm/test/CodeGen/WinEH/wineh-dynamic-alloca.ll
A llvm/test/CodeGen/WinEH/wineh-inlined-inalloca.ll
M llvm/test/CodeGen/X86/GlobalISel/select-extract-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-extract-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-unmerge-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-unmerge-vec512.mir
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/cpus-intel.ll
M llvm/test/CodeGen/X86/ipra-inline-asm.ll
M llvm/test/CodeGen/X86/ipra-reg-usage.ll
A llvm/test/CodeGen/X86/movrs-builtins.ll
A llvm/test/CodeGen/X86/movrs-prefetch-builtins.ll
M llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Commit: f2412e48bd6885a792d75647af99a78250d09f84
https://github.com/llvm/llvm-project/commit/f2412e48bd6885a792d75647af99a78250d09f84
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M .ci/generate_test_report.py
M .github/new-issues-labeler.yml
M .github/workflows/libcxx-build-and-test.yaml
A .github/workflows/libcxx-build-containers.yml
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/X86/exceptions-compact.s
A bolt/test/X86/pie-eh-split-undo.s
A bolt/test/eh-frame-hdr.test
A bolt/test/eh-frame-overwrite.test
M bolt/test/runtime/X86/Inputs/pie-exceptions-failed-split.s
R bolt/test/runtime/X86/pie-exceptions-failed-split.test
A bolt/test/runtime/X86/pie-exceptions-split.test
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.h
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang-tools-extra/test/CMakeLists.txt
A clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
M clang/Maintainers.rst
M clang/cmake/caches/CrossWinToARMLinux.cmake
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/AddressSanitizer.rst
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LeakSanitizer.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/CanonicalType.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
M clang/include/clang/Analysis/CallGraph.h
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
M clang/include/clang/Basic/BuiltinsLoongArchLSX.def
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticRefactoringKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_mve.td
M clang/include/clang/Basic/arm_mve_defs.td
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_neon_incl.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Interpreter/PartialTranslationUnit.h
R clang/include/clang/Parse/ParseDiagnostic.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/module.modulemap
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/CommentCommandTraits.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DeclarationName.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OSLog.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtIterator.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTTBuilder.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/CallGraph.cpp
M clang/lib/Analysis/CalledOnceCheck.cpp
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/ProgramPoint.cpp
M clang/lib/Analysis/ReachableCode.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/SourceManager.cpp
A clang/lib/Basic/TargetDefines.h
M clang/lib/Basic/Targets.h
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/LinkInModulesPass.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/DriverOptions.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/cuda_wrappers/new
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/larchintrin.h
M clang/lib/Headers/lasxintrin.h
M clang/lib/Headers/limits.h
M clang/lib/Headers/lsxintrin.h
A clang/lib/Headers/movrsintrin.h
M clang/lib/Headers/nvptxintrin.h
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/IncrementalExecutor.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Interpreter/Wasm.h
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/MacroArgs.cpp
M clang/lib/Lex/MacroInfo.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPCallbacks.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/PreprocessingRecord.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/PreprocessorLexer.cpp
M clang/lib/Lex/TokenLexer.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/ScopeInfo.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaFixItUtils.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M clang/lib/StaticAnalyzer/Checkers/CastToStructChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
M clang/lib/StaticAnalyzer/Checkers/IdenticalExprChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCMissingSuperCallChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
M clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/lifetimebound.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
M clang/test/AST/arm-mfp8.cpp
M clang/test/AST/ast-dump-recovery.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
M clang/test/Analysis/store-dump-orders.cpp
M clang/test/Analysis/taint-generic.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p3.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.noreturn/p1.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp
M clang/test/CXX/drs/cwg158.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/CodeGen/AArch64/debug-types.c
M clang/test/CodeGen/AArch64/elf-pauthabi.c
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-inline.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-weak.c
M clang/test/CodeGen/PowerPC/musttail-indirect.cpp
M clang/test/CodeGen/PowerPC/musttail-inline.c
M clang/test/CodeGen/PowerPC/musttail-undefined.c
M clang/test/CodeGen/PowerPC/musttail-weak.c
M clang/test/CodeGen/PowerPC/musttail.c
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/SystemZ/zos-mixed-ptr-sizes.c
A clang/test/CodeGen/X86/movrs-builtins.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/X86/x86_64-PR42672.c
M clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGen/arm-mve-intrinsics/compare.c
M clang/test/CodeGen/arm-vfp16-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-ifunc.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/blocks.c
A clang/test/CodeGen/embed-bitcode-marker-with-nonzero-as.c
A clang/test/CodeGen/ifunc-win.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
A clang/test/CodeGen/ptrauth-module-flags.c
A clang/test/CodeGen/scoped-fence-ops.c
A clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/tbaa-struct-bitfield-endianness.cpp
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
A clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
M clang/test/CodeGenCXX/aarch64-sve-vector-conditional-op.cpp
A clang/test/CodeGenCXX/auto-var-init-attr.cpp
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
A clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
A clang/test/CodeGenHLSL/builtins/clip.hlsl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp
M clang/test/Driver/aarch64-implied-sme-features.c
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/amdgpu-openmp-system-arch-fail.c
M clang/test/Driver/arm-alignment.c
M clang/test/Driver/cl-zc.cpp
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/darwin-subframeworks.c
A clang/test/Driver/fprofile-sample-use.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mld-seq-sa.c
M clang/test/Driver/mingw.cpp
M clang/test/Driver/module-output.cppm
A clang/test/Driver/msp430-char.c
M clang/test/Driver/nvptx-cuda-system-arch.c
M clang/test/Driver/openmp-system-arch.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/relax.s
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/x86-march.c
M clang/test/Frontend/noderef.cpp
M clang/test/Headers/limits.cpp
M clang/test/Misc/pragma-attribute-strict-subjects.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Modules/no-eager-load.cppm
M clang/test/Modules/same-decl-in-different-modules.cppm
M clang/test/OpenMP/for_simd_loop_messages.cpp
M clang/test/OpenMP/masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/parallel_for_simd_messages.cpp
M clang/test/OpenMP/parallel_masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/simd_linear_messages.cpp
M clang/test/OpenMP/target_parallel_for_simd_ordered_messages.cpp
M clang/test/OpenMP/taskloop_simd_linear_messages.cpp
M clang/test/Parser/cxx2c-delete-with-message.cpp
M clang/test/Parser/pragma-attribute.cpp
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/ptrauth_feature.c
M clang/test/Refactor/Extract/ObjCProperty.m
A clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
A clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/arm-mfp8.c
M clang/test/Sema/arm-mfp8.cpp
M clang/test/Sema/asm.c
M clang/test/Sema/attr-nonblocking-constraints.cpp
M clang/test/Sema/c2x-nodiscard.c
M clang/test/Sema/constant_builtins_vector.cpp
A clang/test/Sema/nvptx-address-spaces.c
M clang/test/Sema/pragma-attribute-strict-subjects.c
A clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
A clang/test/SemaCUDA/spirv-attrs.cu
A clang/test/SemaCXX/attr-annotate-ast.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/builtin-bit-cast.cpp
M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp
A clang/test/SemaCXX/cxx2b-warn-shadow.cpp
M clang/test/SemaCXX/integer-overflow.cpp
M clang/test/SemaCXX/warn-missing-noreturn.cpp
M clang/test/SemaCXX/warn-shadow.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
M clang/test/SemaCXX/warn-unused-result.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/clip-errors.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
M clang/test/SemaObjC/comptypes-legal.m
A clang/test/SemaObjC/method-param-named-id.m
A clang/test/SemaOpenACC/combined-construct-async-clause.c
A clang/test/SemaOpenACC/combined-construct-async-clause.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-default-ast.cpp
A clang/test/SemaOpenACC/combined-construct-default-clause.c
A clang/test/SemaOpenACC/combined-construct-default-clause.cpp
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-clause.c
A clang/test/SemaOpenACC/combined-construct-private-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-firstprivate-ast.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
M clang/test/SemaOpenACC/compute-construct-firstprivate-clause.cpp
M clang/test/SemaOpenCL/access-qualifier.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
R clang/tools/amdgpu-arch/AMDGPUArchByHSA.cpp
A clang/tools/amdgpu-arch/AMDGPUArchByKFD.cpp
M clang/tools/amdgpu-arch/CMakeLists.txt
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-shlib/CMakeLists.txt
A clang/tools/clang-shlib/simple_version_script.map.in
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/EvaluateAsRValueTest.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/Analysis/CloneDetectionTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/ASTSelectionTest.cpp
A clang/unittests/Tooling/CRTPTestVisitor.h
M clang/unittests/Tooling/CastExprTest.cpp
M clang/unittests/Tooling/CommentHandlerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ExecutionTest.cpp
M clang/unittests/Tooling/LexicallyOrderedRecursiveASTVisitorTest.cpp
M clang/unittests/Tooling/LookupTest.cpp
M clang/unittests/Tooling/QualTypeNamesTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestDeclVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestPostOrderVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestTypeLocVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Attr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/BitfieldInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXBoolLiteralExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMemberCall.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXOperatorCallExprTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CallbacksCommon.h
M clang/unittests/Tooling/RecursiveASTVisitorTests/Class.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Concept.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ConstructExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeclRefExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeductionGuide.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtorInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/IntegerLiteral.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaDefaultCapture.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaTemplateParams.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/MemberPointerTypeLoc.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/NestedNameSpecifiers.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ParenExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TemplateArgumentLocTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TraversalScope.cpp
M clang/unittests/Tooling/RefactoringTest.cpp
M clang/unittests/Tooling/SourceCodeTest.cpp
M clang/unittests/Tooling/TestVisitor.h
M clang/unittests/Tooling/ToolingTest.cpp
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/ClangDataCollectorsEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/analyzer/exploded-graph-rewriter.py
M clang/www/c_status.html
M cmake/Modules/CMakePolicy.cmake
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/windows.inc
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/msan/tests/msan_test.cpp
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.h
M compiler-rt/lib/rtsan/rtsan_flags.inc
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary64.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/tests/sanitizer_block_signals.cpp
A compiler-rt/test/orc/TestCases/Darwin/Generic/trivial-cxx-constructor.cpp
M compiler-rt/test/profile/ContinuousSyncMode/basic.c
M compiler-rt/test/profile/ContinuousSyncMode/get-filename.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-no-counters.c
A compiler-rt/test/profile/ContinuousSyncMode/multi-threaded.cpp
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
M compiler-rt/test/profile/ContinuousSyncMode/pid-substitution.c
M compiler-rt/test/profile/ContinuousSyncMode/reset-default-profile.c
M compiler-rt/test/profile/ContinuousSyncMode/set-filename.c
A compiler-rt/test/profile/Linux/binary-id-offset.c
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/rtsan/deduplicate_errors.cpp
A compiler-rt/test/rtsan/report_error_summary.cpp
R flang/CODE_OWNERS.TXT
A flang/Maintainers.txt
M flang/docs/ParserCombinators.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Lower/StatementContext.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/OpenMP/Passes.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/CUFCommon.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/memory.h
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Runtime/freestanding-tools.h
M flang/include/flang/Semantics/openmp-directive-sets.h
A flang/include/flang/Semantics/openmp-modifiers.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/CMakeLists.txt
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/type-parsers.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/CMakeLists.txt
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/runtime/sum.cpp
M flang/runtime/transformational.cpp
M flang/test/Driver/dynamic-linker.f90
M flang/test/Driver/isysroot.f90
A flang/test/Evaluate/bug115923.f90
M flang/test/Evaluate/folding09.f90
M flang/test/Evaluate/int8.f90
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
A flang/test/Fir/CUDA/cuda-device-context.mlir
M flang/test/Fir/CUDA/cuda-device-global.f90
A flang/test/Fir/CUDA/cuda-extranal-mangling.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
A flang/test/Fir/target-rewrite-integer-loongarch64.fir
A flang/test/HLFIR/bufferize-workshare.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
A flang/test/Integration/OpenMP/workshare-array-array-assign.f90
A flang/test/Integration/OpenMP/workshare-axpy.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
A flang/test/Lower/CUDA/cuda-return01.cuf
A flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/HLFIR/maxloc.f90
M flang/test/Lower/HLFIR/maxval.f90
M flang/test/Lower/HLFIR/minloc.f90
M flang/test/Lower/HLFIR/minval.f90
A flang/test/Lower/OpenMP/Todo/defaultmap-clause.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-depobj.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
R flang/test/Lower/OpenMP/Todo/loop-directive.f90
A flang/test/Lower/OpenMP/Todo/map-mapper.f90
M flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
M flang/test/Lower/OpenMP/Todo/reduction-modifiers.f90
A flang/test/Lower/OpenMP/Todo/scope-allocate.f90
A flang/test/Lower/OpenMP/Todo/scope-firstprivate.f90
M flang/test/Lower/OpenMP/Todo/task_detach.f90
M flang/test/Lower/OpenMP/Todo/task_untied.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
A flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
A flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M flang/test/Lower/OpenMP/workshare.f90
M flang/test/Parser/OpenMP/affinity-clause.f90
A flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Parser/OpenMP/defaultmap-unparse.f90
M flang/test/Parser/OpenMP/depobj-construct.f90
M flang/test/Parser/OpenMP/from-clause.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
A flang/test/Parser/OpenMP/scan.f90
M flang/test/Parser/OpenMP/target-update-to-clause.f90
A flang/test/Parser/recovery07.f90
A flang/test/Preprocessing/not-an-exponent.F90
A flang/test/Preprocessing/pp046.F
M flang/test/Semantics/OpenMP/combined-constructs.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v50.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/do05.f90
A flang/test/Semantics/OpenMP/map-clause-symbols.f90
M flang/test/Semantics/OpenMP/map-clause.f90
M flang/test/Semantics/OpenMP/nested-barrier.f90
M flang/test/Semantics/OpenMP/nested-master.f90
M flang/test/Semantics/OpenMP/nested-simd.f90
M flang/test/Semantics/OpenMP/ordered-simd.f90
M flang/test/Semantics/OpenMP/reduction-modifiers.f90
A flang/test/Semantics/OpenMP/scan1.f90
A flang/test/Semantics/OpenMP/scan2.f90
A flang/test/Semantics/bind-c17.f90
A flang/test/Semantics/bug115674.f90
M flang/test/Semantics/c_f_pointer.f90
M flang/test/Semantics/call38.f90
M flang/test/Semantics/io03.f90
M flang/test/Semantics/io04.f90
A flang/test/Semantics/pointer02.f90
A flang/test/Semantics/smp-def02.f90
M flang/test/Semantics/undef-result01.f90
A flang/test/Transforms/OpenMP/lower-workshare-alloca.mlir
A flang/test/Transforms/OpenMP/lower-workshare-binding.mlir
A flang/test/Transforms/OpenMP/lower-workshare-cleanup.mlir
A flang/test/Transforms/OpenMP/lower-workshare-copyprivate.mlir
A flang/test/Transforms/OpenMP/lower-workshare-correct-parallelize.mlir
A flang/test/Transforms/OpenMP/lower-workshare-no-single.mlir
A flang/test/Transforms/OpenMP/lower-workshare-nowait.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg-dom.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg.mlir
A flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
A flang/test/Transforms/debug-class-type.fir
M flang/test/Transforms/omp-map-info-finalization.fir
M flang/tools/bbc/bbc.cpp
M flang/tools/tco/tco.cpp
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/LibcBenchmark.h
M libc/benchmarks/MemorySizeDistributions.cpp
M libc/docs/gpu/rpc.rst
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/fuzzing/__support/hashtable_fuzz.cpp
M libc/fuzzing/math/Compare.h
M libc/include/llvm-libc-types/rpc_opcodes_t.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/HashTable/generic/bitmask_impl.inc
M libc/src/__support/OSUtil/gpu/exit.cpp
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_client.h
M libc/src/__support/RPC/rpc_util.h
M libc/src/__support/block.h
M libc/src/__support/common.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/__support/hash.h
M libc/src/__support/time/linux/CMakeLists.txt
A libc/src/__support/time/linux/clock_gettime.cpp
M libc/src/__support/time/linux/clock_gettime.h
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/tanhf16.cpp
M libc/src/stdio/gpu/file.h
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/src/stdlib/gpu/abort.cpp
M libc/src/string/string_utils.h
M libc/test/integration/scudo/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/HashTable/table_test.cpp
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
M libc/utils/gpu/server/llvmlibc_rpc_server.h
M libc/utils/gpu/server/rpc_server.cpp
M libcxx/CMakeLists.txt
M libcxx/include/CMakeLists.txt
M libcxx/include/__atomic/atomic.h
R libcxx/include/__atomic/atomic_base.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/include/__chrono/time_point.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__cxx03/__chrono/formatter.h
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale_dir/locale_base_api.h
A libcxx/include/__locale_dir/pad_and_output.h
M libcxx/include/__memory/allocator_arg_t.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__mutex/unique_lock.h
M libcxx/include/__ostream/basic_ostream.h
A libcxx/include/__ostream/put_character_sequence.h
M libcxx/include/__ranges/to.h
M libcxx/include/__system_error/system_error.h
A libcxx/include/__system_error/throw_system_error.h
M libcxx/include/__thread/thread.h
M libcxx/include/__utility/scope_guard.h
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/atomic
M libcxx/include/barrier
M libcxx/include/bit
M libcxx/include/charconv
M libcxx/include/compare
M libcxx/include/expected
M libcxx/include/forward_list
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/iomanip
M libcxx/include/latch
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/mdspan
M libcxx/include/memory_resource
M libcxx/include/module.modulemap
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/ratio
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/string
M libcxx/include/strstream
M libcxx/include/thread
M libcxx/src/barrier.cpp
M libcxx/src/chrono.cpp
M libcxx/src/filesystem/filesystem_clock.cpp
M libcxx/src/random.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/CMakeLists.txt
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/GenerateInput.h
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/deque.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/benchmarks/vector_operations.bench.cpp
M libcxx/test/configs/cmake-bridge.cfg.in
M libcxx/test/libcxx/thread/thread.stoptoken/atomic_unique_lock.pass.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
A libcxx/test/std/containers/sequences/vector/vector.modifiers/common.h
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter_iter.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
M libcxx/test/std/thread/futures/futures.async/async.pass.cpp
M libcxx/test/std/thread/thread.semaphore/max.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.cat/is_array.pass.cpp
M libcxx/test/std/utilities/utility/pairs/pairs.pair/ctor.default.pass.cpp
M libcxx/utils/ci/docker-compose.yml
R libcxx/utils/ci/macos-ci-setup
M libcxx/utils/libcxx/test/format.py
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/DriverUtils.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Writer.cpp
M lld/Common/ErrorHandler.cpp
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Driver.h
M lld/ELF/DriverUtils.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Driver.h
M lld/MachO/DriverUtils.cpp
M lld/MachO/ICF.cpp
M lld/MachO/ICF.h
M lld/MachO/InputFiles.cpp
M lld/MachO/InputFiles.h
M lld/MachO/InputSection.h
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Target.h
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/docs/ReleaseNotes.rst
M lld/include/lld/Common/ErrorHandler.h
M lld/include/lld/Common/LLVM.h
M lld/test/COFF/arm64ec-delayimport.test
A lld/test/COFF/arm64ec-invalid-name.s
M lld/test/ELF/aarch64-abs64-dyn.s
M lld/test/ELF/aarch64-cortex-a53-843419-address.s
M lld/test/ELF/aarch64-cortex-a53-843419-large.s
M lld/test/ELF/aarch64-cortex-a53-843419-large2.s
M lld/test/ELF/aarch64-cortex-a53-843419-nopatch.s
M lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
M lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
M lld/test/ELF/aarch64-feature-pauth.s
M lld/test/ELF/aarch64-fpic-abs16.s
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-adr_prel_lo21.s
M lld/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s
M lld/test/ELF/aarch64-fpic-got.s
M lld/test/ELF/aarch64-fpic-ldst32_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst64_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst8_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-prel16.s
M lld/test/ELF/aarch64-fpic-prel32.s
M lld/test/ELF/aarch64-fpic-prel64.s
M lld/test/ELF/aarch64-gnu-ifunc-address.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable2.s
M lld/test/ELF/aarch64-gnu-ifunc-nosym.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-gnu-ifunc.s
M lld/test/ELF/aarch64-gnu-ifunc2.s
M lld/test/ELF/aarch64-got-weak-undef.s
M lld/test/ELF/aarch64-ifunc-bti.s
M lld/test/ELF/aarch64-lo12-alignment.s
M lld/test/ELF/aarch64-memtag-android-abi.s
M lld/test/ELF/aarch64-memtag-globals.s
A lld/test/ELF/aarch64-thunk-bti-multipass.s
M lld/test/ELF/aarch64-thunk-bti.s
M lld/test/ELF/aarch64-undefined-weak.s
M lld/test/ELF/hexagon-jump-error.s
M lld/test/ELF/hexagon.s
M lld/test/ELF/lto/riscv-attributes.ll
M lld/test/ELF/pack-dyn-relocs-loop.s
M lld/test/ELF/riscv-attributes.s
M lld/test/ELF/x86-64-gotpc-no-relax-err.s
M lld/test/ELF/x86-64-gotpc-relax-nopic.s
M lld/test/ELF/x86-64-gotpc-relax.s
A lld/test/MachO/Inputs/liballowable_client.dylib
A lld/test/MachO/allowable-client.s
A lld/test/MachO/cgdata-generate-merge.s
M lld/test/MachO/icf-safe-thunks-dwarf.ll
M lld/test/MinGW/driver.test
M lld/test/wasm/tls-non-shared-memory.s
M lld/wasm/Driver.cpp
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
M lldb/bindings/interface/SBTargetExtensions.i
M lldb/docs/use/links.rst
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/API/SBBreakpointName.h
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/API/SBStructuredData.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Expression/UserExpression.h
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Host/MainLoopBase.h
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/include/lldb/Host/windows/MainLoopWindows.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Target/LanguageRuntime.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/ThreadPlanStack.h
M lldb/include/lldb/Utility/CompletionRequest.h
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Host/common/MainLoopBase.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.h
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.cpp
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStack.cpp
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
M lldb/test/API/commands/expression/fixits/TestFixIts.py
M lldb/test/API/commands/process/detach-resumes/TestDetachResumes.py
M lldb/test/API/commands/statistics/basic/TestStats.py
A lldb/test/API/commands/statistics/basic/second.cpp
A lldb/test/API/functionalities/scripted_process_empty_memory_region/Makefile
A lldb/test/API/functionalities/scripted_process_empty_memory_region/TestScriptedProcessEmptyMemoryRegion.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/dummy_scripted_process.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/main.c
A lldb/test/API/lang/cpp/forward/Makefile
A lldb/test/API/lang/cpp/forward/TestCPPForwardDeclaration.py
A lldb/test/API/lang/cpp/forward/foo.cpp
A lldb/test/API/lang/cpp/forward/foo.h
A lldb/test/API/lang/cpp/forward/main.cpp
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
M lldb/test/API/lang/cpp/stl/TestStdCXXDisassembly.py
A lldb/test/API/lang/objc/languageinfo/Makefile
A lldb/test/API/lang/objc/languageinfo/TestObjCLanguageSpecificData.py
A lldb/test/API/lang/objc/languageinfo/main.m
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/API/source-manager/TestSourceManager.py
A lldb/test/API/terminal/TestEditlineCompletions.py
M lldb/test/Shell/Minidump/Windows/find-module.test
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_ranges-missing-section.s
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-inline-function.s
M lldb/test/Shell/SymbolFile/DWARF/x86/member-pointers.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
M lldb/test/Shell/Unwind/windows-unaligned-x86_64.test
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Host/MainLoopTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/cmake/config-ix.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/HowToAddABuilder.rst
M llvm/docs/LangRef.rst
M llvm/docs/Passes.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SPIRVUsage.rst
M llvm/docs/WritingAnLLVMBackend.rst
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/DepthFirstIterator.h
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/ADT/iterator_range.h
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/Analysis/MemorySSAUpdater.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/include/llvm/CodeGen/CodeGenTargetMachineImpl.h
M llvm/include/llvm/CodeGen/EdgeBundles.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalMergeFunctions.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
M llvm/include/llvm/CodeGen/MachineModuleInfo.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/PeepholeOptimizer.h
A llvm/include/llvm/CodeGen/RegUsageInfoCollector.h
A llvm/include/llvm/CodeGen/RegUsageInfoPropagate.h
M llvm/include/llvm/CodeGen/RegisterUsageInfo.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
A llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/InstrProfWriter.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/include/llvm/Transforms/Coroutines/ABI.h
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/include/llvm/Transforms/Scalar/MemCpyOptimizer.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
A llvm/include/llvm/Transforms/Utils/IRNormalizer.h
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/CFIFixup.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
A llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/EdgeBundles.cpp
M llvm/lib/CodeGen/ExpandMemCmp.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelperArtifacts.cpp
M llvm/lib/CodeGen/GlobalISel/GIMatchTableExecutor.cpp
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
M llvm/lib/CodeGen/InitUndef.cpp
R llvm/lib/CodeGen/LLVMTargetMachine.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineModuleInfo.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SpillPlacement.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp
M llvm/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugStringTableSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugSubsectionVisitor.cpp
M llvm/lib/DebugInfo/CodeView/GlobalTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/LazyRandomTypeCollection.cpp
M llvm/lib/DebugInfo/CodeView/MergingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/SymbolSerializer.cpp
M llvm/lib/DebugInfo/CodeView/TypeTableCollection.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/GSYM/ExtractRanges.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/DebugInfo/GSYM/InlineInfo.cpp
M llvm/lib/DebugInfo/GSYM/LookupResult.cpp
M llvm/lib/DebugInfo/GSYM/ObjectFileTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSort.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSupport.cpp
M llvm/lib/DebugInfo/LogicalView/LVReaderHandler.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/DebugInfo/PDB/Native/DbiModuleList.cpp
M llvm/lib/DebugInfo/PDB/Native/FormatUtil.cpp
M llvm/lib/DebugInfo/PDB/Native/GlobalsStream.cpp
M llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
M llvm/lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp
M llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumGlobals.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumInjectedSources.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumLineNumbers.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumSymbols.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeSession.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeArray.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeVTShape.cpp
M llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolCompiland.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFunc.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolPublicSymbol.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp
M llvm/lib/DebugInfo/Symbolize/Markup.cpp
M llvm/lib/DebugInfo/Symbolize/MarkupFilter.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
M llvm/lib/ExecutionEngine/ExecutionEngineBindings.cpp
M llvm/lib/ExecutionEngine/GDBRegistrationListener.cpp
M llvm/lib/ExecutionEngine/JITLink/COFF.cpp
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileOnDemandLayer.cpp
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/DebugUtils.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/IRTransformLayer.cpp
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
A llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/Mangling.cpp
M llvm/lib/ExecutionEngine/Orc/MapperJITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectFileInterface.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp
M llvm/lib/ExecutionEngine/SectionMemoryManager.cpp
M llvm/lib/Frontend/Atomic/Atomic.cpp
M llvm/lib/Frontend/HLSL/HLSLResource.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenACC/ACC.cpp
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/Operations.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantFold.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/DIExpressionOptimizer.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Operator.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
M llvm/lib/MCA/HardwareUnits/LSUnit.cpp
M llvm/lib/MCA/HardwareUnits/Scheduler.cpp
M llvm/lib/ObjCopy/Archive.cpp
M llvm/lib/ObjCopy/COFF/COFFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
M llvm/lib/ObjCopy/ObjCopy.cpp
M llvm/lib/ObjCopy/XCOFF/XCOFFObjcopy.cpp
M llvm/lib/ObjCopy/wasm/WasmObject.cpp
M llvm/lib/ObjCopy/wasm/WasmWriter.cpp
M llvm/lib/Object/Archive.cpp
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/MachOUniversal.cpp
M llvm/lib/Object/Minidump.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/Object/RelocationResolver.cpp
M llvm/lib/Object/TapiFile.cpp
M llvm/lib/Object/TapiUniversal.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/ArchiveEmitter.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLTypeHashing.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFYAML.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/ObjectYAML/MinidumpYAML.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/ObjectYAML/yaml2obj.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp
M llvm/lib/ProfileData/Coverage/CoverageMappingWriter.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/ARMBuildAttrs.cpp
M llvm/lib/Support/ConvertUTFWrapper.cpp
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/MSP430AttributeParser.cpp
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/NativeFormatting.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/Process.cpp
M llvm/lib/Support/SuffixTreeNode.cpp
M llvm/lib/Support/Threading.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/ARMScheduleM7.td
M llvm/lib/Target/ARM/ARMScheduleM85.td
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRFrameLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRSubtarget.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.h
M llvm/lib/Target/AVR/AVRTargetObjectFile.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.cpp
M llvm/lib/Target/BPF/BPFIRPeephole.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFPreserveDIType.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.h
M llvm/lib/Target/BPF/GISel/BPFCallLowering.cpp
M llvm/lib/Target/BPF/GISel/BPFInstructionSelector.cpp
M llvm/lib/Target/BPF/GISel/BPFLegalizerInfo.cpp
M llvm/lib/Target/BPF/GISel/BPFRegisterBankInfo.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.h
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
M llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
M llvm/lib/Target/Hexagon/HexagonGenMemAbsolute.cpp
M llvm/lib/Target/Hexagon/HexagonGenMux.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/Hexagon/HexagonPeephole.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
M llvm/lib/Target/Hexagon/RDFCopy.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSubtarget.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.h
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrFormats.td
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.h
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.h
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsFrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsMulMulBugPass.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.h
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
M llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
M llvm/lib/Target/PowerPC/PPCCCState.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoopsVerify.cpp
M llvm/lib/Target/PowerPC/PPCCallingConv.cpp
M llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
M llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCVSXCopy.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.h
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
M llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp
M llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrDFP.td
M llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
M llvm/lib/Target/SystemZ/SystemZTDC.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.h
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/LVLGen.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEFrameLowering.cpp
M llvm/lib/Target/VE/VEISelDAGToDAG.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.td
M llvm/lib/Target/VE/VERegisterInfo.cpp
M llvm/lib/Target/VE/VESubtarget.cpp
M llvm/lib/Target/VE/VETargetMachine.cpp
M llvm/lib/Target/VE/VETargetMachine.h
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyNullifyDebugValueLists.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetObjectFile.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86DiscriminateMemOps.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86ReplaceableInstrs.def
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeClient.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.td
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.h
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaTargetMachine.h
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/SubtargetFeature.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/TextAPI/InterfaceFile.cpp
M llvm/lib/TextAPI/Utils.cpp
M llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
A llvm/lib/Transforms/Utils/IRNormalizer.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/LoopAccessAnalysis/select-dependence.ll
A llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
A llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
A llvm/test/Analysis/ScalarEvolution/pr116483.ll
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/target-type-properties.ll
M llvm/test/Bitcode/summary_version.ll
M llvm/test/Bitcode/vscale-shuffle.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
R llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-ext.ll
M llvm/test/CodeGen/AArch64/arm64-extract_subvector.ll
M llvm/test/CodeGen/AArch64/arm64-ld1.ll
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
A llvm/test/CodeGen/AArch64/cfi-fixup-multi-section.mir
M llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
M llvm/test/CodeGen/AArch64/ext-narrow-index.ll
A llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/init-undef.mir
M llvm/test/CodeGen/AArch64/ls64-inline-asm.ll
M llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
A llvm/test/CodeGen/AArch64/phi.ll
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AArch64/preserve.ll
A llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/AArch64/sinksplat.ll
A llvm/test/CodeGen/AArch64/sve-intrinsics-fexpa.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll
A llvm/test/CodeGen/AArch64/sve-mov-imm-pred.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-extract-subvector.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll
A llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
M llvm/test/CodeGen/AArch64/zero-call-used-regs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
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M llvm/test/CodeGen/RISCV/pr95271.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/riscv-shifted-extend.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
A llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zba.ll
M llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv32zbs.ll
M llvm/test/CodeGen/RISCV/rv64-double-convert.ll
M llvm/test/CodeGen/RISCV/rv64-float-convert.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
A llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv64-trampoline.ll
M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll
M llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/rvv/65704-illegal-instruction.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
A llvm/test/CodeGen/RISCV/rvv/combine-ctpop-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access-zve32x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-scalarized.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-rotate.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrol.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vror.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
M llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/frint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/frm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
A llvm/test/CodeGen/RISCV/rvv/intrinsic-vector-match.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-combine.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mutate-prior-vsetvli-avl.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr52475.ll
M llvm/test/CodeGen/RISCV/rvv/pr61561.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
A llvm/test/CodeGen/RISCV/rvv/rv32-zve-bitcast-crash.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/sshl_sat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
A llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
A llvm/test/CodeGen/RISCV/rvv/vector-tuple-align.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfirst-byte-compare-index.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.ll
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vzext-vp.ll
M llvm/test/CodeGen/RISCV/sadd_sat.ll
M llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shift-amount-mod.ll
M llvm/test/CodeGen/RISCV/shift-and.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shlimm-addimm.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/RISCV/signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/split-offsets.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/unroll-loop-cse.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/usub_sat_plus.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xtheadmac.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/idot.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
A llvm/test/CodeGen/SPIRV/iaddcarry-builtin.ll
M llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
A llvm/test/CodeGen/SPIRV/isubborrow-builtin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types-vs-calllowering-unwrapped.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types-vs-calllowering.ll
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
A llvm/test/CodeGen/WinEH/wineh-dynamic-alloca.ll
A llvm/test/CodeGen/WinEH/wineh-inlined-inalloca.ll
M llvm/test/CodeGen/X86/GlobalISel/select-extract-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-extract-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-unmerge-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-unmerge-vec512.mir
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/cpus-intel.ll
M llvm/test/CodeGen/X86/ipra-inline-asm.ll
M llvm/test/CodeGen/X86/ipra-reg-usage.ll
A llvm/test/CodeGen/X86/movrs-builtins.ll
A llvm/test/CodeGen/X86/movrs-prefetch-builtins.ll
M llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
Log Message:
-----------
Rebase
Created using spr 1.3.6-beta.1
Compare: https://github.com/llvm/llvm-project/compare/e92f9c2afaf9...f2412e48bd68
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