[all-commits] [llvm/llvm-project] 04b295: [lldb][ObjC] Fix method list entry offset calculat...
Necip Fazil Yildiran via All-commits
all-commits at lists.llvm.org
Wed Nov 20 10:24:09 PST 2024
Branch: refs/heads/users/Prabhuk/sprmain.callsiteinfocallgraphsection-extract-and-propagate-indirect-call-type-ids
Home: https://github.com/llvm/llvm-project
Commit: 04b295e8938778251821f8a39903fdad0501112c
https://github.com/llvm/llvm-project/commit/04b295e8938778251821f8a39903fdad0501112c
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
Log Message:
-----------
[lldb][ObjC] Fix method list entry offset calculation (#115571)
The `relative_list_list_entry_t` offset field in the Objective-C runtime
is of type `int64_t`. There are cases where these offsets are negative
values. For negative offsets, LLDB would currently incorrectly
zero-extend the offset (dropping the fact that the offset was negative),
instead producing large offsets that, when added to the
`m_baseMethods_ptr` result in addresses that had their upper bits set
(e.g., `0x00017ff81b3241b0`). We then would try to `GetMethodList` from
such an address but fail to read it (because it's an invalid address).
This would manifest in Objective-C decls not getting completed correctly
(and formatters not working). We noticed this in CI failures on our
Intel bots. This happened to work fine on arm64 because we strip the
upper bits when calling `ClassDescriptorV2::method_list_t::Read` using
the `FixCodeAddress` ABI plugin API (which doesn't do that on Intel).
The fix is to sign-extend the offset calculation.
Example failure before this patch:
```
======================================================================
FAIL: test_break_dwarf (TestRuntimeTypes.RuntimeTypesTestCase)
Test setting objc breakpoints using '_regexp-break' and 'breakpoint set'.
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/michaelbuch/Git/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1769, in test_method
return attrvalue(self)
File "/Users/michaelbuch/Git/llvm-project/lldb/test/API/lang/objc/foundation/TestRuntimeTypes.py", line 48, in test_break
self.expect(
File "/Users/michaelbuch/Git/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 2370, in expect
self.runCmd(
File "/Users/michaelbuch/Git/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1000, in runCmd
self.assertTrue(self.res.Succeeded(), msg + output)
AssertionError: False is not true : Got a valid type
Error output:
error: <user expression 1>:1:11: no known method '+stringWithCString:encoding:'; cast the message send to the method's return type
1 | [NSString stringWithCString:"foo" encoding:1]
| ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Config=x86_64-/Users/michaelbuch/Git/lldb-build-main-no-modules/bin/clang
---------------------------------------------------------------------- ```
Commit: 00a1f1ab71302d190f8059d86a53ec62485fbce9
https://github.com/llvm/llvm-project/commit/00a1f1ab71302d190f8059d86a53ec62485fbce9
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/test/Dialect/MemRef/ops.mlir
M mlir/test/IR/core-ops.mlir
R mlir/test/IR/memory-ops.mlir
Log Message:
-----------
[MLIR] NFC. Move leftover memref op test cases out of test/IR (#115583)
Move memref dialect ops' test cases of test/IR/. It was also surprising
to not find test cases of ops like memref.view in test/Dialect/MemRef/.
NFC.
Commit: b91b6235dee3be69b429cace319ff39f1eadfe14
https://github.com/llvm/llvm-project/commit/b91b6235dee3be69b429cace319ff39f1eadfe14
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Mesh/IR/CMakeLists.txt
Log Message:
-----------
adding missing lib MLIRDestinationStyleOpInterface (#115703)
fixing CI failures caused by #114238 by adding
MLIRDestinationStyleOpInterface lib
@jplehr @mfrancio @rengolin
Commit: 8f9dbb0a780feed60416ebc6ef8e89f4b0c2dca7
https://github.com/llvm/llvm-project/commit/8f9dbb0a780feed60416ebc6ef8e89f4b0c2dca7
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/statement-function.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/OpenMP/task2.f90
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[flang][OpenMP] delayed privatisation lowering for TASK (#113591)
Commit: 6dc23b70097e4135ecde33f49550b1f473a5c385
https://github.com/llvm/llvm-project/commit/6dc23b70097e4135ecde33f49550b1f473a5c385
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
Log Message:
-----------
[SCEVExpander] Don't try to reuse SCEVUnknown values (#115141)
The expansion of a SCEVUnknown is trivial (it's just the wrapped value).
If we try to reuse an existing value it might be a more complex
expression that simplifies to the SCEVUnknown.
This is inspired by https://github.com/llvm/llvm-project/issues/114879,
because SCEVExpander replacing a constant with a phi node is just silly.
(I don't consider this a fix for that issue though.)
Commit: 6ad1dd3bdcc8f9bfdf9f6074c8dffe0675a2e4cf
https://github.com/llvm/llvm-project/commit/6ad1dd3bdcc8f9bfdf9f6074c8dffe0675a2e4cf
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/load-cmp.ll
A llvm/test/Transforms/InstCombine/sext-and.ll
Log Message:
-----------
[InstCombine] Fold (sext(a) & c1) == c2 to (a & c3) == trunc(c2) (#112646)
Fixes https://github.com/llvm/llvm-project/issues/85830.
Updated Alive proof: https://alive2.llvm.org/ce/z/KnvoP5
Commit: 7c3bbfdcf62e0a8806e3ae3130e8dc537fe5c775
https://github.com/llvm/llvm-project/commit/7c3bbfdcf62e0a8806e3ae3130e8dc537fe5c775
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr40730.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
Log Message:
-----------
[X86] lowerShuffleAsLanePermuteAndPermute - simplify lane crossing mask based on demanded elts
Don't demand every element of each demanded sublane - set the undemanded mask elements to UNDEF to allow simplification (usually to a VBROADCAST).
Fixes #66150
Commit: a7b249e4708d61e491390773d3bb1ee88db91a57
https://github.com/llvm/llvm-project/commit/a7b249e4708d61e491390773d3bb1ee88db91a57
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/STLFunctionalExtras.h
Log Message:
-----------
Reland "Add clang::lifetimebound annotation to llvm::function_ref"
This relands 9f79615, which was reverted in e109c49. The compiler-rt breakage is fixed.
Commit: c315c01a7ea92b562f8b63159e113abaf0b50e5a
https://github.com/llvm/llvm-project/commit/c315c01a7ea92b562f8b63159e113abaf0b50e5a
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Transforms/Passes.h
M mlir/test/Transforms/cse.mlir
Log Message:
-----------
[mlir][Transforms][NFC] CSE: Split tests and fix typo (#115680)
Add `-split-input-file` to CSE tests and fix a typo in `Passes.h`. (The
typo is harmless as long as the pass has no options.)
Commit: 1ca64c5fb74270661ca2f9ebd821f47dcb3152b4
https://github.com/llvm/llvm-project/commit/1ca64c5fb74270661ca2f9ebd821f47dcb3152b4
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/Transforms/CodeGenPrepare/X86/2008-11-24-RAUW-Self.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/consthoist-unreachable.ll
M llvm/test/Transforms/ConstantHoisting/ARM/same-offset-multi-types.ll
M llvm/test/Transforms/ConstantHoisting/PowerPC/masks.ll
M llvm/test/Transforms/ConstantHoisting/X86/pr43903-not-all-uses-rebased.ll
M llvm/test/Transforms/Coroutines/coro-async-remat.ll
M llvm/test/Transforms/CorrelatedValuePropagation/2010-09-26-MergeConstantRange.ll
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
M llvm/test/Transforms/CorrelatedValuePropagation/crash.ll
M llvm/test/Transforms/CorrelatedValuePropagation/pr35807.ll
M llvm/test/Transforms/DeadStoreElimination/overlap.ll
M llvm/test/Transforms/DeadStoreElimination/simple.ll
M llvm/test/Transforms/EarlyCSE/X86/preserve_memoryssa.ll
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionSpecialization/bug55000-read-uninitialized-value.ll
M llvm/test/Transforms/IRCE/pr57335.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#115691)
This PR aims to remove undefined behavior from tests under the directory
`llvm/transforms/CodegenPrepare, ConstantHoisting, Coroutines` etc.
Commit: 5e7662efec36b0117cfdf85c0182e026e0019c4e
https://github.com/llvm/llvm-project/commit/5e7662efec36b0117cfdf85c0182e026e0019c4e
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/05-dwarf-incorrect-lexical-scope-variable.test
Log Message:
-----------
[llvm-debuginfo-analyzer] Incorrect DW_AT_call_line/DW_AT_call_file. (#115701)
The code dealing with DW_AT_call_line/DW_AT_call_file is in the wrong
place. The correct functions were call, but with incorrect values:
DW_AT_call_line <-- Filename Index
DW_AT_call_file <-- Line number
Commit: 89aaf2cf68d00e86dfd102a449fc68ff7ea5c85c
https://github.com/llvm/llvm-project/commit/89aaf2cf68d00e86dfd102a449fc68ff7ea5c85c
Author: lfrenot <leon.frenot at ens-lyon.fr>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
A mlir/test/Target/LLVMIR/Import/nneg.ll
A mlir/test/Target/LLVMIR/nneg.mlir
Log Message:
-----------
[mlir][LLVM] Add nneg flag (#115498)
This implementation is based on the existing one for the exact flag.
If the nneg flag is set and the argument is negative, the result is a
poison value.
Commit: bc368e4b578730bf0b10acd5412e476ccf7a5807
https://github.com/llvm/llvm-project/commit/bc368e4b578730bf0b10acd5412e476ccf7a5807
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
Log Message:
-----------
[lldb][test] TestConstStaticIntegralMember.py: skip dsym variant for older compiler versions
The existing XFAIL was being ignored because of the `expectedFailureDarwin`
causing failures on the matrix macOS bot:
```
======================================================================
FAIL: test_inline_static_members_dwarf5_dsym (TestConstStaticIntegralMember.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1769, in test_method
return attrvalue(self)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 151, in test_inline_static_members_dwarf5
self.check_inline_static_members("-gdwarf-5")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 129, in check_inline_static_members
self.check_global_var("A::int_val", "const int", "1")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 118, in check_global_var
self.assertGreaterEqual(len(var_list), 1)
AssertionError: 0 not greater than or equal to 1
Config=x86_64-/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/clang_1501_build/bin/clang
======================================================================
FAIL: test_shadowed_static_inline_members_dwarf5_dsym (TestConstStaticIntegralMember.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1769, in test_method
return attrvalue(self)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 205, in test_shadowed_static_inline_members_dwarf5
self.check_shadowed_static_inline_members("-gdwarf-5")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 192, in check_shadowed_static_inline_members
self.check_global_var("ns::Foo::mem", "const int", "10")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 118, in check_global_var
self.assertGreaterEqual(len(var_list), 1)
AssertionError: 0 not greater than or equal to 1
Config=x86_64-/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/clang_1501_build/bin/clang
----------------------------------------------------------------------
```
Commit: 60641b0aae4ebf966285ac95e381c5709a83d1ac
https://github.com/llvm/llvm-project/commit/60641b0aae4ebf966285ac95e381c5709a83d1ac
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/aarch64-dup-extract-scalable.ll
Log Message:
-----------
[LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (#115189)
Adds missing bfloat patterns for unpacked scalable vectors.
Adds patterns for splatting extracts from fixed length vectors.
Commit: 5ea852ebafea9f29d34ed380066ee4f2fcf366ec
https://github.com/llvm/llvm-project/commit/5ea852ebafea9f29d34ed380066ee4f2fcf366ec
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] Add test coverage for #114001
Commit: 8941f898f1921857720034b9a0950e4ec32d5d87
https://github.com/llvm/llvm-project/commit/8941f898f1921857720034b9a0950e4ec32d5d87
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/test/API/lit.cfg.py
Log Message:
-----------
[lldb] Transfer some environment variables into the tests on Windows build host (#115613)
Some API tests (compiler calls) create a lot of garbage and cause
unexpected behavior in case of Windows host and Linux target, e.g.
```
lldb/test/API/commands/process/attach/%SystemDrive%/
lldb/test/API/functionalities/deleted-executable/%SystemDrive%/
lldb/test/API/functionalities/exec/%SystemDrive%/
lldb/test/API/functionalities/load_unload/%SystemDrive%/
lldb/test/API/functionalities/target-new-solib-notifications/%SystemDrive%/
lldb/test/API/functionalities/thread/create_after_attach/%SystemDrive%/
```
It can be fixed by transfer some standard Windows environment variables
into API tests.
Commit: f87737f3fdb6b2a7fa0d7b9c245eab0c39e6fb50
https://github.com/llvm/llvm-project/commit/f87737f3fdb6b2a7fa0d7b9c245eab0c39e6fb50
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/depobj-construct.f90
A flang/test/Parser/OpenMP/doacross-clause.f90
A flang/test/Parser/OpenMP/ordered-depend.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/depend06.f90
M flang/test/Semantics/OpenMP/depobj-construct-v50.f90
M flang/test/Semantics/OpenMP/depobj-construct-v51.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
M flang/test/Semantics/OpenMP/ordered01.f90
M flang/test/Semantics/OpenMP/ordered03.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Parse DOACROSS clause (#115396)
Extract the SINK/SOURCE parse tree elements into a separate class
`OmpDoacross`, share them between DEPEND and DOACROSS clauses. Most of
the changes in Semantics are to accommodate the new contents of
OmpDependClause, and a mere introduction of OmpDoacrossClause.
There are no semantic checks specifically for DOACROSS.
Commit: 30feb35c1ebc6f09d85df814f8aac57e8eb6fcc2
https://github.com/llvm/llvm-project/commit/30feb35c1ebc6f09d85df814f8aac57e8eb6fcc2
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__cxx03/CMakeLists.txt
M libcxx/utils/libcxx/header_information.py
Log Message:
-----------
[libc++] Update CMake dependency for generate_iwyu_mapping.py (#115387)
This script does not depend on the generated headers since those are
already special-cased in header_information.py. Change the dependency
list to depend on header_information.py instead. While looking at this
code also simplify the assignment to libcxx_root inside this script.
Commit: 3af4c2e16ec1cf8a099d69d69f40f3aa8bb43cc7
https://github.com/llvm/llvm-project/commit/3af4c2e16ec1cf8a099d69d69f40f3aa8bb43cc7
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/GenerateInput.h
Log Message:
-----------
[libc++][test] Clean up code in GenerateInput.h for benchmark testing (#115560)
This PR refines the code in `GenerateInput.h` used for benchmark testing
by implementing the following changes:
- Replaced all unqualified usages of `size_t` with `std::size_t`.
- Removed unnecessary curly braces `{}` from for loops that contain
simple single-statement bodies, in accordance with LLVM coding
standards.
Commit: 9f471fd12b9e2d6264f27974feaf893445e92393
https://github.com/llvm/llvm-project/commit/9f471fd12b9e2d6264f27974feaf893445e92393
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/__iterator/bounded_iter.h
M libcxx/include/__iterator/static_bounded_iter.h
M libcxx/include/__iterator/wrap_iter.h
A libcxx/test/libcxx/iterators/contiguous_iterators.conv.compile.pass.cpp
Log Message:
-----------
[libc++][hardening] Constrain construction for `__{(static_)bounded,wrap}_iter` (#115271)
This PR restricts construction to cases where reference types of
source/destination iterators are (`T&`, `T&`) or (`T&`, `const T&`) (
where `T` can be const).
Fixes #50058.
Commit: 4988376f76be755929fc017a27158e8b91fafb9c
https://github.com/llvm/llvm-project/commit/4988376f76be755929fc017a27158e8b91fafb9c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] Add test coverage for #113396
Commit: 4c4db3c943d686ff7c1fcf2dbc975e8462497efe
https://github.com/llvm/llvm-project/commit/4c4db3c943d686ff7c1fcf2dbc975e8462497efe
Author: ziereis <44057120+ziereis at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
Log Message:
-----------
add pattern for arith::UIToFPOp to VectorNarrowTypeRewritePatterns (#115485)
This pr just adds the patterns from
https://github.com/llvm/llvm-project/pull/89131 for the arith::UIToFPOp.
Also does some slight renaming and moving of the tests for better
readability.
Commit: 173529104d598785c2f8c36c047a6d0f1d0f060e
https://github.com/llvm/llvm-project/commit/173529104d598785c2f8c36c047a6d0f1d0f060e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[TableGen] Use heterogenous lookups with std::map (NFC) (#115682)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: a41922ad7530ef5e311afbff2721e69cbf520890
https://github.com/llvm/llvm-project/commit/a41922ad7530ef5e311afbff2721e69cbf520890
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
M llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp
M llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
M llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
M llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AArch64/SMEPeepholeOpt.cpp
M llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
Log Message:
-----------
[AArch64] Remove unused includes (NFC) (#115685)
Identified with misc-include-cleaner.
Commit: 3fcb9684cf6ba4ff9009ebabd9ff966eeb8b15f7
https://github.com/llvm/llvm-project/commit/3fcb9684cf6ba4ff9009ebabd9ff966eeb8b15f7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/cmp-alloca-offsets.ll
Log Message:
-----------
[InstSimplify] Add tests for comparison with zero-sized allocs (NFC)
Commit: 4981f8cb72ea7d04da601c868763b38bdc11e74e
https://github.com/llvm/llvm-project/commit/4981f8cb72ea7d04da601c868763b38bdc11e74e
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/v16i8_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v2i64_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v8i16_scalar_to_vector_shuffle.ll
Log Message:
-----------
[PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (#80784)
This patch fixes the combines for vector_shuffles when either or both of
its left and right hand side inputs are scalar_to_vector nodes.
Previously, when both left and right side inputs are scalar_to_vector
nodes, the current combine could not handle this situation, as the shuffle
mask was updated incorrectly. To temporarily solve this solution, this combine
was simply disabled and not performed.
Now, not only does this patch aim to resolve the previous issue of the
incorrect shuffle mask adjustments respectively, but it also updates any test
cases that are affected by this change.
Patch migrated from https://reviews.llvm.org/D130487.
Commit: 3338186d463b32a3bababaa345da861d93c83152
https://github.com/llvm/llvm-project/commit/3338186d463b32a3bababaa345da861d93c83152
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][affine] Remove one-element linearize_index as a canonicalization (#115542)
By analogy to the canonicalization for affine.delinearize_index, remove
affine.linearize_index ops that only have one multi-index input.
Example:
Canonicalize
```mlir
%1 = affine.linearize_index [%0] by (64)
```
to
```mlir
%1 = %0
```
While I'm here, get rid of an extra space in the syntax.
Commit: b08b252a023eeead07b3e77ce799c3a7d783a0b3
https://github.com/llvm/llvm-project/commit/b08b252a023eeead07b3e77ce799c3a7d783a0b3
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/Todo/ordered.f90
A flang/test/Semantics/OpenMP/doacross.f90
M flang/test/Semantics/OpenMP/ordered01.f90
M flang/test/Semantics/OpenMP/ordered03.f90
Log Message:
-----------
[flang][OpenMP] Semantic checks for DOACROSS clause (#115397)
Keep track of loop constructs and OpenMP loop constructs that have been
entered. Use the information to validate the variables in the SINK loop
iteration vector.
---------
Co-authored-by: Tom Eccles <tom.eccles at arm.com>
Commit: e19d74016971faed321e5cca20da7016047eb029
https://github.com/llvm/llvm-project/commit/e19d74016971faed321e5cca20da7016047eb029
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/CMakeLists.txt
M lldb/cmake/modules/FindLuaAndSwig.cmake
M lldb/docs/resources/build.rst
M lldb/test/API/lit.site.cfg.py.in
M lldb/test/API/lldbtest.py
M lldb/test/API/lua_api/TestLuaAPI.py
Log Message:
-----------
[lldb] Support both Lua 5.3 and Lua 5.4 (#115500)
Lua 5.3 and Lua 5.4 are similar enough that we can easily support both
in LLDB. This patch adds support for building LLDB with both and updates
the documentation accordingly.
Commit: bf601ba3322dd908ee9290af7f0d9bafa051a734
https://github.com/llvm/llvm-project/commit/bf601ba3322dd908ee9290af7f0d9bafa051a734
Author: lfrenot <leon.frenot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/nsw_nuw.ll
M mlir/test/Target/LLVMIR/nsw_nuw.mlir
Log Message:
-----------
[mlir][LLVM] Add nsw and nuw flags to trunc (#115509)
This implementation is based on the one already existing for the binary
operations.
If the nuw keyword is present, and any of the truncated bits are
non-zero, the result is a poison value. If the nsw keyword is present,
and any of the truncated bits are not the same as the top bit of the
truncation result, the result is a poison value.
Commit: 4a68e4cbd2423dcacada8162ab7c4bb8d7f7e2cf
https://github.com/llvm/llvm-project/commit/4a68e4cbd2423dcacada8162ab7c4bb8d7f7e2cf
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/string
A libcxx/test/libcxx/strings/basic.string/string.capacity/shrink_to_fit.pass.cpp
Log Message:
-----------
[libc++] Fix throwing away smaller allocations in string::shrink_to_fit (#115659)
Currently `string::shrink_to_fit()` throws away any allocations which
return more capacity than we requested, even if that allocation is still
smaller than the current capacity. This patch fixes this to compare the
returned allocation against the current capacity of the string instead
of against the requested capacity.
Commit: 8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f
https://github.com/llvm/llvm-project/commit/8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/AST/attr-lifetime-capture-by.cpp
A clang/test/SemaCXX/attr-lifetime-capture-by.cpp
Log Message:
-----------
[clang] Introduce [[clang::lifetime_capture_by(X)]] (#111499)
This implements the RFC
https://discourse.llvm.org/t/rfc-introduce-clang-lifetime-capture-by-x/81371
In this PR, we introduce `[[clang::lifetime_capture_by(X)]]` attribute
as discussed in the RFC.
As an implementation detail of this attribute, we store and use param
indices instead of raw param expressions. The parameter indices are
computed lazily at the end of function declaration since the function
decl (and therefore the subsequent parameters) are not visible yet while
parsing a parameter annotation.
In subsequent PR, we will infer this attribute for STL containers and
perform lifetime analysis to detect dangling cases.
Commit: 6c3d374d12bf04f8d4b24c093067d82746260292
https://github.com/llvm/llvm-project/commit/6c3d374d12bf04f8d4b24c093067d82746260292
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
Log Message:
-----------
[X86] vector-shuffle-v1.ll - regenerate test checks with vpternlog comments
Commit: 3ce544e6be098b5c355140de78bc49069fda33c3
https://github.com/llvm/llvm-project/commit/3ce544e6be098b5c355140de78bc49069fda33c3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
Log Message:
-----------
[X86] lowerShuffleAsBroadcast - improve handling of non-zero element index broadcasts
On AVX2+, support broadcasting of any element if it occurs in the bottom 128-bit subvector by shuffling the element down to element 0 and then broadcasting.
Fixes #113396
Commit: f895fc9550a207decc4b93dffb9d86ec8ac24985
https://github.com/llvm/llvm-project/commit/f895fc9550a207decc4b93dffb9d86ec8ac24985
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
Log Message:
-----------
[NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (#115203)
Add `getScalarIntVT()` to return scalar int VT based on if arch is 32 or
64bit.
Commit: 9d4837f47c48c634d4a0ac799188e1f5332495ef
https://github.com/llvm/llvm-project/commit/9d4837f47c48c634d4a0ac799188e1f5332495ef
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/ClangScanDeps/diagnostics.c
M clang/test/ClangScanDeps/header-search-pruning-transitive.c
M clang/test/ClangScanDeps/link-libraries.c
M clang/test/ClangScanDeps/modules-context-hash.c
M clang/test/ClangScanDeps/modules-dep-args.c
M clang/test/ClangScanDeps/modules-extern-submodule.c
M clang/test/ClangScanDeps/modules-extern-unrelated.m
M clang/test/ClangScanDeps/modules-file-path-isolation.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-full-by-mod-name.c
M clang/test/ClangScanDeps/modules-full.cpp
M clang/test/ClangScanDeps/modules-implicit-dot-private.m
M clang/test/ClangScanDeps/modules-incomplete-umbrella.c
M clang/test/ClangScanDeps/modules-inferred.m
M clang/test/ClangScanDeps/modules-no-undeclared-includes.c
M clang/test/ClangScanDeps/modules-pch-common-submodule.c
M clang/test/ClangScanDeps/modules-pch-common-via-submodule.c
M clang/test/ClangScanDeps/modules-pch.c
M clang/test/ClangScanDeps/modules-priv-fw-from-pub.m
M clang/test/ClangScanDeps/modules-redefinition.m
M clang/test/ClangScanDeps/modules-symlink-dir-vfs.c
M clang/test/ClangScanDeps/modules-transitive.c
M clang/test/ClangScanDeps/optimize-vfs.m
M clang/test/ClangScanDeps/removed-args.c
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang][deps][modules] Allocate input file paths lazily (#114457)
This PR builds on top of #113984 and attempts to avoid allocating input
file paths eagerly. Instead, the `InputFileInfo` type used by
`ASTReader` now only holds `StringRef`s that point into the PCM file
buffer, and the full input file paths get resolved on demand.
The dependency scanner makes use of this in a bit of a roundabout way:
`ModuleDeps` now only holds (an owning copy of) the short unresolved
input file paths, which get resolved lazily. This can be a big win, I'm
seeing up to a 5% speedup.
Commit: 396ed9c2a12daffdb0349c850beb59e891e2a42b
https://github.com/llvm/llvm-project/commit/396ed9c2a12daffdb0349c850beb59e891e2a42b
Author: Duncan <duncpro at icloud.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/arm/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/libc_search.rst
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__lsearchcompare_t.h
M libc/newhdrgen/yaml/search.yaml
M libc/spec/posix.td
M libc/src/search/CMakeLists.txt
A libc/src/search/lfind.cpp
A libc/src/search/lfind.h
M libc/test/src/search/CMakeLists.txt
A libc/test/src/search/lfind_test.cpp
Log Message:
-----------
[libc][search] implement posix `lfind` function (#114692)
# Changes
- Implement the POSIX
[`lfind`](https://man7.org/linux/man-pages/man3/lsearch.3.html)
function.
- Put a checkmark in the [posix support table
docs](https://libc.llvm.org/libc_search.html) next to `lfind`.
Commit: c11b6e80b6121ebbec6fdc32e51938b6a13ef104
https://github.com/llvm/llvm-project/commit/c11b6e80b6121ebbec6fdc32e51938b6a13ef104
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/stdfix-types.h
M libc/newhdrgen/yaml/stdfix.yaml
M libc/spec/stdc_ext.td
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/hkbits.cpp
A libc/src/stdfix/hkbits.h
A libc/src/stdfix/hrbits.cpp
A libc/src/stdfix/hrbits.h
A libc/src/stdfix/kbits.cpp
A libc/src/stdfix/kbits.h
A libc/src/stdfix/lkbits.cpp
A libc/src/stdfix/lkbits.h
A libc/src/stdfix/lrbits.cpp
A libc/src/stdfix/lrbits.h
A libc/src/stdfix/rbits.cpp
A libc/src/stdfix/rbits.h
A libc/src/stdfix/uhkbits.cpp
A libc/src/stdfix/uhkbits.h
A libc/src/stdfix/uhrbits.cpp
A libc/src/stdfix/uhrbits.h
A libc/src/stdfix/ukbits.cpp
A libc/src/stdfix/ukbits.h
A libc/src/stdfix/ulkbits.cpp
A libc/src/stdfix/ulkbits.h
A libc/src/stdfix/ulrbits.cpp
A libc/src/stdfix/ulrbits.h
A libc/src/stdfix/urbits.cpp
A libc/src/stdfix/urbits.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/FxBitsTest.h
A libc/test/src/stdfix/hkbits_test.cpp
A libc/test/src/stdfix/hrbits_test.cpp
A libc/test/src/stdfix/kbits_test.cpp
A libc/test/src/stdfix/lkbits_test.cpp
A libc/test/src/stdfix/lrbits_test.cpp
A libc/test/src/stdfix/rbits_test.cpp
A libc/test/src/stdfix/uhkbits_test.cpp
A libc/test/src/stdfix/uhrbits_test.cpp
A libc/test/src/stdfix/ukbits_test.cpp
A libc/test/src/stdfix/ulkbits_test.cpp
A libc/test/src/stdfix/ulrbits_test.cpp
A libc/test/src/stdfix/urbits_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point fxbits functions in llvm-libc (#114912)
Commit: a2171d7f0e2366ea5017c70673ce9b4e8be97f09
https://github.com/llvm/llvm-project/commit/a2171d7f0e2366ea5017c70673ce9b4e8be97f09
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[GISel][AArch64][RISCV] Don't call markAllIdxsAsCovered from minScalarSameAs/maxScalarSameAs. (#115637)
The predicate isn't user defined so we don't need to call
markAllIdxsAsCovered. Call actionIf instead of
widenScalarIf/narrowScalarIf.
Commit: 8366be73de39c446961fa56828390ad3438f8bc7
https://github.com/llvm/llvm-project/commit/8366be73de39c446961fa56828390ad3438f8bc7
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/spec/stdc_ext.td
Log Message:
-----------
[libc] fix typo and trailing whitespace
Fixes #114912
Commit: 2778af9a70bd4b4365bba2d20d50568f7ee3d18f
https://github.com/llvm/llvm-project/commit/2778af9a70bd4b4365bba2d20d50568f7ee3d18f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang] Fix warnings
This patch fixes:
flang/lib/Semantics/check-omp-structure.cpp:979:24: error: unused
variable 'top' [-Werror,-Wunused-variable]
flang/lib/Semantics/check-omp-structure.cpp:4441:24: error: unused
variable 'top' [-Werror,-Wunused-variable]
Commit: 11cc826c0a5802b03c85aa271b6fd16214f8f4d8
https://github.com/llvm/llvm-project/commit/11cc826c0a5802b03c85aa271b6fd16214f8f4d8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amdgpuintrin.h
A clang/lib/Headers/gpuintrin.h
A clang/lib/Headers/nvptxintrin.h
A clang/test/Headers/gpuintrin.c
A clang/test/Headers/gpuintrin_lang.c
Log Message:
-----------
[Clang] Implement resource directory headers for common GPU intrinsics (#110179)
Summary:
All GPU based languages provide some way to access things like the
thread ID or other resources. However, this is spread between many
different languages and it varies between targets. The goal here is to
provide a resource directory header that just provides these in an
easier to understand way, primarily so this can be used for C/C++ code.
The interface aims to be common, to faciliate easier porting, but target
specific stuff could be put in the individual headers.
Commit: 9c3a7ad7faab0e172d08e5873b88141ab9866985
https://github.com/llvm/llvm-project/commit/9c3a7ad7faab0e172d08e5873b88141ab9866985
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale_dir/locale_base_api.h
R libcxx/include/__locale_dir/locale_base_api/apple.h
R libcxx/include/__locale_dir/locale_base_api/freebsd.h
A libcxx/include/__locale_dir/support/apple.h
A libcxx/include/__locale_dir/support/bsd_like.h
A libcxx/include/__locale_dir/support/freebsd.h
M libcxx/include/iomanip
M libcxx/include/module.modulemap
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/member_swap.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/move_assign.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/move.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/bool.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/double.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/float.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/int.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_double.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/short.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_int.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_short.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/signed_char.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/signed_char_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/unsigned_char.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/unsigned_char_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/wchar_t_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.manip/ws.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/ignore.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/peek.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/putback.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/read.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/readsome.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg_off.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/sync.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/tellg.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/unget.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/member_swap.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/move_assign.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/move.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream_sentry/ctor.pass.cpp
Log Message:
-----------
[libc++] Cleanly implement the base locale API for BSD-like platforms (#115176)
Instead of going through the old locale entry points, define the base
localization API for BSD-like platforms (Apple and FreeBSD) from
scratch, using <xlocale.h> as a basis. This doesn't actually change how
that functionality is implemented, it only avoids going through a maze
to do so.
This clean new support is implemented in a separate __locale_dir/support
directory, which mirrors what we do for the threading support API.
Eventually, everything under __locale_dir/locale_base_api will go away.
rdar://131476632
Commit: 87605b1fbafa7e8fcb1aac057a47886f3be0daa3
https://github.com/llvm/llvm-project/commit/87605b1fbafa7e8fcb1aac057a47886f3be0daa3
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] Port e19d74016971f
Commit: 0b07aaec38eaae0885c6f05b4bb1ef62cc3fe004
https://github.com/llvm/llvm-project/commit/0b07aaec38eaae0885c6f05b4bb1ef62cc3fe004
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/spec/stdc_ext.td
Log Message:
-----------
[libc] fix missing trailing commas
Fixes: #114912
Commit: 7c6d809dfc41e2f2de86b88f0ca14be4af432cd7
https://github.com/llvm/llvm-project/commit/7c6d809dfc41e2f2de86b88f0ca14be4af432cd7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 11cc826c0a58
Commit: e8fe895df12cfc2da6e584d893e12970f9d443eb
https://github.com/llvm/llvm-project/commit/e8fe895df12cfc2da6e584d893e12970f9d443eb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 9c3a7ad7faab
Commit: da78ac5d331953d3386fd56cd7979022be7400cf
https://github.com/llvm/llvm-project/commit/da78ac5d331953d3386fd56cd7979022be7400cf
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/test/Headers/gpuintrin_lang.c
Log Message:
-----------
[Clang] Fix GPU intrinsics test on different range metadata
Summary:
For some reason, a few compilers do not emit the range metadata which
makes this test fail. I can't reproduce it locally so hopefully removing
that will ecourage it to fix.
Commit: 058ac837bc35419bbbb34f3206f5aa229c669811
https://github.com/llvm/llvm-project/commit/058ac837bc35419bbbb34f3206f5aa229c669811
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle-with-root.ll
Log Message:
-----------
[SLP]Use generic createShuffle for buildvector
Use generic createShuffle function, which know how to adjust the vectors
correctly, to avoid compiler crash when trying to build a buildvector as
a shuffle
Fixes #115732
Commit: a2f9d1d078cefc3ee7b19610f7117d1fb1369f18
https://github.com/llvm/llvm-project/commit/a2f9d1d078cefc3ee7b19610f7117d1fb1369f18
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/GeneratePCH.cpp
Log Message:
-----------
[clang][serialization] Enable `ASTWriter` to work with `Preprocessor` only (#115237)
This PR builds on top of
https://github.com/llvm/llvm-project/pull/115235 and makes it possible
to call `ASTWriter::WriteAST()` with `Preprocessor` only instead of full
`Sema` object. So far, there are no clients that leverage the new
capability - that will come in a follow-up commit.
Commit: b242ae32f56372d7858945df72ce2f00f7e97bc3
https://github.com/llvm/llvm-project/commit/b242ae32f56372d7858945df72ce2f00f7e97bc3
Author: David Green <david.green at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/concat-vector.ll
Log Message:
-----------
[AArch64][GlobalISel] Protect against undef first element in CombineShuffleConcat.
In case the first element is undef, we need to look through to find a valid
type for the inputs.
Commit: 74003f11b3e4dd90665f8f8d911f40a22dd940d4
https://github.com/llvm/llvm-project/commit/74003f11b3e4dd90665f8f8d911f40a22dd940d4
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
A llvm/test/MC/AArch64/cfi_val_offset.s
Log Message:
-----------
[mc] Add CFI directive to emit val_offset() rules (#113971)
These specify that the value of the given register in the previous frame
is the CFA plus some offset. This isn't very common but can be necessary
if the original value is normally reconstructed from the stack/frame
pointer instead of being saved on the stack and reloaded from there.
Commit: 750247bc1cc34629a73f8311ccb87e3d7c03ae23
https://github.com/llvm/llvm-project/commit/750247bc1cc34629a73f8311ccb87e3d7c03ae23
Author: David Green <david.green at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/Thumb2/csel.ll
Log Message:
-----------
[ARM] Fix APInt assert for CSNEG known bits.
Use APInt::getAllOnes(32), to avoid the assert when constructing an APInt
from -1.
Commit: 2b58458225fb0f9cce6dabce7e4451f86c8c73a5
https://github.com/llvm/llvm-project/commit/2b58458225fb0f9cce6dabce7e4451f86c8c73a5
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
A llvm/test/CodeGen/MIR/skip-mir-comment-trailing-whitespace.mir
Log Message:
-----------
[MIRLexer][RISCV] Eat a space after the Machine comment (#115365)
The MIRPrinter emits ` :: ` at the start of a MMO. The MIRLexer eats all
the white space after the operand and before the `::` when there is no
comment. We need to eat the space after the comment to allow MIRLexer to
parse comments on a MMO.
Commit: 582a4799e1fc8e46b5872fdd38369d097bce79f2
https://github.com/llvm/llvm-project/commit/582a4799e1fc8e46b5872fdd38369d097bce79f2
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/linux/api.td
M libc/spec/posix.td
Log Message:
-----------
[libc] fix lfind old hdrgen (#115760)
Fixes: #114692
Commit: 3a03513fc6ef8f3272d33be19164243c9dbf0452
https://github.com/llvm/llvm-project/commit/3a03513fc6ef8f3272d33be19164243c9dbf0452
Author: Nikita Popov <nikita.ppv at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
R clang/test/AST/attr-lifetime-capture-by.cpp
R clang/test/SemaCXX/attr-lifetime-capture-by.cpp
Log Message:
-----------
Revert "[clang] Introduce [[clang::lifetime_capture_by(X)]] (#111499)"
This reverts commit 8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f.
Causes a large compile-time regression, see:
https://llvm-compile-time-tracker.com/compare.php?from=4a68e4cbd2423dcacada8162ab7c4bb8d7f7e2cf&to=8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f&stat=instructions:u
Commit: b816c2628919de9a978132347f039ad23794837d
https://github.com/llvm/llvm-project/commit/b816c2628919de9a978132347f039ad23794837d
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
A llvm/test/CodeGen/MIR/RISCV/skip-mir-comment-trailing-whitespace.mir
R llvm/test/CodeGen/MIR/skip-mir-comment-trailing-whitespace.mir
Log Message:
-----------
[RISCV][MIR] Move skip-mir-comment-trailing-whitespace.mir into RISCV subdirectory
Commit: ef2d6dafc40c5a58532eb773fc74ddd8e1f53a33
https://github.com/llvm/llvm-project/commit/ef2d6dafc40c5a58532eb773fc74ddd8e1f53a33
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/FMF.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
A llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll
Log Message:
-----------
[InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (#106492)
Transform `fcmp + fadd + sel` into `fcmp + sel + fadd` which enables the
possibility of transforming `fcmp + sel` into `maxnum/minnum`
intrinsics.
Alive2 results:
https://alive2.llvm.org/ce/z/2cmimW
https://alive2.llvm.org/ce/z/Qh9ZJt
https://alive2.llvm.org/ce/z/vtLj3R
Commit: e399322d5ef2919ccd12f28a00e6b24621b11072
https://github.com/llvm/llvm-project/commit/e399322d5ef2919ccd12f28a00e6b24621b11072
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll
Log Message:
-----------
[GlobalISel] Import llvm.stepvector (#115721)
Commit: 3d73dbe7f0411a40562773c6a44d4a5d3dede523
https://github.com/llvm/llvm-project/commit/3d73dbe7f0411a40562773c6a44d4a5d3dede523
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
Log Message:
-----------
[AMDGPU] Remove unused AMDGPUISD enum members (NFC) (#115582)
Those were only used in `getTargetNodeName`.
Commit: bf1c86ce1d8e4020c44376176d4aff5cde66bda2
https://github.com/llvm/llvm-project/commit/bf1c86ce1d8e4020c44376176d4aff5cde66bda2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll
Log Message:
-----------
InstCombine: Regenerate test after "Transform (fcmp + fadd + sel)"
Update for the splat vector syntax, which landed after the last
precheck run.
Commit: c02b8a01b7caf2e4ffe17a123f1bcf59192e4b39
https://github.com/llvm/llvm-project/commit/c02b8a01b7caf2e4ffe17a123f1bcf59192e4b39
Author: Rolf Morel <rolf.morel at intel.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
Log Message:
-----------
[MLIR][Linalg] Fix unclosed code block which broke generated docs - NFC (#115763)
#115319 added a tablegen description for an op (MatmulOp) but missed
closing one of the code blocks in the description. As a result the
generated docs broke, i.e. https://mlir.llvm.org/docs/Dialects/Linalg
was broken after this code block.
Commit: 9eefa922f8ef60a8032db28a33f13ed6d5249d0a
https://github.com/llvm/llvm-project/commit/9eefa922f8ef60a8032db28a33f13ed6d5249d0a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Log Message:
-----------
AMDGPU/GlobalISel: Remove getVRegDef null checks in selector (#115530)
We should be able to assume every virtual register is defined.
Commit: 25d1ac11d537debb217c65c2bcdd087a60cff58e
https://github.com/llvm/llvm-project/commit/25d1ac11d537debb217c65c2bcdd087a60cff58e
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/include/clang/Lex/HeaderSearchOptions.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/GeneratePCH.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][deps] Only write preprocessor info into PCMs (#115239)
This patch builds on top of
https://github.com/llvm/llvm-project/pull/115237 and
https://github.com/llvm/llvm-project/pull/115235, only passing the
`Preprocessor` object to `ASTWriter`. This reduces the size of scanning
PCM files by 1/3 and speeds up scans by 16%.
Commit: 77ddcf7cbfb135f09c75c1d611b241f6e851df86
https://github.com/llvm/llvm-project/commit/77ddcf7cbfb135f09c75c1d611b241f6e851df86
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
A llvm/test/CodeGen/SystemZ/dag-combine-07.ll
Log Message:
-----------
[SystemZ] Fix bitwidth problem in FindReplicatedImm(). (#115383)
A test case emerged with an i32 truncating store of an i64 constant
operand, where the i64 constant did not fit in 32 bits, which caused
FindReplicatedImm() to crash.
Make sure to truncate the APInt in these cases.
Commit: 9254b81990a403f0a5d4a96a4e9efc69e19870bc
https://github.com/llvm/llvm-project/commit/9254b81990a403f0a5d4a96a4e9efc69e19870bc
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[tsan] Fix typo in type (#115769)
Introduced with #114931
Fixes https://github.com/golang/go/issues/70283
Commit: 515e11ae1cd4a29225f61aa31c7f657c8848a539
https://github.com/llvm/llvm-project/commit/515e11ae1cd4a29225f61aa31c7f657c8848a539
Author: Hugh Delaney <hugh.delaney at codeplay.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/DebugInfo/NVPTX/dbg-value-const-byref.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
Log Message:
-----------
[NVPTX] Use PTX 7.0 in DebugInfo tests (#115757)
Not doing so makes `%ptxas-verify` fail with:
`Feature 'Defining labels in .section' requires PTX ISA .version 7.0 or
later.`
Commit: f1800df5d53e14e2d865273e42bb0a3968129a7f
https://github.com/llvm/llvm-project/commit/f1800df5d53e14e2d865273e42bb0a3968129a7f
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/arm/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/windows/entrypoints.txt
Log Message:
-----------
[libc] fix lfind entrypoints (#115771)
- move arm entrypoint to fullbuild only
- remove baremetal entrypoints; we avoid POSIX on baremetal
- remove darwin/arm and windows entrypoints since these are untested
Fixes: #114692
Commit: 54ae9e7bbae60a2ddc629e0a7a854492c241774d
https://github.com/llvm/llvm-project/commit/54ae9e7bbae60a2ddc629e0a7a854492c241774d
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][SCF] Fix condition for fusability in consumer fusion API (#115768)
It was previously allowing either a tilable or dps op to be fused. Both
are required for consumer fusion.
Commit: bbf2ad026eb0b399364a889799ef6b45878cd299
https://github.com/llvm/llvm-project/commit/bbf2ad026eb0b399364a889799ef6b45878cd299
Author: Caslyn Tonelli <6718161+Caslyn at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/__config
Log Message:
-----------
[libc++] Amend error message for _LIBCPP_HAS_THREAD_API_EXTERNAL (#115774)
Noticed this while debugging a few things following
https://github.com/llvm/llvm-project/pull/112094. Amended error message
to reflect conditional check.
Commit: 36cbc09e636f3c0e93dc450a9464de8dbe92c75f
https://github.com/llvm/llvm-project/commit/36cbc09e636f3c0e93dc450a9464de8dbe92c75f
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] config macros is a support library (#115776)
Previously __support_macros_config was a cc_library, but making it a
libc_support_library makes things cleaner.
Commit: 1ae0dae368e4bbf2177603d5c310e794c4fd0bd8
https://github.com/llvm/llvm-project/commit/1ae0dae368e4bbf2177603d5c310e794c4fd0bd8
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/stdio/scanf_core/reader.h
M libc/src/stdio/sscanf.cpp
M libc/src/wchar/CMakeLists.txt
M libc/src/wchar/btowc.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/stdio/scanf_core/CMakeLists.txt
M libc/test/src/stdio/scanf_core/converter_test.cpp
M libc/test/src/sys/statvfs/linux/CMakeLists.txt
M libc/test/src/sys/statvfs/linux/fstatvfs_test.cpp
M libc/test/src/sys/statvfs/linux/statvfs_test.cpp
Log Message:
-----------
[libc] Clean up skipped and failing cmake (#115400)
I normally run my cmake with LIBC_CMAKE_VERBOSE_LOGGING set to ON so I
can debug build issues more easily. One of the effects of this is I see
which tests/entrypoints are skipped on my machine. This patch fixes up
the tests and entrypoints that were skipped, but easily fixed. These
were:
libc.src.pthread.pthread_spin_destroy
libc.src.pthread.pthread_spin_init
libc.src.pthread.pthread_spin_lock
libc.src.pthread.pthread_spin_trylock
libc.src.pthread.pthread_spin_unlock
(entrypoints were just missing)
libc.src.wchar.btowc
(I forgot to finish it)
libc.test.src.sys.statvfs.linux.statvfs_test
libc.test.src.sys.statvfs.linux.fstatvfs_test
(Incorrect includes for rmdir, needed some cleanup)
libc.test.integration.src.unistd.execve_test
(wrong dep for errno)
libc.test.src.math.smoke.fmaf_test
(add_fp_unittest doesn't support flags)
libc.test.src.stdio.scanf_core.converter_test
(needed to be moved away from string_reader, further cleanup needed)
Commit: 448d7da5626f412fead00114dc7612c0844b4125
https://github.com/llvm/llvm-project/commit/448d7da5626f412fead00114dc7612c0844b4125
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
Log Message:
-----------
[libc][stdfix] disable lkbits on riscv (#115781)
Link: #114912
Link: #115778
Commit: 5098b56d22b53196e92788fbfd70b01212376db4
https://github.com/llvm/llvm-project/commit/5098b56d22b53196e92788fbfd70b01212376db4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__utility/exception_guard.h
A libcxx/include/__utility/scope_guard.h
M libcxx/include/module.modulemap
M libcxx/include/string
Log Message:
-----------
[libc++] Introduce a standalone __scope_guard and use it in <string> (#114867)
This introduces a new `__scope_guard` without any fancy features. The
scope guard is used in `<string>` to simplify some of the ASan
annotations (especially by making it harder to forget them where
exceptions are thrown).
Commit: ad35450d85bd0d1f222e94cac91d884b7ed6c77b
https://github.com/llvm/llvm-project/commit/ad35450d85bd0d1f222e94cac91d884b7ed6c77b
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 5098b56d22b5
Commit: 615e28e6271025cc3dbdf8c04e9902a5dd8b2b0c
https://github.com/llvm/llvm-project/commit/615e28e6271025cc3dbdf8c04e9902a5dd8b2b0c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu_m-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-ext-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove s32 as a legal type for G_SMUL on RV64.
Commit: 375bb38f728874c371ea044bcd62b3869ea25e98
https://github.com/llvm/llvm-project/commit/375bb38f728874c371ea044bcd62b3869ea25e98
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Add i32 zext.h pattern for Zbkb.
This resolves a FIXME and reduces tests diffs from later patches
remove i32 as a legal type.
Commit: e8c4842f0ce7a81440e2147a0c9bcc690714a6e5
https://github.com/llvm/llvm-project/commit/e8c4842f0ce7a81440e2147a0c9bcc690714a6e5
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/Parse/ParseOpenMP.cpp
Log Message:
-----------
[clang][OpenMP][NFC] Move 'allocate' clause modifier parsing into fun… (#115775)
…ction
Parsing of 'allocate' clause modifier ('allocator') has been moved into
a separate function in anticipation of adding another modifier
('align').
Commit: 28cdebf7bae4aae5f79272cbdf324f9e8110aed3
https://github.com/llvm/llvm-project/commit/28cdebf7bae4aae5f79272cbdf324f9e8110aed3
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
Log Message:
-----------
[libc][stdfix] disable ulkbits on riscv (#115781) (#115792)
I should have disabled this in #115781. Mea culpa.
Link: #114912
Link: #115778
Link: #115781
Commit: eaed095a566cf75aa7df208defeb101ce1a6ed96
https://github.com/llvm/llvm-project/commit/eaed095a566cf75aa7df208defeb101ce1a6ed96
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
M libcxxabi/include/CMakeLists.txt
Log Message:
-----------
Revert "Reapply "[libc++abi] Stop copying headers to the build directory"" (#115793)
Reverts llvm/llvm-project#115379
Reverting since this broke the Fuchsia builders.
Commit: c280522f7e359117adde10de4158f9f6fec20a7b
https://github.com/llvm/llvm-project/commit/c280522f7e359117adde10de4158f9f6fec20a7b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/shift-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-add-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-addo-subo-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-and-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ashr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-const-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fshl-fshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-lshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-or-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-shl-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sub-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-xor-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-splatvector-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Remove s32 support for G_ADD/SUB/AND/OR/XOR on RV64.
This is consistent with other patches to remove s32 recently.
Commit: f109517d153609d4a8a3a3d3d3cc06da1b629364
https://github.com/llvm/llvm-project/commit/f109517d153609d4a8a3a3d3d3cc06da1b629364
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/include/lldb/Core/Disassembler.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-private-interfaces.h
M lldb/source/API/SBFunction.cpp
M lldb/source/API/SBSymbol.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectDisassemble.h
M lldb/source/Commands/Options.td
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Plugins/Architecture/Mips/ArchitectureMips.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h
M lldb/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Symbol/Function.cpp
M lldb/source/Symbol/Symbol.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/source/Target/ThreadPlanTracer.cpp
M lldb/source/Target/TraceDumper.cpp
A lldb/test/Shell/Commands/command-disassemble-cpu-features.yaml
M lldb/unittests/Disassembler/ARM/TestArm64Disassembly.cpp
M lldb/unittests/Disassembler/ARM/TestArmv7Disassembly.cpp
M lldb/unittests/Disassembler/RISCV/TestMCDisasmInstanceRISCV.cpp
M lldb/unittests/Disassembler/x86/TestGetControlFlowKindx86.cpp
Log Message:
-----------
[lldb] Support overriding the disassembly CPU & features (#115382)
Add the ability to override the disassembly CPU and CPU features through
a target setting (`target.disassembly-cpu` and
`target.disassembly-features`) and a `disassemble` command option
(`--cpu` and `--features`).
This is especially relevant for architectures like RISC-V which relies
heavily on CPU extensions.
The majority of this patch is plumbing the options through. I recommend
looking at DisassemblerLLVMC and the test for the observable change in
behavior.
Commit: 49e004fbe0416bc23ebea8824805fd7f07f90fa8
https://github.com/llvm/llvm-project/commit/49e004fbe0416bc23ebea8824805fd7f07f90fa8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/LoongArch/vararg.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg.ll
Log Message:
-----------
[nfc][msan] Regenerate tests missing FileCheck (#115794)
Extracted and updated from #115018
Co-authored-by: Kamil Kashapov <kashapov at ispras.ru>
Commit: da032a609c1bde6f6775cf1650e08a205920d920
https://github.com/llvm/llvm-project/commit/da032a609c1bde6f6775cf1650e08a205920d920
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
Log Message:
-----------
[Wunsafe-buffer-usage] Fix false positives in handling string literals. (#115552)
Do not warn when a string literal is indexed and the idex value is
within the bounds of the length of the string.
(rdar://139106996)
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: 31dc2b9aa06f998472fa4a7f147a778ebdc80003
https://github.com/llvm/llvm-project/commit/31dc2b9aa06f998472fa4a7f147a778ebdc80003
Author: Douglas <Douglas.Gliner at sony.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/include/flang/Lower/CustomIntrinsicCall.h
Log Message:
-----------
[flang] Fix typo in `CustomIntrinsicCall.h` (NFC) (#115789)
Fix typo in `CustomIntrinsicCall.h`: `DEPRICATED` -> `DEPRECATED`
Commit: de2fad32513f7420988df1cf99aff90e0a067469
https://github.com/llvm/llvm-project/commit/de2fad32513f7420988df1cf99aff90e0a067469
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
Log Message:
-----------
[Clang] Fix dependent expression handling for assumptions (#115646)
The function definition instantiation assumes any declarations used
inside are already transformed before transforming the body, so we need
to preserve the transformed expression of CXXAssumeAttr even if it is
not a constant expression. Moreover, the full expression of the
assumption should also entail a potential lambda capture transformation,
hence the call to ActOnFinishFullExpr() after TransformExpr().
Fixes #114787
Commit: aad256598d7fd14d736eda76ee9eba8905bd84b8
https://github.com/llvm/llvm-project/commit/aad256598d7fd14d736eda76ee9eba8905bd84b8
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl-ins-gr2vr.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-repl-ins-gr2vr.ll
Log Message:
-----------
[LoongArch] Pre-commit test for vreplgr2vr + vinsgr2vr intrinsics (#115702)
Inspired by https://github.com/llvm/llvm-project/issues/101624.
A later commit will optimize it.
Commit: 3b29a8a00809e868e3df7e687695670ff5077fbd
https://github.com/llvm/llvm-project/commit/3b29a8a00809e868e3df7e687695670ff5077fbd
Author: Min <45393763+MinxuanZ at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp
Log Message:
-----------
[libfuzzer] use timer_create() instead of setitimer() for linux (#110274)
SetTimer() now uses setitimer() to sending SIGALRM every `
UnitTimeoutSec/2 + 1` s
Set UnitTimeoutSec with the `-timeout=` option
"POSIX.1-2008 marks getitimer() and setitimer() obsolete" and also has
some issues regarding accuracy of the timers under load . See
https://linux.die.net/man/2/setitimer.
I propose using timer_create() and sigaction() ,See
http://man7.org/linux/man-pages/man2/timer_create.2.html
# test result on my x86_64 linux
`make check-fuzzer`
Commit: e855feac41fd89aebf540a155d21f12a3e82f05b
https://github.com/llvm/llvm-project/commit/e855feac41fd89aebf540a155d21f12a3e82f05b
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
Log Message:
-----------
[clang-tidy] fix bugprone-sizeof-expression when sizeof expression with template types (#115275)
Fixed: #115175.
`dependent type` are not the same even pointers are the same.
---------
Co-authored-by: whisperity <whisperity at gmail.com>
Commit: f9125ddc1faafaceac9064e889cd9b4a77523677
https://github.com/llvm/llvm-project/commit/f9125ddc1faafaceac9064e889cd9b4a77523677
Author: Florian Mayer <fmayer at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp
Log Message:
-----------
Revert "[libfuzzer] use timer_create() instead of setitimer() for linux" (#115811)
Reverts llvm/llvm-project#110274
Buildbots broke
Commit: d1e17a3f23a30815030b784d813141a469b3d7fb
https://github.com/llvm/llvm-project/commit/d1e17a3f23a30815030b784d813141a469b3d7fb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ashr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fshl-fshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-lshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-shl-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/shift.ll
Log Message:
-----------
[RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (#115559)
Unless the shift amount is constant. In that case we zero extend the
shift amount and promote the other input the same way widenScalar would.
I'm not using widenScalar because that requires a separate call for each
operand so it was easier to do both operands at once.
Commit: b4339dd612597bf3fae01e42d644ba709e4ae446
https://github.com/llvm/llvm-project/commit/b4339dd612597bf3fae01e42d644ba709e4ae446
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[RISCV] Promote s32 G_SEXT_INREG for RV64
Commit: 3aa24eae52aa463ce47b528879a9a24e04956b88
https://github.com/llvm/llvm-project/commit/3aa24eae52aa463ce47b528879a9a24e04956b88
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Log Message:
-----------
[SelectionDAG] Simplify classof of MemSDNode and MemIntrinsicSDNode (NFC) (#115720)
`SDNodeBits.IsMemIntrinsic` is set if and only if the node is an
instance of `MemIntrinsicSDNode`. Thus, to check if a node is an
instance of `MemIntrinsicSDNode` we only need to check this bit.
Commit: ffa45f2e6aafaf3ed51919beb886325e908d4c20
https://github.com/llvm/llvm-project/commit/ffa45f2e6aafaf3ed51919beb886325e908d4c20
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/constant64.mir
Log Message:
-----------
[RISCV][GISel] Use correct constant for i32 INT_MAX in test. NFC
Commit: 23fbaff9a3fd2b26418e0c2f10b701049399251f
https://github.com/llvm/llvm-project/commit/23fbaff9a3fd2b26418e0c2f10b701049399251f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Source.cpp
M clang/lib/AST/ByteCode/Source.h
Log Message:
-----------
[ByteCode] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (#115809)
Note that PointerUnion::{is,get,dyn_cast} have been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Commit: 82d5dd28b4de7245088f7ed40da37f8cf80461e4
https://github.com/llvm/llvm-project/commit/82d5dd28b4de7245088f7ed40da37f8cf80461e4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVConstantPoolValue.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVLandingPadSetup.cpp
M llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/RISCV/RISCVZacasABIFix.cpp
Log Message:
-----------
[RISCV] Remove unused includes (NFC) (#115814)
Identified with misc-include-cleaner.
Commit: f77101ea7913ab6a6b28ad03c152c615a89900f6
https://github.com/llvm/llvm-project/commit/f77101ea7913ab6a6b28ad03c152c615a89900f6
Author: Malay Sanghi <malay.sanghi at intel.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amxmovrsintrin.h
A clang/lib/Headers/amxmovrstransposeintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/amx_movrs.c
A clang/test/CodeGen/X86/amx_movrs_api.c
A clang/test/CodeGen/X86/amx_movrs_errors.c
A clang/test/CodeGen/X86/amx_movrs_tranpose.c
A clang/test/CodeGen/X86/amx_movrs_tranpose_api.c
A clang/test/CodeGen/X86/amx_movrs_transpose_errors.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
A llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
A llvm/test/CodeGen/X86/amx_movrs_transpose_intrinsics.ll
A llvm/test/MC/Disassembler/X86/AMX/x86-64-amx-movrs.txt
A llvm/test/MC/X86/AMX/x86-64-amx-movrs-att.s
A llvm/test/MC/X86/AMX/x86-64-amx-movrs-intel.s
Log Message:
-----------
[X86][AMX] Support AMX-MOVRS (#115151)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: adb476b0125127939fd116f616a0c18909d4a377
https://github.com/llvm/llvm-project/commit/adb476b0125127939fd116f616a0c18909d4a377
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[nfc][msan] Clang-format MemorySanitizer.cpp (#115828)
Extracted from #109284
Co-authored-by: Kamil Kashapov <kashapov at ispras.ru>
Commit: 0c5bf565ba7059ca8542c522fcab019f2e2c82bb
https://github.com/llvm/llvm-project/commit/0c5bf565ba7059ca8542c522fcab019f2e2c82bb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port f77101ea7913
Commit: 6a857fe8b960cb26cf03a0c825250726589a7771
https://github.com/llvm/llvm-project/commit/6a857fe8b960cb26cf03a0c825250726589a7771
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/constant64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/sext-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/shift-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zext-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-const-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-constbarrier-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fshl-fshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-extract-subvector.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-icmp.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-insert-subvector.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-splatvector-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-zext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Promote s32 G_CONSTANT on RV64.
Commit: 956361ca080a689a96b6552d28681aaf0ad2f494
https://github.com/llvm/llvm-project/commit/956361ca080a689a96b6552d28681aaf0ad2f494
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Zabha/Zacas implies Zaamo (#115694)
The Zabha/Zacas extension depends upon the Zaamo extension.
Ref: https://github.com/riscv/riscv-isa-manual/blob/main/src/zacas.adoc
https://github.com/riscv/riscv-isa-manual/blob/main/src/zabha.adoc.
Commit: 28e4aad45a64ec893c02f21b9c2afe7efe5f4a2a
https://github.com/llvm/llvm-project/commit/28e4aad45a64ec893c02f21b9c2afe7efe5f4a2a
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/trunctfbf2.c
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[X86][BF16] Add libcall for FP128 -> BF16 (#115825)
This is to fix #115710.
Commit: fa9888747548a8965ed9932daa53281794ebc5b6
https://github.com/llvm/llvm-project/commit/fa9888747548a8965ed9932daa53281794ebc5b6
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
Log Message:
-----------
[MLIR][LLVM] Cleanup attr-dict printing (NFC) (#115765)
This commit simplifies the custom attribute dictionary printing and uses
it only for printing ops that have fast math flags.
Commit: 93589057830b2c3c35500ee8cac25c717a1e98f9
https://github.com/llvm/llvm-project/commit/93589057830b2c3c35500ee8cac25c717a1e98f9
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrSPE.td
M llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
M llvm/test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll
M llvm/test/MC/PowerPC/ppc64-errors.s
Log Message:
-----------
[PowerPC] Add error for incorrect use of memory operands (#114277)
If an instruction doesn't support memory operands, but one is provided,
an error should be raised. And conversely, if an instruction requires a
memory operand, but none is given, an error should be raised.
Commit: b94a24e5ddfc52baeafdf4dc9fee5d18d8a508a3
https://github.com/llvm/llvm-project/commit/b94a24e5ddfc52baeafdf4dc9fee5d18d8a508a3
Author: Kamil Kashapov <kashapov at ispras.ru>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[nfc][msan] Reorder ifs in CreateVarArgHelper
Part of #109284
Commit: 469ac118418fff2fc07e5705ff527405060ac586
https://github.com/llvm/llvm-project/commit/469ac118418fff2fc07e5705ff527405060ac586
Author: Kamil Kashapov <kashapov at ispras.ru>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[nfc][msan] Remove 64 from VarArg*Helper names
Part of #109284
Commit: ca4cd08fb9d7a03fbd00bca05d5dbfa87cd6db4e
https://github.com/llvm/llvm-project/commit/ca4cd08fb9d7a03fbd00bca05d5dbfa87cd6db4e
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/CMakeLists.txt
A lldb/source/Plugins/ObjectFile/XCOFF/CMakeLists.txt
A lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
A lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
A lldb/test/Shell/ObjectFile/XCOFF/basic-info.yaml
M lldb/tools/lldb-server/CMakeLists.txt
M lldb/tools/lldb-server/SystemInitializerLLGS.cpp
Log Message:
-----------
[lldb][AIX] Added XCOFF Object File Header for AIX (#111814)
Added XCOFF Object File Header for AIX.
Added base functionality for XCOFF support. Will enhance the files in
incremental PRs
Details about XCOFF file format on AIX:
[XCOFF](https://www.ibm.com/docs/en/aix/7.3?topic=formats-xcoff-object-file-format)
Commit: 2a3c08f620fc89823ebf1d2af4ea0beb97671db2
https://github.com/llvm/llvm-project/commit/2a3c08f620fc89823ebf1d2af4ea0beb97671db2
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Symbol/Function.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
Log Message:
-----------
[lldb] (Begin to) support discontinuous lldb_private::Functions (#115730)
This is the beginning of a different, more fundamental approach to
handling. This PR tries to tries to minimize functional changes. It only
makes sure that we store the true set of ranges inside the function
object, so that subsequent patches can make use of it.
Commit: ad26835b2c7e3c9b6244faf943db6948d2f1661b
https://github.com/llvm/llvm-project/commit/ad26835b2c7e3c9b6244faf943db6948d2f1661b
Author: Kamil Kashapov <kashapov at ispras.ru>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[nfc][msan] Move VarArgGenericHelper
Part of #109284
Commit: 58ca7078ce188af21ea5f924573cb00bdb63cbb6
https://github.com/llvm/llvm-project/commit/58ca7078ce188af21ea5f924573cb00bdb63cbb6
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/ADCE/blocks-with-dead-term-nondeterministic.ll
M llvm/test/Transforms/ADCE/broken-loop-info.ll
M llvm/test/Transforms/AlignmentFromAssumptions/amdgpu-crash.ll
M llvm/test/Transforms/AlignmentFromAssumptions/start-unk.ll
M llvm/test/Transforms/Attributor/IPConstantProp/fp-bc-icmp-const-fold.ll
M llvm/test/Transforms/BDCE/order.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-instructions-before-call.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-no-or-structure.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-no-splitting.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-split-or-phi.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-split-preserve-debug.ll
M llvm/test/Transforms/CodeExtractor/LoopExtractor_infinite.ll
M llvm/test/Transforms/CodeExtractor/extract-assume.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#115688)
This PR aims to remove undefined behavior from tests.
Commit: 6ade03d79d537cd194360015c7bca1463104d84a
https://github.com/llvm/llvm-project/commit/6ade03d79d537cd194360015c7bca1463104d84a
Author: Lukas Sommer <lukas.sommer at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
A mlir/test/Conversion/SPIRVToLLVM/group-ops-to-llvm.mlir
A mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir
Log Message:
-----------
[mlir][spirv] Add spirv-to-llvm conversion for group operations (#115501)
Lowering for some of the uniform and non-uniform group operations
defined in section 3.52.21 of the SPIR-V specification from SPIR-V
dialect to LLVM dialect.
Similar to #111864, lower the operations to builtin functions understood
by SPIR-V tools.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at codeplay.com>
Commit: 0e52a0721ef91238bfb2141cbd9c72b830839139
https://github.com/llvm/llvm-project/commit/0e52a0721ef91238bfb2141cbd9c72b830839139
Author: Jake Egan <jake.egan at ibm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrSPE.td
M llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
M llvm/test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll
M llvm/test/MC/PowerPC/ppc64-errors.s
Log Message:
-----------
Revert "[PowerPC] Add error for incorrect use of memory operands (#114277)"
This commit broke a test on a couple bots
lld :: ELF/ppc64-local-exec-tls.s
This reverts commit 93589057830b2c3c35500ee8cac25c717a1e98f9.
Commit: 3183b3aad130ac6754f294046c008a85b9925894
https://github.com/llvm/llvm-project/commit/3183b3aad130ac6754f294046c008a85b9925894
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Interpreter/Interpreter.h
A clang/include/clang/Interpreter/RemoteJITUtils.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
A clang/lib/Interpreter/RemoteJITUtils.cpp
A clang/test/Interpreter/out-of-process.cpp
M clang/tools/clang-repl/CMakeLists.txt
M clang/tools/clang-repl/ClangRepl.cpp
Log Message:
-----------
[Clang-Repl] Add support for out-of-process execution. (#110418)
This PR introduces out-of-process (OOP) execution support for
Clang-Repl. With this enhancement, two new flags, `oop-executor` and
`oop-executor-connect`, are added to the Clang-Repl interface. These
flags enable the launch of an external executor
(`llvm-jitlink-executor`), which handles code execution in a separate
process.
Commit: 88ad44ec43bdaba5185a0227ec81eb15bd0f7c5a
https://github.com/llvm/llvm-project/commit/88ad44ec43bdaba5185a0227ec81eb15bd0f7c5a
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/GVN/2011-04-27-phioperands.ll
M llvm/test/Transforms/GVN/2012-05-22-PreCrash.ll
M llvm/test/Transforms/GVN/PRE/phi-translate-2.ll
M llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll
M llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
M llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll
M llvm/test/Transforms/GVN/crash.ll
M llvm/test/Transforms/GVN/equality-assume.ll
M llvm/test/Transforms/GVN/pre-new-inst.ll
M llvm/test/Transforms/GVN/stale-loop-info.ll
M llvm/test/Transforms/GVN/unreachable_block_infinite_loop.ll
M llvm/test/Transforms/GVNHoist/hoist-call.ll
M llvm/test/Transforms/GVNHoist/hoist-mssa.ll
M llvm/test/Transforms/GVNHoist/hoist-simplify-phi.ll
M llvm/test/Transforms/GVNHoist/hoist-very-busy.ll
M llvm/test/Transforms/GVNHoist/non-trivial-phi.ll
M llvm/test/Transforms/GVNHoist/pr30216.ll
M llvm/test/Transforms/GVNHoist/pr36787.ll
M llvm/test/Transforms/GVNSink/dither.ll
M llvm/test/Transforms/GVNSink/sink-common-code.ll
M llvm/test/Transforms/GVNSink/struct.ll
M llvm/test/Transforms/GuardWidening/basic.ll
M llvm/test/Transforms/GuardWidening/basic_widenable_condition_guards.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#115817)
This PR removes tests with `br i1 undef` under `llvm/tests/G*`.
There were a few tests that I couldn't fix to pass lit. I'll come back
and fix those later.
Commit: 6d23ac1aa250e05b1c6781922da584fe9908b537
https://github.com/llvm/llvm-project/commit/6d23ac1aa250e05b1c6781922da584fe9908b537
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/HowToUpdateDebugInfo.rst
Log Message:
-----------
[DebugInfo] Update policy for when to merge locations (#115349)
Following discussions on PR #114231 this patch changes the policy on
merging locations, making the rule that new instructions should use a
merge of the locations of all the instructions whose output is produced
by the new instructions; in the case where only one instruction's output
is produced, as in most InstCombine optimizations, we use only that
instruction's location.
Commit: 99a3c3ffcf0a4164ead8a65d44bdcbd583769b9f
https://github.com/llvm/llvm-project/commit/99a3c3ffcf0a4164ead8a65d44bdcbd583769b9f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
[InstCombine][GitHub] Auto-add llvm:instcombine label (NFC) (#115736)
Add `llvm:instcombine` label to PRs touching InstCombine or
InstSimplify. (We track InstSimplify issues under `llvm:instcombine` as
well, so I added it here as well.)
Commit: 36f21eedcfd06ff97ead9625adbf6d8153edd233
https://github.com/llvm/llvm-project/commit/36f21eedcfd06ff97ead9625adbf6d8153edd233
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/cmp-alloca-offsets.ll
Log Message:
-----------
[InstSimplify] Fix alloca alignments in test (NFC)
These zero-sized types should be 1-aligned, but we seem to
default to 8-aligned.
Commit: e385e0d3e71e17da0b2023f480259c95923707bd
https://github.com/llvm/llvm-project/commit/e385e0d3e71e17da0b2023f480259c95923707bd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ModulesBuilder.h
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] [Modules] Support Reusable Modules Builder (#106683)
This is the following patch of
https://github.com/llvm/llvm-project/pull/66462 to optimize its
performance.
# Motivation
To avoid data races, we choose "per file owns its dependent modules"
model. That said, every TU will own all the required module files so
that we don't need to worry about thread safety. And it looks like we
succeeded that we focus on the interfaces and structure of modules
support in clangd. But after all, this model is not good for
performance. Image we have 10000 TUs import std, we will have 10000
std.pcm in the memory. That is terrible both in time and space.
Given the current modules support in clangd works pretty well (almost
every issue report I received is more or less a clang's issue), I'd like
to improve the performance.
# High Level Changes
After this patch, the built module files will be owned by the module
builder and each TU will only have a reference to the built module
files.
The module builder have a map from module names to built module files.
When a new TU ask for a module file, the module builder will check if
the module file lives in the map and if the module file are up to date.
If yes, the module file will be returned. If no, the module file entry
would be erased in the module builder. We use `shared_ptr<>` to track
module file here so that the other TU owning the out dated module file
won't be affected. The out dated module file will be removed
automatically if other TU gets update or closed.
(I know the out dated module file may not exist due to the `CanReuse`
mechanism. But the design here is natural and can be seen as a redundant
design to make it more robust.)
When we a build a module, we will use the mutex and the condition
variable in the working thread to build it exclusively. All other
threads that also want the module file would have to wait for that
working thread. It might not sounds great but I think if we want to make
it asynchronous, we have to refactor TUScheduler as far as I know.
# Code Structure Changes
Thanks for the previous hard working reviewing, the interfaces almost
don't change in this patch. Almost all the work are isolated in
ModulesBuilder.cpp. A outliner is that we convert `ModulesBuilder` to an
abstract class since the implementation class needs to own the module
files.
And the core function to review is
`ReusableModulesBuilder::getOrBuildModuleFile`. It implements the core
logic to fetch the module file from the cache or build it if the module
file is not in the cache or out of date. And other important entities
are `BuildingModuleMutexes`, `BuildingModuleCVs`, `BuildingModules` and
`ModulesBuildingMutex`. These are mutexes and condition variables to
make sure the thread safety.
# User experience
I've implemented this in our downstream and ask our users to use it. I
also sent it https://github.com/ChuanqiXu9/clangd-for-modules here as
pre-version. The feedbacks are pretty good. And I didn't receive any bug
reports (about the reusable modules builder) yet.
# Other potential improvement
The are other two potential improvements can be done:
1. Scanning cache and a mechanism to get the required module information
more quickly. (Like the module maps in
https://github.com/ChuanqiXu9/clangd-for-modules)
2. Persist the module files. So that after we close the vscode and
reopen it, we can reuse the built module files since the last
invocation.
Commit: 41e3919ded78d8870f7c95e9181c7f7e29aa3cc4
https://github.com/llvm/llvm-project/commit/41e3919ded78d8870f7c95e9181c7f7e29aa3cc4
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
A clang/docs/WarningSuppressionMappings.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/Warnings.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Interpreter/CodeCompletion.cpp
M clang/lib/Serialization/ASTReader.cpp
A clang/test/Misc/Inputs/suppression-mapping.txt
A clang/test/Misc/warning-suppression-mappings-pragmas.cpp
A clang/test/Misc/warning-suppression-mappings.cpp
M clang/tools/driver/cc1gen_reproducer_main.cpp
M clang/tools/driver/driver.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M llvm/include/llvm/Support/SpecialCaseList.h
Log Message:
-----------
[clang] Introduce diagnostics suppression mappings (#112517)
This implements
https://discourse.llvm.org/t/rfc-add-support-for-controlling-diagnostics-severities-at-file-level-granularity-through-command-line/81292.
Users now can suppress warnings for certain headers by providing a
mapping with globs, a sample file looks like:
```
[unused]
src:*
src:*clang/*=emit
```
This will suppress warnings from `-Wunused` group in all files that
aren't under `clang/` directory. This mapping file can be passed to
clang via `--warning-suppression-mappings=foo.txt`.
At a high level, mapping file is stored in DiagnosticOptions and then
processed with rest of the warning flags when creating a
DiagnosticsEngine. This is a functor that uses SpecialCaseLists
underneath to match against globs coming from the mappings file.
This implies processing warning options now performs IO, relevant
interfaces are updated to take in a VFS, falling back to RealFileSystem
when one is not available.
Commit: 01dcc41cb856b6ed095a26315faa47d2ae9ce105
https://github.com/llvm/llvm-project/commit/01dcc41cb856b6ed095a26315faa47d2ae9ce105
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Dominance.h
M mlir/lib/IR/Dominance.cpp
Log Message:
-----------
[mlir][IR][NFC] `DominanceInfo`: Minor code cleanups (#115430)
Remove `properlyDominatesImpl` and implement the functionality in
`properlyDominates` directly.
Commit: 7665d3f0df78b8b58c1adb18d53f36351426da72
https://github.com/llvm/llvm-project/commit/7665d3f0df78b8b58c1adb18d53f36351426da72
Author: David Green <david.green at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
Log Message:
-----------
[ARM] Extra MVE reduction test cases. NFC
Commit: 4213bca8717dbf675558148b7d4186cd3980355d
https://github.com/llvm/llvm-project/commit/4213bca8717dbf675558148b7d4186cd3980355d
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
Log Message:
-----------
[flang][OpenMP] Add alias analysis for omp private (#115155)
Enable alias analysis for omp private clause for code:
```
program main
integer :: arrayA(10,10)
integer :: tmp(2)
integer :: i,j
!$omp target teams distribute parallel do private(tmp)
do j = 1, 10
do i = 1,10
tmp = [i,j]
arrayA = tmp(1)
end do
end do
end program main
```
This PR is based on: https://github.com/llvm/llvm-project/pull/113566
and it contains fix for Fujitsu test suite. Previous PR introduced
regression in Fujitsu test suite. For some Fujitsu test cases
`omp.yield` operation points to block argument. Alias analysis for such
MLIR code will be added in separate PR.
Commit: 5a1f239df55c25d49d6c193ef469606713fc74de
https://github.com/llvm/llvm-project/commit/5a1f239df55c25d49d6c193ef469606713fc74de
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[MISched] Add a hook to override PostRA scheduling policy (#115455)
PostRA scheduling supports different directions now, but we can
only specify it via command line options.
This patch adds a new hook `overridePostRASchedPolicy` for targets
to override PostRA scheduling policy.
Note that some options like tracking register pressure won't take
effect in PostRA scheduling.
Commit: 3ce0dbb718c9df123fd1cb87623aa31b3376fb61
https://github.com/llvm/llvm-project/commit/3ce0dbb718c9df123fd1cb87623aa31b3376fb61
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/docs/resources/build.rst
Log Message:
-----------
[lldb] Recommend Python 3.8 as the minimum Python version for LLDB (#114807)
See
https://discourse.llvm.org/t/rfc-lets-document-and-enforce-a-minimum-python-version-for-lldb/82731
for discussions.
This matches LLVM's requirement to run tests. For LLDB 20 there will be
a CMake warning telling builders that from LLDB 21 this will be a hard
requirement. From LLDB 21, it will be an error to try to build with
anything <= 3.8.
So there are no code changes in this commit. Once the llvm 20 branch is
created we can remove some < 3.8 support code.
As always, if you disable Python support you will not get any new
warnings or errors from this change.
Commit: e65c5428adab477331cf0a57b540e77850807843
https://github.com/llvm/llvm-project/commit/e65c5428adab477331cf0a57b540e77850807843
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Dominance.h
M mlir/lib/IR/Dominance.cpp
Log Message:
-----------
[mlir][IR] `DominanceInfo`: Deduplicate `properlyDominates` implementation (#115433)
The implementations of `DominanceInfo::properlyDominates` and
`PostDominanceInfo::properlyPostDominates` are almost identical: only
one line of code is different (apart from the missing `enclosingOpOk`
flag). Define the function in `DominanceInfoBase` to avoid the code
duplication.
Also rename the helper in `DominanceInfoBase` to
`properlyDominatesImpl`.
Note: This commit is not marked as NFC because
`PostDominanceInfo::properlyPostDominates` now also has an
`enclosingOpOk` argument.
Depends on #115430.
Commit: 3c585bdd3c53538b092ec36d81b038e43f605325
https://github.com/llvm/llvm-project/commit/3c585bdd3c53538b092ec36d81b038e43f605325
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/test/HLFIR/opt-bufferization.fir
Log Message:
-----------
[flang] Allow `VariableAssignBufferization` to handle `hlfir::ExprType` (#115136)
Given the following input:
```fortran
1. subroutine ComputeDifferencesKernel
2. implicit none
3. integer :: i
4. integer, dimension(1) :: a
5.
6. do i = 1, 10
7. a = [ i ]
8. end do
9. end subroutine ComputeDifferencesKernel
```
Currently, the assignment in line 7 ends up as a call to the Fortran
runtime function: `AAssign` since the corresponding `hlfir.assign` is
not optimized away by `VariableAssignBufferization`. The reason this
assignment is not optimized away is that `VariableAssignBufferization`
does not match whenever the RHS of the assignment is a `hlfir.expr`
value. However, this behavior is introduced only to prevent clashes
between `VariableAssignBufferization` and `ElementalAssignBufferization`
which optimizes away assignemnts that result from `hlfir.elemental` ops.
This patch relaxes that restriction by checking whether the RHS of an
`hlfir.assign` is the result of `hlfir.elemental` or not. If not, we can
safely proceed with `VariableAssignBufferization`.
Note that in the above example, we won't get a `hlfir.elemental` in the
IR. We would get if we changed line 7 to something like:
```fortran
7. a = [ i ] + b
```
In which case, `ElementalAssignBufferization` will kick in instead.
Commit: 512208b498d27e885cd9164bed516eeb910a4933
https://github.com/llvm/llvm-project/commit/512208b498d27e885cd9164bed516eeb910a4933
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl-ins-gr2vr.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-repl-ins-gr2vr.ll
Log Message:
-----------
[LoongArch] Optimize vreplgr2vr + vinsgr2vr intrinsic sequence (#115803)
Inspired by https://github.com/llvm/llvm-project/issues/101624.
Commit: ebb3508899c3e1773884cf5bc1b1df6f32450ca9
https://github.com/llvm/llvm-project/commit/ebb3508899c3e1773884cf5bc1b1df6f32450ca9
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Interpreter/Interpreter.h
R clang/include/clang/Interpreter/RemoteJITUtils.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
R clang/lib/Interpreter/RemoteJITUtils.cpp
R clang/test/Interpreter/out-of-process.cpp
M clang/tools/clang-repl/CMakeLists.txt
M clang/tools/clang-repl/ClangRepl.cpp
Log Message:
-----------
Revert "[Clang-Repl] Add support for out-of-process execution." (#115854)
Reverts llvm/llvm-project#110418
Buildbot encountered a failure.
Commit: 5dd9867e2d1e698fee980e31da114a37e4c7f612
https://github.com/llvm/llvm-project/commit/5dd9867e2d1e698fee980e31da114a37e4c7f612
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/utils/lit/lit/cl_arguments.py
Log Message:
-----------
[llvm][llvm-lit] Hide --use-unique-output-file-name from --help (#114812)
I was too hasty landing an option whose only known use at this time is
LLVM's own CI.
We may be able to remove it before the next branch that would be the
next llvm-lit release outside of llvm, but the timing may not work out.
So I am hiding the option in case that were to happen.
Commit: 7c04da12f0b45c88f3cc56d3803b484d54781e24
https://github.com/llvm/llvm-project/commit/7c04da12f0b45c88f3cc56d3803b484d54781e24
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/HowToAddABuilder.rst
Log Message:
-----------
[llvm][docs] Add terminology note to Buildbot docs (#115856)
Choosing another term for this one document would only create confusion,
and vendoring Buildbot to change it is a lot of work (as explained in
the linked Buildbot issue).
Commit: e723b10266756eceb79612f28fdd025475795822
https://github.com/llvm/llvm-project/commit/e723b10266756eceb79612f28fdd025475795822
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang][NFC] add release note for n3030 support (#115648)
Follow-up to #107260
CC @Fznamznon @AaronBallman
Commit: 40c75426a9af601ba94762ad10317800a6b25ca4
https://github.com/llvm/llvm-project/commit/40c75426a9af601ba94762ad10317800a6b25ca4
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/preserve-load-metadata.ll
Log Message:
-----------
[SimplifyCFG] Add test for updating llvm.access.group when hoisting.
Add extra test coverage for preserving llvm.access.group metadata when
hoisting.
Commit: 24c2c74bd29d4d550974f8249cbf8fdf1d033bfd
https://github.com/llvm/llvm-project/commit/24c2c74bd29d4d550974f8249cbf8fdf1d033bfd
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][Tensor] Retain discardable attrs in pack(cast) folder (#115772)
Commit: 1b63f47e900d5459912e4f8ee7aa16a372bdf519
https://github.com/llvm/llvm-project/commit/1b63f47e900d5459912e4f8ee7aa16a372bdf519
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/lib/Headers/amxfp8intrin.h
A clang/test/CodeGen/X86/amx_fp8_api.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86RegisterInfo.cpp
A llvm/test/CodeGen/X86/amx-fp8-internal.ll
Log Message:
-----------
[X86][AMX] Add AMX FP8 new APIs (#115829)
This is a follow-up to #113850.
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: f539d92dcabb4fd114d6cb1774e914e03adb0cc5
https://github.com/llvm/llvm-project/commit/f539d92dcabb4fd114d6cb1774e914e03adb0cc5
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[ci] Write test results to unique file names (#113160)
In this patch I'm using a new lit option so that the pipeline writes
many results files, one for each time lit is run:
```
--use-unique-output-file-name
When enabled, lit will add a unique element to the output file name, before the extension. For example "results.xml" will become "results.<something>.xml". The
"<something>" is not ordered in any way and is chosen so that existing files are not overwritten. [Default: Off]
```
(I added this to lit recently)
Alternatives were considered:
* mkfifo - does not work on bash for Windows.
* tail -f - does not print full content on file truncation
* lit wrapper script - more complication than using an option to lit
itself
* ninja/mv file/ninja/mv file etc - lots of changes needed to make the
scripts build each target separately
And after feedback I decided that using an option to lit itself is the
cleanest way to go. It can be removed when we no longer need it.
If I run the Linux build after this change:
```
$ bash ./.ci/monolithic-linux.sh "clang;lldb;lld" "check-lldb-shell check-lld" "libcxx;libcxxabi" "check-libcxx check-libcxxabi"
```
I get multiple test result files. In my case some tests fail so runtimes
aren't checked, but all projects are so there is 1 file for lldb and one
for lld:
```
$ ls build/*.xml
build/test-results.klc82utf.xml build/test-results.majylh73.xml
```
This change just collects the XML files as artifacts. Once I know that's
working, I can set up test reporting to make a summary of them.
Commit: e74a002433b4cf7f891ceedb61bd862867218a8b
https://github.com/llvm/llvm-project/commit/e74a002433b4cf7f891ceedb61bd862867218a8b
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
A .ci/generate_test_report.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
A .ci/requirements.txt
Log Message:
-----------
[ci] New script to generate test reports as Buildkite Annotations (#113447)
The CI builds now send the results of every lit run to a unique file.
This means we can read them all to make a combined report for all
tests.
This report will be shown as an "annotation" in the build results:
https://buildkite.com/docs/agent/v3/cli-annotate#creating-an-annotation
Here is an example:
https://buildkite.com/llvm-project/github-pull-requests/builds/112660
(make sure it is showing "All" instead of "Failures")
This is an alternative to using the existing Buildkite plugin:
https://github.com/buildkite-plugins/junit-annotate-buildkite-plugin
As the plugin is:
* Specific to Buildkite, and we may move away from Buildkite.
* Requires docker, unless we were to fork it ourselves.
* Does not let you customise the report format unless again,
we make our own fork.
Annotations use GitHub's flavour of Markdown so the main code in the
script generates that text. There is an extra "style" argument generated
to make the formatting nicer in Buildkite.
"context" is the name of the annotation that will be created. By using
different context names for Linux and Windows results we get 2 separate
annotations.
The script also handles calling the buildkite-agent. This makes passing
extra arguments to the agent easier, rather than piping the output of
this script into the agent.
In the future we can remove the agent part of it and simply use
the report content. Either printed to stdout or as a comment on
the GitHub PR.
Commit: 9652c1cc098fb2b237f0d4c91f3b3414f7afdbe1
https://github.com/llvm/llvm-project/commit/9652c1cc098fb2b237f0d4c91f3b3414f7afdbe1
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP] Use iterator_range/range-for for FindClauses, NFC (#115749)
Implement a thin wrapper `GetClauses` that returns llvm::iterator_range
made from the pair of iterators returned by FindClauses. This enables
the use of range-for, which in turn makes the code a little more
readable.
Commit: e05d91b30e1fe2ed9a90911de2b959395d0318c8
https://github.com/llvm/llvm-project/commit/e05d91b30e1fe2ed9a90911de2b959395d0318c8
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
Log Message:
-----------
[analyzer][NFC] Make RegionStore dumps deterministic (#115615)
Dump the memory space clusters before the other clusters, in
alphabetical order. Then default bindings over direct bindings, and if
any has symbolic offset, then those should come before the ones with
concrete offsets.
In theory, we should either have a symbolic offset OR concrete offsets,
but never both at the same time.
Needed for #114835
Commit: c3c2e1e161b4f11a2070966453067584223427de
https://github.com/llvm/llvm-project/commit/c3c2e1e161b4f11a2070966453067584223427de
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
Log Message:
-----------
[AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (#114406)
For partial reductions in the situation of the number of elements
being halved, a pair of wide add instructions can be used.
Commit: 6d8d9fc8d279623cca94b2b875a92517ed308f18
https://github.com/llvm/llvm-project/commit/6d8d9fc8d279623cca94b2b875a92517ed308f18
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Add test for icmp of pointers with known bits (NFC)
Commit: e3c958a9a4e47b97d8740dec182b946c50152616
https://github.com/llvm/llvm-project/commit/e3c958a9a4e47b97d8740dec182b946c50152616
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/include/__chrono/duration.h
M libcxx/include/ratio
Log Message:
-----------
[libc++] Replace template structs with template variables in <ratio> (#115782)
This avoids a bit of boilerplate.
Commit: 1c9467f148c36fbf89e4b73ad0743041bd0de470
https://github.com/llvm/llvm-project/commit/1c9467f148c36fbf89e4b73ad0743041bd0de470
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/trunctfbf2.c
Log Message:
-----------
compiler-rt/lib: Fix newline at eof
Commit: 3793decaaaf8bc4f7748e8e3c7f8073a80b677e7
https://github.com/llvm/llvm-project/commit/3793decaaaf8bc4f7748e8e3c7f8073a80b677e7
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] port 28e4aad45a64
Commit: 12e3ed8de8c6063b15916b3faf67c8c9cd17df1f
https://github.com/llvm/llvm-project/commit/12e3ed8de8c6063b15916b3faf67c8c9cd17df1f
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/Basic/DiagnosticIDs.cpp
Log Message:
-----------
[clang] Avoid possibly expensive SM call when suppression-mappings are off
Commit: 71d4f343f52756ca086d02151662e68633a0db52
https://github.com/llvm/llvm-project/commit/71d4f343f52756ca086d02151662e68633a0db52
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics-library.cpp
Log Message:
-----------
[flang] Use libm routine for compile-time folding on AIX (#114106)
On AIX, the implementation of `std::sqrt` is different from that of
`csqrtf`, it leads to different results in compile-time folding and
runtime evaluation. This patch is to make the routine calls using
the same implementation.
Commit: eea8b44aaa3464f52dea1d56ca47e0519b08fd36
https://github.com/llvm/llvm-project/commit/eea8b44aaa3464f52dea1d56ca47e0519b08fd36
Author: macurtis-amd <macurtis at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/intersect-empty-attr.ll
Log Message:
-----------
[GVN] Handle empty attrs in Expression == (#115761)
Commit: bf483ddb42065405e345393e022dc72357ec5a3a
https://github.com/llvm/llvm-project/commit/bf483ddb42065405e345393e022dc72357ec5a3a
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
A llvm/test/DebugInfo/MIR/X86/dbg-prologue-backup-loc2.mir
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
A llvm/test/DebugInfo/X86/dbg-prolog-end-backup-loc.ll
M llvm/test/DebugInfo/X86/dbg-prolog-end.ll
M llvm/test/DebugInfo/X86/empty-line-info.ll
M llvm/test/DebugInfo/X86/loop-align-debug.ll
Log Message:
-----------
[DWARF] Emit a worst-case prologue_end flag for pathological inputs (#107849)
prologue_end usually indicates where the end of the function-initialization
lies, and is where debuggers usually choose to put the initial breakpoint
for a function. Our current algorithm piggy-backs it on the first available
source-location: which doesn't necessarily have anything to do with the
start of the function.
To avoid this in heavily-optimised code that lacks many useful source
locations, pick a worst-case "if all else fails" prologue_end location, of
the first instruction that appears to do meaningful computation. It'll be
given the function-scope line number, which should run-on from the start of
the function anyway. This means if your code is completely inverted by the
optimiser, you can at least put a breakpoint at the _start_ like you
expect, even if it's difficult to then step through.
This patch also attempts to preserve some good behaviour we have without
optimisations -- at O0, if the prologue immediately falls into a loop body
without any computation happening, then prologue_end lands at the start of
that loop. This is desirable; but does mean we need to do more work to
detect and support those situations.
Commit: 88883528fd324bc641e5ef223631974c5de4c738
https://github.com/llvm/llvm-project/commit/88883528fd324bc641e5ef223631974c5de4c738
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
Log Message:
-----------
[NFC] Eliminate use of `lookupLLVMIntrinsicByName` in Coroutines (#114851)
Eliminate use of `lookupLLVMIntrinsicByName` from Coroutines in
preparation of changing it to support a different form of intrinsic name
table generated by intrinsic emitter.
Also eliminate call to `isCoroutineIntrinsicName` from
`declaresAnyIntrinsic` as the list of names traversed is the same list
which `isCoroutineIntrinsicName` checks.
Commit: 9a9af0a23fc910694b6a806b7ce9cb2e7e4240ef
https://github.com/llvm/llvm-project/commit/9a9af0a23fc910694b6a806b7ce9cb2e7e4240ef
Author: Shaw Young <58664393+shawbyoung at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Profile/ProfileYAMLMapping.h
M bolt/include/bolt/Profile/YAMLProfileReader.h
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
A bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
A bolt/test/X86/match-blocks-with-pseudo-probes.test
M bolt/test/X86/match-functions-with-calls-as-anchors.test
M bolt/test/X86/reader-stale-yaml.test
Log Message:
-----------
[BOLT] Match blocks with pseudo probes (#99891)
Match inline trees first between profile and the binary: by GUID,
checksum, parent, and inline site for inlined functions. Map profile
probes to binary probes via matched inline tree nodes. Each binary probe
has an associated binary basic block. If all probes from one profile
basic block map to the same binary basic block, it’s an exact match,
otherwise the block is determined by majority vote and reported as loose
match.
Pseudo probe matching happens between exact hash matching and call/loose
matching.
Introduce ProbeMatchSpec - a mechanism to match probes belonging to
another binary function. For example, given functions foo and bar:
```
void foo() {
bar();
}
```
profiled binary: bar is not inlined => have top-level function bar
new binary where the profile is applied to: bar is inlined into foo.
Currently, BOLT does 1:1 matching between profile functions and binary
functions based on the name. #100446 will extend this to N:M where
multiple profiles can be matched to one binary function (as in the
example above where binary function foo would use profiles for foo and
bar), and one profile can be matched to multiple binary functions (e.g.
if bar was inlined into multiple functions).
In this diff, ProbeMatchSpecs would only have one BinaryFunctionProfile
(existing name-based matching).
Test Plan: Added match-blocks-with-pseudo-probes.test
Performance test:
- Setup:
- Baseline no-BOLT: Clang with pseudo probes, ThinLTO + CSSPGO
(#79942)
- BOLT fresh: BOLTed Clang using fresh profile,
- BOLT stale (hash): BOLTed Clang using stale profile (collected on
Clang 10K commits back), `-infer-stale-profile` (hash+call block
matching)
- BOLT stale (+probe): BOLTed Clang using stale profile,
`-infer-stale-profile` with `-stale-matching-with-pseudo-probes`
(hash+call+pseudo probe block matching)
- 2S Intel SKX Xeon 6138 with 40C/80T and 256GB RAM, using 20C/40T for
build,
- BOLT profiles are collected on Clang compiling large preprocessed
C++ file.
- Benchmark: building Clang (average of 5 runs), see driver in
aaupov/llvm-devmtg-2022
- Results, wall time, lower is better:
- Baseline no-BOLT: 429.52 +- 2.61s,
- BOLT stale (hash): 413.21 +- 2.19s,
- BOLT stale (+probe): 409.69 +- 1.41s,
- BOLT fresh: 384.50 +- 1.80s.
---------
Co-authored-by: Amir Ayupov <aaupov at fb.com>
Commit: 469520ed9acc1308a492d03cf859703054a61730
https://github.com/llvm/llvm-project/commit/469520ed9acc1308a492d03cf859703054a61730
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
Log Message:
-----------
Revert "[analyzer][NFC] Make RegionStore dumps deterministic" (#115881)
Reverts llvm/llvm-project#115615
There are two problems with this PR:
1) If any of the dumps contains a store with a symbolic binding, we
crash.
2) The memory space clusters come last among the clusters, which is not
what I intended.
I'm reverting because of the crash.
Commit: 44076c9822bd80f11228474f98789eaafe4285b0
https://github.com/llvm/llvm-project/commit/44076c9822bd80f11228474f98789eaafe4285b0
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/test/CodeGen/AArch64/ptrauth-call.ll
M llvm/test/CodeGen/AArch64/ptrauth-ret-trap.ll
A llvm/test/CodeGen/AArch64/ptrauth-tail-call-regalloc.ll
M llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
Log Message:
-----------
[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)
Move the emission of the checks performed on the authenticated LR value
during tail calls to AArch64AsmPrinter class, so that different checker
sequences can be reused by pseudo instructions expanded there.
This adds one more option to AuthCheckMethod enumeration, the generic
XPAC variant which is not restricted to checking the LR register.
Commit: 6fe7ad8be35d054f3ba8437979b01b0aba3abd0e
https://github.com/llvm/llvm-project/commit/6fe7ad8be35d054f3ba8437979b01b0aba3abd0e
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
Log Message:
-----------
[mlir][vector][nfc] Add tests + update docs for narrow-type emulation (#115460)
The documentation for narrow-type emulation was sparse, so I’ve expanded
it with additional clarifications (e.g., specifying that the example
discusses `i4` -> `i8` emulation).
I also noticed some inconsistencies in testing for narrow-type
emulation, with several cases covered only for "loading" and missing for
"storing." To address this, I’ve:
* Added comments in the test file for easier reference,
* Added the missing tests for `vector.maskedstore`.
Additionally, I’ve renamed tests for `vector.masked{load|store}` for
clarity:
* `@vector_cst_maskedload_i8` -> `@vector_maskedload_i8_constant_mask`.
This makes it easier to contrast with similar functions, such as
`@vector_maskedload_i8`.
Lastly, I’ve added a high-level comment in VectorEmulateNarrowType.cpp
to clarify the overall design and intent of the file.
Commit: 99f44c8fed5b538ab37c4227d9059a65450b68de
https://github.com/llvm/llvm-project/commit/99f44c8fed5b538ab37c4227d9059a65450b68de
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/docs/Status/Cxx17Papers.csv
Log Message:
-----------
[libc++] update comment for P0067R5 (#113239)
Fix review comment from #91651 that was not addressed.
Commit: 3cc852ece438a63e7b09d1c84a81d21598454e1a
https://github.com/llvm/llvm-project/commit/3cc852ece438a63e7b09d1c84a81d21598454e1a
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/aarch64-targetattr.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/Preprocessor/aarch64-target-features.c
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
Log Message:
-----------
[FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (#113281)
Currently we maintain a hand written list of subtarget features which we
are implied for a given FMV feature. It is more robust to expand such
dependencies using ExtensionDependency from TargetParser, since that is
generated by tablegen. For this to work each FMV feature must have a
corresponding SubtargetFeature in place. FMV features which didn't
satisfy this criteria have been removed from the ACLE specification
(https://github.com/ARM-software/acle/pull/315). However, I deliberately
marked the ArchExtKind in FMVInfo structure as std::optional in case we
decide to break this rule in the future.
I have also added the missing dependencies:
* FEAT_DPB2 -> FEAT_DPB
* FEAT_FlagM2 -> FEAT_FlagM
Commit: 0d2ef7af1956b463b87a09500bd87bd4147616d4
https://github.com/llvm/llvm-project/commit/0d2ef7af1956b463b87a09500bd87bd4147616d4
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libclc/generic/lib/gen_convert.py
Log Message:
-----------
[libclc] Use builtin_convertvector to convert between vector types (#115865)
This keeps values in vectors, rather than scalarizing them and then
reconstituting the vector. The builtin is identical to performing a
C-style cast on each element, which is what we were doing by recursively
splitting the vector down to calling the "base" conversion function on
each element.
Commit: 7302c8dbe71b7c03b73a35a21fa4b415fa1f4505
https://github.com/llvm/llvm-project/commit/7302c8dbe71b7c03b73a35a21fa4b415fa1f4505
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/big_int.h
M libc/src/__support/float_to_string.h
M libc/src/__support/integer_literals.h
M libc/src/__support/str_to_float.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/str_to_long_double_test.cpp
M libc/test/src/math/smoke/CanonicalizeTest.h
M libc/test/src/stdlib/strtold_test.cpp
Log Message:
-----------
[libc][i386] FPBit support for 96b long double (#115084)
`long double` is haunted on most architectures, but it is especially so on
i386-linux-gnu. While have 80b of significant data, on i386-linux-gnu this type
has 96b of storage.
Fixes for supporting printf family of conversions for `long double` on
i386-linux-gnu. This allows the libc-stdlib-tests and libc_stdio_unittests
ninja target tests to pass on i386-linux-gnu.
Fixes: #110894
Link: #93709
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 6256f4b807e0637784c0bea948488adfe87cee5b
https://github.com/llvm/llvm-project/commit/6256f4b807e0637784c0bea948488adfe87cee5b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
R llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
A llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[CostModel][RISCV] Rename misleadingly named test file
RVV intrinsics are the C intrinsic API; this file actually contains tests
for the vp.* family of intrinsics.
Commit: fe18ab983d08b9e1726314009d677517d9cd5935
https://github.com/llvm/llvm-project/commit/fe18ab983d08b9e1726314009d677517d9cd5935
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
A llvm/test/DebugInfo/X86/is_stmt-at-block-start.ll
Log Message:
-----------
[DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (#108251)
This patch follows on from the changes made in #105524, by adding an
additional heuristic that prevents us from applying the start-of-MBB
is_stmt flag when we can see that, for all direct branches to the MBB,
the last line stepped on before the branch is the same as the first line
of the MBB. This is mainly to prevent certain pathological cases, such
as macros that expand to multiple basic blocks that all have the same
source location, from giving us repeated steps on the same line. This
approach is not comprehensive, since it relies on analyzeBranch to read
edges, but the default fallback of applying is_stmt may lead only to
useless steps in some cases, rather than skipping useful steps
altogether.
Commit: a55248789ed3f653740e0723d016203b9d585f26
https://github.com/llvm/llvm-project/commit/a55248789ed3f653740e0723d016203b9d585f26
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libclc/generic/lib/math/clc_remquo.cl
Log Message:
-----------
[libclc] Avoid using undefined vector3 components (#115857)
Using '.hi' on a vector3 is technically allowed by the spec and is
treated as a 4-element vector with an "undefined" w component. However,
it's more undef/poison code for the compiler to process and remove. We
can easily avoid it with a dedicated macro.
Commit: 8a1ca6cad9cd0e972c322910cdfbbe9552c6c7ca
https://github.com/llvm/llvm-project/commit/8a1ca6cad9cd0e972c322910cdfbbe9552c6c7ca
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
R .ci/generate_test_report.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
R .ci/requirements.txt
Log Message:
-----------
Revert "[ci] New script to generate test reports as Buildkite Annotations (#113447)"
This reverts commit e74a002433b4cf7f891ceedb61bd862867218a8b.
As it is failing on Linux with "OSError: [Errno 7] Argument list too long: 'buildkite-agent'".
Commit: 63fb980d50c2ab513dd046f93983bab93dee787f
https://github.com/llvm/llvm-project/commit/63fb980d50c2ab513dd046f93983bab93dee787f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/IR/Instructions.cpp
Log Message:
-----------
[IR] Add helper for comparing KnownBits with IR predicate (NFC) (#115878)
Add `ICmpInst::compare()` overload accepting `KnownBits`, similar to the
existing one accepting `APInt`. This is not directly part of KnownBits
(or APInt) for layering reasons.
Commit: 47ef3a0951e1f285caef4aff289b12ed0a57137d
https://github.com/llvm/llvm-project/commit/47ef3a0951e1f285caef4aff289b12ed0a57137d
Author: Greg Roth <grroth at microsoft.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
Log Message:
-----------
[DirectX] Eliminate resource global variables from module (#114105)
By giving these intrinsics their appropriate attributes, loads of
globals that are stored on the other side of these calls can be
eliminated by the EarlyCSE pass. Stores to the same globals and the
globals themselves require more direct intervention as part of the
create/annotated handle lowering.
Adds a test that verifies that the unneeded globals and their uses can
be eliminated and also that the attributes are set properly.
Fixes #104271
Commit: 20c4e95b9c03a77c2e5ce5f354114752d380c591
https://github.com/llvm/llvm-project/commit/20c4e95b9c03a77c2e5ce5f354114752d380c591
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/test/Shell/Commands/command-disassemble-mixed.c
M lldb/test/Shell/Commands/command-expr-diagnostics.test
M lldb/test/Shell/Commands/command-target-create-resolve-exe.test
M lldb/test/Shell/Expr/TestAnonNamespaceParamFunc.cpp
M lldb/test/Shell/Expr/TestIRMemoryMapWindows.test
M lldb/test/Shell/Process/Windows/exception_access_violation.cpp
M lldb/test/Shell/Process/Windows/process_load.cpp
M lldb/test/Shell/SymbolFile/DWARF/packed.cpp
M lldb/test/Shell/SymbolFile/NativePDB/local-variables.cpp
M lldb/test/Shell/SymbolFile/NativePDB/stack_unwinding01.cpp
M lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
M lldb/test/Shell/SymbolFile/PDB/class-layout.test
M lldb/test/Shell/SymbolFile/PDB/compilands.test
M lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
M lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
M lldb/test/Shell/SymbolFile/PDB/pointers.test
M lldb/test/Shell/SymbolFile/PDB/type-quals.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
M lldb/test/Shell/SymbolFile/PDB/variables-locations.test
M lldb/test/Shell/SymbolFile/PDB/vbases.test
M lldb/test/Shell/Target/dependent-modules-nodupe-windows.test
M lldb/test/Shell/lit.cfg.py
Log Message:
-----------
[lldb][test] Fix remote Shell tests failures on Windows host (#115716)
Since the remote Shell test execution feature was added, these tests
should now be disabled on Windows target instead of Windows host.
It should fix failures on
https://lab.llvm.org/staging/#/builders/197/builds/76.
Commit: ccddb6ffad1277c53d07de7d52a1b3c247084638
https://github.com/llvm/llvm-project/commit/ccddb6ffad1277c53d07de7d52a1b3c247084638
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
R llvm/test/DebugInfo/MIR/X86/dbg-prologue-backup-loc2.mir
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
R llvm/test/DebugInfo/X86/dbg-prolog-end-backup-loc.ll
M llvm/test/DebugInfo/X86/dbg-prolog-end.ll
M llvm/test/DebugInfo/X86/empty-line-info.ll
M llvm/test/DebugInfo/X86/loop-align-debug.ll
Log Message:
-----------
Revert "[DWARF] Emit a worst-case prologue_end flag for pathological inputs (#107849)"
This reverts commit bf483ddb42065405e345393e022dc72357ec5a3a.
See PR, there's a test testing for this behaviour (possibly adaptable), and
a duplicate line entry too
Commit: faaf2dbf6d2c080d817c4dfe9f888e456418bc2e
https://github.com/llvm/llvm-project/commit/faaf2dbf6d2c080d817c4dfe9f888e456418bc2e
Author: John Harrison <harjohn at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactoring JSONUtils to not use `g_dap` and instead passing in required arguments. (#115561)
This is part of a larger refactor to remove the global `g_dap` variable.
Commit: 5a094241de42867c35611b0eec6f3e19d8718c22
https://github.com/llvm/llvm-project/commit/5a094241de42867c35611b0eec6f3e19d8718c22
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Clarify RISC-V v? constraints
Pull Request: https://github.com/llvm/llvm-project/pull/115820
Commit: c3c3ccc364578c1897780974f685a44bdeec1584
https://github.com/llvm/llvm-project/commit/c3c3ccc364578c1897780974f685a44bdeec1584
Author: lialan <alan.li at me.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
Log Message:
-----------
[MLIR] support dynamic indexing of `vector.maskedload` in `VectorEmulateNarrowTypes` (#115070)
Based on existing emulating scheme, this patch expands to support
dynamic indexing by dynamically create intermediate new mask, new pass
thru vector and dynamically insert the result into destination vector.
the dynamic parts are constructed by multiple `vector.extract` and
`vector.insert` to rearrange the original mask/passthru vector, as
`vector.insert_strided_slice` and `vector.extract_strided_slice` only
take static offsets and indices.
Note: currently only supporting `vector.maskedload` with masks created
by `vector.constant_mask`. `vector.create_mask` is currently not
working.
---------
Co-authored-by: hasekawa-takumi <167335845+hasekawa-takumi at users.noreply.github.com>
Commit: 584d1a632f3af0daca4db02f7f3b2c7f48ab0ddf
https://github.com/llvm/llvm-project/commit/584d1a632f3af0daca4db02f7f3b2c7f48ab0ddf
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc] Create aliases with custom_command (#115885)
This in conjunction with a custom target prevents them from being
rebuilt if there are no changes.
Commit: 207e5ccceec8d3cc3f32723e78f2a142bc61b07d
https://github.com/llvm/llvm-project/commit/207e5ccceec8d3cc3f32723e78f2a142bc61b07d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
A clang/test/CodeGen/AArch64/ABI-align-packed-assembly.c
A clang/test/CodeGen/AArch64/ABI-align-packed.c
A clang/test/CodeGen/AArch64/args-hfa.c
A clang/test/CodeGen/AArch64/args.cpp
A clang/test/CodeGen/AArch64/arguments-hfa-v3.c
A clang/test/CodeGen/AArch64/attr-mode-complex.c
A clang/test/CodeGen/AArch64/attr-mode-float.c
A clang/test/CodeGen/AArch64/bf16-dotprod-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-lane-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-ldst-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
A clang/test/CodeGen/AArch64/branch-protection-attr.c
A clang/test/CodeGen/AArch64/byval-temp.c
A clang/test/CodeGen/AArch64/cpu-supports-target.c
A clang/test/CodeGen/AArch64/cpu-supports.c
A clang/test/CodeGen/AArch64/debug-sve-vector-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx2-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx3-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx4-types.c
A clang/test/CodeGen/AArch64/debug-types.c
A clang/test/CodeGen/AArch64/elf-pauthabi.c
A clang/test/CodeGen/AArch64/fix-cortex-a53-835769.c
A clang/test/CodeGen/AArch64/fmv-dependencies.c
A clang/test/CodeGen/AArch64/fmv-resolver-emission.c
A clang/test/CodeGen/AArch64/fmv-streaming.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_scale.c
A clang/test/CodeGen/AArch64/fpm-helpers.c
A clang/test/CodeGen/AArch64/gcs.c
A clang/test/CodeGen/AArch64/inline-asm.c
A clang/test/CodeGen/AArch64/inlineasm-ios.c
A clang/test/CodeGen/AArch64/ls64-inline-asm.c
A clang/test/CodeGen/AArch64/ls64.c
A clang/test/CodeGen/AArch64/matmul.cpp
A clang/test/CodeGen/AArch64/mixed-target-attributes.c
A clang/test/CodeGen/AArch64/mops.c
A clang/test/CodeGen/AArch64/neon-2velem.c
A clang/test/CodeGen/AArch64/neon-3v.c
A clang/test/CodeGen/AArch64/neon-across.c
A clang/test/CodeGen/AArch64/neon-dot-product.c
A clang/test/CodeGen/AArch64/neon-extract.c
A clang/test/CodeGen/AArch64/neon-faminmax-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fcvt-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fma.c
A clang/test/CodeGen/AArch64/neon-fp16fml.c
A clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_fscale.c
A clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/neon-intrinsics.c
A clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
A clang/test/CodeGen/AArch64/neon-ldst-one.c
A clang/test/CodeGen/AArch64/neon-luti.c
A clang/test/CodeGen/AArch64/neon-misc-constrained.c
A clang/test/CodeGen/AArch64/neon-misc.c
A clang/test/CodeGen/AArch64/neon-perm.c
A clang/test/CodeGen/AArch64/neon-range-checks.c
A clang/test/CodeGen/AArch64/neon-scalar-copy.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
A clang/test/CodeGen/AArch64/neon-sha3.c
A clang/test/CodeGen/AArch64/neon-shifts.c
A clang/test/CodeGen/AArch64/neon-sm4-sm3.c
A clang/test/CodeGen/AArch64/neon-tbl.c
A clang/test/CodeGen/AArch64/neon-vcadd.c
A clang/test/CodeGen/AArch64/neon-vcmla.c
A clang/test/CodeGen/AArch64/neon-vcombine.c
A clang/test/CodeGen/AArch64/neon-vget-hilo.c
A clang/test/CodeGen/AArch64/neon-vget.c
A clang/test/CodeGen/AArch64/neon-vsqadd-float-conversion.c
A clang/test/CodeGen/AArch64/neon-vuqadd-float-conversion-warning.c
A clang/test/CodeGen/AArch64/poly-add.c
A clang/test/CodeGen/AArch64/poly128.c
A clang/test/CodeGen/AArch64/poly64.c
A clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
A clang/test/CodeGen/AArch64/pure-scalable-args.c
A clang/test/CodeGen/AArch64/sign-return-address.c
A clang/test/CodeGen/AArch64/sme-inline-streaming-attrs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/aarch64-sme-attrs.cpp
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_cnt.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_read.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_builtin.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_write.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_zero.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/aarch64-sme2-attrs.cpp
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add_sub_za16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_bmop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_clamp.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtn.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_faminmax.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fmlas16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_frint.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_int_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_max.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_maxnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_min.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_minnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mla.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlal.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlall.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mls.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlsl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mopa_nonwide.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_read.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sqdmulh.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sub.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vdot.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_qrshr.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_rshl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_zero_zt.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_movaz.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_zero.c
A clang/test/CodeGen/AArch64/soft-float-abi-errors.c
A clang/test/CodeGen/AArch64/soft-float-abi.c
A clang/test/CodeGen/AArch64/strictfp-builtins.c
A clang/test/CodeGen/AArch64/subarch-compatbility.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
A clang/test/CodeGen/AArch64/sve-inline-asm-crash.c
A clang/test/CodeGen/AArch64/sve-inline-asm-datatypes.c
A clang/test/CodeGen/AArch64/sve-inline-asm-negative-test.c
A clang/test/CodeGen/AArch64/sve-inline-asm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/README
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abs.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acle.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_aclt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_add.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adda.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_addv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_and.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_andv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bic.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brka.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpeq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmple.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmplt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpne.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpuo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_compact.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvtnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_div.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_divr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq_const.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eorv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_expa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_exth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_index.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp32.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_max.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_min.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mov.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_msb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nand.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_neg.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmsb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_not.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfalse.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfirst.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pnext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptest.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptrue.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdech.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qinch.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qsub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rbit.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rdffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpe.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recps.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinti.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrte.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrts.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_scale.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_setffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sqrt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_subr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sudot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tsmul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tssel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpkhi.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpklo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_usdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilele.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilelt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_wrffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2.c
A clang/test/CodeGen/AArch64/sve-vector-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
A clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vector-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vector-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vector-subscript-ops.c
A clang/test/CodeGen/AArch64/sve-vls-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vls-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vls-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vls-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vls-subscript-ops.c
A clang/test/CodeGen/AArch64/sve.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aba.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adalp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bcax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bdep.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bext.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bgrp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl1n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl2n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cdot.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cmla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtxnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eor3.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eorbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eortb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_faminmax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histcnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histseg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_logb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_luti.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_match.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mls.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nbsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nmatch.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qabs.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qcadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qneg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdcmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlsh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshlu.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rax1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_recpe.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rhadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsqrte.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sli.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4e.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4ekey.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sri.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subltb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_uqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilege.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilegt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_xar.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfadd.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmax.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmin.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfminnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfsub.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_cntp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_int_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pext.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pfalse.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ptrue.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qcvtn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qrshr.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_sclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_undef_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_pn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_x2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
A clang/test/CodeGen/AArch64/svepcs.c
A clang/test/CodeGen/AArch64/sysregs-target.c
A clang/test/CodeGen/AArch64/targetattr-arch.c
A clang/test/CodeGen/AArch64/targetattr-crypto.c
A clang/test/CodeGen/AArch64/targetattr.c
A clang/test/CodeGen/AArch64/tme.cpp
A clang/test/CodeGen/AArch64/type-sizes.c
A clang/test/CodeGen/AArch64/v8.1a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.5a-scalar-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.6a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/varargs-ms.c
A clang/test/CodeGen/AArch64/varargs-sve.c
A clang/test/CodeGen/AArch64/varargs.c
A clang/test/CodeGen/AArch64/vpcs.c
R clang/test/CodeGen/aarch64-ABI-align-packed-assembly.c
R clang/test/CodeGen/aarch64-ABI-align-packed.c
R clang/test/CodeGen/aarch64-args-hfa.c
R clang/test/CodeGen/aarch64-args.cpp
R clang/test/CodeGen/aarch64-arguments-hfa-v3.c
R clang/test/CodeGen/aarch64-attr-mode-complex.c
R clang/test/CodeGen/aarch64-attr-mode-float.c
R clang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-reinterpret-intrinsics.c
R clang/test/CodeGen/aarch64-branch-protection-attr.c
R clang/test/CodeGen/aarch64-byval-temp.c
R clang/test/CodeGen/aarch64-cpu-supports-target.c
R clang/test/CodeGen/aarch64-cpu-supports.c
R clang/test/CodeGen/aarch64-debug-sve-vector-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx2-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx3-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx4-types.c
R clang/test/CodeGen/aarch64-debug-types.c
R clang/test/CodeGen/aarch64-elf-pauthabi.c
R clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
R clang/test/CodeGen/aarch64-fmv-dependencies.c
R clang/test/CodeGen/aarch64-fmv-resolver-emission.c
R clang/test/CodeGen/aarch64-fmv-streaming.c
R clang/test/CodeGen/aarch64-fp8-intrinsics/acle_sme2_fp8_scale.c
R clang/test/CodeGen/aarch64-fpm-helpers.c
R clang/test/CodeGen/aarch64-gcs.c
R clang/test/CodeGen/aarch64-inline-asm.c
R clang/test/CodeGen/aarch64-inlineasm-ios.c
R clang/test/CodeGen/aarch64-ls64-inline-asm.c
R clang/test/CodeGen/aarch64-ls64.c
R clang/test/CodeGen/aarch64-matmul.cpp
R clang/test/CodeGen/aarch64-mixed-target-attributes.c
R clang/test/CodeGen/aarch64-mops.c
R clang/test/CodeGen/aarch64-neon-2velem.c
R clang/test/CodeGen/aarch64-neon-3v.c
R clang/test/CodeGen/aarch64-neon-across.c
R clang/test/CodeGen/aarch64-neon-dot-product.c
R clang/test/CodeGen/aarch64-neon-extract.c
R clang/test/CodeGen/aarch64-neon-faminmax-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fma.c
R clang/test/CodeGen/aarch64-neon-fp16fml.c
R clang/test/CodeGen/aarch64-neon-fp8-intrinsics/acle_neon_fscale.c
R clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-neon-intrinsics.c
R clang/test/CodeGen/aarch64-neon-ldst-one-rcpc3.c
R clang/test/CodeGen/aarch64-neon-ldst-one.c
R clang/test/CodeGen/aarch64-neon-luti.c
R clang/test/CodeGen/aarch64-neon-misc-constrained.c
R clang/test/CodeGen/aarch64-neon-misc.c
R clang/test/CodeGen/aarch64-neon-perm.c
R clang/test/CodeGen/aarch64-neon-range-checks.c
R clang/test/CodeGen/aarch64-neon-scalar-copy.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem-constrained.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
R clang/test/CodeGen/aarch64-neon-sha3.c
R clang/test/CodeGen/aarch64-neon-shifts.c
R clang/test/CodeGen/aarch64-neon-sm4-sm3.c
R clang/test/CodeGen/aarch64-neon-tbl.c
R clang/test/CodeGen/aarch64-neon-vcadd.c
R clang/test/CodeGen/aarch64-neon-vcmla.c
R clang/test/CodeGen/aarch64-neon-vcombine.c
R clang/test/CodeGen/aarch64-neon-vget-hilo.c
R clang/test/CodeGen/aarch64-neon-vget.c
R clang/test/CodeGen/aarch64-neon-vsqadd-float-conversion.c
R clang/test/CodeGen/aarch64-neon-vuqadd-float-conversion-warning.c
R clang/test/CodeGen/aarch64-poly-add.c
R clang/test/CodeGen/aarch64-poly128.c
R clang/test/CodeGen/aarch64-poly64.c
R clang/test/CodeGen/aarch64-pure-scalable-args-empty-union.c
R clang/test/CodeGen/aarch64-pure-scalable-args.c
R clang/test/CodeGen/aarch64-sign-return-address.c
R clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_builtin.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/aarch64-sme2-attrs.cpp
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_faminmax.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_frint.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_max.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_maxnm.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_min.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_minnm.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sqdmulh.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sub.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_add.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_rshl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_zero_zt.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_movaz.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
R clang/test/CodeGen/aarch64-soft-float-abi-errors.c
R clang/test/CodeGen/aarch64-soft-float-abi.c
R clang/test/CodeGen/aarch64-strictfp-builtins.c
R clang/test/CodeGen/aarch64-subarch-compatbility.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
R clang/test/CodeGen/aarch64-sve-inline-asm-crash.c
R clang/test/CodeGen/aarch64-sve-inline-asm-datatypes.c
R clang/test/CodeGen/aarch64-sve-inline-asm-negative-test.c
R clang/test/CodeGen/aarch64-sve-inline-asm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/README
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq_const.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c
R clang/test/CodeGen/aarch64-sve-vector-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vector-bits-codegen.c
R clang/test/CodeGen/aarch64-sve-vector-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vector-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vector-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vector-subscript-ops.c
R clang/test/CodeGen/aarch64-sve-vls-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vls-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vls-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vls-subscript-ops.c
R clang/test/CodeGen/aarch64-sve.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_faminmax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_luti.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dupq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_int_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ldnt1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_loads.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ptrue.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qrshr.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_store.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tblq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tbxq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_undef_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_x2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq2.c
R clang/test/CodeGen/aarch64-svepcs.c
R clang/test/CodeGen/aarch64-sysregs-target.c
R clang/test/CodeGen/aarch64-targetattr-arch.c
R clang/test/CodeGen/aarch64-targetattr-crypto.c
R clang/test/CodeGen/aarch64-targetattr.c
R clang/test/CodeGen/aarch64-tme.cpp
R clang/test/CodeGen/aarch64-type-sizes.c
R clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.5a-neon-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.5a-scalar-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.6a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-varargs-ms.c
R clang/test/CodeGen/aarch64-varargs-sve.c
R clang/test/CodeGen/aarch64-varargs.c
R clang/test/CodeGen/aarch64-vpcs.c
Log Message:
-----------
[test] Move CodeGen/aarch64-* into the AArch64 subfolder
Similar to other targets (AMDGPU, Mips, PowerPC, RISCV, X86, ...)
`ninja check-clang-codegen-aarch64` can be used to test this subfolder.
Pull Request: https://github.com/llvm/llvm-project/pull/115818
Commit: 7387338007e51ba8f85922d87ff18731d6f78365
https://github.com/llvm/llvm-project/commit/7387338007e51ba8f85922d87ff18731d6f78365
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libclc/clc/include/clc/geometric/clc_dot.h
M libclc/clc/include/clc/shared/clc_clamp.h
M libclc/clc/include/clc/shared/clc_max.h
M libclc/clc/include/clc/shared/clc_min.h
Log Message:
-----------
[libclc] Add some include guards to CLC declarations. NFC
Commit: 39351f8e46e3e42b945ed686537f182b4c313289
https://github.com/llvm/llvm-project/commit/39351f8e46e3e42b945ed686537f182b4c313289
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
A clang/test/SemaOpenACC/combined-construct-ast.cpp
A clang/test/SemaOpenACC/combined-construct.cpp
M clang/test/SemaOpenACC/compute-construct-ast.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
M clang/test/SemaOpenACC/compute-construct-if-clause.c
M clang/test/SemaOpenACC/no-branch-in-out.c
M clang/test/SemaOpenACC/no-branch-in-out.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[OpenACC] Implement AST/Sema for combined constructs
Combined constructs (OpenACC 3.3 section 2.11) are a short-cut for
writing a `loop` construct immediately inside of a `compute` construct.
However, this interaction requires we do additional work to ensure that
we get the semantics between the two correct, as well as diagnostics.
This patch adds the semantic analysis for the constructs (but no
clauses), as well as the AST nodes.
Commit: 5f140ba54794fe6ca379362b133eb27780e363d7
https://github.com/llvm/llvm-project/commit/5f140ba54794fe6ca379362b133eb27780e363d7
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
R clang/docs/WarningSuppressionMappings.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/Warnings.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Interpreter/CodeCompletion.cpp
M clang/lib/Serialization/ASTReader.cpp
R clang/test/Misc/Inputs/suppression-mapping.txt
R clang/test/Misc/warning-suppression-mappings-pragmas.cpp
R clang/test/Misc/warning-suppression-mappings.cpp
M clang/tools/driver/cc1gen_reproducer_main.cpp
M clang/tools/driver/driver.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M llvm/include/llvm/Support/SpecialCaseList.h
Log Message:
-----------
Revert "[clang] Introduce diagnostics suppression mappings (#112517)"
This reverts commit 12e3ed8de8c6063b15916b3faf67c8c9cd17df1f.
This reverts commit 41e3919ded78d8870f7c95e9181c7f7e29aa3cc4.
There are some buildbot breakages in
https://lab.llvm.org/buildbot/#/builders/18/builds/6832.
Commit: 6d91d7ce6aeb46d948a5a476909825b71b0c84a2
https://github.com/llvm/llvm-project/commit/6d91d7ce6aeb46d948a5a476909825b71b0c84a2
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/branch-relaxation-rv32.ll
A llvm/test/CodeGen/RISCV/branch-relaxation-rv64.ll
R llvm/test/CodeGen/RISCV/branch-relaxation.ll
Log Message:
-----------
[RISCV][NFC] Split branch-relaxation test
This change splits the llvm/test/CodeGen/RISCV/branch-relaxation.ll test
which contained comments saying that different test functions were valid
or not on rv32/rv64. Not only was this confusing, but the inline
assembly in the test was being passed values wider than xlen on rv32.
Commit: 06e08696248ac01754c87c22cc8a4b797ef46430
https://github.com/llvm/llvm-project/commit/06e08696248ac01754c87c22cc8a4b797ef46430
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Profile/YAMLProfileWriter.cpp
Log Message:
-----------
[BOLT] Fix warnings
This patch fixes:
bolt/lib/Profile/StaleProfileMatching.cpp:694:24: error: unused
variable 'BinHash' [-Werror,-Wunused-variable]
bolt/lib/Profile/YAMLProfileWriter.cpp:206:61: error: missing field
'GUID' initializer [-Werror,-Wmissing-field-initializers]
bolt/lib/Profile/YAMLProfileReader.cpp:840:16: error: unused
variable 'MatchedWithPseudoProbes' [-Werror,-Wunused-variable]
Commit: 2c6424e691e32f79bc303203deb1c91634d62286
https://github.com/llvm/llvm-project/commit/2c6424e691e32f79bc303203deb1c91634d62286
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Ignore trivial functions and [[clang::noescape]]. (#114897)
This PR makes webkit.UncountedLambdaCapturesChecker ignore trivial
functions as well as the one being passed to an argument with
[[clang::noescape]] attribute. This dramatically reduces the false
positive rate for this checker.
To do this, this PR replaces VisitLambdaExpr in favor of checking
lambdas via VisitDeclRefExpr and VisitCallExpr. The idea is that if a
lambda is defined but never called or stored somewhere, then capturing
whatever variable in such a lambda is harmless.
VisitCallExpr explicitly looks for direct invocation of lambdas and
registers its DeclRefExpr to be ignored in VisitDeclRefExpr. If a lambda
is being passed to a function, it checks whether its argument is
annotated with [[clang::noescape]]. If it's not annotated such, it
checks captures for their safety.
Because WTF::switchOn could not be annotated with [[clang::noescape]] as
function type parameters are variadic template function so we hard-code
this function into the checker.
In order to check whether "this" pointer is ref-counted type or not, we
override TraverseDecl and record the most recent method's declaration.
In addition, this PR fixes a bug in isUnsafePtr that it was erroneously
checking whether std::nullopt was returned by isUncounted and
isUnchecked as opposed to the actual boolean value.
Finally, this PR also converts the accompanying test to use -verify and
adds a bunch of tests.
Commit: 789de766b5fc9c8ffa6e808a8baf0e585ac2e818
https://github.com/llvm/llvm-project/commit/789de766b5fc9c8ffa6e808a8baf0e585ac2e818
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Object/ELF.cpp
Log Message:
-----------
[NFC,SHT_LLVM_BB_ADDR_MAP] Fix undefined behaviour in ELF.cpp. (#115830)
`BBEntries` is defined outside of the loop and is used after move which
is undefined behavior.
Commit: b8d6659bff25458693c99a7c53372afcf6d66d7d
https://github.com/llvm/llvm-project/commit/b8d6659bff25458693c99a7c53372afcf6d66d7d
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
A llvm/test/CodeGen/AArch64/block-placement-optimize-branches.ll
M llvm/test/CodeGen/X86/conditional-tailcall.ll
Log Message:
-----------
[CodeLayout] Do not flip branch condition when using optsize (#114607)
* Do not use profile data when flipping a branch condition when
optimizing for size. This should improving outlining and ICF due to more
uniform instruction sequences.
* Refactor `optimizeBranches()` to use early `continue`s
* Use the correct debug location for `insertBranch()`
Commit: 57c33acac8c74eb071ede35d819918d8bd00e45b
https://github.com/llvm/llvm-project/commit/57c33acac8c74eb071ede35d819918d8bd00e45b
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/test/CodeGen/X86/sink-blockfreq.ll
Log Message:
-----------
[MachineSink] Sink into consistent blocks for optsize funcs (#115367)
Do not consider profile data when choosing a successor block to sink
into for optsize functions. This should result in more consistent
instruction sequences which will improve outlining and ICF. We've
observed a slight codesize improvement in a large binary. This is
similar reasoning to https://github.com/llvm/llvm-project/pull/114607.
Using profile data to select a block to sink into was original added in
https://github.com/llvm/llvm-project/commit/d04f7596e79d7c5cf7e4249ad62690afaecd01ec.
Commit: ae7392bf5c5d4c34c901ba4f472282206e68bf7b
https://github.com/llvm/llvm-project/commit/ae7392bf5c5d4c34c901ba4f472282206e68bf7b
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
A clang/test/Analysis/store-dump-orders.cpp
Log Message:
-----------
Reapply "[analyzer][NFC] Make RegionStore dumps deterministic" (#115884)
This is reapplies #115615 without using tuples. The eager call of
`getRegion()` and `getOffset()` could cause crashes when the Store had
symbolic bindings.
Here I'm fixing the crash by lazily calling those getters.
Also, the tuple version poorly sorted the Clusters. The memory spaces
should have come before the regular clusters.
Now, that is also fixed here, demonstrated by the test.
Commit: 1791b25f43f4e6a0b21284ce8076cfab160cb61a
https://github.com/llvm/llvm-project/commit/1791b25f43f4e6a0b21284ce8076cfab160cb61a
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
Log Message:
-----------
[clang][CIR] Change buildX functions to emitX (#115568)
The buildX naming convention originated when the CIRGen implementation
was planned to be substantially different from original CodeGen. CIRGen
is now a much closer adaption of CodeGen, and the emitX to buildX
renaming just makes things more confusing, since CodeGen also has some
helper functions whose names start with build or Build, so it's not
immediately clear which CodeGen function corresponds to a CIRGen buildX
function. Rename the buildX functions back to emitX to fix this.
Commit: 2b5b57c5cf78af66b5b9f514c4b51b4adc9a80df
https://github.com/llvm/llvm-project/commit/2b5b57c5cf78af66b5b9f514c4b51b4adc9a80df
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
Log Message:
-----------
[AMDGPU] Skip non-wwm reg implicit-def from bb prolog (#115834)
Currently all implicit-def instructions are part of
bb prolog. We should only include the wwm-register's
implicit definitions into the BB prolog. The other
vector class registers' implicit defs when exist at
the bb top might cause interference when pushed the
LR_split copy insertion downwards. The SplitKit is
very strict on altering the insertion points and will
assert such instances.
Commit: 3431d133ccfa75d16964be455238e2a1da0c2004
https://github.com/llvm/llvm-project/commit/3431d133ccfa75d16964be455238e2a1da0c2004
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[RISCV][TTI] Implement instruction cost for vp.reduce.* #114184
The VP variants simply return the same costs as the non-VP variants.
This assumes that reductions are VL predicated, and that VL predication
has no additional cost.
Commit: 853d52b8384951167214f81066e316d78f389c28
https://github.com/llvm/llvm-project/commit/853d52b8384951167214f81066e316d78f389c28
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Support derived type in cuf.data_transfer conversion (#115557)
Support derived type in `cuf.data_transfer` conversion by computing
their size in bytes.
Commit: dfb864a735da9153ab8a4bb107d4b01ac81ee364
https://github.com/llvm/llvm-project/commit/dfb864a735da9153ab8a4bb107d4b01ac81ee364
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[TableGen] Use heterogenous lookups with std::map (NFC) (#115810)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
This patch introduces alias:
using DiagsInGroup = std::map<std::string, GroupInfo, std::less<>>;
because the raw type is a bit mouthful.
Commit: c784d321d90a3609caeacfb525b7ccadd41a5195
https://github.com/llvm/llvm-project/commit/c784d321d90a3609caeacfb525b7ccadd41a5195
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[ThinLTO] Use heterogenous lookups with std::map (NFC) (#115812)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: 4048c64306e23b622443bbe7293057a9b07a13bb
https://github.com/llvm/llvm-project/commit/4048c64306e23b622443bbe7293057a9b07a13bb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/utils/TableGen/Common/GlobalISel/PatternParser.cpp
Log Message:
-----------
[llvm] Remove redundant control flow statements (NFC) (#115831)
Identified with readability-redundant-control-flow.
Commit: a93cbd4e762799206ae6e6c45f4a7d0da7e56513
https://github.com/llvm/llvm-project/commit/a93cbd4e762799206ae6e6c45f4a7d0da7e56513
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[SPIRV] Audit `select` Result in SPIRVInstructionSelector (#115193)
- as per the definition of `select` in GlobalISel/InstructionSelector.h
the return value is a boolean denoting if the select was successful
- doing `Result |=` is incorrect as all inserted instructions should be
succesful, hence we change to using `Result &=`
- ensure that the return value of all BuildMI instructions are
propagated correctly
Commit: 13ced90b007fdab3d0ecbe032ead2650d3e7717e
https://github.com/llvm/llvm-project/commit/13ced90b007fdab3d0ecbe032ead2650d3e7717e
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
M libc/include/llvm-libc-types/stdfix-types.h
Log Message:
-----------
[libc] {u}lkbits broken on riscv32 (#115799)
- Re-enabled ulkbits and lkbits for Risc-V
- Bumped `int_lk_t` to a `signed long long` and a `uint_ulk_t` to an
`unsigned long long` to guarantee they both fit in 8 bytes, which `long
_Accum` and `unsigned long _Accum` are defaulted to on 32bit
architectures.
This is probably inconvenient on systems that have a word size larger
than 64 bits?
#115778
Commit: c284326755b446c811d2bf0ee5f461b493ebf920
https://github.com/llvm/llvm-project/commit/c284326755b446c811d2bf0ee5f461b493ebf920
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/test/src/__support/CMakeLists.txt
Log Message:
-----------
[libc] Disable block test on AMDGPU as well
Summary:
Recently started failing on AMDGPU as well, will disable until I can
bisect it.
Commit: aaa37d6755e635bbd62ba58896acd54ceef64610
https://github.com/llvm/llvm-project/commit/aaa37d6755e635bbd62ba58896acd54ceef64610
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/Target/PowerPC/CMakeLists.txt
M llvm/lib/Target/PowerPC/PPC.h
R llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-used-with-stringpool.ll
M llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll
M llvm/test/CodeGen/PowerPC/expand-contiguous-isel.ll
M llvm/test/CodeGen/PowerPC/licm-remat.ll
M llvm/test/CodeGen/PowerPC/merge-private.ll
R llvm/test/CodeGen/PowerPC/merge-string-used-by-metadata.mir
M llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
R llvm/test/CodeGen/PowerPC/mergeable-string-pool-pass-only.mir
M llvm/test/CodeGen/PowerPC/mergeable-string-pool-pr92991.ll
M llvm/test/CodeGen/PowerPC/mergeable-string-pool-tls.ll
M llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll
M llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
M llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
Log Message:
-----------
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
Enable merging all constants without looking at use in GlobalMerge by
default to replace PPCMergeStringPool pass on Linux.
Commit: ba572abeb4fa698d04222877d10d1c547b6c2c01
https://github.com/llvm/llvm-project/commit/ba572abeb4fa698d04222877d10d1c547b6c2c01
Author: Steven Perron <stevenperron at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/HlslBufferLoad.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
M llvm/test/CodeGen/SPIRV/read_image.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll
Log Message:
-----------
[SPIRV] Add reads from image buffer for shaders. (#115178)
This commit adds an intrinsic that will read from an image buffer. We
chose to match the name of the DXIL intrinsic for simplicity in clang.
We cannot reuse the existing openCL readimage function because that is
not a reserved name in HLSL.
I considered trying to refactor generateReadImageInst, so that we could
share code between the two implementations. However, most of the code in
generateReadImageInst is concerned with trying to figure out which type
of image read is being done. Once we factor out the code that will be
common, then we end up with just a single call to the MIRBuilder being
common.
Commit: e458434ebe87f890db0d4a03bbc3de30f3d052b9
https://github.com/llvm/llvm-project/commit/e458434ebe87f890db0d4a03bbc3de30f3d052b9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
A mlir/test/Dialect/Vector/emulate-narrow-type-unsupported.mlir
M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
Log Message:
-----------
[mlir][vector] Restrict narrow-type-emulation patterns (#115612)
All patterns in populateVectorNarrowTypeEmulationPatterns currently
assume a 1-D vector load/store rather than an n-D vector load/store.
This assumption is evident in ConvertVectorTransferRead, for example,
here (extracted from `ConvertVectorTransferRead`):
```cpp
auto newRead = rewriter.create<vector::TransferReadOp>(
loc, VectorType::get(numElements, newElementType), adaptor.getSource(),
getValueOrCreateConstantIndexOp(rewriter, loc, linearizedIndices),
newPadding);
auto bitCast = rewriter.create<vector::BitCastOp>(
loc, VectorType::get(numElements * scale, oldElementType), newRead);
```
Both invocations of `VectorType::get()` here generate a 1-D vector.
Attempts to use these patterns with more generic cases, such as 2-D
vectors, fail. For example, trying to cast the following 2-D case to
`i32`:
```mlir
func.func @vector_maskedload_2d_i8_negative(
%idx1: index,
%idx2: index,
%num_elems: index,
%passthru: vector<2x4xi8>) -> vector<2x4xi8> {
%0 = memref.alloc() : memref<3x4xi8>
%mask = vector.create_mask %num_elems, %num_elems : vector<2x4xi1>
%1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru :
memref<3x4xi8>, vector<2x4xi1>, vector<2x4xi8> into vector<2x4xi8>
return %1 : vector<2x4xi8>
}
```
For example, casting to i32 produces:
```bash
error: 'vector.bitcast' op failed to verify that all of {source, result} have same rank
%1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru :
^
```
Instead of reworking these patterns (that's going to require much more
effort), I’ve marked them as 1-D only and extended
"TestEmulateNarrowTypePass" with an option to disable the Memref type
converter - that's to be able to add negative tests (otherwise, the type
converter throws an error we can't really test for). While not ideal,
this workaround should suit a test pass.
Commit: 7ebfbf9c87941315d7c9ca84d1b22acf2a5bd14d
https://github.com/llvm/llvm-project/commit/7ebfbf9c87941315d7c9ca84d1b22acf2a5bd14d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/test/Dialect/Linalg/generalize-tensor-pack-tile.mlir
M mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
Log Message:
-----------
[mlir][tensor] Update `GeneralizeOuterUnitDimsPackOpPattern` (#115312)
Avoid generating spurious tensor.extract_slice, follow-on for #114315.
This is best to demonstrate with an example. Here's input for
`GeneralizeOuterUnitDimsPackOpPattern`:
```mlir
%pack = tensor.pack %input
padding_value(%pad : f32)
inner_dims_pos = [1, 0]
inner_tiles = [2, %tile_dim_1]
into %output : tensor<5x1xf32> -> tensor<1x1x2x?xf32>
```
Output _before_:
```mlir
%padded = tensor.pad %arg0 low[0, 0] high[%0, 1] {
^bb0(%arg4: index, %arg5: index):
tensor.yield %arg2 : f32
} : tensor<5x1xf32> to tensor<?x2xf32>
// NOTE: skipped in the output _after_
%extracted_slice = tensor.extract_slice
%padded[0, 0] [%arg3, 2] [1, 1] :
tensor<?x2xf32> to tensor<?x2xf32>
%empty = tensor.empty(%arg3) : tensor<2x?xf32>
%transposed = linalg.transpose
ins(%extracted_slice : tensor<?x2xf32>)
outs(%empty : tensor<2x?xf32>)
permutation = [1, 0]
%inserted_slice = tensor.insert_slice %transposed=
into %arg1[0, 0, 0, 0] [1, 1, 2, %arg3] [1, 1, 1, 1] :
tensor<2x?xf32> into tensor<1x1x2x?xf32>
```
Output _after_:
```mlir
%padded = tensor.pad %arg0 low[0, 0] high[%0, 1] {
^bb0(%arg4: index, %arg5: index):
tensor.yield %arg2 : f32
} : tensor<5x1xf32> to tensor<?x2xf32>
%empty = tensor.empty(%arg3) : tensor<2x?xf32>
%transposed = linalg.transpose
ins(%padded : tensor<?x2xf32>)
outs(%empty : tensor<2x?xf32>) permutation = [1, 0]
%inserted_slice = tensor.insert_slice %transposed
into %arg1[0, 0, 0, 0] [1, 1, 2, %arg3] [1, 1, 1, 1] :
tensor<2x?xf32> into tensor<1x1x2x?xf32>
```
This PR also adds a check to verify that only the last N trailing
dimensions are tiled (for some value of N). Based on the PR
discussion, this restriction seems reasonable - especially as there
are no in-tree tests requiring otherwise. For now, it also simplifies
the computation of permutations for linalg.transpose. This
restriction can be relaxed in the future if needed.
Commit: f6795e6b4f619cbecc59a92f7e5fad7ca90ece54
https://github.com/llvm/llvm-project/commit/f6795e6b4f619cbecc59a92f7e5fad7ca90ece54
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
Log Message:
-----------
[CodeExtractor] Refactor extractCodeRegion, fix alloca emission. (#114419)
Reorganize the code into phases:
* Analyze/normalize
* Create extracted function prototype
* Generate the new function's implementation
* Generate call to new function
* Connect call to original function's CFG
The motivation is #114669 to optionally clone the selected code region
into the new function instead of moving it. The current structure made
it difficult to add such functionality since there was no obvious place
to do so, not made easier by some functions doing more than their name
suggests. For instance, constructFunction modifies code outside the
constructed function, but also function properties such as
setPersonalityFn are derived somewhere else. Another example is
emitCallAndSwitchStatement, which despite its name also inserts stores
for output parameters.
Many operations also implicitly depend on the order they are applied
which this patch tries to reduce. For instance, ExtractedFuncRetVals
becomes the list exit blocks which also defines the return value when
leaving via that block. It is computed early such that the new
function's return instructions and the switch can be generated
independently. Also, ExtractedFuncRetVals is combining the lists
ExitBlocks and OldTargets which were not always kept consistent with
each other or NumExitBlocks. The method recomputeExitBlocks() will
update it when necessary.
The coding style partially contradict the current coding standard. For
instance some local variable start with lower case letters. I updated
some, but not all occurrences to make the diff match at least some lines
as unchanged.
The patch [D96854](https://reviews.llvm.org/D96854) introduced some
confusion of function argument indexes this is fixed here as well, hence
the patch is not NFC anymore. Tested in modified CodeExtractorTest.cpp.
Patch [D121061](https://reviews.llvm.org/D121061) introduced
AllocationBlock, but not all allocas were inserted there.
Efectively includes the following fixes:
1. https://github.com/llvm/llvm-project/commit/ce73b1672a6053d5974dc2342881aac02efe2dbb
2. https://github.com/llvm/llvm-project/commit/4aaa92578686176243a294eeb2ca5697a99edcaa
3. Missing allocas, still unfixed
Originally submitted as https://reviews.llvm.org/D115218
Commit: 30753afc2a3171e962e261622781852a01fbec72
https://github.com/llvm/llvm-project/commit/30753afc2a3171e962e261622781852a01fbec72
Author: PikachuHy <pikachuhy at linux.alibaba.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
M mlir/test/Dialect/LLVMIR/sroa-intrinsics.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvm] Add support for memset.inline (#115711)
support `llvm.intr.memset.inline` in llvm-project repo before we add
support for `__builtin_memset_inline` in clangir
cc @bcardosolopes
Commit: 3ab5927b971c2cf758c68d36200ef8ec97916034
https://github.com/llvm/llvm-project/commit/3ab5927b971c2cf758c68d36200ef8ec97916034
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/CommentCommands.td
M clang/test/AST/ast-dump-comment.cpp
Log Message:
-----------
[Clang][Comments] Make @relates an inline comment command (#115040)
According to the Doxygen documentation,
the `relates`, `related`, `relatesalso`, and `relatedalso` commands all
have a single argument. This patch changes their classification from
`VerbatimLineCommand` to `InlineCommand` so the argument is correctly
parsed.
Commit: be89e794f782cb252183446967447239f80c8f9d
https://github.com/llvm/llvm-project/commit/be89e794f782cb252183446967447239f80c8f9d
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/VeneerElimination.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/test/AArch64/veneer-lld-abs.s
Log Message:
-----------
[BOLT][AArch64] Add support for long absolute LLD thunks/veneers (#113408)
Absolute thunks generated by LLD reference function addresses recorded
as data in code. Since they are generated by the linker, they don't have
relocations associated with them and thus the addresses are left
undetected. Use pattern matching to detect such thunks and handle them
in VeneerElimination pass.
Commit: d922045381347a9d5c7301bf870ee0482bfdf0d4
https://github.com/llvm/llvm-project/commit/d922045381347a9d5c7301bf870ee0482bfdf0d4
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M bolt/lib/Core/Exceptions.cpp
Log Message:
-----------
[BOLT] Use AsmInfo for address size. NFCI (#115932)
Use AsmInfo instead of DWARFObj interface for extracting address size
and format.
Commit: 70d6789c7a95c87bbe24b61a3fca8272060b290e
https://github.com/llvm/llvm-project/commit/70d6789c7a95c87bbe24b61a3fca8272060b290e
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
Log Message:
-----------
[bazel] Port for 7302c8dbe71b7c03b73a35a21fa4b415fa1f4505
Commit: 5cd6e21bddb882150068ea1c94e7b35c11f515be
https://github.com/llvm/llvm-project/commit/5cd6e21bddb882150068ea1c94e7b35c11f515be
Author: Miguel A. Arroyo <miguel.arroyo at rockstargames.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/LTO.cpp
M lld/COFF/Options.td
M lld/docs/ReleaseNotes.rst
A lld/test/COFF/savetemps-colon.ll
Log Message:
-----------
[LLD][COFF] allow saving intermediate files with /lldsavetemps (#115131)
* Parity with the `-save-temps=` flag in the `ELF` `lld` driver.
Commit: 014455a58762331b8eb7962c60bd64168c49f3b4
https://github.com/llvm/llvm-project/commit/014455a58762331b8eb7962c60bd64168c49f3b4
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/PowerPC/f128-arith.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
A llvm/test/CodeGen/X86/sincos-stack-args.ll
Log Message:
-----------
[SDAG] Limit sincos/frexp stack slot folding to stores chained to entry (#115906)
When the chain is not the entry node there is a risk the stores are
within a (CALLSEQ_START, CALLSEQ_END), which when the node is expanded
will lead to nested call sequences.
It should be possible to check for this and allow more cases, but for
now, let's limit this to cases where it's definitely safe.
Fixes #115323
Commit: 6aa74038588ed47e3fc0d829c1e7538cc110ba39
https://github.com/llvm/llvm-project/commit/6aa74038588ed47e3fc0d829c1e7538cc110ba39
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/test/src/__support/FPUtil/fpbits_test.cpp
Log Message:
-----------
[libc] Fix fpbits test running 80bit ld everywhere (#115937)
After #115084 the 80 bit long double tests error if sizeof(long double)
isn't 96 or 128 bits. This caused failures in long double is double
systems (since long double is 64 bits) so I've disabled the 80 bit long
double tests on systems that don't use them.
Commit: 4bd6e15a4580d9514819b80af7e5875ae696759c
https://github.com/llvm/llvm-project/commit/4bd6e15a4580d9514819b80af7e5875ae696759c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
Log Message:
-----------
[RISCV][GISel] Sync MaxIterations/ObserverLvl/EnableFullDCE for PreLegalizer combiners with AArch64.
Commit: 5b67372aeca9cac3bad81dd7eac173f163c7c77c
https://github.com/llvm/llvm-project/commit/5b67372aeca9cac3bad81dd7eac173f163c7c77c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/include/__algorithm/find_end.h
Log Message:
-----------
[libc++] Remove a few unused includes from <__algorithm/find_end.h>
Commit: e5ba11727437456fbab7ce733c07843bf682fa0c
https://github.com/llvm/llvm-project/commit/e5ba11727437456fbab7ce733c07843bf682fa0c
Author: John Harrison <harjohn at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Remove `g_dap` references from lldb-dap/LLDBUtils. (#115933)
This refactor removes g_dap references from lldb-dap/LLDBUtils.{h,cpp}
to allow us to create more than one g_dap instance in the future.
Commit: f5396748c7da3d9f278fcd42e2a10a3214920d82
https://github.com/llvm/llvm-project/commit/f5396748c7da3d9f278fcd42e2a10a3214920d82
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
A clang/test/Driver/time.c
A flang/test/Driver/time.f90
Log Message:
-----------
[clang][flang] Support -time in both clang and flang
The -time option prints timing information for the subcommands
(compiler, linker) in a format similar to that used by gcc/gfortran.
This partially addresses requests from #89888
Commit: 5c2a133b1342881dc4f42a896e7e5f4b85d20508
https://github.com/llvm/llvm-project/commit/5c2a133b1342881dc4f42a896e7e5f4b85d20508
Author: Tex Riddell <texr at microsoft.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/X86/math-builtins.c
M clang/test/CodeGen/constrained-math-builtins.c
M clang/test/CodeGen/libcalls.c
M clang/test/CodeGen/math-libcalls.c
M clang/test/CodeGenCXX/builtin-calling-conv.cpp
M clang/test/CodeGenOpenCL/builtins-f16.cl
M llvm/docs/LangRef.rst
M llvm/test/CodeGen/ARM/fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
Emit constrained atan2 intrinsic for clang builtin (#113636)
This change is part of this proposal:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294
- `Builtins.td` - Add f16 support for libm atan2 builtin
- `CGBuiltin.cpp` - Emit constraint atan2 intrinsic for clang builtin
- `clang/test/CodeGenCXX/builtin-calling-conv.cpp` - Use erff instead of
atan2 for clang builtin to lib call calling convention check, now that
atan2 maps to an intrinsic.
- add atan2 cases to llvm.experimental.constrained tests for more
backends: ARM, PowerPC, RISCV, SystemZ.
- LangRef.rst: add llvm.experimental.constrained.atan2, revise
llvm.atan2 description.
Last part of Implement the atan2 HLSL Function. Fixes #70096.
Commit: d2db9bd708f1f1d4368e0b2d3870dd8c307c9895
https://github.com/llvm/llvm-project/commit/d2db9bd708f1f1d4368e0b2d3870dd8c307c9895
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/APINotes/Types.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.apinotes
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.h
M clang/test/APINotes/swift-import-as.cpp
Log Message:
-----------
[clang][APINotes] Add support for the SwiftEscapable attribute (#115866)
This is similar to SwiftCopyable. Also fix missing SwiftCopyable dump
for TagInfo.
Commit: fe83a7282e05b6aba7c87fa293ec84ef926a7991
https://github.com/llvm/llvm-project/commit/fe83a7282e05b6aba7c87fa293ec84ef926a7991
Author: Peng Sun <peng.sun at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[TOSA] Introduce Tosa_ElementwiseUnaryOp with Type and Shape Enforcement (#115784)
* Enforce that Tosa_ElementwiseUnaryOp requires output tensors to match
the input tensor's type and shape.
* Update the following ops to conform to Tosa_ElementwiseUnaryOp: clamp,
erf, sigmoid, tanh, cos, sin, abs, bitwise_not, ceil, clz, exp, floor,
log, logical_not, negate, reciprocal, rsqrt.
* Add invalid tests for each operator to ensure compliance with TOSA
v1.0 Specification.
Signed-off-by: Peng Sun <peng.sun at arm.com>
Commit: 49f90e798fe5667ac5e71a796aa897af3185137d
https://github.com/llvm/llvm-project/commit/49f90e798fe5667ac5e71a796aa897af3185137d
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][affine] Cancel exactly-matching delinearize/linearize pairs (#115758)
If we linearize values (with an assertion tha they are disjoint) and
then delinearize that linear index with th exact same basis, we know
that these operations are exact inverses of each other and can be
replaced with the original inputs to the linearization.
Similarly, if we take a linear index, delinearize it with some bases,
and then re-linearize it with that same basis (noting that the outputs
of the delinearization are guaranteed to by `disjoint`, even if this is
not asserted on the linearize_index operation), the re-linearization is
the inverse of the delinearization, so those two operations can also be
canceled out.
This commit adds canonicalization patterns for these simple
cancelations.
Commit: 36fa8bdfa0130b6233a4ef2b8619702533a9f4df
https://github.com/llvm/llvm-project/commit/36fa8bdfa0130b6233a4ef2b8619702533a9f4df
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/include/__split_buffer
Log Message:
-----------
[libc++][NFC] Remove unused functions from <__split_buffer> (#115735)
Commit: 24a8092be7c1700e9bcdb15c114e9a738f0a2a6b
https://github.com/llvm/llvm-project/commit/24a8092be7c1700e9bcdb15c114e9a738f0a2a6b
Author: lialan <me at alanli.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[MLIR] Avoid `vector.extract_strided_slice` when not needed (#115941)
In `staticallyExtractSubvector`, When the extracting slice is the same
as source vector, do not need to emit `vector.extract_strided_slice`.
This fixes the lit test case `@vector_store_i4` in
`mlir\test\Dialect\Vector\vector-emulate-narrow-type.mlir`, where
converting from `vector<8xi4>` to `vector<4xi8>` does not need slice
extraction.
The issue was introduced in #113411 and #115070, CI failure link:
https://buildkite.com/llvm-project/github-pull-requests/builds/118845
This PR does not include a lit test case because it is a fix and the
above mentioned `@vector_store_i4` test actually tests the mechanism.
Signed-off-by: Alan Li <me at alanli.org>
Commit: 8da61a3434411850a0829f2d47f916f9bf29a4d8
https://github.com/llvm/llvm-project/commit/8da61a3434411850a0829f2d47f916f9bf29a4d8
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/HowToAddABuilder.rst
Log Message:
-----------
[llvm][docs] Expand HowToAddABuilder with guidance on testing locally (#115024)
With <https://github.com/llvm/llvm-zorg/pull/289> and <https://github.com/llvm/llvm-zorg/pull/293> landed, it's now reasonable to ask people to test their builder configurations locally. This patch adds documentation on how to do so.
Commit: a2042521a0387d7d7b80b2987f4b21f5a50bc7bb
https://github.com/llvm/llvm-project/commit/a2042521a0387d7d7b80b2987f4b21f5a50bc7bb
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/include/__algorithm/copy.h
M libcxx/include/__algorithm/copy_move_common.h
M libcxx/include/__algorithm/ranges_copy.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__algorithm/ranges_set_difference.h
M libcxx/include/__algorithm/ranges_set_symmetric_difference.h
M libcxx/include/__algorithm/ranges_set_union.h
M libcxx/include/__algorithm/set_difference.h
M libcxx/include/__algorithm/set_symmetric_difference.h
M libcxx/include/__algorithm/set_union.h
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
Log Message:
-----------
[libc++] Remove _AlgPolicy from std::copy and algorithms using std::copy (#115887)
`std::copy` doesn't use the `_AlgPolicy` for anything other than calling
itself with it, so we can just remove the argument. This also removes
the need in a few other algorithms which had an `_AlgPolicy` argument
only to call `copy`.
Commit: 9d85ba5724f22d73c95858246691e0b389bdb28d
https://github.com/llvm/llvm-project/commit/9d85ba5724f22d73c95858246691e0b389bdb28d
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Preserve the order of switch cases after revert. (#115577)
Preserving the case order is not strictly necessary to preserve
semantics (for example, operations like SwitchInst::removeCase will
happily swap cases around). However, I'm planning to introduce an
optional verification step for SandboxIR that will use StructuralHash to
compare IR after a revert to the original IR to help catch tracker bugs,
and the order difference triggers a difference there.
Commit: 0e97b4d05a0b09513a4c130ec85a36c808d0074b
https://github.com/llvm/llvm-project/commit/0e97b4d05a0b09513a4c130ec85a36c808d0074b
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CMakeLists.txt
A llvm/lib/CodeGen/GlobalISel/CombinerHelperArtifacts.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
M llvm/test/CodeGen/AArch64/bswap.ll
Log Message:
-----------
[GlobalISel] Combine G_MERGE_VALUES of x and undef (#113616)
into anyext x
; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[TRUNC]](s32),
[[DEF]](s32)
Please continue padding merge values.
// %bits_8_15:_(s8) = G_IMPLICIT_DEF
// %0:_(s16) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8)
%bits_8_15 is defined by undef. Its value is undefined and we can pick
an arbitrary value. For optimization, we pick anyext, which plays well
with the undefinedness.
// %0:_(s16) = G_ANYEXT %bits_0_7:(s8)
The upper bits of %0 are undefined and the lower bits come from
%bits_0_7.
Commit: 5a5122cac6eca445062e36ed7c69b6b749497143
https://github.com/llvm/llvm-project/commit/5a5122cac6eca445062e36ed7c69b6b749497143
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/GlobalISel/BUILD.gn
Log Message:
-----------
[gn build] Port 0e97b4d05a0b
Commit: 13317502da8ee3885854f67700140586c0edafee
https://github.com/llvm/llvm-project/commit/13317502da8ee3885854f67700140586c0edafee
Author: Shlomi Regev <shlmregev at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Analysis/DataFlow/DeadCodeAnalysis.cpp
M mlir/test/Analysis/DataFlow/test-dead-code-analysis.mlir
Log Message:
-----------
[mlir] Add a null pointer check in symbol lookup (#115165)
Dead code analysis crashed because a symbol that is called/used didn't appear in the symbol
table.
This patch fixes this by adding a nullptr check after symbol table lookup.
Commit: 7b5e285d16090c2ddf4ee539c410d24bde52cbea
https://github.com/llvm/llvm-project/commit/7b5e285d16090c2ddf4ee539c410d24bde52cbea
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[NFC][Clang] Use range for loops in ClangDiagnosticsEmitter (#115573)
Use range based for loops in Clang diagnostics emitter.
Commit: 84e95beae980466ffcc555297e0e34d23fca8a76
https://github.com/llvm/llvm-project/commit/84e95beae980466ffcc555297e0e34d23fca8a76
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mask.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vmv.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvbb.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvbc.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvkg.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvkned.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvknhb.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvksh.s
Log Message:
-----------
[RISCV] Update SiFive P600's scheduling model on RVV instructions (#115243)
The biggest change is assigning vector crypto instructions to the
correct processor resource.
The majority of these changes are guided by our RVV-capable
llvm-exegesis.
Commit: d6219e65996a485adb3883c8cf3335ece68c66cf
https://github.com/llvm/llvm-project/commit/d6219e65996a485adb3883c8cf3335ece68c66cf
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/test/src/sys/statvfs/linux/fstatvfs_test.cpp
M libc/test/src/sys/statvfs/linux/statvfs_test.cpp
Log Message:
-----------
[libc] Make fstatvfs test less flakey (#115949)
Commit: b0a4e958e85784cff46303c92b6a3a14b20fa1d8
https://github.com/llvm/llvm-project/commit/b0a4e958e85784cff46303c92b6a3a14b20fa1d8
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.h
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-invalid.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
Log Message:
-----------
[mlir][bufferization] Add support for non-unique `func.return` (#114017)
Multiple `func.return` ops inside of a `func.func` op are now supported
during bufferization. This PR extends the code base in 3 places:
- When inferring function return types, `memref.cast` ops are folded
away only if all `func.return` ops have matching buffer types. (E.g., we
don't fold if two `return` ops have operands with different layout
maps.)
- The alias sets of all `func.return` ops are merged. That's because
aliasing is a "may be" property.
- The equivalence sets of all `func.return` ops are taken only if they
match. If different `func.return` ops have different equivalence sets
for their operands, the equivalence information is dropped. That's
because equivalence is a "must be" property.
This commit is in preparation of removing the deprecated
`func-bufferize` pass. That pass can bufferize functions with multiple
`return` ops.
Commit: 7ba864b592b7ba1c70e958b9387b462931053a12
https://github.com/llvm/llvm-project/commit/7ba864b592b7ba1c70e958b9387b462931053a12
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SeedCollectorTest.cpp
Log Message:
-----------
[SandboxVectorizer] Register erase callback for seed collection (#115951)
Commit: 01d233ff403823389f8480897e41aea84ecbb3d3
https://github.com/llvm/llvm-project/commit/01d233ff403823389f8480897e41aea84ecbb3d3
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
R clang/test/Driver/time.c
R flang/test/Driver/time.f90
Log Message:
-----------
Revert "[clang][flang] Support -time in both clang and flang"
Reverts llvm/llvm-project#109165
This created a buildbot failure on
[Fuchsia](https://lab.llvm.org/buildbot/#/builders/11/builds/8080).
Commit: 37143fe27e082b478d333ca28f6f1af5210b7c6b
https://github.com/llvm/llvm-project/commit/37143fe27e082b478d333ca28f6f1af5210b7c6b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/test/Parser/cuf-sanity-common
Log Message:
-----------
[flang][cuda] Make launch configuration optional for cuf kernel (#115947)
Commit: e887f8290df419ffd4e018b6f8afbaeb1912cf0e
https://github.com/llvm/llvm-project/commit/e887f8290df419ffd4e018b6f8afbaeb1912cf0e
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][LLVM] Add !invariant.group metadata to llvm.load and llvm.store (#115723)
This patch adds support for the `!invariant.group` metadata to the
`llvm.load` and the `llvm.store` operation.
Commit: 5fa47d8c52fa7449cc9f68cf314681f755df34bc
https://github.com/llvm/llvm-project/commit/5fa47d8c52fa7449cc9f68cf314681f755df34bc
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/CMakeLists.txt
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[libc] Support multilib with runtimes build (#115357)
This adds minimal support for multilibs akin to libc++.
Commit: 274feef7dd25585030af81c285d8ab1bbc8c4f28
https://github.com/llvm/llvm-project/commit/274feef7dd25585030af81c285d8ab1bbc8c4f28
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/load-store.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll
Log Message:
-----------
Reland "[NVPTX] Emit prmt selection value in hex" (#115952)
Initially landed in 3ed4b0b0efca7a9467ce83fc62de9413da38006d.
Reverted in 375d1925dbd0c051fe2d4a86fe98ed08f4a502c5 because the
[`load-store.ll`](https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/NVPTX/load-store.ll)
test was not updated after 5e75880165553e9afb721239689a9c79ec84a108.
5e75880165553e9afb721239689a9c79ec84a108 is now updated in
7a99f2322c324972f2c5091dddd7752fa21d5a78.
Commit: 5a5502b9e1ca04626f7fd03c581b6deb5cd39c13
https://github.com/llvm/llvm-project/commit/5a5502b9e1ca04626f7fd03c581b6deb5cd39c13
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Use Value instead of template. (#115440)
Commit: de0fd64bedd23660f557833cc0108c3fb2be3918
https://github.com/llvm/llvm-project/commit/de0fd64bedd23660f557833cc0108c3fb2be3918
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9-4-generic-err.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/generic-targets-require-v6.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/no-corresponding-integer-type.ll
A llvm/test/MC/AMDGPU/gfx9_4_generic_unsupported.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[AMDGPU] Introduce a new generic target `gfx9-4-generic` (#115190)
This patch introduces a new generic target, `gfx9-4-generic`. Since it doesn’t support FP8 and XF32-related instructions, the patch includes several code reorganizations to accommodate these changes.
Commit: 4714215efb0486682feaa3a99162e80a934be8f9
https://github.com/llvm/llvm-project/commit/4714215efb0486682feaa3a99162e80a934be8f9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/Language.h
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.h
M lldb/source/Plugins/Language/ObjCPlusPlus/ObjCPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/ObjCPlusPlus/ObjCPlusPlusLanguage.h
M lldb/source/Target/Language.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/functionalities/data-formatter/setvaluefromcstring/main.m
M lldb/test/API/python_api/value/change_values/TestChangeValueAPI.py
M lldb/test/API/python_api/value/change_values/main.c
Log Message:
-----------
[lldb] Support true/false in ValueObject::SetValueFromCString (#115780)
Support "true" and "false" (and "YES" and "NO" in Objective-C) in
ValueObject::SetValueFromCString.
Fixes #112597
Commit: 2583071fb4773348e9ef89ddff1f00f1db8abb84
https://github.com/llvm/llvm-project/commit/2583071fb4773348e9ef89ddff1f00f1db8abb84
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Compute size of derived type arrays (#115914)
Commit: 2baead09b2eea3b7b76afa193e35b93a236d948d
https://github.com/llvm/llvm-project/commit/2baead09b2eea3b7b76afa193e35b93a236d948d
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/docs/HowToAddABuilder.rst
Log Message:
-----------
[docs] Add blank line before bulletpoint list to fix HowToAddABuilder
The bulletpoint list wasn't rendering properly due to a missing blank
line.
Commit: 5911fbb39d615b39f1bf6fd732503ab433de5f27
https://github.com/llvm/llvm-project/commit/5911fbb39d615b39f1bf6fd732503ab433de5f27
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
Log Message:
-----------
AMDGPU: Do not fold copy to physreg from operation on frame index (#115977)
Commit: 95554cbd7717e7d1925f475540a70603bcb3a224
https://github.com/llvm/llvm-project/commit/95554cbd7717e7d1925f475540a70603bcb3a224
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Teach extractCallsFromIR to recognize heap allocation functions (#115938)
This patch teaches extractCallsFromIR to recognize heap allocation
functions. Specifically, when we encounter a callee that is known to
be a heap allocation function like "new", we set the callee GUID to 0.
Note that I am planning to do the same for the caller-callee pairs
extracted from the profile. That is, when I encounter a frame that
does not have a callee, we assume that the frame is calling some heap
allocation function with GUID 0.
Technically, I'm not recognizing enough functions in this patch.
TCMalloc is known to drop certain frames in the call stack immediately
above new. This patch is meant to lay the groundwork, setting up
GetTLI, plumbing it to extractCallsFromIR, and adjusting the unit
tests. I'll address remaining issues in subsequent patches.
Commit: 9991ea28fcd308d5bd357358710e5344e26b46e1
https://github.com/llvm/llvm-project/commit/9991ea28fcd308d5bd357358710e5344e26b46e1
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Analysis/CostModel/AArch64/extract_float.ll
Log Message:
-----------
[CostModel][AArch64] Make extractelement, with fmul user, free whenev… (#111479)
…er possible
In case of Neon, if there exists extractelement from lane != 0 such that
1. extractelement does not necessitate a move from vector_reg -> GPR
2. extractelement result feeds into fmul
3. Other operand of fmul is a scalar or extractelement from lane 0 or
lane equivalent to 0
then the extractelement can be merged with fmul in the backend and it
incurs no cost.
e.g.
```
define double @foo(<2 x double> %a) {
%1 = extractelement <2 x double> %a, i32 0
%2 = extractelement <2 x double> %a, i32 1
%res = fmul double %1, %2
ret double %res
}
```
`%2` and `%res` can be merged in the backend to generate:
`fmul d0, d0, v0.d[1]`
The change was tested with SPEC FP(C/C++) on Neoverse-v2.
**Compile time impact**: None
**Performance impact**: Observing 1.3-1.7% uplift on lbm benchmark with -flto depending upon the config.
Commit: 804d3c4ce192391ef7ba8724c6b9eff456b5c4b2
https://github.com/llvm/llvm-project/commit/804d3c4ce192391ef7ba8724c6b9eff456b5c4b2
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Block.h
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/IR/Block.cpp
Log Message:
-----------
[mlir][IR] Add `Block::isReachable` helper function (#114928)
Add a new helper function `isReachable` to `Block`. This function
traverses all successors of a block to determine if another block is
reachable from the current block.
This functionality has been reimplemented in multiple places in MLIR.
Possibly additional copies in downstream projects. Therefore, moving it
to a common place.
Commit: 1824e45cd799a19fb9b5f9a84f9a0197157af8c8
https://github.com/llvm/llvm-project/commit/1824e45cd799a19fb9b5f9a84f9a0197157af8c8
Author: Kasper Nielsen <kasper0406 at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/test/python/ir/array_attributes.py
Log Message:
-----------
[MLIR,Python] Support converting boolean numpy arrays to and from mlir attributes (unrevert) (#115481)
This PR re-introduces the functionality of
https://github.com/llvm/llvm-project/pull/113064, which was reverted in
https://github.com/llvm/llvm-project/commit/0a68171b3c67503f7143856580f1b22a93ef566e
due to memory lifetime issues.
Notice that I was not able to re-produce the ASan results myself, so I
have not been able to verify that this PR really fixes the issue.
---
Currently it is unsupported to:
1. Convert a MlirAttribute with type i1 to a numpy array
2. Convert a boolean numpy array to a MlirAttribute
Currently the entire Python application violently crashes with a quite
poor error message https://github.com/pybind/pybind11/issues/3336
The complication handling these conversions, is that MlirAttribute
represent booleans as a bit-packed i1 type, whereas numpy represents
booleans as a byte array with 8 bit used per boolean.
This PR proposes the following approach:
1. When converting a i1 typed MlirAttribute to a numpy array, we can not
directly use the underlying raw data backing the MlirAttribute as a
buffer to Python, as done for other types. Instead, a copy of the data
is generated using numpy's unpackbits function, and the result is send
back to Python.
2. When constructing a MlirAttribute from a numpy array, first the
python data is read as a uint8_t to get it converted to the endianess
used internally in mlir. Then the booleans are bitpacked using numpy's
bitpack function, and the bitpacked array is saved as the MlirAttribute
representation.
Commit: 1294ddabbc3112559e5e652db226b2b6c099abb5
https://github.com/llvm/llvm-project/commit/1294ddabbc3112559e5e652db226b2b6c099abb5
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[RISCV] Add cost model tests for vp.{s,u}{min,max}. NFC
Commit: edfa75de33433de29f438fbea4145ec6ae20e020
https://github.com/llvm/llvm-project/commit/edfa75de33433de29f438fbea4145ec6ae20e020
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
Log Message:
-----------
[clang] [NFC] Split checkAttributesAfterMerging() to multiple functions (#115464)
Commit: 9a365bc9a0dc92f25c0f1fdc25925b442dfe1455
https://github.com/llvm/llvm-project/commit/9a365bc9a0dc92f25c0f1fdc25925b442dfe1455
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/SourceManager.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[Clang] [NFC] Add "human" diagnostic argument format (#115835)
This allows formatting large integers in a human friendly way. Example:
"5321584" -> "5.32M".
Use it where such human numbers are generated manually today.
Commit: a6f8af676a36bd43dd0c7f6229e6c91161a56819
https://github.com/llvm/llvm-project/commit/a6f8af676a36bd43dd0c7f6229e6c91161a56819
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/vmsge.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgeu.ll
Log Message:
-----------
[RISCV] Improve vmsge and vmsgeu selection (#115435)
Select vmsge(u) vs, C to vmsgt(u) vs, C-1 if C is not in the imm range
and not the minimum value.
Fix https://github.com/llvm/llvm-project/issues/114505.
Commit: 735ab61ac828bd61398e6847d60e308fdf2b54ec
https://github.com/llvm/llvm-project/commit/735ab61ac828bd61398e6847d60e308fdf2b54ec
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CFIFixup.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/ExpandLargeDivRem.cpp
M llvm/lib/CodeGen/ExpandLargeFpConvert.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GCEmptyBasicBlocks.cpp
M llvm/lib/CodeGen/GCMetadata.cpp
M llvm/lib/CodeGen/HardwareLoops.cpp
M llvm/lib/CodeGen/IfConversion.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/InterferenceCache.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
M llvm/lib/CodeGen/KCFI.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveIntervalCalc.cpp
M llvm/lib/CodeGen/LiveRangeCalc.cpp
M llvm/lib/CodeGen/LiveStacks.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineConvergenceVerifier.cpp
M llvm/lib/CodeGen/MachineDomTreeUpdater.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineFunctionSplitter.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineStableHash.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/OptimizePHIs.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/RegAllocScore.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/CodeGen/RegisterScavenging.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
M llvm/lib/CodeGen/StackMaps.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/CodeGen/TargetSchedule.cpp
Log Message:
-----------
[CodeGen] Remove unused includes (NFC) (#115996)
Identified with misc-include-cleaner.
Commit: 9571cc2b28d74c20f1abb3280adaa42d6e5b88dc
https://github.com/llvm/llvm-project/commit/9571cc2b28d74c20f1abb3280adaa42d6e5b88dc
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMCallingConv.cpp
M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
M llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
Log Message:
-----------
[ARM] Remove unused includes (NFC) (#115995)
Identified with misc-include-cleaner.
Commit: fcacda899fcd812251a44a5b01548d7bb74d0481
https://github.com/llvm/llvm-project/commit/fcacda899fcd812251a44a5b01548d7bb74d0481
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
Log Message:
-----------
[RISCV] Remove constant_fold_cast_op from RISCVPostLegalizerCombiner.
This is no longer tested after other recent changes. AArch64 does
have this in their PostLegalizerCombiner.
Commit: 202ad47fe1bd652ee5cc7612e696a2479398c44f
https://github.com/llvm/llvm-project/commit/202ad47fe1bd652ee5cc7612e696a2479398c44f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Source.cpp
M clang/lib/AST/ByteCode/Source.h
M clang/test/SemaCXX/lambda-expressions.cpp
Log Message:
-----------
[clang][bytecode] SourceInfo::Source might be null (#115905)
This broke in 23fbaff9a3fd2b26418e0c2f10b701049399251f, but the old
.dyn_cast<> handled null.
Commit: 9aa4f50ae489507a780fb43367da9652ebfd6ffc
https://github.com/llvm/llvm-project/commit/9aa4f50ae489507a780fb43367da9652ebfd6ffc
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
Log Message:
-----------
[RISCV][TTI] Add vp.fneg intrinsic cost with functionalOP (#114378)
Commit: a4f3a10c0effa165071ad43cf8690e1762897533
https://github.com/llvm/llvm-project/commit/a4f3a10c0effa165071ad43cf8690e1762897533
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/headers.txt
Log Message:
-----------
[libc] Include features.h in baremetal targets (#109444)
This is used by other libraries like libc++.
Commit: ae7b5af904850db71308915836f32a8d79553dd8
https://github.com/llvm/llvm-project/commit/ae7b5af904850db71308915836f32a8d79553dd8
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/posix/ConnectionFileDescriptorPosix.h
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
Log Message:
-----------
[lldb] Remove ConnectionFileDescriptor::child_process_inherit (#115861)
It's never set to true. Inheritable FDs are also dangerous as they can
end up processes which know nothing about them. It's better to
explicitly pass a specific FD to a specific subprocess, which we already
mostly can do using the ProcessLaunchInfo FileActions.
Commit: 91e134ad7d162c9affe37c67afb9dec34a215b7a
https://github.com/llvm/llvm-project/commit/91e134ad7d162c9affe37c67afb9dec34a215b7a
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/unittests/Analysis/PhiValuesTest.cpp
Log Message:
-----------
[llvm] Replace `UndefValue::get` with `PoisonValue::get` in a unit test [NFC] (#115985)
Since these `UndefValue::get` are acted as placeholders, I think it's
safe to replace them with poison values.
There are a lot of `UndefValue::get` in LLVM, I'll start fixing the ones
in `unittests` while fixing the regression tests.
Commit: d56f5171af96501d26723c4daed4d4a3b7c1f94b
https://github.com/llvm/llvm-project/commit/d56f5171af96501d26723c4daed4d4a3b7c1f94b
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][LLVM] Add support for invariant group related intrinsics (#115877)
This PR adds support for the following LLVM intrinsics:
- `llvm.launder.invariant.group`
- `llvm.strip.invariant.group`
Commit: 20b442a25d86c35556cfc1bba4356f8ee75987bd
https://github.com/llvm/llvm-project/commit/20b442a25d86c35556cfc1bba4356f8ee75987bd
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/test/Fir/target-rewrite-complex16.fir
Log Message:
-----------
[Flang][LoongArch] Add support for complex16 params/returns. (#114732)
In LoongArch64, the passing and returning of type `complex16` is similar
to that of structure type like `struct {fp128, fp128}`, meaning they are
passed and returned by reference. This behavior is similar to clang, so
it can implement conveniently `iso_c_binding`.
Additionally, this patch fixes the failure in flang test
Integration/debug-complex-1.f90:
```
llvm-project/flang/lib/Optimizer/codeGen/Target.cpp:56:
not yet implemented: complex for this precision for return type
Commit: 5a12881514f9f70b24ad402f440f598bcad53cfb
https://github.com/llvm/llvm-project/commit/5a12881514f9f70b24ad402f440f598bcad53cfb
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[RISCV][Test] Add test for vp float arithmetic ops. NFC (#114516)
Commit: 7a1fdbb9c0f3becdbe539f0518d182f56a9f99f8
https://github.com/llvm/llvm-project/commit/7a1fdbb9c0f3becdbe539f0518d182f56a9f99f8
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/include/clang/AST/ASTImporter.h
M clang/include/clang/AST/ASTStructuralEquivalence.h
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/unittests/AST/StructuralEquivalenceTest.cpp
Log Message:
-----------
[clang][AST] Add 'IgnoreTemplateParmDepth' to structural equivalence cache (#115518)
Structural equivalence check uses a cache to store already found
non-equivalent values. This cache can be reused for calls (ASTImporter
does this). Value of "IgnoreTemplateParmDepth" can have an effect on the
structural equivalence therefore it is wrong to reuse the same cache for
checks with different values of 'IgnoreTemplateParmDepth'. The current
change adds the 'IgnoreTemplateParmDepth' to the cache key to fix the
problem.
Commit: c63e83f49575c024cf89fce9bc95d64988f3177b
https://github.com/llvm/llvm-project/commit/c63e83f49575c024cf89fce9bc95d64988f3177b
Author: Rakshit Patel <rakshit.patel at sony.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/main.py
A llvm/utils/lit/tests/xunit-output-report-failures-only.py
Log Message:
-----------
[lit] Add --report-failures-only option for lit test reports (#115439)
- Add option (--report-failures-only) to generate a reduced report for
lit tests that only includes failing tests
- This is a continuation of proposed patches by @gregbedwell here:
- https://reviews.llvm.org/D143516
- https://reviews.llvm.org/D143519
---------
Co-authored-by: Greg Bedwell <greg.bedwell at sony.com>
Co-authored-by: James Henderson <James.Henderson at sony.com>
Commit: 6ff41e860fdb69bb9e234e003255aae9accff79a
https://github.com/llvm/llvm-project/commit/6ff41e860fdb69bb9e234e003255aae9accff79a
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
[Flang][LoongArch] Emit target features for Loongarch64. (#114735)
Commit: 12dcaa2e1e6c46d8a1b440d8a836d6b81ab92efb
https://github.com/llvm/llvm-project/commit/12dcaa2e1e6c46d8a1b440d8a836d6b81ab92efb
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
[clang] Add steakhal to the Clang Static Analyzer maintainers (#114991)
I've been contributing to the Clang Static Analyzer for a while now. I
think from 2019, or something like that.
I've ensured the quality of the Static Analyzer releases for the last
~4-6 releases now, with testing, fixing and backporting patches; also
writing comprehensive release notes for each release.
I have a strong sense of ownership of the code I contribute.
I follow the issue tracker, and also try to follow and participate in
RFCs on Discourse if I'm not overloaded.
I also check Discord time-to-time, but I rarely see anything there.
You can find the maintainer section of the LLVM DeveloperPolicy
[here](https://llvm.org/docs/DeveloperPolicy.html#maintainers) to read
more about the responsibilities.
Commit: 39b2979a434e70a4ce76d4adf91572dcfc9662ff
https://github.com/llvm/llvm-project/commit/39b2979a434e70a4ce76d4adf91572dcfc9662ff
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Breakpoint/BreakpointResolverFileLine.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Symbol/Function.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/test/API/source-manager/TestSourceManager.py
R lldb/test/API/source-manager/artificial_location.c
A lldb/test/API/source-manager/artificial_location.cpp
A lldb/test/API/source-manager/artificial_location.h
Log Message:
-----------
[lldb] Fix source display for artificial locations (#115876)
When retrieving the location of the function declaration, we were
dropping the file component on the floor, which resulted in an amusingly
confusing situation were we displayed the file containing the
implementation of the function, but used the line number of the
declaration. This patch fixes that.
It required a small refactor Function::GetStartLineSourceLineInfo to
return a SupportFile (instead of just the file spec), which in turn
necessitated changes in a couple of other places as well.
Commit: 2c980310f67c13dd89c8702d40abeab47a4a2b4b
https://github.com/llvm/llvm-project/commit/2c980310f67c13dd89c8702d40abeab47a4a2b4b
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
Revert "[libclc] Create aliases with custom_command (#115885)"
for causing: https://github.com/llvm/llvm-project/issues/115942
This reverts commit 584d1a632f3af0daca4db02f7f3b2c7f48ab0ddf.
Commit: 133f8fa233abf40508ea9e42c4c31f5f0c13485f
https://github.com/llvm/llvm-project/commit/133f8fa233abf40508ea9e42c4c31f5f0c13485f
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
A clang/test/Driver/Inputs/cpunative/cortex-a57
A clang/test/Driver/Inputs/cpunative/cortex-a72
A clang/test/Driver/Inputs/cpunative/cortex-a76
A clang/test/Driver/Inputs/cpunative/neoverse-n1
A clang/test/Driver/Inputs/cpunative/neoverse-v2
A clang/test/Driver/aarch64-mcpu-native.c
M clang/test/lit.cfg.py
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
Reland [clang][AArch64] Add getHostCPUFeatures to query for enabled f… (#115467)
…eatures in cpu info
Relands #97749. Fixed test by adding additional checks for system linux
and target == host.
Commit: d7263d6d6d120a833fb45a17924117aad7412a99
https://github.com/llvm/llvm-project/commit/d7263d6d6d120a833fb45a17924117aad7412a99
Author: David Green <david.green at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/machine-combiner-subadd2.mir
Log Message:
-----------
[AArch64] Use second reg class in genSubAdd2SubSub machine combine.
In case the first operand is a physical register with no register class, use
the second operand of the sub as the register class for the new virtual
register in genSubAdd2SubSub machine combine.
Commit: 42da81582ea5a0e5bb0e18af74e6c101f0307f36
https://github.com/llvm/llvm-project/commit/42da81582ea5a0e5bb0e18af74e6c101f0307f36
Author: David Green <david.green at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-ext.ll
M llvm/test/CodeGen/AArch64/arm64-extract_subvector.ll
M llvm/test/CodeGen/AArch64/neon-perm.ll
M llvm/test/CodeGen/AArch64/neon-reverseshuffle.ll
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
Log Message:
-----------
[AArch64][GlobalISel] Add a number of ptr shufflevector tests. NFC
Commit: 5845688e91d85d46c0f47daaf4edfdfc772853cf
https://github.com/llvm/llvm-project/commit/5845688e91d85d46c0f47daaf4edfdfc772853cf
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
A clang/docs/WarningSuppressionMappings.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/Warnings.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Interpreter/CodeCompletion.cpp
M clang/lib/Serialization/ASTReader.cpp
A clang/test/Misc/Inputs/suppression-mapping.txt
A clang/test/Misc/warning-suppression-mappings-pragmas.cpp
A clang/test/Misc/warning-suppression-mappings.cpp
M clang/tools/driver/cc1gen_reproducer_main.cpp
M clang/tools/driver/driver.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M llvm/include/llvm/Support/SpecialCaseList.h
Log Message:
-----------
Reapply "[clang] Introduce diagnostics suppression mappings (#112517)"
This reverts commit 5f140ba54794fe6ca379362b133eb27780e363d7.
Commit: 2a1586dfb5a304830301cfcce8bd7d520b9d5a49
https://github.com/llvm/llvm-project/commit/2a1586dfb5a304830301cfcce8bd7d520b9d5a49
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/fmv/windows.inc
M compiler-rt/lib/builtins/cpu_model/cpu_model.h
Log Message:
-----------
[compiler-rt] Add cpu model init for Windows. (#111961)
Commit: 3e20bae827c0a314142fea74aa3d7ead039fab3d
https://github.com/llvm/llvm-project/commit/3e20bae827c0a314142fea74aa3d7ead039fab3d
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/AST/attr-lifetime-capture-by.cpp
A clang/test/SemaCXX/attr-lifetime-capture-by.cpp
Log Message:
-----------
Reapply "[clang] Introduce [[clang::lifetime_capture_by(X)]] (#115823)
Fix compile time regression and memory leak
In the previous change, we saw:
- Memory leak: https://lab.llvm.org/buildbot/#/builders/169/builds/5193
- 0.5% Compile time regression
[link](https://llvm-compile-time-tracker.com/compare.php?from=4a68e4cbd2423dcacada8162ab7c4bb8d7f7e2cf&to=8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f&stat=instructions:u)
For compile time regression, we make the Param->Idx `StringMap` for
**all** functions. This `StringMap` is expensive and should not be
computed when none of the params are annotated with
`[[clang::lifetime_capture_by(X)]]`.
For the memory leak, the small vectors used in Attribute are not
destroyed because the attributes are allocated through ASTContext's
allocator. We therefore need a raw array in this case.
Commit: c7df10643bda4acdc9a02406a2eee8aa4ced747f
https://github.com/llvm/llvm-project/commit/c7df10643bda4acdc9a02406a2eee8aa4ced747f
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libcxx/include/__split_buffer
M libcxx/include/__vector/vector.h
M libcxx/include/deque
M lldb/examples/synthetic/libcxx.py
Log Message:
-----------
Unify naming of internal pointer members in std::vector and std::__split_buffer (#115517)
Related to PR #114423, this PR proposes to unify the naming of the
internal pointer members in `std::vector` and `std::__split_buffer` for
consistency and clarity.
Both `std::vector` and `std::__split_buffer` originally used a
`__compressed_pair<pointer, allocator_type>` member named `__end_cap_`
to store an internal capacity pointer and an allocator. However,
inconsistent naming changes have been made in both classes:
- `std::vector` now uses `__cap_` and `__alloc_` for its internal
pointer and allocator members.
- In contrast, `std::__split_buffer` retains the name `__end_cap_` for
the capacity pointer, along with `__alloc_`.
This inconsistency between the names `__cap_` and `__end_cap_` has
caused confusions (especially to myself when I was working on both
classes). I suggest unifying these names by renaming `__end_cap_` to
`__cap_` in `std::__split_buffer`.
Commit: 889b3c9487d114b9d082e9552599c8a8a8ccc660
https://github.com/llvm/llvm-project/commit/889b3c9487d114b9d082e9552599c8a8a8ccc660
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
A .ci/generate_test_report.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
A .ci/requirements.txt
Log Message:
-----------
Reland "[ci] New script to generate test reports as Buildkite Annotations (#113447)"
This reverts commit 8a1ca6cad9cd0e972c322910cdfbbe9552c6c7ca.
I have fixed 2 things:
* The report is now sent by stdin so we do not hit the limit on the size
of command line arguments.
* The report is limited to 1MB in size and if we exceed that we fall back
to listing only the totals with a note telling you to check the full log.
Commit: b69ddbc62838f23ace237c206676b1ed1c882638
https://github.com/llvm/llvm-project/commit/b69ddbc62838f23ace237c206676b1ed1c882638
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libcxx/include/__random/discard_block_engine.h
M libcxx/include/__random/linear_congruential_engine.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/__random/shuffle_order_engine.h
M libcxx/include/__random/subtract_with_carry_engine.h
M libcxx/include/__type_traits/integral_constant.h
M libcxx/include/any
M libcxx/include/limits
M libcxx/include/ratio
M libcxx/src/chrono.cpp
M libcxx/src/filesystem/filesystem_clock.cpp
M libcxx/src/filesystem/path.cpp
M libcxxabi/src/cxa_demangle.cpp
M runtimes/cmake/Modules/WarningFlags.cmake
Log Message:
-----------
[libc++] Make variables in templates inline (#115785)
The variables are all `constexpr`, which implies `inline`. Since they
aren't `constexpr` in C++03 they're also not `inline` there. Because of
that we define them out-of-line currently. Instead we can use the C++17
extension of `inline` variables, which results in the same weak
definitions of the variables but without having all the boilerplate.
Commit: 67b81e2120697b90f7c6595b73eb5fc94f437320
https://github.com/llvm/llvm-project/commit/67b81e2120697b90f7c6595b73eb5fc94f437320
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale
A libcxx/include/__memory/shared_count.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/future
M libcxx/include/module.modulemap
M libcxx/include/mutex
Log Message:
-----------
[libc++] Split __shared_count out of <__memory/shared_ptr.h> (#115943)
`__shared_count` is used in a few places where `shared_ptr` isn't. This
avoids a bunch of transitive includes needed for the implementation of
`shared_ptr` in these places.
Commit: d942f5e13dd03e902ae77602c5a1781d04ac18a3
https://github.com/llvm/llvm-project/commit/d942f5e13dd03e902ae77602c5a1781d04ac18a3
Author: hanbeom <kese111 at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
M llvm/test/Transforms/VectorCombine/X86/extract-cmp.ll
M llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/load.ll
Log Message:
-----------
[VectorCombine] Combine extract/insert from vector into a shuffle (#115213)
insert (DstVec, (extract SrcVec, ExtIdx), InsIdx) --> shuffle (DstVec, SrcVec, Mask)
This commit combines extract/insert on a vector into Shuffle with vector.
Commit: 4c9cb974898c6a6fe3a4d3b1e2eb61c29dd1af28
https://github.com/llvm/llvm-project/commit/4c9cb974898c6a6fe3a4d3b1e2eb61c29dd1af28
Author: Andrey Timonin <timonina1909 at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
Log Message:
-----------
[NFC][mlir][emitc] fix misspelling in description of emitc.global (#115548)
Missing `!` before `emitc.global` was added in the `EmitC.td`.
Commit: e5d5ee4ea76faabab890c45538a464abb70b8793
https://github.com/llvm/llvm-project/commit/e5d5ee4ea76faabab890c45538a464abb70b8793
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 67b81e212069
Commit: 76befc86dea9cad6be870c04732379f7ecf596dd
https://github.com/llvm/llvm-project/commit/76befc86dea9cad6be870c04732379f7ecf596dd
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
Reland "[libclc] Create aliases with custom_command (#115885)" (#116025)
This relands commit 2c980310f67c13dd89c8702d40abeab47a4a2b4b after
fixing an issue.
Commit: 856c47b884ada7dadb1081244821e0acc199cc72
https://github.com/llvm/llvm-project/commit/856c47b884ada7dadb1081244821e0acc199cc72
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
ConstraintElim: assert on invalid union field (NFC) (#115898)
getContextInst currently returns an invalid union field, when it is
called with a ConditionFact, although existing callers don't do this. In
order to error out early and serve as documentation for future callers,
add an assert forbidding the behavior.
Commit: aba55809e9af5e0d981f10c7f9b44a1f57b423c2
https://github.com/llvm/llvm-project/commit/aba55809e9af5e0d981f10c7f9b44a1f57b423c2
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_mve.td
M clang/test/CodeGen/arm-mve-intrinsics/ternary.c
M llvm/include/llvm/IR/IntrinsicsARM.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll
M llvm/test/CodeGen/Thumb2/mve-qrintr.ll
Log Message:
-----------
[ARM] Fix operand order for MVE predicated VFMAS (#115908)
For most MVE predicated FMA instructions, disabled lanes will contain
the value in the addend operand. However, The VFMAS instruction takes
the addend in a GPR, and the output register is shared with the first
multiply operand, so disabled lanes will get that value instead. This
means that we can't use the same intrinsic as for the other VFMA
instructions. Instead, we can codegen the vfmas intrinsic to a regular
FMA and select in clang, which the backend already has the patterns to
select VFMAS from.
Commit: 1878b94568e77e51f0bc316ba5a8a6b8994b8daf
https://github.com/llvm/llvm-project/commit/1878b94568e77e51f0bc316ba5a8a6b8994b8daf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/X86/pr50392.ll
M llvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
Log Message:
-----------
[VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (#114780)
This shuffle mask is so focused, the cost model is very likely to be able to determine a specific (lower) cost
Commit: 8ae2a18736c15e0d0d9d0893b21bce4f3bf581c9
https://github.com/llvm/llvm-project/commit/8ae2a18736c15e0d0d9d0893b21bce4f3bf581c9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86.td
M llvm/test/CodeGen/X86/lwp-intrinsics.ll
M llvm/test/CodeGen/X86/rotate_vec.ll
Log Message:
-----------
[X86] Use proxy scheduler models for bdver3/bdver4 cpus (#114873)
We don't have specific models for bdver3/bdver4 cpus but we can use the
bdver2/znver1 models as proxy standins - these days the models are more
useful for analysis than for perfect instruction scheduling so these
should be fine.
While they don't accurately represent the bdver3/bdver4 architecture
(specifically the different fp-pipe layout), they give more accurate
latency/throughputs (vs Agner) than the default SandyBridge model, and
enable PostRA scheduling which all recent AMD models have benefitted
from.
I had to use the znver1 model for bdver4 so that we have AVX2
instruction coverage (none of the TBM/XOP/LWP/FMA4 instructions have
explicit schedules so this shouldn't be a problem) - they both
double-pump 256-bit instructions so this works pretty well.
This patch is based off a discussion at the devmtg regarding how easily
we can provide an actual scheduler model (or at least approximation) to
more of the X86 cpu targets - we can then add specific models if the
(unlikely) need arises.
Commit: 97298853b4de70dbce9c0a140ac38e3ac179e02e
https://github.com/llvm/llvm-project/commit/97298853b4de70dbce9c0a140ac38e3ac179e02e
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/IR/ConstantFold.cpp
M llvm/lib/IR/Constants.cpp
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/rotate.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/xor-ashr.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
Log Message:
-----------
[LLVM][IR] Teach constant integer binop folds about vector ConstantInts. (#115739)
The existing logic mostly works with the main changes being:
* Use getScalarSizeInBits instead of IntegerType::getBitWidth
* Use ConstantInt::get(Type* instead of ConstantInt::get(LLVMContext
Commit: deb057adb7334734482452daf20ccdd8cece1aa8
https://github.com/llvm/llvm-project/commit/deb057adb7334734482452daf20ccdd8cece1aa8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree-visitor.h
Log Message:
-----------
[flang] Enclose Walk overloads into class for lookup purposes (#115926)
The parse-tree-visitor consists of a range of `Walk` functions where
each overload is specialized for a particular case. These overloads do
call one another, and due to the usual name lookup rules, an earlier
overload can't call an overload defined later unless the latter was
declared ahead of time.
To avoid listing a number of declarations at the beginning of the header
enclose them in a class as static members, with a couple of simple
forwarding calls. This takes advantage of the class member name lookup,
which uses the entire class definition for lookup.
Commit: ec4dab173cf8055b640aa5dbbd27ec8be11974f3
https://github.com/llvm/llvm-project/commit/ec4dab173cf8055b640aa5dbbd27ec8be11974f3
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
R llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.o
Log Message:
-----------
[NFC] Remove a mistakenly committed binary file
`llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.o`
Commit: b385c6358c8782742dd6a79ad23953d3b6765446
https://github.com/llvm/llvm-project/commit/b385c6358c8782742dd6a79ad23953d3b6765446
Author: lntue <lntue at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libc/test/src/math/smoke/CanonicalizeTest.h
Log Message:
-----------
[libc] Fix canonicalize[f|l] tests for targets with long-double-is-double. (#115998)
Commit: a33ae1b7df82d7d714156ad050c0b99545fad497
https://github.com/llvm/llvm-project/commit/a33ae1b7df82d7d714156ad050c0b99545fad497
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/LiveRangeCalc.cpp
Log Message:
-----------
[LiveRangeCalc] Fix isJointlyDominated (#116020)
Check that every path from the entry block to the use block passes
through at least one def block. Previously we only checked that at least
one path passed through a def block.
Commit: b63b0101ca47b8ba1589283cd34cc80cdb68b902
https://github.com/llvm/llvm-project/commit/b63b0101ca47b8ba1589283cd34cc80cdb68b902
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/SemaCXX/builtin-bit-cast.cpp
M clang/test/SemaCXX/constexpr-builtin-bit-cast.cpp
Log Message:
-----------
[Clang] enhance diagnostic message for __builtin_bit_cast size mismatch (#115940)
Fixes #115870
Commit: b6bd7477a91ed47ecc1baae0a961224511679b59
https://github.com/llvm/llvm-project/commit/b6bd7477a91ed47ecc1baae0a961224511679b59
Author: aurel32 <aurelien at aurel32.net>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/plugins-nextgen/common/src/Utils/ELF.cpp
M offload/plugins-nextgen/host/CMakeLists.txt
M offload/plugins-nextgen/host/dynamic_ffi/ffi.h
M offload/plugins-nextgen/host/src/rtl.cpp
Log Message:
-----------
[Offload] Add support for riscv64 to host plugin (#115773)
This adds support for the riscv64 architecture to the offload host
plugin. The check to define FFI_DEFAULT_ABI is intentionally not guarded
by __riscv_xlen as the value is the same for riscv32 and riscv64
(support for OpenMP on riscv32 is still under review).
Commit: 256050520380b271ff0ac1f01fa56d6665e9af03
https://github.com/llvm/llvm-project/commit/256050520380b271ff0ac1f01fa56d6665e9af03
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Log Message:
-----------
[AMDGPU] Reorder GCNPassConfig::addOptimizedRegAlloc. NFC. (#115873)
This just makes it so that the added passes are mentioned in this
function in the same order that they will appear in the final pass
pipeline.
Commit: 1884ffc41c20b1e08b30eef4e8ebbcc54543a139
https://github.com/llvm/llvm-project/commit/1884ffc41c20b1e08b30eef4e8ebbcc54543a139
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/utils/TableGen/MveEmitter.cpp
Log Message:
-----------
[TableGen] Use heterogenous lookups with std::map (NFC) (#115994)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: 8cc616bc71dfe0648de3843a006ac8827c5fe59d
https://github.com/llvm/llvm-project/commit/8cc616bc71dfe0648de3843a006ac8827c5fe59d
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir] Clamp UnPackOp tiling sizes from operand tile (#112429)
The `getIterationDomainTileFromOperandTile` implementation for
tensor.unpack did not clamp sizes when the unpack op had extract_slice
semantics. This PR fixes the bug.
The PR also makes a minor change to `tileAndFuseConsumerOfSlice`. When
replacing DPS inits, the iteration domain is needed, and it is computed
from the tiled version of the operation after the initial tiling
transformation. This can result in some extra indexing computation, so
the PR changes it to use the original full sized cloned consumer op.
---------
Signed-off-by: Max Dawkins <max.dawkins at gmail.com>
Commit: a86d00cf24008929bf32393415bf532c59cec4c4
https://github.com/llvm/llvm-project/commit/a86d00cf24008929bf32393415bf532c59cec4c4
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
A clang/test/SemaOpenACC/combined-construct-auto_seq_independent-ast.cpp
A clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct.cpp
Log Message:
-----------
[OpenACC] Implement combined constr 'seq'/'independent'/'auto' clauses
These three are identical to the version on compute constructs, so this
patch implements the tests for it, and ensures that we properly validate
it against all the other clauses we're supposed to. The test is mostly
a mock-up at the moment, since most other clauses aren't implemented
yet for 'loop'.
Commit: 716a095a80030de3ffdccd52b8e7e0909ee7b8d0
https://github.com/llvm/llvm-project/commit/716a095a80030de3ffdccd52b8e7e0909ee7b8d0
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port for 8cc616bc71dfe0648de3843a006ac8827c5fe59d
Commit: 46b275716ac03f6f28b945b0c7b2b05592d7207f
https://github.com/llvm/llvm-project/commit/46b275716ac03f6f28b945b0c7b2b05592d7207f
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
Log Message:
-----------
[NFC][Clang] Use StringRef and range for loops in SA/Syntax Emitters (#115972)
Use StringRef and range for loops in Clang SACheckers and Syntax
emitters.
Commit: 4f1fe6d5f1607133883d116ef0c14582fbde7ada
https://github.com/llvm/llvm-project/commit/4f1fe6d5f1607133883d116ef0c14582fbde7ada
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[NFC][lang][TableGen] Simplify `EmitClangDiagsIndexName` (#115962)
Simplify `EmitClangDiagsIndexName` to directly sort records instead of
creating an array of `RecordIndexElement` containing record name and
sorting it.
---------
Co-authored-by: Kazu Hirata <kazu at google.com>
Commit: 3169a38ddf75277030471a996ebd981f9dd51aa3
https://github.com/llvm/llvm-project/commit/3169a38ddf75277030471a996ebd981f9dd51aa3
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
A clang/test/AST/ast-print-openacc-combined-construct.cpp
Log Message:
-----------
[OpenACC] Add ast-print test for combined constructs
Commit: 9c928d0308eb75f52e570d61330975a67e0be71c
https://github.com/llvm/llvm-project/commit/9c928d0308eb75f52e570d61330975a67e0be71c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/and-fcmp.ll
M llvm/test/Transforms/InstCombine/or-fcmp.ll
Log Message:
-----------
[InstCombine] Add tests for reassoc of and/or of fcmps (NFC)
Commit: 1e5bfac933ea90ec4361446398551dd6b967c67f
https://github.com/llvm/llvm-project/commit/1e5bfac933ea90ec4361446398551dd6b967c67f
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/SystemZ/zvector2.c
Log Message:
-----------
[clang][SystemZ][NFC] Autogenerate some test case
Autogenerate the clang/test/CodeGen/SystemZ/zvector{,2}.c
test cases to make it easier to update them in the future.
Commit: cd88bfcb5906049e1387b856fc7256e5fae22e5f
https://github.com/llvm/llvm-project/commit/cd88bfcb5906049e1387b856fc7256e5fae22e5f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
A llvm/test/Transforms/SCCP/no-fold-fcmp-dynamic-denormal-mode-issue114947.ll
Log Message:
-----------
ConstantFolding: Do not fold fcmp of denormal without known mode (#115407)
Fixes #114947
Commit: 8e6630391699116641cf390a10476295b7d4b95c
https://github.com/llvm/llvm-project/commit/8e6630391699116641cf390a10476295b7d4b95c
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorInsertExtractStridedSliceRewritePatterns.cpp
M mlir/test/Conversion/ArithToAMDGPU/16-bit-floats.mlir
M mlir/test/Dialect/Linalg/vectorization-scalable.mlir
M mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract-masked.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Vector/vector-multi-reduction-lowering.mlir
M mlir/test/Dialect/Vector/vector-multi-reduction-pass-lowering.mlir
Log Message:
-----------
[mlir][Vector] Remove trivial uses of vector.extractelement/vector.insertelement (1/N) (#116053)
This patch removes trivial usages of
vector.extractelement/vector.insertelement. These operations can be
fully represented by vector.extract/vector.insert. See
https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops/71116
for more information.
Further patches will remove more usages of these ops.
Commit: 9174b5400c57efefc09f8f6c7afdb7012834b4f4
https://github.com/llvm/llvm-project/commit/9174b5400c57efefc09f8f6c7afdb7012834b4f4
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
Log Message:
-----------
[TailDup] Add test case for pred/succ limit without phi nodes.
Commit: 69879ffaec8789dd4ce5f6fa26f1b5e8140190ff
https://github.com/llvm/llvm-project/commit/69879ffaec8789dd4ce5f6fa26f1b5e8140190ff
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
Log Message:
-----------
AMDGPU: Fix using illegal VOP3 literal in frame index elimination (#115747)
Commit: 4a0c3077b0075f64471b306356ec5b3b98a0fa94
https://github.com/llvm/llvm-project/commit/4a0c3077b0075f64471b306356ec5b3b98a0fa94
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV][NFCI] Reorder RISCVRegsiterInfo.td
Also adds some headers so different sections are easier to identify.
Commit: fd8d4333fc3abbf8a54b5f10e4cb16b3b7bfc663
https://github.com/llvm/llvm-project/commit/fd8d4333fc3abbf8a54b5f10e4cb16b3b7bfc663
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-extload-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
Log Message:
-----------
[RISCV][GISel] Promote s32 G_SEXTLOAD/ZEXTLOAD on RV64.
Commit: 0baa6a7272970257fd6f527e95eb7cb18ba3361c
https://github.com/llvm/llvm-project/commit/0baa6a7272970257fd6f527e95eb7cb18ba3361c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
Log Message:
-----------
[VectorCombine] foldShuffleOfShuffles - relax one-use of inner shuffles (#116062)
Allow multi-use of either of the inner shuffles and account for that in the cost comparison.
Commit: 4df5310ffc82c0382f508d969e19521200ab357b
https://github.com/llvm/llvm-project/commit/4df5310ffc82c0382f508d969e19521200ab357b
Author: Yadong Chen <cyd.matt at qq.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
M mlir/lib/Dialect/SPIRV/IR/GroupOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/test/Conversion/ConvertToSPIRV/argmax-kernel.mlir
M mlir/test/Conversion/ConvertToSPIRV/gpu.mlir
M mlir/test/Conversion/GPUToSPIRV/reductions.mlir
M mlir/test/Dialect/SPIRV/IR/group-ops.mlir
M mlir/test/Dialect/SPIRV/IR/non-uniform-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
M mlir/test/Target/SPIRV/debug.mlir
M mlir/test/Target/SPIRV/group-ops.mlir
M mlir/test/Target/SPIRV/non-uniform-ops.mlir
Log Message:
-----------
[mlir][spirv] Use assemblyFormat to define groupNonUniform op assembly (#115662)
Declarative assemblyFormat ODS is more concise and requires less
boilerplate than filling out CPP interfaces.
Changes:
* updates the Ops defined in `SPIRVNonUniformOps.td and
SPIRVGroupOps.td` to use assemblyFormat.
* Removes print/parse from `GroupOps.cpp` which is now generated by
assemblyFormat
* Updates tests to updated format (largely using <operand> in place of
"operand" and complementing type information)
Issue: #73359
Commit: c342d11375e2befaf6ee15d491d5cbd5458ca6b1
https://github.com/llvm/llvm-project/commit/c342d11375e2befaf6ee15d491d5cbd5458ca6b1
Author: lntue <lntue at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libc/docs/talks.rst
Log Message:
-----------
[libc][doc] Add links to slides and video from Siva's CppNow 2023 talk. (#116038)
Commit: 2ca25ab11d01ceacf359643b09aed7d53d0ff8dc
https://github.com/llvm/llvm-project/commit/2ca25ab11d01ceacf359643b09aed7d53d0ff8dc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstCombine] Add extra tests for FoldOpIntoSelect (NFC)
Commit: 7a31f3c7612995ac32b4529039a1773e260b00c9
https://github.com/llvm/llvm-project/commit/7a31f3c7612995ac32b4529039a1773e260b00c9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir][vector][nfc] Improve comments in `getCompressedMaskOp` (#115663)
Commit: 21f7c626270d5b39c40f7d8f978ee91937d11dbb
https://github.com/llvm/llvm-project/commit/21f7c626270d5b39c40f7d8f978ee91937d11dbb
Author: Nashe Mncube <nashe.mncube at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
A llvm/lib/Target/ARM/ARMLatencyMutations.cpp
A llvm/lib/Target/ARM/ARMLatencyMutations.h
M llvm/lib/Target/ARM/ARMProcessors.td
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/CMakeLists.txt
Log Message:
-----------
[LLVM][ARM] Latency mutations for cortex m55,m7 and m85 (#115153)
This patch adds latency mutations as a scheduling related speedup for
the above mentioned cores. When benchmarking this pass on selected
benchmarks we see a performance improvement of 1% on most benchmarks
with some improving by up to 6%.
Author: David Penry <david.penry at arm.com>
Co-authored-by: Nashe Mncube <nashe.mncube at arm.com
Commit: 67c434523b1bca96f49458eef835fd8838b67c54
https://github.com/llvm/llvm-project/commit/67c434523b1bca96f49458eef835fd8838b67c54
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Allow `-T` to override `--default-script` (#116074)
If a linker script is explicitly supplied, there's no benefit to
supplying a default script.
SIE tracker: TOOLCHAIN-17524
Commit: 2d95ad05311e91037e60ce4d0e724c13e6f009ec
https://github.com/llvm/llvm-project/commit/2d95ad05311e91037e60ce4d0e724c13e6f009ec
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Log Message:
-----------
[RISCV][GISel] Use boolean predicated legalization action method to simplify code. NFC
Commit: 51e9609706df288ba52ea48512ab69543a58a64d
https://github.com/llvm/llvm-project/commit/51e9609706df288ba52ea48512ab69543a58a64d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
Log Message:
-----------
[gn build] Port 21f7c626270d
Commit: 39a8046b731ff4968835e8786ad2331aab7f9de2
https://github.com/llvm/llvm-project/commit/39a8046b731ff4968835e8786ad2331aab7f9de2
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/utils/TableGen/AsmWriterEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Use formatv automatic index in AsmWriterEmitter (#115966)
Use formatv automatic index assignment in AsmWriterEmitter.
Commit: bf51a9e744fe2acdbd709e10f6aec3b5aa2f3ab3
https://github.com/llvm/llvm-project/commit/bf51a9e744fe2acdbd709e10f6aec3b5aa2f3ab3
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir
Log Message:
-----------
[mlir][spirv] Upgrade spirv group op syntax in tests
Fixing forward a missed test from
https://github.com/llvm/llvm-project/pull/115662.
Commit: 0afdac41ceb9567c2f953092d0e8b6220c15acea
https://github.com/llvm/llvm-project/commit/0afdac41ceb9567c2f953092d0e8b6220c15acea
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
Log Message:
-----------
[lldb][test] Fix inline_sites_live.cpp Shell when run on Windows remotely from Linux (#115722)
This test fails on
https://lab.llvm.org/staging/#/builders/197/builds/76/steps/18/logs/FAIL__lldb-shell__inline_sites_live_cpp
because of a little difference in the lldb output.
```
# .---command stderr------------
# | C:\buildbot\as-builder-10\lldb-x-aarch64\llvm-project\lldb\test\Shell\SymbolFile\NativePDB\inline_sites_live.cpp:25:11: error: CHECK: expected string not found in input
# | // CHECK: * thread #1, stop reason = breakpoint 1
# | ^
# | <stdin>:1:1: note: scanning from here
# | (lldb) platform select remote-linux
# | ^
# | <stdin>:28:27: note: possible intended match here
# | * thread #1, name = 'inline_sites_li', stop reason = breakpoint 1.3
# | ^
# |
```
Commit: 2bd6af8cbc75ba67c20382757e03b85829d77a32
https://github.com/llvm/llvm-project/commit/2bd6af8cbc75ba67c20382757e03b85829d77a32
Author: Ronan Keryell <ronan.keryell at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/CMakeLists.txt
Log Message:
-----------
[MLIR][NFC] Fix SYCL spelling (#113060)
See https://www.khronos.org/sycl/ for the official spelling of the
Khronos Group standard.
Also fix MLIR spelling in the neighborhood.
Commit: 67fb2686fba9abd6e607ff9a09b7018b2b8ae31b
https://github.com/llvm/llvm-project/commit/67fb2686fba9abd6e607ff9a09b7018b2b8ae31b
Author: Augusto Noronha <anoronha at apple.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/test/Assembler/debug-info.ll
A llvm/test/DebugInfo/AArch64/specification.ll
M llvm/unittests/IR/DebugTypeODRUniquingTest.cpp
Log Message:
-----------
[DebugInfo] Add a specification attribute to LLVM DebugInfo (#115362)
Add a specification attribute to LLVM DebugInfo, which is analogous
to DWARF's DW_AT_specification. According to the DWARF spec:
"A debugging information entry that represents a declaration that
completes another (earlier) non-defining declaration may have a
DW_AT_specification attribute whose value is a reference to the
debugging information entry representing the non-defining declaration."
This patch allows types to be specifications of other types. This is
used by Swift to represent generic types. For example, given this Swift
program:
```
struct MyStruct<T> {
let t: T
}
let variable = MyStruct<Int>(t: 43)
```
The Swift compiler emits (roughly) an unsubtituted type for MyStruct<T>:
```
DW_TAG_structure_type
DW_AT_name ("MyStruct")
// "$s1w8MyStructVyxGD" is a Swift mangled name roughly equivalent to
// MyStruct<T>
DW_AT_linkage_name ("$s1w8MyStructVyxGD")
// other attributes here
```
And a specification for MyStruct<Int>:
```
DW_TAG_structure_type
DW_AT_specification (<link to "MyStruct">)
// "$s1w8MyStructVySiGD" is a Swift mangled name equivalent to
// MyStruct<Int>
DW_AT_linkage_name ("$s1w8MyStructVySiGD")
DW_AT_byte_size (0x08)
// other attributes here
```
Commit: 6b2de10c687dedb8e460699d2b68f0b0eafc2b4e
https://github.com/llvm/llvm-project/commit/6b2de10c687dedb8e460699d2b68f0b0eafc2b4e
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-device_type-ast.cpp
A clang/test/SemaOpenACC/combined-construct-device_type-clause.c
A clang/test/SemaOpenACC/combined-construct-device_type-clause.cpp
M clang/test/SemaOpenACC/combined-construct.cpp
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-num_gangs-clause.cpp
M clang/test/SemaOpenACC/loop-construct.cpp
Log Message:
-----------
[OpenACC] implement 'device_type' for combined constructs
This clause is pretty small/doesn't do much semantic-analysis-wise, , other than
have two spellings and disallow certain clauses after it. However, as
most of those aren't implemented yet, the diagnostic is left as a TODO.
Commit: 1b8e0cf090a08b2c517eb2a3e101332d692063c2
https://github.com/llvm/llvm-project/commit/1b8e0cf090a08b2c517eb2a3e101332d692063c2
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/Exceptions.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/Exceptions.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Never emit "large" functions (#115974)
"Large" functions are functions that are too big to fit into their
original slots after code modifications. CheckLargeFunctions pass is
designed to prevent such functions from emission. Extend this pass to
work with functions with constant islands.
Now that CheckLargeFunctions covers all functions, it guarantees that we
will never see such functions after code emission on all platforms
(previously it was guaranteed on x86 only). Hence, we can get rid of
RewriteInstance extensions that were meant to support "large" functions.
Commit: 92604cf3788e5603482e7adde20949eddbc4c939
https://github.com/llvm/llvm-project/commit/92604cf3788e5603482e7adde20949eddbc4c939
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/module/ieee_arithmetic.f90
M flang/runtime/Float128Math/CMakeLists.txt
M flang/runtime/Float128Math/math-entries.h
A flang/runtime/Float128Math/remainder.cpp
A flang/test/Lower/Intrinsics/ieee_rem.f90
Log Message:
-----------
[flang] IEEE_REM (#115936)
Implement the IEEE 60559:2020 remainder function.
Commit: 57cf199be2f1496e242f6dcd32456b3ed816d46d
https://github.com/llvm/llvm-project/commit/57cf199be2f1496e242f6dcd32456b3ed816d46d
Author: Nashe Mncube <nashe.mncube at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMSubtarget.cpp
Log Message:
-----------
[llvm][ARM] Missing switch statement handles (#116086)
PR #115153 added enums which needed to be handled in a switch statement.
This trips up buildbot.
Commit: 95b680e4c353d479fbfb96adb39696042c005e99
https://github.com/llvm/llvm-project/commit/95b680e4c353d479fbfb96adb39696042c005e99
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libc/src/__support/CMakeLists.txt
M libc/src/__support/HashTable/generic/bitmask_impl.inc
R libc/src/__support/endian.h
A libc/src/__support/endian_internal.h
M libc/src/network/htonl.cpp
M libc/src/network/htons.cpp
M libc/src/network/ntohl.cpp
M libc/src/network/ntohs.cpp
M libc/src/string/memory_utils/op_generic.h
M libc/src/string/memory_utils/utils.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/endian_internal_test.cpp
R libc/test/src/__support/endian_test.cpp
M libc/test/src/network/htonl_test.cpp
M libc/test/src/network/htons_test.cpp
M libc/test/src/network/ntohl_test.cpp
M libc/test/src/network/ntohs_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
[libc] Rename libc/src/__support/endian.h to endian_internal.h (#115950)
This prevents a conflict with the Linux system endian.h when built in
overlay mode for CPP files in __support.
This issue appeared in PR #106259.
Commit: 461a0d6c56ff2e6beb458bd410bfcf605cd63753
https://github.com/llvm/llvm-project/commit/461a0d6c56ff2e6beb458bd410bfcf605cd63753
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/fmv-streaming.c
M clang/test/CodeGen/AArch64/mixed-target-attributes.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/CodeGenCXX/attr-target-version.cpp
M clang/test/CodeGenCXX/fmv-namespace.cpp
Log Message:
-----------
[FMV] Add "+fmv" to the target-features of versioned functions. (#116028)
This essentially propagates the information that a function is versioned
from source code to IR.
Commit: 0f44d72e0ee74970cf696ff4c791f63e0c3fa9b4
https://github.com/llvm/llvm-project/commit/0f44d72e0ee74970cf696ff4c791f63e0c3fa9b4
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/phi.ll
Log Message:
-----------
[InstCombine] Precommit test for PR115901 (NFC)
Commit: 929cbe7f596733f85cd274485acc19442dd34a80
https://github.com/llvm/llvm-project/commit/929cbe7f596733f85cd274485acc19442dd34a80
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/test/Transforms/InstCombine/opaque-ptr.ll
M llvm/test/Transforms/InstCombine/phi.ll
Log Message:
-----------
[InstCombine] Intersect nowrap flags between geps while folding into phi
A miscompilation issue has been addressed with refined checking.
Fixes: https://github.com/llvm/llvm-project/issues/115149.
Commit: 71ae021359b6f0fbf241021d2246e7acb66f4837
https://github.com/llvm/llvm-project/commit/71ae021359b6f0fbf241021d2246e7acb66f4837
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang] Few minor formatting changes, NFC
This makes these files be invariant with respect to clang-format.
Commit: cb9481dbf902adc349757eca12a0a09396dc4a23
https://github.com/llvm/llvm-project/commit/cb9481dbf902adc349757eca12a0a09396dc4a23
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][affine] Add folders for delinearize_index and linearize_index (#115766)
This commit adds implementations of fold() for delinearize_index and
linearize_index to constant-fold them away when they have a fully
constant basis and constant argument(s).
This commit also adds a canonicalization pattern to linearize_index that
causes it to drop leading-zero inputs.
Commit: e4578616476426595737c73c9ac357467ee19123
https://github.com/llvm/llvm-project/commit/e4578616476426595737c73c9ac357467ee19123
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Support shape shift in data transfer op. (#115929)
When an array is declared with a non default lower bound, the declare op
`getShape` will return a `ShapeShiftOp`. This result is used in data
transfer operation to compute the number of bytes to transfer. Update
the op to support `ShapeShiftOp`.
Commit: c658d07c4f8210555473c5721e1302f00f9fd25b
https://github.com/llvm/llvm-project/commit/c658d07c4f8210555473c5721e1302f00f9fd25b
Author: John Harrison <harjohn at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/test/API/tools/lldb-dap/evaluate/main.cpp
Log Message:
-----------
[lldb-dap] Adjust the evaluate test to use a different lldb command. (#116045)
Previously this used `var` as both an lldb command and variable in the
source to validate the behavior of the 'auto' repl mode. However, `var`
seems to occasionally fail in the CI test when attempting to print some
c++ types. Instead switch the command and variable name to `list` which
should not run the dynamic variable formatting code for c++ objects.
This should fix #116041.
Commit: a6d299ddb9398e4641b23ce5c549ca5285dd2ef2
https://github.com/llvm/llvm-project/commit/a6d299ddb9398e4641b23ce5c549ca5285dd2ef2
Author: John Harrison <harjohn at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactor lldb-dap/DAP.{h,cpp} to use its own instance instead of the global instance. (#115948)
The refactor will unblock us for creating multiple DAP instances.
Commit: 48e09fea01d1c0196d22e99ddae5677ef050304e
https://github.com/llvm/llvm-project/commit/48e09fea01d1c0196d22e99ddae5677ef050304e
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
Add new "llvm:SandboxIR" label to .github/new-prs-labeler.yml (#115965)
As requested in
https://github.com/llvm/llvm-project/pull/115577#issuecomment-2466300749
Commit: 00f2989f98520c401f0ab544a3dc766ed83785c0
https://github.com/llvm/llvm-project/commit/00f2989f98520c401f0ab544a3dc766ed83785c0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/hip-device-libs.hip
Log Message:
-----------
[HIP] Default to COV5 for HIP compilations (#116077)
Summary:
This was done a long time ago for OpenMP, but it seems HIP was never
updated. This patch rectifies that. The default for the LLVM backend is
5 so this is probably required for some stuff.
Commit: 8ac6af2c7f5caec824ebc9a0a527e2040f2b03f6
https://github.com/llvm/llvm-project/commit/8ac6af2c7f5caec824ebc9a0a527e2040f2b03f6
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Update NVPTX maintainers (#115973)
This PR requires approval from:
- @jholewinski to attest that @Artem-B, @AlexMaclean, and
@justinfargnoli can perform the [responsibilities of a
maintainer](https://llvm.org/docs/DeveloperPolicy.html#maintainers).
- @Artem-B and @AlexMaclean to ensure they'd like to volunteer for the
role.
Commit: 47cc9db797b1e1da94af91cf3d0f2999d11c1cbc
https://github.com/llvm/llvm-project/commit/47cc9db797b1e1da94af91cf3d0f2999d11c1cbc
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/test/Transforms/WholeProgramDevirt/devirt_single_after_filtering_unreachable_function.ll
Log Message:
-----------
[WPD]Regard unreachable function as a possible devirtualizable target (#115668)
https://reviews.llvm.org/D115492 skips unreachable functions and
potentially allows more static de-virtualizations. The motivation is to
ignore virtual deleting destructor of abstract class (e.g.,
`Base::~Base()` in https://gcc.godbolt.org/z/dWMsdT9Kz).
* Note WPD already handles most pure virtual functions (like `Base::x()`
in the godbolt example above), which becomes a `__cxa_pure_virtual` in
the vtable slot.
This PR proposes to undo the change, because it turns out there are
other unreachable functions that a general program wants to run and fail
intentionally, with `LOG(FATAL)` or `CHECK` [1] for example. While many
real-world applications are encouraged to check-fail sparingly, they are
allowed to do so on critical errors (e.g., misconfiguration or bug is
detected during server startup).
* Implementation-wise, this PR keeps the one-bit 'unreachable' state in
bitcode and updates WPD analysis.
https://gcc.godbolt.org/z/T1aMhczYr is a minimum reproducible example
extracted from unit test. `Base::func` is a one-liner of `LOG(FATAL) <<
"message"`, and lowered to one basic block ending with `unreachable`. A
real-world program is _allowed_ to invoke Base::func to terminate the
program as a way to report errors (in server initialization stage for
example), even if errors on the serving path should be handled more
gracefully.
[1] https://abseil.io/docs/cpp/guides/logging#CHECK and
https://abseil.io/docs/cpp/guides/logging#configuration-and-flags
Commit: 62441b9f30a65b2708697f06333cb8bc777cebe9
https://github.com/llvm/llvm-project/commit/62441b9f30a65b2708697f06333cb8bc777cebe9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-load-store.mir
Log Message:
-----------
[RISCV][GISel] Add instruction selection mir test for f32/f64 fp load/store. NFC
We had a regbank-select test but not an instruction selection test.
Commit: e25e8867348953c17fa0d0b79f43bde758ad8b37
https://github.com/llvm/llvm-project/commit/e25e8867348953c17fa0d0b79f43bde758ad8b37
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M libc/src/__support/high_precision_decimal.h
Log Message:
-----------
[libc][z/OS] Remove ASCII trick to fix EBDIC std::from_char (#116078)
This PR will fix the following lit in all EBCDIC variations on z/OS:
`std/utilities/charconv/charconv.from.chars/floating_point.pass.cpp`
The trick to test for `e` and `E` is working only in ASCII.
The fix is to simply test for both lower and upper case exponent letter
`e` and `E` respectfully.
Commit: d492001bdcd7bfcd19ada7459a6b0eaf81ba3ba2
https://github.com/llvm/llvm-project/commit/d492001bdcd7bfcd19ada7459a6b0eaf81ba3ba2
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia][CMake] Enable new libc header gen (#102371)
All issues blocking this were resolved.
Commit: b904166aa0cf9a00440076911056ed81d01dfe59
https://github.com/llvm/llvm-project/commit/b904166aa0cf9a00440076911056ed81d01dfe59
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/alu-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/copy-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/copy-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/ext-trunc-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-select-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-select-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/global-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/global-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/minmax-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/minmax-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/phi-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/phi-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/select-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/select-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/vec-args-ret.mir
Log Message:
-----------
[RISCV][GISel] Remove -disable-gisel-legality-check from scalar tests. NFC
Adjust a couple tests so they can pass the check.
Commit: 4e330faac2b9a9172f4f16842196200989d6fbf3
https://github.com/llvm/llvm-project/commit/4e330faac2b9a9172f4f16842196200989d6fbf3
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
Log Message:
-----------
[OpenACC] Implement combined construct allowed-after device-type rule
This patch implements the 'only X is allowed after' rule for combined
constructs on a device-type clause. This was left as a set of 'TODO' in
the previous patch, plus more issues were found with the TODO list,
which are fixed here.
Commit: fa20b5d30d38f4bb090acac7c205fbb54a5ca990
https://github.com/llvm/llvm-project/commit/fa20b5d30d38f4bb090acac7c205fbb54a5ca990
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-if-ast.cpp
A clang/test/SemaOpenACC/combined-construct-if-clause.c
A clang/test/SemaOpenACC/combined-construct-if-clause.cpp
A clang/test/SemaOpenACC/combined-construct-self-ast.cpp
A clang/test/SemaOpenACC/combined-construct-self-clause.c
A clang/test/SemaOpenACC/combined-construct-self-clause.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
M clang/test/SemaOpenACC/compute-construct-if-clause.c
Log Message:
-----------
[OpenACC] 'if' and 'self' clause implementation for Combined Constructs
These two are identical to how they work for compute constructs, so this
patch enables them and ensures there is sufficient testing.
Commit: 04d450fd8d4e8fcf0b0c5019d9233a5c7d7fe751
https://github.com/llvm/llvm-project/commit/04d450fd8d4e8fcf0b0c5019d9233a5c7d7fe751
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-xchg-fp.ll
Log Message:
-----------
AtomicExpand: Preserve metadata when bitcasting fp atomicrmw xchg (#115240)
Commit: dc4185fe2f9635791c6bab04ace29e090949a18e
https://github.com/llvm/llvm-project/commit/dc4185fe2f9635791c6bab04ace29e090949a18e
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add support for reallocarray (#114818)
reallocarray is available in glibc since 2.29 under _DEFAULT_SOURCE and
under _GNU_SOURCE before, let's model it appropriately.
Commit: 6684eb4d6c9ac2b1ec35cf7d0df1344bfe81ade1
https://github.com/llvm/llvm-project/commit/6684eb4d6c9ac2b1ec35cf7d0df1344bfe81ade1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove IR section from a couple MIR tests. NFC
Commit: 17c6ec6db1430e7e00c0e2a2ad6d26fa94fe8cf1
https://github.com/llvm/llvm-project/commit/17c6ec6db1430e7e00c0e2a2ad6d26fa94fe8cf1
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[NFC][Clang] Use StringRef instead of string in ClangDiagnosticEmitter (#115959)
Use StringRef instead of std::string in ClangDiagnosticEmitter.
Commit: 95fa5f39a0506948bd3c81842c7828d7892023cd
https://github.com/llvm/llvm-project/commit/95fa5f39a0506948bd3c81842c7828d7892023cd
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/test/AST/ast-print-openacc-combined-construct.cpp
Log Message:
-----------
[OpenACC] Fix ast-print test that failed due to copy/paste error
Commit: 98c4f4fce84bb7b0943be92d06765ed4dff28710
https://github.com/llvm/llvm-project/commit/98c4f4fce84bb7b0943be92d06765ed4dff28710
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove IVEndValues, use resume value directly from fixed phi.(NFC)
Use the IV resume/end values from the phis in the scalar header,
instead of collecting them in a map. This removes some complexity
from the code dealing with induction resume values.
Analogous to 1edd22030 which did the same for reduction resume values.
Commit: 0dcb0acf8265e1486f4f3715cef01987af1391cd
https://github.com/llvm/llvm-project/commit/0dcb0acf8265e1486f4f3715cef01987af1391cd
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix false positives in warning againt 2-parameter std::span constructor (#115797)
Do not warn when two parameter constructor receives pointer address from
a std::addressof method and the span size is set to 1.
(rdar://139298119)
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: 7a8fe0f83c4ba03d07aef9243596d67af74a3b87
https://github.com/llvm/llvm-project/commit/7a8fe0f83c4ba03d07aef9243596d67af74a3b87
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SelectionDAG] Fixup type usage of CondCodeAction table (#116082)
Ensure that all uses of CondCodeAction table are checking the compared
types, not the produced type. This is a prerequisite to landing #115035
Commit: d50fbe43c9887e776cdfe95deaf312fb9cecfeaf
https://github.com/llvm/llvm-project/commit/d50fbe43c9887e776cdfe95deaf312fb9cecfeaf
Author: Amy Wang <kai.ting.wang at huawei.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/IR/CommonAttrConstraints.td
M mlir/python/mlir/dialects/affine.py
M mlir/test/python/dialects/affine.py
Log Message:
-----------
[MLIR][Python] Python binding support for AffineIfOp (#108323)
Fix the AffineIfOp's default builder such that it takes in an
IntegerSetAttr. AffineIfOp has skipDefaultBuilders=1 which effectively
skips the creation of the default AffineIfOp::builder on the C++ side.
(AffineIfOp has two custom OpBuilder defined in the
extraClassDeclaration.) However, on the python side, _affine_ops_gen.py
shows that the default builder is being created, but it does not accept
IntegerSet and thus is useless. This fix at line 411 makes the default
python AffineIfOp builder take in an IntegerSet input and does not
impact the C++ side of things.
Commit: de6d48d05d7aa233248d2f725654931cb1e2f6fd
https://github.com/llvm/llvm-project/commit/de6d48d05d7aa233248d2f725654931cb1e2f6fd
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/ConcatOpPatterns.cpp
M mlir/test/Dialect/Tensor/decompose-concat.mlir
Log Message:
-----------
[mlir][Tensor] Move concat operation decomposition as a method of the concat operation. (#116004)
Currently the implementation is within a pattern that cannot be used
without a pattern rewriter. Move the decomposition as a method of the
operation to make it usable outside of pattern rewrites.
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: 5ac624c8234fe0a62cbf0447dbf7035ea29d062e
https://github.com/llvm/llvm-project/commit/5ac624c8234fe0a62cbf0447dbf7035ea29d062e
Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/DirectX/CMakeLists.txt
A llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
A llvm/lib/Target/DirectX/DXILFlattenArrays.h
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
A llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
A llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
A llvm/test/CodeGen/DirectX/llc-vector-store-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-data.ll
M llvm/test/CodeGen/DirectX/scalar-load.ll
M llvm/test/CodeGen/DirectX/scalar-store.ll
Log Message:
-----------
[DirectX] Flatten arrays (#114332)
- Relevant piece is `DXILFlattenArrays.cpp`
- Loads and Store Instruction visits are just for finding
GetElementPtrConstantExpr and splitting them.
- Allocas needed to be replaced with flattened allocas.
- Global arrays were similar to allocas. Only interesting piece here is
around initializers.
- Most of the work went into building correct GEP chains. The approach
here was a recursive strategy via `recursivelyCollectGEPs`.
- All intermediary GEPs get marked for deletion and only the leaf GEPs
get updated with the new index.
fixes [89646](https://github.com/llvm/llvm-project/issues/89646)
Commit: be95e16d38724a78b6845868a06eb03db87e0a53
https://github.com/llvm/llvm-project/commit/be95e16d38724a78b6845868a06eb03db87e0a53
Author: AdityaK <hiraditya at msn.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
Log Message:
-----------
[NFC] Fix typos in LoopVersioningLICM.cpp (#116099)
Commit: 569c36e29c6563f97594994744abb3c0bf03da6c
https://github.com/llvm/llvm-project/commit/569c36e29c6563f97594994744abb3c0bf03da6c
Author: Chris B <chris.bieneman at me.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[DirectX] Add @bogner as DX backend maintainer (#114872)
@bogner has a long history with the LLVM community as a contributor and
maintainer of a wide array of project areas. He is providing a lot of
the leadership and direction for the contributors working on the DirectX
backend, and should be recognized as its maintainer.
Commit: 9778fc76e3342cc5d6ac36feef63631eb065c57f
https://github.com/llvm/llvm-project/commit/9778fc76e3342cc5d6ac36feef63631eb065c57f
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
Log Message:
-----------
Revert "AMDGPU: Don't avoid clamp of bit shift in BFE pattern (#115372)" (#116091)
Based on the suggestion from
https://github.com/llvm/llvm-project/pull/115543, we should not do the
pattern matching from x << (32-y) >> (32-y) to "bfe x, 0, y" at all.
This reverts commits a2bacf8ab58af4c1a0247026ea131443d6066602 and
https://github.com/llvm/llvm-project/commit/bdf8e308b7ea430f619ca3aa1199a76eb6b4e2d4.
Commit: e8c07f7458285c6fb2eddff5b7914519de10474d
https://github.com/llvm/llvm-project/commit/e8c07f7458285c6fb2eddff5b7914519de10474d
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/test/MC/AMDGPU/reloc-directive.s
Log Message:
-----------
[MC][AMDGPU] Support .reloc BFD_RELOC_{NONE,32,64} (#114617)
Emitting BFD_RELOC_* reloc directives can cause internal errors on
AMDGPU.
Commit: fd2e4004cd01cd1cdf65cf643ca9c178c91741dc
https://github.com/llvm/llvm-project/commit/fd2e4004cd01cd1cdf65cf643ca9c178c91741dc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV] Add XLenVT casts in isel patterns that output 2 GPR instructions.
See #81192 for why we need to do this.
Commit: ec066d30e29fce388b1722971970d73ec65f14fb
https://github.com/llvm/llvm-project/commit/ec066d30e29fce388b1722971970d73ec65f14fb
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
Log Message:
-----------
[flang][cuda] cuf.alloc in device context should be converted to fir.alloc (#116110)
Update `inDeviceContext` to account for the gpu.func operation.
Commit: fa0cf3d39e03c3c63478f30a4c8c17d119b54b7f
https://github.com/llvm/llvm-project/commit/fa0cf3d39e03c3c63478f30a4c8c17d119b54b7f
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangle.h
M llvm/include/llvm/IR/Mangler.h
M llvm/lib/Demangle/MicrosoftDemangle.cpp
M llvm/lib/IR/Mangler.cpp
M llvm/unittests/IR/ManglerTest.cpp
Log Message:
-----------
[llvm][aarch64] Fix Arm64EC name mangling algorithm (#115567)
Arm64EC uses a special name mangling mode that adds `$$h` between the
symbol name and its type. In MSVC's name mangling `@` is used to
separate the name and type BUT it is also used for other purposes, such
as the separator between paths in a fully qualified name.
The original algorithm was quite fragile and made assumptions that
didn't hold true for all MSVC mangled symbols, so instead of trying to
improve this algorithm we are now using the demangler to indicate where
the insertion point should be (i.e., to parse the fully-qualified name
and return the current string offset).
Also fixed `isArm64ECMangledFunctionName` to search for `@$$h` since the
`$$h` must always be after a `@`.
Fixes #115231
Commit: adfa6b762dc53bc53377785d824264a3311e829d
https://github.com/llvm/llvm-project/commit/adfa6b762dc53bc53377785d824264a3311e829d
Author: Richard Smith <richard at metafoo.co.uk>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
Document that the lifetime of the caller-side `trivial_abi` parameter ends before the call. (#116100)
Fixes #116096.
Commit: 6c9256dc5cda9184e295bc8d00be35e61b3be892
https://github.com/llvm/llvm-project/commit/6c9256dc5cda9184e295bc8d00be35e61b3be892
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M compiler-rt/lib/asan/asan_descriptions.cpp
Log Message:
-----------
[ASAN] fix a nullptr dereference error. (#116011)
`parent_context` is used without checking for nullptr and we can see in
LINE 50 that it could totally be nullptr. This patch addresses this
issue.
Commit: 73b577cc8c8a8ceeac87de5953a2c643e125d43e
https://github.com/llvm/llvm-project/commit/73b577cc8c8a8ceeac87de5953a2c643e125d43e
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked-ptr.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
Log Message:
-----------
[WebKit checkers] Treat ref() and incrementCheckedPtrCount() as trivial (#115695)
Treat member function calls to ref() and incrementCheckedPtrCount() as
trivial so that a function which returns RefPtr/Ref out of a raw
reference / pointer is also considered trivial.
Commit: b4d23cf6853a1e3971f27eae3b58609f77829252
https://github.com/llvm/llvm-project/commit/b4d23cf6853a1e3971f27eae3b58609f77829252
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/remarks-reduction-inloop.ll
Log Message:
-----------
[LV] Fix missing precomptueCosts() in emitInvalidCostRemarks(). (#114918)
We should always update the `SkipComputation` which is set in
`VPCostContext` before VPlan compute costs.
This patch prevent the assertion of in-loop reduction in the
`VPReductionRecipe::computeCost()` and other potential assertions of
partially implemented VPlan-based cost model.
Commit: c03b6e89434c11c936dc2fa8b01f1deb95b1923a
https://github.com/llvm/llvm-project/commit/c03b6e89434c11c936dc2fa8b01f1deb95b1923a
Author: Greg Roth <grroth at microsoft.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[SPIRV] Mark maybe unused extractSubvector variable (#116117)
Change #115178 introduced a variable that is only used in an assert,
which could result in an unused variable warning in builds without
asserts enabled. This just addes the maybe_unused attribute to silence
the warning.
Commit: 1f0e0da3af783fd2bb5e23bc2b97141abac68926
https://github.com/llvm/llvm-project/commit/1f0e0da3af783fd2bb5e23bc2b97141abac68926
Author: Greg Roth <grroth at microsoft.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] update Apple undefined symbol link flag from suppress (#116113)
the -undefined suppress option for Apple's linker is deprecated and was
producing multiple warnings. This updates it to dynamic_lookup, which
has much the same effect, but avoids these deprecation warnings.
Commit: e5092c301959b599ffd51b7942a8bed5c4be54de
https://github.com/llvm/llvm-project/commit/e5092c301959b599ffd51b7942a8bed5c4be54de
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/convert-to-llvm.fir
Log Message:
-----------
[flang][cuda] Support malloc and free conversion in gpu module (#116112)
Commit: aed4356252df2a4ab2e430d77a29bdb3dfd874fc
https://github.com/llvm/llvm-project/commit/aed4356252df2a4ab2e430d77a29bdb3dfd874fc
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Dialect/Func/Transforms/DecomposeCallGraphTypes.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorDescriptor.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] Dialect Conversion: Add `replaceOpWithMultiple` (#115816)
This commit adds a new function
`ConversionPatternRewriter::replaceOpWithMultiple`. This function is
similar to `replaceOp`, but it accepts multiple `ValueRange`
replacements, one per op result.
Note: This function is not an overload of `replaceOp` because of
ambiguous overload resolution that would make the API difficult to use.
This commit aligns "block signature conversions" with "op replacements":
both support 1:N replacements now. Due to incomplete 1:N support in the
dialect conversion driver, an argument materialization is inserted when
an SSA value is replaced with multiple values; same as block signature
conversions already work around the problem. These argument
materializations are going to be removed in a subsequent commit that
adds full 1:N support. The purpose of this PR is to add missing features
gradually in small increments.
This commit also updates two MLIR transformations that have their custom
workarounds around missing 1:N support. These can already start using
`replaceOpWithMultiple`.
Co-authored-by: Markus Böck <markus.boeck02 at gmail.com>
Commit: 6e614e11df6a152082b51a1b18332cb8730a4032
https://github.com/llvm/llvm-project/commit/6e614e11df6a152082b51a1b18332cb8730a4032
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
Log Message:
-----------
[clang][docs] Revise documentation for `__builtin_reduce_(max|min)`. (#114637)
The function operation described in the document did not match its
actual semantic meaning, this patch resolved the problem.
Commit: d23c5c2d6566fce4380cfa31d438422db19fbce9
https://github.com/llvm/llvm-project/commit/d23c5c2d6566fce4380cfa31d438422db19fbce9
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/include/llvm/CGData/CodeGenData.h
M llvm/include/llvm/CGData/StableFunctionMap.h
M llvm/include/llvm/CGData/StableFunctionMapRecord.h
A llvm/include/llvm/CodeGen/GlobalMergeFunctions.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CGData/StableFunctionMap.cpp
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/GlobalMergeFunctions.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
A llvm/test/ThinLTO/AArch64/cgdata-merge-local.ll
A llvm/test/ThinLTO/AArch64/cgdata-merge-read.ll
A llvm/test/ThinLTO/AArch64/cgdata-merge-two-rounds.ll
A llvm/test/ThinLTO/AArch64/cgdata-merge-write.ll
M llvm/test/tools/llvm-cgdata/merge-combined-funcmap-hashtree.test
M llvm/test/tools/llvm-cgdata/merge-funcmap-archive.test
M llvm/test/tools/llvm-cgdata/merge-funcmap-concat.test
M llvm/test/tools/llvm-cgdata/merge-funcmap-double.test
M llvm/test/tools/llvm-cgdata/merge-funcmap-single.test
M llvm/tools/llvm-cgdata/Opts.td
M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
M llvm/unittests/CGData/StableFunctionMapTest.cpp
Log Message:
-----------
[CGData] Global Merge Functions (#112671)
This implements a global function merging pass. Unlike traditional
function merging passes that use IR comparators, this pass employs a
structurally stable hash to identify similar functions while ignoring
certain constant operands. These ignored constants are tracked and
encoded into a stable function summary. When merging, instead of
explicitly folding similar functions and their call sites, we form a
merging instance by supplying different parameters via thunks. The
actual size reduction occurs when identically created merging instances
are folded by the linker.
Currently, this pass is wired to a pre-codegen pass, enabled by the
`-enable-global-merge-func` flag.
In a local merging mode, the analysis and merging steps occur
sequentially within a module:
- `analyze`: Collects stable function hashes and tracks locations of
ignored constant operands.
- `finalize`: Identifies merge candidates with matching hashes and
computes the set of parameters that point to different constants.
- `merge`: Uses the stable function map to optimistically create a
merged function.
We can enable a global merging mode similar to the global function
outliner
(https://discourse.llvm.org/t/rfc-enhanced-machine-outliner-part-2-thinlto-nolto/78753/),
which will perform the above steps separately.
- `-codegen-data-generate`: During the first round of code generation,
we analyze local merging instances and publish their summaries.
- Offline using `llvm-cgdata` or at link-time, we can finalize all these
merging summaries that are combined to determine parameters.
- `-codegen-data-use`: During the second round of code generation, we
optimistically create merging instances within each module, and finally,
the linker folds identically created merging instances.
Depends on #112664
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: 474ed453f7a9ef1c4bcd9ba60f2ef20e0199d872
https://github.com/llvm/llvm-project/commit/474ed453f7a9ef1c4bcd9ba60f2ef20e0199d872
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port d23c5c2d6566
Commit: 287a34311e342d5573200fbc2c651fa665ccc062
https://github.com/llvm/llvm-project/commit/287a34311e342d5573200fbc2c651fa665ccc062
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/unittests/Support/YAMLIOTest.cpp
Log Message:
-----------
Reformat
Commit: 941f704f0892317701fd263603a729e0ef86dda6
https://github.com/llvm/llvm-project/commit/941f704f0892317701fd263603a729e0ef86dda6
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/unittests/Support/YAMLIOTest.cpp
Log Message:
-----------
[YAML] Make `std::array` available (#116059)
`std::array` will be handled like `MutableArrayRef`;
- Extending elements is not acceptable.
- For applying fewer sequence, trailing elements will be initialized by
default.
Not like;
- `std::array` is not the reference but holds values. Supposing to hold
small count of elements.
Commit: e9aee4fd80874f80556456f64c303ffb957bd614
https://github.com/llvm/llvm-project/commit/e9aee4fd80874f80556456f64c303ffb957bd614
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/unittests/Support/YAMLIOTest.cpp
Log Message:
-----------
Revert "[YAML] Make `std::array` available (#116059)"
Compilation failed on gcc hosts.
This reverts commit 941f704f0892317701fd263603a729e0ef86dda6.
(llvmorg-20-init-12117-g941f704f0892)
Commit: f407dff50cdcbcfee9dd92397d3792627c3ac708
https://github.com/llvm/llvm-project/commit/f407dff50cdcbcfee9dd92397d3792627c3ac708
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/MC/MCStreamer.cpp
A llvm/test/DebugInfo/X86/DW_AT_LLVM_stmt_seq_sec_offset.ll
Log Message:
-----------
[DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (#110192)
**Summary**
This patch introduces a new compiler option `-mllvm
-emit-func-debug-line-table-offsets` that enables the emission of
per-function line table offsets and end sequences in DWARF debug
information. This enhancement allows tools and debuggers to accurately
attribute line number information to their corresponding functions, even
in scenarios where functions are merged or share the same address space
due to optimizations like Identical Code Folding (ICF) in the linker.
**Background**
RFC: [New DWARF Attribute for Symbolication of Merged
Functions](https://discourse.llvm.org/t/rfc-new-dwarf-attribute-for-symbolication-of-merged-functions/79434)
Previous similar PR:
[#93137](https://github.com/llvm/llvm-project/pull/93137) – This PR was
very similar to the current one but at the time, the assembler had no
support for emitting labels within the line table. That support was
added in PR [#99710](https://github.com/llvm/llvm-project/pull/99710) -
and in this PR we use some of the support added in the assembler PR.
In the current implementation, Clang generates line information in the
`debug_line` section without directly associating line entries with
their originating `DW_TAG_subprogram` DIEs. This can lead to issues when
post-compilation optimizations merge functions, resulting in overlapping
address ranges and ambiguous line information.
For example, when functions are merged by ICF in LLD, multiple functions
may end up sharing the same address range. Without explicit linkage
between functions and their line entries, tools cannot accurately
attribute line information to the correct function, adversely affecting
debugging and call stack resolution.
**Implementation Details**
To address the above issue, the patch makes the following key changes:
**`DW_AT_LLVM_stmt_sequence` Attribute**: Introduces a new LLVM-specific
attribute `DW_AT_LLVM_stmt_sequence` to each `DW_TAG_subprogram` DIE.
This attribute holds a label pointing to the offset in the line table
where the function's line entries begin.
**End-of-Sequence Markers**: Emits an explicit DW_LNE_end_sequence after
each function's line entries in the line table. This marks the end of
the line information for that function, ensuring that line entries are
correctly delimited.
**Assembler and Streamer Modifications**: Modifies the MCStreamer and
related classes to support emitting the necessary labels and tracking
the current function's line entries. A new flag
GenerateFuncLineTableOffsets is added to control this behavior.
**Compiler Option**: Introduces the `-mllvm
-emit-func-debug-line-table-offsets` option to enable this
functionality, allowing users to opt-in as needed.
Commit: 48cc43510931625ea23cd4ba621e5c0ddb12a452
https://github.com/llvm/llvm-project/commit/48cc43510931625ea23cd4ba621e5c0ddb12a452
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M lld/test/ELF/ppc64-local-exec-tls.s
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrSPE.td
M llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
M llvm/test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll
M llvm/test/MC/PowerPC/ppc64-errors.s
Log Message:
-----------
Reland "[PowerPC] Add error for incorrect use of memory operands (#114277)" (#115958)
Commit 93589057830b2c3c35500ee8cac25c717a1e98f9 was reverted because it
caused a failure with test `lld :: ELF/ppc64-local-exec-tls.s`. This
relands the commit with a fix for the test.
Commit: 2283d50447369fc576eced8aca1cf0f54bdc235b
https://github.com/llvm/llvm-project/commit/2283d50447369fc576eced8aca1cf0f54bdc235b
Author: tangaac <tangyan01 at loongson.cn>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[LoongArch] add la v1.1 features for sys::getHostCPUFeatures (#115832)
Two features (i.e. `frecipe` and `lam-bh`) are added to
`sys.getHostCPUFeatures`. More features will be added in future.
In addition, this patch adds the features returned by
`sys.getHostCPUFeature` when `-march=native`.
Commit: be187369a03bf2df8bdbc76ecd381377b3bb6074
https://github.com/llvm/llvm-project/commit/be187369a03bf2df8bdbc76ecd381377b3bb6074
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSetWavePriority.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
Log Message:
-----------
[AMDGPU] Remove unused includes (NFC) (#116154)
Identified with misc-include-cleaner.
Commit: d3da78863c7021fa2447a168dc03ad791db69dc6
https://github.com/llvm/llvm-project/commit/d3da78863c7021fa2447a168dc03ad791db69dc6
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
Log Message:
-----------
[CGData] Refactor Global Merge Functions (#115750)
This is a follow-up PR to refactor the initial global merge function
pass implemented in #112671.
It first collects stable functions relevant to the current module and
iterates over those only, instead of iterating through all stable
functions in the stable function map.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: 0b54e33fd5ab362dfa5eacb61d7cbdb9cc3a89ac
https://github.com/llvm/llvm-project/commit/0b54e33fd5ab362dfa5eacb61d7cbdb9cc3a89ac
Author: s-watanabe314 <watanabe.shu-06 at fujitsu.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/lib/Lower/CallInterface.cpp
M flang/test/Lower/HLFIR/select-rank.f90
M flang/test/Lower/attributes.f90
Log Message:
-----------
[flang] Add FIR attributes and apply them to dummy arguments (#115686)
To determine if a function's dummy argument is nocapture, add the
asynchronous attribute to the FIR attribute. The volatile attribute will
also be used to determine nocapture assignment, but this will remain a
TODO until other processing using volatile is implemented.
I will post another patch to apply nocapture. See also the discussion in
the following discourse post.
https://discourse.llvm.org/t/applying-the-nocapture-attribute-to-reference-passed-arguments-in-fortran-subroutines/81401
Commit: 0341da561cd964b4f3341abfaebc0b5cf97c088b
https://github.com/llvm/llvm-project/commit/0341da561cd964b4f3341abfaebc0b5cf97c088b
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CSEMIRBuilder.h
Log Message:
-----------
[NFC] Reformat comment (#116003)
Commit: 40edb0a1af3041d289fcdec3dd4c9368f2686429
https://github.com/llvm/llvm-project/commit/40edb0a1af3041d289fcdec3dd4c9368f2686429
Author: sstipano <146831748+sstipano at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll
Log Message:
-----------
[AMDGPU] llvm.amdgcn.raw.buffer.load.format intrinsic supports v4i32 as return type. (#116067)
Commit: 5a2888ddbd7a601c8ad6bf7b5f13bf77318e4a4d
https://github.com/llvm/llvm-project/commit/5a2888ddbd7a601c8ad6bf7b5f13bf77318e4a4d
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
Log Message:
-----------
Revert "[CGData] Refactor Global Merge Functions (#115750)"
This reverts commit d3da78863c7021fa2447a168dc03ad791db69dc6.
Commit: 813f7c3820d00349fe23bfc6ba26159764541540
https://github.com/llvm/llvm-project/commit/813f7c3820d00349fe23bfc6ba26159764541540
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amxbf16transposeintrin.h
A clang/lib/Headers/amxcomplextransposeintrin.h
M clang/lib/Headers/amxfp16intrin.h
A clang/lib/Headers/amxfp16transposeintrin.h
M clang/lib/Headers/amxintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
M clang/test/CodeGen/X86/amx_transpose.c
M clang/test/CodeGen/X86/amx_transpose_api.c
M clang/test/CodeGen/X86/amx_transpose_errors.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/test/CodeGen/X86/amx_transpose_intrinsics.ll
M llvm/test/MC/Disassembler/X86/amx-transpose-att.txt
M llvm/test/MC/X86/amx-transpose-att.s
M llvm/test/MC/X86/amx-transpose-intel.s
Log Message:
-----------
[X86][AMX] Support AMX-TRANSPOSE, part 2 (#115660)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: e5ca3ede0697e8a9cccafa08f641ee33eaefe320
https://github.com/llvm/llvm-project/commit/e5ca3ede0697e8a9cccafa08f641ee33eaefe320
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 813f7c3820d0
Commit: 5be43db9b17e7cfc9e987f257221b0926551eb6e
https://github.com/llvm/llvm-project/commit/5be43db9b17e7cfc9e987f257221b0926551eb6e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp
M llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
M llvm/lib/Target/ARM/ARMHazardRecognizer.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.cpp
M llvm/lib/Target/ARM/ARMLatencyMutations.cpp
M llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
M llvm/lib/Target/ARM/MVEVPTBlockPass.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
M llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp
Log Message:
-----------
[ARM] Remove unused includes (NFC) (#116155)
Identified with misc-include-cleaner.
Commit: 3d3b0bc239cd9c6e8c65ae26bdcf1534515c4beb
https://github.com/llvm/llvm-project/commit/3d3b0bc239cd9c6e8c65ae26bdcf1534515c4beb
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/test/Shell/Minidump/Windows/find-module.test
Log Message:
-----------
[lldb] Disable find-module.test in case of a remote target (#94165)
The target arch is `i386-pc-windows` after loading the dump. It updates
to `i386-pc-windows-msvc` or `i386-pc-windows-gnu` in
lldb\source\Plugins\Process\minidump\ProcessMinidump.cpp, line 218
```
GetTarget().MergeArchitecture(module->GetArchitecture());
```
But in case of the remote target (`remote-linux`) and the `Windows host`
lldb executed the following commands at the beginning
```
platform select remote-linux
platform connect connect://<ip>:<port>
```
and then the target arch is `i386-pc-windows-msvc` immediately after
loading the dump.
GetTarget().MergeArchitecture(module->GetArchitecture()) does not update
it to `i386-pc-windows-gnu` when the module arch is
`i386-pc-windows-gnu`.
---------
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: 627b8f87e2c499c62df2e9bd6048f795fd085545
https://github.com/llvm/llvm-project/commit/627b8f87e2c499c62df2e9bd6048f795fd085545
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Revert "[Fuchsia][CMake] Enable new libc header gen" (#116174)
Reverts llvm/llvm-project#102371
Commit: 9a730d878e96e2a992f337acc94f897d47c920e3
https://github.com/llvm/llvm-project/commit/9a730d878e96e2a992f337acc94f897d47c920e3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-13 (Wed, 13 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Add IndexedMemProfReader::getMemProfCallerCalleePairs (#115807)
Undrifting the MemProf profile requires two sets of information:
- caller-callee pairs from the profile
- callee-callee pairs from the IR
This patch adds a function to do the former. The latter has been
addressed by extractCallsFromIR.
Unfortunately, the current MemProf format does not directly give us
the caller-callee pairs from the profile. "struct Frame" just tells
us where the call site is -- Caller GUID and line/column numbers; it
doesn't tell us what function a given Frame is calling. To extract
caller-callee pairs, we need to scan each call stack, look at two
adjacent Frames, and extract a caller-callee pair.
Conceptually, we would extract caller-callee pairs with:
for each MemProfRecord in the profile:
for each call stack in AllocSites:
extract caller-callee pairs from adjacent pairs of Frames
However, this is highly inefficient. Obtaining MemProfRecord involves
looking up the OnDiskHashTable, allocating several vectors on the
heap, and populating fields that are irrelevant to us, such as MIB and
CallSites.
This patch adds an efficient way of doing the above. Specifically, we
- go though all IndexedMemProfRecords,
- look at each linear call stack ID
- extract caller-callee pairs from each call stack
The extraction is done by a new class CallerCalleePairExtractor,
modified from LinearCallStackIdConverter, which reconstructs a call
stack from the radix tree array. For our purposes, we skip the
reconstruction and immediately populates the data structure for
caller-callee pairs.
The resulting caller-callee-pairs is of the type:
DenseMap<uint64_t, SmallVector<CallEdgeTy, 0>> CallerCalleePairs;
which can be passed directly to longestCommonSequence just like the
result of extractCallsFromIR.
Further performance optimizations are possible for the new functions
in this patch. I'll address those in follow-up patches.
Commit: 9e77f59005917e32f09136fa43018f471267f5bd
https://github.com/llvm/llvm-project/commit/9e77f59005917e32f09136fa43018f471267f5bd
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction-cost.ll
Log Message:
-----------
[LV] Account for vp_merge in out of loop EVL reductions in legacy cost model (#115903)
In #101641, support for out of loop reductions with EVL tail folding was
added by transforming selects to vp_merges in
transformRecipestoEVLRecipes.
Whilst the select was previously free, the vp_merge wasn't and incurs a
cost on RISC-V with the VPlan cost model. But this diverged from the
legacy cost model and caused the "VPlan cost model and legacy cost model
disagreed" assertion to trigger when building 502.gcc_r from SPEC CPU
2017.
Neither the select nor vp_merge recipes from the VPlan exist in the
underlying instructions, so I thought it would make the most sense to
fix this by adding the cost to the underlying phi instruction in
getInstructionCost.
It's worth noting that on RISC-V this vp_merge won't actually generate
any instructions because the mask is all true, and will be folded away.
So we should update the cost model at some point to reflect that.
Commit: 050e2d325a09a27418898e45fd064d3f62e825e7
https://github.com/llvm/llvm-project/commit/050e2d325a09a27418898e45fd064d3f62e825e7
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
Log Message:
-----------
[LV] Remove assertions in IV overflow check (#115705)
In #111310 an assert was added that for the IV overflow check used with
tail folding, the overflow check is never known.
However when applying the loop guards, it looks like it's possible that
we might actually know the IV won't overflow: this occurs in
500.perlbench_r from SPEC CPU 2017 and triggers the assertion:
Assertion failed: (!isIndvarOverflowCheckKnownFalse(Cost, VF * UF) &&
!SE.isKnownPredicate(CmpInst::getInversePredicate(ICmpInst::ICMP_ULT),
TC2OverflowSCEV, SE.getSCEV(Step)) && "unexpectedly proved overflow
check to be known"), function emitIterationCountCheck, file
LoopVectorize.cpp, line 2501.
There is a discrepancy between `isIndvarOverflowCheckKnownFalse` and the
ICMP_ULT check, because the former uses `getSmallConstantMaxTripCount`
which only takes into trip counts that fit into 32 bits. There doesn't
seem to be an easy way to make the assertion aware of this, so this PR
just removes it for now.
There are two potential follow up things from this PR:
1. We miss calculating the max trip count in `@trip_count_max_1024`, it
looks like we might need to apply loop guards somewhere in
`ScalarEvolution::computeExitLimitFromICmp`
2. In `@overflow_at_0`, if `%tc == 0` then we the overflow check will
always return false, even though it will overflow
Fixes https://github.com/llvm/llvm-project/issues/115755
Commit: 5cfa8baef33636827e5aa8dd76888c724433b53e
https://github.com/llvm/llvm-project/commit/5cfa8baef33636827e5aa8dd76888c724433b53e
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
Log Message:
-----------
[LoongArch] Fix a typo in LoongArchCCAssignFn. NFC (#116178)
Commit: 2e6deb1dd3a4422807633ba08773e8d786e43d4c
https://github.com/llvm/llvm-project/commit/2e6deb1dd3a4422807633ba08773e8d786e43d4c
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/LoopCacheAnalysis.h
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
A llvm/test/Analysis/LoopCacheAnalysis/interchange-refcost-overflow.ll
Log Message:
-----------
[LoopInterchange] Fix overflow in cost calculation (#111807)
If the iteration count is really large, e.g. UINT_MAX, then the cost
calculation can overflows and trigger an assert. So saturate the cost to
INT_MAX if this is the case by using InstructionCost as a type which
already supports this kind of overflow handling.
This fixes #104761
Commit: d119d43e92333966125755353f4e6227dd2c70da
https://github.com/llvm/llvm-project/commit/d119d43e92333966125755353f4e6227dd2c70da
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction-cost.ll
Log Message:
-----------
[LV] Add missing REQUIRES: asserts to test
Commit: debfd7b0b44d8eb0bfe9f69933251a67f752f0b5
https://github.com/llvm/llvm-project/commit/debfd7b0b44d8eb0bfe9f69933251a67f752f0b5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/ARM32/vararg-arm32.ll
M llvm/test/Instrumentation/MemorySanitizer/LoongArch/vararg-loongarch64.ll
M llvm/test/Instrumentation/MemorySanitizer/LoongArch/vararg.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mips.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mipsel.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/kernel-ppcle.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppc.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppcle.ll
M llvm/test/Instrumentation/MemorySanitizer/RISCV32/vararg-riscv32.ll
Log Message:
-----------
[msan] Remove unnecacary zero increment (#116185)
Commit: e52238b59f250aef5dc0925866d0308305a19dbf
https://github.com/llvm/llvm-project/commit/e52238b59f250aef5dc0925866d0308305a19dbf
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
A llvm/test/CodeGen/AArch64/intrinsic-vector-match-sve2.ll
Log Message:
-----------
[AArch64] Add @llvm.experimental.vector.match (#101974)
This patch introduces an experimental intrinsic for matching the
elements of one vector against the elements of another.
For AArch64 targets that support SVE2, the intrinsic lowers to a MATCH
instruction for supported fixed and scalar vector types.
Commit: c1c68baf7e0fcaef1f4ee86b527210f1391b55f6
https://github.com/llvm/llvm-project/commit/c1c68baf7e0fcaef1f4ee86b527210f1391b55f6
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
M llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
M llvm/test/CodeGen/AArch64/misched-bundle.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/preserve.ll
M llvm/test/CodeGen/AArch64/strpre-str-merge.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryComm-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryCommWithRev-merging.mir
A llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/CMakeLists.txt
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)
This is a step towards enabling subreg liveness tracking for AArch64,
which requires that registers are fully covered by their subregisters,
as covered here #109797.
There are several changes in this patch:
* AArch64RegisterInfo.td and tests: Define the high bits like B0_HI,
H0_HI, S0_HI, D0_HI, Q0_HI. Because the bits must be defined by some
register class, this added a register class which meant that we had to
update 'magic numbers' in several tests.
The use of ComposedSubRegIndex helped 'compress' the number of bits
required for the lanemask. The correctness of the masks is tested by an
explicit unit tests.
* LoadStoreOptimizer: previously 'HasDisjunctSubRegs' was only true for
register tuples, but with this change to describe the high bits, a
register like 'D0' will also have 'HasDisjunctSubRegs' set to true
(because it's fullly covered by S0 and S0_HI). The fix here is to
explicitly test if the register class is one of the known D/Q/Z tuples.
Commit: 2aa6cedfa81dafa0cd909bab64979310f9ec5e3d
https://github.com/llvm/llvm-project/commit/2aa6cedfa81dafa0cd909bab64979310f9ec5e3d
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Clarify amdgpu.cs.chain + init whole wave. NFC (#115452)
Add some docs clarifying how inactive lanes are handled in the
amdgpu_cs_chain calling convention when the llvm.amdgcn.init.whole.wave
intrinsic is used.
Commit: cb64c3c573d7239036d46addb3ea09f954ca3a55
https://github.com/llvm/llvm-project/commit/cb64c3c573d7239036d46addb3ea09f954ca3a55
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
A llvm/test/Transforms/LoopInterchange/gh54176-scalar-deps.ll
Log Message:
-----------
[LoopInterchange] Precommit tests for scalar dependencies. NFC. (#115900)
We are miscompiling and incorrectly interchanging loops with scalar
dependencies that are live-out and conditionally set. This precommits
some tests demonstrating this. This is based on the tests in
https://reviews.llvm.org/D87879 by `mdchen`.
Commit: 78f7ca0980f3369da19e3cbb01890fe718307ac2
https://github.com/llvm/llvm-project/commit/78f7ca0980f3369da19e3cbb01890fe718307ac2
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll
Log Message:
-----------
[InstCombine] Use KnownBits predicate helpers (#115874)
Inside foldICmpUsingKnownBits(), instead of rolling our own logic based
on min/max values, make use of ICmpInst::compare() working on KnownBits.
This gives better results for the equality predicates. In practice, the
improvement is only for pointers, because isKnownNonEqual() handles the
non-pointer case.
I've adjusted some tests to prevent the new fold from triggering, to
retain their original intent of testing constant expressions.
Commit: d97f17a95982bab49ecdfb9b45ef3c7d7e3d143e
https://github.com/llvm/llvm-project/commit/d97f17a95982bab49ecdfb9b45ef3c7d7e3d143e
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
A llvm/test/MC/ARM/lower-upper-errors-2.s
A llvm/test/MC/ARM/lower-upper-errors.s
Log Message:
-----------
[MC][ARM] Fix crash when assembling Thumb 'movs r0,#foo'. (#115026)
If the assembler sees this instruction, understanding `foo` to be an
external symbol, there's no relocation it can write that will put the
whole value of `foo` into the 8-bit immediate field of the 16-bit Thumb
add instruction. So it should report an error message pointing at the
source line, and in LLVM 18, it did exactly that. But now the error is
not reported, due to an indexing error in the operand list in
`validateInstruction`, and instead the code continues to attempt
assembly, ending up aborting at the `llvm_unreachable` at the end of
`getHiLoImmOpValue`.
In this commit I've fixed the index in the `ARM::tMOVi8` case of
`validateInstruction`, and also the one for `tADDi8` which must cope
with either the 2- or 3-operand form in the input assembly source. But
also, while writing the test, I found that if you assemble for Armv7-M
instead of Armv6-M, the instruction has opcode `t2ADDri` when it goes
through `validateInstruction`, and only turns into `tMOVi8` later in
`processInstruction`. Then it's too late for `validateInstruction` to
report that error. So I've adjusted `processInstruction` to spot that
case and inhibit the conversion.
Commit: b18bb240a8ea4d698deaf95a47df838d1352c504
https://github.com/llvm/llvm-project/commit/b18bb240a8ea4d698deaf95a47df838d1352c504
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port c1c68baf7e0f
Commit: caa9a827978536ea0047c75b32a8fedd6a1dcacf
https://github.com/llvm/llvm-project/commit/caa9a827978536ea0047c75b32a8fedd6a1dcacf
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/debugloc-optimize-vfuf-term.ll
Log Message:
-----------
[DebugInfo][LoopVectorizer] Avoid dropping !dbg in optimizeForVFAndUF (#114243)
Prior to this patch, optimizeForVFAndUF may optimize the conditional
branch for a VPBasicblock to have a constant condition, but
unnecessarily drops the DILocation attachment when it does so; this
patch changes it to preserve the DILocation.
Commit: ec1e0c5ecd53e415b23d5bd40b8e44e3ef4b4d92
https://github.com/llvm/llvm-project/commit/ec1e0c5ecd53e415b23d5bd40b8e44e3ef4b4d92
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
A flang/test/Lower/OpenMP/Todo/omp-declare-mapper.f90
A flang/test/Parser/OpenMP/declare-mapper-unparse.f90
A flang/test/Semantics/OpenMP/declare-mapper-symbols.f90
A flang/test/Semantics/OpenMP/declare-mapper01.f90
A flang/test/Semantics/OpenMP/declare-mapper02.f90
A flang/test/Semantics/OpenMP/declare-mapper03.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Flang][OMP]Add support for DECLARE MAPPER parsing and semantics (#115160)
Will hit a TODO in the lowering, which there are tests added to check
for this happening.
Commit: d9e2fb70d0b72b398fef3106bab0605b5b3e6761
https://github.com/llvm/llvm-project/commit/d9e2fb70d0b72b398fef3106bab0605b5b3e6761
Author: k-kashapov <52855633+k-kashapov at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/ARM32/vararg-arm32.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mips.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mipsel.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/kernel-ppcle.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppc.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppcle.ll
M llvm/test/Instrumentation/MemorySanitizer/RISCV32/vararg-riscv32.ll
A llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
R llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-x86.ll
A llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
R llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/i386/msan_i386_bts_asm.ll
A llvm/test/Instrumentation/MemorySanitizer/i386/msan_i386intrinsics.ll
R llvm/test/Instrumentation/MemorySanitizer/i386/msan_x86_bts_asm.ll
R llvm/test/Instrumentation/MemorySanitizer/i386/msan_x86intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/i386/sse-intrinsics-i386.ll
R llvm/test/Instrumentation/MemorySanitizer/i386/sse-intrinsics-x86.ll
A llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-i386.ll
R llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-x86.ll
A llvm/test/Instrumentation/MemorySanitizer/i386/sse41-intrinsics-i386.ll
R llvm/test/Instrumentation/MemorySanitizer/i386/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg-too-large.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg_call.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg_shadow.ll
Log Message:
-----------
[msan] Add 32-bit platforms support (#109284)
References https://github.com/llvm/llvm-project/issues/103057
Added `VAArgHelper` functions for platforms: ARM32, i386, RISC-V,
PowerPC32, MIPS32.
ARM, RISCV and MIPS share similar conventions regarding va args.
Therefore `VAArgGenericHelper` was introduced to avoid code duplication.
---------
Co-authored-by: Kamil Kashapov <kashapov at ispras.ru>
Co-authored-by: Vitaly Buka <vitalybuka at google.com>
Commit: 1ef4d3b6bf9879a21b15e62e7d4323973914feb0
https://github.com/llvm/llvm-project/commit/1ef4d3b6bf9879a21b15e62e7d4323973914feb0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] canonicalizeBitSelect/combineLogicBlendIntoPBLENDV - avoid SDLoc duplication. NFC.
Reuse caller's equivalent SDLoc
Commit: d686e5cdafab7c6d8fb9d27ec428cf3b9d145c56
https://github.com/llvm/llvm-project/commit/d686e5cdafab7c6d8fb9d27ec428cf3b9d145c56
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
A llvm/test/Transforms/InstCombine/debugloc-bswap.ll
Log Message:
-----------
[DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (#114231)
Currently when InstCombineAndOrXor recognizes a bswap idiom and replaces
it with an intrinsic and other instructions, only the last instruction
gets the DebugLoc of the replaced instruction set to it. This patch
applies the DebugLoc to all the generated instructions, to maintain some
degree of attribution.
Commit: 6721bcfd1b6494e9643a04a13144f282979544ad
https://github.com/llvm/llvm-project/commit/6721bcfd1b6494e9643a04a13144f282979544ad
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libcxx/include/__memory/uninitialized_algorithms.h
Log Message:
-----------
[libc++] Accept iterators instead of raw pointers in __uninitialized_allocator_relocate (#114552)
This generalizes the algorithm a bit. Unfortunately, we can't make
the call sites cleaner inside std::vector because the arguments being
passed can all be fancy pointers, which may not be contiguous iterators.
Commit: b468ed494acde4d1cc496a436ab9109660db5b80
https://github.com/llvm/llvm-project/commit/b468ed494acde4d1cc496a436ab9109660db5b80
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
A llvm/test/DebugInfo/MIR/X86/dbg-prologue-backup-loc2.mir
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
A llvm/test/DebugInfo/X86/dbg-prolog-end-backup-loc.ll
M llvm/test/DebugInfo/X86/dbg-prolog-end.ll
M llvm/test/DebugInfo/X86/empty-line-info.ll
M llvm/test/DebugInfo/X86/loop-align-debug.ll
Log Message:
-----------
Reapply ccddb6ffad1, "Emit a worst-case prologue_end"
In 39b2979a4 Pavel has kindly refined the implementation of a test in such
a way that it doesn't trip up over this patch -- the test wishes to
stimulate LLDBs presentation of line0 locations, rather than wanting to
always step on line-zero on entry to artificial_location.c. As that's what
was tripping up this change, reapply.
Original commit message follows.
[DWARF] Emit a worst-case prologue_end flag for pathological inputs (#107849)
prologue_end usually indicates where the end of the function-initialization
lies, and is where debuggers usually choose to put the initial breakpoint
for a function. Our current algorithm piggy-backs it on the first available
source-location: which doesn't necessarily have anything to do with the
start of the function.
To avoid this in heavily-optimised code that lacks many useful source
locations, pick a worst-case "if all else fails" prologue_end location, of
the first instruction that appears to do meaningful computation. It'll be
given the function-scope line number, which should run-on from the start of
the function anyway. This means if your code is completely inverted by the
optimiser, you can at least put a breakpoint at the _start_ like you
expect, even if it's difficult to then step through.
This patch also attempts to preserve some good behaviour we have without
optimisations -- at O0, if the prologue immediately falls into a loop body
without any computation happening, then prologue_end lands at the start of
that loop. This is desirable; but does mean we need to do more work to
detect and support those situations.
Commit: 9b6b9d39030f92ea20d8f38ef37305e99cfc6d60
https://github.com/llvm/llvm-project/commit/9b6b9d39030f92ea20d8f38ef37305e99cfc6d60
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
Log Message:
-----------
Default initialize a pointer in CodeExtractor.
This fixes msan failure after f6795e6b4f619cbecc59a92f7e5fad7ca90ece54
Commit: dd9f1a572b7c98b6761281bfa2d6bb351cbedb61
https://github.com/llvm/llvm-project/commit/dd9f1a572b7c98b6761281bfa2d6bb351cbedb61
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/cmp-alloca-offsets.ll
Log Message:
-----------
[InstSimplify] Correctly handle comparison with zero-size allocs (#115728)
InstSimplify currently folds alloc1 == alloc2 to false, even if one of
them is a zero-size allocation. A zero-size allocation may have the same
address as another allocation.
This also disables the fold for the case where we're comparing a
zero-size alloc with the middle of another allocation. It's possible
that this case is legal to fold depending on our precise zero-size
allocation semantics, but LangRef currently doesn't specify this either
way, so we shouldn't make assumptions here.
Commit: 905256ad2ff136ec15e4c1a822412c87881876b8
https://github.com/llvm/llvm-project/commit/905256ad2ff136ec15e4c1a822412c87881876b8
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/test/Shell/Minidump/Windows/find-module.test
Log Message:
-----------
[lldb] Fixed find-module.test in case of a remote target (#116198)
Changing from UNSUPPOERTED to XFAIL in #94165 break x86 linux host /
Aarch64 linux target build
https://lab.llvm.org/buildbot/#/builders/195/builds/1047
Commit: 748b028540de67000345dfb3454ccd011ace4bb5
https://github.com/llvm/llvm-project/commit/748b028540de67000345dfb3454ccd011ace4bb5
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c
M clang/test/Driver/aarch64-implied-sme-features.c
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll
M llvm/test/MC/AArch64/SVE2/aesd.s
M llvm/test/MC/AArch64/SVE2/aese.s
M llvm/test/MC/AArch64/SVE2/aesimc.s
M llvm/test/MC/AArch64/SVE2/aesmc.s
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu.s
M llvm/test/MC/AArch64/SVE2/pmullb-128.s
M llvm/test/MC/AArch64/SVE2/pmullt-128.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Make +sve2-aes an alias of +sve2+sve-aes (#116026)
This patch essentially re-lands
https://github.com/llvm/llvm-project/pull/114293 with the following
fixups
- `nosve2-aes` should disable the backend feature `FeatureSVEAES` such
that the set of existing instructions that this removes is unchanged.
- FMV dependencies now use the autogenerated `ExtensionDepencies`
structure (since https://github.com/llvm/llvm-project/pull/113281) so we
do not require the change to `AArch64FMV.td`.
Commit: 980316ec85381f65c369cb650f25881e470857b7
https://github.com/llvm/llvm-project/commit/980316ec85381f65c369cb650f25881e470857b7
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/unittests/Support/YAMLIOTest.cpp
Log Message:
-----------
[YAML] Recommit "Make `std::array` available (#116059)" with a fix.
`std::array` will be handled like `MutableArrayRef`;
- Extending elements is not acceptable.
- For applying fewer sequence, trailing elements will be initialized by
default.
Not like;
- `std::array` is not the reference but holds values. Supposing to hold
small count of elements.
Changes since llvmorg-20-init-12117-g941f704f0892:
- Use `size_t` for `N`, instead of `unsigned`.
- include <array>
Commit: 33a9c2642390dfe32cab82e0571712b5b2410c35
https://github.com/llvm/llvm-project/commit/33a9c2642390dfe32cab82e0571712b5b2410c35
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
A mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
Log Message:
-----------
[mlir][tensor] Add e2e test for tensor.pack with dynamic tile sizes (#115698)
Adds an end-to-end test for `tensor.pack` with dynamic inner tile sizes.
While relatively simple (e.g., no vectorization), this example required
a few non-trivial fixes in handling `tensor.pack`:
* #114315, #114559, #113108.
The end goal for this test is to incrementally increase its complexity
and to work towards scalable tile sizes.
Commit: 8ff2da782d676edddc19d856a853c1ebab999fc2
https://github.com/llvm/llvm-project/commit/8ff2da782d676edddc19d856a853c1ebab999fc2
Author: Abdul Raheem <55028856+abdulraheembeigh at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
Log Message:
-----------
[MLIR][NFC] Fix comment formatting and use 3 slashes (#116201)
NFC making a consistent indentation.
Corrected comment syntax. Changed // to ///
and nit grammatical change.
Commit: 576865a50e6ccb74196c9491fa79575d6d7f0b0b
https://github.com/llvm/llvm-project/commit/576865a50e6ccb74196c9491fa79575d6d7f0b0b
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
Fix up MCPlusBuilder.cpp to account for W0_HI on AArch64
Landing #114827 broke these tests, because they did not account
for the new artificial registers.
Commit: e58949632e91477af58d983f3b66369e6a2c8233
https://github.com/llvm/llvm-project/commit/e58949632e91477af58d983f3b66369e6a2c8233
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/utils/libcxx/test/format.py
Log Message:
-----------
[libc++] Define all CMake configuration features in the same location (#115361)
This moves the configuration of the CMake features to turn off RTTI,
exceptions and friends to the beginning of the CMake file, where we
configure other optional parts of the library.
This fixes an important bug where we would disable the benchmarks
because these options were not defined yet, leading to the build
thinking they were defined to OFF.
Commit: 8fde648aad1affa4e8680a9fd14a0816d73e5774
https://github.com/llvm/llvm-project/commit/8fde648aad1affa4e8680a9fd14a0816d73e5774
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libcxx/include/forward_list
M libcxx/include/list
Log Message:
-----------
[libc++] Remove obsolete accessors in std::list and std::forward_list (#115748)
We don't need these accessors anymore now that we stopped using
compressed-pair.
Commit: 862f42eedf21cc28f4bc692ab846c87b28b5960b
https://github.com/llvm/llvm-project/commit/862f42eedf21cc28f4bc692ab846c87b28b5960b
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/ls64-inline-asm.ll
Log Message:
-----------
[TargetLowering] Use Correct VT for Multi-out Asm (#116024)
This was overlooked in 7d940432c46be83b8fcb5dbefee439585fa820cd - when
inline assembly has multiple outputs, they are returned as members of a
struct, and the `getAsmOperandType` needs to be called for each member
of struct. The difference between this and the single-output case is
that in the latter, there isn't a struct wrapping the outputs.
I noticed this when trying to use the same mechanism in the RISC-V
backend.
Committing two tests:
- One that shows a crash before this change, which is fixed by this
change.
- One (commented out) that shows a different crash with tied
inputs/outputs. This is commented as it is not fixed by this change and
needs more work in target-independent inline asm handling code.
Commit: 402efa733c64bd20b54dbc5b7057868cbb938d07
https://github.com/llvm/llvm-project/commit/402efa733c64bd20b54dbc5b7057868cbb938d07
Author: Markus Böck <markus.boeck02 at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
Log Message:
-----------
[mlir][LLVM] Remove redundant `custom<LLVMOpAttrs>` (#116207)
This custom printer was previously used to avoid printing fast math
flags if they have default values.
This is redundant however, as `attr-dict` will already elide attributes
whose default values are set, making it a noop nowadays.
Commit: 5c3befb91cd774161e5d700cf2c351d42d29927c
https://github.com/llvm/llvm-project/commit/5c3befb91cd774161e5d700cf2c351d42d29927c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libcxx/include/__memory/uninitialized_algorithms.h
Log Message:
-----------
[libc++] Add forgotten call to std::__to_address in __uninitialized_allocator_relocate
Commit: 965f3a95b94a6787736f739018ce3a98e3880e84
https://github.com/llvm/llvm-project/commit/965f3a95b94a6787736f739018ce3a98e3880e84
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter_iter.pass.cpp
Log Message:
-----------
[libc++][NFC] Run clang-format on vector::erase test
Since I am about to make significant changes to this test, run clang-format
on it before to avoid obscuring the review.
Commit: 43bef75fd65083349ec888fadfb99987f7804d18
https://github.com/llvm/llvm-project/commit/43bef75fd65083349ec888fadfb99987f7804d18
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[NFC][CodeGen] Clang format MachineSink.cpp (#114027)
Preparing to port this pass to new pass manager.
Commit: b96c24b8613036749e7ba28f0c7a837115ae9f91
https://github.com/llvm/llvm-project/commit/b96c24b8613036749e7ba28f0c7a837115ae9f91
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
Log Message:
-----------
[analyzer] Allow copying empty structs (1/4) (#115916)
We represent copies of structs by LazyCompoundVals, that is basically a
snapshot of the Store and Region that your copy would refer to.
This snapshot is actually not taken for empty structs (structs that have
no non-static data members), because the users won't be able to access
any fields anyways, so why bother.
However, when it comes to taint propagation, it would be nice if
instances of empty structs would behave similar to non-empty structs.
For this, we need an identity for which taint can bind, so Unknown -
that was used in the past wouldn't work.
Consequently, copying the value of an empty struct should behave the
same way as a non-empty struct, thus be represented by a
LazyCompoundVal.
Split from #114835
Commit: 251958f3570730f58d1337ac6d00f03ee6a839fe
https://github.com/llvm/llvm-project/commit/251958f3570730f58d1337ac6d00f03ee6a839fe
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Log Message:
-----------
[DebugInfo] Don't pick prologue_end if there are no instructions
Add a filter to avoid picking prologue_end when a function is empty (it may
have blocks but no instructions). This saves us from pushing more
validity-checking into findPrologueEndLoc.
Commit: 9f06129e55a09ea6442b50a541a5ac55577c6a22
https://github.com/llvm/llvm-project/commit/9f06129e55a09ea6442b50a541a5ac55577c6a22
Author: Malay Sanghi <malay.sanghi at intel.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
A .icslock
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/immintrin.h
A clang/lib/Headers/movrsintrin.h
A clang/test/CodeGen/X86/movrs-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86DiscriminateMemOps.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
A llvm/test/CodeGen/X86/movrs-builtins.ll
A llvm/test/CodeGen/X86/movrs-prefetch-builtins.ll
A llvm/test/MC/Disassembler/X86/movrs.txt
A llvm/test/MC/Disassembler/X86/prefetchrst2-32.txt
A llvm/test/MC/Disassembler/X86/prefetchrst2-64.txt
A llvm/test/MC/X86/movrs-att-64.s
A llvm/test/MC/X86/movrs-intel-64.s
A llvm/test/MC/X86/prefetchrst2-att-32.s
A llvm/test/MC/X86/prefetchrst2-att-64.s
A llvm/test/MC/X86/prefetchrst2-intel-32.s
A llvm/test/MC/X86/prefetchrst2-intel-64.s
Log Message:
-----------
[X86][MOVRS] Support MOVRS (#116181)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 3f40ad7ba83ecf6f374039191ae7ceeb1f5fe831
https://github.com/llvm/llvm-project/commit/3f40ad7ba83ecf6f374039191ae7ceeb1f5fe831
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/TargetInfo.h
M clang/test/CodeGen/attr-ifunc.c
A clang/test/CodeGen/ifunc-win.c
M clang/test/CodeGen/ifunc.c
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
Add ifunc support for Windows on AArch64. (#111962)
On Windows there is no platform support for ifunc but we could lower
them to global function pointers.
This also enables FMV for Windows with Clang and Compiler-rt.
Depends on #111961
Commit: 8781a4320c9b0ef00d1907341cf347759b9a822d
https://github.com/llvm/llvm-project/commit/8781a4320c9b0ef00d1907341cf347759b9a822d
Author: David Truby <david.truby at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/iterator_range.h
Log Message:
-----------
[NFC] Check for defined(__GNUC__) before use (#116076)
This silences some spurious warnings on Windows builds with clang-cl
that `__GNUC__` is not defined if `-Wundef` is passed, which is the default
in MLIR.
These warnings make Windows builds of LLVM very noisy when MLIR is
included.
Commit: 9685681aa47561c9941bb70aa84a09c55c7db824
https://github.com/llvm/llvm-project/commit/9685681aa47561c9941bb70aa84a09c55c7db824
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Supply libraries and CRT objects to the linker (#115497)
Until now, these have been hardcoded as a downstream patches in lld. Add
them to the driver so that the private patches can be removed.
PS5 only. On PS4, the equivalent hardcoded configuration will remain in
the proprietary linker.
SIE tracker: TOOLCHAIN-16704
Commit: 9e1faa834173f57344a12b1a0a2f90b8e903c7bd
https://github.com/llvm/llvm-project/commit/9e1faa834173f57344a12b1a0a2f90b8e903c7bd
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
R .icslock
Log Message:
-----------
[NFC] Delete stray file introduced by #116181 (#116235)
Commit: 0192ae5ce047424caf4ff51c8ce813a8cdf298ed
https://github.com/llvm/llvm-project/commit/0192ae5ce047424caf4ff51c8ce813a8cdf298ed
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 9f06129e55a0
Commit: 562d235cbc0dfc2e54d268df5db118c461b10d97
https://github.com/llvm/llvm-project/commit/562d235cbc0dfc2e54d268df5db118c461b10d97
Author: Joe Nash <joseph.nash at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
Log Message:
-----------
[AMDGPU][True16][MC] Copy True16Predicate from pseudo to real in VOP1 (#116098)
This is a necessary change for consistency and an upcoming patch.
Cleanup an affected extra whitespace and wrong CHECK prefix in
v_swap_b16.
Commit: 8ac46d6b4f8dff07730c4c0dff20d969efcf14f2
https://github.com/llvm/llvm-project/commit/8ac46d6b4f8dff07730c4c0dff20d969efcf14f2
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/iaddcarry-builtin.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
A llvm/test/CodeGen/SPIRV/isubborrow-builtin.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types-vs-calllowering-unwrapped.ll
A llvm/test/CodeGen/SPIRV/pointers/phi-valid-operand-types-vs-calllowering.ll
Log Message:
-----------
[SPIR-V] Implement builtins for OpIAddCarry/OpISubBorrow and improve/fix type inference (#115192)
This PR is to solve several intertwined issues with type inference while
adding support for builtins for OpIAddCarry and OpISubBorrow:
* OpIAddCarry and OpISubBorrow generation in a way of supporting SPIR-V
friendly builtins `__spirv_...` -- introduces a new element to account
for, namely, `ptr sret (%struct) %0` argument that is a place to put a
result of the instruction;
* fix early definition of SPIR-V types during call lowering -- namely,
the goal of the PR is to ensure that correct types are applied to
virtual registers which were used as arguments in call lowering and so
caused early definition of SPIR-V types; reproducers are attached as a
new test cases;
* improve parsing of builtin names (e.g., understand a name of a kind
`"anon<int, int> __spirv_IAddCarry<int, int>(int, int)"` that was
incorrectly parsed as `anon` before the PR);
* improve type inference and fix access to erased from parent after
visit instructions -- before the PR visiting of instructions in
emitintrinsics pass replaced old alloca's, bitcast's, etc. instructions
with a newly generated internal SPIR-V intrinsics and after erasing old
instructions there were still references to them in a postprocessing
working list, while records for newly deduced pointee types were lost;
this PR fixes the issue by adding as consistent wrt. internal data
structures action `SPIRVEmitIntrinsics::replaceAllUsesWith()` that fixes
above mentioned problems;
* LLVM IR add/sub instructions result in logical SPIR-V instructions
when applied to bool type;
* fix validation of pointer types for frexp and lgamma_r,
* fix hardcoded reference to AS0 as a Function storage class in
lib/Target/SPIRV/SPIRVBuiltins.cpp -- now it's
`storageClassToAddressSpace(SPIRV::StorageClass::Function)`,
* re-use the same OpTypeStruct for two identical references to struct's
in arithmetic with overflow instructions.
Commit: b7f7e6454877846d2ee4be8cae821b2c32501b1e
https://github.com/llvm/llvm-project/commit/b7f7e6454877846d2ee4be8cae821b2c32501b1e
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/combined-construct-default-ast.cpp
A clang/test/SemaOpenACC/combined-construct-default-clause.c
A clang/test/SemaOpenACC/combined-construct-default-clause.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
Log Message:
-----------
[OpenACC] Implement 'default' clause for Combined Constructs
This clause takes one of two fixed values, and can apply to all three of
the combined constructs. Tests/etc are all exactly like the compute
constructs, so committing them all here.
Commit: d84d0caf28902843e0aae7ac435daed9aa04e3e2
https://github.com/llvm/llvm-project/commit/d84d0caf28902843e0aae7ac435daed9aa04e3e2
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M flang/test/Transforms/omp-map-info-finalization.fir
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-data-use-dev-ordering.mlir
M mlir/test/Target/LLVMIR/omptarget-llvm.mlir
A offload/test/Inputs/target-use-dev-ptr.c
A offload/test/offloading/fortran/target-use-dev-ptr.f90
Log Message:
-----------
[Flang][OpenMP] Update MapInfoFinalization to use BlockArgs Interface and modify use_device_ptr/addr to be order independent (#113919)
This patch primarily updates the MapInfoFinalization pass to utilise the
BlockArgument interface. It also shuffles newly added arguments the
MapInfoFinalization passes to the end of the BlockArg/Relevant MapInfo
lists, instead of one prior to the owning descriptor type.
During this it was noted that the use_device_ptr/addr handling of target
data was a little bit too order dependent so I've attempted to make it
less so, as we cannot depend on argument ordering to be the same as
Fortran for any future frontends.
Commit: 4cdfa2a2c80d59db10d1a17e4ff0ec9902952759
https://github.com/llvm/llvm-project/commit/4cdfa2a2c80d59db10d1a17e4ff0ec9902952759
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/test/SemaOpenACC/compute-construct-firstprivate-clause.cpp
Log Message:
-----------
[OpenACC] Fix test that didn't actually test the clause it claimed to
Apparently a copy/paste issue, we were testing private instead of
firstprivate for oen of the tests.
Commit: 4610e5c78647983f79d1bd5264afff254774e13e
https://github.com/llvm/llvm-project/commit/4610e5c78647983f79d1bd5264afff254774e13e
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
M clang/test/Analysis/store-dump-orders.cpp
Log Message:
-----------
[analyzer] Don't copy field-by-field conjured LazyCompoundVals (2/4) (#115917)
Split from #114835
Commit: f71cb9dbb739bb58ce7e52e49fe384ff2ff11687
https://github.com/llvm/llvm-project/commit/f71cb9dbb739bb58ce7e52e49fe384ff2ff11687
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
M llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
M llvm/lib/Target/PowerPC/PPCCCState.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
M llvm/lib/Target/PowerPC/PPCCTRLoopsVerify.cpp
M llvm/lib/Target/PowerPC/PPCCallingConv.cpp
M llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
M llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCVSXCopy.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
Log Message:
-----------
[PowerPC] Remove unused includes (NFC) (#116163)
Identified with misc-include-cleaner.
Commit: a8a1e9033a902d961ad050a139b97ac0319b9e25
https://github.com/llvm/llvm-project/commit/a8a1e9033a902d961ad050a139b97ac0319b9e25
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
Log Message:
-----------
[TableGen] Remove unused includes (NFC) (#116168)
Identified with misc-include-cleaner.
Commit: 6fb7cdff3d90c565b87a253ff7dbd36319879111
https://github.com/llvm/llvm-project/commit/6fb7cdff3d90c565b87a253ff7dbd36319879111
Author: Daniel Zabawa <daniel.zabawa at intel.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
A llvm/test/CodeGen/X86/pr114265.mir
Log Message:
-----------
[X86] Recognize POP/ADD/SUB modifying rsp in getSPAdjust. (#114265)
This code assumed only PUSHes would appear in call sequences. However,
if calls require frame-pointer/base-pointer spills, only the PUSH
operations inserted by spillFPBP will be recognized, and the adjustments
to frame object offsets in prologepilog will be incorrect.
This change correctly reports the SP adjustment for POP and ADD/SUB to
rsp, and an assertion for unrecognized instructions that modify rsp.
Commit: 76bb9633a77965cbfce9c3a8985d9a59cf420877
https://github.com/llvm/llvm-project/commit/76bb9633a77965cbfce9c3a8985d9a59cf420877
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaType.cpp
M clang/test/Frontend/noderef.cpp
Log Message:
-----------
No longer assert when using noderef on an _Atomic type (#116237)
When filling out the type locations for a declarator, we handled atomic
types and we handled noderef types, but we didn't handle atomic noderef
types.
Fixes #116124
Commit: 44b33f5d3b7ec1f29235acee34938d52bb987619
https://github.com/llvm/llvm-project/commit/44b33f5d3b7ec1f29235acee34938d52bb987619
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/test/CodeGen/ifunc-win.c
Log Message:
-----------
Filter test based on backend support. (#116244)
ifunc support for Windows on AArch64 needs AArch64 support in the
backend so restrict the test to it's availability.
Commit: 03730cdd3d10c5270fe436777a37d50b0838a3bf
https://github.com/llvm/llvm-project/commit/03730cdd3d10c5270fe436777a37d50b0838a3bf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/amdgpu-openmp-system-arch-fail.c
M clang/test/Driver/nvptx-cuda-system-arch.c
M clang/test/Driver/openmp-system-arch.c
Log Message:
-----------
clang: Remove requires system-linux from some driver tests (#111976)
Works for me on macos.
Commit: 3a20a5f5108dc43f8a831013ef6a69fd484cf4d4
https://github.com/llvm/llvm-project/commit/3a20a5f5108dc43f8a831013ef6a69fd484cf4d4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M offload/cmake/caches/Offload.cmake
Log Message:
-----------
[Offload] Move compiler-rt to runtimes in cache
Commit: 8ed3b05582e504c545fbadcc384f474220e42d3f
https://github.com/llvm/llvm-project/commit/8ed3b05582e504c545fbadcc384f474220e42d3f
Author: Joe Nash <joseph.nash at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
Log Message:
-----------
[AMDGPU][True16][MC] Implement V_CVT_PK_F32_FP8/BF8 (#116106)
Existing Fake16 versions of these instructions do not support op_sel on
the _e32 encoding, which leaves a hole in the disassembler support.
Implement the true16 version of the instructions in the MC layer.
Commit: 310351d94d7abab5d29e4171aca9dc61a97209cc
https://github.com/llvm/llvm-project/commit/310351d94d7abab5d29e4171aca9dc61a97209cc
Author: cmtice <cmtice at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/Target.h
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
Log Message:
-----------
[LLDB] Add framework for Data Inspection Language (DIL) work. (#115666)
Add the framework code for hooking up and calling the Data Inspection
Language (DIL) implementation, as an alternate implementation for the
'frame variable' command. For now, this is an opt-in option, via a
target setting 'target.experimental.use-DIL'. See
https://discourse.llvm.org/t/rfc-data-inspection-language/69893 for more
information about this project.
This PR does not actually call any of the DIL code; instead the piece
that will eventually call the DIL code
(StackFrame::DILEvaluateVariableExpression) calls back into the original
'frame variable' implementation.
Commit: 6cb1847815b8f0d8ee15280f549ced6310be7135
https://github.com/llvm/llvm-project/commit/6cb1847815b8f0d8ee15280f549ced6310be7135
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
Fix typo "necessarilly"
Commit: d133a3ee9dce92050e3f573155c03ae7fa8eda5e
https://github.com/llvm/llvm-project/commit/d133a3ee9dce92050e3f573155c03ae7fa8eda5e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Add conversion after CUFGetDeviceAddress to avoid issue when emboxing (#116145)
Commit: be15fd5085680cc5ed9ec4f4f2258b504cdd55db
https://github.com/llvm/llvm-project/commit/be15fd5085680cc5ed9ec4f4f2258b504cdd55db
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/test/CodeGen/AArch64/init-undef.mir
Log Message:
-----------
[InitUndef] handleSubReg should skip artificial subregs. (#116248)
When enabling subreg liveness tracking for AArch64, this pass fails
because it tries to get the register class for the artificial subreg
`sub_32_hi` of a 64-bit GPR. It tries to create an INIT_UNDEF
instruction for the top 32-bits of the 64-bit GPR, which are not
directly addressable, so getSubRegisterClass() returns a nullptr,
crashing this pass.
It should instead just avoid trying to create the INIT_UNDEF
instruction.
Commit: 36c639483f26c2052c21594695d93c75e348f720
https://github.com/llvm/llvm-project/commit/36c639483f26c2052c21594695d93c75e348f720
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
Log Message:
-----------
[RISCV] Add VTs to some multi instruction isel patterns to resolve ambiguity.
See also #81192. These were found by disabling tablegen's
ForceArbitraryInstResultType.
For one of the patterns I was able to get a failure if Zfh was enabled,
but Zfbfmin was not. It appears ForceArbitraryInstResultType picks
bf16 over f16.
I think something like #116165 is a better long term fix for these
issues. I will update that to include f16/bf16.
Commit: c9719ad5cd7e0fa65b52333f28aa62c05052d989
https://github.com/llvm/llvm-project/commit/c9719ad5cd7e0fa65b52333f28aa62c05052d989
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-load-store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-load-store.mir
Log Message:
-----------
[RISCV][GISel] Add regbank and instruction selection tests for f16 load/store. NFC (#116101)
The legalizer doesn't think these are legal yet so I had to disable the
legality check.
Commit: 593be023615a456ca6ee0ef9bedc21301d73b73c
https://github.com/llvm/llvm-project/commit/593be023615a456ca6ee0ef9bedc21301d73b73c
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
Log Message:
-----------
[lldb] Remove broken comments originally written as table headers (NFC) (#116089)
Automatic formatting has removed the utility of these comments.
Commit: ed5aaddd7b35850a7c427aec5d2ea9dd0131904b
https://github.com/llvm/llvm-project/commit/ed5aaddd7b35850a7c427aec5d2ea9dd0131904b
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/IR/AutoUpgrade.cpp
A llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
Log Message:
-----------
[IR] Vector extract last active element intrinsic (#113587)
As discussed in #112738, it may be better to have an intrinsic to represent vector element extracts based on mask bits. This intrinsic is for the case of extracting the last active element, if any, or a default value if the mask is all-false.
The target-agnostic SelectionDAG lowering is similar to the IR in #106560.
Commit: 0019565e9322350145c2b3bbc06a3a042f3a8ee1
https://github.com/llvm/llvm-project/commit/0019565e9322350145c2b3bbc06a3a042f3a8ee1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/rv32-zve-bitcast-crash.ll
Log Message:
-----------
[RISCV] Don't create BuildPairF64 or SplitF64 nodes without D or Zdinx. (#116159)
The fix in ReplaceNodeResults is the only one really required for the
known crash.
I couldn't hit the case in LowerOperation because that requires (f64
(bitcast i64)), but the result type is softened before the input so we
don't get a chance to legalize the input.
The change to the setOperationAction call was an observation that a
i64<->vector cast should not be custom legalized on RV32. The custom
code already calls isTypeLegal on the scalar type.
Commit: 2e9f8696e9533fdd464e025bd504302fa1a22f14
https://github.com/llvm/llvm-project/commit/2e9f8696e9533fdd464e025bd504302fa1a22f14
Author: Justin Fargnoli <justinfargnoli at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/docs/Passes.rst
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/Transforms/Utils/IRNormalizer.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/IRNormalizer.cpp
A llvm/test/Transforms/IRNormalizer/naming-args-instr-blocks.ll
A llvm/test/Transforms/IRNormalizer/naming-arguments.ll
A llvm/test/Transforms/IRNormalizer/naming.ll
A llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll
A llvm/test/Transforms/IRNormalizer/regression-coro-elide-musttail.ll
A llvm/test/Transforms/IRNormalizer/regression-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-dont-hoist-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll
A llvm/test/Transforms/IRNormalizer/reordering-basic.ll
A llvm/test/Transforms/IRNormalizer/reordering.ll
Log Message:
-----------
Reland "[LLVM] Add IRNormalizer Pass" (#113780)
`IRNormalizer` will reorder instructions. Thus, we need to invalidate
analyses. Done in cd500d28cba3177c213f2f2faf50f14ea56e230b. This should
resolve the [BuildBot
failure](https://github.com/llvm/llvm-project/pull/68176#issuecomment-2428243474).
---
Original PR: #68176
Original commit: 1295d2e6da2fe90f3b770ab1d35bf5caecd38bed
Reverted with: 8a12e0131f3d84b470fac63af042aa96a1b19f56
---
Add the llvm-canon tool. Description from the [original
PR](https://reviews.llvm.org/D66029#change-wZv3yOpDdxIu):
> Added a new llvm-canon tool which aims to transform LLVM Modules into
a canonical form by reordering and renaming instructions while
preserving the same semantics. This tool makes it easier to spot
semantic differences while diffing two modules which have undergone
different transformation passes.
The current version of this tool can:
- Reorder instructions within a function.
- Rename instructions based on the operands.
- Sort commutative operands.
This code was originally written by @michalpaszkowski and [submitted to
mainline
LLVM](https://github.com/llvm/llvm-project/commit/14d358537f124a732adad1ec6edf3981dc9baece).
However, it was quickly
[reverted](https://github.com/llvm/llvm-project/commit/335de55fa3384946f1e62050f2545c0966163236)
to do BuildBot errors.
Michal presented his version of the tool in [LLVM-Canon: Shooting for
Clear Diffs](https://www.youtube.com/watch?v=c9WMijSOEUg).
@AidanGoldfarb and I ported the code to the new pass manager, added more
tests, and fixed some bugs related to PHI nodes that may have been the
root cause of the BuildBot errors that caused the patch to be reverted.
Additionally, we rewrote the implementation of instruction reordering to
fix cases where the original algorithm would break use-def chains.
Note that this is @AidanGoldfarb and I's first time submitting to LLVM.
Please liberally critique the PR!
CC @plotfi for initial review.
---------
Co-authored-by: Aidan <aidan.goldfarb at mail.mcgill.ca>
Commit: 1cd981a5f3c89058edd61cdeb1efa3232b1f71e6
https://github.com/llvm/llvm-project/commit/1cd981a5f3c89058edd61cdeb1efa3232b1f71e6
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-default-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.c
A clang/test/SemaOpenACC/combined-construct-firstprivate-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-clause.c
A clang/test/SemaOpenACC/combined-construct-private-clause.cpp
A clang/test/SemaOpenACC/combined-construct-private-firstprivate-ast.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
Log Message:
-----------
[OpenACC] Implement private/firstprivate for combined constructs
This is another pair of clauses where the work is already done from
previous constructs, so this just has to allow them and include tests
for them. This patch adds testing, does a few little cleanup bits on the
clause checking, and enables these.
Commit: 38eec3a7e328cf5aa34f90dc755ff52999761eac
https://github.com/llvm/llvm-project/commit/38eec3a7e328cf5aa34f90dc755ff52999761eac
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
Log Message:
-----------
[flang][cuda][NFC] Add dependent dialect for cuf-convert (#116093)
This pass will create gpu dialect operation. Add the dialect as
dependency so fir-opt will not crash on it
Commit: 5300ba7f4fce46160a7097292a9b0a56daa92cff
https://github.com/llvm/llvm-project/commit/5300ba7f4fce46160a7097292a9b0a56daa92cff
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port 2e9f8696e953
Commit: 6f5a145aebee4a925da28d409d69ec7f4ea19f40
https://github.com/llvm/llvm-project/commit/6f5a145aebee4a925da28d409d69ec7f4ea19f40
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV][GISel] Remove isel pattern that is no longer tested after other recent changes.
Commit: 02018cf7931de1a09184d3313bceaba9e21d5c48
https://github.com/llvm/llvm-project/commit/02018cf7931de1a09184d3313bceaba9e21d5c48
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
Log Message:
-----------
[flang][cuda][NFC] Use mlir::emitError to get location (#116267)
Use `mlir::emitError` so we can get location information on error.
Commit: 531acf9e2f24977d2556b39229b22f4518a1faa5
https://github.com/llvm/llvm-project/commit/531acf9e2f24977d2556b39229b22f4518a1faa5
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/tests/sanitizer_block_signals.cpp
Log Message:
-----------
Reapply "[sanitizer_common] AND signals in BlockSignals instead of deleting (#113443)" for non-Android Linux only (#115790)
The original patch (25fd366d6a7d40266ff27c134ed8beb0a90cc33b) was
reverted in 083a5cdbeab09517d8345868970d4f41170d7ed2 because it broke
some buildbots.
This revised patch makes two changes:
- Reverts to *pre-#98200* behavior for Android. This avoids a build
breakage on Android.
- Only define KeepUnblocked if SANITIZER_LINUX: this avoids a build
breakage on solaris, which does not support internal_sigdelset.
N.B. Other buildbot failures were non-sanitizer tests and are therefore
unrelated.
Original commit message:
My earlier patch https://github.com/llvm/llvm-project/pull/98200
caused a regression because it unconditionally unblocked synchronous
signals, even if the user program had deliberately blocked them.
This patch fixes the issue by checking the current signal mask, as
suggested by Vitaly. It also adds tests.
Fixes #113385
Commit: 7d20ea9d32954e8e5becab8495fa509a3f67b710
https://github.com/llvm/llvm-project/commit/7d20ea9d32954e8e5becab8495fa509a3f67b710
Author: ZijunZhaoCCK <zijunzhao at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Headers/limits.h
M clang/test/Headers/limits.cpp
Log Message:
-----------
[clang] Extend clang's <limits.h> to define *LONG_LONG*_ macros for bionic (#115406)
*LONG_LONG*_ macros are not GNU-only extensions any more. Bionic also
defines them.
Commit: 081a80f2b56763422183542ad10b5a6b0814312e
https://github.com/llvm/llvm-project/commit/081a80f2b56763422183542ad10b5a6b0814312e
Author: David Peixotto <peix at meta.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/LibcBenchmark.h
M libc/benchmarks/MemorySizeDistributions.cpp
Log Message:
-----------
Fix build issues with libc mem* benchmarks (#115982)
Fix a few issues found when trying to build the benchmark:
Errors
1. Unable to find include "src/__support/macros/config.h" in
LibcMemoryBenchmarkMain.cpp
Warnings
2. Unused variable warning `Index` in MemorySizeDistributions.cpp
3. Fix deprecation warning for const-ref version of `DoNotOptimize`.
warning: 'DoNotOptimize<void *>' is deprecated: The const-ref version of
this method can permit undesired compiler optimizations in benchmarks
Commit: c923ac08f0e9905a5522e9f78118623583a3f845
https://github.com/llvm/llvm-project/commit/c923ac08f0e9905a5522e9f78118623583a3f845
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBSaveCoreOptions.h
Log Message:
-----------
[lldb] Make Doxygen commits consistent with the rest of LLDB (NFC) (#116269)
This fixes a warning that '\class' command should not be used in a
comment attached to a non-class declaration. It also makes the Doxygen
comments in SBSaveCoreOptions consistent with the rest of LLDB.
rdar://139848370
Commit: c7605bfd4eaf1b0fe46fa91bd0e3f7aa17585d89
https://github.com/llvm/llvm-project/commit/c7605bfd4eaf1b0fe46fa91bd0e3f7aa17585d89
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/source/Host/macosx/objcxx/Host.mm
Log Message:
-----------
[lldb] Fix cast-function-type-mismatch warning in Host.mm (NFC)
Fixes warning: cast from 'void (*)(xpc_object_t _Nonnull)' (aka 'void
(*)(NSObject<OS_xpc_object> * _Nonnull)') to 'xpc_finalizer_t' (aka
'void (*)(void * _Nullable)') converts to incompatible function type
[-Wcast-function-type-mismatch]
Commit: 1b44c3a1424924a06f5eb00204e57effd7af7874
https://github.com/llvm/llvm-project/commit/1b44c3a1424924a06f5eb00204e57effd7af7874
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-combined-construct.cpp
A clang/test/SemaOpenACC/combined-construct-async-clause.c
A clang/test/SemaOpenACC/combined-construct-async-clause.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-default-clause.cpp
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
Log Message:
-----------
[OpenACC] enable 'async' clause for combined constructs
No additional work required over what we did for other constructs, so
this is just adding the tests and enabling the clauses.
Commit: 9f96f1cb6f2c7a987de590cbb02780df15c60f18
https://github.com/llvm/llvm-project/commit/9f96f1cb6f2c7a987de590cbb02780df15c60f18
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_primary64.h
Log Message:
-----------
[sanitizer] print both class id and corresponding size when region is exhausted (#116186)
Commit: e3e7c756fb439f4e92691c6f8c891fecd2c918ed
https://github.com/llvm/llvm-project/commit/e3e7c756fb439f4e92691c6f8c891fecd2c918ed
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
Log Message:
-----------
AMDGPU: Update pattern matching from "x&(-1>>(32-y))" to "bfe x, 0, y" (#116115)
It is not correct to lower "x&(-1>>(32-y))" to "bfe x, 0, y". When y
equals 32, "-1" is not shifted, so x&(-1>>(32-32) is still x, but "bfe
x, 0, 32" is 0. However, if we know y is at most of 5 bits (< 32), we
can still do the pattern matching.
Commit: 7b7ae72b5863c4090bf06d1f10cd676823e02fb1
https://github.com/llvm/llvm-project/commit/7b7ae72b5863c4090bf06d1f10cd676823e02fb1
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/msp430-char.c
Log Message:
-----------
[MSP430] Default to unsigned char (#115964)
This matches the ABI document at https://www.ti.com/lit/pdf/slaa534 as well as the GCC implementation.
Partially fixes https://github.com/llvm/llvm-project/issues/115957
Commit: 90cbd4adb3ecee72319c320ed62a9d1329a49bb9
https://github.com/llvm/llvm-project/commit/90cbd4adb3ecee72319c320ed62a9d1329a49bb9
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
Log Message:
-----------
[NVPTX] Add folding for cvt.rn.bf16x2.f32 (#116109)
Commit: 5d16fbc275d57b88866a2606453ead6a024ffee0
https://github.com/llvm/llvm-project/commit/5d16fbc275d57b88866a2606453ead6a024ffee0
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
Log Message:
-----------
[lldb] Support any flag to _regexp-bt (#116260)
In particular, this allows `bt -u`.
Note that this passthrough behavior has precedent in `_regexp-break`,
where `b (-.*)` is expanded to `breakpoint set %1`.
Commit: bb3f5e1fed7c6ba733b7f273e93f5d3930976185
https://github.com/llvm/llvm-project/commit/bb3f5e1fed7c6ba733b7f273e93f5d3930976185
Author: Matin Raayai <30674652+matinraayai at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/docs/WritingAnLLVMBackend.rst
A llvm/include/llvm/CodeGen/CodeGenTargetMachineImpl.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
M llvm/include/llvm/CodeGen/MachineModuleInfo.h
M llvm/include/llvm/CodeGen/RegisterUsageInfo.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
R llvm/lib/CodeGen/LLVMTargetMachine.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineModuleInfo.cpp
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.h
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.h
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.h
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.h
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.h
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.h
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.h
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.h
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.h
M llvm/lib/Target/VE/VETargetMachine.cpp
M llvm/lib/Target/VE/VETargetMachine.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.h
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaTargetMachine.h
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.h
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
M llvm/tools/llvm-exegesis/lib/LlvmState.h
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
M llvm/unittests/CodeGen/AsmPrinterDwarfTest.cpp
M llvm/unittests/CodeGen/CCStateTest.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
M llvm/unittests/CodeGen/LexicalScopesTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MLRegAllocDevelopmentFeatures.cpp
M llvm/unittests/CodeGen/MachineBasicBlockTest.cpp
M llvm/unittests/CodeGen/MachineDomTreeUpdaterTest.cpp
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/CodeGen/PassManagerTest.cpp
M llvm/unittests/CodeGen/RegAllocScoreTest.cpp
M llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/CodeGen/TargetOptionsTest.cpp
M llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/MIR/MachineMetadata.cpp
M llvm/unittests/MIR/MachineStableHashTest.cpp
M llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/AArch64SVESchedPseudoTest.cpp
M llvm/unittests/Target/AArch64/InstSizes.cpp
M llvm/unittests/Target/AArch64/MatrixRegisterAliasing.cpp
M llvm/unittests/Target/ARM/InstSizes.cpp
M llvm/unittests/Target/ARM/MachineInstrTest.cpp
M llvm/unittests/Target/LoongArch/InstSizes.cpp
M llvm/unittests/Target/VE/MachineInstrTest.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
M llvm/unittests/Target/X86/TernlogTest.cpp
M llvm/unittests/tools/llvm-exegesis/Common/AssemblerUtils.h
M llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M offload/plugins-nextgen/common/src/JIT.cpp
Log Message:
-----------
Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)
Following discussions in #110443, and the following earlier discussions
in https://lists.llvm.org/pipermail/llvm-dev/2017-October/117907.html,
https://reviews.llvm.org/D38482, https://reviews.llvm.org/D38489, this
PR attempts to overhaul the `TargetMachine` and `LLVMTargetMachine`
interface classes. More specifically:
1. Makes `TargetMachine` the only class implemented under
`TargetMachine.h` in the `Target` library.
2. `TargetMachine` contains target-specific interface functions that
relate to IR/CodeGen/MC constructs, whereas before (at least on paper)
it was supposed to have only IR/MC constructs. Any Target that doesn't
want to use the independent code generator simply does not implement
them, and returns either `false` or `nullptr`.
3. Renames `LLVMTargetMachine` to `CodeGenCommonTMImpl`. This renaming
aims to make the purpose of `LLVMTargetMachine` clearer. Its interface
was moved under the CodeGen library, to further emphasis its usage in
Targets that use CodeGen directly.
4. Makes `TargetMachine` the only interface used across LLVM and its
projects. With these changes, `CodeGenCommonTMImpl` is simply a set of
shared function implementations of `TargetMachine`, and CodeGen users
don't need to static cast to `LLVMTargetMachine` every time they need a
CodeGen-specific feature of the `TargetMachine`.
5. More importantly, does not change any requirements regarding library
linking.
cc @arsenm @aeubanks
Commit: 46d8aa8d6a6538b8cd22c8670f40d412399ad742
https://github.com/llvm/llvm-project/commit/46d8aa8d6a6538b8cd22c8670f40d412399ad742
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/string
Log Message:
-----------
[libc++] Make __throw_ member functions static (#116233)
Fixes #116092
Commit: b05d37d0d25e5f3ef181e11eb2a61dd816ae72e1
https://github.com/llvm/llvm-project/commit/b05d37d0d25e5f3ef181e11eb2a61dd816ae72e1
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
Log Message:
-----------
Revert "Respect the [[clang::unsafe_buffer_usage]] attribute for field and constructor initializers (#91991)"
This reverts commit a518ed2d815c16010a6262edd0414a5f60a63a39 because it causes regression. See https://github.com/llvm/llvm-project/pull/91991#issuecomment-2477456171 for detail.
Commit: 949caf39e4a445cc0600735ac0755dd0d4aa28f6
https://github.com/llvm/llvm-project/commit/949caf39e4a445cc0600735ac0755dd0d4aa28f6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv32zba.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Zba testing improvements. NFC
Add lshr+gep tests for RV32. These patterns are already handled, but we only tested for RV64.
Remove stale FIXMEs and adjust test case names in rv64zba..l
Commit: 23e9b49b88dc9b8be3edd2e46485d59e05f9f6ba
https://github.com/llvm/llvm-project/commit/23e9b49b88dc9b8be3edd2e46485d59e05f9f6ba
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zba.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
Log Message:
-----------
[RISCV][GISel] Copy some Zba IR test cases from SelectionDAG. NFC
Commit: 196d5fdff1cb7b600dcf11b5464be4fc72dba675
https://github.com/llvm/llvm-project/commit/196d5fdff1cb7b600dcf11b5464be4fc72dba675
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove most patterns that look for a zext i32->i64 and another integer instruction.
For the most part integer code should promote G_ZEXT to G_AND now.
The exception may be when the G_ZEXT is fed by a bitcast from FP,
but we don't have any testing of that now.
I had to adjust one test that was looking for G_TRUNC+G_ZEXT instead
of G_AND.
Commit: 691bd184e628bac8a2d7385dba1057cfcd844689
https://github.com/llvm/llvm-project/commit/691bd184e628bac8a2d7385dba1057cfcd844689
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/updateCounter.ll
Log Message:
-----------
[HLSL][DIRECTX] Fixing update counter signature (#115913)
This PR changes the return type on `bufferUpdateCounter` to `uint`
Fixes #115614
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 6bd3f2e8986f4eb7972bc0102ff4a706dacc0d48
https://github.com/llvm/llvm-project/commit/6bd3f2e8986f4eb7972bc0102ff4a706dacc0d48
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGen/blocks.c
Log Message:
-----------
[clang codegen] Add CreateRuntimeFunction overload that takes a clang type. (#113506)
Correctly computing the LLVM types/attributes is complicated in general,
so add a variant which does that for you.
Commit: ba623e10b4064c410a1b79280ec7fb963463eb29
https://github.com/llvm/llvm-project/commit/ba623e10b4064c410a1b79280ec7fb963463eb29
Author: Tyler Nowicki <tyler.nowicki at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[NFC][Coroutines] Remove integer indexing in several CoroSplit loops (#115954)
Use helpers such as llvm::enumerate and llvm::zip in places to avoid
using loop counters. Also refactored AnyRetconABI::splitCoroutine to
avoid some awkward indexing that came about by putting ContinuationPhi
into the ReturnPHIs vector and mistaking i with I and e with E.
Commit: aa68dd57838d29f1e020fa6e5a726c2e2317bb75
https://github.com/llvm/llvm-project/commit/aa68dd57838d29f1e020fa6e5a726c2e2317bb75
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/include/flang/Common/Fortran-features.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call38.f90
Log Message:
-----------
[flang] Disable extension by default (#114875)
f18 allows, as an extension, an assumed-rank array to be associated with
a dummy argument that is not assumed-rank. This usage is non-conforming
and supported by only one other compiler, perhaps unintentionally.
Disable the extension by default, but also make it controllable so that
we can turn it back on later if it's really needed. (If it turns out to
not appear in applications after more exposure, I'll remove it
entirely.)
Fixes https://github.com/llvm/llvm-project/issues/114080.
Commit: b3026bab91bd05453e7385377c40213a5b518dae
https://github.com/llvm/llvm-project/commit/b3026bab91bd05453e7385377c40213a5b518dae
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/bind-c17.f90
Log Message:
-----------
[flang] Soften interoperability error when standard allows (#115092)
The standard doesn't require that an interoperable procedure's dummy
arguments have interoperable derived types in some cases. Although
nearly all extant Fortran compilers emit errors, some don't, and things
should work; so reduce the current fatal error message to an optional
portability warning.
Fixes https://github.com/llvm/llvm-project/issues/115010.
Commit: 2bc30f37ce7143fd30f21bd232e14aa787f6b08f
https://github.com/llvm/llvm-project/commit/2bc30f37ce7143fd30f21bd232e14aa787f6b08f
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Semantics/c_f_pointer.f90
Log Message:
-----------
[flang] Make interoperability warning an off-by-default portability one (#115096)
The FPTR= argument to the C_F_POINTER intrinsic procedure should be a
pointer with an interoperable type, but isn't required to be, and most
compilers don't mention it. Change the warning from an on-by-default
interoperability warning into an off-by-default portability warning.
Fixes https://github.com/llvm/llvm-project/issues/115012.
Commit: ebc0163cea1cb1ad44f9c438064a52df7e5fc517
https://github.com/llvm/llvm-project/commit/ebc0163cea1cb1ad44f9c438064a52df7e5fc517
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Evaluate/int8.f90
Log Message:
-----------
[flang] INT2 & INT8 can't be specific intrinsic functions (#115360)
I recently added support for the extension intrinsic functions INT2 and
INT8, and took the shortcut of defining them as specific intrinsic
functions that map to the standard INT() with hard-wired KIND= values
for the result. This works fine for references to these functions, but
leads to a compiler crash for an attempt to use their names in contexts
other than calling them, since their argument types aren't restricted to
single types and no concrete interface can be characterized for them. So
move them out of the table of specific intrinsic functions and into the
general table of intrinsics, and then handle them afterwards as if they
had been INT().
Fixes https://github.com/llvm/llvm-project/issues/115324.
Commit: d68332d0627f6492866298038e1085e4aff0f476
https://github.com/llvm/llvm-project/commit/d68332d0627f6492866298038e1085e4aff0f476
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/bug115674.f90
Log Message:
-----------
[flang] Fix spurious error messages due to INTRINSIC nested in BLOCK (#115889)
When skimmming executable parts to collect names used in procedure
calls, it is important to exclude names that have local declarations in
nested BLOCK constructs. The mechanism for handling these nested
declarations was catching only names whose declarations include an
"entity-decl", and so names appearing in other declaration statements
(like INTRINSIC and EXTERNAL statements) were not hidden from the scan,
leading to absurd error messages when such names turn out to be
procedures in the nested BLOCK construct but to not be procedures
outside it.
This patch fixes the code that detects local declarations in BLOCK for
all of the missed cases that don't use entity-decls; only INTRINSIC and
EXTERNAL could affect the procedures whose names are of interest to the
executable part skimmer, but perhaps future work will want to collect
non-procedures as well, so I plugged all of the holes that I could find.
Fixes https://github.com/llvm/llvm-project/issues/115674.
Commit: 17daa84348f55aac7b0264a3e545a1cc4b16fe1a
https://github.com/llvm/llvm-project/commit/17daa84348f55aac7b0264a3e545a1cc4b16fe1a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Evaluate/check-expression.cpp
M flang/test/Evaluate/folding09.f90
M flang/test/Lower/HLFIR/maxloc.f90
M flang/test/Lower/HLFIR/maxval.f90
M flang/test/Lower/HLFIR/minloc.f90
M flang/test/Lower/HLFIR/minval.f90
Log Message:
-----------
[flang] Better IS_CONTIGUOUS folding for substrings (#115970)
At present, the compiler doesn't analyze substring references for
contiguity. But there are cases where substrings can be known to be
contiguous (scalar base, empty substring, or complete substring) or can
be known to be discontiguous, and references to the intrinsic function
IS_CONTIGUOUS in those cases may appear in constant expressions.
Fixes https://github.com/llvm/llvm-project/issues/115675.
Commit: 376713ff505f31b698a3ab095fad7b6e08f99e74
https://github.com/llvm/llvm-project/commit/376713ff505f31b698a3ab095fad7b6e08f99e74
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/runtime/transformational.cpp
A flang/test/Evaluate/bug115923.f90
Log Message:
-----------
[flang] Accept CLASS(*) array in EOSHIFT (#116114)
The intrinsic processing code wasn't allowing the ARRAY= argument to the
EOSHIFT intrinsic function to be CLASS(*). That case seems to conform to
the standard, although only one compiler could actually handle it, so
allow for it.
Fixes https://github.com/llvm/llvm-project/issues/115923.
Commit: 2d6459cb284505e54af53f519f2d230bb973d453
https://github.com/llvm/llvm-project/commit/2d6459cb284505e54af53f519f2d230bb973d453
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
Log Message:
-----------
[libc++] Fix CI issues recently introduced by localization changes (#116216)
After a recent Github Actions runner policy change [1], the version of
Xcode included in the macos-14 image went from Xcode 16 to Xcode 15,
breaking our build bots.
This moves the bots to the macos 15 (public preview) image, which
contains Xcode 16.
Also, adjust an UNSUPPORTED annotation that was incorrectly targeting
macos 13.7 when it should have been targeting a version of AppleClang.
[1]: https://github.com/actions/runner-images/issues/10703
Commit: 44adc245d8e7e16b730fb247f3b8b47428e2864b
https://github.com/llvm/llvm-project/commit/44adc245d8e7e16b730fb247f3b8b47428e2864b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
Log Message:
-----------
[memprof] Use ArrayRef instead of std::vector<LinearFrameId> (NFC) (#116279)
LLVM Programmer's Manual prefers ArrayRef over actual sequential
container types for read accesses.
Commit: 0f0e2fe97b6c771b7a70964bf321ad91788e6a22
https://github.com/llvm/llvm-project/commit/0f0e2fe97b6c771b7a70964bf321ad91788e6a22
Author: Konstantin Schwarz <konstantin.schwarz at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-freeze.mir
A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-ext.ll
M llvm/test/CodeGen/AArch64/arm64-extract_subvector.ll
M llvm/test/CodeGen/AArch64/ext-narrow-index.ll
Log Message:
-----------
[GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (#115377)
Commit: abff8fe2a940212b1c43af2d86a68fc92849f019
https://github.com/llvm/llvm-project/commit/abff8fe2a940212b1c43af2d86a68fc92849f019
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
M llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir
A llvm/test/MC/AMDGPU/vinterp.s
M llvm/test/MC/Disassembler/AMDGPU/vinterp.txt
Log Message:
-----------
[AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (#113634)
Update VInterp instructions with true16 and fake16 formats.
This patch includes instructions:
v_interp_p10_f16_f32
v_interp_p2_f16_f32
v_interp_p10_rtz_f16_f32
v_interp_p2_rtz_f16_f32
dasm test vinterp-fake16.txt is removed and the testline are merged into
vinterp.txt which handles both true16/fake16 cases
Commit: aa81c28cd54ec6be370a3a04c8546e9b65a1e6a0
https://github.com/llvm/llvm-project/commit/aa81c28cd54ec6be370a3a04c8546e9b65a1e6a0
Author: Thomas Peters <thomas.d.peters at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
Log Message:
-----------
[MLIR][mlir-opt] Add option to turn off verifier on parsing (#116287)
Sometimes, a developer may not wish to wait for the verifier
(imagine they did not follow the verifier guidelines and chased use-def
chains), or may wish to disable it.
Add a command-line option,
`--mlir-very-unsafe-disable-verifier-on-parsing`, which turns off the
verifier on parsing.
------
This implements the discussion from
https://discourse.llvm.org/t/optionally-turn-off-verifier-during-parsing/82805
Commit: b3134fa2338388adf8cfb2d77339d0b042eab9f6
https://github.com/llvm/llvm-project/commit/b3134fa2338388adf8cfb2d77339d0b042eab9f6
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
Log Message:
-----------
Reland [CGData] Refactor Global Merge Functions (#115750)
This is a follow-up PR to refactor the initial global merge function
pass implemented in #112671.
It first collects stable functions relevant to the current module and
iterates over those only, instead of iterating through all stable
functions in the stable function map.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: 9c7701fa78037af03be10ed168fd3c75a2ed1aef
https://github.com/llvm/llvm-project/commit/9c7701fa78037af03be10ed168fd3c75a2ed1aef
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/StackFrame.h
M lldb/source/API/SBFrame.cpp
M lldb/source/Target/StackFrame.cpp
Log Message:
-----------
[lldb/API] Hoist some of SBFrame logic to lldb_private::StackFrame (NFC) (#116298)
This patch moves some of the logic implemented in the SBFrame APIs to
the lldb_private::StackFrame class so it can be re-used elsewhere.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: d761b7485dbf0d951db34abcca270c405be1e93a
https://github.com/llvm/llvm-project/commit/d761b7485dbf0d951db34abcca270c405be1e93a
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[rtsan] NFC: Add comment about O_NONBLOCK behavior (#116189)
Commit: 59da1afd2ad74af2a8b8475412353c5d54a7d7f5
https://github.com/llvm/llvm-project/commit/59da1afd2ad74af2a8b8475412353c5d54a7d7f5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
Log Message:
-----------
[memprof] Speed up caller-callee pair extraction (#116184)
We know that the MemProf profile has a lot of duplicate call stacks.
Extracting caller-callee pairs from a call stack we've seen before is
a wasteful effort.
This patch makes the extraction more efficient by first coming up with
a work list of linear call stack IDs -- the set of starting positions
in the radix tree array -- and then extract caller-callee pairs from
each call stack in the work list.
We implement the work list as a bit vector because we expect the work
list to be dense in the range [0, RadixTreeSize). Also, we want the
set insertion to be cheap.
Without this patch, it takes 25 seconds to extract caller-callee pairs
from a large MemProf profile. This patch shortenes that down to 4
seconds.
Commit: 3121f7522a0dc1463362cb6c11243d4352d4c857
https://github.com/llvm/llvm-project/commit/3121f7522a0dc1463362cb6c11243d4352d4c857
Author: John Harrison <harjohn at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactor lldb-dap.cpp to not use global DAP variable. (#116272)
This removes the global DAP variable and instead allocates a DAP
instance in main. This should allow us to refactor lldb-dap to enable a
server mode that accepts multiple connections.
Commit: 1857d297354fd307d2b30ff69036cc343d2fd692
https://github.com/llvm/llvm-project/commit/1857d297354fd307d2b30ff69036cc343d2fd692
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lldb/source/Target/StackFrame.cpp
Log Message:
-----------
[lldb/Target] Add null-check before dereferencing inlined_info (NFC) (#116300)
This patch is a follow-up to 9c7701fa78037af03be10ed168fd3c75a2ed1aef
and adds extra-null checks before dereferencing the inlined_info
pointer.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: eec21ccee0950d52926a79685573db1996e3ba5b
https://github.com/llvm/llvm-project/commit/eec21ccee0950d52926a79685573db1996e3ba5b
Author: Matin Raayai <raayaiardakani.m at northeastern.edu>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.h
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
Log Message:
-----------
Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets (#116290)
This PR fixes a set of build issues with experimental targets happened
in result of merging #111234 to master.
Commit: 2f55de4e317ee93cdca839558acf8be2b5ac2b46
https://github.com/llvm/llvm-project/commit/2f55de4e317ee93cdca839558acf8be2b5ac2b46
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[llvm] `APFloat`: Query `hasNanOrInf` from semantics (#116158)
Whether a floating point type supports NaN or infinity can be queried
from its semantics. No need to hard-code a list of types.
Commit: 478c24b5f86911d14256bad71c85ed0ff061070a
https://github.com/llvm/llvm-project/commit/478c24b5f86911d14256bad71c85ed0ff061070a
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
Log Message:
-----------
[HLSL] Add implicit resource element type concepts to AST (#112600)
This PR is step one on the journey to implement resource element type
validation via C++20 concepts. The PR sets up the infrastructure for
injecting implicit concept decls / concept specialization expressions
into the AST, which will then be evaluated after template arguments are
instantiated. This is not meant to be a complete implementation of the
desired validation for HLSL,
there are a couple of missing elements:
1. We need the __builtin_hlsl_is_typed_resource_element_compatible
builtin to be implemented.
2. We need other constraints, like is_intangible
3. We need to put the first 2 points together, and construct a finalized
constraint expression, which should differ between typed and raw buffers
This is just an initial PR that puts some of the core infrastructure in
place.
Commit: 47889cdd23e57c0acb68adff44ce5657dc86640e
https://github.com/llvm/llvm-project/commit/47889cdd23e57c0acb68adff44ce5657dc86640e
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
[HLSL] Add empty struct test cases to `__builtin_hlsl_is_typed_resource_element_compatible` test file (#115045)
This PR adds empty struct cases to the test file for the builtin.
Commit: c1f6cb74634509d0e4204dadd46566185fa33e2b
https://github.com/llvm/llvm-project/commit/c1f6cb74634509d0e4204dadd46566185fa33e2b
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
R clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
Log Message:
-----------
Revert "[HLSL] Add implicit resource element type concepts to AST" (#116305)
Reverts llvm/llvm-project#112600
Commit: 40a647fc7dc6048c92e2d580b61f5feca0785980
https://github.com/llvm/llvm-project/commit/40a647fc7dc6048c92e2d580b61f5feca0785980
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll
Log Message:
-----------
[IndVarSimplify] Drop samesign flags after narrowing compares (#116263)
Samesign flag cannot be preserved after narrowing the compare since the
position of the sign bit is changed.
Closes https://github.com/llvm/llvm-project/issues/116249.
Commit: 17bc738324274f1cf54d30552d65751d216e7ad0
https://github.com/llvm/llvm-project/commit/17bc738324274f1cf54d30552d65751d216e7ad0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[memprof] Make ContextNode smaller (#116271)
With this patch, sizeof(ContextNode) goes down from 144 to 128.
Note that SmallVector<T, 0> uses uint32_t for its capacity and size
fields.
I could change other instances of std::vector to SmallVector<T, 0>,
but that would require updates to many places, so I am leaving them
alone for now.
Commit: 98daf22638aec08ec3a3ea022984828fbf89f28f
https://github.com/llvm/llvm-project/commit/98daf22638aec08ec3a3ea022984828fbf89f28f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize the box in memory when src is emboxed (#116289)
Commit: 618f231a6d3ef41d231e2a4d1e2eca4c0d709802
https://github.com/llvm/llvm-project/commit/618f231a6d3ef41d231e2a4d1e2eca4c0d709802
Author: Jinyun (Joey) Ye <jinyunye at huawei.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/python/mlir/dialects/transform/structured.py
M mlir/test/Dialect/Linalg/continuous-tiling-full.mlir
M mlir/test/Dialect/Linalg/continuous-tiling-multiway-split.mlir
M mlir/test/Dialect/Linalg/multisize-tiling-full.mlir
M mlir/test/Dialect/Linalg/transform-op-split.mlir
M mlir/test/Dialect/Linalg/transform-ops.mlir
M mlir/test/python/dialects/transform_structured_ext.py
Log Message:
-----------
[MLIR][Transform] Consolidate result of structured.split into one list (#111171)
Follow-up a review comment from
https://github.com/llvm/llvm-project/pull/82792#discussion_r1604925239
as a separate PR:
E.g.:
```
%0:2 = transform.structured.split
```
is changed to
```
%t = transform.structured.split
%0:2 = transform.split_handle %t
```
Commit: 4f2651c36361468cf35cdcdf841d3abed9d0d1cc
https://github.com/llvm/llvm-project/commit/4f2651c36361468cf35cdcdf841d3abed9d0d1cc
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M compiler-rt/test/profile/ContinuousSyncMode/basic.c
M compiler-rt/test/profile/ContinuousSyncMode/get-filename.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-no-counters.c
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
M compiler-rt/test/profile/ContinuousSyncMode/pid-substitution.c
M compiler-rt/test/profile/ContinuousSyncMode/reset-default-profile.c
M compiler-rt/test/profile/ContinuousSyncMode/set-filename.c
M compiler-rt/test/profile/lit.cfg.py
Log Message:
-----------
[PGO][test] Enable continuous mode PGO tests on AIX (#115987)
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 6be567bfc22e0d165a4b927beab3933be7ef98e6
https://github.com/llvm/llvm-project/commit/6be567bfc22e0d165a4b927beab3933be7ef98e6
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
Log Message:
-----------
[Webkit Checkers] Treat const member variables as a safe origin (#115594)
Treat const Ref, RefPtr, CheckedRef, CheckedPtr member variables as safe
pointer origin in WebKit's local variable and call arguments checkers.
Commit: c2a9bba4a30349f5411f3b3f9cbe4a6f379816bc
https://github.com/llvm/llvm-project/commit/c2a9bba4a30349f5411f3b3f9cbe4a6f379816bc
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
A llvm/test/DebugInfo/Generic/artificial-static-member.ll
Log Message:
-----------
[DebugInfo] Add DW_AT_artificial for compiler generated static member. (#115851)
Consider the case when the compiler generates a static member. Any
consumer of the debug info generated for that case, would benefit if
that member has the DW_AT_artificial flag.
Commit: 4e600751d2f7e8e7b85a71b7128b68444bdde91b
https://github.com/llvm/llvm-project/commit/4e600751d2f7e8e7b85a71b7128b68444bdde91b
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/unittests/AST/EvaluateAsRValueTest.cpp
M clang/unittests/Analysis/CloneDetectionTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Tooling/ASTSelectionTest.cpp
A clang/unittests/Tooling/CRTPTestVisitor.h
M clang/unittests/Tooling/CastExprTest.cpp
M clang/unittests/Tooling/CommentHandlerTest.cpp
M clang/unittests/Tooling/ExecutionTest.cpp
M clang/unittests/Tooling/LexicallyOrderedRecursiveASTVisitorTest.cpp
M clang/unittests/Tooling/LookupTest.cpp
M clang/unittests/Tooling/QualTypeNamesTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestDeclVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestPostOrderVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTestTypeLocVisitor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Attr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/BitfieldInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXBoolLiteralExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMemberCall.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXOperatorCallExprTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CallbacksCommon.h
M clang/unittests/Tooling/RecursiveASTVisitorTests/Class.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/Concept.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ConstructExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeclRefExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/DeductionGuide.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtor.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ImplicitCtorInitializer.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPostOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrder.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/InitListExprPreOrderNoQueue.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/IntegerLiteral.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaDefaultCapture.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaTemplateParams.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/MemberPointerTypeLoc.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/NestedNameSpecifiers.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/ParenExpr.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TemplateArgumentLocTraverser.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/TraversalScope.cpp
M clang/unittests/Tooling/RefactoringTest.cpp
M clang/unittests/Tooling/SourceCodeTest.cpp
M clang/unittests/Tooling/TestVisitor.h
Log Message:
-----------
[Clang] [Tests] Refactor most unit tests to use DynamicRecursiveASTVisitor (#115132)
This pr refactors most tests that use RAV to use DRAV instead; this also
has the nice effect of testing both the RAV and DRAV implementations at
the same time w/o having to duplicate all of our AST visitor tests.
Some tests rely on features that DRAV doesn’t support (mainly post-order
traversal), so those haven’t been migrated. At the same time,
`TestVisitor` is now a DRAV, so I’ve had to introduce a new
`CTRPTestVisitor` for any tests that need to use RAV directly.
Commit: 7b54976d11a5fc6aa1f22e9d96bcb4c81bbf2abf
https://github.com/llvm/llvm-project/commit/7b54976d11a5fc6aa1f22e9d96bcb4c81bbf2abf
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/RegisterUsageInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen][NewPM] Port RegisterUsageInfo to NPM (#113873)
And add to the codegen pipeline if ipra is enabled with a `RequireAnalysisPass` since this is a module pass.
Commit: 1b23ebe0770aaf85f37e085b53067066d2d99cc8
https://github.com/llvm/llvm-project/commit/1b23ebe0770aaf85f37e085b53067066d2d99cc8
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Add Op for TMA Prefetch (#116232)
PR #115527 adds intrinsics for TMA prefetch.
This patch adds an NVVM Dialect Op for the same.
Lit tests to verify the lowering to LLVM intrinsics as well as
verifier tests (for invalid cases) are added.
PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cp-async-bulk-prefetch-tensor
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 9ae21b073ab48b376687ecd7fbae12e08b4ae86e
https://github.com/llvm/llvm-project/commit/9ae21b073ab48b376687ecd7fbae12e08b4ae86e
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clangd] fix extract-to-function for overloaded operators (#81640)
When selecting code that contains the use of overloaded operators,
the SelectionTree will attribute the operator to the operator
declaration, not to the `CXXOperatorCallExpr`. To allow
extract-to-function to work with these operators, make unselected
`CXXOperatorCallExpr`s valid root statements, just like `DeclStmt`s.
Partially fixes clangd/clangd#1254
---------
Co-authored-by: Nathan Ridge <zeratul976 at hotmail.com>
Commit: b4adce0056bac9f650ec883a1dc5e082aa649b5c
https://github.com/llvm/llvm-project/commit/b4adce0056bac9f650ec883a1dc5e082aa649b5c
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/vector-tuple-align.ll
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
Log Message:
-----------
[RISCV] Tuple intrinsics are creating overly aligned memory operands (#115804)
The alignment should be same as its element type.
Commit: e24457a330923dbc43a0e056deddb2d42c682e6c
https://github.com/llvm/llvm-project/commit/e24457a330923dbc43a0e056deddb2d42c682e6c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Driver.cpp
M lld/ELF/Driver.h
M lld/ELF/DriverUtils.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Migrate away from global ctx
Commit: 56e56c9e6673cc17f4bc7cdb3a5dbffc1557b446
https://github.com/llvm/llvm-project/commit/56e56c9e6673cc17f4bc7cdb3a5dbffc1557b446
Author: Luohao Wang <luohaothu at live.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
Log Message:
-----------
[clang][CIR] Fix missing dependency of MLIRCIR (#116221)
Building `MLIRCIR` will report an error `CIROpsDialect.h.inc` not found.
This is because `MLIRCIR` hasn't declared its dependence on the tablegen
target `MLIRCIROpsIncGen`. This patch fixes the issue.
Commit: 2de1e067360055b5fb17568dc474fbfd7c4b1ffb
https://github.com/llvm/llvm-project/commit/2de1e067360055b5fb17568dc474fbfd7c4b1ffb
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A llvm/include/llvm/CodeGen/RegUsageInfoCollector.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
M llvm/test/CodeGen/X86/ipra-inline-asm.ll
M llvm/test/CodeGen/X86/ipra-reg-usage.ll
Log Message:
-----------
[CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM (#113874)
Commit: d69cc05bcfeaf43853a509ec47ec742464fd60a0
https://github.com/llvm/llvm-project/commit/d69cc05bcfeaf43853a509ec47ec742464fd60a0
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Migrate away from global ctx
Commit: 47928ab16b675c17826ada16f23aa0569e93a474
https://github.com/llvm/llvm-project/commit/47928ab16b675c17826ada16f23aa0569e93a474
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A llvm/include/llvm/CodeGen/RegUsageInfoPropagate.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/preserve.ll
Log Message:
-----------
[CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM (#114010)
Commit: 3d57c79728968e291df4929b377b3580d16af7b9
https://github.com/llvm/llvm-project/commit/3d57c79728968e291df4929b377b3580d16af7b9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lld/ELF/EhFrame.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Migrate away from global ctx
Commit: dde802b153d5cb41505bf4d377be753576991297
https://github.com/llvm/llvm-project/commit/dde802b153d5cb41505bf4d377be753576991297
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Analysis/CallGraph.h
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
M clang/lib/Analysis/CallGraph.cpp
M clang/lib/Analysis/CalledOnceCheck.cpp
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/ReachableCode.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/StaticAnalyzer/Checkers/CastToStructChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
M clang/lib/StaticAnalyzer/Checkers/IdenticalExprChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCMissingSuperCallChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
Log Message:
-----------
[Clang] [NFC] Refactor AST visitors in Sema and the static analyser to use DynamicRecursiveASTVisitor (#115144)
This pr refactors all recursive AST visitors in `Sema`, `Analyze`, and
`StaticAnalysis` to inherit from DRAV instead. This is over half of the
visitors that inherit from RAV directly.
See also #115132, #110040, #93462
LLVM Compile-Time Tracker link for this branch:
https://llvm-compile-time-tracker.com/compare.php?from=5adb5c05a2e9f31385fbba8b0436cbc07d91a44d&to=b58e589a86c06ba28d4d90613864d10be29aa5ba&stat=instructions%3Au
Commit: 942928f3df16c01ea2b905f441d72cca138032e9
https://github.com/llvm/llvm-project/commit/942928f3df16c01ea2b905f441d72cca138032e9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/OutputSections.cpp
Log Message:
-----------
[ELF] Migrate away from global ctx
Commit: bc6c0681271788ca7078fb679ac67b56944de1a6
https://github.com/llvm/llvm-project/commit/bc6c0681271788ca7078fb679ac67b56944de1a6
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/clip.hlsl
A clang/test/SemaHLSL/BuiltIns/clip-errors.hlsl
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/DirectX/discard.ll
A llvm/test/CodeGen/DirectX/discard_error.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
Log Message:
-----------
[HLSL] Adding HLSL `clip` function. (#114588)
Adding HLSL `clip` function.
- adding llvm intrinsic
- adding sema checks
- adding dxil lowering
- ading spirv lowering
- adding sema tests
- adding codegen tests
- adding lowering tests
Closes #99093
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 1799d57ffadd2f01c6d4caae7eb635cc51f5562d
https://github.com/llvm/llvm-project/commit/1799d57ffadd2f01c6d4caae7eb635cc51f5562d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libc++] Add a Github action to build libc++'s Docker images (#110020)
This patch adds a Github action that runs whenever changes to the libc++
Docker images are pushed to `main`. The action will rebuild the Docker
images and push them to LLVM's container registry so that we can then
point to those images from our CI nodes.
Commit: 4fb1f2e58a2f423362b75f233896ea0d7179fc7a
https://github.com/llvm/llvm-project/commit/4fb1f2e58a2f423362b75f233896ea0d7179fc7a
Author: Michael Park <mcypark at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp
Log Message:
-----------
[clangd] Fix the modification detection logic in `ClangdLSPServer::applyConfiguration`. (#115438)
Prior to this, the "old != new" check would always evaluate to true because it was comparing a pre-mangling new command to a post-mangling old command.
Commit: 878b03e0b96698ced5fb6a70dc80df05ef884f8c
https://github.com/llvm/llvm-project/commit/878b03e0b96698ced5fb6a70dc80df05ef884f8c
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
Log Message:
-----------
Remove an unused Passes include from CodeGen/RegUsageInfoPropagate.cpp
CodeGen should not depend on Passes component.
Commit: a809405f78980d216737e8e4903bf0f5ab9314d3
https://github.com/llvm/llvm-project/commit/a809405f78980d216737e8e4903bf0f5ab9314d3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libc++] Adjust the workflow file for building a Docker image (#116333)
Commit: 073159004fe3781571b6fbc9efb68ef1cb24ad75
https://github.com/llvm/llvm-project/commit/073159004fe3781571b6fbc9efb68ef1cb24ad75
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
R libcxx/utils/ci/macos-ci-setup
Log Message:
-----------
[libc++] Remove obsolete 'macos-ci-setup' script
We don't use it anymore since we moved to Github hosted runners
for mac instead of the Foundation-provided runners.
Commit: 87bfa58a5a4b85416d2486797d0f21fc67da5cf3
https://github.com/llvm/llvm-project/commit/87bfa58a5a4b85416d2486797d0f21fc67da5cf3
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/DebugInfo/Generic/artificial-static-member.ll
Log Message:
-----------
[DebugInfo] Add DW_AT_artificial for compiler generated static member. (#116327)
Consider the case when the compiler generates a static member. Any
consumer of the debug info generated for that case, would benefit if
that member has the DW_AT_artificial flag.
Fix buildbot failure on: llvm-clang-aarch64-darwin
- Add specific configuration: x86_64-linux
Commit: a1a1a4ced9d4ecba428175c45a24da476bdc55f4
https://github.com/llvm/llvm-project/commit/a1a1a4ced9d4ecba428175c45a24da476bdc55f4
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/source/Target/Process.cpp
A lldb/test/API/functionalities/scripted_process_empty_memory_region/Makefile
A lldb/test/API/functionalities/scripted_process_empty_memory_region/TestScriptedProcessEmptyMemoryRegion.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/dummy_scripted_process.py
A lldb/test/API/functionalities/scripted_process_empty_memory_region/main.c
Log Message:
-----------
[lldb] Handle an empty SBMemoryRegionInfo from scripted process (#115963)
A scripted process implementation might return an SBMemoryRegionInfo
object in its implementation of `get_memory_region_containing_address`
which will have an address 0 and size 0, without realizing the problems
this can cause. Several algorithms in lldb will try to iterate over the
MemoryRegions of the process, starting at address 0 and expecting to
iterate up to the highest vm address, stepping by the size of each
region, so a 0-length region will result in an infinite loop. Add a
check to Process::GetMemoryRegionInfo that rejects a MemoryRegion which
does not contain the requested address; a 0-length memory region will
therefor always be rejected.
rdar://139678032
Commit: 4163136e2ee121a5d7b86cb1262a524dde4a5ec4
https://github.com/llvm/llvm-project/commit/4163136e2ee121a5d7b86cb1262a524dde4a5ec4
Author: Ding Fei <fding at feysh.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Core/ConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/RangedConstraintManager.cpp
A clang/test/Analysis/solver-sym-simplification-on-assumption.c
A clang/test/Analysis/std-c-library-functions-bufsize-nocrash-with-correct-solver.c
M clang/test/Analysis/symbol-simplification-fixpoint-two-iterations.cpp
Log Message:
-----------
[analyzer][Solver] Early return if sym is concrete on assuming (#115579)
This could deduce some complex syms derived from simple ones whose
values could be constrainted to be concrete during execution, thus
reducing some overconstrainted states.
This commit also fix `unix.StdCLibraryFunctions` crash due to these
overconstrainted states being added to the graph, which is marked as
sink node (PosteriorlyOverconstrained). The 'assume' API is used in
non-dual style so the checker should protectively test whether these
newly added nodes are actually impossible.
1. The crash: https://godbolt.org/z/8KKWeKb86
2. The solver needs to solve equivalent: https://godbolt.org/z/ed8WqsbTh
Commit: e54365006a46850e25bb2546c78a7e0ec88a544e
https://github.com/llvm/llvm-project/commit/e54365006a46850e25bb2546c78a7e0ec88a544e
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/sve-mov-imm-pred.ll
Log Message:
-----------
[AArch64][SVE] Detect MOV (imm, pred, zeroing/merging) (#116032)
Add patterns to fold MOV (scalar, predicated) to MOV (imm, pred,
merging) or MOV (imm, pred, zeroing) as appropriate.
This affects the `@llvm.aarch64.sve.dup` intrinsics, which currently
generate MOV (scalar, predicated) instructions even when the
immediate forms are possible. For example:
```
svuint8_t mov_z_b(svbool_t p) {
return svdup_u8_z(p, 1);
}
```
Currently generates:
```
mov_z_b(__SVBool_t):
mov z0.b, #0
mov w8, #1
mov z0.b, p0/m, w8
ret
```
Instead of:
```
mov_z_b(__SVBool_t):
mov z0.b, p0/z, #1
ret
```
Commit: fda4a324a384af8dc57cbe0a9b6284c2e8ca073f
https://github.com/llvm/llvm-project/commit/fda4a324a384af8dc57cbe0a9b6284c2e8ca073f
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
M lldb/test/API/functionalities/scripted_process_empty_memory_region/TestScriptedProcessEmptyMemoryRegion.py
Log Message:
-----------
[lldb] Only run scripted process test on x86_64/arm64
The newly added
test/API/functionalities/scripted_process_empty_memory_region/dummy_scripted_process.py
imports
examples/python/templates/scripted_process.py
which only has register definitions for x86_64 and arm64.
Only run this test on those two architectures for now.
Commit: 91aad9bfb24347db4c4fed7b0ab5e4180ddcdc7f
https://github.com/llvm/llvm-project/commit/91aad9bfb24347db4c4fed7b0ab5e4180ddcdc7f
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/test/AST/arm-mfp8.cpp
M clang/test/CodeGen/AArch64/debug-types.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/Sema/arm-mfp8.c
M clang/test/Sema/arm-mfp8.cpp
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[Clang][AArch64]Fix Name and Mangle name for scalar fp8 (#114983)
The scalar __mfp8 type has the wrong name and mangle name in
AArch64SVEACLETypes.def
According to the ACLE[1] the name should be __mfp8
This patch fixes this problem by replacing
the Name __MFloat8_t by __mfp8
and
the Mangle Name __MFloat8_t by u6__mfp8
And we revert the incorrect typedef in NeonEmitter.
[1]https://github.com/ARM-software/acle
Commit: 182275479208492d2a1c67438ad6b4e23ca32288
https://github.com/llvm/llvm-project/commit/182275479208492d2a1c67438ad6b4e23ca32288
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/MC/AArch64/SVE2/aesd.s
M llvm/test/MC/AArch64/SVE2/aese.s
M llvm/test/MC/AArch64/SVE2/aesimc.s
M llvm/test/MC/AArch64/SVE2/aesmc.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/pmullb-128.s
M llvm/test/MC/AArch64/SVE2/pmullt-128.s
Log Message:
-----------
[AArch64] Allow SVE_AES instructions in streaming mode with SSVE_AES (#115526)
In accordance with
https://developer.arm.com/documentation/ddi0602/latest/, the following
SVE2 instructions are available in streaming SVE mode if the target has
FEAT_SSVE_AES
- PMULLB, PMULLT (128-bit element)
- AESE (vectors)
- AESD (vectors)
- AESMC
- AESIMC
This patch updates the predication of these instructions to reflect this
architecture change.
Note that the assembler predicates here always require at least one of
sve2,ssve-aes due to the following condition on
[FEAT_SVE_AES](https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/The-Armv9-0-architecture-extension?lang=en#md457-the-armv90-architecture-extension__feat_FEAT_SVE_AES)
>If FEAT_SVE_AES is implemented, then FEAT_SVE2 or FEAT_SSVE_AES is
implemented.
Commit: 8d43c880a5be1cd624052eb009d1f3983d4c5459
https://github.com/llvm/llvm-project/commit/8d43c880a5be1cd624052eb009d1f3983d4c5459
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Core/ConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/RangedConstraintManager.cpp
R clang/test/Analysis/solver-sym-simplification-on-assumption.c
R clang/test/Analysis/std-c-library-functions-bufsize-nocrash-with-correct-solver.c
M clang/test/Analysis/symbol-simplification-fixpoint-two-iterations.cpp
Log Message:
-----------
Revert "[analyzer][Solver] Early return if sym is concrete on assuming" (#116362)
Reverts llvm/llvm-project#115579
This introduced a breakage:
https://lab.llvm.org/buildbot/#/builders/46/builds/7928
Commit: 469f9d5fb8fcfe7dc42baa2daa7e230147f234de
https://github.com/llvm/llvm-project/commit/469f9d5fb8fcfe7dc42baa2daa7e230147f234de
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
Log Message:
-----------
[MLIR][Affine] Rewrite fusion helper hasNonAffineUsersOnPath for efficiency (#115588)
The hasNonAffineUsersOnPath utility used during fusion was terribly
inefficient in its approach. Rewrite it efficiently to simply work based
on use lists (sparse) instead of having to traverse all nodes of an MDG
repeatedly and all operands of all ops of each node in the relevant
range.
On large models (with 10s of thousands of loop nests), this reduces
fusion pass time by nearly 2x (cutting down several tens of seconds).
Commit: 53e92e48d0c03a2475e8517dd4c28968d84fc217
https://github.com/llvm/llvm-project/commit/53e92e48d0c03a2475e8517dd4c28968d84fc217
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/docs/doxygen.cfg.in
M clang/docs/tools/dump_ast_matchers.py
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M clang/unittests/ASTMatchers/CMakeLists.txt
A clang/utils/generate_ast_matcher_doc_tests.py
Log Message:
-----------
Reland: [clang][test] add testing for the AST matcher reference (#112168)
## Problem Statement
Previously, the examples in the AST matcher reference, which gets
generated by the Doxygen comments in `ASTMatchers.h`, were untested and
best effort.
Some of the matchers had no or wrong examples of how to use the matcher.
## Solution
This patch introduces a simple DSL around Doxygen commands to enable
testing the AST matcher documentation in a way that should be relatively
easy to use.
In `ASTMatchers.h`, most matchers are documented with a Doxygen comment.
Most of these also have a code example that aims to show what the
matcher will match, given a matcher somewhere in the documentation text.
The way that the documentation is tested, is by using Doxygen's alias
feature to declare custom aliases. These aliases forward to
`<tt>text</tt>` (which is what Doxygen's `\c` does, but for multiple
words). Using the Doxygen aliases is the obvious choice, because there
are (now) four consumers:
- people reading the header/using signature help
- the Doxygen generated documentation
- the generated HTML AST matcher reference
- (new) the generated matcher tests
This patch rewrites/extends the documentation such that all matchers
have a documented example.
The new `generate_ast_matcher_doc_tests.py` script will warn on any
undocumented matchers (but not on matchers without a Doxygen comment)
and provides diagnostics and statistics about the matchers.
The current statistics emitted by the parser are:
```text
Statistics:
doxygen_blocks : 519
missing_tests : 10
skipped_objc : 42
code_snippets : 503
matches : 820
matchers : 580
tested_matchers : 574
none_type_matchers : 6
```
The tests are generated during building, and the script will only print
something if it found an issue with the specified tests (e.g., missing
tests).
## Description
DSL for generating the tests from documentation.
TLDR:
```
\header{a.h}
\endheader <- zero or more header
\code
int a = 42;
\endcode
\compile_args{-std=c++,c23-or-later} <- optional, the std flag supports std ranges and
whole languages
\matcher{expr()} <- one or more matchers in succession
\match{42} <- one or more matches in succession
\matcher{varDecl()} <- new matcher resets the context, the above
\match will not count for this new
matcher(-group)
\match{int a = 42} <- only applies to the previous matcher (not to the
previous case)
```
The above block can be repeated inside a Doxygen command for multiple
code examples for a single matcher.
The test generation script will only look for these annotations and
ignore anything else like `\c` or the sentences where these annotations
are embedded into: `The matcher \matcher{expr()} matches the number
\match{42}.`.
### Language Grammar
[] denotes an optional, and <> denotes user-input
```
compile_args j:= \compile_args{[<compile_arg>;]<compile_arg>}
matcher_tag_key ::= type
match_tag_key ::= type || std || count || sub
matcher_tags ::= [matcher_tag_key=<value>;]matcher_tag_key=<value>
match_tags ::= [match_tag_key=<value>;]match_tag_key=<value>
matcher ::= \matcher{[matcher_tags$]<matcher>}
matchers ::= [matcher] matcher
match ::= \match{[match_tags$]<match>}
matches ::= [match] match
case ::= matchers matches
cases ::= [case] case
header-block ::= \header{<name>} <code> \endheader
code-block ::= \code <code> \endcode
testcase ::= code-block [compile_args] cases
```
### Language Standard Versions
The 'std' tag and '\compile_args' support specifying a specific language
version, a whole language and all of its versions, and thresholds
(implies ranges). Multiple arguments are passed with a ',' separator.
For a language and version to execute a tested matcher, it has to match
the specified '\compile_args' for the code, and the 'std' tag for the
matcher. Predicates for the 'std' compiler flag are used with
disjunction between languages (e.g. 'c || c++') and conjunction for all
predicates specific to each language (e.g. 'c++11-or-later &&
c++23-or-earlier').
Examples:
- `c` all available versions of C
- `c++11` only C++11
- `c++11-or-later` C++11 or later
- `c++11-or-earlier` C++11 or earlier
- `c++11-or-later,c++23-or-earlier,c` all of C and C++ between 11 and
23 (inclusive)
- `c++11-23,c` same as above
### Tags
#### `type`:
**Match types** are used to select where the string that is used to
check if a node matches comes from.
Available: `code`, `name`, `typestr`, `typeofstr`. The default is
`code`.
- `code`: Forwards to `tooling::fixit::getText(...)` and should be the
preferred way to show what matches.
- `name`: Casts the match to a `NamedDecl` and returns the result of
`getNameAsString`. Useful when the matched AST node is not easy to spell
out (`code` type), e.g., namespaces or classes with many members.
- `typestr`: Returns the result of `QualType::getAsString` for the type
derived from `Type` (otherwise, if it is derived from `Decl`, recurses
with `Node->getTypeForDecl()`)
**Matcher types** are used to mark matchers as sub-matcher with 'sub' or
as deactivated using 'none'. Testing sub-matcher is not implemented.
#### `count`:
Specifying a 'count=n' on a match will result in a test that requires
that the specified match will be matched n times. Default is 1.
#### `std`:
A match allows specifying if it matches only in specific language
versions. This may be needed when the AST differs between language
versions.
#### `sub`:
The `sub` tag on a `\match` will indicate that the match is for a node
of a bound sub-matcher.
E.g., `\matcher{expr(expr().bind("inner"))}` has a sub-matcher that
binds to `inner`, which is the value for the `sub` tag of the expected
match for the sub-matcher `\match{sub=inner$...}`. Currently,
sub-matchers are not tested in any way.
### What if ...?
#### ... I want to add a matcher?
Add a Doxygen comment to the matcher with a code example, corresponding
matchers and matches, that shows what the matcher is supposed to do.
Specify the compile arguments/supported languages if required, and run
`ninja check-clang-unit` to test the documentation.
#### ... the example I wrote is wrong?
The test-failure output of the generated test file will provide
information about
- where the generated test file is located
- which line in `ASTMatcher.h` the example is from
- which matches were: found, not-(yet)-found, expected
- in case of an unexpected match: what the node looks like using the
different `type`s
- the language version and if the test ran with a windows `-target` flag
(also in failure summary)
#### ... I don't adhere to the required order of the syntax?
The script will diagnose any found issues, such as `matcher is missing
an example` with a `file:line:` prefix,
which should provide enough information about the issue.
#### ... the script diagnoses a false-positive issue with a Doxygen
comment?
It hopefully shouldn't, but if you, e.g., added some non-matcher code
and documented it with Doxygen, then the script will consider that as a
matcher documentation. As a result, the script will print that it
detected a mismatch between the actual and the expected number of
failures. If the diagnostic truly is a false-positive, change the
`expected_failure_statistics` at the top of the
`generate_ast_matcher_doc_tests.py` file.
Fixes #57607
Fixes #63748
Commit: 649e4bf5d88fa0880e7a42f613bdc7b17568ad37
https://github.com/llvm/llvm-project/commit/649e4bf5d88fa0880e7a42f613bdc7b17568ad37
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libc++] Update the docker-compose file for actions CI
Commit: 5bbe63ec91226c0026c6f1ed726c45bb117544e0
https://github.com/llvm/llvm-project/commit/5bbe63ec91226c0026c6f1ed726c45bb117544e0
Author: anatawa12 <anatawa12 at icloud.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/test/API/commands/process/detach-resumes/TestDetachResumes.py
Log Message:
-----------
fix: Target Process may crash or freezes on detaching process on windows (#115712)
Fixes #67825 Fixes #89077
Fixes
[RIDER-99436](https://youtrack.jetbrains.com/issue/RIDER-99436/Unity-Editor-will-be-crashed-when-detaching-LLDB-debugger-in-Rider),
which is upstream issue of #67825.
This PR changes the timing of calling `DebugActiveProcessStop` to after
calling `ContinueDebugEvent` for last debugger exception.
I confirmed the crashing behavior is because we call
`DebugActiveProcessStop` before `ContinueDebugEvent` for last debugger
exception with https://github.com/anatawa12/debug-api-test.
Commit: 9122c5235ec85ce0c0ad337e862b006e7b349d84
https://github.com/llvm/llvm-project/commit/9122c5235ec85ce0c0ad337e862b006e7b349d84
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/add-imm.ll
M llvm/test/CodeGen/RISCV/addcarry.ll
M llvm/test/CodeGen/RISCV/addimm-mulimm.ll
M llvm/test/CodeGen/RISCV/alu16.ll
M llvm/test/CodeGen/RISCV/alu8.ll
M llvm/test/CodeGen/RISCV/and.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/avgceils.ll
M llvm/test/CodeGen/RISCV/avgceilu.ll
M llvm/test/CodeGen/RISCV/avgfloors.ll
M llvm/test/CodeGen/RISCV/avgflooru.ll
M llvm/test/CodeGen/RISCV/bf16-promote.ll
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/bfloat-br-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat.ll
M llvm/test/CodeGen/RISCV/bitextract-mac.ll
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
M llvm/test/CodeGen/RISCV/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/compress.ll
M llvm/test/CodeGen/RISCV/condbinops.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div-pow2.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
M llvm/test/CodeGen/RISCV/double_reduct.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/float-arith.ll
M llvm/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/fold-binop-into-select.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/fpenv.ll
M llvm/test/CodeGen/RISCV/ghccc-rv32.ll
M llvm/test/CodeGen/RISCV/ghccc-rv64.ll
M llvm/test/CodeGen/RISCV/ghccc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
M llvm/test/CodeGen/RISCV/half-arith-strict.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/half-br-fcmp.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/half-fcmp.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-mem.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-select-fcmp.ll
M llvm/test/CodeGen/RISCV/iabs.ll
M llvm/test/CodeGen/RISCV/imm.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-modifier-N.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
M llvm/test/CodeGen/RISCV/lsr-legaladdimm.ll
M llvm/test/CodeGen/RISCV/machine-combiner.ll
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/machinelicm-constant-phys-reg.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr51206.ll
M llvm/test/CodeGen/RISCV/pr56457.ll
M llvm/test/CodeGen/RISCV/pr58511.ll
M llvm/test/CodeGen/RISCV/pr65025.ll
M llvm/test/CodeGen/RISCV/pr68855.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/pr84653_pr85190.ll
M llvm/test/CodeGen/RISCV/pr95271.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/riscv-shifted-extend.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv32zbs.ll
M llvm/test/CodeGen/RISCV/rv64-double-convert.ll
M llvm/test/CodeGen/RISCV/rv64-float-convert.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
M llvm/test/CodeGen/RISCV/rv64-trampoline.ll
M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll
M llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/rvv/65704-illegal-instruction.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access-zve32x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-scalarized.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-rotate.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrol.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vror.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
M llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/frint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/frm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-combine.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mutate-prior-vsetvli-avl.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr52475.ll
M llvm/test/CodeGen/RISCV/rvv/pr61561.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/sshl_sat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfirst-byte-compare-index.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsqrt-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vzext-vp.ll
M llvm/test/CodeGen/RISCV/sadd_sat.ll
M llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shift-amount-mod.ll
M llvm/test/CodeGen/RISCV/shift-and.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shlimm-addimm.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/RISCV/signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/split-offsets.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/unroll-loop-cse.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/usub_sat_plus.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xtheadmac.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
Log Message:
-----------
[RISCV] Enable bidirectional scheduling and tracking register pressure (#115445)
This is based on other targets like PPC/AArch64 and some experiments.
This PR will only enable bidirectional scheduling and tracking register
pressure.
Disclaimer: I haven't tested it on many cores, maybe we should make
some options being features. I believe downstreams must have tried
this before, so feedbacks are welcome.
Commit: 0dfae0676014ca961fa404fd40d609f58d935b63
https://github.com/llvm/llvm-project/commit/0dfae0676014ca961fa404fd40d609f58d935b63
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
Log Message:
-----------
[analyzer] Trigger copy event when copying empty structs (3/4) (#115918)
Previously, ExprEngine would just skip copying empty structs.
Let's make trigger the copy event even for empty structs.
Split from #114835
Commit: e5ac9145ba2951b6454b13499f375284bdbde689
https://github.com/llvm/llvm-project/commit/e5ac9145ba2951b6454b13499f375284bdbde689
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/test/Analysis/taint-generic.cpp
Log Message:
-----------
[analyzer][taint] Recognize tainted LazyCompoundVals (4/4) (#115919)
returned by-value from opaque function calls.
If a struct is returned by-value from an opaque call, the "value" of the
whole struct is represented by a Conjured symbol.
Later fields may slice off smaller subregions by creating Derived
symbols of that Conjured symbol, but those are handled well, and
"isTainted" returns true as expected.
However, passing the whole struct to "isTainted" would be false, because
LazyCompoundVals and CompoundVals are not handled.
This patch addresses this.
Fixes #114270
Split from #114835
Commit: 7c8e05aa45f006401b71b37127537c4682fe16ee
https://github.com/llvm/llvm-project/commit/7c8e05aa45f006401b71b37127537c4682fe16ee
Author: Julian Nagele <j.nagele at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
Log Message:
-----------
[SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (#113915)
This patch aims to strengthen collection of loop guards by processing
PHI nodes with multiple incoming values as follows: collect guards for
all incoming values/blocks and try to merge them into a single one for
the PHI node.
The goal is to determine tighter bounds on the trip counts of scalar
tail loops after vectorization, helping to avoid unnecessary transforms.
In particular we'd like to avoid vectorizing scalar tails of
hand-vectorized loops, for example in
[Transforms/PhaseOrdering/X86/pr38280.ll](https://github.com/llvm/llvm-project/blob/231e03ba7e82896847dbc27d457dbb208f04699c/llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll),
discovered via https://github.com/llvm/llvm-project/pull/108190
Compile-time impact: https://llvm-compile-time-tracker.com/compare.php?from=a55248789ed3f653740e0723d016203b9d585f26&to=500e4c46e79f60b93b11a752698c520e345948e3&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/113915
Commit: e9fc2faf0c2551eb4f9f932da09bdf1af24ac7e2
https://github.com/llvm/llvm-project/commit/e9fc2faf0c2551eb4f9f932da09bdf1af24ac7e2
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
Log Message:
-----------
[flang][CodeGen] fix bug hoisting allocas using a shared constant arg (#116251)
When hoisting the allocas with a constant integer size, the constant
integer was moved to where the alloca is hoisted to unconditionally.
By CodeGen there have been various iterations of mlir canonicalization
and dead code elimination. This can cause lots of unrelated bits of code
to share the same constant values. If for some reason the alloca
couldn't be hoisted all of the way to the entry block of the function,
moving the constant might result in it no-longer dominating some of the
remaining uses.
In theory, there should be dominance analysis to ensure the location of
the constant does dominate all uses of it. But those constants are
effectively free anyway (they aren't even separate instructions in LLVM
IR), so it is less expensive just to leave the old one where it was and
insert a new one we know for sure is immediately before the alloca.
Commit: 4e1db6a318775d9d0c49357baea6ca02fe5b5389
https://github.com/llvm/llvm-project/commit/4e1db6a318775d9d0c49357baea6ca02fe5b5389
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[AArch64][SVE] Add AArch64ISD nodes for wide add instructions (#115895)
When lowering from a partial reduction to a pair of wide adds,
previously the corresponding intrinsics were returned as nodes. Now
there are AArch64ISD nodes that are returned.
Commit: e5a62d45fb1aa3b97ae47588cdc61d0d28f0c1a7
https://github.com/llvm/llvm-project/commit/e5a62d45fb1aa3b97ae47588cdc61d0d28f0c1a7
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
Log Message:
-----------
[StaticAnalyzer] Fix -Wunused-but-set-variable in ExprEngineCXX.cpp (NFC)
/llvm-project/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp:48:24:
error: variable 'ThisRD' set but not used [-Werror,-Wunused-but-set-variable]
const CXXRecordDecl *ThisRD = nullptr;
^
1 error generated.
Commit: 56720a47bb421c487d33aabad86e44e7cf2790bf
https://github.com/llvm/llvm-project/commit/56720a47bb421c487d33aabad86e44e7cf2790bf
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/CodeGen/X86/vec-strict-cmp-128.ll
Log Message:
-----------
[X86][StrictFP] Add missing patterns for AVX512 fmin/fmax (#116240)
Fix crash after #109512, see https://godbolt.org/z/M6aP5Ka4j
Commit: 10b048c8922d746b14e991f468e00b3ca67c9d95
https://github.com/llvm/llvm-project/commit/10b048c8922d746b14e991f468e00b3ca67c9d95
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
A lldb/test/API/lang/cpp/forward/Makefile
A lldb/test/API/lang/cpp/forward/TestCPPForwardDeclaration.py
A lldb/test/API/lang/cpp/forward/foo.cpp
A lldb/test/API/lang/cpp/forward/foo.h
A lldb/test/API/lang/cpp/forward/main.cpp
Log Message:
-----------
[lldb] Make CompilerDecl::GetName (always) return template args (#116068)
I ran into this while look at a different bug (patch coming soon). This
function has only two callers. The first is SBTypeStaticField::GetName
(which doesn't care about templates), and the other is
CompilerDecl::GetCompilerContext (in the TypeQuery constructor), which
does want template arguments.
This function was (normally) returning the name without template args.
Since this code is only used when looking up a type in another shared
library, the odds of running into this bug are relatively low, but I add
a test to demonstrate the scenario and the fix for it nonetheless.
Amazingly (and scarily), this test actually passes without this change
in the default configuration -- and only fails with
-gsimple-template-names. The reason for that is that in the
non-simplified case we create a regular CXXRecordDecl whose name is
"bar<int>" (instead of a template record "foo" with an argument of
"int"). When evaluating the expression, we are somehow able to replace
this with a proper template specialization decl.
Commit: 33694245cba0e935f516edf9d20c9062692b1289
https://github.com/llvm/llvm-project/commit/33694245cba0e935f516edf9d20c9062692b1289
Author: Guozhi Wei <carrot at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/extract-select-agg.ll
Log Message:
-----------
[InstCombine] Add additional tests for extract of select (NFC)
Tests from https://github.com/llvm/llvm-project/pull/115969.
Commit: 58f107f38838275f0727521558cc06646d8c205d
https://github.com/llvm/llvm-project/commit/58f107f38838275f0727521558cc06646d8c205d
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
Log Message:
-----------
[AMDGPU] Remove unused template argument after #113634. NFC.
Commit: 0b0d61101fa0648a09ebc1dc7a26ee9a89e91be8
https://github.com/llvm/llvm-project/commit/0b0d61101fa0648a09ebc1dc7a26ee9a89e91be8
Author: Michael Toguchi <michael.d.toguchi at intel.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
A clang/lib/Driver/ToolChains/SYCL.cpp
A clang/lib/Driver/ToolChains/SYCL.h
A clang/test/Driver/sycl-offload-jit.cpp
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
[Driver][SYCL] Add initial SYCL offload compilation support (#107493)
Introduces the SYCL based toolchain and initial toolchain construction
when using the '-fsycl' option. This option will enable SYCL based
offloading, creating a SPIR-V based IR file packaged into the compiled
host object.
This includes early support for creating the host/device object using
the new offloading model. The device object is created using the
spir64-unknown-unknown target triple.
New/Updated Options:
-fsycl Enables SYCL offloading for host and device
-fsycl-device-only
Enables device only compilation for SYCL
-fsycl-host-only
Enables host only compilation for SYCL
RFC Reference:
https://discourse.llvm.org/t/rfc-sycl-driver-enhancements/74092
Commit: 3d474738df573b89eedf344463a0c9a005078f1d
https://github.com/llvm/llvm-project/commit/3d474738df573b89eedf344463a0c9a005078f1d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 0b0d61101fa0
Commit: 6d058317e60c25b71df8b8dc45b69e5202362678
https://github.com/llvm/llvm-project/commit/6d058317e60c25b71df8b8dc45b69e5202362678
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/test/CodeGen/NVPTX/i1-param.ll
A llvm/test/CodeGen/NVPTX/kernel-param-align.ll
Log Message:
-----------
Enable .ptr .global .align attributes for kernel attributes for CUDA (#114874)
Emit .ptr, .address-space, and .align attributes for kernel
args in CUDA (previously handled only for OpenCL).
This allows for more vectorization opportunities if the PTX consumer
is able to know about the pointer alignments.
If no alignment is explicitly specified, .align 1 will be emitted
to match the LLVM IR semantics in this case.
PTX ISA doc -
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#kernel-parameter-attribute-ptr
This is a rework of the original patch proposed in #79646
---------
Co-authored-by: Vandana <vandanak at nvidia.com>
Commit: 40afff7bd95090a75bc68a0d26b8017cc0ae65c1
https://github.com/llvm/llvm-project/commit/40afff7bd95090a75bc68a0d26b8017cc0ae65c1
Author: lfrenot <leon.frenot at ens-lyon.fr>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
A mlir/test/Target/LLVMIR/Import/disjoint.ll
A mlir/test/Target/LLVMIR/disjoint.mlir
Log Message:
-----------
[mlir][LLVM] Add disjoint flag (#115855)
The implementation is mostly based on the one existing for the exact
flag.
disjoint means that for each bit, that bit is zero in at least one of
the inputs. This allows the Or to be treated as an Add since no carry
can occur from any bit. If the disjoint keyword is present, the result
value of the or is a [poison
value](https://llvm.org/docs/LangRef.html#poisonvalues) if both inputs
have a one in the same bit position. For vectors, only the element
containing the bit is poison.
Commit: b9d678d22f74ebd6e34f0a3501fb01d3d80984e7
https://github.com/llvm/llvm-project/commit/b9d678d22f74ebd6e34f0a3501fb01d3d80984e7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang/include/clang/AST/CanonicalType.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaFixItUtils.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/CodeGen/target-addrspace.cpp
A clang/test/Sema/amdgcn-address-spaces.c
A clang/test/Sema/nvptx-address-spaces.c
Log Message:
-----------
[Clang] Use TargetInfo when deciding if an address space is compatible (#115777)
Summary:
Address spaces are used in several embedded and GPU targets to describe
accesses to different types of memory. Currently we use the address
space enumerations to control which address spaces are considered
supersets of eachother, however this is also a target level property as
described by the C standard's passing mentions. This patch allows the
address space checks to use the target information to decide if a
pointer conversion is legal. For AMDGPU and NVPTX, all supported address
spaces can be converted to the default address space.
More semantic checks can be added on top of this, for now I'm mainly
looking to get more standard semantics working for C/C++. Right now the
address space conversions must all be done explicitly in C/C++ unlike
the offloading languages which define their own custom address spaces
that just map to the same target specific ones anyway. The main question
is if this behavior is a function of the target or the language.
Commit: cb4b943294fad949b1965f3eea2c5b492e7e3eba
https://github.com/llvm/llvm-project/commit/cb4b943294fad949b1965f3eea2c5b492e7e3eba
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Aaron Puchert as the maintainer for thread safety analysis (#115920)
Aaron has been helping out with TSA for several years and is highly
knowledgeable about the implementation.
Commit: d33a5bfa6032486747a93d142a24498755f882c2
https://github.com/llvm/llvm-project/commit/d33a5bfa6032486747a93d142a24498755f882c2
Author: Tom Natan <tomnatan at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
Log Message:
-----------
Revert "[NVPTX] Add folding for cvt.rn.bf16x2.f32" (#116376)
Reverts llvm/llvm-project#116109
This change is breaking triton tests (results in huge numeric
disparities, e.g.
https://github.com/triton-lang/triton/blob/main/python/test/unit/language/test_core.py),
we'll need to revert until a fix forward can be merged.
Commit: 62c3c1cad78b3354432fe44285f3472d9c93a45a
https://github.com/llvm/llvm-project/commit/62c3c1cad78b3354432fe44285f3472d9c93a45a
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
R clang/lib/Driver/ToolChains/SYCL.cpp
R clang/lib/Driver/ToolChains/SYCL.h
R clang/test/Driver/sycl-offload-jit.cpp
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
Revert "[Driver][SYCL] Add initial SYCL offload compilation support" (#116381)
Reverts llvm/llvm-project#107493
Failing bots include:
https://lab.llvm.org/buildbot/#/builders/190/builds/9546
https://lab.llvm.org/buildbot/#/builders/46/builds/7938
Commit: a41ae90c0c9f063de1231b454da2631c07b44535
https://github.com/llvm/llvm-project/commit/a41ae90c0c9f063de1231b454da2631c07b44535
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
Log Message:
-----------
[MergeLodstore] Add tests for preserving metadata when sinking stores.
Commit: e0b76bafde197c4813aa52dbcfeaf6bd1f9d96da
https://github.com/llvm/llvm-project/commit/e0b76bafde197c4813aa52dbcfeaf6bd1f9d96da
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
Log Message:
-----------
[lldb][test] Disable inline_sites_live.cpp for non-Windows targets (#116196)
This is a follow-up for the conversation here
https://github.com/llvm/llvm-project/pull/115722/.
This test is designed for Windows target/PDB format, so it shouldn't be
built and run for DWARF/etc.
Commit: 9cbf2dd6f3900045f1bbbdf44142f572d8f3b339
https://github.com/llvm/llvm-project/commit/9cbf2dd6f3900045f1bbbdf44142f572d8f3b339
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Analysis/ProgramPoint.cpp
M clang/utils/analyzer/exploded-graph-rewriter.py
Log Message:
-----------
[analyzer] Print the callee name in CallEnter in exploded-graph-rewriter (#116225)
Commit: 9d02264b03ea9cff356c2f1aecb9606864a671f2
https://github.com/llvm/llvm-project/commit/9d02264b03ea9cff356c2f1aecb9606864a671f2
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-nonzero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-zero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize.ll
M llvm/test/CodeGen/RISCV/global-merge-offset.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
Log Message:
-----------
[RISCV] Enable global merging by default (#115495)
>From the discussion at the round-table at the RISC-V Summit it was clear
people see cases where global merging would help. So the direction of
enabling it by default and iteratively working to enable it in more
cases or to improve the heuristics seems sensible. This patch tries to
make a minimal step in that direction.
Commit: 4b928608f8865689d51bf7c9646a049328b9ac62
https://github.com/llvm/llvm-project/commit/4b928608f8865689d51bf7c9646a049328b9ac62
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 62c3c1cad78b
Commit: 35710ab392b50c815765f03c12409147502dfb86
https://github.com/llvm/llvm-project/commit/35710ab392b50c815765f03c12409147502dfb86
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrDFP.td
M llvm/test/MC/Disassembler/SystemZ/insns.txt
M llvm/test/MC/SystemZ/insn-bad.s
M llvm/test/MC/SystemZ/insn-good.s
Log Message:
-----------
[SystemZ] Fix wrong register class for some DFP instructions
Certain DFP instructions have GPR arguments, which are currently
incorrectly treated as FPR registers. Since we do not use DFP
in codegen, this only affects the assembler and disassembler.
Commit: 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3
https://github.com/llvm/llvm-project/commit/7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
A llvm/test/CodeGen/RISCV/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
A llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
[IR] Initial introduction of llvm.experimental.memset_pattern (#97583)
Supersedes the draft PR #94992, taking a different approach following
feedback:
* Lower in PreISelIntrinsicLowering
* Don't require that the number of bytes to set is a compile-time
constant
* Define llvm.memset_pattern rather than llvm.memset_pattern.inline
As discussed in the [RFC
thread](https://discourse.llvm.org/t/rfc-introducing-an-llvm-memset-pattern-inline-intrinsic/79496),
the intent is that the intrinsic will be lowered to loops, a sequence of
stores, or libcalls depending on the expected cost and availability of
libcalls on the target. Right now, there's just a single lowering path
that aims to handle all cases. My intent would be to follow up with
additional PRs that add additional optimisations when possible (e.g.
when libcalls are available, when arguments are known to be constant
etc).
Commit: fa5a10d6313e94795739c79eb3c0774d5f8e3461
https://github.com/llvm/llvm-project/commit/fa5a10d6313e94795739c79eb3c0774d5f8e3461
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaCUDA.cpp
Log Message:
-----------
[clang] [NFC] Merge two ifs to a single one (#116226)
Commit: 8ee638fd175245eff88d77e1607e478db237dd41
https://github.com/llvm/llvm-project/commit/8ee638fd175245eff88d77e1607e478db237dd41
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/Transforms/HotColdSplit/X86/do-not-split.ll
M llvm/test/Transforms/HotColdSplit/addr-taken.ll
M llvm/test/Transforms/HotColdSplit/apply-noreturn-bonus.ll
M llvm/test/Transforms/HotColdSplit/apply-penalty-for-inputs.ll
M llvm/test/Transforms/HotColdSplit/apply-penalty-for-outputs.ll
M llvm/test/Transforms/HotColdSplit/eh-typeid-for.ll
M llvm/test/Transforms/HotColdSplit/forward-dfs-reaches-marked-block.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-2.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-3.ll
M llvm/test/Transforms/HotColdSplit/minsize.ll
M llvm/test/Transforms/HotColdSplit/outline-cold-asm.ll
M llvm/test/Transforms/HotColdSplit/outline-disjoint-diamonds.ll
M llvm/test/Transforms/HotColdSplit/phi-with-distinct-outlined-values.ll
M llvm/test/Transforms/HotColdSplit/section-splitting-custom.ll
M llvm/test/Transforms/HotColdSplit/section-splitting-default.ll
M llvm/test/Transforms/HotColdSplit/split-cold-2.ll
M llvm/test/Transforms/HotColdSplit/succ-block-with-self-edge.ll
M llvm/test/Transforms/HotColdSplit/swifterror.ll
M llvm/test/Transforms/IndVarSimplify/2003-12-10-RemoveInstrCrash.ll
M llvm/test/Transforms/IndVarSimplify/2003-12-15-Crash.ll
M llvm/test/Transforms/IndVarSimplify/2005-11-18-Crash.ll
M llvm/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
M llvm/test/Transforms/IndVarSimplify/2009-05-24-useafterfree.ll
M llvm/test/Transforms/IndVarSimplify/2011-09-10-widen-nsw.ll
M llvm/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll
M llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll
M llvm/test/Transforms/IndVarSimplify/2014-06-21-congruent-constant.ll
M llvm/test/Transforms/IndVarSimplify/2020-12-15-trunc-bug-expensive-range-inference.ll
M llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
M llvm/test/Transforms/IndVarSimplify/X86/2011-11-15-multiexit.ll
M llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll
M llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr24804.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr24956.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr25576.ll
M llvm/test/Transforms/IndVarSimplify/X86/variable-stride-ivs-1.ll
M llvm/test/Transforms/IndVarSimplify/X86/verify-scev.ll
M llvm/test/Transforms/IndVarSimplify/avoid-i0.ll
M llvm/test/Transforms/IndVarSimplify/const_phi.ll
M llvm/test/Transforms/IndVarSimplify/crash.ll
M llvm/test/Transforms/IndVarSimplify/divide-pointer.ll
M llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
M llvm/test/Transforms/IndVarSimplify/lcssa-preservation.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate11.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate7.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate8.ll
M llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
M llvm/test/Transforms/IndVarSimplify/phi-uses-value-multiple-times.ll
M llvm/test/Transforms/IndVarSimplify/pr25578.ll
M llvm/test/Transforms/IndVarSimplify/pr26974.ll
M llvm/test/Transforms/IndVarSimplify/pr40454.ll
M llvm/test/Transforms/IndVarSimplify/sentinel.ll
M llvm/test/Transforms/IndVarSimplify/single-element-range.ll
M llvm/test/Transforms/Inline/infinite-loop-two-predecessors.ll
M llvm/test/Transforms/Inline/inline-indirect-chain.ll
M llvm/test/Transforms/Inline/inline-invoke-with-asm-call.ll
M llvm/test/Transforms/Inline/inline_cleanup.ll
M llvm/test/Transforms/Inline/pr33637.ll
M llvm/test/Transforms/Inline/pr53206.ll
M llvm/test/Transforms/InstSimplify/dead-code-removal.ll
M llvm/test/Transforms/InstSimplify/require-dominator.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#116161)
This PR removes tests with `br i1 undef` under
`llvm/tests/Transforms/HotColdSplit` and `llvm/tests/Transforms/I*`.
Commit: 6c1fc8213ee40896681ed84a3f91b1b5b56a4de8
https://github.com/llvm/llvm-project/commit/6c1fc8213ee40896681ed84a3f91b1b5b56a4de8
Author: Nikolay Panchenko <npanchen at modular.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/sub-gep.ll
Log Message:
-----------
[InstCombine] fold `sub(zext(ptrtoint),zext(ptrtoint))` (#115369)
On a 32-bit target if pointer arithmetic with `addrspace` is used in i64
computation, the missed folding in InstCombine results to suboptimal
performance, unlike same code compiled for 64bit target.
Commit: 6b9952759f66c8bc62ef4c6700f586053f009296
https://github.com/llvm/llvm-project/commit/6b9952759f66c8bc62ef4c6700f586053f009296
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/PhaseOrdering/switch-sext.ll
M llvm/test/Transforms/SimplifyCFG/ForwardSwitchConditionToPHI.ll
M llvm/test/Transforms/SimplifyCFG/HoistCode.ll
A llvm/test/Transforms/SimplifyCFG/switch-dup-bbs.ll
M llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll
Log Message:
-----------
[SimplifyCFG] Simplify switch instruction that has duplicate arms (#114262)
I noticed that the two C functions emitted different IR:
```
int switch_duplicate_arms(int switch_val, int v, int w) {
switch (switch_val) {
default:
break;
case 0:
w = v;
break;
case 1:
w = v;
break;
}
return w;
}
int if_duplicate_arms(int switch_val, int v, int w) {
if (switch_val == 0)
w = v;
else if (switch_val == 1)
w = v;
return v0;
}
```
We generate IR that looks like this:
```
define i32 @switch_duplicate_arms(i32 %0, i32 %1, i32 %2, i32 %3) {
switch i32 %1, label %7 [
i32 0, label %5
i32 1, label %6
]
5:
br label %7
6:
br label %7
7:
%8 = phi i32 [ %3, %4 ], [ %2, %6 ], [ %2, %5 ]
ret i32 %8
}
define i32 @if_duplicate_arms(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp ult i32 %1, 2
%6 = select i1 %5, i32 %2, i32 %3
ret i32 %6
}
```
For `switch_duplicate_arms`, taking case 0 and 1 are the same since %5
and %6
branch to the same location and the incoming values for %8 are the same
from
those blocks. We could remove one on the duplicate switch targets and
update
the switch with the single target.
On RISC-V, prior to this patch, we generate the following code:
```
switch_duplicate_arms:
li a4, 1
beq a1, a4, .LBB0_2
mv a0, a3
bnez a1, .LBB0_3
.LBB0_2:
mv a0, a2
.LBB0_3:
ret
if_duplicate_arms:
li a4, 2
mv a0, a2
bltu a1, a4, .LBB1_2
mv a0, a3
.LBB1_2:
ret
```
After this patch, the O3 code is optimized to the icmp + select pair,
which
gives us the same code gen as `if_duplicate_arms`, as desired. This
results
is one less branch instruction in the final assembly.
This may help with both code size and further switch simplification. I
found
that this patch causes no significant impact to spec2006/int/ref and
spec2017/intrate/ref.
---------
Co-authored-by: Min Hsu <min at myhsu.dev>
Commit: b828608ca1313a0b80055840bd896c7eb6709366
https://github.com/llvm/llvm-project/commit/b828608ca1313a0b80055840bd896c7eb6709366
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add maintainer for NumericalStabilitySanitizer (NFC) (#115899)
@alexander-shaposhnikov is already listed as the nsan maintainer on the
compiler-rt side
(https://github.com/llvm/llvm-project/blob/a55248789ed3f653740e0723d016203b9d585f26/compiler-rt/CODE_OWNERS.TXT#L75-L77),
so I'd like to mirror this to the LLVM part of the sanitizer as well.
Commit: dad9e4a1657b74bc351c1e98ce4774f32fdc77fc
https://github.com/llvm/llvm-project/commit/dad9e4a1657b74bc351c1e98ce4774f32fdc77fc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/XCore/float-intrinsics.ll
Log Message:
-----------
[RuntimeLibCalls] Consistently disable unavailable libcalls (#116214)
The logic for marking runtime libcalls unavailable currently duplicates
essentially the same logic for some random subset of targets, where
someone reported an issue and then someone went and fixed the issue for
that specific target only. However, the availability for most of these
is completely target independent. In particular:
* MULO_I128 is never available in libgcc
* Various I128 libcalls are not available for 32-bit targets in libgcc
* powi is never available in MSVCRT
Unify the logic for these, so we don't miss any targets. This fixes
https://github.com/llvm/llvm-project/issues/16778 on AArch64, which is
one of the targets that was previously missed in this logic.
Commit: 0fb8fac5d6c10610574e6e472670823eaff0c949
https://github.com/llvm/llvm-project/commit/0fb8fac5d6c10610574e6e472670823eaff0c949
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
R llvm/test/CodeGen/RISCV/memset-pattern.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
R llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
R llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
Revert "[IR] Initial introduction of llvm.experimental.memset_pattern (#97583)"
This reverts commit 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3.
Recent scheduling changes means tests need to be re-generated. Reverting
to green while I do that.
Commit: a9d94834cd91fe93d8723ac4232fe7becdca61a7
https://github.com/llvm/llvm-project/commit/a9d94834cd91fe93d8723ac4232fe7becdca61a7
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
A llvm/test/tools/llvm-dlltool/arm64ec-invalid-name.test
A llvm/test/tools/llvm-lib/arm64ec-invalid-name.test
Log Message:
-----------
[llvm-lib][llvm-dlltool] Fix handling of invalid ARM64EC function names (#116250)
This is a follow-up to #115567. Emit an error for invalid function
names, similar to MSVC's `lib.exe` behavior.
Returning an error from `writeImportLibrary` exposed bugs in error
handling by its callers, which have been addressed in this patch.
Commit: e6cc58922f5f36e1eecdaf2f44a5ef7501acc139
https://github.com/llvm/llvm-project/commit/e6cc58922f5f36e1eecdaf2f44a5ef7501acc139
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LLD] Add ARM64EC release note (#116282)
Commit: 298127dcbe2ecd1f3c49c2109ac96654778f20be
https://github.com/llvm/llvm-project/commit/298127dcbe2ecd1f3c49c2109ac96654778f20be
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
A llvm/test/CodeGen/RISCV/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
A llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
Reapply [IR] Initial introduction of llvm.experimental.memset_pattern (#97583)
Relands 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3 after regenerating the
test case.
Supersedes the draft PR #94992, taking a different approach following
feedback:
* Lower in PreISelIntrinsicLowering
* Don't require that the number of bytes to set is a compile-time
constant
* Define llvm.memset_pattern rather than llvm.memset_pattern.inline
As discussed in the [RFC
thread](https://discourse.llvm.org/t/rfc-introducing-an-llvm-memset-pattern-inline-intrinsic/79496),
the intent is that the intrinsic will be lowered to loops, a sequence of
stores, or libcalls depending on the expected cost and availability of
libcalls on the target. Right now, there's just a single lowering path
that aims to handle all cases. My intent would be to follow up with
additional PRs that add additional optimisations when possible (e.g.
when libcalls are available, when arguments are known to be constant
etc).
Commit: 4d6a5fc702e568b0456c4d8f9e2307eb6d81e955
https://github.com/llvm/llvm-project/commit/4d6a5fc702e568b0456c4d8f9e2307eb6d81e955
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/DriverOptions.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
Log Message:
-----------
[Driver] Remove unused includes (NFC) (#116316)
Identified with misc-include-cleaner.
Commit: d73d5c8c9b56fadcbd89dd1dab71dca2c8f5e38d
https://github.com/llvm/llvm-project/commit/d73d5c8c9b56fadcbd89dd1dab71dca2c8f5e38d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
Log Message:
-----------
[MC] Remove unused includes (NFC) (#116317)
Identified with misc-include-cleaner.
Commit: 43570a2841e2a8f1efd00503beee751cc1e72513
https://github.com/llvm/llvm-project/commit/43570a2841e2a8f1efd00503beee751cc1e72513
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyNullifyDebugValueLists.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetObjectFile.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
Log Message:
-----------
[WebAssembly] Remove unused includes (NFC) (#116318)
Identified with misc-include-cleaner.
Commit: af3295bd3dccd91c102d6a9b0d30c30844967e02
https://github.com/llvm/llvm-project/commit/af3295bd3dccd91c102d6a9b0d30c30844967e02
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
Log Message:
-----------
[SLP]Enable splat ordering for loads
Enables splat support for loads with lanes> 2 or number of operands> 2.
Allows better detect splats of loads and reduces number of shuffles in
some cases.
X86, AVX512, -O3+LTO
Metric: size..text
results results0 diff
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 154867.00 156723.00 1.2%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12467735.00 12468023.00 0.0%
Better vectorization quality
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/115173
Commit: 1cab8d9adb7e039b73c87fd3b9a1186b76e198f5
https://github.com/llvm/llvm-project/commit/1cab8d9adb7e039b73c87fd3b9a1186b76e198f5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add maintainers for SandboxIR and SandboxVectorizer (#115896)
I'm currently looking through some recently added components, and
noticed that SandboxIR/SandboxVec don't have a listed maintainer. I'd
like to propose vporpo and slackito as the maintainers for this
component. vporpo is the one who originally proposed this and drives
most of the implementation effort. slackito is the second most active
contributor.
Commit: cdda76a8cfc3b0c5def836f68f6f58efba03e01c
https://github.com/llvm/llvm-project/commit/cdda76a8cfc3b0c5def836f68f6f58efba03e01c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/arm64ec-invalid-name.s
Log Message:
-----------
[LLD][COFF] Fix handling of invalid ARM64EC function names (#116252)
Since these symbols cannot be mangled or demangled, there is no symbol
to check for conflicts in `checkLazyECPair`, nor is there an alias to
create in `addUndefined`. Attempting to create an import library with
such symbols results in an error; the patch includes a test to ensure
the error is handled correctly.
This is a follow-up to #115567.
Commit: bc3b0fadd5120bd88ed6635583941f7763523c0a
https://github.com/llvm/llvm-project/commit/bc3b0fadd5120bd88ed6635583941f7763523c0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/AST/Type.h
Log Message:
-----------
[AST] Remove unnecessary include (NFC)
This was introduced in #115777, but isn't actually used.
Commit: f6e1d64458130643377511baeec430de67ddddfb
https://github.com/llvm/llvm-project/commit/f6e1d64458130643377511baeec430de67ddddfb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/segmented-stores.ll
Log Message:
-----------
[SLP]Enable interleaved stores support
Enables interaleaved stores, results in better estimation for segmented
stores for RISC-V
Reviewers: preames, topperc, RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/115354
Commit: 9513f2fdf2ad50f55726154a6b6a4aa463bc457f
https://github.com/llvm/llvm-project/commit/9513f2fdf2ad50f55726154a6b6a4aa463bc457f
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/test/ThinLTO/X86/memprof-aliased-location1.ll
M llvm/test/ThinLTO/X86/memprof-aliased-location2.ll
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/aliased-location1.ll
M llvm/test/Transforms/MemProfContextDisambiguation/aliased-location2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Verifier/memprof-metadata-bad.ll
Log Message:
-----------
[MemProf] Print full context hash when reporting hinted bytes (#114465)
Improve the information printed when -memprof-report-hinted-sizes is
enabled. Now print the full context hash computed from the original
profile, similar to what we do when reporting matching statistics. This
will make it easier to correlate with the profile.
Note that the full context hash must be computed at profile match time
and saved in the metadata and summary, because we may trim the context
during matching when it isn't needed for distinguishing hotness.
Similarly, due to the context trimming, we may have more than one full
context id and total size pair per MIB in the metadata and summary,
which now get a list of these pairs.
Remove the old aggregate size from the metadata and summary support.
One other change from the prior support is that we no longer write the
size information into the combined index for the LTO backends, which
don't use this information, which reduces unnecessary bloat in
distributed index files.
Commit: 3eb1bc5edfc69895bfdc0a8ddd31af3969e6aacc
https://github.com/llvm/llvm-project/commit/3eb1bc5edfc69895bfdc0a8ddd31af3969e6aacc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Clang] Change 'gpuintrin.h' to use target specific address spceas
Summary:
A recent patch allowed the target specific address spcaces to be handled
correctly. The one downside here is that we no long get semantic errors
for initializers, but that will error in the backend anyway.
Commit: 798a8941824dc2f83a169812e0edf7971d5f772b
https://github.com/llvm/llvm-project/commit/798a8941824dc2f83a169812e0edf7971d5f772b
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/test/MC/SystemZ/insn-bad-z13.s
M llvm/test/MC/SystemZ/insn-good-z13.s
M llvm/test/MC/SystemZ/insn-good.s
M llvm/test/MC/SystemZ/tokens.s
Log Message:
-----------
[SystemZ] Fix address operand parsing incompatibilities with GAS
The LLVM AsmParser showed different behavior compared to GAS when
parsing address operands in the following two ways:
- If the address operand only has a single register (no comma),
it is always interpreted as base register by GAS, even in the
vector-index case (vgef etc.) This means the following is
actually incorrect usage, as the base cannot be a vector
register: vgef %v0, 0(%v1), 0.
- GAS allows specifying a missing base register by using a
comma after the first register, e.g. vgef %v0, 0(%v1,), 0.
Commit: ff7fca7fa8646d73f884ab8a351e4178499c4d05
https://github.com/llvm/llvm-project/commit/ff7fca7fa8646d73f884ab8a351e4178499c4d05
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Lower/StatementContext.h
M flang/lib/Lower/Bridge.cpp
A flang/test/Lower/CUDA/cuda-return01.cuf
A flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Support memory cleanup at a return statement (#116304)
We generate `cuf.free` and `func.return` twice if a return statement
exists at the end of program.
```f90
program test
integer, device :: a(10)
return
end
```
```
% flang -x cuda test.cuf -mmlir --mlir-print-ir-after-all
error: loc("/path/to/test.cuf":3:3): 'func.return' op must be the last operation in the parent block
// -----// IR Dump After Fortran::lower::VerifierPass Failed () //----- //
```
Dumped IR:
```mlir
"func.func"() <{function_type = () -> (), sym_name = "_QQmain"}> ({
...
"cuf.free"(%5#1) <{data_attr = #cuf.cuda<device>}> : (!fir.ref<!fir.array<10xi32>>) -> ()
"func.return"() : () -> ()
"cuf.free"(%5#1) <{data_attr = #cuf.cuda<device>}> : (!fir.ref<!fir.array<10xi32>>) -> ()
"func.return"() : () -> ()
}
...
```
The routine `genExitRoutine` in `Bridge.cpp` is guarded by
`blockIsUnterminated()` to make sure that `func.return` is generated
only at the end of a block. However, we redundantly run
`bridge.fctCtx().finalizeAndKeep()` before `genExitRoutine` in this
case, resulting in two pairs of `cuf.free` and `func.return`. This PR
fixes `Bridge.cpp` by using `blockIsUnterminated()` to guard
`finalizeAndKeep` as well.
Commit: 0b344b4feff5cd04d63db7b914d783fd941fbda0
https://github.com/llvm/llvm-project/commit/0b344b4feff5cd04d63db7b914d783fd941fbda0
Author: higher-performance <higher.performance.github at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
Log Message:
-----------
Extend bugprone-use-after-move check to handle std::optional::reset() and std::any::reset() (#114255)
These need to be handled similarly to the standard smart pointers; they
all have a `reset` method.
Commit: 31ee667eb02c68ad186cb129f9dcb72a9d2222bc
https://github.com/llvm/llvm-project/commit/31ee667eb02c68ad186cb129f9dcb72a9d2222bc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
Log Message:
-----------
[Clang] Fix gpuintrin_lang test for OpenCL
Commit: f37bc8cfbfd47c89aedd43b68fd09b4525612f16
https://github.com/llvm/llvm-project/commit/f37bc8cfbfd47c89aedd43b68fd09b4525612f16
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/debugloc-load-select.ll
Log Message:
-----------
[DebugInfo][GVN] Propagate DebugLoc from load-of-select to select (#114233)
When replacing a load from a selected pointer with a select of the known
stored values, we currently assign no DebugLoc to the select; this patch
propagates the load's DebugLoc to the new select, since it is a direct
replacement.
Commit: fd5fcfb1e620823e4ec896fb8e0520c1e7286cdb
https://github.com/llvm/llvm-project/commit/fd5fcfb1e620823e4ec896fb8e0520c1e7286cdb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang] Add 'gpuintrin.h' to the release notes (#116410)
Commit: e67e09a77ea1e4802c0f6bc0409c9f5e9d1fae9a
https://github.com/llvm/llvm-project/commit/e67e09a77ea1e4802c0f6bc0409c9f5e9d1fae9a
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
M flang/test/Lower/OpenMP/Todo/reduction-modifiers.f90
A flang/test/Parser/OpenMP/scan.f90
M flang/test/Semantics/OpenMP/do05.f90
M flang/test/Semantics/OpenMP/nested-barrier.f90
M flang/test/Semantics/OpenMP/nested-master.f90
M flang/test/Semantics/OpenMP/nested-simd.f90
M flang/test/Semantics/OpenMP/ordered-simd.f90
M flang/test/Semantics/OpenMP/reduction-modifiers.f90
A flang/test/Semantics/OpenMP/scan1.f90
A flang/test/Semantics/OpenMP/scan2.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (#102792)
Commit: 92cc8051932c0e3dd3b20cb30af86621e8527f5d
https://github.com/llvm/llvm-project/commit/92cc8051932c0e3dd3b20cb30af86621e8527f5d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
Log Message:
-----------
[IR] Add ICmpInst::isCommutative and FCmpInst::isCommutative static wrappers (#116398)
Add static variants that can used with the Predicate enum directly.
Commit: 2188a56a752a886c43203d54b1079686b64ff49c
https://github.com/llvm/llvm-project/commit/2188a56a752a886c43203d54b1079686b64ff49c
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/dbgloc-merge-invoke.ll
Log Message:
-----------
[DebugInfo][SimplifyCFG] Fully propagate merged invoke DILocations (#114235)
Currently when we merge invokes as part of SimplifyCFG we apply a merge
of the invoke DILocations to the merged invoke. We also insert an
unconditional branch to the merged invoke at the positions previously
occupied by the original invokes; as this branch is part of the
substitution for the invoke it has replaced, we should propagate the
original invoke DebugLoc to it.
Commit: 2d48489cc35ec9bb1c15ff115595e62d67ca8989
https://github.com/llvm/llvm-project/commit/2d48489cc35ec9bb1c15ff115595e62d67ca8989
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/darwin-subframeworks.c
M llvm/lib/TextAPI/Utils.cpp
M llvm/test/tools/llvm-readtapi/stubify-delete.test
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (#115048)
* Have clang always append & pass System/Library/SubFrameworks when determining default sdk search paths.
* Teach clang-installapi to traverse there for framework input.
* Teach llvm-readtapi that the library files (TBD or binary) in there should be considered private.
resolves: rdar://137457006
Commit: e9e8f59dd4f88229b731a0b5951db176a03bd8c4
https://github.com/llvm/llvm-project/commit/e9e8f59dd4f88229b731a0b5951db176a03bd8c4
Author: Eric Astor <epastor at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/SemaCXX/attr-annotate-ast.cpp
Log Message:
-----------
[clang] Instantiate attributes on LabelDecls (#115924)
Start propagating attributes on (e.g.) labels inside of templated
functions to their instances.
Commit: 032014ef103157bfd8403418538e25f3f58efa9d
https://github.com/llvm/llvm-project/commit/032014ef103157bfd8403418538e25f3f58efa9d
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/test/CodeGen/PowerPC/const-nonsplat-array-init.ll
M llvm/test/CodeGen/PowerPC/const-splat-array-init.ll
M llvm/test/CodeGen/PowerPC/extract-and-store.ll
M llvm/test/CodeGen/PowerPC/f128-fma.ll
M llvm/test/CodeGen/PowerPC/f128-passByValue.ll
M llvm/test/CodeGen/PowerPC/merge_stores_dereferenceable.ll
M llvm/test/CodeGen/PowerPC/pr45301.ll
M llvm/test/CodeGen/PowerPC/pr47891.ll
M llvm/test/CodeGen/PowerPC/pr59074.ll
M llvm/test/CodeGen/PowerPC/swaps-le-1.ll
M llvm/test/CodeGen/PowerPC/vec-itofp.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
Log Message:
-----------
[PowerPC] Add `SDNPMemOperand` to some nodes (#115580)
Nodes created with `getMemIntrinsicNode` have memory operands. In order
for operands to be propagated to machine instructions, the nodes should
have `SDNPMemOperand` property.
Similar to 3c8c385a.
Commit: d82422f69c573d051cf08d6d267b619197aab363
https://github.com/llvm/llvm-project/commit/d82422f69c573d051cf08d6d267b619197aab363
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Remove errorOrWarn
Commit: f2e42d9324f488ef113b8d2157f52ef1699b95f9
https://github.com/llvm/llvm-project/commit/f2e42d9324f488ef113b8d2157f52ef1699b95f9
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/test/Dialect/Arith/int-range-interface.mlir
Log Message:
-----------
[mlir][IntRangeInference] Handle ceildivsi(INT_MIN, x > 1) as expected (#116284)
Fixes #115293
While the definition of ceildivsi is integer division, rounding up, most
implementations will use `-(-a / b)` for dividing `a ceildiv b` with `a`
negative and `b` positive.
Mathematically, and for most integers, these two definitions are
equivalent. However, with `a == INT_MIN`, the initial negation is a
noop, which means that, while divinding and rounding up would give a
negative result, `-((- INT_MIN) / b)` is `-(INT_MIN / b)`, which is
positive.
This commit adds a special case to ceilDivSI inference to handle this
case and bring it in line with the operational instead of the
mathematical semantics of ceiling division.
Commit: 3130691a6053f90e1bac8026645b7bf95d6279cc
https://github.com/llvm/llvm-project/commit/3130691a6053f90e1bac8026645b7bf95d6279cc
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[C23] Move WG14 N2754 to the TS 18661 section
This paper is about the quantum exponent of NAN, which only applies if
we support decimal floating-point types from the TS. That is why the
status changed from Unknown to No.
Commit: 0398cb4592aa72cae5828ccdc56a60568d404db0
https://github.com/llvm/llvm-project/commit/0398cb4592aa72cae5828ccdc56a60568d404db0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP][OpenACC] Use iterator_range in check-directive-struct… (#115872)
…ure, NFC
The OpenMP code is already using iterator_range, lift it to the shared
header file.
Commit: ef92aba52a58cda8d670de8ce936455949746468
https://github.com/llvm/llvm-project/commit/ef92aba52a58cda8d670de8ce936455949746468
Author: lialan <me at alanli.org>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
Log Message:
-----------
[MLIR] Fix VectorEmulateNarrowType constant op mask bug (#116064)
This commit adds support for handling mask constants generated by the
`arith.constant` op in the `VectorEmulateNarrowType` pattern.
Previously, this pattern would not match due to the lack of mask
constant handling in `getCompressedMaskOp`.
The changes include:
1. Updating `getCompressedMaskOp` to recognize and handle
`arith.constant` ops as mask value sources.
2. Handling cases where the mask is not aligned with the emulated load
width. The compressed mask is adjusted to account for the offset.
Limitations:
- The arith.constant op can only have 1-dimensional constant values.
Resolves: #115742
Signed-off-by: Alan Li <me at alanli.org>
Commit: 098b0d18add97dea94e16006486b2fded65e228d
https://github.com/llvm/llvm-project/commit/098b0d18add97dea94e16006486b2fded65e228d
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[LLD][AArch64] Detach Landing Pad creation from Thunk creation (#116402)
Move Landing Pad Creation to a new function that checks each thunk every
pass to see if it needs a landing pad. This permits a thunk to be
created without needing a landing pad, but later needing one due to
drifting out of direct branch range and requiring an indirect branch.
We record all the Thunks created so far in a new vector rather than
trying to iterate over the DenseMap as we need a deterministic order of
adding LandingPadThunks due to the short branch fall through. We cannot
use normalizeExistingThunk() either as that only iterates through live
thunks.
Fixes: https://crbug.com/377438309
Original PR: https://github.com/llvm/llvm-project/pull/108989
Sending without a new test case to fix existing test. A new regression
test will come in a separate PR as coming up with a small enough
reproducer for this case is non-trivial.
Commit: bd9145c8c21334e099d51b3e66f49d51d24931ee
https://github.com/llvm/llvm-project/commit/bd9145c8c21334e099d51b3e66f49d51d24931ee
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
A llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
A llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
Log Message:
-----------
Reapply [AMDGPU] Avoid resource propagation for recursion through multiple functions (#112251)
I was wrong last patch. I viewed the `Visited` set purely as a possible
recursion deterrent where functions calling a callee multiple times are
handled elsewhere. This doesn't consider cases where a function is
called multiple times by different callers still part of the same call
graph. New test shows the aforementioned case.
Reapplies #111004, fixes #115562.
Commit: 47a0e24a3b6328d18b960fe6de200b309b6a3142
https://github.com/llvm/llvm-project/commit/47a0e24a3b6328d18b960fe6de200b309b6a3142
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[GISel][RISCV] Add G_SMIN/SMAX/UMIN/UMAX to GISelKnownBits::computeNumSignBits. (#116321)
Commit: 1e492285f33ca7c7efa97671990d47a32eaf31f7
https://github.com/llvm/llvm-project/commit/1e492285f33ca7c7efa97671990d47a32eaf31f7
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Include runtimes for armv8.1m.main-none-eabi (#116420)
These are needed by some of our users.
Commit: 9a5e5e28eca97ca06adc0cc60273dcf6cd61e32f
https://github.com/llvm/llvm-project/commit/9a5e5e28eca97ca06adc0cc60273dcf6cd61e32f
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
Log Message:
-----------
[AMDGPU] Newly added test modified for recent SGPR use change (#116427)
Mistimed rebase for #112251 which added new tests which did not consider
the changes introduced in #112403 yet
Commit: 92f3f2710641003a7bc558e6d766ea6be6c099b9
https://github.com/llvm/llvm-project/commit/92f3f2710641003a7bc558e6d766ea6be6c099b9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/add.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/implicit-def.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/load.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/splatvector-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sub.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vmclr-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vmclr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/zext.mir
Log Message:
-----------
[RISCV][GISel] Remove -disable-gisel-legality-check from most RVV tests. NFC
Commit: 94eebf721a2f8630412730f51d5071816a686ea0
https://github.com/llvm/llvm-project/commit/94eebf721a2f8630412730f51d5071816a686ea0
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
A llvm/test/Transforms/InstSimplify/select-equivalence-fp.ll
Log Message:
-----------
InstSimplify: support floating-point equivalences (#115152)
Since cd16b07 (IR: introduce CmpInst::isEquivalence), there is now an
isEquivalence routine in CmpInst that we can use to determine
equivalence in simplifySelectWithICmpEq. Implement this, extending the
code from integer-equalities to integer and floating-point equivalences.
Commit: 3734e4c0c4966f794b9588445448004fee769ab9
https://github.com/llvm/llvm-project/commit/3734e4c0c4966f794b9588445448004fee769ab9
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp
M llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
Log Message:
-----------
[MergedLoadStore] Preserve common metadata when sinking stores. (#116382)
When sinking a store, preserve common metadata present on stores on both
sides of the diamond.
PR: https://github.com/llvm/llvm-project/pull/116382
Commit: ec353b7418e272e96cd63cc61bec586ab49da92f
https://github.com/llvm/llvm-project/commit/ec353b7418e272e96cd63cc61bec586ab49da92f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[memprof] Use llvm::function_ref instead of std::function (#116306)
We've seen bugs where we lost track of error states stored in the
functor because we passed the functor by value (that is,
std::function) as opposed to reference (llvm::function_ref).
This patch fixes a couple of places we pass functors by value.
While we are at it, this patch adds curly braces around a "for" loop
spanning multiple lines.
Commit: 9204eba9121546c0e9c16d8a75d5735bad9dee16
https://github.com/llvm/llvm-project/commit/9204eba9121546c0e9c16d8a75d5735bad9dee16
Author: Ognyan Mirev <12432824+OgnianM at users.noreply.github.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/cuda_wrappers/new
Log Message:
-----------
Remove device override for operator new when the C++ standard >= 26 (#114056)
Related to https://github.com/llvm/llvm-project/issues/114048
Commit: 34ebfabc34476b73a3d65d3bd046c35ffab411c4
https://github.com/llvm/llvm-project/commit/34ebfabc34476b73a3d65d3bd046c35ffab411c4
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-alignment.c
Log Message:
-----------
[llvm][ARM] Restore the default to -mstrict-align on Apple firmwares (#115546)
This is a partial revert of e314622f204a01ffeda59cbe046dd403b01f8b74
rdar://139237593
Commit: 4b50ec43d03d9ba9b43edd9a4743951f6498b964
https://github.com/llvm/llvm-project/commit/4b50ec43d03d9ba9b43edd9a4743951f6498b964
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
Log Message:
-----------
[Clang] Avoid Using `byval` for `ndrange_t` when emitting `__enqueue_kernel_basic` (#116435)
AMDGPU disabled the use of `byval` for struct argument passing in commit
d77c620. However, when emitting `__enqueue_kernel_basic`, Clang still
adds the
`byval` attribute by default. Emitting the `byval` attribute by default
in this
context doesn’t seem like a good idea, as argument-passing conventions
are
highly target-dependent, and assumptions here could lead to issues. This
PR
removes the addition of the `byval` attribute, aligning the behavior
with other
`__enqueue_kernel_*` functions.
Commit: e8469f157725ffb8f0b707b7219e342ecc3429a8
https://github.com/llvm/llvm-project/commit/e8469f157725ffb8f0b707b7219e342ecc3429a8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Add support for character type in cuf.alloc and cuf.data_transfer (#116277)
Add support for character type in bytes computation
Commit: 012fad975ecf8649a24c75410b84758ff56c38f9
https://github.com/llvm/llvm-project/commit/012fad975ecf8649a24c75410b84758ff56c38f9
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize the box in memory when dst is emboxed (#116320)
Similar to #116289 but for the dst.
Commit: 3be3b33e570fbdf3be37952c0ed4ecd47f304948
https://github.com/llvm/llvm-project/commit/3be3b33e570fbdf3be37952c0ed4ecd47f304948
Author: vporpo <vporpodas at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Implement pack of scalars (#115549)
This patch implements packing of scalar operands when the vectorizer
decides to stop vectorizing. Packing is implemented with a sequence of
InsertElement instructions.
Packing vectors requires different instructions so it's implemented in a
follow-up patch.
Commit: 816c975ea7b27a784c8f0d6a9b92571ebc97d4a3
https://github.com/llvm/llvm-project/commit/816c975ea7b27a784c8f0d6a9b92571ebc97d4a3
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalMergeFunctions.h
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
A llvm/test/CodeGen/Generic/cgdata-merge-crash.ll
Log Message:
-----------
Fix crash from [CGData] Global Merge Functions (#112671) (#116241)
Module summary index is optional for this pass, and we shouldn't run it,
but import it as necessary.
Commit: 64c455077abe583f96fc19398712da9c1187ad61
https://github.com/llvm/llvm-project/commit/64c455077abe583f96fc19398712da9c1187ad61
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/docs/AddressSanitizer.rst
M clang/docs/LeakSanitizer.rst
Log Message:
-----------
[docs][asan][lsan] Drop list of supported architechures (#116302)
Full list is quite long, and quality of implementation can
vary.
Drop the lists to avoid confusion like
https://github.com/rust-lang/rust/pull/123617#issuecomment-2471695102
We don't maintain these for other sanitizers.
Commit: b1fa9d154b3765cab951162f5e4777a824bc9fa7
https://github.com/llvm/llvm-project/commit/b1fa9d154b3765cab951162f5e4777a824bc9fa7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Correctly embox logical constant (#116445)
Commit: 57ed628fb397c6427f820fb217c8a58e67f8e10a
https://github.com/llvm/llvm-project/commit/57ed628fb397c6427f820fb217c8a58e67f8e10a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[memprof] Speed up caller-callee pair extraction (Part 2) (#116441)
This patch further speeds up the extraction of caller-callee pairs
from the profile.
Recall that we reconstruct a call stack by traversing the radix tree
from one of its leaf nodes toward a root. The implication is that
when we decode many different call stacks, we end up visiting nodes
near the root(s) repeatedly. That in turn adds many duplicates to our
data structure:
DenseMap<uint64_t, SmallVector<CallEdgeTy, 0>> Calls;
only to be deduplicated later with sort+unique for each vector.
This patch makes the extraction process more efficient by keeping
track of indices of the radix tree array we've visited so far and
terminating traversal as soon as we encounter an element previously
visited.
Note that even with this improvement, we still add at least one
caller-callee pair to the data structure above for each call stack
because we do need to add a caller-callee pair for the leaf node with
the callee GUID being 0.
Without this patch, it takes 4 seconds to extract caller-callee pairs
from a large MemProf profile. This patch shortenes that down to
900ms.
Commit: 0d38f64e7df94b062dde89627de28125f292b6bb
https://github.com/llvm/llvm-project/commit/0d38f64e7df94b062dde89627de28125f292b6bb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Remove MemProf format Version 0 (#116442)
This patch removes MemProf format Version 0 now that version 2 and 3
seem to be working well.
I'm not touching version 1 for now because some tests still rely on
version 1.
Note that Version 0 is identical to Version 1 except that the MemProf
section of the indexed format has a MemProf version field.
Commit: 1be98277547d3a9b9966f055c8e4939390ac4697
https://github.com/llvm/llvm-project/commit/1be98277547d3a9b9966f055c8e4939390ac4697
Author: vporpo <vporpodas at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Implement packing of vectors (#116447)
Up until now we could only support packing of scalar elements. This
patch fixes this by implementing packing of vector elements, by
generating extractelement and insertelement instruction pairs.
Commit: 131d73ed3483f2ad43a2c7c0834522c0150936bb
https://github.com/llvm/llvm-project/commit/131d73ed3483f2ad43a2c7c0834522c0150936bb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
Log Message:
-----------
[RegAlloc] Remove redundant prints of LiveInterval weight. (#116451)
LiveInterval::print has included the weight since early 2018. We don't
need to print again after we print the interval.
Commit: 6a0905d11ede27f2ac52338dc9d4bcd5c6e8a2f5
https://github.com/llvm/llvm-project/commit/6a0905d11ede27f2ac52338dc9d4bcd5c6e8a2f5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Add isel patterns for i16 load/store (#116293)
In order to support f16 load/store we need to make load/stores with s16
register type legal. If regbank selection doesn't pick the FPR bank,
we'll be left with a GPR load or store which we don't have isel patterns
for from SelectionDAG.
In order to add the patterns we need to make i16 a legal type for the
GPR register class.
Tests are currently disabling the legality check because I haven't
update the legalizer yet.
Commit: ab27253ad395881c0798ac5c8efc2f6fc2922399
https://github.com/llvm/llvm-project/commit/ab27253ad395881c0798ac5c8efc2f6fc2922399
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/MachO/Driver.cpp
M lld/MachO/InputSection.h
A lld/test/MachO/cgdata-generate-merge.s
Log Message:
-----------
[CGData][lld-macho] Merge CG Data by LLD (#112674)
LLD now processes raw CG data for stable functions, similar to how it
handles raw CG data for the outliner's hash tree. This data is encoded
in the custom section (`__llvm_merge`) within object files. LLD merges
this information into the indexed CG data file specified by the
`-codegen-data-generate-path={path}` option. For the linker that does
not support this feature, we could use `llvm-cgdata` tool --
https://github.com/llvm/llvm-project/blob/main/llvm/docs/CommandGuide/llvm-cgdata.rst.
Depends on #115750.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: 43cb424a54c9452b60d96ef07d0699fc3b1ceb87
https://github.com/llvm/llvm-project/commit/43cb424a54c9452b60d96ef07d0699fc3b1ceb87
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Specialize entry point for scalar to desc data transfer (#116457)
The runtime Assign function is not meant to initialize an array from a
scalar. For that we need to use DoAssignFromSource. Update the data
transfer from scalar to descriptor to use a new entry point that use
this function underneath.
Commit: 70b9440c888b93217172f4eb425ff8b59b00ea24
https://github.com/llvm/llvm-project/commit/70b9440c888b93217172f4eb425ff8b59b00ea24
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
Revert "[flang][cuda] Specialize entry point for scalar to desc data transfer" (#116458)
Reverts llvm/llvm-project#116457
Commit: 309c890921b8d2f33e32aac4890317b887189a1f
https://github.com/llvm/llvm-project/commit/309c890921b8d2f33e32aac4890317b887189a1f
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[llvm] `APFloat`: Add helpers to query NaN/inf semantics (#116315)
`APFloat` changes extracted from #116176 as per reviewer comments.
Commit: 42be165dde50c29e1d104f38938c03c95b4471cf
https://github.com/llvm/llvm-project/commit/42be165dde50c29e1d104f38938c03c95b4471cf
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Runtime/freestanding-tools.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
Reland '[flang][cuda] Specialize entry point for scalar to desc data transfer'
Commit: ec0a27f6589c5407e98efd9ffcc5edd17c63a108
https://github.com/llvm/llvm-project/commit/ec0a27f6589c5407e98efd9ffcc5edd17c63a108
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/docs/doxygen.cfg.in
M clang/docs/tools/dump_ast_matchers.py
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M clang/unittests/ASTMatchers/CMakeLists.txt
R clang/utils/generate_ast_matcher_doc_tests.py
Log Message:
-----------
Revert "Reland: [clang][test] add testing for the AST matcher reference" (#116477)
Reverts llvm/llvm-project#112168
Commit: 2906fcadb8563a02949f852867cebc63e0539cb7
https://github.com/llvm/llvm-project/commit/2906fcadb8563a02949f852867cebc63e0539cb7
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelperArtifacts.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
Log Message:
-----------
[GlobalISel] Combine G_MERGE_VALUES of x and zero (#116283)
into zext x
LegalizerHelper has two padding strategies: undef or zero.
see LegalizerHelper:273
see LegalizerHelper:315
This PR is about zero sugar and Coke Zero.
; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES %a(s32),
[[C]](s32)
Please continue padding merge values.
// %bits_8_15:(s8) = G_CONSTANT i8 0
// %0:(s16) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8)
%bits_8_15 is defined by zero. For optimization, we pick zext.
// %0:_(s16) = G_ZEXT %bits_0_7:(s8)
The upper bits of %0 are zero and the lower bits come from %bits_0_7.
Commit: db115ba3efee9c940539667842a1092d8d956850
https://github.com/llvm/llvm-project/commit/db115ba3efee9c940539667842a1092d8d956850
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/rank-reduce-contraction-ops.mlir
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
Log Message:
-----------
[mlir][Linalg] Fix non-matmul linalg structured ops (#116412)
https://github.com/llvm/llvm-project/commit/3ad0148020ca91cc288bffd8ad36e25f7555a3bb
broke linalg structured ops other than MatmulOp.
The patch:
- Changes the printer to hide additional attributes, which weren't
hidden before: "indexing_maps".
- Changes the build of every linalg structured op to have an indexing
map for matmul.
These changes combined, hide the problem until you print the operation
in it's generic form.
Reproducer:
```mlir
func.func public @bug(%arg0 : tensor<5x10x20xf32>, %arg1 : tensor<5x20x40xf32>, %arg3 : tensor<5x10x40xf32>) -> tensor<5x10x40xf32> {
%out = linalg.batch_matmul ins(%arg0, %arg1 : tensor<5x10x20xf32>, tensor<5x20x40xf32>)
outs(%arg3 : tensor<5x10x40xf32>) -> tensor<5x10x40xf32>
func.return %out : tensor<5x10x40xf32>
}
```
Prints fine, with `mlir-opt <file>`, but if you do `mlir-opt
--mlir-print-op-generic <file>`:
```
#map = affine_map<(d0, d1, d2) -> (d0, d2)>
#map1 = affine_map<(d0, d1, d2) -> (d2, d1)>
#map2 = affine_map<(d0, d1, d2) -> (d0, d1)>
#map3 = affine_map<(d0, d1, d2, d3) -> (d0, d1, d3)>
#map4 = affine_map<(d0, d1, d2, d3) -> (d0, d3, d2)>
#map5 = affine_map<(d0, d1, d2, d3) -> (d0, d1, d2)>
"builtin.module"() ({
"func.func"() <{function_type = (tensor<5x10x20xf32>, tensor<5x20x40xf32>, tensor<5x10x40xf32>) -> tensor<5x10x40xf32>, sym_name = "bug", sym_visibility = "public"}> ({
^bb0(%arg0: tensor<5x10x20xf32>, %arg1: tensor<5x20x40xf32>, %arg2: tensor<5x10x40xf32>):
%0 = "linalg.batch_matmul"(%arg0, %arg1, %arg2) <{operandSegmentSizes = array<i32: 2, 1>}> ({
^bb0(%arg3: f32, %arg4: f32, %arg5: f32):
%1 = "arith.mulf"(%arg3, %arg4) <{fastmath = #arith.fastmath<none>}> : (f32, f32) -> f32
%2 = "arith.addf"(%arg5, %1) <{fastmath = #arith.fastmath<none>}> : (f32, f32) -> f32
"linalg.yield"(%2) : (f32) -> ()
}) {indexing_maps = [#map, #map1, #map2], linalg.memoized_indexing_maps = [#map3, #map4, #map5]} : (tensor<5x10x20xf32>, tensor<5x20x40xf32>, tensor<5x10x40xf32>) -> tensor<5x10x40xf32>
"func.return"(%0) : (tensor<5x10x40xf32>) -> ()
}) : () -> ()
}) : () -> ()
```
The batch_matmul operation's builder now always inserts a indexing_map
which is unrelated to the operation itself. This was caught when a
transformation from one LinalgStructuredOp to another, tried to pass
it's attributes to the other ops builder and there were multiple
indexing_map attributes in the result.
This patch fixes this by specializing the builders for MatmulOp with
indexing map information.
Commit: dc3156d8e6dc6494bc47ba074d0c990eb27b7564
https://github.com/llvm/llvm-project/commit/dc3156d8e6dc6494bc47ba074d0c990eb27b7564
Author: Martin Storsjö <martin at martin.st>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M openmp/runtime/cmake/LibompDefinitions.cmake
Log Message:
-----------
[OpenMP] Don't hardcode _WIN32_WINNT for MinGW targets (#115708)
Instead respect what the toolchain default is (or what the user sets via
CMAKE_CXX_FLAGS).
This fixes builds with libcxx, with mingw toolchains targeting
msvcrt.dll, after 5d8be4c036aa5ce4a94f1f37a9155d5c877e23db; after that
commit, the libcxx public headers reference symbols such as iswspace_l,
which are unavailable when targeting msvcrt.dll on older versions of
Windows (it's only available in msvcrt.dll since Windows Vista).
Commit: 89cb0eefcbb6303ba6813238d5ad37b103495d11
https://github.com/llvm/llvm-project/commit/89cb0eefcbb6303ba6813238d5ad37b103495d11
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
Log Message:
-----------
[AMDGPU] Move GCNPreRAOptimizations after MachineScheduler (#116211)
This is in preparation for adding a new optimization to the pass that
cares about the order of instructions. The existing optimization does
not care, so this just causes minor codegen differences.
Commit: b69f646c46de14279c35c3733e049f1e78e92983
https://github.com/llvm/llvm-project/commit/b69f646c46de14279c35c3733e049f1e78e92983
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
Log Message:
-----------
[AArch64] Remove unused SDNodes (NFC) (#116236)
The corresponding enum members were only used by `EmitMOPS`, which
immediately translated them to machine opcodes. Just pass the machine
opcodes instead.
Commit: f97f96492dd08cdcb4b83775f764f09a396ed610
https://github.com/llvm/llvm-project/commit/f97f96492dd08cdcb4b83775f764f09a396ed610
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll
Log Message:
-----------
[GlobalISel][ARM] Legalize reset_fpmode (#115859)
Implement lowering intrinsic `reset_fpmode` in Global Selector for ARM
target.
Commit: 100376a2fa07f59f11cc4a02c216aaef65d59294
https://github.com/llvm/llvm-project/commit/100376a2fa07f59f11cc4a02c216aaef65d59294
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/phi.ll
Log Message:
-----------
[AArch64] Add a test for phis of different types. NFC
Commit: 0fd6f684b9c84c32d6cbfd9742402e788b2879f1
https://github.com/llvm/llvm-project/commit/0fd6f684b9c84c32d6cbfd9742402e788b2879f1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libc++] Adjust workflow file for building the libc++ docker image (#116366)
Commit: 372344995568cae076477a8b0e98fcdec7c49379
https://github.com/llvm/llvm-project/commit/372344995568cae076477a8b0e98fcdec7c49379
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M offload/test/offloading/fortran/basic-target-region-1D-array-section.f90
M offload/test/offloading/fortran/basic-target-region-3D-array-section.f90
M offload/test/offloading/fortran/basic-target-region-3D-array.f90
M offload/test/offloading/fortran/constant-arr-index.f90
M offload/test/offloading/fortran/declare-target-vars-in-target-region.f90
M offload/test/offloading/fortran/double-target-call-with-declare-target.f90
M offload/test/offloading/fortran/dtype-array-constant-index-map.f90
A offload/test/offloading/fortran/dtype-member-map-syntax-1.f90
A offload/test/offloading/fortran/dtype-member-map-syntax-2.f90
M offload/test/offloading/fortran/dump_map_tables.f90
M offload/test/offloading/fortran/local-descriptor-map-regress.f90
M offload/test/offloading/fortran/target-depend.f90
M offload/test/offloading/fortran/target-map-all-common-block-members.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-alloca-array-of-dtype.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-alloca-array.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-and-alloca-array-v2.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-and-alloca-array.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-array-and-scalar.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-array-of-dtype.f90
M offload/test/offloading/fortran/target-map-allocatable-array-section-1d-bounds.f90
M offload/test/offloading/fortran/target-map-allocatable-array-section-3d-bounds.f90
A offload/test/offloading/fortran/target-map-allocatable-dtype.f90
M offload/test/offloading/fortran/target-map-allocatable-map-scopes.f90
M offload/test/offloading/fortran/target-map-common-block.f90
M offload/test/offloading/fortran/target-map-declare-target-link-common-block.f90
M offload/test/offloading/fortran/target-map-derived-type-full-1.f90
M offload/test/offloading/fortran/target-map-derived-type-full-2.f90
M offload/test/offloading/fortran/target-map-derived-type-full-implicit-1.f90
M offload/test/offloading/fortran/target-map-derived-type-full-implicit-2.f90
M offload/test/offloading/fortran/target-map-double-large-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-array-bounds.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-double-array-bounds.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-single-member.f90
A offload/test/offloading/fortran/target-map-dtype-3d-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-and-non-alloca-array.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-and-non-alloca-dtype.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-of-dtype.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-dtype-allocatable-array.f90
A offload/test/offloading/fortran/target-map-dtype-allocatable-scalar-and-array.f90
M offload/test/offloading/fortran/target-map-dtype-arr-bounds-member-enter-exit-update.f90
M offload/test/offloading/fortran/target-map-dtype-arr-bounds-member-enter-exit.f90
M offload/test/offloading/fortran/target-map-dtype-explicit-individual-array-member.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-3D-member-bounds.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-member-bounds.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-member.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-member.f90
M offload/test/offloading/fortran/target-map-enter-exit-allocatables.f90
M offload/test/offloading/fortran/target-map-enter-exit-array-2.f90
M offload/test/offloading/fortran/target-map-enter-exit-array-bounds.f90
M offload/test/offloading/fortran/target-map-enter-exit-array.f90
M offload/test/offloading/fortran/target-map-enter-exit-scalar.f90
M offload/test/offloading/fortran/target-map-first-common-block-member.f90
M offload/test/offloading/fortran/target-map-individual-dtype-member-map.f90
M offload/test/offloading/fortran/target-map-large-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-mix-imp-exp-common-block-members.f90
A offload/test/offloading/fortran/target-map-multi-alloca-dtypes-with-multi-alloca-members.f90
A offload/test/offloading/fortran/target-map-multi-alloca-dtypes-with-multi-mixed-members.f90
A offload/test/offloading/fortran/target-map-nested-alloca-dtype-3d-alloca-array-bounds.f90
A offload/test/offloading/fortran/target-map-nested-alloca-dtype-alloca-array-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-3d-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-and-non-alloca-array.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array-and-non-alloca-dtype.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array.f90
M offload/test/offloading/fortran/target-map-nested-dtype-complex-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-derived-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-single-member.f90
M offload/test/offloading/fortran/target-map-pointer-scopes-enter-exit.f90
M offload/test/offloading/fortran/target-map-pointer-target-array-section-3d-bounds.f90
M offload/test/offloading/fortran/target-map-pointer-target-scopes.f90
A offload/test/offloading/fortran/target-map-pointer-to-dtype-allocatable-member.f90
M offload/test/offloading/fortran/target-map-second-common-block-member.f90
M offload/test/offloading/fortran/target-map-two-dtype-explicit-member.f90
M offload/test/offloading/fortran/target-map-two-dtype-individual-member-array-1D-bounds.f90
M offload/test/offloading/fortran/target-map-two-dtype-mixed-implicit-explicit-capture-1.f90
M offload/test/offloading/fortran/target-map-two-dtype-mixed-implicit-explicit-capture-2.f90
M offload/test/offloading/fortran/target-map-two-dtype-multi-member-array-1D-bounds.f90
M offload/test/offloading/fortran/target-map-two-nested-dtype-member-array-map.f90
M offload/test/offloading/fortran/target-nested-target-data.f90
M offload/test/offloading/fortran/target-region-implicit-array.f90
Log Message:
-----------
[OpenMP] Allocatable explicit member mapping fortran offloading tests (#113555)
This PR is one in a series of 3 that aim to add support for explicit
member mapping of allocatable components in derived types within
OpenMP+Fortran for Flang.
This PR provides all of the runtime tests that are currently
upstreamable, unfortunately some of the other tests would require
linking of the fortran runtime for offload which we currently do not do.
But regardless, this is plenty to ensure that the mapping is working in
most cases.
Commit: b5db75bfce0feac70f95a8e10d4ceba068d07bd3
https://github.com/llvm/llvm-project/commit/b5db75bfce0feac70f95a8e10d4ceba068d07bd3
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
R mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
A mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
A mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
Log Message:
-----------
[OpenMP][MLIR] Descriptor explicit member map lowering changes (#113556)
This is one of 3 PRs in a PR stack that aims to add support for explicit
mapping of allocatable members in derived types.
The primary changes in this PR are the OpenMPToLLVMIRTranslation.cpp
changes, which are small and seek to alter the current member mapping to
add an additional map insertion for pointers. Effectively, if the member
is a pointer (currently indicated by having a varPtrPtr field) we add an
additional map for the pointer and then alter the subsequent mapping of
the member (the data) to utilise the member rather than the parents base
pointer. This appears to be necessary in certain cases when mapping
pointer data within record types to avoid segfaulting on device (due to
incorrect data mapping). In general this record type mapping may be
simplifiable in the future.
There are also additions of tests which should help to showcase the
affect of the changes above.
Commit: e508bacce45d4fb2ba07d02c55391b858000c3b3
https://github.com/llvm/llvm-project/commit/e508bacce45d4fb2ba07d02c55391b858000c3b3
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
A flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Transforms/omp-map-info-finalization.fir
M mlir/test/Target/LLVMIR/omptarget-data-use-dev-ordering.mlir
Log Message:
-----------
[Flang][OpenMP] Derived type explicit allocatable member mapping (#113557)
This PR is one of 3 in a PR stack, this is the primary change set which
seeks to extend the current derived type explicit member mapping support
to handle descriptor member mapping at arbitrary levels of nesting. The
PR stack seems to do this reasonably (from testing so far) but as you
can create quite complex mappings with derived types (in particular when
adding allocatable derived types or arrays of allocatable derived types)
I imagine there will be hiccups, which I am more than happy to address.
There will also be further extensions to this work to handle the
implicit auto-magical mapping of descriptor members in derived types and
a few other changes planned for the future (with some ideas on
optimizing things).
The changes in this PR primarily occur in the OpenMP lowering and the
OMPMapInfoFinalization pass.
In the OpenMP lowering several utility functions were added or extended
to support the generation of appropriate intermediate member mappings
which are currently required when the parent (or multiple parents) of a
mapped member are descriptor types. We need to map the entirety of these
types or do a "deep copy" for lack of a better term, where we map both
the base address and the descriptor as without the copying of both of
these we lack the information in the case of the descriptor to access
the member or attach the pointers data to the pointer and in the latter
case we require the base address to map the chunk of data. Currently we
do not segment descriptor based derived types as we do with regular
non-descriptor derived types, we effectively map their entirety in all
cases at the moment, I hope to address this at some point in the future
as it adds a fair bit of a performance penalty to having nestings of
allocatable derived types as an example. The process of mapping all
intermediate descriptor members in a members path only occurs if a
member has an allocatable or object parent in its symbol path or the
member itself is a member or allocatable. This occurs in the
createParentSymAndGenIntermediateMaps function, which will also generate
the appropriate address for the allocatable member within the derived
type to use as a the varPtr field of the map (for intermediate
allocatable maps and final allocatable mappings). In this case it's
necessary as we can't utilise the usual Fortran::lower functionality
such as gatherDataOperandAddrAndBounds without causing issues later in
the lowering due to extra allocas being spawned which seem to affect the
pointer attachment (at least this is my current assumption, it results
in memory access errors on the device due to incorrect map information
generation). This is similar to why we do not use the MLIR value
generated for this and utilise the original symbol provided when mapping
descriptor types external to derived types. Hopefully this can be
rectified in the future so this function can be simplified and more
closely aligned to the other type mappings. We also make use of
fir::CoordinateOp as opposed to the HLFIR version as the HLFIR version
doesn't support the appropriate lowering to FIR necessary at the moment,
we also cannot use a single CoordinateOp (similarly to a single GEP) as
when we index through a descriptor operation (BoxType) we encounter
issues later in the lowering, however in either case we need access to
intermediate descriptors so individual CoordinateOp's aid this
(although, being able to compress them into a smaller amount of
CoordinateOp's may simplify the IR and perhaps result in a better end
product, something to consider for the future).
The other large change area was in the OMPMapInfoFinalization pass,
where the pass had to be extended to support the expansion of box types
(or multiple nestings of box types) within derived types, or box type
derived types. This requires expanding each BoxType mapping from one
into two maps and then modifying all of the existing member indices of
the overarching parent mapping to account for the addition of these new
members alongside adjusting the existing member indices to support the
addition of these new maps which extend the original member indices (as
a base address of a box type is currently considered a member of the box
type at a position of 0 as when lowered to LLVM-IR it's a pointer
contained at this position in the descriptor type, however, this means
extending mapped children of this expanded descriptor type to
additionally incorporate the new member index in the correct location in
its own index list). I believe there is a reasonable amount of comments
that should aid in understanding this better, alongside the test
alterations for the pass.
A subset of the changes were also aimed at making some of the utilities
for packing and unpacking the DenseIntElementsAttr containing the member
indices shareable across the lowering and OMPMapInfoFinalization, this
required moving some functions to the Lower/Support/Utils.h header, and
transforming the lowering structure containing the member index data
into something more similar to the version used in
OMPMapInfoFinalization. There we also some other attempts at tidying
things up in relation to the member index data generation in the
lowering, some of which required creating a logical operator for the
OpenMP ID class so it can be utilised as a map key (it simply utilises
the symbol address for the moment as ordering isn't particularly
important).
Otherwise I have added a set of new tests encompassing some of the
mappings currently supported by this PR (unfortunately as you can have
arbitrary nestings of all shapes and types it's not very feasible to
cover them all).
Commit: 51809e4a26a8c6db6cce115822d185fe662dc0fc
https://github.com/llvm/llvm-project/commit/51809e4a26a8c6db6cce115822d185fe662dc0fc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-ld1.ll
Log Message:
-----------
[DAG] SimplifyDemandedVectorElts - add SimplifyMultipleUse handling to SEXT/ZEXT/TRUNC nodes (#116227)
Allows us to bypass multiple uses of a SEXT/ZEXT/TRUNC node operand
Commit: c95daac4c19fe54eeeb4d0ec5ca23f2673d1de71
https://github.com/llvm/llvm-project/commit/c95daac4c19fe54eeeb4d0ec5ca23f2673d1de71
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Spell out alias attribute/metadata violations are UB. (#116220)
Update the documentation for the noalias attribute, !alias.scope and
!loop.parallel_accesses metadata to clarify they are UB on voilation the
noalias property.
PR: https://github.com/llvm/llvm-project/pull/116220
---------
Co-authored-by: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Commit: e8a6624325e0c628ec23e5f124f1d2002f138dd5
https://github.com/llvm/llvm-project/commit/e8a6624325e0c628ec23e5f124f1d2002f138dd5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/LinkInModulesPass.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
Log Message:
-----------
[CodeGen] Remove unused includes (NFC) (#116459)
Identified with misc-include-cleaner.
Commit: 46d750be2e19220c318bc907dfaf6c61d3a0de92
https://github.com/llvm/llvm-project/commit/46d750be2e19220c318bc907dfaf6c61d3a0de92
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/ScopeInfo.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
Log Message:
-----------
[Sema] Remove unused includes (NFC) (#116461)
Identified with misc-include-cleaner.
Commit: b88e938b1f95e60a8dfe33d1b2b131027d1acf25
https://github.com/llvm/llvm-project/commit/b88e938b1f95e60a8dfe33d1b2b131027d1acf25
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[NFC] Remove whitespaces in `llvm/CMakeLists.txt`
Commit: 71b3b32c6ec8e4691b67b2571b4f44cdd15cb588
https://github.com/llvm/llvm-project/commit/71b3b32c6ec8e4691b67b2571b4f44cdd15cb588
Author: Maurice Heumann <MauriceHeumann at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/Driver/cl-zc.cpp
Log Message:
-----------
[Clang] [MS] Add /Zc:tlsGuards option to control tls guard emission (#113830)
This adds an option to control whether guards for on-demand TLS
initialization in combination with Microsoft's CXX ABI are emitted or
not.
The behaviour should match with Microsoft:
https://learn.microsoft.com/en-us/cpp/build/reference/zc-tlsguards?view=msvc-170
This fixes #103484
Commit: 1636580b0a9afb2272d94b125313e4b35e9af2a9
https://github.com/llvm/llvm-project/commit/1636580b0a9afb2272d94b125313e4b35e9af2a9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/fstream
M libcxx/include/strstream
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
Log Message:
-----------
[libc++] Avoid including <ostream> in <fstream> and <strstream> (#116014)
This reduces the include time of `<fstream>` from ~800ms to ~500ms.
Commit: 764834d63d5b1bf5852ae90acdedf66056c54c87
https://github.com/llvm/llvm-project/commit/764834d63d5b1bf5852ae90acdedf66056c54c87
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
A libcxx/include/__locale_dir/pad_and_output.h
M libcxx/include/__ostream/basic_ostream.h
A libcxx/include/__ostream/put_character_sequence.h
M libcxx/include/iomanip
M libcxx/include/locale
M libcxx/include/module.modulemap
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove <istream> and <ostream> includes from <iomanip> (#116223)
This reduces the include time of `<filesystem>` by ~50ms.
Commit: 15ca79998ae7f2a3919b8c1c3573730f4c5e13ed
https://github.com/llvm/llvm-project/commit/15ca79998ae7f2a3919b8c1c3573730f4c5e13ed
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 764834d63d5b
Commit: 4f48a81a620bc9280be4780f3554cdc9bda55bd3
https://github.com/llvm/llvm-project/commit/4f48a81a620bc9280be4780f3554cdc9bda55bd3
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/Makefile
A lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Support column breakpoints (#113787)
This commit adds support for column breakpoints to lldb-dap.
To do so, support for the `breakpointLocations` request was
added. To find all available breakpoint positions, we iterate over
the line table.
The `setBreakpoints` request already forwarded the column correctly to
`SBTarget::BreakpointCreateByLocation`. However, `SourceBreakpointMap`
did not keep track of multiple breakpoints in the same line. To do so,
the `SourceBreakpointMap` is now indexed by line+column instead of by
line only.
See http://jonasdevlieghere.com/post/lldb-column-breakpoints/ for a
high-level introduction to column breakpoints.
Commit: 47e6673006a0f27b39867f49b25bddc4e1116cd2
https://github.com/llvm/llvm-project/commit/47e6673006a0f27b39867f49b25bddc4e1116cd2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace toString(RelType) with operator<< while using ELFSyncStream
Commit: e2b4a700fd927e50a68ac0a42e4807a104495186
https://github.com/llvm/llvm-project/commit/e2b4a700fd927e50a68ac0a42e4807a104495186
Author: Tobias Hieta <tobias at hieta.se>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/release/merge-release-pr.py
Log Message:
-----------
[Utils] Fixed rebase in merge-release-pr script (#116340)
Recently GitHub changed something on their side so we no longer can
rebase release PR's with the API. This means that we now have to
manually rebase the PR locally and then push the results. This fixes
the script that I use to merge PRs to the release branch by changing
the rebase part to do the local rebase and also adds a new option
--rebase-only so that you can rebase the PRs easier.
Minor change is that the script now can take a URL to the pull request
as well as just the PR ID.
Commit: adb80d8a4cdc04936980fd88c6c8dd85ccac3135
https://github.com/llvm/llvm-project/commit/adb80d8a4cdc04936980fd88c6c8dd85ccac3135
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/__utility/scope_guard.h
Log Message:
-----------
[libc++] Address post-commit comments for __scope_guard (#116291)
Fixes #116204
Commit: dedc5159997ebd3573a2e6397ba9b08faeb1b015
https://github.com/llvm/llvm-project/commit/dedc5159997ebd3573a2e6397ba9b08faeb1b015
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__mutex/unique_lock.h
M libcxx/include/__system_error/system_error.h
A libcxx/include/__system_error/throw_system_error.h
M libcxx/include/__thread/thread.h
M libcxx/include/module.modulemap
M libcxx/include/print
M libcxx/include/shared_mutex
M libcxx/src/chrono.cpp
M libcxx/src/filesystem/filesystem_clock.cpp
M libcxx/src/random.cpp
M libcxx/src/system_error.cpp
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Avoid including <string> in <mutex> (#116254)
Commit: 3f67544b4dc81a3286e50d540a4fdabb161ea8b6
https://github.com/llvm/llvm-project/commit/3f67544b4dc81a3286e50d540a4fdabb161ea8b6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port dedc5159997e
Commit: 935d753c6dca0cd9bc5ea14fde5b00386ebcc5be
https://github.com/llvm/llvm-project/commit/935d753c6dca0cd9bc5ea14fde5b00386ebcc5be
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage fir ld1r combines. NFC
Commit: 612b779963c21c8028dc0651e956097b161b0a8a
https://github.com/llvm/llvm-project/commit/612b779963c21c8028dc0651e956097b161b0a8a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Update a comment (NFC) (#116500)
Note that Version0 has been removed in #116442.
Commit: 3fb83f65c4f38d7651b46d51b8e431417a69d539
https://github.com/llvm/llvm-project/commit/3fb83f65c4f38d7651b46d51b8e431417a69d539
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace toString(RelType) with operator<< while using ELFSyncStream
Commit: 797330e96c5abf0f1c623c1eb5ca69de28b484be
https://github.com/llvm/llvm-project/commit/797330e96c5abf0f1c623c1eb5ca69de28b484be
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/DepthFirstIterator.h
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/unittests/ADT/BreadthFirstIteratorTest.cpp
M llvm/unittests/ADT/DepthFirstIteratorTest.cpp
M llvm/unittests/ADT/PostOrderIteratorTest.cpp
Log Message:
-----------
[ADT][NFCI]: Fix iterator category for graph iterators with external storage (#116403)
Set the iterator category for graph iterators to input_iterator_tag when
the visited set is stored externally. In that case we can't provide
multi-pass guarantee, so we should not claim to be a forward iterator.
Fixes: #116400
Commit: 549413fa4034898250c506098c3602e0b07680a2
https://github.com/llvm/llvm-project/commit/549413fa4034898250c506098c3602e0b07680a2
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GIMatchTableExecutor.cpp
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
Log Message:
-----------
[AArch64][GlobalISel] Protect against folding loads across basic blocks.
isObviouslySafeToFold can look between a load and an instruction it can be
folded into, to check that no other memory operations prevents the fold. It
doesn't handle multiple basic blocks which we needs to guard against.
Commit: 58a971f42f1f2b2e25995c8cad439f4aa07c024d
https://github.com/llvm/llvm-project/commit/58a971f42f1f2b2e25995c8cad439f4aa07c024d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace contex-less toString(x) with toStr(ctx, x)
so that we can remove the global `ctx` from toString implementations.
Rename lld::toString (to lld::elf::toStr) to simplify name lookup (we
have many llvm::toString and another lld::toString(const llvm::opt::Arg
&)).
Commit: 64b9753d03946d8100e017a5cc4861d5d671c6d0
https://github.com/llvm/llvm-project/commit/64b9753d03946d8100e017a5cc4861d5d671c6d0
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/Analysis/BranchProbabilityInfoTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
Log Message:
-----------
[llvm] Replace `UndefValue` placeholders with `PoisonValue` in unit tests [NFC] (#116453)
This PR replaces all `UndefValue` act as placeholders with `PoisonValue`
in `llvm/unittests`.
Commit: a6755bdad1fb1a195841a2e803007dda029b5a6a
https://github.com/llvm/llvm-project/commit/a6755bdad1fb1a195841a2e803007dda029b5a6a
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Replace global ctx with getCtx()
Commit: 73e89cf66d4b88d568ff4c718ae7bf55588ef2be
https://github.com/llvm/llvm-project/commit/73e89cf66d4b88d568ff4c718ae7bf55588ef2be
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsFrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsMulMulBugPass.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
Log Message:
-----------
[Mips] Remove unused includes (NFC) (#116499)
Identified with misc-include-cleaner.
Commit: 764275949897533a4be0728250e69a94d228fbc5
https://github.com/llvm/llvm-project/commit/764275949897533a4be0728250e69a94d228fbc5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/MacroArgs.cpp
M clang/lib/Lex/MacroInfo.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPCallbacks.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/PreprocessingRecord.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/PreprocessorLexer.cpp
M clang/lib/Lex/TokenLexer.cpp
Log Message:
-----------
[Lex] Remove unused includes (NFC) (#116460)
Identified with misc-include-cleaner.
Commit: be5dad012eb75d61935f6c76034a8867f7443731
https://github.com/llvm/llvm-project/commit/be5dad012eb75d61935f6c76034a8867f7443731
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Target.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Replace internalLinkerError(getErrorLoc(ctx, buf) + ...) with InternalErr(ctx, buf)
and simplify `+ toStr(ctx, x)` to `<< x`.
The trailing '\n' << llvm::getBugReportMsg() is not very useful and
therefore removed.
Commit: 38870fe124eb5e6e24136f9d3e4551a62370faee
https://github.com/llvm/llvm-project/commit/38870fe124eb5e6e24136f9d3e4551a62370faee
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Remove unneeded toString(Error) when using ELFSyncStream
Commit: 6c19fa4bfc54a8cdb0c48b5024650ff5c630ea8d
https://github.com/llvm/llvm-project/commit/6c19fa4bfc54a8cdb0c48b5024650ff5c630ea8d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Remove unneeded toString(Error) when using ELFSyncStream
Commit: 4a6f59ac3c13e5c4df0b2deb3e6918d0ce219e57
https://github.com/llvm/llvm-project/commit/4a6f59ac3c13e5c4df0b2deb3e6918d0ce219e57
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Replace lld::warn with Warn(ctx)
Commit: 3f6a1d179305f266835242ac7d1e55249c50c074
https://github.com/llvm/llvm-project/commit/3f6a1d179305f266835242ac7d1e55249c50c074
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
Log Message:
-----------
Guard against self-assignment in the DominatorTreeBase move assignment operator. (#116464)
The `DominatorTreeBase` move assignment operator was not self-assignment
safe because the last thing it does before returning is to release all
resources held by the source object. This issue was reported by a static
analysis tool; no self-assignment is known to occur in practice.
Commit: 24c7d97cff189071a3c2195258bc52c7d0e609a5
https://github.com/llvm/llvm-project/commit/24c7d97cff189071a3c2195258bc52c7d0e609a5
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace context-less errorHandler() and error() with ctx.errHandler
Commit: baf59be89ba297b26aff9f62bbda161941512793
https://github.com/llvm/llvm-project/commit/baf59be89ba297b26aff9f62bbda161941512793
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[SelectionDAG] Fix return types of TC_RETURN for several targets (#116504)
TC_RETURN nodes do not have a glue result.
Commit: a626eb2a2fcda460eaad7bd6f2bdfdfa8f0f23c2
https://github.com/llvm/llvm-project/commit/a626eb2a2fcda460eaad7bd6f2bdfdfa8f0f23c2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Pass ctx to bAlloc/saver/uniqueSaver
Commit: ce13dd1f7e5a86dc2a60e12f90e958fb0c7daec0
https://github.com/llvm/llvm-project/commit/ce13dd1f7e5a86dc2a60e12f90e958fb0c7daec0
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputFiles.h
Log Message:
-----------
[ELF] Replace fatal with Fatal(ctx)
Commit: 3b75a5c4c84d17d6647ba079391722ed9be09f85
https://github.com/llvm/llvm-project/commit/3b75a5c4c84d17d6647ba079391722ed9be09f85
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Symbols.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Replace message(...) with Msg(ctx)
Commit: 4a67b93fe8ffa330f3e9018232589e75c58f5806
https://github.com/llvm/llvm-project/commit/4a67b93fe8ffa330f3e9018232589e75c58f5806
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Make checkError context-aware
Commit: 7d13775486b5e83959b0d96137176f366c41e13a
https://github.com/llvm/llvm-project/commit/7d13775486b5e83959b0d96137176f366c41e13a
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/DriverUtils.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Pass ctx &
Commit: 6f87d1437ebd6a72ee67f26fbe5b1fa906ffb574
https://github.com/llvm/llvm-project/commit/6f87d1437ebd6a72ee67f26fbe5b1fa906ffb574
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
Log Message:
-----------
[ELF] Initialize Ctx members
Prevent use of uninitialized memory when `ctx` becomes a local variable.
Commit: abbb0d9c94511c9e10ec2f5ca65f059b6fa5761f
https://github.com/llvm/llvm-project/commit/abbb0d9c94511c9e10ec2f5ca65f059b6fa5761f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Remove unneeded toStr(ctx, x) when using ELFSyncStream
This patch removes the last use of the global `elf::ctx` outside of
elf::link.
Commit: 33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f
https://github.com/llvm/llvm-project/commit/33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Move SharedFile::vernauxNum to Ctx
Commit: 7379a194d5c18de38e32c29ec5c60964e6784296
https://github.com/llvm/llvm-project/commit/7379a194d5c18de38e32c29ec5c60964e6784296
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/PPC64.cpp
Log Message:
-----------
[ELF] Replace PPC64 writeSequence static variables with bAlloc
to reduce global state.
Commit: 73bb022b469a32eb5aee30f2947f3cea5e903caa
https://github.com/llvm/llvm-project/commit/73bb022b469a32eb5aee30f2947f3cea5e903caa
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Remove global ctx
This commit completes the work that eliminates global variables like
config/target/inputSections/symTab from lld/ELF.
Key changes:
* Introduced `lld::elf::ctx` to encapsulate global state.
* Moved global variables into `Ctx lld::elf::ctx`
* Updated many functions to accept `Ctx &ctx`
* Made `ctx` a local variable (this commit)
If we don't count `static std::mutex`, this is the last major global
state within lld/ELF (minor ones like `SharedFile::vernauxNum`
(33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f) might not all be eliminated
yet).
Commit: dc6229bd662cf74a3f4fad75f1e7832123d00db7
https://github.com/llvm/llvm-project/commit/dc6229bd662cf74a3f4fad75f1e7832123d00db7
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[lld] Use context-aware outs() and errs()
Commit: 1bfe55aff5f01e81f268f4ba8dbf25c7fcebdc7c
https://github.com/llvm/llvm-project/commit/1bfe55aff5f01e81f268f4ba8dbf25c7fcebdc7c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/DriverUtils.cpp
M lld/COFF/Writer.cpp
Log Message:
-----------
[lld-link] Replace errorHandler() with ctx.e
errorHandler() uses the global state, which should be avoided in
lld/COFF code.
Commit: 5bb9465d35914e9833c4fe9278a855a4cd75c7af
https://github.com/llvm/llvm-project/commit/5bb9465d35914e9833c4fe9278a855a4cd75c7af
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
[llvm-exegesis] Reserve members in array
This patch reserves members in the RegisterSetUp vector as we statically
know the size.
Commit: 8c7c8eaa1933d24c1eb869ba85469908547e3677
https://github.com/llvm/llvm-project/commit/8c7c8eaa1933d24c1eb869ba85469908547e3677
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/DriverUtils.cpp
M lld/COFF/Writer.cpp
Log Message:
-----------
[lld-link] Replace global lld::errs() with ctx.e.errs()
Commit: fd9f3beb0f3f1745c0eb71e4dbd29ed7c1d04ff6
https://github.com/llvm/llvm-project/commit/fd9f3beb0f3f1745c0eb71e4dbd29ed7c1d04ff6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Upgrade a unit test to Version 3 (#116516)
I'm planning to remove MemProf Version 1, which is a maintenance
burden because it uses a different set of struct fields in
IndexedAllocationInfo and IndexedMemProfRecord compared to Version 2
and 3. (FWIW, Version 2 and 3 are much closer to each other.)
Before we remove the old version, we need to upgrade
test_memprof_merge to Version 3. Here are some remarks:
- Without this patch, we call Writer.addMemProfFrame, which I don't
think is correct. This way, we are adding IndexedMemProfRecord to
Writer2 without any frame. I'm changing that to
Writer2.addMemProfFrame.
- This patch adds a call to getCallStackMapping. Version 2 and 3
require a map from call stack IDs to call stacks.
- I'm calling makeRecordV2 instead of makeRecord to populate the
struct fields used by Version 2 and 3.
- Version 1 uses MemProfRecord::MemProfRecord (that is, a constructor)
to convert IndexedMemProfRecord to MemProfRecord. Version 2 and 3
use MemProfRecord::toMemProfRecord, a member function, to do the
same task.
Commit: 9664ce6d5955647d00eac7d74188008917857b21
https://github.com/llvm/llvm-project/commit/9664ce6d5955647d00eac7d74188008917857b21
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Simplify complex diagnostics
Commit: e57331ec6344fd0a5cd04e2f2da38d139cbf2417
https://github.com/llvm/llvm-project/commit/e57331ec6344fd0a5cd04e2f2da38d139cbf2417
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Move global relocMutex/undefs into Ctx
Commit: c1a6defd9ff1540638d660888c5f32ea5cf4fa7d
https://github.com/llvm/llvm-project/commit/c1a6defd9ff1540638d660888c5f32ea5cf4fa7d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[ELF] Make RelType a struct type
otherwise operator<<(const ELFSyncStream &s, RelType type) applies to
non-reloc-type uint32_t, which can be confusing.
Commit: 483516fd83f000fd6b2ac1cde943f5639f72b9e9
https://github.com/llvm/llvm-project/commit/483516fd83f000fd6b2ac1cde943f5639f72b9e9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Remove unneeded Twine()
Commit: a6140af4f063f9b116e50d1b66b94fc912d822a4
https://github.com/llvm/llvm-project/commit/a6140af4f063f9b116e50d1b66b94fc912d822a4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
Log Message:
-----------
[Mips] Reduce number of selectVSplatUimm/Simm functions by using templates. (#116475)
The implementaton of methods only vary by what arguments they pass to
selectVSplatCommon.
Turn selectVSplatCommon into a virtual function and use template methods
in the base class to pass the immediate size.
Commit: 834457a1342c0a7e32fa36238c877636a19198ba
https://github.com/llvm/llvm-project/commit/834457a1342c0a7e32fa36238c877636a19198ba
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Simplify relocateNonAlloc diagnostic
Commit: ddc0eb70c8b60de9fa5e55f550ff3ac822c849f1
https://github.com/llvm/llvm-project/commit/ddc0eb70c8b60de9fa5e55f550ff3ac822c849f1
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/MinGW/Driver.cpp
Log Message:
-----------
[lld,MinGW] Use context-aware outs() and errs()
lld::outs() and lld::errs() use the global errorHandler() and should be
avoided.
Commit: 2f4572f5e7e2d7f4626e825404c11f07d191fb05
https://github.com/llvm/llvm-project/commit/2f4572f5e7e2d7f4626e825404c11f07d191fb05
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
Log Message:
-----------
[Mips] Change vsplat_imm_eq_1 to a ComplexPattern. (#116471)
Resolves a FIXME and avoids needing to workaround #116075.
Adding parentheses around the (vsplat_imm_eq_1) fixes the error cited in
the FIXME by changing the ComplexPattern from a leaf node to an
operator.
Commit: fcb6b132fa7284426349d6d0063d3a0ed8864683
https://github.com/llvm/llvm-project/commit/fcb6b132fa7284426349d6d0063d3a0ed8864683
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/DriverUtils.cpp
M lld/Common/ErrorHandler.cpp
M lld/MachO/Driver.cpp
M lld/MachO/Driver.h
M lld/MachO/DriverUtils.cpp
M lld/include/lld/Common/ErrorHandler.h
M lld/include/lld/Common/LLVM.h
M lld/wasm/Driver.cpp
Log Message:
-----------
[lld] Use context-aware outs() and errs()
For COFF and ELF that are mostly free of global states, lld::errs() and
lld::outs() should not be used. This migration change allows us to
remove lld::errs, which uses the global errorHandler().
Commit: 3c5f33717cc596df286c6439419b84db599681f9
https://github.com/llvm/llvm-project/commit/3c5f33717cc596df286c6439419b84db599681f9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove unused tablegen class. NFC
Commit: 34712c345561870de871e6831735a5683c9660c2
https://github.com/llvm/llvm-project/commit/34712c345561870de871e6831735a5683c9660c2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove unnecessary casts from some isel patterns. NFC
Commit: 275bcd02380fb3bd40b747ed320fcac266b971bc
https://github.com/llvm/llvm-project/commit/275bcd02380fb3bd40b747ed320fcac266b971bc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove some duplicate PatFrags. NFC
Commit: b3230dd452bc8eb9ab4479cdb98f944838cb58b6
https://github.com/llvm/llvm-project/commit/b3230dd452bc8eb9ab4479cdb98f944838cb58b6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove roots from ComplexPatterns that are never used as roots. NFC
Commit: 8f238f662c8237b88392f8a94469cd50d86636d6
https://github.com/llvm/llvm-project/commit/8f238f662c8237b88392f8a94469cd50d86636d6
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/LTO.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Make Ctx inherit from CommonLinkerContext
link calls `new CommonLinkerContext`. Now that `Ctx ctx` is a local
variable, we can make it inherit from CommonLinkerContext.
Commit: 2991a4e2097ab3f32d37fdceab08c658836e312c
https://github.com/llvm/llvm-project/commit/2991a4e2097ab3f32d37fdceab08c658836e312c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace functions bAlloc/saver/uniqueSaver with member access
Commit: dbf37e956a0dd60ac84e3c08bc1fe8170cf44d22
https://github.com/llvm/llvm-project/commit/dbf37e956a0dd60ac84e3c08bc1fe8170cf44d22
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
Log Message:
-----------
[ELF] Move InputFile storage from make<> to LinkerDriver::files
Commit: 53dc4e7600f95ae232bc49b9051f77199e79ec13
https://github.com/llvm/llvm-project/commit/53dc4e7600f95ae232bc49b9051f77199e79ec13
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] createSyntheticSections: replace some make<> with unique_ptr
This removes some SpecificAlloc instantiations and makes lld smaller.
This drops the small memory waste due to the separate BumpPtrAllocator.
Commit: 5b1b6a62b8bd986adc711d0c0be5b6a8182be263
https://github.com/llvm/llvm-project/commit/5b1b6a62b8bd986adc711d0c0be5b6a8182be263
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Make elfHeader/programHeaders unique_ptr
This removes some SpecificAlloc instantiations, makes lld smaller, and
drops the small memory waste due to the separate BumpPtrAllocator.
Commit: 49b29368f72c493e61506b4203e7852f55e17062
https://github.com/llvm/llvm-project/commit/49b29368f72c493e61506b4203e7852f55e17062
Author: David Green <david.green at arm.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/phi.ll
Log Message:
-----------
[AArch64][GlobalISel] Expand handling of phi operations
Like other operations, non-power-2 vectors are widened to a power-2, larger
vectors with i128 elements are scalarized and smaller vectors are widened to be
at least 64bit.
Commit: f0b8025ca27f722777dcf3fe8b9e367d18bb2eb1
https://github.com/llvm/llvm-project/commit/f0b8025ca27f722777dcf3fe8b9e367d18bb2eb1
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
Log Message:
-----------
[mlir][Quant][NFC] Apply clang-format to `StripFuncQuantTypes.cpp` (#116535)
Commit: 811186764d1add4d83972db3ad0d2e7c96bb15a7
https://github.com/llvm/llvm-project/commit/811186764d1add4d83972db3ad0d2e7c96bb15a7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__ranges/to.h
Log Message:
-----------
[libc++] Fix a few problems found by clang-tidy
Commit: 206ee7191834186ae78bf57fcf21d29dd7ce24cf
https://github.com/llvm/llvm-project/commit/206ee7191834186ae78bf57fcf21d29dd7ce24cf
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Change vector tuple type's TypeSize to scalable (#114329)
Vector tuple is basically multiple grouped vector, so its size is also
determined by vscale, we need not to model it as a vector type but its
size need to be scalable.
Commit: 7c010bfdc540890e33c5db2424e0cfb9df08d410
https://github.com/llvm/llvm-project/commit/7c010bfdc540890e33c5db2424e0cfb9df08d410
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/include/__chrono/time_point.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/ratio
Log Message:
-----------
[libc++] Remove some unnecessary boilerplate in <__chrono/duration.h> (#116238)
Commit: 2edfa50e7fb8f34736b8d9d216ac908d08b2b0f8
https://github.com/llvm/llvm-project/commit/2edfa50e7fb8f34736b8d9d216ac908d08b2b0f8
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M offload/README.md
Log Message:
-----------
[Offload][NFC] Update README.md
Commit: 63aa8cf6becbeb4983e3d1a7fa3cd8a7c7147118
https://github.com/llvm/llvm-project/commit/63aa8cf6becbeb4983e3d1a7fa3cd8a7c7147118
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/ClangDataCollectorsEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
Log Message:
-----------
[NFC][Clang][TableGen] Fix file header comments (#116491)
Commit: 5c8c90d8212d8720fd8630aecc634bdff6261ad6
https://github.com/llvm/llvm-project/commit/5c8c90d8212d8720fd8630aecc634bdff6261ad6
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
M llvm/lib/LTO/LTOBackend.cpp
Log Message:
-----------
[NFC][LLVM] Fix a couple of build warnings (#116490)
- Fix `HANDLE_EXTENSION` macro redefinition warning in LTOBackend.cpp
- Fix "unnecessary brackets" around rf/df variable definitions warning.
Commit: 7e8bc5cf77bdda9e32b984b3fa91953361f24abb
https://github.com/llvm/llvm-project/commit/7e8bc5cf77bdda9e32b984b3fa91953361f24abb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
M llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
M llvm/lib/Target/Hexagon/HexagonGenMemAbsolute.cpp
M llvm/lib/Target/Hexagon/HexagonGenMux.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/Hexagon/HexagonPeephole.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
M llvm/lib/Target/Hexagon/RDFCopy.cpp
Log Message:
-----------
[Hexagon] Remove unused includes (NFC) (#116529)
Identified with misc-include-cleaner.
Commit: 5b7102d1f37eab7a8f17b7bf4124ca76fbdbd66d
https://github.com/llvm/llvm-project/commit/5b7102d1f37eab7a8f17b7bf4124ca76fbdbd66d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ObjectYAML/ArchiveEmitter.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLTypeHashing.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFYAML.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/ObjectYAML/MinidumpYAML.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/ObjectYAML/yaml2obj.cpp
Log Message:
-----------
[ObjectYAML] Remove unused includes (NFC) (#116530)
Identified with misc-include-cleaner.
Commit: 54dad9e269f365d0eff2f63c5ee843564eecca7e
https://github.com/llvm/llvm-project/commit/54dad9e269f365d0eff2f63c5ee843564eecca7e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ObjCopy/Archive.cpp
M llvm/lib/ObjCopy/COFF/COFFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
M llvm/lib/ObjCopy/ObjCopy.cpp
M llvm/lib/ObjCopy/XCOFF/XCOFFObjcopy.cpp
M llvm/lib/ObjCopy/wasm/WasmObject.cpp
M llvm/lib/ObjCopy/wasm/WasmWriter.cpp
Log Message:
-----------
[ObjCopy] Remove unused includes (NFC) (#116534)
Identified with misc-include-cleaner.
Commit: dec6324cb05ac1d339c1b2bd43add968f2931c62
https://github.com/llvm/llvm-project/commit/dec6324cb05ac1d339c1b2bd43add968f2931c62
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/CommentCommandTraits.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DeclarationName.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OSLog.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtIterator.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTTBuilder.cpp
Log Message:
-----------
[AST] Remove unused includes (NFC) (#116549)
Identified with misc-include-cleaner.
Commit: 2d7ec7f0d39cb4b816fc9b9d535519c726980121
https://github.com/llvm/llvm-project/commit/2d7ec7f0d39cb4b816fc9b9d535519c726980121
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Rename the label for libc++ self-hosted runners (#116540)
Commit: 875d24c2302cf0194fdd44b012623f395a705863
https://github.com/llvm/llvm-project/commit/875d24c2302cf0194fdd44b012623f395a705863
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Config.h
Log Message:
-----------
[ELF] Avoid list initialization with incomplete unique_ptr<OutputSection> member to work around clang < 16
Commit 5b1b6a62b8bd986adc711d0c0be5b6a8182be263 introduced the following
issue for older clang with libstdc++
```
In file included from /home/ray/llvm/lld/ELF/EhFrame.cpp:18:
In file included from /home/ray/llvm/lld/ELF/EhFrame.h:12:
In file included from /home/ray/llvm/lld/include/lld/Common/LLVM.h:21:
In file included from /home/ray/llvm/llvm/include/llvm/Support/Casting.h:20:
In file included from /usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/memory:78:
/usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/bits/unique_ptr.h:91:16: error: invalid application of 'sizeof' to an incomplete type 'lld::elf::OutputSection'
static_assert(sizeof(_Tp)>0,
^~~~~~~~~~~
/usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/bits/unique_ptr.h:398:4: note: in instantiation of member function 'std::default_delete<lld::elf::OutputSection>::operator()' requested here
get_deleter()(std::move(__ptr));
^
/home/ray/llvm/lld/ELF/Config.h:574:19: note: in instantiation of member function 'std::unique_ptr<lld::elf::OutputSection>::~unique_ptr' requested here
OutSections out{};
^
```
Commit: 0060c54e0da6d1429875da2d30895faa7562b706
https://github.com/llvm/llvm-project/commit/0060c54e0da6d1429875da2d30895faa7562b706
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp
M llvm/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugStringTableSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugSubsectionVisitor.cpp
M llvm/lib/DebugInfo/CodeView/GlobalTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/LazyRandomTypeCollection.cpp
M llvm/lib/DebugInfo/CodeView/MergingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/SymbolSerializer.cpp
M llvm/lib/DebugInfo/CodeView/TypeTableCollection.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/GSYM/ExtractRanges.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/DebugInfo/GSYM/InlineInfo.cpp
M llvm/lib/DebugInfo/GSYM/LookupResult.cpp
M llvm/lib/DebugInfo/GSYM/ObjectFileTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSort.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSupport.cpp
M llvm/lib/DebugInfo/LogicalView/LVReaderHandler.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/DebugInfo/PDB/Native/DbiModuleList.cpp
M llvm/lib/DebugInfo/PDB/Native/FormatUtil.cpp
M llvm/lib/DebugInfo/PDB/Native/GlobalsStream.cpp
M llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
M llvm/lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp
M llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumGlobals.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumInjectedSources.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumLineNumbers.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumSymbols.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeSession.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeArray.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeVTShape.cpp
M llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolCompiland.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFunc.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolPublicSymbol.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp
M llvm/lib/DebugInfo/Symbolize/Markup.cpp
M llvm/lib/DebugInfo/Symbolize/MarkupFilter.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
Log Message:
-----------
[DebugInfo] Remove unused includes (NFC) (#116551)
Identified with misc-include-cleaner.
Commit: 6d98f11f3b5498262917802323942c8dfc2a226f
https://github.com/llvm/llvm-project/commit/6d98f11f3b5498262917802323942c8dfc2a226f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Work around extra "warning: $" with MSVC 14.41.34120
Commit: ec950b206353cfc36fb0701f1a77cc18aa2d18aa
https://github.com/llvm/llvm-project/commit/ec950b206353cfc36fb0701f1a77cc18aa2d18aa
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/test/ELF/aarch64-abs64-dyn.s
M lld/test/ELF/aarch64-cortex-a53-843419-address.s
M lld/test/ELF/aarch64-cortex-a53-843419-large.s
M lld/test/ELF/aarch64-cortex-a53-843419-large2.s
M lld/test/ELF/aarch64-cortex-a53-843419-nopatch.s
M lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
M lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
M lld/test/ELF/aarch64-fpic-abs16.s
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-adr_prel_lo21.s
M lld/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s
M lld/test/ELF/aarch64-fpic-got.s
M lld/test/ELF/aarch64-fpic-ldst32_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst64_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst8_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-prel16.s
M lld/test/ELF/aarch64-fpic-prel32.s
M lld/test/ELF/aarch64-fpic-prel64.s
M lld/test/ELF/aarch64-gnu-ifunc-address.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable2.s
M lld/test/ELF/aarch64-gnu-ifunc-nosym.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-gnu-ifunc.s
M lld/test/ELF/aarch64-gnu-ifunc2.s
M lld/test/ELF/aarch64-got-weak-undef.s
M lld/test/ELF/aarch64-ifunc-bti.s
M lld/test/ELF/aarch64-lo12-alignment.s
M lld/test/ELF/aarch64-memtag-android-abi.s
M lld/test/ELF/aarch64-memtag-globals.s
M lld/test/ELF/aarch64-undefined-weak.s
M lld/test/ELF/pack-dyn-relocs-loop.s
Log Message:
-----------
[ELF,test] Replace aarch64-none-* with aarch64
"none" is valid OS component and can cause confusion when used together
with linux/freebsd.
Commit: feb9b3701bf6650f91e12e7f4efbe72383f3f60b
https://github.com/llvm/llvm-project/commit/feb9b3701bf6650f91e12e7f4efbe72383f3f60b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Address post-commit comments for #113915.
Address post-commit comments for
https://github.com/llvm/llvm-project/pull/113915.
Commit: a8538b9138574142b9338ad0fce0f8ba1065fcbc
https://github.com/llvm/llvm-project/commit/a8538b9138574142b9338ad0fce0f8ba1065fcbc
Author: Julian Nagele <j.nagele at apple.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
A llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
Log Message:
-----------
[LV] Vectorize Epilogues for loops with small VF but high IC (#108190)
- Consider MainLoopVF * IC when determining whether Epilogue
Vectorization is profitable
- Allow the same VF for the Epilogue as for the main loop
- Use an upper bound for the trip count of the Epilogue when choosing
the Epilogue VF
PR: https://github.com/llvm/llvm-project/pull/108190
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: eed9af95e6133e94449c7be585bc3b5fad8ad769
https://github.com/llvm/llvm-project/commit/eed9af95e6133e94449c7be585bc3b5fad8ad769
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-load-store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Make loads/stores with s16 register type and s16 memory type legal.
This is needed to support Zfh loads/stores.
This requires supporting extends from sext/zext form i16 and s16
G_FREEZE to support the current tests we have.
Commit: c4eeef32d5dc8ec7560edabf18ac29416a7551e5
https://github.com/llvm/llvm-project/commit/c4eeef32d5dc8ec7560edabf18ac29416a7551e5
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
[TBAA] Add test for generating pointer-tbaa for unnamed structs.
Currently we generate incorrect metadata not considering compatible
types in C.
Commit: 93a4244523b171c8a9cc2ba23e1107ef0ddf7436
https://github.com/llvm/llvm-project/commit/93a4244523b171c8a9cc2ba23e1107ef0ddf7436
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
Log Message:
-----------
[BOLT] Use new assembler directives for EH table emission (#116294)
When emitting C++ exception tables (LSDAs), BOLT used to estimate the
size of the tables beforehand. This implementation was necessary as the
assembler/streamer lacked the emitULEB128IntValue() functionality.
As I plan to introduce [u|s]uleb128-encoded exception tables in BOLT,
now is a perfect time to switch to the new API and eliminate the need
to pre-compute the size of the tables.
Commit: 315519917368dce841f1cb1e7b296846d13497c3
https://github.com/llvm/llvm-project/commit/315519917368dce841f1cb1e7b296846d13497c3
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
Log Message:
-----------
Thread safety analysis: Eliminate unneeded const_cast, NFC
Commit: 521c99627690e09ba25383c83232f94ff457f00c
https://github.com/llvm/llvm-project/commit/521c99627690e09ba25383c83232f94ff457f00c
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
Log Message:
-----------
[JITLink] Move Symbol to new block before updating size.
Symbol::setSize asserts that the new size does not overflow the containing
block, so we need to point the Symbol at the correct Block before updating its
size (otherwise we may get a spurious overflow assertion).
Commit: 224290d44899be4614eb6795aa514103cd76e597
https://github.com/llvm/llvm-project/commit/224290d44899be4614eb6795aa514103cd76e597
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
A llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
[ORC] Add LazyObjectLinkingLayer, lazy-linking support to llvm-jitlink (#116002)
LazyObjectLinkingLayer can be used to add object files that will not be linked
into the executor unless some function that they define is called at runtime.
(References to data members defined by these objects will still trigger
immediate linking)
To implement lazy linking, LazyObjectLinkingLayer uses the lazyReexports
utility to construct stubs for each function in a given object file, and an
ObjectLinkingLayer::Plugin to rename the function bodies at link-time. (Data
symbols are not renamed)
The llvm-jitlink utility is extended with a -lazy option that can be
passed before input files or archives to add them using the lazy linking
layer rather than the base ObjectLinkingLayer.
Commit: 723dec66f0a74888bb05862a543b0d7e7f96e1de
https://github.com/llvm/llvm-project/commit/723dec66f0a74888bb05862a543b0d7e7f96e1de
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 224290d44899
Commit: 826b845c9e97448395431be3e4e5da585bd98c5e
https://github.com/llvm/llvm-project/commit/826b845c9e97448395431be3e4e5da585bd98c5e
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
[X86] Support -march=diamondrapids (#113881)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 90e92239bd0706c44ef4add018c702e53101b253
https://github.com/llvm/llvm-project/commit/90e92239bd0706c44ef4add018c702e53101b253
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
Revert "[X86] Support -march=diamondrapids (#113881)" (#116563)
This reverts commit 826b845c9e97448395431be3e4e5da585bd98c5e.
Commit: 18ee00323f5fc22d32a74b636fcac84e697241f3
https://github.com/llvm/llvm-project/commit/18ee00323f5fc22d32a74b636fcac84e697241f3
Author: Alexander Belyaev <32522095+pifon2a at users.noreply.github.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][complex] Add a numerically-stable lowering for complex.expm1. (#115082)
The current conversion to Standard in the MLIR repo is not stable for
small imag(arg).
Commit: 6349c1c2819549565186f6b3b031b5f8fdd52bca
https://github.com/llvm/llvm-project/commit/6349c1c2819549565186f6b3b031b5f8fdd52bca
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Disable lazy-linking test on armv8 and powerpc.
These architectures are not supported yet.
Commit: c0cbcb4efe80eacfbfae1dac92657d7913270c4b
https://github.com/llvm/llvm-project/commit/c0cbcb4efe80eacfbfae1dac92657d7913270c4b
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Tweak lazy-link testcase's UNSUPPORTED condition for armv8a.
The previous attempt in 6349c1c28195 didn't seem to work: the test is still
failing as of https://lab.llvm.org/buildbot/#/builders/154/builds/7609.
Commit: 06011fee3ae0e9683aa8dbad50bf6ae35ee27e19
https://github.com/llvm/llvm-project/commit/06011fee3ae0e9683aa8dbad50bf6ae35ee27e19
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
Log Message:
-----------
[mlir] Fix -Wsign-compare in ComplexToStandard.cpp (NFC)
/llvm-project/mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp:529:21:
error: comparison of integers of different signs: 'int' and 'size_t' (aka 'unsigned long') [-Werror,-Wsign-compare]
529 | for (int i = 1; i < coefficients.size(); ++i) {
| ~ ^ ~~~~~~~~~~~~~~~~~~~
1 error generated.
Commit: 97836bed6357664f9b2fb87cfe10656b08309bac
https://github.com/llvm/llvm-project/commit/97836bed6357664f9b2fb87cfe10656b08309bac
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
Reland "[X86] Support -march=diamondrapids (#113881)" (#116564)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 61d1b7c5eded9b0e6e8adcd74cf181b3458656ed
https://github.com/llvm/llvm-project/commit/61d1b7c5eded9b0e6e8adcd74cf181b3458656ed
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Tweak lazy-link testcase's UNSUPPORTED condition for armv8a some more.
The change in c0cbcb4efe8 was insufficient: The armv8a subarch is a property of
the compiled testcase, not the test target triple. Having double-checked the
EPCIndirectionUtils::Create method we want to disable this test for all arm.*
prefixes except arm64 (we want the test to continue working on Darwin).
Commit: 92ffefe3510e0cbf5b9ded0f2e2caff4e6803f17
https://github.com/llvm/llvm-project/commit/92ffefe3510e0cbf5b9ded0f2e2caff4e6803f17
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
Log Message:
-----------
[Tablegen] Add more comments for result numbers to DAGISelEmitter.cpp (#116533)
Print what result number the Emit* nodes are storing their results in.
This makes it easy to track the inputs of later opcodes that consume
these results.
Commit: 45e882e2bfdb62b5930c22687525e0d8f7788f03
https://github.com/llvm/llvm-project/commit/45e882e2bfdb62b5930c22687525e0d8f7788f03
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
Log Message:
-----------
[RISCV] Add IsRV32 to some isel patterns not needed for RV64.
Commit: d9eda6b2f3843cf63fa36e7d5d670ca225cbcbd7
https://github.com/llvm/llvm-project/commit/d9eda6b2f3843cf63fa36e7d5d670ca225cbcbd7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/Inputs/input.ll
Log Message:
-----------
[MLGO] Remove extranous check lines from test input
This patch removes check lines from a test input. It was originally
copied from a test that had assertions automatically generated, but
given we only use it as an input, the check lines do absolutely nothing.
Remove them to improve readability of the test/prevent confusion.
Commit: 24feaab8380c69d5fa3eb8c21ef2d660913fd4a9
https://github.com/llvm/llvm-project/commit/24feaab8380c69d5fa3eb8c21ef2d660913fd4a9
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/statistics/basic/TestStats.py
A lldb/test/API/commands/statistics/basic/second.cpp
Log Message:
-----------
Fix statistics dump to report per-target (#113723)
"statistics dump" currently report the statistics of all targets in
debugger instead of current target. This is wrong because there is a
"statistics dump --all-targets" option that supposed to include
everything.
This PR fixes the issue by only report statistics for current target
instead of all. It also includes the change to reset statistics debug
info/symbol table parsing/indexing time during debugger destroy. This is
required so that we report current statistics if we plan to reuse
lldb/lldb-dap across debug sessions
---------
Co-authored-by: jeffreytan81 <jeffreytan at fb.com>
Commit: 686a291cdc909e9ab7c8659aa1cab82d0182d0d2
https://github.com/llvm/llvm-project/commit/686a291cdc909e9ab7c8659aa1cab82d0182d0d2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
Log Message:
-----------
[ELF] Change Msg to respect stdoutOS
Commit: 1c4f335ec29c6bb269d0f8b2d6149d439312c69a
https://github.com/llvm/llvm-project/commit/1c4f335ec29c6bb269d0f8b2d6149d439312c69a
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/test/ELF/aarch64-feature-pauth.s
Log Message:
-----------
[PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (#113945)
Assume PAC instructions being supported with PAuth core info different from (0,0). The (0,0) value means that an ELF file is incompatible with PAuth - see https://github.com/ARM-software/abi-aa/blob/2024Q3/pauthabielf64/pauthabielf64.rst#core-information. With PAC non-hint instructions supported, `autia1716; br x17` can be replaced with `braa x17, x16; nop`, where `braa` is an authenticated branch instruction using IA key, discriminator from x16 and signed target address from x17.
Commit: fd3ff2007ab30c74772572798f3e494fdaac7ac2
https://github.com/llvm/llvm-project/commit/fd3ff2007ab30c74772572798f3e494fdaac7ac2
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/loop-directive.f90
A flang/test/Lower/OpenMP/loop-directive.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[flang][OpenMP] Add basic support to lower `loop` directive to MLIR (#114199)
Adds initial support for lowering the `loop` directive to MLIR.
The PR includes basic suport and testing for the following clauses:
* `collapse`
* `order`
* `private`
* `reduction`
Parent PR: #113911, only the latest commit is relevant to this PR.
Commit: 00aa08119aa03ea4722196bc7d0e84a4e2a044c7
https://github.com/llvm/llvm-project/commit/00aa08119aa03ea4722196bc7d0e84a4e2a044c7
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
[NFC] Clang format PeepholeOptimizer (#116325)
Commit: 3f9d02aae87b7c778b86cb79ebd4b64760653079
https://github.com/llvm/llvm-project/commit/3f9d02aae87b7c778b86cb79ebd4b64760653079
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/PeepholeOptimizer.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
M llvm/test/CodeGen/ARM/cmp1-peephole-thumb.mir
M llvm/test/CodeGen/Lanai/peephole-compare.mir
M llvm/test/CodeGen/PowerPC/bitcast-peephole.mir
Log Message:
-----------
[CodeGen][NewPM] Port PeepholeOptimizer to NPM (#116326)
With this, all machine SSA optimization passes are available in the new codegen pipeline.
Commit: 5ff52436fd0c7739765f1d849992713a3e9ae237
https://github.com/llvm/llvm-project/commit/5ff52436fd0c7739765f1d849992713a3e9ae237
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
Relax clang/test/CodeGen/tbaa-pointers.c for -Asserts.
Fixes c4eeef32d5dc (llvmorg-20-init-12475-gc4eeef32d5dc)
Commit: c2a3ed22695ee81f41452c8350c313c620aa75e6
https://github.com/llvm/llvm-project/commit/c2a3ed22695ee81f41452c8350c313c620aa75e6
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Bump libc++ CI to a more recent version of the Docker image (#116558)
The Docker image was built using the recently introduced Action that
builds and pushes to the LLVM Docker registry.
Commit: 3c31ee740669fc80ff1bb4ae3724aa778cd1659e
https://github.com/llvm/llvm-project/commit/3c31ee740669fc80ff1bb4ae3724aa778cd1659e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
Log Message:
-----------
[APInt] Call countTrailingZerosSlowCase() directly from isShiftedMask. NFC
We checked the single word case already and we already call
countLeadingZerosSlowCase and countPopulationSlowCase.
Commit: b4c0ef18226b7d1f82d71fc0171b99caec0d8d12
https://github.com/llvm/llvm-project/commit/b4c0ef18226b7d1f82d71fc0171b99caec0d8d12
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
Log Message:
-----------
[flang][OpenMP] Add MLIR lowering for `loop ... bind` (#114219)
Extends MLIR lowering support for the `loop` directive by adding
lowering support for the `bind` clause.
Parent PR: https://github.com/llvm/llvm-project/pull/114199, only the
latest commit is relevant to this PR.
Commit: 1dcb3db0ac1255bf556bf6b62d03a113bd5191d8
https://github.com/llvm/llvm-project/commit/1dcb3db0ac1255bf556bf6b62d03a113bd5191d8
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-phi.ll
M llvm/test/Transforms/LowerConstantIntrinsics/objectsize_basic.ll
Log Message:
-----------
[llvm] Fix behavior of llvm.objectsize in presence of negative / large offset (#115504)
The internal structure used to carry intermediate computations hold
signed values. If an object size happens to overflow signed values, we
can get invalid result, so make sure this situation never happens.
This is not very limitative as static allocation of such large values
should scarcely happen.
Commit: 63b926af5ff43a90dac285bbe0750e41e622eb3f
https://github.com/llvm/llvm-project/commit/63b926af5ff43a90dac285bbe0750e41e622eb3f
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
A mlir/test/Dialect/Linalg/lit.local.cfg
A mlir/test/Dialect/Linalg/td/generalize-pack.mlir
Log Message:
-----------
[mlir] Add apply_patterns.linalg.generalize_pack_unpack TD Op (#116373)
This PR introduces populateGeneralizePatterns, which collects the
following patterns:
* `GeneralizeOuterUnitDimsPackOpPattern`,
* `GeneralizeOuterUnitDimsUnPackOpPattern` (currently a TODO).
These patterns are wrapped in a new Transform Dialect Op:
`apply_patterns.linalg.generalize_pack_unpack`. This Op facilitates
creating more involved end-to-end compilation pipelines for
`tensor.pack` and `tensor.unpack` operations. It will be required in an
upcoming PR building on top of #115698.
No new tests are added in this PR. Instead, existing tests from:
* "generalize-tensor-pack.mlir"
are reused. To achieve this:
* I've updated the test to use
`transform.apply_patterns.linalg.generalize_pack_unpack` instead of
the flag
`--test-linalg-transform-patterns="test-generalize-tensor-pack"`,
avoiding artificial tests solely for the TD Op.
* The TD sequence is saved to a new file, "generalize_pack.mlir", and
pre-loaded using the option:
`--transform-preload-library='transform-library-paths=%p/td/generalize_pack.mlir'`
This avoids duplicating the sequence for every "split" in the input
file.
* Added "lit.local.cfg" to exclude the "test/Dialect/Linalg/td"
directory from test discovery, ensuring "generalize_pack.mlir" is
not treated as a test file.
Commit: 4548bff0e8139d4f375f1078dd50a74116eae0a2
https://github.com/llvm/llvm-project/commit/4548bff0e8139d4f375f1078dd50a74116eae0a2
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/test/IR/invalid-builtin-attributes.mlir
Log Message:
-----------
[mlir][Parser] Deduplicate floating-point parsing functionality (#116172)
The following functionality is duplicated in multiple places: trying to
parse an APFloat from a floating point literal or an integer in
hexadecimal representation (bit pattern). Move it to a common helper
function.
NFC apart from the slightly changed error messages. (We now print the
exact same error messages regardless of whether the float is parsed
standalone or inside of a tensor literal, etc.)
Commit: 4f78f8519056953d26102c7426fbb028caf13bc9
https://github.com/llvm/llvm-project/commit/4f78f8519056953d26102c7426fbb028caf13bc9
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAttributes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/decorations.mlir
Log Message:
-----------
[MLIR][SPIRV] Add definition and (de)serialization for cache controls (#115461)
[SPV_INTEL_cache_controls](https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_cache_controls.html)
defines decorations for load and store cache control. Add support for
this extension in the SPIR-V dialect.
As several `CacheControlLoadINTEL` and `CacheControlStoreINTEL` may be
applied to the same value, these are represented as array attributes.
(De)Serialization takes care of this representation.
---------
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: b5bc528c140f6dab6600a64c020cdbf6003e4d35
https://github.com/llvm/llvm-project/commit/b5bc528c140f6dab6600a64c020cdbf6003e4d35
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale_dir/pad_and_output.h
Log Message:
-----------
[libc++] Guard `__pad_and_output` with `_LIBCPP_HAS_LOCALIZATION` (#116580)
This fixes errors for no-localization builds (possibly introduced by
#116223).
Commit: 3fc5bb601ee1072605f1290b246874e01f3c26d9
https://github.com/llvm/llvm-project/commit/3fc5bb601ee1072605f1290b246874e01f3c26d9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
Log Message:
-----------
[Mips] Use getSignedConstant() for signed values (#116405)
This also adds a getSignedTargetConstant() helper, as these seem to be
fairly common in general.
Commit: 9a844a36eb9a21de27882b6193a82fda49986347
https://github.com/llvm/llvm-project/commit/9a844a36eb9a21de27882b6193a82fda49986347
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/cast-mul-select.ll
M llvm/test/Transforms/InstCombine/extract-select-agg.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
Log Message:
-----------
[InstCombine] Use InstSimplify in FoldOpIntoSelect (#116073)
Instead of only trying to constant fold the select arms, try to simplify
them. This subsumes https://github.com/llvm/llvm-project/pull/115969
which implements this for extractvalue only.
This is still fairly limited in that we will usually only call
FoldOpIntoSelect in the first place if we have a constant operand. This
can be relaxed in the future if worthwhile.
Commit: 6a12b43ac00096976a886bd6d3a1b70a804d09ca
https://github.com/llvm/llvm-project/commit/6a12b43ac00096976a886bd6d3a1b70a804d09ca
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .ci/generate_test_report.py
Log Message:
-----------
[ci] Fix error when no junit files are passed to report generator
This resulted in the style being None and despite the report being
empty as well, we tried to send it to the agent and Python can't
send None as an argument.
To fix this return "success" style and also check whether the
report has any content before calling the agent.
Commit: db90673d16e722726aa35fc009cbe6bd0b76b0c0
https://github.com/llvm/llvm-project/commit/db90673d16e722726aa35fc009cbe6bd0b76b0c0
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
Log Message:
-----------
[InstCombine] Re-queue users of phi when nsw/nuw flags of add are inferred (#113933)
This patch re-queue users of phi when one of its incoming add
instructions is updated. If an add instruction is updated, the analysis
results of phis may be improved. Thus we may further fold some users of
this phi node.
See the following case:
```
define i8 @trunc_in_loop_exit_block() {
; CHECK-LABEL: @trunc_in_loop_exit_block(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[IV_NEXT]], [[LOOP_LATCH]] ]
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[IV]], 100
; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_LATCH]], label [[EXIT:%.*]]
; CHECK: loop.latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT: br label [[LOOP]]
; CHECK: exit:
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[PHI]] to i8
; CHECK-NEXT: ret i8 [[TRUNC]]
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
%phi = phi i32 [ 1, %entry ], [ %iv.next, %loop.latch ]
%cmp = icmp ult i32 %iv, 100
br i1 %cmp, label %loop.latch, label %exit
loop.latch:
%iv.next = add i32 %iv, 1
br label %loop
exit:
%trunc = trunc i32 %phi to i8
ret i8 %trunc
}
```
`%iv u< 100` -> infer `nsw/nuw` for `%iv.next = add i32 %iv, 1`
-> `%iv` is non-negative -> infer `samesign` for `%cmp = icmp ult i32
%iv, 100`.
Without re-queuing users of phi nodes, we cannot improve `%cmp` in one
iteration.
Address review comment
https://github.com/llvm/llvm-project/pull/112642#discussion_r1804712271.
This patch also fixes some non-fixpoint issues in tests.
Commit: 4e7682b1c47d4bd81acb6bcb028b48a4ebff9117
https://github.com/llvm/llvm-project/commit/4e7682b1c47d4bd81acb6bcb028b48a4ebff9117
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.cpp
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_ranges-missing-section.s
Log Message:
-----------
[lldb] rm DWARFDebugRanges (#116379)
The class is only used from one place, which is trivial to implement
using the llvm class.
The main difference is that in the new implementation, the ranges are
parsed each time anew (instead of being parsed at startup and cached). I
believe this is fine because:
- this is already how things work with DWARF v5 debug_rnglists
- parsing debug_ranges is fairly fast (definitely faster than rnglists)
- generally, this result will be cached at a higher level anyway.
Browsing the code I did find one instance where that is not the case --
SymbolFileDWARF::ResolveFunctionAndBlock -- which is called each time we
resolve an address (to the block level). However, this function is
already pretty suboptimal: it first traverses the DIE tree (which
involves parsing all the DIE attributes) to find the correct block, then
it parses them again to construct the `lldb_private::Block`
representation, and *then* it uses the ID of the block DIE it found in
the first step to look up the `Block` object. If this turns out to be a
bottleneck, I think there are better ways to optimize it than caching
the debug_ranges parse.
The motiviation for this is that DWARFDebugRanges sorts the block
ranges, even though the order of the ranges is load-bearing (in the
absence of DW_AT_low_pc, the "base address" of a scope is determined by
the first range entry). Delaying the parsing (and sorting) step makes it
easier to access the first entry.
Commit: 0c04d43e8060f7b5bd4745c3400431abb3ad10b6
https://github.com/llvm/llvm-project/commit/0c04d43e8060f7b5bd4745c3400431abb3ad10b6
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[RISCV][NFC] refactor CFI emitting (#114227)
This patch refactor PR https://github.com/llvm/llvm-project/pull/110810
to remove code duplication.
Commit: 2b9edabe969e2f59f067ed7d49e2b0eca5411113
https://github.com/llvm/llvm-project/commit/2b9edabe969e2f59f067ed7d49e2b0eca5411113
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/docs/Dialects/Linalg/OpDSL.md
Log Message:
-----------
[docs] Add deprecation warning to OpDSL.md
As discussed in the forums, we're slowly moving ops away from OpDSL into TableGen. Adding a note to avoid people work on this area downstream.
Commit: 85a2d2df5777b7a0b468ec9c129f91fda1430240
https://github.com/llvm/llvm-project/commit/85a2d2df5777b7a0b468ec9c129f91fda1430240
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
Log Message:
-----------
[gn build] Port 4e7682b1c47d
Commit: 5a48162dc88e0c3db7bc0a63dee0eb3182ef00e3
https://github.com/llvm/llvm-project/commit/5a48162dc88e0c3db7bc0a63dee0eb3182ef00e3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
Log Message:
-----------
[libc++] Remove unnecessary std::vector accessors (#114423)
Now that we don't use __compressed_pair anymore inside std::vector, we
can remove some unnecessary accessors. This is a mechanical replacement
of the __alloc() and __end_cap() accessors, and similar for
std::vector<bool>.
Note that I consistently used this->__alloc_ instead of just __alloc_
since most of the code in <vector> uses that pattern to access members.
I don't think this is necessary anymore (and I'm even less certain I
like this), but I went for consistency with surrounding code. If we want
to change that, we can do a follow-up mechanical change.
Commit: 20d8f8ca1a9de3506c7cad55abcea501a0c57afa
https://github.com/llvm/llvm-project/commit/20d8f8ca1a9de3506c7cad55abcea501a0c57afa
Author: Bruno De Fraine <brunodf at synopsys.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/DebugInfo/X86/global-sra-struct-fit-segment.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/Transforms/GlobalOpt/globalsra-align.ll
A llvm/test/Transforms/GlobalOpt/pr115282.ll
Log Message:
-----------
[GlobalOpt] Fix global SRA incorrect alignment on some elements (#115328)
The logic had a flaw where the alignment from the original aggregate is
unintentionally retained for elements when the calculated known
alignment is not higher than the element's ABI type alignment.
Fixes #115282.
Commit: 20c653c3130899dc2d69003577a48c507891b89e
https://github.com/llvm/llvm-project/commit/20c653c3130899dc2d69003577a48c507891b89e
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
[bazel] port 63b926af5ff43a90dac285bbe0750e41e622eb3f
Commit: 9fc4654462c44569bab950c18d25ca7624f10691
https://github.com/llvm/llvm-project/commit/9fc4654462c44569bab950c18d25ca7624f10691
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Fix mislabeling in calling convention name (NFC)
We have explained how musttail can be guaranteed when the calling
convention is not `swifttailcc` or `tailcc`, ensure what needs to
adhere when it is the opposite case.
Commit: e370946978c3b50cc2716878122be332df554c6f
https://github.com/llvm/llvm-project/commit/e370946978c3b50cc2716878122be332df554c6f
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/member-pointers.cpp
Log Message:
-----------
[lldb] Infer MSInheritanceAttr for CXXRecordDecl with DWARF on Windows (#115177)
Following up from https://github.com/llvm/llvm-project/pull/112928, we
can reuse the approach from Clang Sema to infer the MSInheritanceModel
and add the necessary attribute manually. This allows the inspection of
member function pointers with DWARF on Windows.
Commit: 9d7026500df1023cee67c5bd10119e1ca9805241
https://github.com/llvm/llvm-project/commit/9d7026500df1023cee67c5bd10119e1ca9805241
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
Log Message:
-----------
[RISCV] Correct the precedence in isVRegClass (#116579)
Right shift has higher precedence than bitwise and, so it should be
parentheses around & operator. This case works as expected because
IsVRegClassShift is 0, other cases will fail.
Commit: 37feced61eb576aa93e2ea2dea700246b67e3a62
https://github.com/llvm/llvm-project/commit/37feced61eb576aa93e2ea2dea700246b67e3a62
Author: sondre-teigen <sondre.teigen at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][Tosa] Fix typo in avg_pool2d summary (#116538)
Commit: b64095c795ad0fd264bddd63b834bca431673f04
https://github.com/llvm/llvm-project/commit/b64095c795ad0fd264bddd63b834bca431673f04
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] port e370946978c3b50cc2716878122be332df554c6f
Commit: a6385a3fc8a88f092d07672210a1e773481c2919
https://github.com/llvm/llvm-project/commit/a6385a3fc8a88f092d07672210a1e773481c2919
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[mlir][OpenMP][NFC] use llvm::zip_equal for firstprivate copy region translation (#116416)
I think this is a bit easier to read.
Commit: 2f925d75dee8b4012d747d889ac4bb1d8a31d5a0
https://github.com/llvm/llvm-project/commit/2f925d75dee8b4012d747d889ac4bb1d8a31d5a0
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
Log Message:
-----------
[mlir][Vector] Move insert/extractelement distribution patterns to insert/extract (#116425)
This is a NFC-ish change that moves
vector.extractelement/vector.insertelement vector distribution patterns
to vector.insert/vector.extract.
Before:
0-d/1-d vector.extract -> vector.extractelement -> distributed
vector.extractelement
2-d+ vector.extract -> distributed vector.extract
After:
scalar input vector.extract -> distributed vector.extract
vector.extractelement -> distributed vector.extract
2d+ vector.extract -> distributed vector.extract
The same changes are done for insertelement/insert. The change allows us
to remove reliance on vector.extractelement/vector.insertelement, which
are soon to be depreciated:
https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops/71116/8
No extra tests are included because this patch doesn't introduce /
remove any functionality. It only changes the chain of lowerings. This
change can be completly NFC if we make the distributed operation
vector.extractelement/vector.insertelement, but that is slightly weird,
because you are going from extractelement -> extract -> extractelement.
Commit: ad3b291879b781b974b02091b9115f444fcbf59d
https://github.com/llvm/llvm-project/commit/ad3b291879b781b974b02091b9115f444fcbf59d
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
Log Message:
-----------
[MLIR][SPIRV] Add definition for `SPV_INTEL_split_barrier` ops (#115738)
The [`SPV_INTEL_split_barrier` extension](https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_split_barrier.html)
defines operations to split control barrier semantics in two operations.
Add support for these operations (arrive and wait) to the dialect.
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 030179c2cb113ab35e5cc71229816075e51dd8ab
https://github.com/llvm/llvm-project/commit/030179c2cb113ab35e5cc71229816075e51dd8ab
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
A flang/test/Transforms/debug-class-type.fir
Log Message:
-----------
[flang][debug] Support ClassType. (#114809)
This PR adds the handling of `ClassType`. It is treated as pointer to
the underlying type. Note that `ClassType` when passed to the function
have double indirection so it is represented as pointer to type
(compared to other types which may have a single indirection).
If `ClassType` wraps a pointer or allocatable then we take care to
generate it as PTR -> type (and not PTR -> PTR -> type).
This is how it looks like in the debugger.
```
subroutine test_proc (this)
class(test_type), intent (inout) :: this
allocate (this%b (3, 2))
call fill_array_2d (this%b)
print *, this%a
end
```
```
(gdb) p this
$6 = (PTR TO -> ( Type test_type )) 0x2052a0
(gdb) p this%a
$7 = 0
(gdb) p this%b
$8 = ((1, 2, 3) (4, 5, 6))
```
Commit: c25c6c32494c8d1038438b6208d42ba40f25270e
https://github.com/llvm/llvm-project/commit/c25c6c32494c8d1038438b6208d42ba40f25270e
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/unittests/Host/MainLoopTest.cpp
Log Message:
-----------
[lldb] Unify/improve MainLoop signal handling (#115197)
Change the signal handler to use a pipe to notify about incoming
signals. This has two benefits:
- the signal no longer has to happen on the MainLoop thread. With the
previous implementation, this had to be the case as that was the only
way to ensure that ppoll gets interrupted correctly. In a multithreaded
process, this would mean that all other threads have to have the signal
blocked at all times.
- we don't need the android-specific workaround, which was necessary due
to the syscall being implemented in a non-atomic way
When the MainLoop class was first implemented, we did not have the
interrupt self-pipe, so syscall interruption was the most
straight-forward implementation. Over time, the class gained new
abilities (the pipe being one of them), so we can now piggy-back on
those.
This patch also changes the kevent-based implementation to use the pipe
for signal notification as well. The motivation there is slightly
different:
- it makes the implementations more uniform
- it makes sure we handle all kinds of signals, like we do with the
linux version (EVFILT_SIGNAL only catches process-directed signals)
Commit: 1e4646d8191b13ac9c4d8c2cd3bb20a184f1966f
https://github.com/llvm/llvm-project/commit/1e4646d8191b13ac9c4d8c2cd3bb20a184f1966f
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in reduce add function. (#116243)
Part of #51787.
This patch adds constexpr support for the built-in reduce add function.
If this is the right way to go, I will add support for other reduce
functions in later patches.
---------
Co-authored-by: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Commit: 4c4a4134d5c0a0f9476b157862d378a7e571e9f0
https://github.com/llvm/llvm-project/commit/4c4a4134d5c0a0f9476b157862d378a7e571e9f0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Lower/OpenMP/Todo/defaultmap-clause.f90
M flang/test/Lower/OpenMP/Todo/task_detach.f90
M flang/test/Lower/OpenMP/Todo/task_untied.f90
A flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v50.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
Log Message:
-----------
[flang][OpenMP] Update frontend support for DEFAULTMAP clause (#116506)
Add ALL variable category, implement semantic checks to verify the
validity of the clause, improve error messages, add testcases.
The variable category modifier is optional since 5.0, make sure we allow
it to be missing. If it is missing, assume "all" in clause conversion.
Commit: 696c108703896e528c6b88824ba10402261f8635
https://github.com/llvm/llvm-project/commit/696c108703896e528c6b88824ba10402261f8635
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/test/MinGW/driver.test
Log Message:
-----------
[LLD][MinGW] Add support for --functionpadmin option (#116511)
This introduces the MinGW counterpart of `lld-link`'s `-functionpadmin`.
Commit: 40ea61b41d3b70ccf39d5ec11ac54100c9b0b388
https://github.com/llvm/llvm-project/commit/40ea61b41d3b70ccf39d5ec11ac54100c9b0b388
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw.cpp
Log Message:
-----------
[Clang][MinGW] Pass --functionpadmin to the linker when -fms-hotpatch is used (#116512)
Commit: 748a29f052749b9938480edbf29717bd6742fc66
https://github.com/llvm/llvm-project/commit/748a29f052749b9938480edbf29717bd6742fc66
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__memory/allocator_arg_t.h
Log Message:
-----------
[libc++][NFC] Fix incorrect include guard
Commit: 222f6aff3db1cfee0a1461482584dc374886da73
https://github.com/llvm/llvm-project/commit/222f6aff3db1cfee0a1461482584dc374886da73
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_util.h
Log Message:
-----------
[libc] Remove more libc dependencies from the RPC header (#116437)
Summary:
The end goal is to make `rpc.h` a standalone header so that other
projects can include it without leaking `libc` internals. I'm trying to
replace stuff slowly before pulling it out all at once to reduce the
size of the changes.
This patch removes the atomic and a few sparse dependencies. Now we
mostly rely on the GPU utils, the sleep function, optional, and the
type traits. I'll clean these up in future patches. This removed the old
stuff I had around the memcpy, but I think that it's not quite as bad as
it once was, as it removes a branch and only uses a few extra VGPRs
since I believe the builtin memcpy was improved for AMD.
Commit: 32506126fb9c7fa38f215ec2fafa3ad4f17469db
https://github.com/llvm/llvm-project/commit/32506126fb9c7fa38f215ec2fafa3ad4f17469db
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/test/tools/llvm-readobj/ELF/reloc-types-aarch64.test
Log Message:
-----------
[PAC][llvm-readobj][ELF][AArch64] Define static AUTH TLSDESC relocations (#113716)
See specification https://github.com/ARM-software/abi-aa/pull/295
Commit: 756fe54dc7f7e7fcdfefb11d8f51b1687322daf7
https://github.com/llvm/llvm-project/commit/756fe54dc7f7e7fcdfefb11d8f51b1687322daf7
Author: Steven Perron <stevenperron at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
Log Message:
-----------
[SPIRV] Add write to image buffer for shaders. (#115927)
This commit adds an intrinsic that will write to an image buffer. We
chose to match the name of the DXIL intrinsic for simplicity in clang.
We cannot reuse the existing openCL write_image function because that is
not a reserved name in HLSL. There is not much common code to factor
out.
Commit: a52cb0a2b9c44cdd3b36e414b8d2b809ec8b2ec8
https://github.com/llvm/llvm-project/commit/a52cb0a2b9c44cdd3b36e414b8d2b809ec8b2ec8
Author: Romain Thomas <7450402+romainthomas at users.noreply.github.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
Log Message:
-----------
[PDB] Fix missing `consumeError` which raise error with asserts enabled (#116480)
As mentioned in the title, the missing `consumeError` triggers assertions.
Commit: abda8ce2ee2ad35af7f069fab851adaa4646d0ef
https://github.com/llvm/llvm-project/commit/abda8ce2ee2ad35af7f069fab851adaa4646d0ef
Author: André Rösti <an.roesti at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
M llvm/lib/MCA/HardwareUnits/LSUnit.cpp
M llvm/lib/MCA/HardwareUnits/Scheduler.cpp
Log Message:
-----------
llvm-mca: Disentangle `MemoryGroup` from `LSUnitBase` (#114159)
In MCA, the load/store unit is modeled through a `LSUnitBase` class.
Judging from the name `LSUnitBase`, I believe there is an intent to
allow for different specialized load/store unit implementations.
(However, currently there is only one implementation used in-tree,
`LSUnit`.)
PR #101534 fixed one instance where the specialized `LSUnit` was
hard-coded, opening the door for other subclasses to be used, but what
subclasses can do is, in my opinion, still overly limited due to a
reliance on the `MemoryGroup` class, e.g.
[here](https://github.com/llvm/llvm-project/blob/8b55162e195783dd27e1c69fb4d97971ef76725b/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#L88).
The `MemoryGroup` class is currently used in the default `LSUnit`
implementation to model data dependencies/hazards in the pipeline.
`MemoryGroups` form a graph of memory dependencies that inform the
scheduler when load/store instructions can be executed relative to each
other.
In my eyes, this is an implementation detail. Other `LSUnit`s may want
to keep track of data dependencies in different ways. As a concrete
example, a downstream use I am working on<sup>[1]</sup> uses a custom
load/store unit that makes use of available aliasing information. I
haven't been able to shoehorn our additional aliasing information into
the existing `MemoryGroup` abstraction. I think there is no need to
force subclasses to use `MemoryGroup`s; users of `LSUnitBase` are only
concerned with when, and for how long, a load/store instruction
executes.
This PR makes changes to instead leave it up to the subclasses how to
model such dependencies, and only prescribes an abstract interface in
`LSUnitBase`. It also moves data members and methods that are not
necessary to provide an abstract interface from `LSUnitBase` to the
`LSUnit` subclass. I decided to make the `MemoryGroup` a protected
subclass of `LSUnit`; that way, specializations may inherit from
`LSUnit` and still make use of `MemoryGroup`s if they wish to do so
(e.g. if they want to only overwrite the `dispatch` method).
**Drawbacks / Considerations**
My reason for suggesting this PR is an out-of-tree use. As such, these
changes don't introduce any new functionality for in-tree LLVM uses.
However, in my opinion, these changes improve code clarity and prescribe
a clear interface, which would be the main benefit for the LLVM
community.
A drawback of the more abstract interface is that virtual dispatching is
used in more places. However, note that virtual dispatch is already
currently used in some critical parts of the `LSUnitBase`, e.g. the
`isAvailable` and `dispatch` methods. As a quick check to ensure these
changes don't significantly negatively impact performance, I also ran
`time llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2
-iterations=3000 llvm/test/tools/llvm-mca/X86/BtVer2/dot-product.s`
before and after the changes; there was no observable difference in
runtimes (`0.292 s` total before, `0.286 s` total after changes).
<sup>[1]: MCAD started by @mshockwave and @chinmaydd.</sup>
Commit: 6e1acdcdc1b33c8d3cccf09b8d38279eef2ba69e
https://github.com/llvm/llvm-project/commit/6e1acdcdc1b33c8d3cccf09b8d38279eef2ba69e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Host/posix/MainLoopPosix.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Host/posix/MainLoopPosix.cpp:64:11: error: unused
variable 'bytes_written' [-Werror,-Wunused-variable]
Commit: 834dfd23155351c9885eddf7b9664f7697326946
https://github.com/llvm/llvm-project/commit/834dfd23155351c9885eddf7b9664f7697326946
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
R clang/include/clang/Parse/ParseDiagnostic.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/module.modulemap
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
Log Message:
-----------
[Parse] Remove ParseDiagnostic.h (#116496)
This patch removes clang/Parse/ParseDiagnostic.h because it just
forwards to clang/Basic/DiagnosticParse.h.
Commit: ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52
https://github.com/llvm/llvm-project/commit/ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRFrameLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRSubtarget.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetObjectFile.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.cpp
M llvm/lib/Target/BPF/BPFIRPeephole.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFPreserveDIType.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/GISel/BPFCallLowering.cpp
M llvm/lib/Target/BPF/GISel/BPFInstructionSelector.cpp
M llvm/lib/Target/BPF/GISel/BPFLegalizerInfo.cpp
M llvm/lib/Target/BPF/GISel/BPFRegisterBankInfo.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSubtarget.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
M llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp
M llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
M llvm/lib/Target/SystemZ/SystemZTDC.cpp
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/LVLGen.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEFrameLowering.cpp
M llvm/lib/Target/VE/VEISelDAGToDAG.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VERegisterInfo.cpp
M llvm/lib/Target/VE/VESubtarget.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
Log Message:
-----------
[Target] Remove unused includes (NFC) (#116577)
Identified with misc-include-cleaner.
Commit: 8f8016fe66dd260b03a4d1c2b50636e36e02942b
https://github.com/llvm/llvm-project/commit/8f8016fe66dd260b03a4d1c2b50636e36e02942b
Author: Hugh Delaney <hugh.delaney at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
A llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
A llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
Log Message:
-----------
[NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (#114977)
Add patterns to lower `fmaxnum(fma(a, b, c), 0)` to `fma.rn{.ftz}.relu`
for `f16`, `f16x2`, `bf16`, `bf16x2` types, when `nnan` is used.
`fma_relu` honours `NaN`, so the substitution is only made if the `fma`
is `nnan`, since `fmaxnum` returns the non NaN argument when passed a
NaN value.
This patch also removes some `bf16` ftz instructions since `FTZ` is not
supported with the `bf16` type, according to the PTX ISA docs.
Commit: c25e09e238c6f872a116d10bbefba0beff145a57
https://github.com/llvm/llvm-project/commit/c25e09e238c6f872a116d10bbefba0beff145a57
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/GenerateInput.h
Log Message:
-----------
[libc++][test] Speed up input generating functions for benchmark tests (#115544)
The input generating functions for benchmark tests in the GenerateInput.h
file can be slightly improved by invoking vector::reserve before calling
vector::push_back. This slight performance improvement could potentially
speed-up all benchmark tests for containers and algorithms that use these
functions as inputs.
Commit: 52361d0368b79841be12156bf03cf8c1851e5df7
https://github.com/llvm/llvm-project/commit/52361d0368b79841be12156bf03cf8c1851e5df7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
Log Message:
-----------
[ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627)
This patch bails out non-dedicated exits to avoid adding exiting
conditions to invalid context.
Closes https://github.com/llvm/llvm-project/issues/116553.
Commit: dcd62070cf45f793f321fecdb4139a79628c4132
https://github.com/llvm/llvm-project/commit/dcd62070cf45f793f321fecdb4139a79628c4132
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
A flang/test/Lower/OpenMP/Todo/depend-clause-depobj.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
Log Message:
-----------
[Flang][OpenMP] Error gracefully for dependence-type with depobj (#116621)
It also modifies the error message to specify it is the dependence-type
that is not supported.
Resolves the crash in
https://github.com/llvm/llvm-project/issues/115647. A fix can come in
later as part of future OpenMP version support.
Commit: ceeb08b9e0a51a4d2e0804baeb579fe8a6485885
https://github.com/llvm/llvm-project/commit/ceeb08b9e0a51a4d2e0804baeb579fe8a6485885
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/Makefile
R lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
Revert "[lldb-dap] Support column breakpoints (#113787)"
This reverts commit 4f48a81a620bc9280be4780f3554cdc9bda55bd3.
The newly added test was failing on the public macOS Arm64 bots:
```
======================================================================
FAIL: test_column_breakpoints (TestDAP_breakpointLocations.TestDAP_setBreakpoints)
Test retrieving the available breakpoint locations.
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py", line 77, in test_column_breakpoints
self.assertEqual(
AssertionError: Lists differ: [{'co[70 chars]e': 41}, {'column': 3, 'line': 42}, {'column': 18, 'line': 42}] != [{'co[70 chars]e': 42}, {'column': 18, 'line': 42}]
First differing element 2:
{'column': 3, 'line': 41}
{'column': 3, 'line': 42}
First list contains 1 additional elements.
First extra element 4:
{'column': 18, 'line': 42}
[{'column': 39, 'line': 40},
{'column': 51, 'line': 40},
- {'column': 3, 'line': 41},
{'column': 3, 'line': 42},
{'column': 18, 'line': 42}]
Config=arm64-/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang
----------------------------------------------------------------------
Ran 1 test in 1.554s
FAILED (failures=1)
```
Commit: 68a3908148c6b6424b1ad4d0ed19d56435252832
https://github.com/llvm/llvm-project/commit/68a3908148c6b6424b1ad4d0ed19d56435252832
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
Log Message:
-----------
emitc: func: Set default dialect to 'emitc' (#116297)
Makes `emitc.func` implement the `OpAsmOpInterface` and overwrite the
`getDefaultDialect`. This allows ops inside `emitc.func`'s body to omit
the 'emitc.' prefix in the assembly.
Commit: b7d635ed30da49cc32b5b46d00e67ecc3ff9522f
https://github.com/llvm/llvm-project/commit/b7d635ed30da49cc32b5b46d00e67ecc3ff9522f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
AMDGPU: Copy correct predicates for SDWA reals (#116288)
There are a lot of messes in the special case
predicate handling. Currently broad let blocks
override specific predicates with more general
cases. For instructions with SDWA, the HasSDWA
predicate was overriding the SubtargetPredicate
for the instruction.
This fixes enough to properly disallow new instructions
that support SDWA on older targets.
Commit: 6bf8f08989420ccd10efed5fac88052ca16e1250
https://github.com/llvm/llvm-project/commit/6bf8f08989420ccd10efed5fac88052ca16e1250
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfWriter.h
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Add InstrProfWriter::addMemProfData (#116528)
This patch adds InstrProfWriter::addMemProfData, which adds the
complete MemProf profile (frames, call stacks, and records) to the
writer context.
Without this function, functions like loadInput in llvm-profdata.cpp
and InstrProfWriter::mergeRecordsFromWriter must add one item (frame,
call stack, or record) at a time. The new function std::moves the
entire MemProf profile to the writer context if the destination is
empty, which is the common use case. Otherwise, we fall back to
adding one item at a time behind the scene.
Here are a couple of reasons why we should add this function:
- We've had a bug where we forgot to add one of the three data
structures (frames, call stacks, and records) to the writer context,
resulting in a nearly empty indexed profile. We should always
package the three data structures together, especially on API
boundaries.
- We expose a little too much of the MemProf detail to
InstrProfWriter. I'd like to gradually transform
InstrProfReader/Writer to entities managing buffers (sequences of
bytes), with actual serialization/deserialization left to external
classes. We already do some of this in InstrProfReader, where
InstrProfReader "contracts out" to IndexedMemProfReader to handle
MemProf details.
I am not changing loadInput or InstrProfWriter::mergeRecordsFromWriter
for now because MemProfReader uses DenseMap for frames and call
stacks, whereas MemProfData uses MapVector. I'll resolve these
mismatches in subsequent patches.
Commit: 4092c0deef466e5b96a221e4066a78ae72efa7af
https://github.com/llvm/llvm-project/commit/4092c0deef466e5b96a221e4066a78ae72efa7af
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF,ARM] Move global sectionMap into the ARM class
Otherwise, LLD_IN_TEST=2 testing arm-plt-reloc.s crashes.
Follow-up to https://reviews.llvm.org/D150870
Commit: 2444b6f0df56d2aeb0ae6dce946443b23a3a9d3b
https://github.com/llvm/llvm-project/commit/2444b6f0df56d2aeb0ae6dce946443b23a3a9d3b
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
Log Message:
-----------
[llvm-objcopy] Replace custom -- parsing with DashDashParsing
The custom -- parsing from https://reviews.llvm.org/D102665 can be
replaced with the generic feature from https://reviews.llvm.org/D152286
Pull Request: https://github.com/llvm/llvm-project/pull/116565
Commit: c9260e21d092c3acbb77bb9f6fcd0820f6a138c1
https://github.com/llvm/llvm-project/commit/c9260e21d092c3acbb77bb9f6fcd0820f6a138c1
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeLayout] Do not rebuild chains with -apply-ext-tsp-for-size (#115934)
https://github.com/llvm/llvm-project/pull/109711 disables
`buildCFGChains()` when `-apply-ext-tsp-for-size` is used to improve
codesize. Tail merging can change the layout and normally requires
`buildCFGChains()` to be called again, but we want to prevent this when
optimizing for codesize. We saw slight size improvement on large
binaries with this change. If `-apply-ext-tsp-for-size` is not used,
this should be a NFC.
Commit: 1c4caece05f1885ba6ed80755d6b5de1b9f99579
https://github.com/llvm/llvm-project/commit/1c4caece05f1885ba6ed80755d6b5de1b9f99579
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
Log Message:
-----------
[Mips] Use APInt::isMask/isShiftedMask to simplify code. (#116582)
Commit: de2e270ee6fb29cfb7730dcf6aaa2552cd4a5efd
https://github.com/llvm/llvm-project/commit/de2e270ee6fb29cfb7730dcf6aaa2552cd4a5efd
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize box when src or dst are rebox (#116494)
Commit: 9161e6ab745adeef67a129b4e1b6724f026125f0
https://github.com/llvm/llvm-project/commit/9161e6ab745adeef67a129b4e1b6724f026125f0
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Add debug checker to compare IR before/after a revert (#115968)
This will help us catch mistakes in change tracking. It's only enabled
when EXPENSIVE_CHECKS are enabled.
Commit: 4615cc38f35d111f09073f51cc734e29c9211067
https://github.com/llvm/llvm-project/commit/4615cc38f35d111f09073f51cc734e29c9211067
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
A llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
A llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
Log Message:
-----------
[RISCV] Inline Assembly Support for GPR Pairs ('R') (#112983)
This patch adds support for getting even-odd general purpose register
pairs into and out of inline assembly using the `R` constraint as
proposed in riscv-non-isa/riscv-c-api-doc#92
There are a few different pieces to this patch, each of which need their
own explanation.
- Renames the Register Class used for f64 values on rv32i_zdinx from
`GPRPair*` to `GPRF64Pair*`. These register classes are kept broadly
unmodified, as their primary value type is used for type inference
over selection patterns. This rename affects quite a lot of files.
- Adds new `GPRPair*` register classes which will be used for `R`
constraints and for instructions that need an even-odd GPR pair. This
new type is used for `amocas.d.*`(rv32) and `amocas.q.*`(rv64) in
Zacas, instead of the `GPRF64Pair` class being used before.
- Marks the new `GPRPair` class legal as for holding a `MVT::Untyped`.
Two new RISCVISD node types are added for creating and destructing a
pair - `BuildGPRPair` and `SplitGPRPair`, and are introduced when
bitcasting to/from the pair type and `untyped`.
- Adds functionality to `splitValueIntoRegisterParts` and
`joinRegisterPartsIntoValue` to handle changing `i<2*xlen>` MVTs into
`untyped` pairs.
- Adds an override for `getNumRegisters` to ensure that `i<2*xlen>`
values, when going to/from inline assembly, only allocate one (pair)
register (they would otherwise allocate two). This is due to a bug in
SelectionDAGBuilder.cpp which other backends also work around.
- Ensures that Clang understands that `R` is a valid inline assembly
constraint.
- This also allows `R` to be used for `f64` types on `rv32_zdinx`
architectures, where doubles are stored in a GPR pair.
Commit: 0ae58c45330d7b66eabf3db2684aa53144c06063
https://github.com/llvm/llvm-project/commit/0ae58c45330d7b66eabf3db2684aa53144c06063
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
Revert "[SandboxIR] Add debug checker to compare IR before/after a revert" (#116666)
Reverts llvm/llvm-project#115968. It caused buildbot failures.
Commit: 900c0565314618ec142b020cea1f9c86e2f8282b
https://github.com/llvm/llvm-project/commit/900c0565314618ec142b020cea1f9c86e2f8282b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV] Add an implementation of findRepresentativeClass to assign i32 to GPRRegClass for RV64. (#116165)
This is an alternative fix for #81192. This allows the SelectionDAG
scheduler to be able to find a representative register class for i32 on
RV64. The representative register class is the super register class with
the largest spill size that is also legal. The default implementation of
findRepresentativeClass only works for legal types which i32 is not for
RV64.
I did some investigation of why tablegen uses i32 in output patterns on
RV64. It appears it comes down to a function called
ForceArbitraryInstResultType that picks a type for the output
pattern when the isel pattern isn't specific enough. I believe it picks
the smallest type(lowested numbered) to resolve the conflict.
A similar issue occurs for f16 and bf16 which both use the FPR16
register class. If the isel pattern doesn't specify, tablegen may find
both f16 and bf16 and may pick bf16 from Zfh pattern when Zfbfmin isn't
present. Since bf16 isn't legal in that case, findRepresentativeClass
will fail.
For i8, i16, i32, this patch calls the base class with XLenVT to get the
representative class since XLenVT is always legal.
For bf16/f16, we call the base class with f32 since all of the f16/bf16
extensions depend on either F or Zfinx which will make f32 a legal type.
The final representative register class further depends on whether D or
Zdinx is also enabled, but that should be handled by the default
implementation.
Commit: 589ab28d87616006d7f8cf2402379811e2a6183f
https://github.com/llvm/llvm-project/commit/589ab28d87616006d7f8cf2402379811e2a6183f
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBBreakpointName.h
Log Message:
-----------
[lldb][sbapi][NFC] Remove commented out typedef from SBBreakpointName (#116434)
SBBreakpointName has a typedef for BreakpointHitCallback used in
SetCallback(), but this typedef has been commented out in
SBBreakpointName and added instead to SBDefines. Since SB API callbacks
are placed in SBDefines, this commit removes this commented out portion.
Commit: a7b2e73bcaa91255a20f1f2e692bec9eb6c17022
https://github.com/llvm/llvm-project/commit/a7b2e73bcaa91255a20f1f2e692bec9eb6c17022
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Add support for reading the dynamic symbol table from PT_DYNAMIC (#112596)
Allow LLDB to parse the dynamic symbol table from an ELF file or memory
image in an ELF file that has no section headers. This patch uses the
ability to parse the PT_DYNAMIC segment and find the DT_SYMTAB,
DT_SYMENT, DT_HASH or DT_GNU_HASH to find and parse the dynamic symbol
table if the section headers are not present. It also adds a helper
function to read data from a .dynamic key/value pair entry correctly
from the file or from memory.
Commit: ab4253f6dff194a1e09448c8628809d21f148df9
https://github.com/llvm/llvm-project/commit/ab4253f6dff194a1e09448c8628809d21f148df9
Author: Michele Scandale <michele.scandale at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/PassManager.h
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
M llvm/unittests/Analysis/PluginInlineOrderAnalysisTest.cpp
Log Message:
-----------
[Analysis] Remove global state from `PluginInline{Advisor,Order}Analysis`. (#114615)
The plugin analysis for `InlineAdvisor` and `InlineOrder` currently
relies on shared global state to keep track if the analysis is
available.
This causes issues when pipelines using plugins and pipelines not using
plugins are run in the same process.
The shared global state can be easily replaced by checking in the given
instance of `ModuleAnalysisManager` if the plugin analysis has been
registered.
Commit: ed8ebad6eb84af60d1c1a8826f55d4d347d2e7bd
https://github.com/llvm/llvm-project/commit/ed8ebad6eb84af60d1c1a8826f55d4d347d2e7bd
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
Log Message:
-----------
[SelectionDAG] Support integer promotion for VP_LOAD and VP_STORE (#81299)
Add integer promotion support for for VP_LOAD and VP_STORE via legalization of extend
and truncate of each form.
Patch commandeered from: https://reviews.llvm.org/D109377
Commit: 18be88e20abd9046217d79954c0477ee01ddd2f3
https://github.com/llvm/llvm-project/commit/18be88e20abd9046217d79954c0477ee01ddd2f3
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x2-instructions.ll
Log Message:
-----------
[NVPTX][NFC] Regenerate some tests checks (#116605)
Use update_llc_test_checks.py to automate the test checks in some files
I was observing changes in locally.
Commit: a6fc489bb7a2e9fb3a7f70cccc181e4ee70374bf
https://github.com/llvm/llvm-project/commit/a6fc489bb7a2e9fb3a7f70cccc181e4ee70374bf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/MC/AMDGPU/flat-scratch-gfx940.s
M llvm/test/MC/AMDGPU/gfx940_asm_features.s
A llvm/test/MC/AMDGPU/gfx950-unsupported.s
A llvm/test/MC/AMDGPU/gfx950_invalid_encoding.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
M offload/DeviceRTL/CMakeLists.txt
Log Message:
-----------
AMDGPU: Add gfx950 subtarget definitions (#116307)
Mostly a stub, but adds some baseline tests and
tests for removed instructions.
Commit: cab732861c4885b714c70f2945de9f1dd4d725fa
https://github.com/llvm/llvm-project/commit/cab732861c4885b714c70f2945de9f1dd4d725fa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
Log Message:
-----------
AMDGPU: Add subtarget features for minimum3/maximum3 instructions (#116308)
gfx12 and gfx950 managed to produce 3 different permutations of this feature.
gfx12 supports f32 and f16, and gfx950 supports f32 and v2f16.
Commit: 5a556d55fb753d7e6e7a310a3fc0f7e83f8f9144
https://github.com/llvm/llvm-project/commit/5a556d55fb753d7e6e7a310a3fc0f7e83f8f9144
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
A llvm/test/CodeGen/AMDGPU/lds-limit-diagnostics.ll
A llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
A llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx950.ll
A llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx950.s
Log Message:
-----------
AMDGPU: Increase the LDS size to support to 160 KB for gfx950 (#116309)
Commit: ca1b35a6c80d7075f4058c642d8c015e4fc8d304
https://github.com/llvm/llvm-project/commit/ca1b35a6c80d7075f4058c642d8c015e4fc8d304
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.prng.ll
A llvm/test/MC/AMDGPU/gfx950_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx950_asm_vop1_dpp16.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop1.txt
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Add v_prng_b32 instruction for gfx950 (#116310)
Rand num instruction for stochastic rounding.
Commit: de5e4ebb5a1b82df5b1d27f423dbad30f872aac6
https://github.com/llvm/llvm-project/commit/de5e4ebb5a1b82df5b1d27f423dbad30f872aac6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/bit
M libcxx/include/charconv
M libcxx/include/compare
M libcxx/include/expected
M libcxx/include/mdspan
M libcxx/include/memory_resource
M libcxx/include/ranges
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
Log Message:
-----------
[libc++] Remove transitive includes from empty headers (#116295)
This removes transitive includes that are only in a header that is empty
in a given C++ version.
Commit: 486e1d91e30068381f7ef4157361fe35c15abdee
https://github.com/llvm/llvm-project/commit/486e1d91e30068381f7ef4157361fe35c15abdee
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[RISCV][docs] Release Notes
These cover recent additions and changes to assembly and inline assembly
support.
Commit: 85ef9666c892d5e11fce3a0b84e4eaf4603256ee
https://github.com/llvm/llvm-project/commit/85ef9666c892d5e11fce3a0b84e4eaf4603256ee
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/future
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/thread/futures/futures.async/async.pass.cpp
Log Message:
-----------
[libc++] Avoid including all of <thread> in <future> (#116541)
Commit: 3b8606be547acbc7ae93d943645e6d6c83f66983
https://github.com/llvm/llvm-project/commit/3b8606be547acbc7ae93d943645e6d6c83f66983
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
Re-land "[SandboxIR] Add debug checker to compare IR before/after a revert (#115968)" (#116671)
This PR re-lands https://github.com/llvm/llvm-project/pull/115968 with a
fix for a buildbot failure.
The `IRSnapshotChecker` class is only defined in debug mode, so its unit
tests must also be inside `#ifndef NDEBUG`.
Commit: f14e1a8597f83fa5bbc78befcb7059144d58ff5c
https://github.com/llvm/llvm-project/commit/f14e1a8597f83fa5bbc78befcb7059144d58ff5c
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
R lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Revert "Add support for reading the dynamic symbol table from PT_DYNAMIC (#112596)"
This reverts commit a7b2e73bcaa91255a20f1f2e692bec9eb6c17022.
This patch broke the greendragon bot
Failed Tests (10):
lldb-api :: python_api/sbplatform/TestLocateModuleCallback.py
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithModuleAndSymbol
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithOnlySymbol
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithSymbolAsModule
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithSymbolAsModuleAndSymbol
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleCallbackSuccessWithSymbolByPlatformUUID
lldb-unit :: Target/./TargetTests/LocateModuleCallbackTest/GetOrCreateModuleWithCachedModuleAndSymbol
lldb-unit :: Target/./TargetTests/ModuleCacheTest/GetAndPut
lldb-unit :: Target/./TargetTests/ModuleCacheTest/GetAndPutStrangeHostname
lldb-unit :: Target/./TargetTests/ModuleCacheTest/GetAndPutUuidExists
Commit: b769e3544a763a90abefd0dbe9254d83c765e1dc
https://github.com/llvm/llvm-project/commit/b769e3544a763a90abefd0dbe9254d83c765e1dc
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
Log Message:
-----------
[clang][serialization] Blobify IMPORTS strings and signatures (#116095)
This PR changes a part of the PCM format to store string-like things in
the blob attached to a record instead of VBR6-encoding them into the
record itself. Applied to the `IMPORTS` section (which is very hot),
this speeds up dependency scanning by 2.8%.
Commit: 7b525495e8574285c19188be11e7ef8a51382ff3
https://github.com/llvm/llvm-project/commit/7b525495e8574285c19188be11e7ef8a51382ff3
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
Log Message:
-----------
[test][PGO] Use -fprofile-update=atomic instead of mllvm option in ContinuousSyncMode/online-merging.c
Commit: 842fd1537521d38913aec5c9a081afedf97d88fe
https://github.com/llvm/llvm-project/commit/842fd1537521d38913aec5c9a081afedf97d88fe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
M llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
Log Message:
-----------
[llvm-exegesis] Add explicit support for setting DF in X86 (#115644)
While llvm-exegesis has explicit support for setting EFLAGS which
contains DF, it can be nice sometimes to explicitly set DF, especially
given that it is modeled as a separate register within LLVM. This patch
adds the ability to do that by lowering setting the value to 0 or 1 to
cld and std respectively.
Commit: 3d172f3dff25ce70f7158330ac4068e48e2b364d
https://github.com/llvm/llvm-project/commit/3d172f3dff25ce70f7158330ac4068e48e2b364d
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
Log Message:
-----------
[Linker] Remove dead code handling recursive types. NFC. (#116652)
Commit: eac02611048a81bd78e461b651158c3c6557cb74
https://github.com/llvm/llvm-project/commit/eac02611048a81bd78e461b651158c3c6557cb74
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
Log Message:
-----------
[Linker] Remove a use of StructType::setBody. NFC. (#116653)
This falls out naturally after inlining finishType into its only
remaining use.
Commit: 1d0b2851224b1ef97c49faac2c666535f1997363
https://github.com/llvm/llvm-project/commit/1d0b2851224b1ef97c49faac2c666535f1997363
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/test/Shell/Unwind/windows-unaligned-x86_64.test
Log Message:
-----------
[lldb] Relax check for breakpoint site in Unwind/windows-unaligned-x86_64.test (#115318)
This test checks the thread backtrace for entries of intermediate frames
that aren't aligned to 16 bytes. In order to do that, it sets a single
breakpoint and makes sure we stop there. It seems sufficient, however,
to check that we hit the breakpoint itself and not which particular
site.
Commit: ac17b50f50bad5c1cc306e1813322ed2ae6e1ef0
https://github.com/llvm/llvm-project/commit/ac17b50f50bad5c1cc306e1813322ed2ae6e1ef0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV] Use getSignedTargetConstant. NFC
Commit: 6a863f7e2679a60f2f38ae6a920d0b6e1a2c1690
https://github.com/llvm/llvm-project/commit/6a863f7e2679a60f2f38ae6a920d0b6e1a2c1690
Author: lntue <lntue at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/tanhf16.cpp
Log Message:
-----------
[libc] Fix signed zeros for exp10m1f16 and tanhf16. (#116654)
Commit: e59582b6f8f1be3e675866f6a5d661eb4c8ed448
https://github.com/llvm/llvm-project/commit/e59582b6f8f1be3e675866f6a5d661eb4c8ed448
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libc/fuzzing/__support/hashtable_fuzz.cpp
M libc/src/__support/HashTable/generic/bitmask_impl.inc
M libc/src/__support/hash.h
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/HashTable/table_test.cpp
Log Message:
-----------
[libc] avoid type-punning with inactive union member (#116685)
Commit: ce0cc8e9eb1ee5613a6fb442179a92c3fabf27c5
https://github.com/llvm/llvm-project/commit/ce0cc8e9eb1ee5613a6fb442179a92c3fabf27c5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/VE/VEInstrInfo.td
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[AArch64][VE][X86] Use getSignedTargetConstant. NFC
Commit: cde4ae789e4a2f408d06d2b0045cca22c201c47b
https://github.com/llvm/llvm-project/commit/cde4ae789e4a2f408d06d2b0045cca22c201c47b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
Log Message:
-----------
[ARM] Use getSignedTargetConstant. NFC
Commit: b42a81631491571c4b78d095917ebdddee69b04f
https://github.com/llvm/llvm-project/commit/b42a81631491571c4b78d095917ebdddee69b04f
Author: jimingham <jingham at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanStack.h
M lldb/source/Target/ThreadPlanStack.cpp
Log Message:
-----------
Convert ThreadPlanStack's mutex to a shared mutex. (#116438)
I have some reports of A/B inversion deadlocks between the
ThreadPlanStack and the StackFrameList accesses. There's a fair bit of
reasonable code in lldb that does "While accessing the ThreadPlanStack,
look at that threads's StackFrameList", and also plenty of "While
accessing the ThreadPlanStack, look at the StackFrameList."
In all the cases I've seen so far, there was at most one of the locks
taken that were trying to mutate the list, the other three were just
reading. So we could solve the deadlock by converting the two mutexes
over to shared mutexes.
This patch is the easy part, the ThreadPlanStack mutex.
The tricky part was because these were originally recursive mutexes, and
recursive access to shared mutexes is undefined behavior according to
the C++ standard, I had to add a couple NoLock variants to make sure it
didn't get used recursively. Then since the only remaining calls are out
to ThreadPlans and ThreadPlans don't have access to their containing
ThreadPlanStack, converting this to a non-recursive lock should be safe.
Commit: e44c28f07ede2bd693e2372317880f57a635fa73
https://github.com/llvm/llvm-project/commit/e44c28f07ede2bd693e2372317880f57a635fa73
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticRefactoringKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-inline.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-weak.c
M clang/test/CodeGen/PowerPC/musttail-indirect.cpp
M clang/test/CodeGen/PowerPC/musttail-inline.c
M clang/test/CodeGen/PowerPC/musttail-undefined.c
M clang/test/CodeGen/PowerPC/musttail-weak.c
M clang/test/CodeGen/PowerPC/musttail.c
M clang/test/CodeGen/X86/x86_64-PR42672.c
M clang/test/Driver/module-output.cppm
M clang/test/Misc/pragma-attribute-strict-subjects.c
M clang/test/Modules/no-eager-load.cppm
M clang/test/Modules/same-decl-in-different-modules.cppm
M clang/test/OpenMP/for_simd_loop_messages.cpp
M clang/test/OpenMP/masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/parallel_for_simd_messages.cpp
M clang/test/OpenMP/parallel_masked_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_linear_messages.cpp
M clang/test/OpenMP/simd_linear_messages.cpp
M clang/test/OpenMP/target_parallel_for_simd_ordered_messages.cpp
M clang/test/OpenMP/taskloop_simd_linear_messages.cpp
M clang/test/Parser/pragma-attribute.cpp
M clang/test/Refactor/Extract/ObjCProperty.m
M clang/test/Sema/asm.c
M clang/test/Sema/pragma-attribute-strict-subjects.c
M clang/test/SemaObjC/comptypes-legal.m
M clang/test/SemaOpenCL/access-qualifier.cl
Log Message:
-----------
[clang] Replace "can't" and "can not" in diagnostics with "cannot" (#116623)
See
https://discourse.llvm.org/t/cant-cannot-can-not-in-diagnostic-messages/83171
Commit: 6dceb0e34ed3dd4be72d211abb8c9c447bd57735
https://github.com/llvm/llvm-project/commit/6dceb0e34ed3dd4be72d211abb8c9c447bd57735
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop1.txt
Log Message:
-----------
AMDGPU: Add V_CVT_F32_BF16 for gfx950 (#116311)
Commit: 0c421687f897b530a0fd3481fa03a2d29fd0b97c
https://github.com/llvm/llvm-project/commit/0c421687f897b530a0fd3481fa03a2d29fd0b97c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
A llvm/test/MC/AMDGPU/mai-gfx950.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
A llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add first gfx950 mfma instructions (#116312)
Scheduling info and hazards are wrong and TBD.
Commit: f8d1905a24c16bf6db42d428672401156ef6a473
https://github.com/llvm/llvm-project/commit/f8d1905a24c16bf6db42d428672401156ef6a473
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
Log Message:
-----------
[GlobalISel] Combine [S,U]SUBO (#116489)
We import the llvm.ssub.with.overflow.* Intrinsics, but the Legalizer
also builds them while legalizing other opcodes, see narrowScalarAddSub.
Commit: 31aa7f34e07c901773993dac0f33568307f96da6
https://github.com/llvm/llvm-project/commit/31aa7f34e07c901773993dac0f33568307f96da6
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Affine/Utils.h
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/invalid.mlir
M mlir/test/python/dialects/affine.py
Log Message:
-----------
[mlir][Affine] Let affine.[de]linearize_index omit outer bounds (#116103)
The affine.delinearize_index and affine.linearize_index operations, as
currently defined, require providing a length N basis to [de]linearize N
values. The first value in this basis is never used during lowering and
is unused during lowering. (Note that, even though it isn't used during
lowering it can still be used to, for example, remove length-1 outputs
from a delinearize).
This dead value makes sense in the original context of these operations,
which is linearizing or de-linearizing indexes to memref<>s, vector<>s,
and other shaped types, where that outer bound is avaliable and may be
useful for analysis.
However, other usecases exist where the outer bound is not known. For
example:
%thread_id_x = gpu.thread_id x : index
%0:3 = affine.delinearize_index %thread_id_x into (4, 16) : index,index,
index
In this code, we don't know the upper bound of the thread ID, but we do
want to construct the ?x4x16 grid of delinearized values in order to
further partition the GPU threads.
In order to support such usecases, we broaden the definition of
affine.delinearize_index and affine.linearize_index to make the outer
bound optional.
In the case of affine.delinearize_index, where the number of results is
a function of the size of the passed-in basis, we augment all existing
builders with a `hasOuterBound` argument, which, for backwards
compatibilty and to preserve the natural usage of the op, defaults to
`true`. If this flag is true, the op returns one result per basis
element, if it is false, it returns one extra result in position 0.
We also update existing canonicalization patterns (and move one of them
into the folder) to handle these cases. Note that disagreements about
the outer bound now no longer prevent delinearize/linearize
cancelations.
Commit: 55876278d362020503db5f0e66313829c40ff640
https://github.com/llvm/llvm-project/commit/55876278d362020503db5f0e66313829c40ff640
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/f16-abs.ll
Log Message:
-----------
[NVPTX] Add support for f16 fabs (#116107)
Add support for f16 and f16x2 support for abs. See PTX ISA 9.7.4.6. Half
Precision Floating Point Instructions: abs
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#half-precision-floating-point-instructions-abs
Commit: e0b522dd94e48229d587a54a3103ba1c198b16a7
https://github.com/llvm/llvm-project/commit/e0b522dd94e48229d587a54a3103ba1c198b16a7
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/test/CodeGen/DirectX/flatten-array.ll
Log Message:
-----------
[DirectX] Fix crash in DXILFlattenArrays for function declarations (#116690)
We were skipping intrinsics here, but really we need to skip all
function declarations - if the function doesn't have a body there's
nothing to walk.
Commit: a4e1a3dc8bc9bb971d8a38130254b4570f8b7a03
https://github.com/llvm/llvm-project/commit/a4e1a3dc8bc9bb971d8a38130254b4570f8b7a03
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Add another constructor to IndexedAllocationInfo (NFC) (#116684)
This patch adds another constructor to IndexedAllocationInfo that is
identical to the existing constructor except that the new one leaves
the CallStack field empty.
I'm planning to remove MemProf format Version 1. Then we will migrate
the users of the existing constructor to the new one as nobody will be
using the CallStack field anymore.
Adding the new constructor now allows us to migrate a few existing
users of the old constructor even before we remove the CallStack
field. In turn, that simplifies the patch to actually remove the
field.
Commit: ad9c0b369e86e75d56e229f294782a4eaf527226
https://github.com/llvm/llvm-project/commit/ad9c0b369e86e75d56e229f294782a4eaf527226
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
Log Message:
-----------
[SLP]Check if the gathered loads form full vector before attempting build it
Need to check that the number of gathered loads in the slice forms the
build vector to avoid compiler crash.
Fixes #116691
Commit: b083340cb663b6bd785dbd5864e5afd950745e35
https://github.com/llvm/llvm-project/commit/b083340cb663b6bd785dbd5864e5afd950745e35
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
A llvm/test/CodeGen/NVPTX/misched_func_call.ll
Log Message:
-----------
[llvm][NVPTX] Don't reorder MIs that construct a PTX function call (#116522)
With "-enable-misched", MachineScheduler can reorder MIs that must stick
together (in initially set order) to generate legal PTX code for a
function call.
When generating PTX code for the attached test (using LLVM before this
revision), the following invalid PTX code is generated:
```
{ // callseq 0, 0
.param .b64 param0;
st.param.f64 [param0], 0d0000000000000000;
.param .b64 retval0;
call.uni (retval0),
mul.lo.s32 %r7, %r10, %r3;
or.b32 %r8, %r4, %r7;
mul.lo.s32 %r9, %r2, %r8;
cvt.rn.f64.s32 %fd3, %r9;
quux,
(
param0
);
ld.param.f64 %fd1, [retval0];
} // callseq 0
```
Commit: ec67ad594b82fc2e763237d4e8d6bb2aea59110b
https://github.com/llvm/llvm-project/commit/ec67ad594b82fc2e763237d4e8d6bb2aea59110b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++][NFC] Format <string>
Commit: 50209e994200c98236a27b54e87e8c598d160402
https://github.com/llvm/llvm-project/commit/50209e994200c98236a27b54e87e8c598d160402
Author: David Green <david.green at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
R llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
A llvm/test/CodeGen/AArch64/freeze.ll
Log Message:
-----------
[AArch64][GlobalISel] Move and update freeze.ll test. NFC
This adds a number of extra vector cases, notably the ptr vectors.
Commit: 36d47f88786d29d381545a5f88a7964b47d9a595
https://github.com/llvm/llvm-project/commit/36d47f88786d29d381545a5f88a7964b47d9a595
Author: David Green <david.green at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/freeze.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalize ptr vector freeze and implicit defs.
They can be treated the same as other s64 operations.
Commit: 1ced56540071476d0a4aa8cb5134106d02b5b7f1
https://github.com/llvm/llvm-project/commit/1ced56540071476d0a4aa8cb5134106d02b5b7f1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/scoped-fence-ops.c
Log Message:
-----------
[Clang] Add support for scoped atomic thread fence (#115545)
Summary:
Previously we added support for all of the atomic GNU extensions with
optional memory scoped except for `__atomic_thread_fence`. This patch
adds support for that. This should ideally allow us to generically emit
these LLVM scopes.
Commit: 94d100f2ba81c2bf0ef495f68d66ba8c94c71d2a
https://github.com/llvm/llvm-project/commit/94d100f2ba81c2bf0ef495f68d66ba8c94c71d2a
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
A lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
[lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#112811)
This is the second half of
https://github.com/llvm/llvm-project/pull/90008.
Essentially, it replaces the work of resolving template types when we
just need the qualified names with walking the DIE tree using
`DWARFTypePrinter`.
### Result
For an internal target, the time spent on `expr *this` for the first
time reduced from 28 secs to 17 secs.
Commit: b35f40688e3079d888932e0a35caa0b02d90db97
https://github.com/llvm/llvm-project/commit/b35f40688e3079d888932e0a35caa0b02d90db97
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/test/Bitcode/summary_version.ll
A llvm/test/ThinLTO/X86/Inputs/memprof-old-stackid-summary.bc
A llvm/test/ThinLTO/X86/memprof-old-stackid-summary.ll
Log Message:
-----------
[MemProf] Change the STACK_ID record to fixed width values (#116448)
The stack ids are hashes that are close to 64 bits in size, so emitting
as a pair of 32-bit fixed-width values is more efficient than a VBR.
This reduced the summary bitcode size for a large target by about 1%.
Bump the index version and ensure we can read the old format.
Commit: 5d33010f5edee8030d7b7d78c6e6f6992b659082
https://github.com/llvm/llvm-project/commit/5d33010f5edee8030d7b7d78c6e6f6992b659082
Author: David Truby <david.truby at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/test/Driver/dynamic-linker.f90
M flang/test/Driver/isysroot.f90
Log Message:
-----------
[NFC][flang] Fix driver linker tests on Windows (#116667)
Commit: 9c3665c8d26ba041a6e582e83cc2de0a1f63be48
https://github.com/llvm/llvm-project/commit/9c3665c8d26ba041a6e582e83cc2de0a1f63be48
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[rtsan] Add I/O multiplexing interceptors (#115227)
Intercepts in the family of `poll`, `select` and modern equivalents
`epoll` (linux only) and `kqueue` bsd family only.
These calls mirror the names of the system calls they call, which have
been verified on mac at least (e.g. kevent calls the system call
kevent).
Commit: dc087d1a338ca07b77c28522abb063e712b3877d
https://github.com/llvm/llvm-project/commit/dc087d1a338ca07b77c28522abb063e712b3877d
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/IR/DIExpressionOptimizer.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Avoid undefined behavior in shift operators during constant folding of DIExpressions. (#116466)
Bit shift operations with a shift operand greater than or equal to the bit width
of the (promoted) value type result in undefined behavior according to C++
[expr.shift]p1. This change adds checking for this situation and avoids attempts
to constant fold DIExpressions that would otherwise provoke such behavior.
An existing test that presumably intended to exercise shifts at the UB boundary
has been updated; it now checks for shifts of 64 bits instead of 65. This issue
was reported by a static analysis tool; no actual cases of shift operations that
would result in undefined behavior in practice have been identified.
Commit: 2310e3e3f2ccdab156abc7f9d186b2605027d8fe
https://github.com/llvm/llvm-project/commit/2310e3e3f2ccdab156abc7f9d186b2605027d8fe
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Log Message:
-----------
[GlobalISel] Move DemandedElt's APInt size assert after isValid() check (#115979)
This prevents the assertion from wrongly triggering on invalid LLT's
Commit: 2de78815604e9027efd93cac27c517bf732587d2
https://github.com/llvm/llvm-project/commit/2de78815604e9027efd93cac27c517bf732587d2
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
A llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/DroppedVariableStatsIRTest.cpp
R llvm/unittests/IR/DroppedVariableStatsTest.cpp
Log Message:
-----------
[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible. (#115563)
Move DroppedVariableStats code to its own file and change the class to
have an extensible design so that we can use it to add dropped
statistics to MIR passes and the instruction selector.
Commit: 3a3517c5e9d45a1d1aae5320887478b228b0f8be
https://github.com/llvm/llvm-project/commit/3a3517c5e9d45a1d1aae5320887478b228b0f8be
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/deque.bench.cpp
M libcxx/test/benchmarks/vector_operations.bench.cpp
A libcxx/test/std/containers/sequences/vector/vector.modifiers/common.h
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/erase_iter_iter.pass.cpp
Log Message:
-----------
[libc++] Improve the tests for vector::erase (#116265)
In particular, test everything with both a normal and a min_allocator,
add tests for a few corner cases and add tests with types that are
trivially relocatable. Also add tests that count the number of
assignments performed by vector::erase, since that is mandated by the
Standard.
This patch is a preparation for optimizing vector::erase.
Commit: 6e2b77d4696d4a672635c0ba1ead4824e2158a7d
https://github.com/llvm/llvm-project/commit/6e2b77d4696d4a672635c0ba1ead4824e2158a7d
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/CodeGen/MachineFunctionPass.h
M llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/unittests/MIR/CMakeLists.txt
A llvm/unittests/MIR/DroppedVariableStatsMIRTest.cpp
Log Message:
-----------
Add a pass to collect dropped var stats for MIR. (#115566)
This patch uses the DroppedVariableStats class to add dropped variable
statistics for MIR passes.
Commit: 78606af606deca9dd4de2ac1aec17a966c114bc2
https://github.com/llvm/llvm-project/commit/78606af606deca9dd4de2ac1aec17a966c114bc2
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix bug in unsafe casts to incomplete types (#116433)
Fixed the crash coming from attempting to get size of incomplete types.
Casting `span.data()` to a pointer-to-incomplete-type should be
immediately considered unsafe.
Solving issue #116286.
Co-authored-by: Ziqing Luo <ziqing_luo at apple.com>
Commit: 39bdf7a9db64927dfa4ad7fa85bcdf7a77a32ece
https://github.com/llvm/llvm-project/commit/39bdf7a9db64927dfa4ad7fa85bcdf7a77a32ece
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
Log Message:
-----------
[Clang] SemaFunctionEffects: Fix bug where lambdas produced by template expansion weren't verified. (#116505)
---------
Co-authored-by: Doug Wyatt <dwyatt at apple.com>
Commit: 81924ac1fb63273fc4648029301869a085bb9dac
https://github.com/llvm/llvm-project/commit/81924ac1fb63273fc4648029301869a085bb9dac
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/CodeGen/MachineFunctionPass.h
M llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/unittests/MIR/CMakeLists.txt
R llvm/unittests/MIR/DroppedVariableStatsMIRTest.cpp
Log Message:
-----------
Revert "Add a pass to collect dropped var stats for MIR. (#115566)"
This reverts commit 6e2b77d4696d4a672635c0ba1ead4824e2158a7d.
Reverting due to buildbot failure:
unittests/IR/CMakeFiles/IRTests.dir/DroppedVariableStatsIRTest.cpp.o:DroppedVariableStatsIRTest.cpp:function llvm::DroppedVariableStatsIR::runAfterPass(llvm::StringRef, llvm::Any): error: undefined reference to 'llvm::DroppedVariableStatsIR::runOnModule(llvm::Module const*, bool)'
Commit: e914d97327ce5887e51c2d650987f2f48eda85c1
https://github.com/llvm/llvm-project/commit/e914d97327ce5887e51c2d650987f2f48eda85c1
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
R llvm/include/llvm/CodeGen/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/DroppedVariableStats.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/unittests/IR/CMakeLists.txt
R llvm/unittests/IR/DroppedVariableStatsIRTest.cpp
A llvm/unittests/IR/DroppedVariableStatsTest.cpp
Log Message:
-----------
Revert "[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible. (#115563)"
This reverts commit 2de78815604e9027efd93cac27c517bf732587d2.
Reverted due to buildbot failure:
unittests/IR/CMakeFiles/IRTests.dir/DroppedVariableStatsIRTest.cpp.o:DroppedVariableStatsIRTest.cpp:function llvm::DroppedVariableStatsIR::runAfterPass(llvm::StringRef, llvm::Any): error: undefined reference to 'llvm::DroppedVariableStatsIR::runOnModule(llvm::Module const*, bool)'
Commit: 170e1fe5a5211420923e32995d8bf3da196c2a54
https://github.com/llvm/llvm-project/commit/170e1fe5a5211420923e32995d8bf3da196c2a54
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/bindings/interface/SBTargetExtensions.i
M lldb/test/API/lang/cpp/stl/TestStdCXXDisassembly.py
Log Message:
-----------
[lldb] Fix regex support in SBTarget.modules_access (#116452)
First, `SRE_Pattern` does not exist on newer Python's, use
`type(re.compile(''))` like other Python extensions do. The dynamic type
is because some earlier versions of Python 3 do not have `re.Pattern`.
Second, `SBModule` has a `file` property, not a `path` property.
Commit: 5ae4d505c38872b3faaeea5779f6c25a9138bbc5
https://github.com/llvm/llvm-project/commit/5ae4d505c38872b3faaeea5779f6c25a9138bbc5
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Add support for reading the dynamic symbol table from PT_DYNAMIC (#116689)
Resubmissions of https://github.com/llvm/llvm-project/pull/112596 with
buildbot fixes.
Allow LLDB to parse the dynamic symbol table from an ELF file or memory
image in an ELF file that has no section headers. This patch uses the
ability to parse the PT_DYNAMIC segment and find the DT_SYMTAB,
DT_SYMENT, DT_HASH or DT_GNU_HASH to find and parse the dynamic symbol
table if the section headers are not present. It also adds a helper
function to read data from a .dynamic key/value pair entry correctly
from the file or from memory.
Commit: 204234a69c068032a1adac31f00b51f3b9efa778
https://github.com/llvm/llvm-project/commit/204234a69c068032a1adac31f00b51f3b9efa778
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorDescriptor.h
Log Message:
-----------
[mlir][SparseTensor][NFC] Pass tensor type to descriptor helper (#116468)
`getDescriptorFromTensorTuple` and `getMutDescriptorFromTensorTuple`
extract the tensor type from an `unrealized_conversion_cast` op that
serves as a workaround for missing 1:N dialect conversion support.
This commit changes these functions so that they explicitly receive the
tensor type as a function argument. This is in preparation of merging
the 1:1 and 1:N conversion drivers. The conversion patterns in this file
will soon start receiving multiple SSA values (`ValueRange`) from their
adaptors (instead of a single value that is the result of
`unrealized_conversion_cast`). It will no longer be possible to take the
tensor type from the `unrealized_conversion_cast` op. The
`unrealized_conversion_cast` workaround will disappear entirely.
Commit: cfc574a6cd13d2d0b77110b579c5cfcec744129f
https://github.com/llvm/llvm-project/commit/cfc574a6cd13d2d0b77110b579c5cfcec744129f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV] Use the OperandTransform field of a couple PatLeafs to simplify isel patterns. NFC
Commit: c51786b022bbff6c902cbcd2af5cc6535f6d9b5d
https://github.com/llvm/llvm-project/commit/c51786b022bbff6c902cbcd2af5cc6535f6d9b5d
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
R lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
Revert "[lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#112811)"
This reverts commit 94d100f2ba81c2bf0ef495f68d66ba8c94c71d2a.
Reverted because of greendragon failure on the incremental arm64 bot
******************** TEST 'lldb-shell :: SymbolFile/DWARF/x86/simplified-template-names.cpp' FAILED ********************
Exit Code: 1
RUN: at line 7: /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang --driver-mode=g++ --target=specify-a-target-or-use-a-_host-substitution --target=x86_64-pc-linux -g -gsimple-template-names /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp -o /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/test/Shell/SymbolFile/DWARF/x86/Output/simplified-template-names.cpp.tmp
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang --driver-mode=g++ --target=specify-a-target-or-use-a-_host-substitution --target=x86_64-pc-linux -g -gsimple-template-names /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp -o /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/test/Shell/SymbolFile/DWARF/x86/Output/simplified-template-names.cpp.tmp
ld: warning: -m is obsolete
ld: unknown option: --hash-style=gnu
clang: error: linker command failed with exit code 1 (use -v to see invocation)
Commit: 6626ed6f9fae79d35aba504f50bac4375686a03b
https://github.com/llvm/llvm-project/commit/6626ed6f9fae79d35aba504f50bac4375686a03b
Author: lialan <me at alanli.org>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-transforms.mlir
Log Message:
-----------
[MLIR] Fix `BubbleDownVectorBitCastForExtract` crash on non-static index (#116518)
Previously the patch was not expecting to handle non-static index, when
the index is a non constant value it will crash.
This patch is to make sure it return gracefully instead of crashing.
Commit: 6fe94c3bae596271c1f3b112d7635339a21c776d
https://github.com/llvm/llvm-project/commit/6fe94c3bae596271c1f3b112d7635339a21c776d
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .github/new-issues-labeler.yml
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
[Workflows] Enable commit access requests via GitHub issues (#100458)
This updates the auto-labeler to match a specific issue title that is
going to be used for requesting commit access and then add the
infrastructure:commit-access-request label.
This will notify the admin team who will be able to handle the request.
See
https://discourse.llvm.org/t/rfc-change-the-process-for-requesting-commit-access/80184
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Commit: e17c91341be2f6a2d229ab44a4290e7d0ef2e094
https://github.com/llvm/llvm-project/commit/e17c91341be2f6a2d229ab44a4290e7d0ef2e094
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/python/mlir/extras/types.py
M mlir/test/python/ir/builtin_types.py
Log Message:
-----------
[mlir][python] Add `T.tf32` and missing tests for `tf32` (#116725)
Commit: cd418030de7ae75750bc4e48d1238baf03c675e5
https://github.com/llvm/llvm-project/commit/cd418030de7ae75750bc4e48d1238baf03c675e5
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/attributes.ll
Log Message:
-----------
[RISCV] Remove +a from the attribute test for zacas and zabha. NFC.
zacas and zabha don't require the 'a' or 'zaamo' extension after
https://github.com/llvm/llvm-project/pull/115694.
Commit: c526eb891bda371c0481fcdc1507adc496431d03
https://github.com/llvm/llvm-project/commit/c526eb891bda371c0481fcdc1507adc496431d03
Author: Greg Clayton <clayborg at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Fix buildbots with no x86 target.
Fix for: https://github.com/llvm/llvm-project/pull/116689
Commit: 31a4d2c2eb265708b2ff50f6f9c53685a3df8d10
https://github.com/llvm/llvm-project/commit/31a4d2c2eb265708b2ff50f6f9c53685a3df8d10
Author: vporpo <vporpodas at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][DAG] Cleanup: Move callback registration from Scheduler to DAG (#116455)
This is a refactoring patch that moves the callback registration for
getting notified about new instructions from the scheduler to the DAG.
This makes sense from a design and testing point of view:
- the DAG should not rely on the scheduler for getting notified
- the notifiers don't need to be public
- it's easier to test the notifiers directly from within the DAG unit
tests
Commit: 1eaa17975dc568cff4fe31a79c0d147ef5c55301
https://github.com/llvm/llvm-project/commit/1eaa17975dc568cff4fe31a79c0d147ef5c55301
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
Log Message:
-----------
[LoopInterchange] Bail out early if minimum loop nest is not met (#115128)
This patch bails out early if minimum depth
is not met. As it stands today, the pass computes
CacheCost before it attempts to do the transform.
This is not needed if minimum depth is not met.
This handles basic cases where depth is typically 1.
As the patch avoids unnecessary computation, it is aimed to improve
compile-time.
Commit: 08ef9396377cd60239a6312640f4fdc9c91a1703
https://github.com/llvm/llvm-project/commit/08ef9396377cd60239a6312640f4fdc9c91a1703
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/eh-frame-hdr.test
Log Message:
-----------
[BOLT] Overwrite .eh_frame_hdr in-place (#116730)
If the new EH frame header can fit into the original .eh_frame_hdr
section, overwrite it in-place and pad with zeroes.
Commit: a17f11baa1b622359547604555173384e220eef3
https://github.com/llvm/llvm-project/commit/a17f11baa1b622359547604555173384e220eef3
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
A compiler-rt/test/profile/ContinuousSyncMode/multi-threaded.cpp
M compiler-rt/test/profile/lit.cfg.py
Log Message:
-----------
[test][PGO] Add a multi-threaded test for continuous PGO.
Commit: ff9509e7d8ffac11ec25cea6c0dd7783097d3181
https://github.com/llvm/llvm-project/commit/ff9509e7d8ffac11ec25cea6c0dd7783097d3181
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
Log Message:
-----------
[SandboxVec][BottomUpVec][NFC] Add some comments
Commit: 661c593850715881d2805a59e90e6d87d8b9fbb8
https://github.com/llvm/llvm-project/commit/661c593850715881d2805a59e90e6d87d8b9fbb8
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-zero.ll
M llvm/test/Other/optimize-inrange-gep.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
A llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/PGOProfile/memprof_internal_linkage.ll
M llvm/test/Transforms/PhaseOrdering/X86/unroll-vectorizer.ll
M llvm/test/Transforms/PhaseOrdering/memcpy-offset.ll
M llvm/test/Transforms/PhaseOrdering/pr95152.ll
Log Message:
-----------
[FunctionAttrs] Add the "initializes" attribute inference (#97373)
Add the "initializes" attribute inference.
This change is expected to have ~0.09% compile time regression, which
seems acceptable for interprocedural DSE.
https://llvm-compile-time-tracker.com/compare.php?from=9f10252c4ad7cffbbcf692fa9c953698f82ac4f5&to=56345c1cee4375eb5c28b8e7abf4803d20216b3b&stat=instructions%3Au
Commit: 738bdd49694f2722c9b58b6a1bb99eaa6c0ba051
https://github.com/llvm/llvm-project/commit/738bdd49694f2722c9b58b6a1bb99eaa6c0ba051
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
A llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
Log Message:
-----------
AMDGPU: Add V_CVT_PK_BF16_F32 for gfx950 (#116678)
Commit: 130a3150ec9cdaecdf9b0fa773b8c23a6b9bc527
https://github.com/llvm/llvm-project/commit/130a3150ec9cdaecdf9b0fa773b8c23a6b9bc527
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Define v_mfma_f32_32x32x16_bf16 for gfx950 (#116679)
Unlike the existing gfx940 intrinsics using short/i16 in place of
bfloat, this uses the natural bfloat type.
Commit: 50224bd5ba009f02a012e22c0f87eba0028d6d88
https://github.com/llvm/llvm-project/commit/50224bd5ba009f02a012e22c0f87eba0028d6d88
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
A llvm/test/MC/AMDGPU/gfx950_asm_features.s
A llvm/test/MC/Disassembler/AMDGPU/gfx950.txt
Log Message:
-----------
AMDGPU: Handle gfx950 global_load_lds_* instructions (#116680)
Define global_load_lds_dwordx3 and global_load_dwordx4.
Oddly it seems dwordx2 was skipped.
Commit: 927032807dfdca5d94eb0a8707d38b605e95e407
https://github.com/llvm/llvm-project/commit/927032807dfdca5d94eb0a8707d38b605e95e407
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.gfx950.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.gfx950.ll
A llvm/test/MC/AMDGPU/mubuf-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950.txt
Log Message:
-----------
AMDGPU: Handle gfx950 96/128-bit buffer_load_lds (#116681)
Enforcing this limit in the clang builtin will come later.
Commit: 545917cb4b1c122b3626ea8d35fa7f93a44ae27f
https://github.com/llvm/llvm-project/commit/545917cb4b1c122b3626ea8d35fa7f93a44ae27f
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
Log Message:
-----------
[clangd] Harden incomingCalls() against possible misinterpretation of a range as pertaining to the wrong file (#111616)
`CallHierarchyIncomingCall::fromRanges` are interpreted as ranges in the
same file as the `CallHierarchyItem` representing the caller
(`CallHierarchyIncomingCall::from`).
In C/C++, it's possible for the calls to be in a different file than the caller,
as illustrated in the added test case.
With this patch, such calls are dropped, rather than their ranges being
incorrectly interpreted as pertaining to the wrong file.
Commit: 44a41b0660912a90be903a843e8b6f234fa0a2be
https://github.com/llvm/llvm-project/commit/44a41b0660912a90be903a843e8b6f234fa0a2be
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
Log Message:
-----------
[clangd] Check for other clangd extension capabilities under 'experimental' (#116531)
This is a follow-up to PR114699, with the same motivation: to support
clients which only support adding custom (language-specific or
server-specific) capabilities under 'experimental'.
Commit: 2e0a3c281b31eeffb1c12b53360f22760e246af2
https://github.com/llvm/llvm-project/commit/2e0a3c281b31eeffb1c12b53360f22760e246af2
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/DebugInfo/Generic/artificial-static-member.ll
Log Message:
-----------
[DebugInfo] Correct an overly-restrictive REQUIRES clause. (#116429)
Include a regular expression in the 'REQUIRES' clause, to run
the test on all matching targets (x86_64 *linux*).
The original patch restricted to test just to 'x86_64-linux'
https://github.com/llvm/llvm-project/pull/116327
Commit: 0488d1774b197513cf91d973e103f4e7de293c00
https://github.com/llvm/llvm-project/commit/0488d1774b197513cf91d973e103f4e7de293c00
Author: Florian Mayer <fmayer at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/msan/tests/msan_test.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Log Message:
-----------
Reland "[Sanitizers] Intercept timer_create" (#113710) (#116717)
Original commit 2ec5c69b6872b8b474f3d37b9125d3d57d144d1b only
intercepted timer_create.
Because of how versioned libc symbols work, this could cause problems
where a newer `timer_create`
was used, and the result would be used by an older version. This would
cause crashes. This is why we
need to intercept all of the related functions.
Addresses https://github.com/llvm/llvm-project/issues/111847
Commit: 3b162f73d8027dcd8261666a40e9bdfb40f4dacc
https://github.com/llvm/llvm-project/commit/3b162f73d8027dcd8261666a40e9bdfb40f4dacc
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Features.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/CodeGen/AArch64/elf-pauthabi.c
A clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/Preprocessor/ptrauth_feature.c
Log Message:
-----------
[PAC][clang] Add signed GOT cc1 flag (#96160)
Add `-fptrauth-elf-got` clang cc1 flag and set `ptrauth_elf_got`
preprocessor feature and `PointerAuthELFGOT` LangOption correspondingly.
No additional checks like ensuring OS binary format is ELF are
performed: it should be done on clang driver level when a pauth-enabled
environment implying signed GOT enabled is requested.
If the cc1 flag is passed, "ptrauth-elf-got" IR module flag is set.
Commit: 456e60904b7b9de0a2bfabdac37ce9b8ac054750
https://github.com/llvm/llvm-project/commit/456e60904b7b9de0a2bfabdac37ce9b8ac054750
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Dialect Conversion: Delete dead code from `ConversionValueMapping` (#116758)
Commit: 55068dc3b7725f24de82dd4510162865c91a4f5e
https://github.com/llvm/llvm-project/commit/55068dc3b7725f24de82dd4510162865c91a4f5e
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/MainLoopBase.h
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/include/lldb/Host/windows/MainLoopWindows.h
M lldb/source/Host/common/MainLoopBase.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/unittests/Host/MainLoopTest.cpp
Log Message:
-----------
[lldb] Add timed callbacks to the MainLoop class (#112895)
The motivating use case is being able to "time out" certain operations
(by adding a timed callback which will force the termination of the
loop), but the design is flexible enough to accomodate other use cases
as well (e.g. running a periodic task in the background).
The implementation builds on the existing "pending callback" mechanism,
by associating a time point with each callback -- every time the loop
wakes up, it runs all of the callbacks which are past their point, and
it also makes sure to sleep only until the next callback is scheduled to
run.
I've done some renaming as names like "TriggerPendingCallbacks" were no
longer accurate -- the function may no longer cause any callbacks to be
called (it may just cause the main loop thread to recalculate the time
it wants to sleep).
Commit: 980d5fb2d014f87fa3f6249e9196bb28d7afd9c6
https://github.com/llvm/llvm-project/commit/980d5fb2d014f87fa3f6249e9196bb28d7afd9c6
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][omp] Add omp operations for OpenMP workshare (#101443)
Add the `omp.workshare` and `omp.workshare.loop_wrapper` operations used for the implementation of the `workshare` construct in flang.
Commit: 02b8ee281947f6cb39c7eb3c4bbba59322e9015b
https://github.com/llvm/llvm-project/commit/02b8ee281947f6cb39c7eb3c4bbba59322e9015b
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
A llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
Log Message:
-----------
[llvm] Improve llvm.objectsize computation by computing GEP, alloca and malloc parameters bound (#115522)
Using a naive expression walker, it is possible to compute valuable
information for
allocation functions, GEP and alloca, even in the presence of some
dynamic
information.
We don't rely on computeConstantRange to avoid taking advantage of
undefined behavior, which would be counter-productive wrt. usual
llvm.objectsize usage.
llvm.objectsize plays an important role in _FORTIFY_SOURCE definitions,
so improving its diagnostic in turns improves the security of compiled
application.
As a side note, as a result of recent optimization improvements, clang
no
longer passes
https://github.com/serge-sans-paille/builtin_object_size-test-suite
This commit restores the situation and greatly improves the scope of
code handled by the static version of __builtin_object_size.
Commit: 7d6713db600af1b4381149a0e794cbce99ca6cb2
https://github.com/llvm/llvm-project/commit/7d6713db600af1b4381149a0e794cbce99ca6cb2
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/workshare.f90
Log Message:
-----------
[flang][omp] Emit omp.workshare in frontend (#101444)
Emit the contents of OpenMP workshare constructs in `omp.workshare`.
Commit: 8bb21ae6c92c03b2487ee9b0df584c7a17446863
https://github.com/llvm/llvm-project/commit/8bb21ae6c92c03b2487ee9b0df584c7a17446863
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
Log Message:
-----------
[flang] Introduce custom loop nest generation for loops in workshare construct (#101445)
This alternative loop nest generation is used to generate an OpenMP loop nest instead of fir loops to facilitate parallelizing statements in an OpenMP `workshare` construct.
Commit: e7e5541616435b62da56e0a1fcc587c10b25321c
https://github.com/llvm/llvm-project/commit/e7e5541616435b62da56e0a1fcc587c10b25321c
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/OpenMP/Passes.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Fir/basic-program.fir
A flang/test/Transforms/OpenMP/lower-workshare-alloca.mlir
A flang/test/Transforms/OpenMP/lower-workshare-binding.mlir
A flang/test/Transforms/OpenMP/lower-workshare-cleanup.mlir
A flang/test/Transforms/OpenMP/lower-workshare-copyprivate.mlir
A flang/test/Transforms/OpenMP/lower-workshare-correct-parallelize.mlir
A flang/test/Transforms/OpenMP/lower-workshare-no-single.mlir
A flang/test/Transforms/OpenMP/lower-workshare-nowait.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg-dom.mlir
A flang/test/Transforms/OpenMP/lower-workshare-todo-cfg.mlir
M flang/tools/bbc/bbc.cpp
M flang/tools/tco/tco.cpp
Log Message:
-----------
[flang] Lower omp.workshare to other omp constructs (#101446)
Add a new pass that lowers an `omp.workshare` with its binding `omp.workshare.loop_wrapper` loop nests into other OpenMP constructs that can be lowered to LLVM.
More specifically, in order to preserve the sequential execution semantics of the code contained, it wraps portions that needs to be executed on a single thread in `omp.single` blocks, converts code that must be parallelized into `omp.wsloop` nests and inserts the appropriate synchronization.
Commit: 752dbd6112affa418e33910ac08bf9921f9c270b
https://github.com/llvm/llvm-project/commit/752dbd6112affa418e33910ac08bf9921f9c270b
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Interpreter/Wasm.h
Log Message:
-----------
[clang-repl] Improve flags responsible for generating shared wasm binaries (#116735)
There are a couple changes in this PR that help getting clang-repl to
run in the browser. Using a jupyterlite instance for the example pasted
below
1) Updating flags responsible for generating shared wasm binaries that
need to be dynamically loaded Most Importantly as can be seen in the
changes `shared` and `allow-undefined` are crucial.
2) While exiting we encounter this.
Now as can be seen here
https://github.com/llvm/llvm-project/blob/cd418030de7ae75750bc4e48d1238baf03c675e5/clang/lib/Interpreter/Interpreter.cpp#L421-L430
We call cleanUP in the destructor. Now cleanUP through
IncrementalExecutor tries to deinitialize the JIT which wasn't even
intialized as runCtors in wasm.cpp is a no-op
https://github.com/llvm/llvm-project/blob/cd418030de7ae75750bc4e48d1238baf03c675e5/clang/lib/Interpreter/IncrementalExecutor.cpp#L94-L101
https://github.com/llvm/llvm-project/blob/cd418030de7ae75750bc4e48d1238baf03c675e5/clang/lib/Interpreter/Wasm.cpp#L107-L109
Commit: ead9ad2960ab72bf6142d8aeb164a097a7e407db
https://github.com/llvm/llvm-project/commit/ead9ad2960ab72bf6142d8aeb164a097a7e407db
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Transforms/JumpThreading/PR33357-lvi-recursion.ll
M llvm/test/Transforms/JumpThreading/basic.ll
M llvm/test/Transforms/JumpThreading/crash.ll
M llvm/test/Transforms/JumpThreading/ddt-crash.ll
M llvm/test/Transforms/JumpThreading/ddt-crash4.ll
M llvm/test/Transforms/JumpThreading/landing-pad.ll
M llvm/test/Transforms/JumpThreading/pr22086.ll
M llvm/test/Transforms/JumpThreading/pr9331.ll
M llvm/test/Transforms/JumpThreading/preserving-debugloc-br.ll
M llvm/test/Transforms/JumpThreading/unreachable-loops.ll
M llvm/test/Transforms/LCSSA/indirectbr.ll
M llvm/test/Transforms/LCSSA/invoke-dest.ll
M llvm/test/Transforms/LCSSA/pr28424.ll
M llvm/test/Transforms/LCSSA/pr28608.ll
M llvm/test/Transforms/LCSSA/remove-phis.ll
M llvm/test/Transforms/LCSSA/unused-phis.ll
M llvm/test/Transforms/LICM/2009-12-10-LICM-Indbr-Crash.ll
M llvm/test/Transforms/LICM/alias-set-tracker-loss.ll
M llvm/test/Transforms/LICM/assume.ll
M llvm/test/Transforms/LICM/callbr-crash.ll
M llvm/test/Transforms/LICM/crash.ll
M llvm/test/Transforms/LICM/debug-value.ll
M llvm/test/Transforms/LICM/gc-relocate.ll
M llvm/test/Transforms/LICM/hoist-phi.ll
M llvm/test/Transforms/LICM/lcssa-ssa-promoter.ll
M llvm/test/Transforms/LICM/loopsink-pr39570.ll
M llvm/test/Transforms/LICM/outer-loop-deleted-before-licm.ll
M llvm/test/Transforms/LICM/pr32129.ll
M llvm/test/Transforms/LICM/pr37323.ll
M llvm/test/Transforms/LICM/pr38513.ll
M llvm/test/Transforms/LICM/pr50367.ll
M llvm/test/Transforms/LICM/sink-promote.ll
M llvm/test/Transforms/LICM/sinking.ll
M llvm/test/Transforms/LoopDeletion/2011-06-21-phioperands.ll
M llvm/test/Transforms/LoopDeletion/2017-07-11-incremental-dt.ll
M llvm/test/Transforms/LoopDeletion/bbi-59728.ll
M llvm/test/Transforms/LoopDeletion/crashbc.ll
M llvm/test/Transforms/LoopDeletion/pr53969.ll
M llvm/test/Transforms/LoopDeletion/simplify-then-delete.ll
M llvm/test/Transforms/LoopIdiom/non-canonical-loop.ll
M llvm/test/Transforms/LoopIdiom/scev-invalidation_topmostloop.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#116739)
This PR removes tests with br i1 undef under
`llvm/tests/Transforms/JumpThreading, LCSSA, LICM, LoopDeletion,
LoopIdiom`.
Commit: 0a27e4eed4bb6ad83b5705558245c20f1083e6a1
https://github.com/llvm/llvm-project/commit/0a27e4eed4bb6ad83b5705558245c20f1083e6a1
Author: Ivan Radanov Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M offload/plugins-nextgen/common/src/JIT.cpp
Log Message:
-----------
[offload] Fix copy-paste defect in error message
Commit: 1e897ed28d26e192178247991158bd476e4a1106
https://github.com/llvm/llvm-project/commit/1e897ed28d26e192178247991158bd476e4a1106
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
Log Message:
-----------
[TTI][RISCV] Deduplicate type-based VP costing (#115983)
We have a lot of code in RISCVTTIImpl::getIntrinsicInstrCost for vp
intrinsics, which just forward the cost to the underlying non-vp cost
function.
However I just also noticed that there is generic code in BasicTTIImpl's
getIntrinsicInstrCost that does the same thing, added in #67178. The
only difference is that BasicTTIImpl doesn't yet handle it for
type-based costing. There doesn't seem to be any reason that it can't
since it's just inspecting the argument types.
This shuffles the VP costing up to handle both regular and type-based
costing, which allows us to deduplicate some of the VP specific costing
in RISCVTTIImpl by delegating it to BasicTTIImpl.h. More of those nodes
can be moved over to BasicTTIImpl.h later.
It's not NFC since it picks up a couple of VP nodes that had slipped
through the cracks. Future PRs can begin to move more of the code from
RISCVTTIImpl to BasicTTIImpl.
Commit: 7e85cb8a8a9de57ed10635b843662148a87b17e5
https://github.com/llvm/llvm-project/commit/7e85cb8a8a9de57ed10635b843662148a87b17e5
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
Log Message:
-----------
[AArch64][NFC] Add test as a representative of scalarizing a vector i… (#114107)
…nteger division
The last resort to vectorize a bundle of integer divisions is considered
scalarizing it. Currently, the cost estimates for scalarizing a vector
division can be considerably overestimated as is the scenario with this
motivating test case i.e. vector cost should not deviate much from the
scalar cost.
Future patch will try to improve the scalarization cost.
Commit: 3093b29b597b9a936a3e4d1c8bc4a7ccba8fc848
https://github.com/llvm/llvm-project/commit/3093b29b597b9a936a3e4d1c8bc4a7ccba8fc848
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
Log Message:
-----------
[RegisterCoalescer] Fix up subreg lanemasks after rematerializing. (#116191)
In a situation like the following:
```
undef %2.subreg = INST %1 ; DefMI (rematerializable),
; DefSubIdx = subreg
%3 = COPY %2 ; SrcIdx = DstIdx = 0
.... = SOMEINSTR %3, %2
```
there are no subranges for `%3` because the entire register is copied,
but after rematerialization the subrange of the rematerialized value
must be fixed up with the appropriate subranges for `.subreg`.
(To me this issue seemed a bit similar to the issue fixed by #96839, but
then related to rematerialization)
Commit: 3097c60928c773d8c7f97432491c0e4367b6215c
https://github.com/llvm/llvm-project/commit/3097c60928c773d8c7f97432491c0e4367b6215c
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maximize-bandwidth-invalidate.ll
M llvm/test/Transforms/LoopVectorize/AArch64/no_vector_instructions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-fp-ext-trunc-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-shiftcost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-02.ll
M llvm/test/Transforms/LoopVectorize/X86/fneg-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/mul_slm_16bit.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/redundant-vf2-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/uint64_to_fp64-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll
M llvm/test/Transforms/LoopVectorize/X86/vector-scalar-select-cost.ll
Log Message:
-----------
[LoopVectorize][NFC] Rewrite tests to check output of vplan cost model (#113697)
Currently it's very difficult to improve the cost model for tail-folded
loops because as soon as you add a VPInstruction::computeCost function
that adds the costs of instructions such as
VPInstruction::ActiveLaneMask
and VPInstruction::ExplicitVectorLength the assert in
LoopVectorizationPlanner::computeBestVF fails for some tests. This is
because the VF chosen by the legacy cost model doesn't match the vplan
cost model. See PR #90191. This assert is currently making it difficult
to improve the cost model.
Hopefully we will be in a position to remove the assert soon, however
in order to do that we have to fix up a whole bunch of tests that rely
upon the legacy cost model output. I've tried my best to update
these tests to use vplan output instead.
There is still work needed for the VF=1 case because the vplan cost
model is not printed out in this case. I've not attempted to fix those
in this patch.
Commit: 91c1699943a7f41c337d44b965c63bb6fc96de16
https://github.com/llvm/llvm-project/commit/91c1699943a7f41c337d44b965c63bb6fc96de16
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
[clang] [NFC] Merge conditions (#116612)
Commit: 0775088234f1a98d1b18a2ff846d851509f5c023
https://github.com/llvm/llvm-project/commit/0775088234f1a98d1b18a2ff846d851509f5c023
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
A mlir/test/Dialect/Linalg/decompose-tensor-pack-tile.mlir
A mlir/test/Dialect/Linalg/decompose-tensor-pack.mlir
A mlir/test/Dialect/Linalg/decompose-tensor-unpack-tile.mlir
A mlir/test/Dialect/Linalg/decompose-tensor-unpack.mlir
R mlir/test/Dialect/Linalg/generalize-tensor-pack-tile.mlir
R mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
R mlir/test/Dialect/Linalg/generalize-tensor-unpack-tile.mlir
R mlir/test/Dialect/Linalg/generalize-tensor-unpack.mlir
A mlir/test/Dialect/Linalg/td/decompose-pack.mlir
R mlir/test/Dialect/Linalg/td/generalize-pack.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Log Message:
-----------
[mlir] Rename `GeneralizeOuterUnitDims{Un}PackOpPattern`s (#116439)
Renames:
* `GeneralizeOuterUnitDimsPackOpPattern`,
* `GeneralizeOuterUnitDimsUnPackOpPattern`,
as
* `DecomposeOuterUnitDimsPackOpPattern`,
* `DecomposeOuterUnitDimsUnPackOpPattern`,
respectively. The new name better describes the underlying
transformation.
Commit: 6aa80f00574826a0c2f2972a659517a9bf1efece
https://github.com/llvm/llvm-project/commit/6aa80f00574826a0c2f2972a659517a9bf1efece
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/builtin-bit-cast.cpp
Log Message:
-----------
[Clang] [NFC] Add single quotes around __builtin_bit_cast (#116120)
Fixes #116118
Commit: 8cd348c96a845e4afb3e924355e98b5558683d01
https://github.com/llvm/llvm-project/commit/8cd348c96a845e4afb3e924355e98b5558683d01
Author: Davide <39653004+Tazdevil971 at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/test/CodeGen/Mips/fp16-promote.ll
Log Message:
-----------
[MIPS] Updated MIPS N calling conventions so that fp16 arguments no longer cause a crash (#116569)
This PR fixes a bug introduced by #110199, which causes any half float
argument to crash the compiler on MIPS64.
Currently compiling this bit of code with `llc -mtriple=mips64`:
```
define void @half_args(half %a) nounwind {
entry:
ret void
}
```
Crashes with the following log:
```
LLVM ERROR: unable to allocate function argument #0
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: llc -mtriple=mips64
1. Running pass 'Function Pass Manager' on module '<stdin>'.
2. Running pass 'MIPS DAG->DAG Pattern Instruction Selection' on function '@half_args'
#0 0x000055a3a4013df8 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x32d0df8)
#1 0x000055a3a401199e llvm::sys::RunSignalHandlers() (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x32ce99e)
#2 0x000055a3a40144a8 SignalHandler(int) Signals.cpp:0:0
#3 0x00007f00bde558c0 __restore_rt libc_sigaction.c:0:0
#4 0x00007f00bdea462c __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
#5 0x00007f00bde55822 gsignal ./signal/../sysdeps/posix/raise.c:27:6
#6 0x00007f00bde3e4af abort ./stdlib/abort.c:81:7
#7 0x000055a3a3f80e3c llvm::report_fatal_error(llvm::Twine const&, bool) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x323de3c)
#8 0x000055a3a2e20dfa (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x20dddfa)
#9 0x000055a3a2a34e20 llvm::MipsTargetLowering::LowerFormalArguments(llvm::SDValue, unsigned int, bool, llvm::SmallVectorImpl<llvm::ISD::InputArg> const&, llvm::SDLoc const&, llvm::SelectionDAG&, llvm::SmallVectorImpl<llvm::SDValue>&) const MipsISelLowering.cpp:0:0
#10 0x000055a3a3d896a9 llvm::SelectionDAGISel::LowerArguments(llvm::Function const&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x30466a9)
#11 0x000055a3a3e0b3ec llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x30c83ec)
#12 0x000055a3a3e09e21 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x30c6e21)
#13 0x000055a3a2aae1ca llvm::MipsDAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&) MipsISelDAGToDAG.cpp:0:0
#14 0x000055a3a3e07706 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x30c4706)
#15 0x000055a3a3051ed6 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x230eed6)
#16 0x000055a3a35a3ec9 llvm::FPPassManager::runOnFunction(llvm::Function&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x2860ec9)
#17 0x000055a3a35ac3b2 llvm::FPPassManager::runOnModule(llvm::Module&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x28693b2)
#18 0x000055a3a35a499c llvm::legacy::PassManagerImpl::run(llvm::Module&) (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x286199c)
#19 0x000055a3a262abbb main (/home/davide/Ps2/rps2-tools/prefix/bin/llc+0x18e7bbb)
#20 0x00007f00bde3fc4c __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#21 0x00007f00bde3fd05 call_init ./csu/../csu/libc-start.c:128:20
#22 0x00007f00bde3fd05 __libc_start_main at GLIBC_2.2.5 ./csu/../csu/libc-start.c:347:5
#23 0x000055a3a2624921 _start /builddir/glibc-2.39/csu/../sysdeps/x86_64/start.S:117:0
```
This is caused by the fact that after the change, `f16`s are no longer
lowered as `f32`s in calls.
Two possible fixes are available:
- Update calling conventions to properly support passing `f16` as
integers.
- Update `useFPRegsForHalfType()` to return `true` so that `f16` are
still kept in `f32` registers, as before #110199.
This PR implements the first solution to not introduce any more ABI
changes as #110199 already did.
As of what is the correct ABI for halfs, I don't think there is a
correct answer. GCC doesn't support halfs on MIPS, and I couldn't find
any information on old MIPS ABI manuals either.
Commit: 4818dd33d84fcf41c08419a9960cadd473d536a9
https://github.com/llvm/llvm-project/commit/4818dd33d84fcf41c08419a9960cadd473d536a9
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
Log Message:
-----------
[HLSL] Rename resource's "h" member to "__handle". NFC (#116696)
This makes it clearer that the handle is an implementation detail by
using a name that's reserved.
Commit: 497b1ae15f7984c673e2d7af7bb365645723ca93
https://github.com/llvm/llvm-project/commit/497b1ae15f7984c673e2d7af7bb365645723ca93
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Type.h
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/target-type-properties.ll
Log Message:
-----------
[IR] Improve check for target extension types disallowed in globals. (#116639)
For target extension types that are not allowed to be used as globals,
also disallow them nested inside array and structure types.
Commit: f77126c549ced0db57d912bcd87145b1309843be
https://github.com/llvm/llvm-project/commit/f77126c549ced0db57d912bcd87145b1309843be
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-zero.ll
M llvm/test/Other/optimize-inrange-gep.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
R llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/PGOProfile/memprof_internal_linkage.ll
M llvm/test/Transforms/PhaseOrdering/X86/unroll-vectorizer.ll
M llvm/test/Transforms/PhaseOrdering/memcpy-offset.ll
M llvm/test/Transforms/PhaseOrdering/pr95152.ll
Log Message:
-----------
Revert "[FunctionAttrs] Add the "initializes" attribute inference (#97373)"
This reverts commit 661c593850715881d2805a59e90e6d87d8b9fbb8.
Multiple buildbot failures, e.g. https://lab.llvm.org/buildbot/#/builders/108/builds/6096
Commit: 4bd982d528ac2b2cb73d9fe6e534db84cfc16aaf
https://github.com/llvm/llvm-project/commit/4bd982d528ac2b2cb73d9fe6e534db84cfc16aaf
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
Log Message:
-----------
[HLSL] Fix resource kind for RasterizerOrderedStructuredBuffer (#116700)
This is a kind of StructuredBuffer, so it should be "Raw" and not
"Typed".
Commit: 43f84e7937d12a4d868a51244e9b3572812a1572
https://github.com/llvm/llvm-project/commit/43f84e7937d12a4d868a51244e9b3572812a1572
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaType.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp
Log Message:
-----------
[Clang] Enhance diagnostic by attaching source location to deduced type in trailing return without auto (#115786)
Fixes #78694
Commit: 738a047ed6380efdfd4b64968881675347d7f915
https://github.com/llvm/llvm-project/commit/738a047ed6380efdfd4b64968881675347d7f915
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/warn-shadow.cpp
Log Message:
-----------
[Clang] Skip shadow warnings for enum constants in distinct class scopes (#115656)
Fixes #62588
Commit: d4f2b71c3fd89da4dbdec0091a97a6a2c411145d
https://github.com/llvm/llvm-project/commit/d4f2b71c3fd89da4dbdec0091a97a6a2c411145d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86] Fix position of immediate argument in AVX512 VPCMP comparisons (#116646)
The 'i' arg was being put between the 'm' and 'b' args instead of afterwards like other avx512 instructions (VCMPPS/D, VPERMILPS/D etc.).
Commit: 51ad2901ca54a01a72db71622b116eb27ea6dcf2
https://github.com/llvm/llvm-project/commit/51ad2901ca54a01a72db71622b116eb27ea6dcf2
Author: Yihe Li <winmikedows at hotmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/Expr.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p3.cpp
M clang/test/Sema/c2x-nodiscard.c
M clang/test/SemaCXX/warn-unused-result.cpp
Log Message:
-----------
[Clang] Improve diagnostic on `[[nodiscard]]` attribute (#112521)
A follow-up to #112289.
When diagnosing an unused return value, if the diagnostic
is triggered by an attribute attached to a type, the type name
is now included in the diagnostic.
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Commit: b3e2b1a7eb258a7c9c55691d08342eface083499
https://github.com/llvm/llvm-project/commit/b3e2b1a7eb258a7c9c55691d08342eface083499
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.h
Log Message:
-----------
[clang-tidy][NFC] fix typo in ExceptionAnalyzer; `replace count()>0` with `contains` (#116635)
Commit: b2ec416aa5bcd89c4bc295163d60e5a2ecb99212
https://github.com/llvm/llvm-project/commit/b2ec416aa5bcd89c4bc295163d60e5a2ecb99212
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_mve.td
M clang/include/clang/Basic/arm_mve_defs.td
M clang/test/CodeGen/arm-mve-intrinsics/compare.c
Log Message:
-----------
[ARM] Fix NaN behaviour for MVE compare intrinsics (#116371)
The MVE intrinsics are defined as having the same behaviour as the
instructions which they correspond to. In particular, the vcmpleq and
vcmpltq intrinsics correspond to the VCMP instruction with the LE or LT
condition. However, these instructions with these two conditions do not
match the normal IEEE754 behaviour for NaNs, they return true if either
operand is a NaN, instead of false. Therefore we need to generate `fcmp`
IR instructions with the `ule` and `ult` conditions, instead of `ole`
and `olt`.
This differs from AdvSIMD, where only instructions with the EQ, GE and
GT conditions are available, and the intrinsics for the others are
defined by swapping the condition and operand order, so the results
match the IEEE754 behaviour for NaNs.
Commit: 61726add1b03a13906bd618a784d040a182e5968
https://github.com/llvm/llvm-project/commit/61726add1b03a13906bd618a784d040a182e5968
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve-intrinsics-fexpa.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll
M llvm/test/MC/AArch64/SVE/fexpa.s
Log Message:
-----------
[AArch64] Update predicate for FEXPA (#116613)
This patch updates predicate and backend tests for FEXPA instructions to
match [latest
spec](https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions/FEXPA--Floating-point-exponential-accelerator-).
Commit: 6f53ae6e613f5f7011c1752b94038114f4e1cc94
https://github.com/llvm/llvm-project/commit/6f53ae6e613f5f7011c1752b94038114f4e1cc94
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll
Log Message:
-----------
[X86] Properly chain PROBED_ALLOCA / SEG_ALLOCA (#116508)
These nodes should appear between CALLSEQ_START / CALLSEQ_END.
Previously, they could be scheduled after CALLSEQ_END because the nodes
didn't update the chain.
The change in a test is due to X86 call frame optimizer pass bailing out
for a particular call when CALLSEQ_START / CALLSEQ_END are not in the
same basic block. This happens because SEG_ALLOCA is expanded into a
sequence of basic blocks early. It didn't bail out before because the
closing CALLSEQ_END was scheduled before SEG_ALLOCA, in the same basic
block as CALLSEQ_START.
While here, simplify creation of these nodes: allocating a virtual
register and copying `Size` into it were unnecessary.
Commit: 95ab42661e8d1f57a4ef8e9d058b44627af0e58d
https://github.com/llvm/llvm-project/commit/95ab42661e8d1f57a4ef8e9d058b44627af0e58d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/subvector-broadcast.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Log Message:
-----------
[X86] Attempt to canonicalize vXf64 SHUFPD shuffle masks with undef elts to improve further folding (#116419)
Currently when creating a SHUFPD immediate mask, any undef shuffle elements are set to 0, which can limit options for further shuffle combining.
This patch attempts to canonicalize the mask to improve folding: first by detecting a per-lane broadcast style mask (which can allow us to fold to UNPCK instead), and second ensure any undef elements are set to an 'inplace' value to improve chances of the SHUFPD later folding to a BLENDPD (or be bypassed in a SimplifyMultipleUseDemandedVectorElts call).
This is very similar to canonicalization we already attempt in getV4X86ShuffleImm for vXi32/vXf32 SHUFPS/SHUFD shuffles.
Commit: 843498d4545b86fbd9c5b83d28bd39a22df52ef4
https://github.com/llvm/llvm-project/commit/843498d4545b86fbd9c5b83d28bd39a22df52ef4
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
A lld/test/ELF/aarch64-thunk-bti-multipass.s
M lld/test/ELF/aarch64-thunk-bti.s
Log Message:
-----------
[LLD][AArch64] Add test for missing AArch64 BTI thunk (#116665)
A follow up to PR #116402 to add a regression test. The original change
fixed the reproducer but that was not suitable to use as a regression
test.
This test case will fail with a LLD prior to #116402.
The disassembly for the thunk that starts as a short thunk but is later
a long thunk isn't quite right. It is missing a $d mapping symbol. I
think this can be fixed, but I've not done that in this patch to keep it
test only. It is not a regression introduced in #116402.
I've also removed a spurious --threads=1 I noticed in the original test
aarch64-thunk-bti.s
Commit: 7dcefb37a42e61ec6763f0c1e48a7a2e8ea2f6b1
https://github.com/llvm/llvm-project/commit/7dcefb37a42e61ec6763f0c1e48a7a2e8ea2f6b1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86] Tidyup up AVX512 FPCLASS instruction naming (#116661)
FPCLASS is a unary instruction with an immediate operand - update the naming to match similar instructions (e.g. VPSHUFD) by only using the source reg/mem and immediate in the instruction name
Commit: 129a1a27da34eab1e358f4a403f05e8efe44c586
https://github.com/llvm/llvm-project/commit/129a1a27da34eab1e358f4a403f05e8efe44c586
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
R clang/tools/amdgpu-arch/AMDGPUArchByHSA.cpp
A clang/tools/amdgpu-arch/AMDGPUArchByKFD.cpp
M clang/tools/amdgpu-arch/CMakeLists.txt
Log Message:
-----------
[amdgpu-arch] Replace use of HSA with reading sysfs directly (#116651)
Summary:
For Linux systems, we currently use the HSA library to determine the
installed GPUs. However, this isn't really necessary and adds a
dependency on the HSA runtime as well as a lot of overhead. Instead,
this patch uses the `sysfs` interface exposed by `amdkfd` to do this
directly.
Commit: cac6f2114974ca57e34600e21ae8df063c7edc10
https://github.com/llvm/llvm-project/commit/cac6f2114974ca57e34600e21ae8df063c7edc10
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/unique-dep-matrix.ll
Log Message:
-----------
[LoopInterchange] Make the entries of the Dependency Matrix unique (#116195)
The entries in the dependency matrix can contain a lot of duplicates,
which is unnecessary and results in more checks that we can avoid, and
this patch adds that.
Commit: 8a6a76b1e122536858531a8612cbbe6869803393
https://github.com/llvm/llvm-project/commit/8a6a76b1e122536858531a8612cbbe6869803393
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
Log Message:
-----------
[clangd] Let DefineOutline tweak handle member function templates (#112345)
Commit: b24acc06e1d465b3e3e4e28515dd437f6a7454f2
https://github.com/llvm/llvm-project/commit/b24acc06e1d465b3e3e4e28515dd437f6a7454f2
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
A flang/test/Fir/target-rewrite-integer-loongarch64.fir
Log Message:
-----------
[Flang][LoongArch] Add sign extension for i32 arguments and returns in function signatures. (#116146)
In loongarch64 LP64D ABI, `unsigned 32-bit` types, such as unsigned int,
are stored in general-purpose registers as proper sign extensions of
their 32-bit values. Therefore, Flang also follows it if a function
needs to be interoperable with C.
Reference:
https://github.com/loongson/la-abi-specs/blob/release/lapcs.adoc#Fundamental-types
Commit: a59976bea8ad76f18119a11391dc8ba3e6ba07d5
https://github.com/llvm/llvm-project/commit/a59976bea8ad76f18119a11391dc8ba3e6ba07d5
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
Log Message:
-----------
[InstCombine] Drop noundef attributes in `foldCttzCtlz` (#116718)
Closes https://github.com/llvm/llvm-project/issues/112068.
Commit: 42ed7757835122a63477b5783215e1100cd0b709
https://github.com/llvm/llvm-project/commit/42ed7757835122a63477b5783215e1100cd0b709
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstSimplify/logic-of-fcmps.ll
Log Message:
-----------
[InstSimplify] Generalize `simplifyAndOrOfFCmps` to handle fabs (#116590)
This patch generalizes https://github.com/llvm/llvm-project/issues/81027
to handle pattern `and/or (fcmp ord/uno X, 0), (fcmp pred fabs(X), Y)`.
Alive2: https://alive2.llvm.org/ce/z/tsgUrz
The correctness is straightforward because `fcmp ord/uno X, 0.0` is
equivalent to `fcmp ord/uno fabs(X), 0.0`. We may generalize it to
handle fneg as well.
Address comment
https://github.com/llvm/llvm-project/pull/116065#pullrequestreview-2434796846
Commit: 55fad5e980efbcc4a581057c558fedaadf91e877
https://github.com/llvm/llvm-project/commit/55fad5e980efbcc4a581057c558fedaadf91e877
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/tools/amdgpu-arch/AMDGPUArchByKFD.cpp
Log Message:
-----------
[amdgpu-arch] Fix unused StringRef result
Commit: 12180717cb1f94741c1cc63a9684aa20af7b6140
https://github.com/llvm/llvm-project/commit/12180717cb1f94741c1cc63a9684aa20af7b6140
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[NFC][LoopVectorize] Introduce new getEstimatedRuntimeVF function (#116247)
There are lots of places where we try to estimate the runtime
vectorisation factor based on the getVScaleForTuning TTI hook.
I've added a new getEstimatedRuntimeVF function and taught
several places in the vectoriser to use this new function.
Commit: c4030c896de00efa5eb2f79bba7902c5198ba893
https://github.com/llvm/llvm-project/commit/c4030c896de00efa5eb2f79bba7902c5198ba893
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
Log Message:
-----------
[RISCV] Fix FP64 DinX R Regclass (#116688)
This was a typo in llvm/llvm-project#112983 that didn't cause build
failures but is still wrong.
Commit: b03a747fc0fc27ddcad3b50f2117d8150ee262f1
https://github.com/llvm/llvm-project/commit/b03a747fc0fc27ddcad3b50f2117d8150ee262f1
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in reduce mul function. (#116626)
Part of #51787.
Follow up of #116243.
This patch adds constexpr support for the built-in reduce mul function.
Commit: 2153672ba32741de19a063ed26a2a5ed4b1c4b59
https://github.com/llvm/llvm-project/commit/2153672ba32741de19a063ed26a2a5ed4b1c4b59
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/CompilationInterfaces.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
Log Message:
-----------
[MLIR] Add callback functions for ModuleToObject (#116007)
In ModuleToObject flow, users may want to add some callback functions
invoked with LLVM IR/ISA for debugging or other purposes.
Commit: 01a1ca72e86e293822dedb7fb1bd6f2095f2dbe4
https://github.com/llvm/llvm-project/commit/01a1ca72e86e293822dedb7fb1bd6f2095f2dbe4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libcxx/test/std/utilities/utility/pairs/pairs.pair/ctor.default.pass.cpp
Log Message:
-----------
[libc++][NFC] Format a pait test
I'll be modifying this test in a future PR.
Commit: 4f0403fe96c0e93a1e75cbca6077c46ea3a5aad8
https://github.com/llvm/llvm-project/commit/4f0403fe96c0e93a1e75cbca6077c46ea3a5aad8
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/sinksplat.ll
Log Message:
-----------
[CodeGen][AArch64] Sink splat operands of FMul instructions (#116222)
Sink shuffle operands of FMul instructions if these are splats, as we
can generate lane-indexed variants for these.
Commit: 75a04c656061fb72c9259c4ae5fb8e41c396dd65
https://github.com/llvm/llvm-project/commit/75a04c656061fb72c9259c4ae5fb8e41c396dd65
Author: WÁNG Xuěruì <git at xen0n.name>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
Log Message:
-----------
[LoongArch][NFC] Fix the operand constraint of AMCAS instructions (#114508)
The `rd` operand of AMCAS instructions is both read and written, because
of the nature of compare-and-swap operations, but currently it is not
declared as such. Fix it for upcoming codegen enablement changes. In
order to do that, a piece of LoongArchAsmParser logic that relied on
TableGen-erated enum variants being ordered in a specific way needs
updating; this will be addressed in a following refactor. No functional
change intended.
While at it, restore vertical alignment for the definition lines.
Suggested-by: tangaac <tangyan01 at loongson.cn>
Link:
https://github.com/llvm/llvm-project/pull/114398#discussion_r1825362676
Commit: 9e0ea8c8816d9f5837ad3357be32dddce28c7fb1
https://github.com/llvm/llvm-project/commit/9e0ea8c8816d9f5837ad3357be32dddce28c7fb1
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
Log Message:
-----------
[InstCombine] Add extra test for preserving !llvm.access.group
Add variant with different metadata on all loads, for
https://github.com/llvm/llvm-project/pull/115868
Commit: c727b48287cc96888f9e262f23d53cf635cf3b3d
https://github.com/llvm/llvm-project/commit/c727b48287cc96888f9e262f23d53cf635cf3b3d
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/test/CodeGen/LoongArch/lsx/pr116008.ll
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
[SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075)
On loongarch64 with lsx extension, we select `VBITREV_W` for `v4i32 (xor
X, (shl splat(1), Y))`:
https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td#L1583-L1584
And `vsplat_imm_eq_1` is defined as:
https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td#L77-L87
For the `(bitconvert (v4i32 (build_vector)))` case, the pattern is
expected to be:
```
PATTERN: (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, (shl:{ *:[v4i32] } (bitconvert:{ *:[v4i32] } (build_vector:{ *:[v4i32] }))<<P:Predicate_vsplat_imm_eq_1>>, v4i32:{ *:[v4i32] }:$vk))
RESULT: (VBITREV_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, v4i32:{ *:[v4i32] }:$vk)
```
However, `simplifyTree` drops the `bitconvert` node and its predicates:
https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp#L3036-L3062
Then llvm will match `vsplat_imm_eq_1` for any v4i32 splats and cause a
miscompilation:
```
PATTERN: (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, (shl:{ *:[v4i32] } (build_vector:{ *:[v4i32] }), v4i32:{ *:[v4i32] }:$vk))
RESULT: (VBITREV_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, v4i32:{ *:[v4i32] }:$vk)
```
This patch adds additional checks for predicates associated with the
trivial bitconvert node. Unused patterns in the LoongArch target are
also removed.
Fixes https://github.com/llvm/llvm-project/issues/116008.
Commit: 681939e1545193b428a5f59175017c1c3741ea32
https://github.com/llvm/llvm-project/commit/681939e1545193b428a5f59175017c1c3741ea32
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/select-dependence.ll
Log Message:
-----------
[LAA] Add phi test variant for cross-iteration dependence (NFC)
Commit: 4728ac750295af12ba484ef4b7df4f7c4893eb4c
https://github.com/llvm/llvm-project/commit/4728ac750295af12ba484ef4b7df4f7c4893eb4c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/COFF/DLL.cpp
Log Message:
-----------
[LLD][COFF][NFC] Always align null chunks (#116677)
Currently, null chunks always follow other aligned chunks, so this patch
is NFC. However, it will become observable once support for ARM64X
imports is added. The import tables are shared between the native and EC
views. They are usually very similar, but in cases where they differ,
ARM64X relocations handle the discrepancies. If a DLL is only imported
by EC code, the native view will see it as importing zero functions from
this DLL (with ARM64X relocations replacing those null chunks with
actual imports). In this scenario, the null chunks may appear as the
very first chunks, meaning there is nothing else forcing their
alignment.
Commit: ee4fb3a8761b0abe231a8fdc127cd668cd9478f7
https://github.com/llvm/llvm-project/commit/ee4fb3a8761b0abe231a8fdc127cd668cd9478f7
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/docs/HowToAddABuilder.rst
Log Message:
-----------
[llvm][docs] Correct setence in How To Add A Builder
Looks like a few different phrasings got mashed up together.
Commit: a8744066e9ef252b687c1206ccbd1a6e3ae1c890
https://github.com/llvm/llvm-project/commit/a8744066e9ef252b687c1206ccbd1a6e3ae1c890
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Interpreter/PartialTranslationUnit.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
[clang-repl] Include consistency using the default clang actions. (#116610)
This patch improves the code reuse of the actions system and adds
several improvements for easier debugging via clang-repl
--debug-only=clang-repl.
The change inimproves the consistency of the TUKind when actions are
handled within a WrapperFrontendAction. In this case instead of falling
back to default TU_Complete, we forward to the TUKind of the ASTContext
which presumably was created by the intended action. This enables the
incremental infrastructure to reuse code.
This patch also clones the first llvm::Module because the first PTU now
can come from -include A.h and the presumption of llvm::Module being
empty does not hold. The changes are a first step to fix the issues with
`clang-repl --cuda`.
Commit: edf56f1fa27dce36c2b537290c26fec1af1a1140
https://github.com/llvm/llvm-project/commit/edf56f1fa27dce36c2b537290c26fec1af1a1140
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
A llvm/test/Transforms/LoopInterchange/call-instructions-remarks.ll
M llvm/test/Transforms/LoopInterchange/call-instructions.ll
A llvm/test/Transforms/LoopInterchange/inner-indvar-depend-on-outer-indvar-remark.ll
M llvm/test/Transforms/LoopInterchange/inner-indvar-depend-on-outer-indvar.ll
M llvm/test/Transforms/LoopInterchange/innermost-latch-uses-values-in-middle-header.ll
M llvm/test/Transforms/LoopInterchange/interchange-flow-dep-outer.ll
M llvm/test/Transforms/LoopInterchange/interchange-no-deps.ll
M llvm/test/Transforms/LoopInterchange/interchanged-loop-nest-3.ll
M llvm/test/Transforms/LoopInterchange/not-interchanged-dependencies-1.ll
M llvm/test/Transforms/LoopInterchange/not-interchanged-loop-nest-3.ll
M llvm/test/Transforms/LoopInterchange/not-interchanged-tightly-nested.ll
Log Message:
-----------
[LoopInterchange] Don't rely on ASSERTS build for tests. NFC. (#116780)
A lot of interchange tests unnecessary relied on a build with ASSERTS
enabled. Instead, simply check the IR output for both negative and
positive tests so that we don't rely on debug messages. This increases
test coverage as these tests will now also run with non-assert builds.
For a couple of files keeping some of the debug tests was useful, so
separated out them out and moved them to a similarly named *-remarks.ll
file.
Commit: f69646e51c61a6f3b7e1bc5c1df7d720026edfde
https://github.com/llvm/llvm-project/commit/f69646e51c61a6f3b7e1bc5c1df7d720026edfde
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.td
Log Message:
-----------
[XCore] Pattern match LADD/LSUB/LMUL/MACCU/MACCS/CRC8 (#116245)
Commit: bdf00e2216280edef1ec91ccc07987db92197b59
https://github.com/llvm/llvm-project/commit/bdf00e2216280edef1ec91ccc07987db92197b59
Author: Yadong Chen <cyd.matt at qq.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir
M mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/abi-load-store.mlir
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
M mlir/test/Dialect/SPIRV/Transforms/inlining.mlir
M mlir/test/Dialect/SPIRV/Transforms/layout-decoration.mlir
M mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir
M mlir/test/Target/SPIRV/array-two-step-roundtrip.mlir
M mlir/test/Target/SPIRV/array.mlir
M mlir/test/Target/SPIRV/debug.mlir
M mlir/test/Target/SPIRV/global-variable.mlir
M mlir/test/Target/SPIRV/loop.mlir
M mlir/test/Target/SPIRV/matrix.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/Target/SPIRV/physical-storage-buffer.mlir
M mlir/test/Target/SPIRV/undef.mlir
Log Message:
-----------
[mlir][spirv] Use assemblyFormat to define AccessChainOp assembly (#116545)
see #73359
Declarative assemblyFormat ODS is more concise and requires less
boilerplate than filling out cpp interfaces.
Changes:
- updates the AccessChainOp defined in SPIRVMemoryOps.td to use
assemblyFormat.
- Removes part print/parse from MemoryOps.cpp which is now generated by
assemblyFormat
- Updates tests to updated format
Commit: 03d8831fa8ef5b7e32172c718b550a454645faea
https://github.com/llvm/llvm-project/commit/03d8831fa8ef5b7e32172c718b550a454645faea
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/ptrmask.ll
Log Message:
-----------
[InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794)
Closes https://github.com/llvm/llvm-project/issues/116775.
Commit: abac5be673a2053cceab8ce25009722e45021b9f
https://github.com/llvm/llvm-project/commit/abac5be673a2053cceab8ce25009722e45021b9f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/conditional-variable-length-signext-after-high-bit-extract.ll
Log Message:
-----------
[InstCombine] Fix APInt ctor assertion
The (extended) bit width might not fit into the (non-extended)
type, resulting in an incorrect truncation of the compared value.
Fix this by using m_SpecificInt(), which is both simpler and
handles this correctly.
Fixes the assertion failure reported in:
https://github.com/llvm/llvm-project/pull/114539#issuecomment-2485799395
Commit: 26a89d2d0d73bc1ea4869c3409ce15059e4cae8e
https://github.com/llvm/llvm-project/commit/26a89d2d0d73bc1ea4869c3409ce15059e4cae8e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
Log Message:
-----------
[InstCombine] Make access.group metadata tags distinct in test.
Make access.group metadata tags used in b56e03fccd distinct.
Commit: af41c55673ab4342310f19bd2ef506803e9dc91c
https://github.com/llvm/llvm-project/commit/af41c55673ab4342310f19bd2ef506803e9dc91c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/CompilationInterfaces.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
Log Message:
-----------
Revert "[MLIR] Add callback functions for ModuleToObject" (#116811)
Reverts llvm/llvm-project#116007
Bot is broken.
Commit: 27dcae53eb9ea7b4d722d650e63567ca54e12d7d
https://github.com/llvm/llvm-project/commit/27dcae53eb9ea7b4d722d650e63567ca54e12d7d
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
[lldb] Convert file address to load address when reading memory for DW_OP_piece (#116411)
When parsing an optimized value and reading a piece from a file address,
LLDB tries to read the data from memory using that address.
This patch converts file address to load address before reading the
memory.
Fixes #111313
Fixes #97484
Commit: aff98e4be05a1060e489ce62a88ee0ff365e571a
https://github.com/llvm/llvm-project/commit/aff98e4be05a1060e489ce62a88ee0ff365e571a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMScheduleM7.td
M llvm/lib/Target/ARM/ARMScheduleM85.td
M llvm/test/CodeGen/ARM/urem-seteq-illegal-types.ll
Log Message:
-----------
[ARM] Stop gluing 1-bit shifts (#116547)
1. When two (or more) nodes are glued, DAG scheduler will always
schedule them as one piece, i.e. it will not allow any instructions to
be scheduled between them. It does so because if nodes are glued this
usually means that there is an implicit register dependency between
them, and an intervening node could clobber this physical register. When
emitting such nodes into machine IR, they will also be stuck together,
e.g.:
```
%9:gpr = MOVsrl_glue killed %8, implicit-def $cpsr
%10:gpr = RRX %3, implicit $cpsr
```
2. If a node has Glue result, SelectionDAG will not try to CSE this
node. If it did, it would break the implicit physical register
dependency. In practice this means that if a node with Glue result has
multiple uses, it has to be duplicated before each use. This the reason
for `ARMTargetLowering::duplicateCmp` to exist.
When using normal data dependency, dependent nodes can freely be
scheduled around. If there is a physical register dependency between
nodes, the physical register will be copied to/from a virtual register,
allowing other nodes to intervene between them. The resulting machine IR
might look like this:
```
%9:gpr = LSRs1 killed %8, implicit-def $cpsr
%10:gpr = COPY $cpsr
%11:gpr = ORRrsi killed %9, %3, 242, 14 /* CC::al */, $noreg, $noreg
%12:gpr = BICri killed %11, -2147483648, 14 /* CC::al */, $noreg, $noreg
$cpsr = COPY %10
%13:gpr = RRX %3, implicit $cpsr
```
The two copies are likely to be eliminated by register coalescer, given
that there are no instructions between them that clobber this physical
register. If the copies are unwanted in the first place (they could be
expensive or impossible), DAG scheduler will try to avoid inserting them
wherever possible, and the resulting machine IR will look like this:
```
%9:gpr = LSRs1 killed %8, implicit-def $cpsr
%10:gpr = ORRrsi killed %9, %3, 242, 14 /* CC::al */, $noreg, $noreg
%11:gpr = BICri killed %10, -2147483648, 14 /* CC::al */, $noreg, $noreg
%12:gpr = RRX %3, implicit $cpsr
```
On ARM, arithmetic operations and LSLS already use the new data flow
approach. This patch extends it to include 1-bit shifts.
Pull Request: https://github.com/llvm/llvm-project/pull/116547
Commit: 8e4423eb0888e5fe381a23ec1fa6969f2d096ed1
https://github.com/llvm/llvm-project/commit/8e4423eb0888e5fe381a23ec1fa6969f2d096ed1
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
A llvm/test/CodeGen/PowerPC/global-merge-aix-sections.ll
Log Message:
-----------
[AsmPrinter] Fix handling in emitGlobalConstantImpl for AIX (#116255)
When GlobalMerge creates a MergedGlobal of statics all initialized to
zero, emitGlobalConstantImpl sees a ConstantAggregateZero. This results
in just emitting zeros followed by labels for the aliases. We need to
handle it more like how emitGlobalConstantStruct does by emitting each
global inside the aggregate.
---------
Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
Commit: b0afa6bab9581abc91f23c854b3bb45095cbb057
https://github.com/llvm/llvm-project/commit/b0afa6bab9581abc91f23c854b3bb45095cbb057
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[clang] Change some placeholders from undef to poison [NFC]
Commit: 64e3466fd09ec0b02f27ec15a176611fe65ed961
https://github.com/llvm/llvm-project/commit/64e3466fd09ec0b02f27ec15a176611fe65ed961
Author: Alexey Karyakin <akaryaki at quicinc.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
M lld/test/ELF/hexagon-jump-error.s
M lld/test/ELF/hexagon.s
Log Message:
-----------
[lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925)
Range checks for R_HEX_B22_PCREL did not account for the fact that
offset is measured in instructions, not bytes.
Add a test for all range-checked relocations.
Commit: de6d1683d4163a384ce529bf9bd70bb9bcd16a41
https://github.com/llvm/llvm-project/commit/de6d1683d4163a384ce529bf9bd70bb9bcd16a41
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
R lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
Revert "[lldb] Convert file address to load address when reading memory for DW_OP_piece" (#116824)
Reverts llvm/llvm-project#116411
Commit: 21fc36bb193740a4e79e22a8d04fea09d394d27c
https://github.com/llvm/llvm-project/commit/21fc36bb193740a4e79e22a8d04fea09d394d27c
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
Log Message:
-----------
Revert "[FunctionAttrs] Add the "initializes" attribute inference" (#116825)
Reverts llvm/llvm-project#97373
clang tests fail
Commit: b3995aa338a2837626d31ae8fffc340d95b888ca
https://github.com/llvm/llvm-project/commit/b3995aa338a2837626d31ae8fffc340d95b888ca
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-cse.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
[AMDGPU] Decrease default NSA threshold from 3 to 2 (#116624)
In graphics shaders it is better overall to use NSA encoding for IMAGE
instructions, because the benefit of less constrained register
allocation outweighs the cost of larger encoding. In particular NSA form
often avoids the need for extra V_MOV_B32 instructions between IMAGE
instructions, which can allow the IMAGE instructions to be claused.
Note that in GFX12 there is no longer a bit in the encoding to choose
between NSA and non-NSA forms, so this only affects GFX10 and GFX11.
Commit: 03506bc0a99fd53d0f4e3d0bd77eb2f7bad96102
https://github.com/llvm/llvm-project/commit/03506bc0a99fd53d0f4e3d0bd77eb2f7bad96102
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/TextAPI/InterfaceFile.cpp
M llvm/unittests/TextAPI/TextStubV5Tests.cpp
Log Message:
-----------
[TextAPI] Add missing attribute to remove/merge/extract operations (#116729)
Commit: 48591953e97b9ecf32e60fe0233ca0ba2765184e
https://github.com/llvm/llvm-project/commit/48591953e97b9ecf32e60fe0233ca0ba2765184e
Author: Kai Luo <gluokai at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
A llvm/test/tools/llvm-mca/ARM/m4-ldr-str-w.s
Log Message:
-----------
[Thumb2][ARMAsmParser] Fix processing of `t2{LDR,STR}{*}_{PRE,POST}_imm` when changing to its concrete form (#116757)
`t2{LDR,STR}{*}_{PRE,POST}_imm` is pseudo instruction and is expected to
be `t2{LDR,STR}{*}_{PRE,POST}`. During building the new MCInst of
`t2{LDR,STR}{*}_{PRE,POST}`, the order of operands looks incorrect.
Fixes https://github.com/llvm/llvm-project/issues/97020.
---------
Co-authored-by: Kai Luo <luokai at vivo.com>
Commit: 30fad6a97611ac397bdaa429730851f53752d013
https://github.com/llvm/llvm-project/commit/30fad6a97611ac397bdaa429730851f53752d013
Author: Aaron Puchert <aaron.puchert at sap.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ThreadSafetyAnalysis.rst
Log Message:
-----------
Thread safety analysis: Implement MutexLocker factory functions in documentation
We skipped adding definitions in 54bfd0484615 because we'd emit false
positive warnings on the closing braces. But these have been fixed in
commit e64ef634bbd9.
Commit: 0d9dc421143a0acd414a23f343b555c965a471f1
https://github.com/llvm/llvm-project/commit/0d9dc421143a0acd414a23f343b555c965a471f1
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/test/CAPI/execution_engine.c
M mlir/test/mlir-cpu-runner/simple.mlir
M mlir/unittests/ExecutionEngine/Invoke.cpp
Log Message:
-----------
[MLIR] Add SystemZ arg extensions for some tests (#116314)
The SystemZ ABI requires that i32 values should be extended when passed
between functions.
This patch fixes some tests that were lacking this, either by adding
some SystemZ specific inlinings of test functions or by disabling the
verification of this with the CL option controlling this.
Fixes #115564
Commit: d37554b69b414ee00eacfd35eaa2e051b1ade2d7
https://github.com/llvm/llvm-project/commit/d37554b69b414ee00eacfd35eaa2e051b1ade2d7
Author: Benson Chu <bensonchu457 at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
Log Message:
-----------
[ARM] Specifically delineate between different GPRCS2 positions
Currently, the relative position of GPRCS2 (with respect to other
instructions in the prologue of a function) can be different depending
on the type of ARMSubtarget::PushPopSplitVariant.
When the PushPopSpiltVariant is SplitR11WindowsSEH, GPRCS2 comes
after both GPRCS1 and DPRCS2:
GPRCS1
DPRCS1
GPRCS2
However, in all other cases, GPRCS2 comes before DPRCS1, like so:
GPRCS1
GPRCS2
DPRCS1
This makes the MI walking code in ARMFrameLowering::emitPrologue a bit
confusing. If GPRCS2Size is non-zero, we also have to check the
PushPopSplitVariant to know if we will encounter the DPRCS1 push
instruction first or the GPRCS2 push instruction first.
This commit changes to SplitR11WindowsSEH such that the spill area is
as follows:
GPRCS1
DPRCS1
GPRCS3
This disambiguates a lot of the ARMFrameLowering.cpp MI traversal
code.
Commit: 1bfcf89107349b03ac8ab113387ced0deef4fc4c
https://github.com/llvm/llvm-project/commit/1bfcf89107349b03ac8ab113387ced0deef4fc4c
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] port a8744066e9ef252b687c1206ccbd1a6e3ae1c890
Commit: 8b2dff960d9d987c583c3a6d5729f01d101dc401
https://github.com/llvm/llvm-project/commit/8b2dff960d9d987c583c3a6d5729f01d101dc401
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
Log Message:
-----------
[lldb] Fix a positioning bug in diagnostics output (#116711)
The old code did not take the indentation into account.
Commit: 3e552ed58980d240993d7e937dd38c404c03ed66
https://github.com/llvm/llvm-project/commit/3e552ed58980d240993d7e937dd38c404c03ed66
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Add release notes for LLDB inline diagnostics (#116841)
Commit: 6b4f67545d87d5305cbbc20a678fb97ede995579
https://github.com/llvm/llvm-project/commit/6b4f67545d87d5305cbbc20a678fb97ede995579
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
Log Message:
-----------
[lldb] Improve rendering of inline diagnostics on the same column (#116727)
depends on https://github.com/llvm/llvm-project/pull/116711
[lldb] Improve rendering of inline diagnostics on the same column by
fixing the indentation and printing these annotations in the original
order.
Before
a+b+c;
^ ^ ^
| | error: 3
| |note: 2b
| error: 2a
error: 1
After
a+b+c;
^ ^ ^
| | error: 3
| error: 2a
| note: 2b
error: 1
Commit: 0611a668d1389c8573e83eeafa6d5f6172c4cbc2
https://github.com/llvm/llvm-project/commit/0611a668d1389c8573e83eeafa6d5f6172c4cbc2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
Log Message:
-----------
[ARM] Fix a warning
This patch fixes:
llvm/lib/Target/ARM/ARMFrameLowering.cpp:1404:39: error: unused
variable 'PushPopSplit' [-Werror,-Wunused-variable]
Commit: 197e0125c3ed991f11d97d27e529c02af06e9f37
https://github.com/llvm/llvm-project/commit/197e0125c3ed991f11d97d27e529c02af06e9f37
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libc/src/__support/OSUtil/gpu/exit.cpp
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_util.h
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdlib/gpu/abort.cpp
Log Message:
-----------
[libc] Replace usage of GPU helpers with ones from 'gpuintrin.h' (#116454)
Summary:
These are provided by a resource header now, cut these from the
dependencies and only provide the ones we use for RPC.
Commit: c84a99dfd391eb4d89aff8d6453016045098b444
https://github.com/llvm/llvm-project/commit/c84a99dfd391eb4d89aff8d6453016045098b444
Author: Michele Scandale <michele.scandale at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/unittests/Analysis/InlineAdvisorPlugin/InlineAdvisorPlugin.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
Log Message:
-----------
[InlineAdvisor] Update documentation for `PluginInlineAdvisorAnalysis` (NFC). (#116715)
This commit updates the documentation for `PluginInlineAdvisorAnalysis`
based on the feedback in PR#114615 suggesting that
`registerAnalysisRegistrationCallback` should be the preferred method to
register the plugin inline advisor analysis.
Commit: def22f4e718daa74c2d0c03a32e32d4913a46278
https://github.com/llvm/llvm-project/commit/def22f4e718daa74c2d0c03a32e32d4913a46278
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_client.h
M libc/src/__support/RPC/rpc_util.h
Log Message:
-----------
[libc] Pull last dependencies into rpc_util.h (#116693)
Summary:
Last bit in-place to remove the dependencies on LLVM libc headers. This
just pulls the `sleep_briefly`, `std::optinal` and `type_traits`
definitions into the
`rpc_util.h` header. This duplicates some code for now but will soon be
moved into the `include/rpc` directory. At that point I will remove all
the `LIBC_INLINE` and just make it `RPC_INLINE`. Internal use will then
have a wrapper to make it all LIBC namespaced, implementations will then
implement their own handling.
Commit: 39e65b87066f6de43b1c57ff08cb6ce95219ce15
https://github.com/llvm/llvm-project/commit/39e65b87066f6de43b1c57ff08cb6ce95219ce15
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512vl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vl.s
Log Message:
-----------
[llvm-mca][x86] Add AVX512 VMOVNTDQA instruction test coverage
Commit: 8bdf13b11638d2f3e6792a573fc2be830a03790a
https://github.com/llvm/llvm-project/commit/8bdf13b11638d2f3e6792a573fc2be830a03790a
Author: apple-fcloutier <75502309+apple-fcloutier at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Parse/ParseObjc.cpp
A clang/test/SemaObjC/method-param-named-id.m
Log Message:
-----------
[ObjC] Name lookup in methods shouldn't allow shadowing types (#116683)
Arguably as a bug, Clang has previously not mixed up Objective-C
parameter names with types. This allows developers to write parameter
names that _should_ shadow type names, but don't. For instance:
@interface Foo
-(void)foo:(int)id bar:(id)name; // OK
@end
Commit 97788089988a2ace63d717cadbcfe3443f380f9c changed the way that
parameters are parsed to bring it more in line with how C parameters are
parsed, but it breaks the example above. Given an expectation that the
change wouldn't introduce source breaks, this is not something we can go
forward with.
97788089988a2ace63d717cadbcfe3443f380f9c did this so that late-parsed
attributes could reference Objective-C parameters. This change buffers
Objective-C parameter info until after all parameters are parsed and
turns them into parameter declarations before realizing late-parsed
attributes instead.
Radar-ID: 139996306
Commit: 2186a008c98e8bb6738fe9120441d6bd15c272f3
https://github.com/llvm/llvm-project/commit/2186a008c98e8bb6738fe9120441d6bd15c272f3
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
Log Message:
-----------
[HLSL] Fix placement of `const` for resource operator[] (#116698)
We had an incorrect AST here - We want `const T &`, not `T &const`.
Commit: b28eebf9264a6b6843b15d4e17be70604f3e4ad8
https://github.com/llvm/llvm-project/commit/b28eebf9264a6b6843b15d4e17be70604f3e4ad8
Author: Yashas Andaluri <quic_yandalur at quicinc.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RDFGraph.cpp
A llvm/test/CodeGen/Hexagon/rdf-dce-double-cover.mir
Log Message:
-----------
[RDF] Fix cover check when linking refs to defs (#113888)
During RDF graph construction, linkRefUp method links a register ref to
its upward reaching defs until all RegUnits of the ref have been covered
by defs.
However, when a sub-register def covers some, but not all, of the
RegUnits of a previous super-register def, a super-register ref is not
linked to the super-register def.
This can result in certain super register defs being dead code
eliminated.
This patch fixes the cover check for a register ref. A def must be
skipped only when all RegUnits of that def have already been covered by
a previously seen def.
Commit: dd78d7c7be5b8948cf5841e8033e59adebf230ad
https://github.com/llvm/llvm-project/commit/dd78d7c7be5b8948cf5841e8033e59adebf230ad
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/Editline.h
M lldb/source/Host/common/Editline.cpp
A lldb/test/API/terminal/TestEditlineCompletions.py
Log Message:
-----------
[lldb] Improve editline completion formatting (#116456)
This patch improves the formatting of editline completions. The current
implementation is naive and doesn't account for the terminal width.
Concretely, the old implementation suffered from the following issues:
- We would unconditionally pad to the longest completion. If that
completion exceeds the width of the terminal, that would result in a lot
of superfluous white space and line wrapping.
- When printing the description, we wouldn't account for the presence of
newlines, and they would continue without leading padding.
The new code accounts for both. If the completion exceeds the available
terminal width, we show what fits on the current lined followed by
ellipsis. We also no longer pad beyond the length of the current line.
Finally, we print the description line by line, with the proper leading
padding. If a line of the description exceeds the available terminal
width, we print ellipsis and won't print the next line.
Before:
```
Available completions:
_regexp-attach -- Attach to process by ID or name.
_regexp-break -- Set a breakpoint using one of several shorthand
formats.
_regexp-bt -- Show backtrace of the current thread's call sta
ck. Any numeric argument displays at most that many frames. The argument 'al
l' displays all threads. Use 'settings set frame-format' to customize the pr
inting of individual frames and 'settings set thread-format' to customize th
e thread header. Frame recognizers may filter thelist. Use 'thread backtrace
-u (--unfiltered)' to see them all.
_regexp-display -- Evaluate an expression at every stop (see 'help
target stop-hook'.)
```
After:
```
Available completions:
_regexp-attach -- Attach to process by ID or name.
_regexp-break -- Set a breakpoint using one of several shorth...
_regexp-bt -- Show backtrace of the current thread's call ...
_regexp-display -- Evaluate an expression at every stop (see 'h...
```
rdar://135818198
Commit: 61057b0f6fa8975c2ebc20ed339d59d28bbc6b03
https://github.com/llvm/llvm-project/commit/61057b0f6fa8975c2ebc20ed339d59d28bbc6b03
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/docs/use/links.rst
Log Message:
-----------
[lldb/www] Garbage collect old videos and add new ones (#116838)
Fixes #66476
Commit: 68b7ab127f580bdc422c0dde4bfcd4a2daaeb630
https://github.com/llvm/llvm-project/commit/68b7ab127f580bdc422c0dde4bfcd4a2daaeb630
Author: ddubov100 <155631080+ddubov100 at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Interfaces/TilingInterface.td
Log Message:
-----------
[MLIR] Fully qualify entities in the ::mlir namespace in TilingInterface.td. (#116765)
Adding mlir namespace to TilingInterface.td.
Otherwise it can't be used with dialects not nested under the mlir
namespace.
Commit: d8a1c6d72739c99f4b52a84e907b96b685b44c5e
https://github.com/llvm/llvm-project/commit/d8a1c6d72739c99f4b52a84e907b96b685b44c5e
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/test/Parser/cxx2c-delete-with-message.cpp
Log Message:
-----------
[Clang] update reasoned delete diagnostic kind to use Extension, making it pedantic only (#114713)
Fixes #109311
---
https://github.com/llvm/llvm-project/issues/109311#issuecomment-2422963686
Commit: 79682c4d57620e623fb30271cc8003d0c9e14a01
https://github.com/llvm/llvm-project/commit/79682c4d57620e623fb30271cc8003d0c9e14a01
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/bv-root-part-of-graph.ll
Log Message:
-----------
[SLP]Check if the buildvector root is not a part of the graph before deletion
If the buildvector root has no uses, it might be still needed as a part
of the graph, so need to check that it is not a part of the graph before
deletion.
Fixes #116852
Commit: eff60d83b0533954eda153fbbabb3e99d46bde94
https://github.com/llvm/llvm-project/commit/eff60d83b0533954eda153fbbabb3e99d46bde94
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Make extended loads and truncating stores with s16 register type and s8 memory type legal.
This addresses some failures I've seen in testing on real code.
Commit: ca79e126482084fe4681dd777fdd2948d4e7c81b
https://github.com/llvm/llvm-project/commit/ca79e126482084fe4681dd777fdd2948d4e7c81b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
[flang][cuda] Handle implicit global in cuf kernel and nested statement (#116846)
Update the implicit global detection by looking for them in the CUF
kernel and also update to a walk so nested `fir.address_of` in nested
statement are also accounted for.
Commit: 565a9ac7df3815ed038938942be4cf1471de4755
https://github.com/llvm/llvm-project/commit/565a9ac7df3815ed038938942be4cf1471de4755
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
Log Message:
-----------
[SPIR-V] Disable Machine Sink pass in SPIR-V Backend (#116060)
Some standard passes that optimize machine instructions in SSA form uses
MI.isPHI() that doesn't account for OpPhi in SPIR-V and so are able to
break the CFG. MachineSink is among such passes (see for example
https://github.com/llvm/llvm-project/blob/1884ffc41c20b1e08b30eef4e8ebbcc54543a139/llvm/lib/CodeGen/MachineSink.cpp#L630),
so this PR disables the pass to ensure correctness of the generated
code.
There is a reproducer of the issue that demonstrates how MachineSink is
able to generate an invalid code for the SPIR-V Backend
```
error: line 6837: OpPhi must appear within a non-entry block before all non-OpPhi instructions (except for OpLine, which can be mixed with OpPhi).
%z_fra_3_1 = OpPhi %uint %and187 %4250 %inc194 %4257 %uint_0 %4264
```
The reproducer is a part of SYCL end-to-end test suite
(https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/DeviceLib/imf_fp32_rounding_test.cpp).
At the moment it doesn't seem feasible to make it a part of the SPIR-V
Backend test suite due to a far too big size of the intermediate LLVM IR
that causes the problem.
Commit: 996553228f8b2f3219451a2514bd6f9380f13e28
https://github.com/llvm/llvm-project/commit/996553228f8b2f3219451a2514bd6f9380f13e28
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinarySection.h
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/eh-frame-overwrite.test
Log Message:
-----------
[BOLT] Overwrite .eh_frame and .gcc_except_table (#116755)
Under --use-old-text or --strict, we completely rewrite contents of EH
frames and exception tables sections. If new contents of either section
do not exceed the size of the original section, rewrite the section
in-place.
Commit: 5681f756c058204d7e41d065f91c5f3c36a434a7
https://github.com/llvm/llvm-project/commit/5681f756c058204d7e41d065f91c5f3c36a434a7
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/docs/use/links.rst
Log Message:
-----------
Fix broken link
Commit: 5b79152937722a5b80c92146b7c2453401739d5f
https://github.com/llvm/llvm-project/commit/5b79152937722a5b80c92146b7c2453401739d5f
Author: David Green <david.green at arm.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/phi.ll
Log Message:
-----------
[AArch64] Make sure there is test coverage for ptr phis. NFC
Commit: 174899f738b31216750ac59562475966b0b0be42
https://github.com/llvm/llvm-project/commit/174899f738b31216750ac59562475966b0b0be42
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Utility/DiagnosticsRendering.cpp
Log Message:
-----------
[lldb] Refactor helper by using iterators and in-place edits (NFC) (#116876)
Based on post-commit review feedback by Felipe Piovezan!
Commit: df13acf344a4233777789d0052b3d09bec6a5180
https://github.com/llvm/llvm-project/commit/df13acf344a4233777789d0052b3d09bec6a5180
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
A clang/test/SemaCUDA/spirv-attrs.cu
Log Message:
-----------
[CudaSPIRV] Add support for optional spir-v attributes (#116589)
Add support for optional spir-v attributes.
Test plan:
ninja check-all
Commit: 27046bad9751e85ba79db9248ff1f36e9d4d19eb
https://github.com/llvm/llvm-project/commit/27046bad9751e85ba79db9248ff1f36e9d4d19eb
Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
Log Message:
-----------
[mlir][XeGPU] Add a builder for xegpu.create_nd_tdesc op. (#116472)
The builder is needed to support dynamic meref as source operand in
xegpu.create_nd_tdesc op.
Commit: 47ef5c4b7f85bc1c8a859d721db9fd1dde7b8d8e
https://github.com/llvm/llvm-project/commit/47ef5c4b7f85bc1c8a859d721db9fd1dde7b8d8e
Author: annuasd <97934297+annuasd at users.noreply.github.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/DialectQuant.cpp
M mlir/python/mlir/_mlir_libs/_mlir/dialects/quant.pyi
M mlir/test/python/dialects/quant.py
Log Message:
-----------
[mlir][Bindings] Fix missing return value of functions and incorrect type hint in pyi. (#116731)
The zero points of UniformQuantizedPerAxisType should be List[int].
And there are two methods missing return value.
Co-authored-by: 牛奕博 <niuyibo at niuyibodeMacBook-Pro.local>
Commit: e3ff649abe975c04aa179622c6f4757e7aa66aaf
https://github.com/llvm/llvm-project/commit/e3ff649abe975c04aa179622c6f4757e7aa66aaf
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lldb/source/Target/Thread.cpp
Log Message:
-----------
[lldb] Fix comment in ~Thread (NFC) (#116850)
Commit: 1073e9049bb2483a6ff554cbc5da1c2fd0b9d75d
https://github.com/llvm/llvm-project/commit/1073e9049bb2483a6ff554cbc5da1c2fd0b9d75d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Clean up more real instruction predicate overrides (#116868)
In general real instructions should not have manually specified
predicates.
Commit: 1c1fbf51b5ec9657e5da7fa94ee892273255544a
https://github.com/llvm/llvm-project/commit/1c1fbf51b5ec9657e5da7fa94ee892273255544a
Author: Sam Clegg <sbc at chromium.org>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M lld/test/wasm/tls-non-shared-memory.s
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
Log Message:
-----------
[lld][WebAssembly] Fix TLS-relative relocations when linking without shared memory (#116136)
TLS-relative relocations always need to be relative the TLS section
since they get added to `__tls_base` at runtime.
Without this change the tls base address was effectively being added to
the final value twice in this case.
This only effects code the is built with `-pthread` but linked without
shared memory (i.e. without threads).
Fixes: https://github.com/emscripten-core/emscripten/issues/22880
Commit: 076513646cfd922b42ea0e87e2f07397a3ff41a4
https://github.com/llvm/llvm-project/commit/076513646cfd922b42ea0e87e2f07397a3ff41a4
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/InstCombine/intersect-accessgroup.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/PhaseOrdering/X86/preserve-access-group.ll
Log Message:
-----------
[Local] Only intersect llvm.access.group metadata if instr moves. (#115868)
Preserve llvm.access.group metadata on the replacement instruction, if
it does not move. In that case, the program would be UB, if the parallel
property encoded in the metadata does not hold.
This matches the LangRef recently updated in #116220
PR https://github.com/llvm/llvm-project/pull/115868
Commit: 4d7df40c084d9c551761027f873a59ac83cb398d
https://github.com/llvm/llvm-project/commit/4d7df40c084d9c551761027f873a59ac83cb398d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize constant src in memory (#116851)
When the src of the data transfer is a constant, it needs to be
materialized in memory to be able to perform a data transfer.
```
subroutine sub1()
real, device :: a(10)
integer :: I
do i = 5, 10
a(i) = -4.0
end do
end
```
Commit: 41c86ca714a68eea8c73cf57fba28718d466660b
https://github.com/llvm/llvm-project/commit/41c86ca714a68eea8c73cf57fba28718d466660b
Author: Petr Penzin <penzin.dev at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add TT-Ascalon-d8 processor (#115100)
Ascalon is an out-of-order CPU core from Tenstorrent. Overview:
https://tenstorrent.com/ip/tt-ascalon
Adding 8-wide version, -mcpu=tt-ascalon-d8. Scheduling model will be
added in a separate PR.
---------
Co-authored-by: Anton Blanchard <antonb at tenstorrent.com>
Commit: 012dd8be4b5a4c00deb22345c630990f160b3aa3
https://github.com/llvm/llvm-project/commit/012dd8be4b5a4c00deb22345c630990f160b3aa3
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/CMakeLists.txt
Log Message:
-----------
[libcxx] Passthrough the necessary CMake variables to benchmarks (#116644)
This addresses the issue uncovered by #115361. Previously, we weren't
building benchmarks in many cases due to the following block:
https://github.com/llvm/llvm-project/blob/e58949632e91477af58d983f3b66369e6a2c8233/libcxx/CMakeLists.txt#L162-L172
We need to passthrough the necessary variables into the benchmarks
subbuild and use correct syntax.
Commit: 7c41b5ccdcf0f5de1b9b254693635283faff3658
https://github.com/llvm/llvm-project/commit/7c41b5ccdcf0f5de1b9b254693635283faff3658
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.h
A compiler-rt/test/rtsan/report_error_summary.cpp
Log Message:
-----------
[rtsan] Add support for ReportErrorSummary (#116424)
Adding support for the extra SUMMARY line that is output by most
compilers. This also adds the ability for end-users to specify their own
handlers for reporting these errors (see the test).
Commit: 3c8818cf2deaa050817ecec1c99cf939295feced
https://github.com/llvm/llvm-project/commit/3c8818cf2deaa050817ecec1c99cf939295feced
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[rtsan] Add more file descriptor interceptors - dup*, lseek (#116853)
# Why we think these are real-time unsafe
They correspond directly to system calls in linux and OSX, they are
manipulating a shared resource, which likely takes some operating-system
synchronization.
Commit: 944478dd62a78f6bb43d4da210643affcc4584b6
https://github.com/llvm/llvm-project/commit/944478dd62a78f6bb43d4da210643affcc4584b6
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
A clang/tools/clang-shlib/simple_version_script.map.in
M llvm/CMakeLists.txt
Log Message:
-----------
Introduce symbol versioning for clang-cpp (#116556)
The situation that required symbol versions on the LLVM shared library
can also happen for clang-cpp, although it is less common: different
tools require different versions of the library, and through transitive
dependencies a process ends up with multiple copies of clang-cpp. This
causes havoc with ELF, because calls meant to go one version of the
library end up with another.
I've also considered introducing a symbol version globally, but for
example the clang (C) library and other targets outside of LLVM/Clang,
e.g. libc++, would not want that. So it's probably best if we keep it to
those libraries.
Commit: 3a63407686313f46f9abc664fd10b01f4359ee27
https://github.com/llvm/llvm-project/commit/3a63407686313f46f9abc664fd10b01f4359ee27
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__atomic/atomic.h
R libcxx/include/__atomic/atomic_base.h
M libcxx/include/atomic
M libcxx/include/barrier
M libcxx/include/latch
M libcxx/include/module.modulemap
M libcxx/include/semaphore
M libcxx/src/barrier.cpp
Log Message:
-----------
[libc++] Make __atomic_base into an implementation detail of std::atomic (#115764)
The __atomic_base base class is only useful to conditionalize the
operations we provide inside std::atomic. It shouldn't be used directly
from other places in the library which can use std::atomic directly
instead.
Since we've granularized our includes, using std::atomic directly should
not make much of a difference compile-time wise.
This patch starts using std::atomic directly from other classes like
std::barrier and std::latch. Changing this shouldn't be an ABI break
since both classes have the same size and layout.
The benefits of this patch are isolating other parts of the code base
from implementation details of std::atomic and simplifying the mental
model for std::atomic's layers of implementation by making it clear that
__atomic_base is only an implementation detail of std::atomic.
Commit: d8bd7f11c8c781646406e76731dd8d76ed5425dd
https://github.com/llvm/llvm-project/commit/d8bd7f11c8c781646406e76731dd8d76ed5425dd
Author: Kyle Wang <ec1wng at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir] Support ROCDL::ReadlaneOp (#116593)
Support ROCDL::ReadlaneOp to solve
https://github.com/ROCm/triton-internal/issues/411.
Commit: 581f755a2a22910da8a9a160c4ea5efeb43a40b4
https://github.com/llvm/llvm-project/commit/581f755a2a22910da8a9a160c4ea5efeb43a40b4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-19 (Tue, 19 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 3a6340768631
Commit: a993e6d3bf6cff3f16c0d508c9d0b407197f9009
https://github.com/llvm/llvm-project/commit/a993e6d3bf6cff3f16c0d508c9d0b407197f9009
Author: Necip Fazil Yildiran <necip at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
A .ci/generate_test_report.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
A .ci/requirements.txt
M .github/CODEOWNERS
M .github/new-issues-labeler.yml
M .github/new-prs-labeler.yml
M .github/workflows/commit-access-review.py
M .github/workflows/containers/github-action-ci/stage1.Dockerfile
M .github/workflows/libcxx-build-and-test.yaml
A .github/workflows/libcxx-build-containers.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/release-asset-audit.py
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries-save-stage/action.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-lit.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .gitignore
M bolt/include/bolt/Core/BinaryBasicBlock.h
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryData.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/DIEBuilder.h
M bolt/include/bolt/Core/Exceptions.h
M bolt/include/bolt/Core/FunctionLayout.h
M bolt/include/bolt/Core/MCPlusBuilder.h
A bolt/include/bolt/Passes/ContinuityStats.h
M bolt/include/bolt/Passes/LongJmp.h
M bolt/include/bolt/Profile/BoltAddressTranslation.h
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/include/bolt/Profile/ProfileYAMLMapping.h
M bolt/include/bolt/Profile/YAMLProfileReader.h
M bolt/include/bolt/Profile/YAMLProfileWriter.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/include/bolt/Utils/Utils.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Core/DIEBuilder.cpp
M bolt/lib/Core/Exceptions.cpp
M bolt/lib/Core/FunctionLayout.cpp
M bolt/lib/Core/HashUtilities.cpp
M bolt/lib/Passes/ADRRelaxationPass.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/CMakeLists.txt
A bolt/lib/Passes/ContinuityStats.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Passes/VeneerElimination.cpp
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Profile/YAMLProfileWriter.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/RuntimeLibs/InstrumentationRuntimeLibrary.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M bolt/lib/Utils/Utils.cpp
R bolt/test/AArch64/Inputs/iplt.ld
A bolt/test/AArch64/Inputs/spurious-marker-symbol.yaml
A bolt/test/AArch64/adr-relaxation.s
A bolt/test/AArch64/compact-code-model.s
M bolt/test/AArch64/constant_island_pie_update.s
R bolt/test/AArch64/ifunc.c
A bolt/test/AArch64/ifunc.test
A bolt/test/AArch64/split-funcs-lite.s
A bolt/test/AArch64/spurious-marker-symbol.test
M bolt/test/AArch64/update-weak-reference-symbol.s
A bolt/test/AArch64/veneer-lld-abs.s
A bolt/test/Inputs/ifunc.c
A bolt/test/Inputs/iplt.ld
A bolt/test/X86/callcont-fallthru.s
A bolt/test/X86/cfg-discontinuity-reporting.test
A bolt/test/X86/ifunc.test
M bolt/test/X86/log.test
A bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
A bolt/test/X86/match-blocks-with-pseudo-probes.test
M bolt/test/X86/match-functions-with-calls-as-anchors.test
M bolt/test/X86/pre-aggregated-perf.test
A bolt/test/X86/print-only-section.s
M bolt/test/X86/pseudoprobe-decoding-inline.test
M bolt/test/X86/pseudoprobe-decoding-noinline.test
M bolt/test/X86/reader-stale-yaml.test
A bolt/test/X86/yaml-unknown-keys.test
A bolt/test/eh-frame-hdr.test
A bolt/test/eh-frame-overwrite.test
M bolt/test/lit.local.cfg
A bolt/test/merge-fdata-uninitialized-header.test
M bolt/test/perf2bolt/lit.local.cfg
M bolt/test/perf2bolt/perf_test.test
M bolt/tools/driver/llvm-bolt.cpp
M bolt/tools/merge-fdata/merge-fdata.cpp
M bolt/unittests/Core/BinaryContext.cpp
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/CMakeLists.txt
M clang-tools-extra/CODE_OWNERS.TXT
M clang-tools-extra/clang-apply-replacements/CMakeLists.txt
M clang-tools-extra/clang-apply-replacements/lib/Tooling/ApplyReplacements.cpp
M clang-tools-extra/clang-change-namespace/CMakeLists.txt
M clang-tools-extra/clang-change-namespace/ChangeNamespace.cpp
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-include-fixer/CMakeLists.txt
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.cpp
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.h
M clang-tools-extra/clang-include-fixer/find-all-symbols/CMakeLists.txt
M clang-tools-extra/clang-include-fixer/plugin/CMakeLists.txt
M clang-tools-extra/clang-move/CMakeLists.txt
M clang-tools-extra/clang-move/HelperDeclRefGraph.cpp
M clang-tools-extra/clang-move/tool/ClangMove.cpp
M clang-tools-extra/clang-query/CMakeLists.txt
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/clang-query/QueryParser.cpp
M clang-tools-extra/clang-query/QuerySession.h
M clang-tools-extra/clang-reorder-fields/CMakeLists.txt
M clang-tools-extra/clang-tidy/CMakeLists.txt
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/ClangTidyModuleRegistry.h
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang-tools-extra/clang-tidy/abseil/CMakeLists.txt
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
M clang-tools-extra/clang-tidy/add_new_check.py
M clang-tools-extra/clang-tidy/altera/CMakeLists.txt
M clang-tools-extra/clang-tidy/altera/IdDependentBackwardBranchCheck.cpp
M clang-tools-extra/clang-tidy/android/CMakeLists.txt
M clang-tools-extra/clang-tidy/boost/CMakeLists.txt
M clang-tools-extra/clang-tidy/boost/UseRangesCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/BitwisePointerCastCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/BitwisePointerCastCheck.h
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/CastingThroughVoidCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/CrtpConstructorAccessibilityCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DanglingHandleCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ForwardDeclarationNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ForwardingReferenceOverloadCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.h
M clang-tools-extra/clang-tidy/bugprone/PosixReturnCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.h
A clang-tools-extra/clang-tidy/bugprone/TaggedUnionMemberCountCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/TaggedUnionMemberCountCheck.h
M clang-tools-extra/clang-tidy/bugprone/ThrowKeywordMissingCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.h
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cert/CMakeLists.txt
M clang-tools-extra/clang-tidy/cert/FloatLoopCounter.cpp
M clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt
M clang-tools-extra/clang-tidy/cppcoreguidelines/CMakeLists.txt
M clang-tools-extra/clang-tidy/cppcoreguidelines/InitVariablesCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeMemberInitCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeUnionAccessCheck.cpp
M clang-tools-extra/clang-tidy/darwin/CMakeLists.txt
M clang-tools-extra/clang-tidy/fuchsia/CMakeLists.txt
M clang-tools-extra/clang-tidy/google/CMakeLists.txt
M clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt
M clang-tools-extra/clang-tidy/linuxkernel/CMakeLists.txt
M clang-tools-extra/clang-tidy/llvm/CMakeLists.txt
M clang-tools-extra/clang-tidy/llvmlibc/CMakeLists.txt
M clang-tools-extra/clang-tidy/misc/CMakeLists.txt
M clang-tools-extra/clang-tidy/misc/ConfusableIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnconventionalAssignOperatorCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/modernize/AvoidCArraysCheck.cpp
M clang-tools-extra/clang-tidy/modernize/CMakeLists.txt
M clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
M clang-tools-extra/clang-tidy/modernize/LoopConvertUtils.cpp
M clang-tools-extra/clang-tidy/modernize/LoopConvertUtils.h
M clang-tools-extra/clang-tidy/modernize/MinMaxUseInitializerListCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseNullptrCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStartsEndsWithCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStartsEndsWithCheck.h
M clang-tools-extra/clang-tidy/modernize/UseStdFormatCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdFormatCheck.h
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.h
M clang-tools-extra/clang-tidy/mpi/CMakeLists.txt
M clang-tools-extra/clang-tidy/objc/CMakeLists.txt
M clang-tools-extra/clang-tidy/openmp/CMakeLists.txt
M clang-tools-extra/clang-tidy/performance/AvoidEndlCheck.cpp
M clang-tools-extra/clang-tidy/performance/CMakeLists.txt
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/plugin/CMakeLists.txt
M clang-tools-extra/clang-tidy/portability/CMakeLists.txt
M clang-tools-extra/clang-tidy/portability/PortabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/portability/TemplateVirtualMemberFunctionCheck.cpp
A clang-tools-extra/clang-tidy/portability/TemplateVirtualMemberFunctionCheck.h
M clang-tools-extra/clang-tidy/readability/AvoidUnconditionalPreprocessorIfCheck.cpp
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ContainerContainsCheck.cpp
M clang-tools-extra/clang-tidy/readability/ContainerContainsCheck.h
M clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp
M clang-tools-extra/clang-tidy/readability/FunctionCognitiveComplexityCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang-tools-extra/clang-tidy/rename_check.py
M clang-tools-extra/clang-tidy/tool/CMakeLists.txt
M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
M clang-tools-extra/clang-tidy/utils/CMakeLists.txt
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.h
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/clang-tidy/utils/FormatStringConverter.cpp
M clang-tools-extra/clang-tidy/utils/FormatStringConverter.h
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/clang-tidy/utils/Matchers.h
M clang-tools-extra/clang-tidy/zircon/CMakeLists.txt
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/CMakeLists.txt
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/CodeComplete.h
M clang-tools-extra/clangd/CollectMacros.cpp
M clang-tools-extra/clangd/CollectMacros.h
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/Diagnostics.cpp
M clang-tools-extra/clangd/DumpAST.cpp
M clang-tools-extra/clangd/Feature.cpp
M clang-tools-extra/clangd/FindSymbols.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/Headers.cpp
M clang-tools-extra/clangd/Hover.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ModulesBuilder.h
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
M clang-tools-extra/clangd/Quality.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/SemanticSelection.cpp
M clang-tools-extra/clangd/SourceCode.cpp
M clang-tools-extra/clangd/SystemIncludeExtractor.cpp
M clang-tools-extra/clangd/TidyFastChecks.inc
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/TidyProvider.h
M clang-tools-extra/clangd/URI.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/MemIndex.cpp
M clang-tools-extra/clangd/index/StdLib.cpp
M clang-tools-extra/clangd/index/Symbol.h
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/index/dex/Dex.cpp
M clang-tools-extra/clangd/index/remote/CMakeLists.txt
M clang-tools-extra/clangd/index/remote/marshalling/CMakeLists.txt
M clang-tools-extra/clangd/index/remote/unimplemented/CMakeLists.txt
M clang-tools-extra/clangd/refactor/Tweak.h
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
A clang-tools-extra/clangd/refactor/tweaks/SwapBinaryOperands.cpp
A clang-tools-extra/clangd/support/Bracket.cpp
A clang-tools-extra/clangd/support/Bracket.h
M clang-tools-extra/clangd/support/CMakeLists.txt
A clang-tools-extra/clangd/support/DirectiveTree.cpp
A clang-tools-extra/clangd/support/DirectiveTree.h
A clang-tools-extra/clangd/support/Lex.cpp
A clang-tools-extra/clangd/support/Token.cpp
A clang-tools-extra/clangd/support/Token.h
M clang-tools-extra/clangd/test/log.test
M clang-tools-extra/clangd/tool/CMakeLists.txt
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp
M clang-tools-extra/clangd/unittests/ClangdTests.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/clangd/unittests/ParsedASTTests.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/clangd/unittests/SerializationTests.cpp
M clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
M clang-tools-extra/clangd/unittests/TypeHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
A clang-tools-extra/clangd/unittests/tweaks/SwapBinaryOperandsTests.cpp
M clang-tools-extra/clangd/xpc/CMakeLists.txt
M clang-tools-extra/docs/ReleaseNotes.rst
R clang-tools-extra/docs/clang-rename.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
A clang-tools-extra/docs/clang-tidy/ExternalClang-TidyExamples.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/bitwise-pointer-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/casting-through-void.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/dangling-handle.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/nondeterministic-pointer-iteration-order.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/pointer-arithmetic-on-polymorphic-object.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/reserved-identifier.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/return-const-ref-from-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/sizeof-expression.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/tagged-union-member-count.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unsafe-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/arr39-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unconventional-assign-operator.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-c-arrays.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-starts-ends-with.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-format.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-print.rst
A clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-nested-conditional-operator.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
M clang-tools-extra/docs/clang-tidy/index.rst
M clang-tools-extra/docs/index.rst
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/Analysis.h
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/IncludeSpeller.h
M clang-tools-extra/include-cleaner/lib/Analysis.cpp
M clang-tools-extra/include-cleaner/lib/CMakeLists.txt
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
A clang-tools-extra/include-cleaner/test/tool-ignores-warnings.cpp
M clang-tools-extra/include-cleaner/test/tool.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang-tools-extra/include-cleaner/unittests/AnalysisTest.cpp
M clang-tools-extra/include-cleaner/unittests/FindHeadersTest.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
R clang-tools-extra/pseudo/CMakeLists.txt
R clang-tools-extra/pseudo/DesignNotes.md
R clang-tools-extra/pseudo/Disambiguation.md
R clang-tools-extra/pseudo/README.md
R clang-tools-extra/pseudo/benchmarks/Benchmark.cpp
R clang-tools-extra/pseudo/benchmarks/CMakeLists.txt
R clang-tools-extra/pseudo/fuzzer/CMakeLists.txt
R clang-tools-extra/pseudo/fuzzer/Fuzzer.cpp
R clang-tools-extra/pseudo/fuzzer/Main.cpp
R clang-tools-extra/pseudo/gen/CMakeLists.txt
R clang-tools-extra/pseudo/gen/Main.cpp
R clang-tools-extra/pseudo/include/CMakeLists.txt
R clang-tools-extra/pseudo/include/clang-pseudo/Bracket.h
R clang-tools-extra/pseudo/include/clang-pseudo/DirectiveTree.h
R clang-tools-extra/pseudo/include/clang-pseudo/Disambiguate.h
R clang-tools-extra/pseudo/include/clang-pseudo/Forest.h
R clang-tools-extra/pseudo/include/clang-pseudo/GLR.h
R clang-tools-extra/pseudo/include/clang-pseudo/Language.h
R clang-tools-extra/pseudo/include/clang-pseudo/Token.h
R clang-tools-extra/pseudo/include/clang-pseudo/cli/CLI.h
R clang-tools-extra/pseudo/include/clang-pseudo/cxx/CXX.h
R clang-tools-extra/pseudo/include/clang-pseudo/grammar/Grammar.h
R clang-tools-extra/pseudo/include/clang-pseudo/grammar/LRGraph.h
R clang-tools-extra/pseudo/include/clang-pseudo/grammar/LRTable.h
R clang-tools-extra/pseudo/lib/Bracket.cpp
R clang-tools-extra/pseudo/lib/CMakeLists.txt
R clang-tools-extra/pseudo/lib/DirectiveTree.cpp
R clang-tools-extra/pseudo/lib/Disambiguate.cpp
R clang-tools-extra/pseudo/lib/Forest.cpp
R clang-tools-extra/pseudo/lib/GLR.cpp
R clang-tools-extra/pseudo/lib/Lex.cpp
R clang-tools-extra/pseudo/lib/Token.cpp
R clang-tools-extra/pseudo/lib/cli/CLI.cpp
R clang-tools-extra/pseudo/lib/cli/CMakeLists.txt
R clang-tools-extra/pseudo/lib/cxx/CMakeLists.txt
R clang-tools-extra/pseudo/lib/cxx/CXX.cpp
R clang-tools-extra/pseudo/lib/cxx/cxx.bnf
R clang-tools-extra/pseudo/lib/grammar/CMakeLists.txt
R clang-tools-extra/pseudo/lib/grammar/Grammar.cpp
R clang-tools-extra/pseudo/lib/grammar/GrammarBNF.cpp
R clang-tools-extra/pseudo/lib/grammar/LRGraph.cpp
R clang-tools-extra/pseudo/lib/grammar/LRTable.cpp
R clang-tools-extra/pseudo/lib/grammar/LRTableBuild.cpp
R clang-tools-extra/pseudo/test/.clang-format
R clang-tools-extra/pseudo/test/CMakeLists.txt
R clang-tools-extra/pseudo/test/Unit/lit.cfg.py
R clang-tools-extra/pseudo/test/Unit/lit.site.cfg.py.in
R clang-tools-extra/pseudo/test/check-cxx-bnf.test
R clang-tools-extra/pseudo/test/crash/backslashes.c
R clang-tools-extra/pseudo/test/cxx/capture-list.cpp
R clang-tools-extra/pseudo/test/cxx/contextual-keywords.cpp
R clang-tools-extra/pseudo/test/cxx/dangling-else.cpp
R clang-tools-extra/pseudo/test/cxx/decl-specfier-seq.cpp
R clang-tools-extra/pseudo/test/cxx/declarator-function.cpp
R clang-tools-extra/pseudo/test/cxx/declarator-var.cpp
R clang-tools-extra/pseudo/test/cxx/declator-member-function.cpp
R clang-tools-extra/pseudo/test/cxx/empty-member-declaration.cpp
R clang-tools-extra/pseudo/test/cxx/empty-member-spec.cpp
R clang-tools-extra/pseudo/test/cxx/keyword.cpp
R clang-tools-extra/pseudo/test/cxx/literals.cpp
R clang-tools-extra/pseudo/test/cxx/mixed-designator.cpp
R clang-tools-extra/pseudo/test/cxx/nested-name-specifier.cpp
R clang-tools-extra/pseudo/test/cxx/parameter-decl-clause.cpp
R clang-tools-extra/pseudo/test/cxx/predefined-identifier.cpp
R clang-tools-extra/pseudo/test/cxx/recovery-func-parameters.cpp
R clang-tools-extra/pseudo/test/cxx/recovery-init-list.cpp
R clang-tools-extra/pseudo/test/cxx/structured-binding.cpp
R clang-tools-extra/pseudo/test/cxx/template-empty-type-parameter.cpp
R clang-tools-extra/pseudo/test/cxx/unsized-array.cpp
R clang-tools-extra/pseudo/test/fuzzer.cpp
R clang-tools-extra/pseudo/test/glr-variant-start.cpp
R clang-tools-extra/pseudo/test/glr.cpp
R clang-tools-extra/pseudo/test/html-forest.c
R clang-tools-extra/pseudo/test/lex.c
R clang-tools-extra/pseudo/test/lit.cfg.py
R clang-tools-extra/pseudo/test/lit.local.cfg
R clang-tools-extra/pseudo/test/lit.site.cfg.py.in
R clang-tools-extra/pseudo/test/lr-build-basic.test
R clang-tools-extra/pseudo/test/lr-build-conflicts.test
R clang-tools-extra/pseudo/test/strip-directives.c
R clang-tools-extra/pseudo/tool/CMakeLists.txt
R clang-tools-extra/pseudo/tool/ClangPseudo.cpp
R clang-tools-extra/pseudo/tool/HTMLForest.cpp
R clang-tools-extra/pseudo/tool/HTMLForest.css
R clang-tools-extra/pseudo/tool/HTMLForest.html
R clang-tools-extra/pseudo/tool/HTMLForest.js
R clang-tools-extra/pseudo/unittests/BracketTest.cpp
R clang-tools-extra/pseudo/unittests/CMakeLists.txt
R clang-tools-extra/pseudo/unittests/CXXTest.cpp
R clang-tools-extra/pseudo/unittests/DirectiveTreeTest.cpp
R clang-tools-extra/pseudo/unittests/DisambiguateTest.cpp
R clang-tools-extra/pseudo/unittests/ForestTest.cpp
R clang-tools-extra/pseudo/unittests/GLRTest.cpp
R clang-tools-extra/pseudo/unittests/GrammarTest.cpp
R clang-tools-extra/pseudo/unittests/LRTableTest.cpp
R clang-tools-extra/pseudo/unittests/TokenTest.cpp
M clang-tools-extra/test/CMakeLists.txt
R clang-tools-extra/test/clang-apply-replacements/ClangRenameClassReplacements.cpp
M clang-tools-extra/test/clang-query/invalid-command-line.cpp
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/inttypes.h
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/string
M clang-tools-extra/test/clang-tidy/checkers/altera/id-dependent-backward-branch.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_algorithm
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_c++config.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_initializer_list
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_iterator_base
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_map
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_set
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_stl_pair
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_type_traits
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_unordered_map
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_unordered_set
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_vector
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/unchecked-optional-access/bde/types/bdlb_nullablevalue.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/unchecked-optional-access/bde/types/bsl_optional.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/bitwise-pointer-cast-cxx20.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/bitwise-pointer-cast.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/casting-through-void.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/crtp-constructor-accessibility.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/forwarding-reference-overload.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/nondeterministic-pointer-iteration-order.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/posix-return.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/return-const-ref-from-parameter.cpp
R clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-2.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics-c11.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics-no-division.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-bad-config.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-is-disabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-is-enabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-prefixes-and-suffixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-prefixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-suffixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-strictmode-is-disabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-strictmode-is-enabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.m
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.mm
M clang-tools-extra/test/clang-tidy/checkers/bugprone/throw-keyword-missing.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unchecked-optional-access.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unsafe-functions-custom-regex.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unsafe-functions-custom.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unsafe-functions.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
M clang-tools-extra/test/clang-tidy/checkers/cert/flp30-c.c
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/init-variables.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-union-access.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/definitions-in-headers.hpp
A clang-tools-extra/test/clang-tidy/checkers/misc/unconventional-assign-operator-cxx23.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-func.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-var.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-c++20.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-ignores-main.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-ignores-strings.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-ignores-three-arg-main.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/loop-convert-basic.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/min-max-use-initializer-list.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-starts-ends-with.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-format.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/avoid-endl.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/move-const-arg.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param-crash.cpp
A clang-tools-extra/test/clang-tidy/checkers/portability/template-virtual-member-function.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/container-contains.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.c
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/function-cognitive-complexity.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.c
M clang-tools-extra/test/clang-tidy/infrastructure/invalid-command-line.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/nolint.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/nolintbeginend.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/nolintnextline.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/verify-config.cpp
M clang-tools-extra/unittests/clang-tidy/AddConstTest.cpp
M clang-tools-extra/unittests/clang-tidy/ClangTidyTest.h
M clang-tools-extra/unittests/clang-tidy/IncludeCleanerTest.cpp
M clang-tools-extra/unittests/clang-tidy/IncludeInserterTest.cpp
M clang-tools-extra/unittests/clang-tidy/NamespaceAliaserTest.cpp
M clang-tools-extra/unittests/clang-tidy/ReadabilityModuleTest.cpp
M clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp
M clang-tools-extra/unittests/clang-tidy/UsingInserterTest.cpp
M clang-tools-extra/unittests/include/common/VirtualFileHelper.h
M clang/CMakeLists.txt
R clang/CodeOwners.rst
A clang/Maintainers.rst
A clang/README.md
R clang/README.txt
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/CMakeLists.txt
M clang/bindings/python/tests/cindex/test_access_specifiers.py
M clang/bindings/python/tests/cindex/test_cdb.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/bindings/python/tests/cindex/test_comment.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/bindings/python/tests/cindex/test_cursor_kind.py
M clang/bindings/python/tests/cindex/test_diagnostics.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/bindings/python/tests/cindex/test_exception_specification_kind.py
M clang/bindings/python/tests/cindex/test_file.py
M clang/bindings/python/tests/cindex/test_index.py
M clang/bindings/python/tests/cindex/test_linkage.py
M clang/bindings/python/tests/cindex/test_location.py
M clang/bindings/python/tests/cindex/test_rewrite.py
M clang/bindings/python/tests/cindex/test_source_range.py
M clang/bindings/python/tests/cindex/test_tls_kind.py
M clang/bindings/python/tests/cindex/test_token_kind.py
M clang/bindings/python/tests/cindex/test_tokens.py
M clang/bindings/python/tests/cindex/test_translation_unit.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/bindings/python/tests/cindex/util.py
M clang/cmake/caches/Android.cmake
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Release.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-cross.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang.cmake
M clang/cmake/modules/AddClang.cmake
M clang/docs/AMDGPUSupport.rst
M clang/docs/APINotes.rst
M clang/docs/AddressSanitizer.rst
M clang/docs/CMakeLists.txt
M clang/docs/ClangFormat.rst
M clang/docs/ClangFormatStyleOptions.rst
R clang/docs/ClangFormattedStatus.rst
M clang/docs/ClangLinkerWrapper.rst
M clang/docs/ClangPlugins.rst
A clang/docs/ClangSYCLLinker.rst
R clang/docs/CodeOwners.rst
M clang/docs/DebuggingCoroutines.rst
M clang/docs/ExternalClangExamples.rst
A clang/docs/FunctionEffectAnalysis.rst
M clang/docs/HIPSupport.rst
M clang/docs/HLSL/ExpectedDifferences.rst
M clang/docs/HardwareAssistedAddressSanitizerDesign.rst
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LeakSanitizer.rst
M clang/docs/LibASTMatchersReference.html
A clang/docs/Maintainers.rst
M clang/docs/MemorySanitizer.rst
M clang/docs/Multilib.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
A clang/docs/SafeBuffers.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/docs/ShadowCallStack.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/docs/ThreadSanitizer.rst
M clang/docs/UndefinedBehaviorSanitizer.rst
M clang/docs/UsersManual.rst
A clang/docs/WarningSuppressionMappings.rst
M clang/docs/analyzer/checkers.rst
M clang/docs/analyzer/user-docs.rst
M clang/docs/analyzer/user-docs/CommandLineUsage.rst
A clang/docs/analyzer/user-docs/FAQ.rst
M clang/docs/analyzer/user-docs/TaintAnalysisConfiguration.rst
M clang/docs/index.rst
R clang/docs/tools/clang-formatted-files.txt
M clang/docs/tools/generate_formatted_state.py
M clang/examples/Attribute/Attribute.cpp
M clang/examples/Attribute/CMakeLists.txt
M clang/include/clang-c/Index.h
M clang/include/clang/APINotes/Types.h
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/ASTImporter.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/ASTStructuralEquivalence.h
M clang/include/clang/AST/Attr.h
M clang/include/clang/AST/CXXRecordDeclDefinitionBits.def
M clang/include/clang/AST/CanonicalType.h
M clang/include/clang/AST/CommentCommands.td
M clang/include/clang/AST/CommentSema.h
M clang/include/clang/AST/ComputeDependence.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclFriend.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/AST/DeclObjC.h
M clang/include/clang/AST/DeclOpenMP.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/DependenceFlags.h
A clang/include/clang/AST/DynamicRecursiveASTVisitor.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/ExprConcepts.h
M clang/include/clang/AST/ExternalASTSource.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/PrettyPrinter.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/include/clang/AST/SYCLKernelInfo.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/StmtDataCollectors.td
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/StmtOpenMP.h
M clang/include/clang/AST/TemplateArgumentVisitor.h
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/TemplateName.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/ASTMatchers/ASTMatchersMacros.h
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Analysis/AnyCall.h
M clang/include/clang/Analysis/CallGraph.h
M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
A clang/include/clang/Analysis/FlowSensitive/CachedConstAccessorsLattice.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Analysis/FlowSensitive/NoopLattice.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/AMDGPUTypes.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
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M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
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M clang/include/clang/Basic/BuiltinsPPC.def
M clang/include/clang/Basic/BuiltinsRISCV.td
A clang/include/clang/Basic/BuiltinsRISCVXCV.td
M clang/include/clang/Basic/BuiltinsSystemZ.def
M clang/include/clang/Basic/BuiltinsWebAssembly.def
M clang/include/clang/Basic/BuiltinsX86.def
A clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/BuiltinsX86_64.def
A clang/include/clang/Basic/CFProtectionOptions.def
A clang/include/clang/Basic/CFProtectionOptions.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticASTKinds.td
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M clang/include/clang/CodeGen/CGFunctionInfo.h
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M clang/include/clang/Driver/Multilib.h
M clang/include/clang/Driver/Options.td
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M clang/include/clang/Driver/XRayArgs.h
M clang/include/clang/ExtractAPI/API.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Frontend/FrontendPluginRegistry.h
M clang/include/clang/Frontend/MultiplexConsumer.h
M clang/include/clang/Index/USRGeneration.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Interpreter/PartialTranslationUnit.h
M clang/include/clang/Interpreter/Value.h
M clang/include/clang/Lex/DirectoryLookup.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/HeaderSearchOptions.h
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Lex/Preprocessor.h
R clang/include/clang/Parse/ParseDiagnostic.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/clang/Sema/CodeCompleteConsumer.h
M clang/include/clang/Sema/ExternalSemaSource.h
M clang/include/clang/Sema/Initialization.h
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/ScopeInfo.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaAMDGPU.h
M clang/include/clang/Sema/SemaARM.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaInternal.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Sema/SemaRISCV.h
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTRecordWriter.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/TypeBitCodes.def
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugReporterVisitors.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerHelpers.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/DynamicExtent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h
A clang/include/clang/Support/Compiler.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/include/clang/Testing/CommandLineArgs.h
M clang/include/clang/Testing/TestClangConfig.h
A clang/include/clang/Testing/TestLanguage.def
M clang/include/clang/Tooling/CompilationDatabase.h
M clang/include/clang/Tooling/CompilationDatabasePluginRegistry.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/include/clang/Tooling/Inclusions/StandardLibrary.h
M clang/include/clang/Tooling/ToolExecutorPluginRegistry.h
M clang/include/module.modulemap
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/ARCMigrate/Internals.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/Boolean.h
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
A clang/lib/AST/ByteCode/FixedPoint.h
M clang/lib/AST/ByteCode/Floating.h
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/IntegralAP.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.cpp
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
A clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
A clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/AST/ByteCode/InterpStack.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/MemberPointer.cpp
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
M clang/lib/AST/ByteCode/Source.cpp
M clang/lib/AST/ByteCode/Source.h
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/Comment.cpp
M clang/lib/AST/CommentCommandTraits.cpp
M clang/lib/AST/CommentParser.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/DataCollection.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclOpenMP.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DeclarationName.cpp
A clang/lib/AST/DynamicRecursiveASTVisitor.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/InheritViz.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NSAPI.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OSLog.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtIterator.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/StmtViz.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTTBuilder.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/BodyFarm.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/CallGraph.cpp
M clang/lib/Analysis/CalledOnceCheck.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/FlowSensitive/ASTOps.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
M clang/lib/Analysis/ProgramPoint.cpp
M clang/lib/Analysis/ReachableCode.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/CMakeLists.txt
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/FileSystemStatCache.cpp
M clang/lib/Basic/IdentifierTable.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/LangStandards.cpp
M clang/lib/Basic/Module.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/OperatorPrecedence.cpp
M clang/lib/Basic/SourceManager.cpp
A clang/lib/Basic/StackExhaustionHandler.cpp
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARC.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/AVR.h
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/BPF.h
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/Lanai.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/M68k.cpp
M clang/lib/Basic/Targets/MSP430.h
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/PNaCl.cpp
M clang/lib/Basic/Targets/PNaCl.h
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Basic/Targets/XCore.h
M clang/lib/Basic/Warnings.cpp
A clang/lib/CIR/.clang-tidy
M clang/lib/CIR/CMakeLists.txt
A clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/lib/CIR/CodeGen/CIRGenTypeCache.h
A clang/lib/CIR/CodeGen/CIRGenerator.cpp
A clang/lib/CIR/CodeGen/CMakeLists.txt
A clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
A clang/lib/CIR/FrontendAction/CIRGenAction.cpp
A clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/ABIInfoImpl.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCUDARuntime.h
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTT.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CMakeLists.txt
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CodeGenTBAA.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/LinkInModulesPass.cpp
M clang/lib/CodeGen/MacroPPCallbacks.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/ARM.cpp
A clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGen/Targets/SystemZ.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/DriverOptions.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/Arch/SystemZ.cpp
M clang/lib/Driver/ToolChains/Arch/SystemZ.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/DragonFly.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/Haiku.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/lib/Driver/ToolChains/SPIRV.cpp
M clang/lib/Driver/ToolChains/SPIRV.h
M clang/lib/Driver/ToolChains/Solaris.cpp
A clang/lib/Driver/ToolChains/UEFI.cpp
A clang/lib/Driver/ToolChains/UEFI.h
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/ExtractAPI/API.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/BreakableToken.h
M clang/lib/Format/CMakeLists.txt
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Format/MacroExpander.cpp
M clang/lib/Format/ObjCPropertyAttributeOrderFixer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/lib/Frontend/ASTConsumers.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/ChainedIncludesSource.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/DiagnosticRenderer.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Frontend/PrintPreprocessedOutput.cpp
M clang/lib/Frontend/Rewrite/FixItRewriter.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
M clang/lib/Frontend/TextDiagnostic.cpp
M clang/lib/Frontend/TextDiagnosticPrinter.cpp
M clang/lib/FrontendTool/CMakeLists.txt
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/__clang_cuda_device_functions.h
M clang/lib/Headers/adcintrin.h
M clang/lib/Headers/adxintrin.h
M clang/lib/Headers/altivec.h
A clang/lib/Headers/amdgpuintrin.h
A clang/lib/Headers/amxavx512intrin.h
A clang/lib/Headers/amxbf16transposeintrin.h
A clang/lib/Headers/amxcomplextransposeintrin.h
M clang/lib/Headers/amxfp16intrin.h
A clang/lib/Headers/amxfp16transposeintrin.h
A clang/lib/Headers/amxfp8intrin.h
M clang/lib/Headers/amxintrin.h
A clang/lib/Headers/amxmovrsintrin.h
A clang/lib/Headers/amxmovrstransposeintrin.h
A clang/lib/Headers/amxtf32intrin.h
A clang/lib/Headers/amxtf32transposeintrin.h
A clang/lib/Headers/amxtransposeintrin.h
M clang/lib/Headers/arm_acle.h
A clang/lib/Headers/avx10_2_512bf16intrin.h
A clang/lib/Headers/avx10_2_512satcvtdsintrin.h
A clang/lib/Headers/avx10_2bf16intrin.h
A clang/lib/Headers/avx10_2copyintrin.h
A clang/lib/Headers/avx10_2satcvtdsintrin.h
M clang/lib/Headers/avx512bitalgintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512vlbitalgintrin.h
M clang/lib/Headers/avx512vpopcntdqintrin.h
M clang/lib/Headers/avx512vpopcntdqvlintrin.h
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/bmi2intrin.h
M clang/lib/Headers/bmiintrin.h
M clang/lib/Headers/cmpccxaddintrin.h
M clang/lib/Headers/cpuid.h
M clang/lib/Headers/cuda_wrappers/new
M clang/lib/Headers/emmintrin.h
A clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/hexagon_types.h
M clang/lib/Headers/hlsl.h
A clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/intrin0.h
M clang/lib/Headers/limits.h
M clang/lib/Headers/llvm_libc_wrappers/ctype.h
M clang/lib/Headers/lzcntintrin.h
M clang/lib/Headers/mmintrin.h
M clang/lib/Headers/module.modulemap
A clang/lib/Headers/movrs_avx10_2_512intrin.h
A clang/lib/Headers/movrs_avx10_2intrin.h
A clang/lib/Headers/movrsintrin.h
A clang/lib/Headers/nvptxintrin.h
M clang/lib/Headers/opencl-c-base.h
M clang/lib/Headers/openmp_wrappers/complex_cmath.h
M clang/lib/Headers/pmmintrin.h
M clang/lib/Headers/popcntintrin.h
A clang/lib/Headers/riscv_corev_alu.h
A clang/lib/Headers/sm4evexintrin.h
M clang/lib/Headers/stdalign.h
M clang/lib/Headers/tbmintrin.h
M clang/lib/Headers/vecintrin.h
M clang/lib/Headers/wasm_simd128.h
M clang/lib/Headers/xmmintrin.h
M clang/lib/Index/IndexingContext.h
M clang/lib/Index/USRGeneration.cpp
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/InstallAPI/Frontend.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/CodeCompletion.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/IncrementalExecutor.h
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Interpreter/IncrementalParser.h
M clang/lib/Interpreter/Interpreter.cpp
A clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Interpreter/Wasm.h
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/MacroArgs.cpp
M clang/lib/Lex/MacroInfo.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPCallbacks.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/PreprocessingRecord.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/PreprocessorLexer.cpp
M clang/lib/Lex/TokenConcatenation.cpp
M clang/lib/Lex/TokenLexer.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/ScopeInfo.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaFixItUtils.cpp
A clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaSwift.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderInternals.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/Serialization/GeneratePCH.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Checkers/BitwiseShiftChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CastToStructChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
M clang/lib/StaticAnalyzer/Checkers/ErrnoChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/FixedAddressChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/IdenticalExprChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCMissingSuperCallChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/PointerIterationChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/PointerSortingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
M clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdVariantChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/lib/StaticAnalyzer/Checkers/TraversalChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
R clang/lib/StaticAnalyzer/Checkers/WebKit/NoUncountedMembersChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BasicValueFactory.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/CheckerHelpers.cpp
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
M clang/lib/StaticAnalyzer/Core/DynamicExtent.cpp
M clang/lib/StaticAnalyzer/Core/ExplodedGraph.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/LoopUnrolling.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/lib/StaticAnalyzer/Core/SVals.cpp
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Testing/CommandLineArgs.cpp
M clang/lib/Tooling/CMakeLists.txt
M clang/lib/Tooling/CommonOptionsParser.cpp
M clang/lib/Tooling/Core/Replacement.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StandardLibrary.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
M clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc
A clang/lib/Tooling/LocateToolCompilationDatabase.cpp
M clang/lib/Tooling/Refactoring/AtomicChange.cpp
M clang/lib/Tooling/Transformer/Stencil.cpp
M clang/test/APINotes/Inputs/Frameworks/SimpleKit.framework/Headers/SimpleKit.apinotes
M clang/test/APINotes/Inputs/Frameworks/SimpleKit.framework/Headers/SimpleKit.h
A clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
A clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.apinotes
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/lifetimebound.cpp
M clang/test/APINotes/swift-import-as.cpp
M clang/test/APINotes/types.m
M clang/test/APINotes/yaml-roundtrip-2.test
M clang/test/AST/ByteCode/arrays.cpp
A clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
A clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/codegen.c
M clang/test/AST/ByteCode/codegen.cpp
A clang/test/AST/ByteCode/codegen.m
M clang/test/AST/ByteCode/complex.cpp
A clang/test/AST/ByteCode/const-base-cast.cpp
M clang/test/AST/ByteCode/constexpr-frame-describe.cpp
A clang/test/AST/ByteCode/constexpr-vectors.cpp
A clang/test/AST/ByteCode/constexpr.c
A clang/test/AST/ByteCode/cxx11-pedantic.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx17.cpp
A clang/test/AST/ByteCode/cxx1z.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/AST/ByteCode/cxx98.cpp
A clang/test/AST/ByteCode/extern.cpp
A clang/test/AST/ByteCode/fixed-point.cpp
M clang/test/AST/ByteCode/hlsl.hlsl
A clang/test/AST/ByteCode/initializer_list.cpp
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/ms.cpp
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/AST/ByteCode/openmp.cpp
A clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/AST/ByteCode/shifts.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/AST/ByteCode/vectors.cpp
M clang/test/AST/ByteCode/weak.cpp
A clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/ArrayAssignable.hlsl
A clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/OutArgExpr.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
A clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/WaveSize.hlsl
M clang/test/AST/HLSL/vector-constructors.hlsl
A clang/test/AST/arm-mfp8.cpp
M clang/test/AST/ast-dump-aarch64-sve-types.c
M clang/test/AST/ast-dump-amdgpu-types.c
M clang/test/AST/ast-dump-comment.cpp
M clang/test/AST/ast-dump-concepts.cpp
M clang/test/AST/ast-dump-default-init-json.cpp
M clang/test/AST/ast-dump-default-init.cpp
M clang/test/AST/ast-dump-for-range-lifetime.cpp
A clang/test/AST/ast-print-builtin-counted-by-ref.c
A clang/test/AST/ast-print-openacc-combined-construct.cpp
M clang/test/AST/ast-print-openacc-loop-construct.cpp
A clang/test/AST/attr-lifetime-capture-by.cpp
M clang/test/AST/attr-print-emit.cpp
M clang/test/AST/attr-swift_attr.m
A clang/test/AST/new-unknown-type.cpp
A clang/test/AST/solaris-tm.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-ptr.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-return-value.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
A clang/test/Analysis/Checkers/WebKit/ref-cntbl-crtp-base-no-virtual-dtor.cpp
A clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
A clang/test/Analysis/Checkers/WebKit/unchecked-members.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
A clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg-std-array.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
A clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.mm
A clang/test/Analysis/Checkers/WebKit/uncounted-obj-const-v-muable.cpp
A clang/test/Analysis/Inputs/overloaded-delete-in-header.h
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/NewDelete-atomics.cpp
M clang/test/Analysis/NewDelete-checker-test.cpp
M clang/test/Analysis/NewDelete-intersections.mm
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/array-init-loop.cpp
M clang/test/Analysis/asm.cpp
M clang/test/Analysis/assume-controlled-environment.c
M clang/test/Analysis/block-in-critical-section-inheritance.cpp
A clang/test/Analysis/block-in-critical-section-nested-namespace.cpp
M clang/test/Analysis/bool-assignment.c
A clang/test/Analysis/builtin_overflow.c
A clang/test/Analysis/builtin_overflow_notes.c
M clang/test/Analysis/casts.c
M clang/test/Analysis/const-method-call.cpp
M clang/test/Analysis/copy-elision.cpp
A clang/test/Analysis/cstring-uninitread-notes.c
M clang/test/Analysis/ctor-array.cpp
M clang/test/Analysis/ctor-trivial-copy.cpp
M clang/test/Analysis/ctu-on-demand-parsing.c
M clang/test/Analysis/ctu-on-demand-parsing.cpp
M clang/test/Analysis/cxx-method-names.cpp
M clang/test/Analysis/debug-exprinspection-istainted.c
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-diagnostics-taint-test.c.sarif
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-diagnostic-test.c.sarif
M clang/test/Analysis/diagnostics/sarif-diagnostics-taint-test.c
M clang/test/Analysis/diagnostics/sarif-multi-diagnostic-test.c
A clang/test/Analysis/divzero-tainted-div-difference.c
A clang/test/Analysis/embed.c
M clang/test/Analysis/fread.c
M clang/test/Analysis/global-region-invalidation-errno.c
M clang/test/Analysis/global-region-invalidation.c
M clang/test/Analysis/incorrect-checker-names.cpp
M clang/test/Analysis/infeasible-sink.c
M clang/test/Analysis/lifetime-extended-regions.cpp
M clang/test/Analysis/loop-block-counts.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc-interprocedural.c
A clang/test/Analysis/malloc-refcounted.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/malloc.cpp
M clang/test/Analysis/mmap-writeexec.c
A clang/test/Analysis/nullability-nocrash.c
M clang/test/Analysis/nullptr.cpp
M clang/test/Analysis/out-of-bounds-diagnostics.c
M clang/test/Analysis/out-of-bounds-notes.c
A clang/test/Analysis/overloaded-delete-in-system-header.cpp
M clang/test/Analysis/pointer-sub-notes.c
M clang/test/Analysis/pointer-sub.c
M clang/test/Analysis/ptr-arith.c
R clang/test/Analysis/ptr-iter.cpp
R clang/test/Analysis/ptr-sort.cpp
M clang/test/Analysis/range_casts.c
M clang/test/Analysis/redefined_system.c
M clang/test/Analysis/stack-addr-ps.c
M clang/test/Analysis/stack-addr-ps.cpp
M clang/test/Analysis/stack-capture-leak-no-arc.mm
M clang/test/Analysis/stackaddrleak.c
A clang/test/Analysis/store-dump-orders.cpp
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream-note.c
M clang/test/Analysis/stream.c
M clang/test/Analysis/string.c
M clang/test/Analysis/string.cpp
M clang/test/Analysis/taint-checker-callback-order-has-definition.c
M clang/test/Analysis/taint-checker-callback-order-without-definition.c
M clang/test/Analysis/taint-diagnostic-visitor.c
M clang/test/Analysis/taint-dumps.c
M clang/test/Analysis/taint-generic.c
M clang/test/Analysis/taint-generic.cpp
M clang/test/Analysis/taint-tester.c
M clang/test/Analysis/taint-tester.cpp
M clang/test/Analysis/taint-tester.m
R clang/test/Analysis/traversal-algorithm.mm
M clang/test/Analysis/unary-sym-expr.c
A clang/test/Analysis/z3-unarysymexpr.c
A clang/test/C/C23/n3029.c
A clang/test/C/C23/n3030.c
A clang/test/C/C2y/n3298.c
A clang/test/C/C2y/n3341.c
A clang/test/C/C2y/n3342.c
A clang/test/C/C2y/n3344.c
A clang/test/C/C2y/n3346.c
A clang/test/C/C2y/n3364.c
A clang/test/C/C2y/n3370.c
A clang/test/CIR/hello.c
A clang/test/CIR/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/test/CXX/class.derived/p2.cpp
M clang/test/CXX/class/class.friend/p7-cxx20.cpp
M clang/test/CXX/class/class.mfct/p1-cxx20.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p3.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/p1.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p8.cpp
M clang/test/CXX/dcl/dcl.decl/p3.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg16xx.cpp
A clang/test/CXX/drs/cwg1818.cpp
A clang/test/CXX/drs/cwg1884.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg22xx.cpp
M clang/test/CXX/drs/cwg24xx.cpp
M clang/test/CXX/drs/cwg25xx.cpp
A clang/test/CXX/drs/cwg279.cpp
M clang/test/CXX/drs/cwg27xx.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
A clang/test/CXX/drs/cwg563.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg9xx.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks.mm
M clang/test/CXX/expr/expr.prim/expr.prim.req/requires-expr.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p1.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p10.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p11.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p3.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p4.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p5.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p6.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p7.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p8.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p9.cpp
M clang/test/CXX/module/module.import/p2.cpp
M clang/test/CXX/over/over.oper/over.literal/p2.cpp
M clang/test/CXX/over/over.oper/over.literal/p3.cpp
M clang/test/CXX/over/over.oper/over.literal/p5.cpp
M clang/test/CXX/over/over.oper/over.literal/p6.cpp
M clang/test/CXX/over/over.oper/over.literal/p7.cpp
M clang/test/CXX/over/over.oper/over.literal/p8.cpp
M clang/test/CXX/special/class.inhctor/p8.cpp
M clang/test/CXX/special/class.temporary/p6.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/func-template-decl.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
A clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.res/temp.local/p8.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p12.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p14-23.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p18.cpp
M clang/test/ClangScanDeps/diagnostics.c
M clang/test/ClangScanDeps/header-search-pruning-transitive.c
A clang/test/ClangScanDeps/implicit-target.c
M clang/test/ClangScanDeps/link-libraries.c
M clang/test/ClangScanDeps/modules-context-hash.c
M clang/test/ClangScanDeps/modules-dep-args.c
M clang/test/ClangScanDeps/modules-extern-submodule.c
M clang/test/ClangScanDeps/modules-extern-unrelated.m
M clang/test/ClangScanDeps/modules-file-path-isolation.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-full-by-mod-name.c
M clang/test/ClangScanDeps/modules-full-output-tu-order.c
M clang/test/ClangScanDeps/modules-full.cpp
M clang/test/ClangScanDeps/modules-has-include-umbrella-header.c
M clang/test/ClangScanDeps/modules-header-sharing.m
M clang/test/ClangScanDeps/modules-implementation-module-map.c
M clang/test/ClangScanDeps/modules-implementation-private.m
M clang/test/ClangScanDeps/modules-implicit-dot-private.m
M clang/test/ClangScanDeps/modules-incomplete-umbrella.c
M clang/test/ClangScanDeps/modules-inferred.m
M clang/test/ClangScanDeps/modules-no-undeclared-includes.c
M clang/test/ClangScanDeps/modules-pch-common-submodule.c
M clang/test/ClangScanDeps/modules-pch-common-via-submodule.c
M clang/test/ClangScanDeps/modules-pch.c
M clang/test/ClangScanDeps/modules-priv-fw-from-pub.m
M clang/test/ClangScanDeps/modules-redefinition.m
M clang/test/ClangScanDeps/modules-symlink-dir-vfs.c
M clang/test/ClangScanDeps/modules-transitive.c
M clang/test/ClangScanDeps/optimize-vfs.m
M clang/test/ClangScanDeps/pr61006.cppm
M clang/test/ClangScanDeps/print-timing.c
M clang/test/ClangScanDeps/removed-args.c
A clang/test/ClangScanDeps/resolve-executable-path.c
A clang/test/ClangScanDeps/verbose.test
M clang/test/CodeCompletion/variadic-template.cpp
M clang/test/CodeGen/2004-02-20-Builtins.c
M clang/test/CodeGen/2008-07-22-bitfield-init-after-zero-len-array.c
M clang/test/CodeGen/2008-08-07-AlignPadding1.c
M clang/test/CodeGen/2009-06-14-anonymous-union-init.c
M clang/test/CodeGen/64bit-swiftcall.c
A clang/test/CodeGen/AArch64/ABI-align-packed-assembly.c
A clang/test/CodeGen/AArch64/ABI-align-packed.c
A clang/test/CodeGen/AArch64/args-hfa.c
A clang/test/CodeGen/AArch64/args.cpp
A clang/test/CodeGen/AArch64/arguments-hfa-v3.c
A clang/test/CodeGen/AArch64/attr-mode-complex.c
A clang/test/CodeGen/AArch64/attr-mode-float.c
A clang/test/CodeGen/AArch64/bf16-dotprod-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-lane-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-ldst-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
A clang/test/CodeGen/AArch64/branch-protection-attr.c
A clang/test/CodeGen/AArch64/byval-temp.c
A clang/test/CodeGen/AArch64/cpu-supports-target.c
A clang/test/CodeGen/AArch64/cpu-supports.c
A clang/test/CodeGen/AArch64/debug-sve-vector-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx2-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx3-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx4-types.c
A clang/test/CodeGen/AArch64/debug-types.c
A clang/test/CodeGen/AArch64/elf-pauthabi.c
A clang/test/CodeGen/AArch64/fix-cortex-a53-835769.c
A clang/test/CodeGen/AArch64/fmv-dependencies.c
A clang/test/CodeGen/AArch64/fmv-resolver-emission.c
A clang/test/CodeGen/AArch64/fmv-streaming.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_scale.c
A clang/test/CodeGen/AArch64/fpm-helpers.c
A clang/test/CodeGen/AArch64/gcs.c
A clang/test/CodeGen/AArch64/inline-asm.c
A clang/test/CodeGen/AArch64/inlineasm-ios.c
A clang/test/CodeGen/AArch64/ls64-inline-asm.c
A clang/test/CodeGen/AArch64/ls64.c
A clang/test/CodeGen/AArch64/matmul.cpp
A clang/test/CodeGen/AArch64/mixed-target-attributes.c
A clang/test/CodeGen/AArch64/mops.c
A clang/test/CodeGen/AArch64/neon-2velem.c
A clang/test/CodeGen/AArch64/neon-3v.c
A clang/test/CodeGen/AArch64/neon-across.c
A clang/test/CodeGen/AArch64/neon-dot-product.c
A clang/test/CodeGen/AArch64/neon-extract.c
A clang/test/CodeGen/AArch64/neon-faminmax-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fcvt-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fma.c
A clang/test/CodeGen/AArch64/neon-fp16fml.c
A clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_fscale.c
A clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/neon-intrinsics.c
A clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
A clang/test/CodeGen/AArch64/neon-ldst-one.c
A clang/test/CodeGen/AArch64/neon-luti.c
A clang/test/CodeGen/AArch64/neon-misc-constrained.c
A clang/test/CodeGen/AArch64/neon-misc.c
A clang/test/CodeGen/AArch64/neon-perm.c
A clang/test/CodeGen/AArch64/neon-range-checks.c
A clang/test/CodeGen/AArch64/neon-scalar-copy.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
A clang/test/CodeGen/AArch64/neon-sha3.c
A clang/test/CodeGen/AArch64/neon-shifts.c
A clang/test/CodeGen/AArch64/neon-sm4-sm3.c
A clang/test/CodeGen/AArch64/neon-tbl.c
A clang/test/CodeGen/AArch64/neon-vcadd.c
A clang/test/CodeGen/AArch64/neon-vcmla.c
A clang/test/CodeGen/AArch64/neon-vcombine.c
A clang/test/CodeGen/AArch64/neon-vget-hilo.c
A clang/test/CodeGen/AArch64/neon-vget.c
A clang/test/CodeGen/AArch64/neon-vsqadd-float-conversion.c
A clang/test/CodeGen/AArch64/neon-vuqadd-float-conversion-warning.c
A clang/test/CodeGen/AArch64/poly-add.c
A clang/test/CodeGen/AArch64/poly128.c
A clang/test/CodeGen/AArch64/poly64.c
A clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
A clang/test/CodeGen/AArch64/pure-scalable-args.c
A clang/test/CodeGen/AArch64/sign-return-address.c
A clang/test/CodeGen/AArch64/sme-inline-streaming-attrs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/aarch64-sme-attrs.cpp
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_cnt.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_read.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_builtin.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_write.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_zero.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/aarch64-sme2-attrs.cpp
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add_sub_za16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_bmop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_clamp.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtn.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_faminmax.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fmlas16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_frint.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_int_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_max.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_maxnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_min.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_minnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mla.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlal.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlall.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mls.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlsl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mopa_nonwide.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_read.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sqdmulh.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sub.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vdot.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_qrshr.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_rshl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_zero_zt.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_movaz.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_zero.c
A clang/test/CodeGen/AArch64/soft-float-abi-errors.c
A clang/test/CodeGen/AArch64/soft-float-abi.c
A clang/test/CodeGen/AArch64/strictfp-builtins.c
A clang/test/CodeGen/AArch64/subarch-compatbility.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
A clang/test/CodeGen/AArch64/sve-inline-asm-crash.c
A clang/test/CodeGen/AArch64/sve-inline-asm-datatypes.c
A clang/test/CodeGen/AArch64/sve-inline-asm-negative-test.c
A clang/test/CodeGen/AArch64/sve-inline-asm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/README
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abs.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acle.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_aclt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_add.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adda.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_addv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_and.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_andv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bic.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brka.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpeq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmple.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmplt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpne.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpuo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_compact.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvtnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_div.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_divr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq_const.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eorv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_expa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_exth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_index.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp32.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_max.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_min.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mov.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_msb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nand.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_neg.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmsb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_not.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfalse.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfirst.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pnext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptest.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptrue.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdech.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qinch.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qsub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rbit.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rdffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpe.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recps.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinti.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrte.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrts.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_scale.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_setffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sqrt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_subr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sudot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tsmul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tssel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpkhi.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpklo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_usdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilele.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilelt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_wrffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2.c
A clang/test/CodeGen/AArch64/sve-vector-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
A clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vector-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vector-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vector-subscript-ops.c
A clang/test/CodeGen/AArch64/sve-vls-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vls-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vls-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vls-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vls-subscript-ops.c
A clang/test/CodeGen/AArch64/sve.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aba.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adalp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bcax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bdep.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bext.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bgrp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl1n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl2n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cdot.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cmla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtxnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eor3.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eorbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eortb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_faminmax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histcnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histseg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_logb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_luti.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_match.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mls.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nbsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nmatch.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qabs.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qcadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qneg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdcmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlsh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshlu.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rax1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_recpe.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rhadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsqrte.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sli.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4e.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4ekey.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sri.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subltb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_uqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilege.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilegt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_xar.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfadd.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmax.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmin.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfminnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfsub.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_cntp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_int_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pext.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pfalse.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ptrue.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qcvtn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qrshr.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_sclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_undef_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_pn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_x2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
A clang/test/CodeGen/AArch64/svepcs.c
A clang/test/CodeGen/AArch64/sysregs-target.c
A clang/test/CodeGen/AArch64/targetattr-arch.c
A clang/test/CodeGen/AArch64/targetattr-crypto.c
A clang/test/CodeGen/AArch64/targetattr.c
A clang/test/CodeGen/AArch64/tme.cpp
A clang/test/CodeGen/AArch64/type-sizes.c
A clang/test/CodeGen/AArch64/v8.1a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.5a-scalar-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.6a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/varargs-ms.c
A clang/test/CodeGen/AArch64/varargs-sve.c
A clang/test/CodeGen/AArch64/varargs.c
A clang/test/CodeGen/AArch64/vpcs.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/PowerPC/altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-build-pair-mma.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c
M clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
M clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-inline.c
M clang/test/CodeGen/PowerPC/musttail-forward-declaration-weak.c
M clang/test/CodeGen/PowerPC/musttail-indirect.cpp
M clang/test/CodeGen/PowerPC/musttail-inline.c
M clang/test/CodeGen/PowerPC/musttail-undefined.c
M clang/test/CodeGen/PowerPC/musttail-weak.c
M clang/test/CodeGen/PowerPC/musttail.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
R clang/test/CodeGen/PowerPC/transparent_union.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init-no-parentheses.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init.c
A clang/test/CodeGen/RISCV/attr-hw-shadow-stack.c
M clang/test/CodeGen/RISCV/riscv-atomics.c
A clang/test/CodeGen/RISCV/riscv-cf-protection.c
M clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
A clang/test/CodeGen/RISCV/riscv-xcvalu-c-api.c
A clang/test/CodeGen/RISCV/riscv-xcvalu.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vcreate.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vundefined.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesef.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesem.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaeskf1.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaeskf2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesz.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vandn.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vbrev.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vbrev8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclmulh.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vclz.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpopv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcreate.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vctz.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vghsh.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vgmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrev8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrol.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vror.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2ch.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2cl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsha2ms.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm3c.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm3me.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm4k.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm4r.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vundefined.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsll.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdf.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdm.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesef.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesem.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaeskf1.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaeskf2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesz.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vandn.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vbrev.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vbrev8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclmulh.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vclz.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vcpopv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vctz.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vghsh.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vgmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlsseg3e16.c
R clang/test/CodeGen/aarch64-ABI-align-packed-assembly.c
R clang/test/CodeGen/aarch64-ABI-align-packed.c
R clang/test/CodeGen/aarch64-args-hfa.c
R clang/test/CodeGen/aarch64-args.cpp
R clang/test/CodeGen/aarch64-arguments-hfa-v3.c
R clang/test/CodeGen/aarch64-attr-mode-complex.c
R clang/test/CodeGen/aarch64-attr-mode-float.c
R clang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-reinterpret-intrinsics.c
R clang/test/CodeGen/aarch64-branch-protection-attr.c
R clang/test/CodeGen/aarch64-byval-temp.c
R clang/test/CodeGen/aarch64-debug-sve-vector-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx2-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx3-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx4-types.c
R clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
R clang/test/CodeGen/aarch64-fmv-resolver-emission.c
R clang/test/CodeGen/aarch64-gcs.c
R clang/test/CodeGen/aarch64-inline-asm.c
R clang/test/CodeGen/aarch64-inlineasm-ios.c
R clang/test/CodeGen/aarch64-ls64-inline-asm.c
R clang/test/CodeGen/aarch64-ls64.c
R clang/test/CodeGen/aarch64-matmul.cpp
R clang/test/CodeGen/aarch64-mops.c
R clang/test/CodeGen/aarch64-neon-2velem.c
R clang/test/CodeGen/aarch64-neon-across.c
R clang/test/CodeGen/aarch64-neon-dot-product.c
R clang/test/CodeGen/aarch64-neon-extract.c
R clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fma.c
R clang/test/CodeGen/aarch64-neon-fp16fml.c
R clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-neon-ldst-one-rcpc3.c
R clang/test/CodeGen/aarch64-neon-ldst-one.c
R clang/test/CodeGen/aarch64-neon-misc-constrained.c
R clang/test/CodeGen/aarch64-neon-perm.c
R clang/test/CodeGen/aarch64-neon-range-checks.c
R clang/test/CodeGen/aarch64-neon-scalar-copy.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem-constrained.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
R clang/test/CodeGen/aarch64-neon-sha3.c
R clang/test/CodeGen/aarch64-neon-sm4-sm3.c
R clang/test/CodeGen/aarch64-neon-vcadd.c
R clang/test/CodeGen/aarch64-neon-vcmla.c
R clang/test/CodeGen/aarch64-neon-vcombine.c
R clang/test/CodeGen/aarch64-neon-vget-hilo.c
R clang/test/CodeGen/aarch64-neon-vget.c
R clang/test/CodeGen/aarch64-neon-vsqadd-float-conversion.c
R clang/test/CodeGen/aarch64-neon-vuqadd-float-conversion-warning.c
R clang/test/CodeGen/aarch64-poly-add.c
R clang/test/CodeGen/aarch64-poly128.c
R clang/test/CodeGen/aarch64-sign-return-address.c
R clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_builtin.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/aarch64-sme2-attrs.cpp
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
R clang/test/CodeGen/aarch64-soft-float-abi-errors.c
R clang/test/CodeGen/aarch64-soft-float-abi.c
R clang/test/CodeGen/aarch64-strictfp-builtins.c
R clang/test/CodeGen/aarch64-subarch-compatbility.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
R clang/test/CodeGen/aarch64-sve-inline-asm-crash.c
R clang/test/CodeGen/aarch64-sve-inline-asm-datatypes.c
R clang/test/CodeGen/aarch64-sve-inline-asm-negative-test.c
R clang/test/CodeGen/aarch64-sve-inline-asm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/README
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq_const.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c
R clang/test/CodeGen/aarch64-sve-vector-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vector-bits-codegen.c
R clang/test/CodeGen/aarch64-sve-vector-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vector-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vector-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vector-subscript-ops.c
R clang/test/CodeGen/aarch64-sve-vls-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vls-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vls-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vls-subscript-ops.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dupq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_int_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ptrue.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tblq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tbxq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq2.c
R clang/test/CodeGen/aarch64-svepcs.c
R clang/test/CodeGen/aarch64-sysregs-target.c
R clang/test/CodeGen/aarch64-targetattr-arch.c
R clang/test/CodeGen/aarch64-targetattr-crypto.c
R clang/test/CodeGen/aarch64-tme.cpp
R clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.5a-neon-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.5a-scalar-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.6a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-varargs-ms.c
R clang/test/CodeGen/aarch64-varargs-sve.c
R clang/test/CodeGen/aarch64-varargs.c
R clang/test/CodeGen/aarch64-vpcs.c
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/966ac5afb9a1...a993e6d3bf6c
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