[all-commits] [llvm/llvm-project] 33fcd6: [NFC][LLVM] Migrate tests to use update_test_check...

Wed Nov 20 05:59:45 PST 2024

  Branch: refs/heads/users/alexey-bataev/spr/slpadd-cost-estimation-for-gather-node-reshuffling
  Home:   https://github.com/llvm/llvm-project
  Commit: 33fcd6acc75535c8b5e27b00eb99d35abf52954d
      https://github.com/llvm/llvm-project/commit/33fcd6acc75535c8b5e27b00eb99d35abf52954d
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
    M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll

  Log Message:
  -----------
  [NFC][LLVM] Migrate tests to use update_test_checks.py.

  Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
  Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
  Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
  Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
  Transforms/InstCombine/scalable-const-fp-splat.ll
  Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
  Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
  Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll

  Commit: 08e7609692af3cb84da510deac70eeb02cbceb6d
      https://github.com/llvm/llvm-project/commit/08e7609692af3cb84da510deac70eeb02cbceb6d
  Author: Zichen Lu <mikaovo2000 at gmail.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/GPU/IR/CompilationInterfaces.h
    M mlir/include/mlir/Target/LLVM/ModuleToObject.h
    M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
    M mlir/lib/Target/LLVM/ModuleToObject.cpp
    M mlir/lib/Target/LLVM/NVVM/Target.cpp
    M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
    M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp

  Log Message:
  -----------
  [mlir][fix] Add callback functions for ModuleToObject (#116916)

Here is the [merged
MR](https://github.com/llvm/llvm-project/pull/116007) which caused a
failure and [was
reverted](https://github.com/llvm/llvm-project/pull/116811).

Thanks to @joker-eph for the help, I fix it (miss constructing
`ModuleObject` with callback functions in
`mlir/lib/Target/LLVM/NVVM/Target.cpp`) and split unit tests from origin
test which don't need `ptxas` to make the test runs more widely.

  Commit: 05bcf83c5c25625df1caf86ef4070644907947b6
      https://github.com/llvm/llvm-project/commit/05bcf83c5c25625df1caf86ef4070644907947b6
  Author: Christian Oliveros <christianol_01 at hotmail.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M openmp/runtime/src/CMakeLists.txt
    M openmp/runtime/tools/message-converter.py

  Log Message:
  -----------
  [OpenMP][Build][Wasm][116552] Fixed build problem when compiling with Emscripten on Windows (#116874)

  Commit: a160e51500ea625b97618d882b97b06367978ea4
      https://github.com/llvm/llvm-project/commit/a160e51500ea625b97618d882b97b06367978ea4
  Author: Sergei Barannikov <barannikov88 at gmail.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td

  Log Message:
  -----------
  [AArch64] Fix SDNode type mismatches between *.td files and ISel (#116523)

* `MRS`, `PTEST` and FP comparisons were missing "flags" result, and
were sometimes created with invalid types (f32, Glue, Other).
* `REV16`, `REV32`, `REV64`, and `CMGEz` were sometimes created with an
extra operand.
* `TLSDESC_CALLSEQ` had `SDNPInGlue` property, but the node was never
created with a glue operand.

  Commit: 1ca853b2ee1b68daaec6fdc23a085755146d102d
      https://github.com/llvm/llvm-project/commit/1ca853b2ee1b68daaec6fdc23a085755146d102d
  Author: Feng Zou <feng.zou at intel.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M clang/test/Driver/relax.s
    M lld/ELF/Arch/X86_64.cpp
    M lld/test/ELF/x86-64-gotpc-no-relax-err.s
    M lld/test/ELF/x86-64-gotpc-relax-nopic.s
    M lld/test/ELF/x86-64-gotpc-relax.s
    M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
    M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
    M llvm/test/MC/ELF/relocation-alias.s
    M llvm/test/MC/X86/gotpcrelx.s
    M llvm/test/MC/X86/reloc-directive-elf-64.s

  Log Message:
  -----------
  [X86][MC,LLD][NFC] Rename R_X86_64_REX2_GOTPCRELX (#116737)

Rename R_X86_64_REX2_GOTPCRELX to R_X86_64_CODE_4_GOTPCRELX, to align
with GCC/binutils and ABI.

GCC/binutils:
https://github.com/bminor/binutils-gdb/commit/3d5a60de52556f6a53d71d7e607c6696450ae3e4
and
https://github.com/bminor/binutils-gdb/commit/4a54cb06585f568031dfd291d0fe45979ad75e98
ABI:
https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/357de358ba68eb779822dfcbb45f7ee2d9d09193

  Commit: 8c56dd3040f295874e3d5742b5dfc109adf1f728
      https://github.com/llvm/llvm-project/commit/8c56dd3040f295874e3d5742b5dfc109adf1f728
  Author: Sergei Barannikov <barannikov88 at gmail.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMInstrVFP.td
    M llvm/lib/Target/ARM/ARMRegisterInfo.td
    M llvm/test/CodeGen/ARM/fcmp-xo.ll
    M llvm/test/CodeGen/ARM/fp16-instructions.ll
    M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
    M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
    M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
    M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
    M llvm/test/CodeGen/ARM/select.ll
    M llvm/test/CodeGen/Thumb2/mve-fmas.ll
    M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
    M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
    M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll

  Log Message:
  -----------
  [ARM] Stop gluing FP comparisons to FMSTAT (#116676)

Following #116547, this changes the result of `ARMISD::CMPFP*` and the
operand of `ARMISD::FMSTAT` from a special `Glue` type to a normal type.

This change allows comparisons to be CSEd and scheduled around as can be
seen in the test changes.

Note that `ARMISD::FMSTAT` is still glued to its consumer nodes; this is
going to be changed in a separate patch.

This patch also sets `CopyCost` of `cl_FPSCR_NZCV` register class to a
negative value. The reason is the same as for CCR register class: it
makes DAG scheduler and InstrEmitter try to avoid copies of `FPCSR_NZCV`
register to / from virtual registers. Previously, this was not
necessary, since no attempt was made to create copies in the first
place.

There might be a case when a copy can't be avoided (although not found
in existing tests). If a copy is necessary, the virtual register will be
created with `cl_FPSCR_NZCV` register class. If this register class is
inappropriate, `TRI::getCrossCopyRegClass` should be modified to return
the correct class.

Pull Request: https://github.com/llvm/llvm-project/pull/116676

  Commit: 2c094ac761912eea0d7e8ccb140bc647b5378bdf
      https://github.com/llvm/llvm-project/commit/2c094ac761912eea0d7e8ccb140bc647b5378bdf
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
    M llvm/test/Transforms/InstCombine/bit_ceil.ll

  Log Message:
  -----------
  [InstCombine] Drop range attributes in `foldBitCeil` (#116641)

Closes https://github.com/llvm/llvm-project/issues/112076

  Commit: fe697efe0c4ac34f30e28b77bb155c4fa996dab0
      https://github.com/llvm/llvm-project/commit/fe697efe0c4ac34f30e28b77bb155c4fa996dab0
  Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Analysis/CFG.cpp
    M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp

  Log Message:
  -----------
  [Clang] avoid adding consteval condition as the last statement to preserve valid CFG (#116513)

Fixes #116485

  Commit: f710e4c0219c97d4726742b294446b833e604819
      https://github.com/llvm/llvm-project/commit/f710e4c0219c97d4726742b294446b833e604819
  Author: Aaron Ballman <aaron at aaronballman.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M clang/docs/InternalsManual.rst

  Log Message:
  -----------
  Clarify use of contractions in diagnostic messages (#116803)

This dissuades contributors from using contractions when writing
diagnostic wording for Clang. Contractions should be avoided because of
the potential for visual confusion with single quoting syntactic
constructs and because they can be harder to understand for non-native
English speakers.

  Commit: ddc2e364aace37ce614106dcfaf4cffd2ec85f70
      https://github.com/llvm/llvm-project/commit/ddc2e364aace37ce614106dcfaf4cffd2ec85f70
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] getSHUFPDImm - allow general shuffle mask size

#116419 assumed that getSHUFPDImm incorrectly hardcoded the mask size to 4 (cut+pasta typo from getV4X86ShuffleImm).

Waiting on reduced test case from @metaflow

  Commit: c0fdedfedf16317253619aa65b7c60102aa36fee
      https://github.com/llvm/llvm-project/commit/c0fdedfedf16317253619aa65b7c60102aa36fee
  Author: Congcong Cai <congcongcai0907 at 163.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M clang-tools-extra/test/CMakeLists.txt

  Log Message:
  -----------
  [clang-tidy][NFC]remove deps of clang in clang tidy test (#116588)

It is introduced in https://reviews.llvm.org/D59528, but I don't find
any usage of clang in clang tidy test.

  Commit: d0d726e56da39bfbc583769a673842c0f05e72cb
      https://github.com/llvm/llvm-project/commit/d0d726e56da39bfbc583769a673842c0f05e72cb
  Author: Md Asghar Ahmad Shahid <md.asghar.ahmad.shahid at intel.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp

  Log Message:
  -----------
  Fix GCC build problem with 288f05f related to SmallVector. (#116958)

Below is the error message for reference.

/llvm-project/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp: In static member
function 'static llvm::SmallVector<mlir::AffineMap>
mlir::linalg::MatmulOp::getDefaultIndexingMaps(mlir::MLIRContext*)':
/llvm-project/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp:3468:10: error:
could not convert 'indexingMaps' from 'SmallVector<[...],3>' to
'SmallVector<[...],6>'
 3468 |   return indexingMaps;
      |          ^~~~~~~~~~~~
      |          |
      |          SmallVector<[...],3>

Here is the link to the failure.
https://lab.llvm.org/buildbot/#/builders/117/builds/3919
...

  Commit: b17f6077036296cb0f475f16adcdce4af6aea3e9
      https://github.com/llvm/llvm-project/commit/b17f6077036296cb0f475f16adcdce4af6aea3e9
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [SLP][NFC]Remove unnecessary std::optional around Factor value

  Commit: 343cecc5165c7fd03fc4e282a856fe9af0a7f761
      https://github.com/llvm/llvm-project/commit/343cecc5165c7fd03fc4e282a856fe9af0a7f761
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M clang-tools-extra/test/CMakeLists.txt
    M clang/docs/InternalsManual.rst
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Analysis/CFG.cpp
    M clang/test/Driver/relax.s
    M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp
    M lld/ELF/Arch/X86_64.cpp
    M lld/test/ELF/x86-64-gotpc-no-relax-err.s
    M lld/test/ELF/x86-64-gotpc-relax-nopic.s
    M lld/test/ELF/x86-64-gotpc-relax.s
    M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
    M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMInstrVFP.td
    M llvm/lib/Target/ARM/ARMRegisterInfo.td
    M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
    M llvm/test/CodeGen/ARM/fcmp-xo.ll
    M llvm/test/CodeGen/ARM/fp16-instructions.ll
    M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
    M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
    M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
    M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
    M llvm/test/CodeGen/ARM/select.ll
    M llvm/test/CodeGen/Thumb2/mve-fmas.ll
    M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
    M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
    M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
    M llvm/test/MC/ELF/relocation-alias.s
    M llvm/test/MC/X86/gotpcrelx.s
    M llvm/test/MC/X86/reloc-directive-elf-64.s
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
    M llvm/test/Transforms/InstCombine/bit_ceil.ll
    M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
    M mlir/include/mlir/Dialect/GPU/IR/CompilationInterfaces.h
    M mlir/include/mlir/Target/LLVM/ModuleToObject.h
    M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/lib/Target/LLVM/ModuleToObject.cpp
    M mlir/lib/Target/LLVM/NVVM/Target.cpp
    M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
    M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp
    M openmp/runtime/src/CMakeLists.txt
    M openmp/runtime/tools/message-converter.py

  Log Message:
  -----------
  Address comments

Created using spr 1.3.5

Compare: https://github.com/llvm/llvm-project/compare/b32a441e0878...343cecc5165c

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