[all-commits] [llvm/llvm-project] d37554: [ARM] Specifically delineate between different GPR...

Benson Chu via All-commits all-commits at lists.llvm.org
Tue Nov 19 08:42:44 PST 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d37554b69b414ee00eacfd35eaa2e051b1ade2d7
      https://github.com/llvm/llvm-project/commit/d37554b69b414ee00eacfd35eaa2e051b1ade2d7
  Author: Benson Chu <bensonchu457 at gmail.com>
  Date:   2024-11-19 (Tue, 19 Nov 2024)

  Changed paths:
    M llvm/lib/Target/ARM/ARMFrameLowering.cpp
    M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
    M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp

  Log Message:
  -----------
  [ARM] Specifically delineate between different GPRCS2 positions

Currently, the relative position of GPRCS2 (with respect to other
instructions in the prologue of a function) can be different depending
on the type of ARMSubtarget::PushPopSplitVariant.

When the PushPopSpiltVariant is SplitR11WindowsSEH, GPRCS2 comes
after both GPRCS1 and DPRCS2:

GPRCS1
DPRCS1
GPRCS2

However, in all other cases, GPRCS2 comes before DPRCS1, like so:

GPRCS1
GPRCS2
DPRCS1

This makes the MI walking code in ARMFrameLowering::emitPrologue a bit
confusing. If GPRCS2Size is non-zero, we also have to check the
PushPopSplitVariant to know if we will encounter the DPRCS1 push
instruction first or the GPRCS2 push instruction first.

This commit changes to SplitR11WindowsSEH such that the spill area is
as follows:

GPRCS1
DPRCS1
GPRCS3

This disambiguates a lot of the ARMFrameLowering.cpp MI traversal
code.



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