[all-commits] [llvm/llvm-project] 3093b2: [RegisterCoalescer] Fix up subreg lanemasks after ...

[Sander de Smalen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3093b29b597b9a936a3e4d1c8bc4a7ccba8fc848
      https://github.com/llvm/llvm-project/commit/3093b29b597b9a936a3e4d1c8bc4a7ccba8fc848
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-11-19 (Tue, 19 Nov 2024)

  Changed paths:
    M llvm/lib/CodeGen/RegisterCoalescer.cpp
    A llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir

  Log Message:
  -----------
  [RegisterCoalescer] Fix up subreg lanemasks after rematerializing. (#116191)

In a situation like the following:

```
   undef %2.subreg = INST %1         ; DefMI (rematerializable),
                                     ; DefSubIdx = subreg
   %3 = COPY %2                      ; SrcIdx = DstIdx = 0
   .... = SOMEINSTR %3, %2
```
there are no subranges for `%3` because the entire register is copied,
but after rematerialization the subrange of the rematerialized value
must be fixed up with the appropriate subranges for `.subreg`.

(To me this issue seemed a bit similar to the issue fixed by #96839, but
then related to rematerialization)



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