[all-commits] [llvm/llvm-project] 3d4747: [gn build] Port 0b0d61101fa0
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Mon Nov 18 11:13:45 PST 2024
Branch: refs/heads/users/alexey-bataev/spr/slpadd-cost-estimation-for-gather-node-reshuffling
Home: https://github.com/llvm/llvm-project
Commit: 3d474738df573b89eedf344463a0c9a005078f1d
https://github.com/llvm/llvm-project/commit/3d474738df573b89eedf344463a0c9a005078f1d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 0b0d61101fa0
Commit: 6d058317e60c25b71df8b8dc45b69e5202362678
https://github.com/llvm/llvm-project/commit/6d058317e60c25b71df8b8dc45b69e5202362678
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/test/CodeGen/NVPTX/i1-param.ll
A llvm/test/CodeGen/NVPTX/kernel-param-align.ll
Log Message:
-----------
Enable .ptr .global .align attributes for kernel attributes for CUDA (#114874)
Emit .ptr, .address-space, and .align attributes for kernel
args in CUDA (previously handled only for OpenCL).
This allows for more vectorization opportunities if the PTX consumer
is able to know about the pointer alignments.
If no alignment is explicitly specified, .align 1 will be emitted
to match the LLVM IR semantics in this case.
PTX ISA doc -
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#kernel-parameter-attribute-ptr
This is a rework of the original patch proposed in #79646
---------
Co-authored-by: Vandana <vandanak at nvidia.com>
Commit: 40afff7bd95090a75bc68a0d26b8017cc0ae65c1
https://github.com/llvm/llvm-project/commit/40afff7bd95090a75bc68a0d26b8017cc0ae65c1
Author: lfrenot <leon.frenot at ens-lyon.fr>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
A mlir/test/Target/LLVMIR/Import/disjoint.ll
A mlir/test/Target/LLVMIR/disjoint.mlir
Log Message:
-----------
[mlir][LLVM] Add disjoint flag (#115855)
The implementation is mostly based on the one existing for the exact
flag.
disjoint means that for each bit, that bit is zero in at least one of
the inputs. This allows the Or to be treated as an Add since no carry
can occur from any bit. If the disjoint keyword is present, the result
value of the or is a [poison
value](https://llvm.org/docs/LangRef.html#poisonvalues) if both inputs
have a one in the same bit position. For vectors, only the element
containing the bit is poison.
Commit: b9d678d22f74ebd6e34f0a3501fb01d3d80984e7
https://github.com/llvm/llvm-project/commit/b9d678d22f74ebd6e34f0a3501fb01d3d80984e7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang/include/clang/AST/CanonicalType.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaFixItUtils.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/CodeGen/target-addrspace.cpp
A clang/test/Sema/amdgcn-address-spaces.c
A clang/test/Sema/nvptx-address-spaces.c
Log Message:
-----------
[Clang] Use TargetInfo when deciding if an address space is compatible (#115777)
Summary:
Address spaces are used in several embedded and GPU targets to describe
accesses to different types of memory. Currently we use the address
space enumerations to control which address spaces are considered
supersets of eachother, however this is also a target level property as
described by the C standard's passing mentions. This patch allows the
address space checks to use the target information to decide if a
pointer conversion is legal. For AMDGPU and NVPTX, all supported address
spaces can be converted to the default address space.
More semantic checks can be added on top of this, for now I'm mainly
looking to get more standard semantics working for C/C++. Right now the
address space conversions must all be done explicitly in C/C++ unlike
the offloading languages which define their own custom address spaces
that just map to the same target specific ones anyway. The main question
is if this behavior is a function of the target or the language.
Commit: cb4b943294fad949b1965f3eea2c5b492e7e3eba
https://github.com/llvm/llvm-project/commit/cb4b943294fad949b1965f3eea2c5b492e7e3eba
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Aaron Puchert as the maintainer for thread safety analysis (#115920)
Aaron has been helping out with TSA for several years and is highly
knowledgeable about the implementation.
Commit: d33a5bfa6032486747a93d142a24498755f882c2
https://github.com/llvm/llvm-project/commit/d33a5bfa6032486747a93d142a24498755f882c2
Author: Tom Natan <tomnatan at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
Log Message:
-----------
Revert "[NVPTX] Add folding for cvt.rn.bf16x2.f32" (#116376)
Reverts llvm/llvm-project#116109
This change is breaking triton tests (results in huge numeric
disparities, e.g.
https://github.com/triton-lang/triton/blob/main/python/test/unit/language/test_core.py),
we'll need to revert until a fix forward can be merged.
Commit: 62c3c1cad78b3354432fe44285f3472d9c93a45a
https://github.com/llvm/llvm-project/commit/62c3c1cad78b3354432fe44285f3472d9c93a45a
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
R clang/lib/Driver/ToolChains/SYCL.cpp
R clang/lib/Driver/ToolChains/SYCL.h
R clang/test/Driver/sycl-offload-jit.cpp
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
Revert "[Driver][SYCL] Add initial SYCL offload compilation support" (#116381)
Reverts llvm/llvm-project#107493
Failing bots include:
https://lab.llvm.org/buildbot/#/builders/190/builds/9546
https://lab.llvm.org/buildbot/#/builders/46/builds/7938
Commit: a41ae90c0c9f063de1231b454da2631c07b44535
https://github.com/llvm/llvm-project/commit/a41ae90c0c9f063de1231b454da2631c07b44535
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
A llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
Log Message:
-----------
[MergeLodstore] Add tests for preserving metadata when sinking stores.
Commit: e0b76bafde197c4813aa52dbcfeaf6bd1f9d96da
https://github.com/llvm/llvm-project/commit/e0b76bafde197c4813aa52dbcfeaf6bd1f9d96da
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
Log Message:
-----------
[lldb][test] Disable inline_sites_live.cpp for non-Windows targets (#116196)
This is a follow-up for the conversation here
https://github.com/llvm/llvm-project/pull/115722/.
This test is designed for Windows target/PDB format, so it shouldn't be
built and run for DWARF/etc.
Commit: 9cbf2dd6f3900045f1bbbdf44142f572d8f3b339
https://github.com/llvm/llvm-project/commit/9cbf2dd6f3900045f1bbbdf44142f572d8f3b339
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Analysis/ProgramPoint.cpp
M clang/utils/analyzer/exploded-graph-rewriter.py
Log Message:
-----------
[analyzer] Print the callee name in CallEnter in exploded-graph-rewriter (#116225)
Commit: 9d02264b03ea9cff356c2f1aecb9606864a671f2
https://github.com/llvm/llvm-project/commit/9d02264b03ea9cff356c2f1aecb9606864a671f2
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-nonzero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-zero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize.ll
M llvm/test/CodeGen/RISCV/global-merge-offset.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
Log Message:
-----------
[RISCV] Enable global merging by default (#115495)
>From the discussion at the round-table at the RISC-V Summit it was clear
people see cases where global merging would help. So the direction of
enabling it by default and iteratively working to enable it in more
cases or to improve the heuristics seems sensible. This patch tries to
make a minimal step in that direction.
Commit: 4b928608f8865689d51bf7c9646a049328b9ac62
https://github.com/llvm/llvm-project/commit/4b928608f8865689d51bf7c9646a049328b9ac62
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 62c3c1cad78b
Commit: 35710ab392b50c815765f03c12409147502dfb86
https://github.com/llvm/llvm-project/commit/35710ab392b50c815765f03c12409147502dfb86
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrDFP.td
M llvm/test/MC/Disassembler/SystemZ/insns.txt
M llvm/test/MC/SystemZ/insn-bad.s
M llvm/test/MC/SystemZ/insn-good.s
Log Message:
-----------
[SystemZ] Fix wrong register class for some DFP instructions
Certain DFP instructions have GPR arguments, which are currently
incorrectly treated as FPR registers. Since we do not use DFP
in codegen, this only affects the assembler and disassembler.
Commit: 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3
https://github.com/llvm/llvm-project/commit/7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
A llvm/test/CodeGen/RISCV/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
A llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
[IR] Initial introduction of llvm.experimental.memset_pattern (#97583)
Supersedes the draft PR #94992, taking a different approach following
feedback:
* Lower in PreISelIntrinsicLowering
* Don't require that the number of bytes to set is a compile-time
constant
* Define llvm.memset_pattern rather than llvm.memset_pattern.inline
As discussed in the [RFC
thread](https://discourse.llvm.org/t/rfc-introducing-an-llvm-memset-pattern-inline-intrinsic/79496),
the intent is that the intrinsic will be lowered to loops, a sequence of
stores, or libcalls depending on the expected cost and availability of
libcalls on the target. Right now, there's just a single lowering path
that aims to handle all cases. My intent would be to follow up with
additional PRs that add additional optimisations when possible (e.g.
when libcalls are available, when arguments are known to be constant
etc).
Commit: fa5a10d6313e94795739c79eb3c0774d5f8e3461
https://github.com/llvm/llvm-project/commit/fa5a10d6313e94795739c79eb3c0774d5f8e3461
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaCUDA.cpp
Log Message:
-----------
[clang] [NFC] Merge two ifs to a single one (#116226)
Commit: 8ee638fd175245eff88d77e1607e478db237dd41
https://github.com/llvm/llvm-project/commit/8ee638fd175245eff88d77e1607e478db237dd41
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/Transforms/HotColdSplit/X86/do-not-split.ll
M llvm/test/Transforms/HotColdSplit/addr-taken.ll
M llvm/test/Transforms/HotColdSplit/apply-noreturn-bonus.ll
M llvm/test/Transforms/HotColdSplit/apply-penalty-for-inputs.ll
M llvm/test/Transforms/HotColdSplit/apply-penalty-for-outputs.ll
M llvm/test/Transforms/HotColdSplit/eh-typeid-for.ll
M llvm/test/Transforms/HotColdSplit/forward-dfs-reaches-marked-block.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-2.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-3.ll
M llvm/test/Transforms/HotColdSplit/minsize.ll
M llvm/test/Transforms/HotColdSplit/outline-cold-asm.ll
M llvm/test/Transforms/HotColdSplit/outline-disjoint-diamonds.ll
M llvm/test/Transforms/HotColdSplit/phi-with-distinct-outlined-values.ll
M llvm/test/Transforms/HotColdSplit/section-splitting-custom.ll
M llvm/test/Transforms/HotColdSplit/section-splitting-default.ll
M llvm/test/Transforms/HotColdSplit/split-cold-2.ll
M llvm/test/Transforms/HotColdSplit/succ-block-with-self-edge.ll
M llvm/test/Transforms/HotColdSplit/swifterror.ll
M llvm/test/Transforms/IndVarSimplify/2003-12-10-RemoveInstrCrash.ll
M llvm/test/Transforms/IndVarSimplify/2003-12-15-Crash.ll
M llvm/test/Transforms/IndVarSimplify/2005-11-18-Crash.ll
M llvm/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
M llvm/test/Transforms/IndVarSimplify/2009-05-24-useafterfree.ll
M llvm/test/Transforms/IndVarSimplify/2011-09-10-widen-nsw.ll
M llvm/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll
M llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll
M llvm/test/Transforms/IndVarSimplify/2014-06-21-congruent-constant.ll
M llvm/test/Transforms/IndVarSimplify/2020-12-15-trunc-bug-expensive-range-inference.ll
M llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
M llvm/test/Transforms/IndVarSimplify/X86/2011-11-15-multiexit.ll
M llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll
M llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr24804.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr24956.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr25576.ll
M llvm/test/Transforms/IndVarSimplify/X86/variable-stride-ivs-1.ll
M llvm/test/Transforms/IndVarSimplify/X86/verify-scev.ll
M llvm/test/Transforms/IndVarSimplify/avoid-i0.ll
M llvm/test/Transforms/IndVarSimplify/const_phi.ll
M llvm/test/Transforms/IndVarSimplify/crash.ll
M llvm/test/Transforms/IndVarSimplify/divide-pointer.ll
M llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
M llvm/test/Transforms/IndVarSimplify/lcssa-preservation.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate11.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate7.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate8.ll
M llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
M llvm/test/Transforms/IndVarSimplify/phi-uses-value-multiple-times.ll
M llvm/test/Transforms/IndVarSimplify/pr25578.ll
M llvm/test/Transforms/IndVarSimplify/pr26974.ll
M llvm/test/Transforms/IndVarSimplify/pr40454.ll
M llvm/test/Transforms/IndVarSimplify/sentinel.ll
M llvm/test/Transforms/IndVarSimplify/single-element-range.ll
M llvm/test/Transforms/Inline/infinite-loop-two-predecessors.ll
M llvm/test/Transforms/Inline/inline-indirect-chain.ll
M llvm/test/Transforms/Inline/inline-invoke-with-asm-call.ll
M llvm/test/Transforms/Inline/inline_cleanup.ll
M llvm/test/Transforms/Inline/pr33637.ll
M llvm/test/Transforms/Inline/pr53206.ll
M llvm/test/Transforms/InstSimplify/dead-code-removal.ll
M llvm/test/Transforms/InstSimplify/require-dominator.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#116161)
This PR removes tests with `br i1 undef` under
`llvm/tests/Transforms/HotColdSplit` and `llvm/tests/Transforms/I*`.
Commit: 6c1fc8213ee40896681ed84a3f91b1b5b56a4de8
https://github.com/llvm/llvm-project/commit/6c1fc8213ee40896681ed84a3f91b1b5b56a4de8
Author: Nikolay Panchenko <npanchen at modular.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/sub-gep.ll
Log Message:
-----------
[InstCombine] fold `sub(zext(ptrtoint),zext(ptrtoint))` (#115369)
On a 32-bit target if pointer arithmetic with `addrspace` is used in i64
computation, the missed folding in InstCombine results to suboptimal
performance, unlike same code compiled for 64bit target.
Commit: 6b9952759f66c8bc62ef4c6700f586053f009296
https://github.com/llvm/llvm-project/commit/6b9952759f66c8bc62ef4c6700f586053f009296
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/PhaseOrdering/switch-sext.ll
M llvm/test/Transforms/SimplifyCFG/ForwardSwitchConditionToPHI.ll
M llvm/test/Transforms/SimplifyCFG/HoistCode.ll
A llvm/test/Transforms/SimplifyCFG/switch-dup-bbs.ll
M llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll
Log Message:
-----------
[SimplifyCFG] Simplify switch instruction that has duplicate arms (#114262)
I noticed that the two C functions emitted different IR:
```
int switch_duplicate_arms(int switch_val, int v, int w) {
switch (switch_val) {
default:
break;
case 0:
w = v;
break;
case 1:
w = v;
break;
}
return w;
}
int if_duplicate_arms(int switch_val, int v, int w) {
if (switch_val == 0)
w = v;
else if (switch_val == 1)
w = v;
return v0;
}
```
We generate IR that looks like this:
```
define i32 @switch_duplicate_arms(i32 %0, i32 %1, i32 %2, i32 %3) {
switch i32 %1, label %7 [
i32 0, label %5
i32 1, label %6
]
5:
br label %7
6:
br label %7
7:
%8 = phi i32 [ %3, %4 ], [ %2, %6 ], [ %2, %5 ]
ret i32 %8
}
define i32 @if_duplicate_arms(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp ult i32 %1, 2
%6 = select i1 %5, i32 %2, i32 %3
ret i32 %6
}
```
For `switch_duplicate_arms`, taking case 0 and 1 are the same since %5
and %6
branch to the same location and the incoming values for %8 are the same
from
those blocks. We could remove one on the duplicate switch targets and
update
the switch with the single target.
On RISC-V, prior to this patch, we generate the following code:
```
switch_duplicate_arms:
li a4, 1
beq a1, a4, .LBB0_2
mv a0, a3
bnez a1, .LBB0_3
.LBB0_2:
mv a0, a2
.LBB0_3:
ret
if_duplicate_arms:
li a4, 2
mv a0, a2
bltu a1, a4, .LBB1_2
mv a0, a3
.LBB1_2:
ret
```
After this patch, the O3 code is optimized to the icmp + select pair,
which
gives us the same code gen as `if_duplicate_arms`, as desired. This
results
is one less branch instruction in the final assembly.
This may help with both code size and further switch simplification. I
found
that this patch causes no significant impact to spec2006/int/ref and
spec2017/intrate/ref.
---------
Co-authored-by: Min Hsu <min at myhsu.dev>
Commit: b828608ca1313a0b80055840bd896c7eb6709366
https://github.com/llvm/llvm-project/commit/b828608ca1313a0b80055840bd896c7eb6709366
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add maintainer for NumericalStabilitySanitizer (NFC) (#115899)
@alexander-shaposhnikov is already listed as the nsan maintainer on the
compiler-rt side
(https://github.com/llvm/llvm-project/blob/a55248789ed3f653740e0723d016203b9d585f26/compiler-rt/CODE_OWNERS.TXT#L75-L77),
so I'd like to mirror this to the LLVM part of the sanitizer as well.
Commit: dad9e4a1657b74bc351c1e98ce4774f32fdc77fc
https://github.com/llvm/llvm-project/commit/dad9e4a1657b74bc351c1e98ce4774f32fdc77fc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/XCore/float-intrinsics.ll
Log Message:
-----------
[RuntimeLibCalls] Consistently disable unavailable libcalls (#116214)
The logic for marking runtime libcalls unavailable currently duplicates
essentially the same logic for some random subset of targets, where
someone reported an issue and then someone went and fixed the issue for
that specific target only. However, the availability for most of these
is completely target independent. In particular:
* MULO_I128 is never available in libgcc
* Various I128 libcalls are not available for 32-bit targets in libgcc
* powi is never available in MSVCRT
Unify the logic for these, so we don't miss any targets. This fixes
https://github.com/llvm/llvm-project/issues/16778 on AArch64, which is
one of the targets that was previously missed in this logic.
Commit: 0fb8fac5d6c10610574e6e472670823eaff0c949
https://github.com/llvm/llvm-project/commit/0fb8fac5d6c10610574e6e472670823eaff0c949
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
R llvm/test/CodeGen/RISCV/memset-pattern.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
R llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
R llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
Revert "[IR] Initial introduction of llvm.experimental.memset_pattern (#97583)"
This reverts commit 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3.
Recent scheduling changes means tests need to be re-generated. Reverting
to green while I do that.
Commit: a9d94834cd91fe93d8723ac4232fe7becdca61a7
https://github.com/llvm/llvm-project/commit/a9d94834cd91fe93d8723ac4232fe7becdca61a7
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
A llvm/test/tools/llvm-dlltool/arm64ec-invalid-name.test
A llvm/test/tools/llvm-lib/arm64ec-invalid-name.test
Log Message:
-----------
[llvm-lib][llvm-dlltool] Fix handling of invalid ARM64EC function names (#116250)
This is a follow-up to #115567. Emit an error for invalid function
names, similar to MSVC's `lib.exe` behavior.
Returning an error from `writeImportLibrary` exposed bugs in error
handling by its callers, which have been addressed in this patch.
Commit: e6cc58922f5f36e1eecdaf2f44a5ef7501acc139
https://github.com/llvm/llvm-project/commit/e6cc58922f5f36e1eecdaf2f44a5ef7501acc139
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LLD] Add ARM64EC release note (#116282)
Commit: 298127dcbe2ecd1f3c49c2109ac96654778f20be
https://github.com/llvm/llvm-project/commit/298127dcbe2ecd1f3c49c2109ac96654778f20be
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
A llvm/test/CodeGen/RISCV/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Verifier/intrinsic-immarg.ll
A llvm/test/Verifier/memset-pattern.ll
Log Message:
-----------
Reapply [IR] Initial introduction of llvm.experimental.memset_pattern (#97583)
Relands 7ff3a9acd84654c9ec2939f45ba27f162ae7fbc3 after regenerating the
test case.
Supersedes the draft PR #94992, taking a different approach following
feedback:
* Lower in PreISelIntrinsicLowering
* Don't require that the number of bytes to set is a compile-time
constant
* Define llvm.memset_pattern rather than llvm.memset_pattern.inline
As discussed in the [RFC
thread](https://discourse.llvm.org/t/rfc-introducing-an-llvm-memset-pattern-inline-intrinsic/79496),
the intent is that the intrinsic will be lowered to loops, a sequence of
stores, or libcalls depending on the expected cost and availability of
libcalls on the target. Right now, there's just a single lowering path
that aims to handle all cases. My intent would be to follow up with
additional PRs that add additional optimisations when possible (e.g.
when libcalls are available, when arguments are known to be constant
etc).
Commit: 4d6a5fc702e568b0456c4d8f9e2307eb6d81e955
https://github.com/llvm/llvm-project/commit/4d6a5fc702e568b0456c4d8f9e2307eb6d81e955
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/DriverOptions.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
Log Message:
-----------
[Driver] Remove unused includes (NFC) (#116316)
Identified with misc-include-cleaner.
Commit: d73d5c8c9b56fadcbd89dd1dab71dca2c8f5e38d
https://github.com/llvm/llvm-project/commit/d73d5c8c9b56fadcbd89dd1dab71dca2c8f5e38d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
Log Message:
-----------
[MC] Remove unused includes (NFC) (#116317)
Identified with misc-include-cleaner.
Commit: 43570a2841e2a8f1efd00503beee751cc1e72513
https://github.com/llvm/llvm-project/commit/43570a2841e2a8f1efd00503beee751cc1e72513
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyNullifyDebugValueLists.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetObjectFile.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
Log Message:
-----------
[WebAssembly] Remove unused includes (NFC) (#116318)
Identified with misc-include-cleaner.
Commit: af3295bd3dccd91c102d6a9b0d30c30844967e02
https://github.com/llvm/llvm-project/commit/af3295bd3dccd91c102d6a9b0d30c30844967e02
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
Log Message:
-----------
[SLP]Enable splat ordering for loads
Enables splat support for loads with lanes> 2 or number of operands> 2.
Allows better detect splats of loads and reduces number of shuffles in
some cases.
X86, AVX512, -O3+LTO
Metric: size..text
results results0 diff
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 154867.00 156723.00 1.2%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12467735.00 12468023.00 0.0%
Better vectorization quality
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/115173
Commit: 1cab8d9adb7e039b73c87fd3b9a1186b76e198f5
https://github.com/llvm/llvm-project/commit/1cab8d9adb7e039b73c87fd3b9a1186b76e198f5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add maintainers for SandboxIR and SandboxVectorizer (#115896)
I'm currently looking through some recently added components, and
noticed that SandboxIR/SandboxVec don't have a listed maintainer. I'd
like to propose vporpo and slackito as the maintainers for this
component. vporpo is the one who originally proposed this and drives
most of the implementation effort. slackito is the second most active
contributor.
Commit: cdda76a8cfc3b0c5def836f68f6f58efba03e01c
https://github.com/llvm/llvm-project/commit/cdda76a8cfc3b0c5def836f68f6f58efba03e01c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/arm64ec-invalid-name.s
Log Message:
-----------
[LLD][COFF] Fix handling of invalid ARM64EC function names (#116252)
Since these symbols cannot be mangled or demangled, there is no symbol
to check for conflicts in `checkLazyECPair`, nor is there an alias to
create in `addUndefined`. Attempting to create an import library with
such symbols results in an error; the patch includes a test to ensure
the error is handled correctly.
This is a follow-up to #115567.
Commit: bc3b0fadd5120bd88ed6635583941f7763523c0a
https://github.com/llvm/llvm-project/commit/bc3b0fadd5120bd88ed6635583941f7763523c0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/AST/Type.h
Log Message:
-----------
[AST] Remove unnecessary include (NFC)
This was introduced in #115777, but isn't actually used.
Commit: f6e1d64458130643377511baeec430de67ddddfb
https://github.com/llvm/llvm-project/commit/f6e1d64458130643377511baeec430de67ddddfb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/segmented-stores.ll
Log Message:
-----------
[SLP]Enable interleaved stores support
Enables interaleaved stores, results in better estimation for segmented
stores for RISC-V
Reviewers: preames, topperc, RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/115354
Commit: 9513f2fdf2ad50f55726154a6b6a4aa463bc457f
https://github.com/llvm/llvm-project/commit/9513f2fdf2ad50f55726154a6b6a4aa463bc457f
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/test/ThinLTO/X86/memprof-aliased-location1.ll
M llvm/test/ThinLTO/X86/memprof-aliased-location2.ll
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/aliased-location1.ll
M llvm/test/Transforms/MemProfContextDisambiguation/aliased-location2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Verifier/memprof-metadata-bad.ll
Log Message:
-----------
[MemProf] Print full context hash when reporting hinted bytes (#114465)
Improve the information printed when -memprof-report-hinted-sizes is
enabled. Now print the full context hash computed from the original
profile, similar to what we do when reporting matching statistics. This
will make it easier to correlate with the profile.
Note that the full context hash must be computed at profile match time
and saved in the metadata and summary, because we may trim the context
during matching when it isn't needed for distinguishing hotness.
Similarly, due to the context trimming, we may have more than one full
context id and total size pair per MIB in the metadata and summary,
which now get a list of these pairs.
Remove the old aggregate size from the metadata and summary support.
One other change from the prior support is that we no longer write the
size information into the combined index for the LTO backends, which
don't use this information, which reduces unnecessary bloat in
distributed index files.
Commit: 3eb1bc5edfc69895bfdc0a8ddd31af3969e6aacc
https://github.com/llvm/llvm-project/commit/3eb1bc5edfc69895bfdc0a8ddd31af3969e6aacc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Clang] Change 'gpuintrin.h' to use target specific address spceas
Summary:
A recent patch allowed the target specific address spcaces to be handled
correctly. The one downside here is that we no long get semantic errors
for initializers, but that will error in the backend anyway.
Commit: 798a8941824dc2f83a169812e0edf7971d5f772b
https://github.com/llvm/llvm-project/commit/798a8941824dc2f83a169812e0edf7971d5f772b
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/test/MC/SystemZ/insn-bad-z13.s
M llvm/test/MC/SystemZ/insn-good-z13.s
M llvm/test/MC/SystemZ/insn-good.s
M llvm/test/MC/SystemZ/tokens.s
Log Message:
-----------
[SystemZ] Fix address operand parsing incompatibilities with GAS
The LLVM AsmParser showed different behavior compared to GAS when
parsing address operands in the following two ways:
- If the address operand only has a single register (no comma),
it is always interpreted as base register by GAS, even in the
vector-index case (vgef etc.) This means the following is
actually incorrect usage, as the base cannot be a vector
register: vgef %v0, 0(%v1), 0.
- GAS allows specifying a missing base register by using a
comma after the first register, e.g. vgef %v0, 0(%v1,), 0.
Commit: ff7fca7fa8646d73f884ab8a351e4178499c4d05
https://github.com/llvm/llvm-project/commit/ff7fca7fa8646d73f884ab8a351e4178499c4d05
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Lower/StatementContext.h
M flang/lib/Lower/Bridge.cpp
A flang/test/Lower/CUDA/cuda-return01.cuf
A flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Support memory cleanup at a return statement (#116304)
We generate `cuf.free` and `func.return` twice if a return statement
exists at the end of program.
```f90
program test
integer, device :: a(10)
return
end
```
```
% flang -x cuda test.cuf -mmlir --mlir-print-ir-after-all
error: loc("/path/to/test.cuf":3:3): 'func.return' op must be the last operation in the parent block
// -----// IR Dump After Fortran::lower::VerifierPass Failed () //----- //
```
Dumped IR:
```mlir
"func.func"() <{function_type = () -> (), sym_name = "_QQmain"}> ({
...
"cuf.free"(%5#1) <{data_attr = #cuf.cuda<device>}> : (!fir.ref<!fir.array<10xi32>>) -> ()
"func.return"() : () -> ()
"cuf.free"(%5#1) <{data_attr = #cuf.cuda<device>}> : (!fir.ref<!fir.array<10xi32>>) -> ()
"func.return"() : () -> ()
}
...
```
The routine `genExitRoutine` in `Bridge.cpp` is guarded by
`blockIsUnterminated()` to make sure that `func.return` is generated
only at the end of a block. However, we redundantly run
`bridge.fctCtx().finalizeAndKeep()` before `genExitRoutine` in this
case, resulting in two pairs of `cuf.free` and `func.return`. This PR
fixes `Bridge.cpp` by using `blockIsUnterminated()` to guard
`finalizeAndKeep` as well.
Commit: 0b344b4feff5cd04d63db7b914d783fd941fbda0
https://github.com/llvm/llvm-project/commit/0b344b4feff5cd04d63db7b914d783fd941fbda0
Author: higher-performance <higher.performance.github at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
Log Message:
-----------
Extend bugprone-use-after-move check to handle std::optional::reset() and std::any::reset() (#114255)
These need to be handled similarly to the standard smart pointers; they
all have a `reset` method.
Commit: 31ee667eb02c68ad186cb129f9dcb72a9d2222bc
https://github.com/llvm/llvm-project/commit/31ee667eb02c68ad186cb129f9dcb72a9d2222bc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
Log Message:
-----------
[Clang] Fix gpuintrin_lang test for OpenCL
Commit: f37bc8cfbfd47c89aedd43b68fd09b4525612f16
https://github.com/llvm/llvm-project/commit/f37bc8cfbfd47c89aedd43b68fd09b4525612f16
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/debugloc-load-select.ll
Log Message:
-----------
[DebugInfo][GVN] Propagate DebugLoc from load-of-select to select (#114233)
When replacing a load from a selected pointer with a select of the known
stored values, we currently assign no DebugLoc to the select; this patch
propagates the load's DebugLoc to the new select, since it is a direct
replacement.
Commit: fd5fcfb1e620823e4ec896fb8e0520c1e7286cdb
https://github.com/llvm/llvm-project/commit/fd5fcfb1e620823e4ec896fb8e0520c1e7286cdb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang] Add 'gpuintrin.h' to the release notes (#116410)
Commit: e67e09a77ea1e4802c0f6bc0409c9f5e9d1fae9a
https://github.com/llvm/llvm-project/commit/e67e09a77ea1e4802c0f6bc0409c9f5e9d1fae9a
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
M flang/test/Lower/OpenMP/Todo/reduction-modifiers.f90
A flang/test/Parser/OpenMP/scan.f90
M flang/test/Semantics/OpenMP/do05.f90
M flang/test/Semantics/OpenMP/nested-barrier.f90
M flang/test/Semantics/OpenMP/nested-master.f90
M flang/test/Semantics/OpenMP/nested-simd.f90
M flang/test/Semantics/OpenMP/ordered-simd.f90
M flang/test/Semantics/OpenMP/reduction-modifiers.f90
A flang/test/Semantics/OpenMP/scan1.f90
A flang/test/Semantics/OpenMP/scan2.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (#102792)
Commit: 92cc8051932c0e3dd3b20cb30af86621e8527f5d
https://github.com/llvm/llvm-project/commit/92cc8051932c0e3dd3b20cb30af86621e8527f5d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
Log Message:
-----------
[IR] Add ICmpInst::isCommutative and FCmpInst::isCommutative static wrappers (#116398)
Add static variants that can used with the Predicate enum directly.
Commit: 2188a56a752a886c43203d54b1079686b64ff49c
https://github.com/llvm/llvm-project/commit/2188a56a752a886c43203d54b1079686b64ff49c
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/dbgloc-merge-invoke.ll
Log Message:
-----------
[DebugInfo][SimplifyCFG] Fully propagate merged invoke DILocations (#114235)
Currently when we merge invokes as part of SimplifyCFG we apply a merge
of the invoke DILocations to the merged invoke. We also insert an
unconditional branch to the merged invoke at the positions previously
occupied by the original invokes; as this branch is part of the
substitution for the invoke it has replaced, we should propagate the
original invoke DebugLoc to it.
Commit: 2d48489cc35ec9bb1c15ff115595e62d67ca8989
https://github.com/llvm/llvm-project/commit/2d48489cc35ec9bb1c15ff115595e62d67ca8989
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/darwin-subframeworks.c
M llvm/lib/TextAPI/Utils.cpp
M llvm/test/tools/llvm-readtapi/stubify-delete.test
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (#115048)
* Have clang always append & pass System/Library/SubFrameworks when determining default sdk search paths.
* Teach clang-installapi to traverse there for framework input.
* Teach llvm-readtapi that the library files (TBD or binary) in there should be considered private.
resolves: rdar://137457006
Commit: e9e8f59dd4f88229b731a0b5951db176a03bd8c4
https://github.com/llvm/llvm-project/commit/e9e8f59dd4f88229b731a0b5951db176a03bd8c4
Author: Eric Astor <epastor at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/SemaCXX/attr-annotate-ast.cpp
Log Message:
-----------
[clang] Instantiate attributes on LabelDecls (#115924)
Start propagating attributes on (e.g.) labels inside of templated
functions to their instances.
Commit: 032014ef103157bfd8403418538e25f3f58efa9d
https://github.com/llvm/llvm-project/commit/032014ef103157bfd8403418538e25f3f58efa9d
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/test/CodeGen/PowerPC/const-nonsplat-array-init.ll
M llvm/test/CodeGen/PowerPC/const-splat-array-init.ll
M llvm/test/CodeGen/PowerPC/extract-and-store.ll
M llvm/test/CodeGen/PowerPC/f128-fma.ll
M llvm/test/CodeGen/PowerPC/f128-passByValue.ll
M llvm/test/CodeGen/PowerPC/merge_stores_dereferenceable.ll
M llvm/test/CodeGen/PowerPC/pr45301.ll
M llvm/test/CodeGen/PowerPC/pr47891.ll
M llvm/test/CodeGen/PowerPC/pr59074.ll
M llvm/test/CodeGen/PowerPC/swaps-le-1.ll
M llvm/test/CodeGen/PowerPC/vec-itofp.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
Log Message:
-----------
[PowerPC] Add `SDNPMemOperand` to some nodes (#115580)
Nodes created with `getMemIntrinsicNode` have memory operands. In order
for operands to be propagated to machine instructions, the nodes should
have `SDNPMemOperand` property.
Similar to 3c8c385a.
Commit: d82422f69c573d051cf08d6d267b619197aab363
https://github.com/llvm/llvm-project/commit/d82422f69c573d051cf08d6d267b619197aab363
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Remove errorOrWarn
Commit: f2e42d9324f488ef113b8d2157f52ef1699b95f9
https://github.com/llvm/llvm-project/commit/f2e42d9324f488ef113b8d2157f52ef1699b95f9
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/test/Dialect/Arith/int-range-interface.mlir
Log Message:
-----------
[mlir][IntRangeInference] Handle ceildivsi(INT_MIN, x > 1) as expected (#116284)
Fixes #115293
While the definition of ceildivsi is integer division, rounding up, most
implementations will use `-(-a / b)` for dividing `a ceildiv b` with `a`
negative and `b` positive.
Mathematically, and for most integers, these two definitions are
equivalent. However, with `a == INT_MIN`, the initial negation is a
noop, which means that, while divinding and rounding up would give a
negative result, `-((- INT_MIN) / b)` is `-(INT_MIN / b)`, which is
positive.
This commit adds a special case to ceilDivSI inference to handle this
case and bring it in line with the operational instead of the
mathematical semantics of ceiling division.
Commit: 3130691a6053f90e1bac8026645b7bf95d6279cc
https://github.com/llvm/llvm-project/commit/3130691a6053f90e1bac8026645b7bf95d6279cc
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[C23] Move WG14 N2754 to the TS 18661 section
This paper is about the quantum exponent of NAN, which only applies if
we support decimal floating-point types from the TS. That is why the
status changed from Unknown to No.
Commit: 0398cb4592aa72cae5828ccdc56a60568d404db0
https://github.com/llvm/llvm-project/commit/0398cb4592aa72cae5828ccdc56a60568d404db0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP][OpenACC] Use iterator_range in check-directive-struct… (#115872)
…ure, NFC
The OpenMP code is already using iterator_range, lift it to the shared
header file.
Commit: ef92aba52a58cda8d670de8ce936455949746468
https://github.com/llvm/llvm-project/commit/ef92aba52a58cda8d670de8ce936455949746468
Author: lialan <me at alanli.org>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
Log Message:
-----------
[MLIR] Fix VectorEmulateNarrowType constant op mask bug (#116064)
This commit adds support for handling mask constants generated by the
`arith.constant` op in the `VectorEmulateNarrowType` pattern.
Previously, this pattern would not match due to the lack of mask
constant handling in `getCompressedMaskOp`.
The changes include:
1. Updating `getCompressedMaskOp` to recognize and handle
`arith.constant` ops as mask value sources.
2. Handling cases where the mask is not aligned with the emulated load
width. The compressed mask is adjusted to account for the offset.
Limitations:
- The arith.constant op can only have 1-dimensional constant values.
Resolves: #115742
Signed-off-by: Alan Li <me at alanli.org>
Commit: 098b0d18add97dea94e16006486b2fded65e228d
https://github.com/llvm/llvm-project/commit/098b0d18add97dea94e16006486b2fded65e228d
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[LLD][AArch64] Detach Landing Pad creation from Thunk creation (#116402)
Move Landing Pad Creation to a new function that checks each thunk every
pass to see if it needs a landing pad. This permits a thunk to be
created without needing a landing pad, but later needing one due to
drifting out of direct branch range and requiring an indirect branch.
We record all the Thunks created so far in a new vector rather than
trying to iterate over the DenseMap as we need a deterministic order of
adding LandingPadThunks due to the short branch fall through. We cannot
use normalizeExistingThunk() either as that only iterates through live
thunks.
Fixes: https://crbug.com/377438309
Original PR: https://github.com/llvm/llvm-project/pull/108989
Sending without a new test case to fix existing test. A new regression
test will come in a separate PR as coming up with a small enough
reproducer for this case is non-trivial.
Commit: bd9145c8c21334e099d51b3e66f49d51d24931ee
https://github.com/llvm/llvm-project/commit/bd9145c8c21334e099d51b3e66f49d51d24931ee
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
A llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
A llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
Log Message:
-----------
Reapply [AMDGPU] Avoid resource propagation for recursion through multiple functions (#112251)
I was wrong last patch. I viewed the `Visited` set purely as a possible
recursion deterrent where functions calling a callee multiple times are
handled elsewhere. This doesn't consider cases where a function is
called multiple times by different callers still part of the same call
graph. New test shows the aforementioned case.
Reapplies #111004, fixes #115562.
Commit: 47a0e24a3b6328d18b960fe6de200b309b6a3142
https://github.com/llvm/llvm-project/commit/47a0e24a3b6328d18b960fe6de200b309b6a3142
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[GISel][RISCV] Add G_SMIN/SMAX/UMIN/UMAX to GISelKnownBits::computeNumSignBits. (#116321)
Commit: 1e492285f33ca7c7efa97671990d47a32eaf31f7
https://github.com/llvm/llvm-project/commit/1e492285f33ca7c7efa97671990d47a32eaf31f7
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Include runtimes for armv8.1m.main-none-eabi (#116420)
These are needed by some of our users.
Commit: 9a5e5e28eca97ca06adc0cc60273dcf6cd61e32f
https://github.com/llvm/llvm-project/commit/9a5e5e28eca97ca06adc0cc60273dcf6cd61e32f
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
Log Message:
-----------
[AMDGPU] Newly added test modified for recent SGPR use change (#116427)
Mistimed rebase for #112251 which added new tests which did not consider
the changes introduced in #112403 yet
Commit: 92f3f2710641003a7bc558e6d766ea6be6c099b9
https://github.com/llvm/llvm-project/commit/92f3f2710641003a7bc558e6d766ea6be6c099b9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/add.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/implicit-def.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/load.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/splatvector-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sub.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vmclr-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vmclr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/zext.mir
Log Message:
-----------
[RISCV][GISel] Remove -disable-gisel-legality-check from most RVV tests. NFC
Commit: 94eebf721a2f8630412730f51d5071816a686ea0
https://github.com/llvm/llvm-project/commit/94eebf721a2f8630412730f51d5071816a686ea0
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
A llvm/test/Transforms/InstSimplify/select-equivalence-fp.ll
Log Message:
-----------
InstSimplify: support floating-point equivalences (#115152)
Since cd16b07 (IR: introduce CmpInst::isEquivalence), there is now an
isEquivalence routine in CmpInst that we can use to determine
equivalence in simplifySelectWithICmpEq. Implement this, extending the
code from integer-equalities to integer and floating-point equivalences.
Commit: 3734e4c0c4966f794b9588445448004fee769ab9
https://github.com/llvm/llvm-project/commit/3734e4c0c4966f794b9588445448004fee769ab9
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp
M llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
Log Message:
-----------
[MergedLoadStore] Preserve common metadata when sinking stores. (#116382)
When sinking a store, preserve common metadata present on stores on both
sides of the diamond.
PR: https://github.com/llvm/llvm-project/pull/116382
Commit: ec353b7418e272e96cd63cc61bec586ab49da92f
https://github.com/llvm/llvm-project/commit/ec353b7418e272e96cd63cc61bec586ab49da92f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[memprof] Use llvm::function_ref instead of std::function (#116306)
We've seen bugs where we lost track of error states stored in the
functor because we passed the functor by value (that is,
std::function) as opposed to reference (llvm::function_ref).
This patch fixes a couple of places we pass functors by value.
While we are at it, this patch adds curly braces around a "for" loop
spanning multiple lines.
Commit: 9204eba9121546c0e9c16d8a75d5735bad9dee16
https://github.com/llvm/llvm-project/commit/9204eba9121546c0e9c16d8a75d5735bad9dee16
Author: Ognyan Mirev <12432824+OgnianM at users.noreply.github.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Headers/cuda_wrappers/new
Log Message:
-----------
Remove device override for operator new when the C++ standard >= 26 (#114056)
Related to https://github.com/llvm/llvm-project/issues/114048
Commit: 34ebfabc34476b73a3d65d3bd046c35ffab411c4
https://github.com/llvm/llvm-project/commit/34ebfabc34476b73a3d65d3bd046c35ffab411c4
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-alignment.c
Log Message:
-----------
[llvm][ARM] Restore the default to -mstrict-align on Apple firmwares (#115546)
This is a partial revert of e314622f204a01ffeda59cbe046dd403b01f8b74
rdar://139237593
Commit: 4b50ec43d03d9ba9b43edd9a4743951f6498b964
https://github.com/llvm/llvm-project/commit/4b50ec43d03d9ba9b43edd9a4743951f6498b964
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
Log Message:
-----------
[Clang] Avoid Using `byval` for `ndrange_t` when emitting `__enqueue_kernel_basic` (#116435)
AMDGPU disabled the use of `byval` for struct argument passing in commit
d77c620. However, when emitting `__enqueue_kernel_basic`, Clang still
adds the
`byval` attribute by default. Emitting the `byval` attribute by default
in this
context doesn’t seem like a good idea, as argument-passing conventions
are
highly target-dependent, and assumptions here could lead to issues. This
PR
removes the addition of the `byval` attribute, aligning the behavior
with other
`__enqueue_kernel_*` functions.
Commit: e8469f157725ffb8f0b707b7219e342ecc3429a8
https://github.com/llvm/llvm-project/commit/e8469f157725ffb8f0b707b7219e342ecc3429a8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Add support for character type in cuf.alloc and cuf.data_transfer (#116277)
Add support for character type in bytes computation
Commit: 012fad975ecf8649a24c75410b84758ff56c38f9
https://github.com/llvm/llvm-project/commit/012fad975ecf8649a24c75410b84758ff56c38f9
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize the box in memory when dst is emboxed (#116320)
Similar to #116289 but for the dst.
Commit: 3be3b33e570fbdf3be37952c0ed4ecd47f304948
https://github.com/llvm/llvm-project/commit/3be3b33e570fbdf3be37952c0ed4ecd47f304948
Author: vporpo <vporpodas at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Implement pack of scalars (#115549)
This patch implements packing of scalar operands when the vectorizer
decides to stop vectorizing. Packing is implemented with a sequence of
InsertElement instructions.
Packing vectors requires different instructions so it's implemented in a
follow-up patch.
Commit: 816c975ea7b27a784c8f0d6a9b92571ebc97d4a3
https://github.com/llvm/llvm-project/commit/816c975ea7b27a784c8f0d6a9b92571ebc97d4a3
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalMergeFunctions.h
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
A llvm/test/CodeGen/Generic/cgdata-merge-crash.ll
Log Message:
-----------
Fix crash from [CGData] Global Merge Functions (#112671) (#116241)
Module summary index is optional for this pass, and we shouldn't run it,
but import it as necessary.
Commit: 64c455077abe583f96fc19398712da9c1187ad61
https://github.com/llvm/llvm-project/commit/64c455077abe583f96fc19398712da9c1187ad61
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M clang/docs/AddressSanitizer.rst
M clang/docs/LeakSanitizer.rst
Log Message:
-----------
[docs][asan][lsan] Drop list of supported architechures (#116302)
Full list is quite long, and quality of implementation can
vary.
Drop the lists to avoid confusion like
https://github.com/rust-lang/rust/pull/123617#issuecomment-2471695102
We don't maintain these for other sanitizers.
Commit: b1fa9d154b3765cab951162f5e4777a824bc9fa7
https://github.com/llvm/llvm-project/commit/b1fa9d154b3765cab951162f5e4777a824bc9fa7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Correctly embox logical constant (#116445)
Commit: 57ed628fb397c6427f820fb217c8a58e67f8e10a
https://github.com/llvm/llvm-project/commit/57ed628fb397c6427f820fb217c8a58e67f8e10a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[memprof] Speed up caller-callee pair extraction (Part 2) (#116441)
This patch further speeds up the extraction of caller-callee pairs
from the profile.
Recall that we reconstruct a call stack by traversing the radix tree
from one of its leaf nodes toward a root. The implication is that
when we decode many different call stacks, we end up visiting nodes
near the root(s) repeatedly. That in turn adds many duplicates to our
data structure:
DenseMap<uint64_t, SmallVector<CallEdgeTy, 0>> Calls;
only to be deduplicated later with sort+unique for each vector.
This patch makes the extraction process more efficient by keeping
track of indices of the radix tree array we've visited so far and
terminating traversal as soon as we encounter an element previously
visited.
Note that even with this improvement, we still add at least one
caller-callee pair to the data structure above for each call stack
because we do need to add a caller-callee pair for the leaf node with
the callee GUID being 0.
Without this patch, it takes 4 seconds to extract caller-callee pairs
from a large MemProf profile. This patch shortenes that down to
900ms.
Commit: 0d38f64e7df94b062dde89627de28125f292b6bb
https://github.com/llvm/llvm-project/commit/0d38f64e7df94b062dde89627de28125f292b6bb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Remove MemProf format Version 0 (#116442)
This patch removes MemProf format Version 0 now that version 2 and 3
seem to be working well.
I'm not touching version 1 for now because some tests still rely on
version 1.
Note that Version 0 is identical to Version 1 except that the MemProf
section of the indexed format has a MemProf version field.
Commit: 1be98277547d3a9b9966f055c8e4939390ac4697
https://github.com/llvm/llvm-project/commit/1be98277547d3a9b9966f055c8e4939390ac4697
Author: vporpo <vporpodas at google.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Implement packing of vectors (#116447)
Up until now we could only support packing of scalar elements. This
patch fixes this by implementing packing of vector elements, by
generating extractelement and insertelement instruction pairs.
Commit: 131d73ed3483f2ad43a2c7c0834522c0150936bb
https://github.com/llvm/llvm-project/commit/131d73ed3483f2ad43a2c7c0834522c0150936bb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
Log Message:
-----------
[RegAlloc] Remove redundant prints of LiveInterval weight. (#116451)
LiveInterval::print has included the weight since early 2018. We don't
need to print again after we print the interval.
Commit: 6a0905d11ede27f2ac52338dc9d4bcd5c6e8a2f5
https://github.com/llvm/llvm-project/commit/6a0905d11ede27f2ac52338dc9d4bcd5c6e8a2f5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Add isel patterns for i16 load/store (#116293)
In order to support f16 load/store we need to make load/stores with s16
register type legal. If regbank selection doesn't pick the FPR bank,
we'll be left with a GPR load or store which we don't have isel patterns
for from SelectionDAG.
In order to add the patterns we need to make i16 a legal type for the
GPR register class.
Tests are currently disabling the legality check because I haven't
update the legalizer yet.
Commit: ab27253ad395881c0798ac5c8efc2f6fc2922399
https://github.com/llvm/llvm-project/commit/ab27253ad395881c0798ac5c8efc2f6fc2922399
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M lld/MachO/Driver.cpp
M lld/MachO/InputSection.h
A lld/test/MachO/cgdata-generate-merge.s
Log Message:
-----------
[CGData][lld-macho] Merge CG Data by LLD (#112674)
LLD now processes raw CG data for stable functions, similar to how it
handles raw CG data for the outliner's hash tree. This data is encoded
in the custom section (`__llvm_merge`) within object files. LLD merges
this information into the indexed CG data file specified by the
`-codegen-data-generate-path={path}` option. For the linker that does
not support this feature, we could use `llvm-cgdata` tool --
https://github.com/llvm/llvm-project/blob/main/llvm/docs/CommandGuide/llvm-cgdata.rst.
Depends on #115750.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: 43cb424a54c9452b60d96ef07d0699fc3b1ceb87
https://github.com/llvm/llvm-project/commit/43cb424a54c9452b60d96ef07d0699fc3b1ceb87
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Specialize entry point for scalar to desc data transfer (#116457)
The runtime Assign function is not meant to initialize an array from a
scalar. For that we need to use DoAssignFromSource. Update the data
transfer from scalar to descriptor to use a new entry point that use
this function underneath.
Commit: 70b9440c888b93217172f4eb425ff8b59b00ea24
https://github.com/llvm/llvm-project/commit/70b9440c888b93217172f4eb425ff8b59b00ea24
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
Revert "[flang][cuda] Specialize entry point for scalar to desc data transfer" (#116458)
Reverts llvm/llvm-project#116457
Commit: 309c890921b8d2f33e32aac4890317b887189a1f
https://github.com/llvm/llvm-project/commit/309c890921b8d2f33e32aac4890317b887189a1f
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[llvm] `APFloat`: Add helpers to query NaN/inf semantics (#116315)
`APFloat` changes extracted from #116176 as per reviewer comments.
Commit: 42be165dde50c29e1d104f38938c03c95b4471cf
https://github.com/llvm/llvm-project/commit/42be165dde50c29e1d104f38938c03c95b4471cf
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-11-15 (Fri, 15 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Runtime/freestanding-tools.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
Reland '[flang][cuda] Specialize entry point for scalar to desc data transfer'
Commit: ec0a27f6589c5407e98efd9ffcc5edd17c63a108
https://github.com/llvm/llvm-project/commit/ec0a27f6589c5407e98efd9ffcc5edd17c63a108
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/docs/doxygen.cfg.in
M clang/docs/tools/dump_ast_matchers.py
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M clang/unittests/ASTMatchers/CMakeLists.txt
R clang/utils/generate_ast_matcher_doc_tests.py
Log Message:
-----------
Revert "Reland: [clang][test] add testing for the AST matcher reference" (#116477)
Reverts llvm/llvm-project#112168
Commit: 2906fcadb8563a02949f852867cebc63e0539cb7
https://github.com/llvm/llvm-project/commit/2906fcadb8563a02949f852867cebc63e0539cb7
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelperArtifacts.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
Log Message:
-----------
[GlobalISel] Combine G_MERGE_VALUES of x and zero (#116283)
into zext x
LegalizerHelper has two padding strategies: undef or zero.
see LegalizerHelper:273
see LegalizerHelper:315
This PR is about zero sugar and Coke Zero.
; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES %a(s32),
[[C]](s32)
Please continue padding merge values.
// %bits_8_15:(s8) = G_CONSTANT i8 0
// %0:(s16) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8)
%bits_8_15 is defined by zero. For optimization, we pick zext.
// %0:_(s16) = G_ZEXT %bits_0_7:(s8)
The upper bits of %0 are zero and the lower bits come from %bits_0_7.
Commit: db115ba3efee9c940539667842a1092d8d956850
https://github.com/llvm/llvm-project/commit/db115ba3efee9c940539667842a1092d8d956850
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/rank-reduce-contraction-ops.mlir
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
Log Message:
-----------
[mlir][Linalg] Fix non-matmul linalg structured ops (#116412)
https://github.com/llvm/llvm-project/commit/3ad0148020ca91cc288bffd8ad36e25f7555a3bb
broke linalg structured ops other than MatmulOp.
The patch:
- Changes the printer to hide additional attributes, which weren't
hidden before: "indexing_maps".
- Changes the build of every linalg structured op to have an indexing
map for matmul.
These changes combined, hide the problem until you print the operation
in it's generic form.
Reproducer:
```mlir
func.func public @bug(%arg0 : tensor<5x10x20xf32>, %arg1 : tensor<5x20x40xf32>, %arg3 : tensor<5x10x40xf32>) -> tensor<5x10x40xf32> {
%out = linalg.batch_matmul ins(%arg0, %arg1 : tensor<5x10x20xf32>, tensor<5x20x40xf32>)
outs(%arg3 : tensor<5x10x40xf32>) -> tensor<5x10x40xf32>
func.return %out : tensor<5x10x40xf32>
}
```
Prints fine, with `mlir-opt <file>`, but if you do `mlir-opt
--mlir-print-op-generic <file>`:
```
#map = affine_map<(d0, d1, d2) -> (d0, d2)>
#map1 = affine_map<(d0, d1, d2) -> (d2, d1)>
#map2 = affine_map<(d0, d1, d2) -> (d0, d1)>
#map3 = affine_map<(d0, d1, d2, d3) -> (d0, d1, d3)>
#map4 = affine_map<(d0, d1, d2, d3) -> (d0, d3, d2)>
#map5 = affine_map<(d0, d1, d2, d3) -> (d0, d1, d2)>
"builtin.module"() ({
"func.func"() <{function_type = (tensor<5x10x20xf32>, tensor<5x20x40xf32>, tensor<5x10x40xf32>) -> tensor<5x10x40xf32>, sym_name = "bug", sym_visibility = "public"}> ({
^bb0(%arg0: tensor<5x10x20xf32>, %arg1: tensor<5x20x40xf32>, %arg2: tensor<5x10x40xf32>):
%0 = "linalg.batch_matmul"(%arg0, %arg1, %arg2) <{operandSegmentSizes = array<i32: 2, 1>}> ({
^bb0(%arg3: f32, %arg4: f32, %arg5: f32):
%1 = "arith.mulf"(%arg3, %arg4) <{fastmath = #arith.fastmath<none>}> : (f32, f32) -> f32
%2 = "arith.addf"(%arg5, %1) <{fastmath = #arith.fastmath<none>}> : (f32, f32) -> f32
"linalg.yield"(%2) : (f32) -> ()
}) {indexing_maps = [#map, #map1, #map2], linalg.memoized_indexing_maps = [#map3, #map4, #map5]} : (tensor<5x10x20xf32>, tensor<5x20x40xf32>, tensor<5x10x40xf32>) -> tensor<5x10x40xf32>
"func.return"(%0) : (tensor<5x10x40xf32>) -> ()
}) : () -> ()
}) : () -> ()
```
The batch_matmul operation's builder now always inserts a indexing_map
which is unrelated to the operation itself. This was caught when a
transformation from one LinalgStructuredOp to another, tried to pass
it's attributes to the other ops builder and there were multiple
indexing_map attributes in the result.
This patch fixes this by specializing the builders for MatmulOp with
indexing map information.
Commit: dc3156d8e6dc6494bc47ba074d0c990eb27b7564
https://github.com/llvm/llvm-project/commit/dc3156d8e6dc6494bc47ba074d0c990eb27b7564
Author: Martin Storsjö <martin at martin.st>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M openmp/runtime/cmake/LibompDefinitions.cmake
Log Message:
-----------
[OpenMP] Don't hardcode _WIN32_WINNT for MinGW targets (#115708)
Instead respect what the toolchain default is (or what the user sets via
CMAKE_CXX_FLAGS).
This fixes builds with libcxx, with mingw toolchains targeting
msvcrt.dll, after 5d8be4c036aa5ce4a94f1f37a9155d5c877e23db; after that
commit, the libcxx public headers reference symbols such as iswspace_l,
which are unavailable when targeting msvcrt.dll on older versions of
Windows (it's only available in msvcrt.dll since Windows Vista).
Commit: 89cb0eefcbb6303ba6813238d5ad37b103495d11
https://github.com/llvm/llvm-project/commit/89cb0eefcbb6303ba6813238d5ad37b103495d11
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
Log Message:
-----------
[AMDGPU] Move GCNPreRAOptimizations after MachineScheduler (#116211)
This is in preparation for adding a new optimization to the pass that
cares about the order of instructions. The existing optimization does
not care, so this just causes minor codegen differences.
Commit: b69f646c46de14279c35c3733e049f1e78e92983
https://github.com/llvm/llvm-project/commit/b69f646c46de14279c35c3733e049f1e78e92983
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
Log Message:
-----------
[AArch64] Remove unused SDNodes (NFC) (#116236)
The corresponding enum members were only used by `EmitMOPS`, which
immediately translated them to machine opcodes. Just pass the machine
opcodes instead.
Commit: f97f96492dd08cdcb4b83775f764f09a396ed610
https://github.com/llvm/llvm-project/commit/f97f96492dd08cdcb4b83775f764f09a396ed610
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll
Log Message:
-----------
[GlobalISel][ARM] Legalize reset_fpmode (#115859)
Implement lowering intrinsic `reset_fpmode` in Global Selector for ARM
target.
Commit: 100376a2fa07f59f11cc4a02c216aaef65d59294
https://github.com/llvm/llvm-project/commit/100376a2fa07f59f11cc4a02c216aaef65d59294
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/phi.ll
Log Message:
-----------
[AArch64] Add a test for phis of different types. NFC
Commit: 0fd6f684b9c84c32d6cbfd9742402e788b2879f1
https://github.com/llvm/llvm-project/commit/0fd6f684b9c84c32d6cbfd9742402e788b2879f1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libc++] Adjust workflow file for building the libc++ docker image (#116366)
Commit: 372344995568cae076477a8b0e98fcdec7c49379
https://github.com/llvm/llvm-project/commit/372344995568cae076477a8b0e98fcdec7c49379
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M offload/test/offloading/fortran/basic-target-region-1D-array-section.f90
M offload/test/offloading/fortran/basic-target-region-3D-array-section.f90
M offload/test/offloading/fortran/basic-target-region-3D-array.f90
M offload/test/offloading/fortran/constant-arr-index.f90
M offload/test/offloading/fortran/declare-target-vars-in-target-region.f90
M offload/test/offloading/fortran/double-target-call-with-declare-target.f90
M offload/test/offloading/fortran/dtype-array-constant-index-map.f90
A offload/test/offloading/fortran/dtype-member-map-syntax-1.f90
A offload/test/offloading/fortran/dtype-member-map-syntax-2.f90
M offload/test/offloading/fortran/dump_map_tables.f90
M offload/test/offloading/fortran/local-descriptor-map-regress.f90
M offload/test/offloading/fortran/target-depend.f90
M offload/test/offloading/fortran/target-map-all-common-block-members.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-alloca-array-of-dtype.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-alloca-array.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-and-alloca-array-v2.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-and-alloca-array.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-array-and-scalar.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-array-of-dtype.f90
M offload/test/offloading/fortran/target-map-allocatable-array-section-1d-bounds.f90
M offload/test/offloading/fortran/target-map-allocatable-array-section-3d-bounds.f90
A offload/test/offloading/fortran/target-map-allocatable-dtype.f90
M offload/test/offloading/fortran/target-map-allocatable-map-scopes.f90
M offload/test/offloading/fortran/target-map-common-block.f90
M offload/test/offloading/fortran/target-map-declare-target-link-common-block.f90
M offload/test/offloading/fortran/target-map-derived-type-full-1.f90
M offload/test/offloading/fortran/target-map-derived-type-full-2.f90
M offload/test/offloading/fortran/target-map-derived-type-full-implicit-1.f90
M offload/test/offloading/fortran/target-map-derived-type-full-implicit-2.f90
M offload/test/offloading/fortran/target-map-double-large-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-array-bounds.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-double-array-bounds.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-single-member.f90
A offload/test/offloading/fortran/target-map-dtype-3d-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-and-non-alloca-array.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-and-non-alloca-dtype.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-of-dtype.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-dtype-allocatable-array.f90
A offload/test/offloading/fortran/target-map-dtype-allocatable-scalar-and-array.f90
M offload/test/offloading/fortran/target-map-dtype-arr-bounds-member-enter-exit-update.f90
M offload/test/offloading/fortran/target-map-dtype-arr-bounds-member-enter-exit.f90
M offload/test/offloading/fortran/target-map-dtype-explicit-individual-array-member.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-3D-member-bounds.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-member-bounds.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-member.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-member.f90
M offload/test/offloading/fortran/target-map-enter-exit-allocatables.f90
M offload/test/offloading/fortran/target-map-enter-exit-array-2.f90
M offload/test/offloading/fortran/target-map-enter-exit-array-bounds.f90
M offload/test/offloading/fortran/target-map-enter-exit-array.f90
M offload/test/offloading/fortran/target-map-enter-exit-scalar.f90
M offload/test/offloading/fortran/target-map-first-common-block-member.f90
M offload/test/offloading/fortran/target-map-individual-dtype-member-map.f90
M offload/test/offloading/fortran/target-map-large-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-mix-imp-exp-common-block-members.f90
A offload/test/offloading/fortran/target-map-multi-alloca-dtypes-with-multi-alloca-members.f90
A offload/test/offloading/fortran/target-map-multi-alloca-dtypes-with-multi-mixed-members.f90
A offload/test/offloading/fortran/target-map-nested-alloca-dtype-3d-alloca-array-bounds.f90
A offload/test/offloading/fortran/target-map-nested-alloca-dtype-alloca-array-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-3d-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-and-non-alloca-array.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array-and-non-alloca-dtype.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array.f90
M offload/test/offloading/fortran/target-map-nested-dtype-complex-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-derived-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-single-member.f90
M offload/test/offloading/fortran/target-map-pointer-scopes-enter-exit.f90
M offload/test/offloading/fortran/target-map-pointer-target-array-section-3d-bounds.f90
M offload/test/offloading/fortran/target-map-pointer-target-scopes.f90
A offload/test/offloading/fortran/target-map-pointer-to-dtype-allocatable-member.f90
M offload/test/offloading/fortran/target-map-second-common-block-member.f90
M offload/test/offloading/fortran/target-map-two-dtype-explicit-member.f90
M offload/test/offloading/fortran/target-map-two-dtype-individual-member-array-1D-bounds.f90
M offload/test/offloading/fortran/target-map-two-dtype-mixed-implicit-explicit-capture-1.f90
M offload/test/offloading/fortran/target-map-two-dtype-mixed-implicit-explicit-capture-2.f90
M offload/test/offloading/fortran/target-map-two-dtype-multi-member-array-1D-bounds.f90
M offload/test/offloading/fortran/target-map-two-nested-dtype-member-array-map.f90
M offload/test/offloading/fortran/target-nested-target-data.f90
M offload/test/offloading/fortran/target-region-implicit-array.f90
Log Message:
-----------
[OpenMP] Allocatable explicit member mapping fortran offloading tests (#113555)
This PR is one in a series of 3 that aim to add support for explicit
member mapping of allocatable components in derived types within
OpenMP+Fortran for Flang.
This PR provides all of the runtime tests that are currently
upstreamable, unfortunately some of the other tests would require
linking of the fortran runtime for offload which we currently do not do.
But regardless, this is plenty to ensure that the mapping is working in
most cases.
Commit: b5db75bfce0feac70f95a8e10d4ceba068d07bd3
https://github.com/llvm/llvm-project/commit/b5db75bfce0feac70f95a8e10d4ceba068d07bd3
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
R mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
A mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
A mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
Log Message:
-----------
[OpenMP][MLIR] Descriptor explicit member map lowering changes (#113556)
This is one of 3 PRs in a PR stack that aims to add support for explicit
mapping of allocatable members in derived types.
The primary changes in this PR are the OpenMPToLLVMIRTranslation.cpp
changes, which are small and seek to alter the current member mapping to
add an additional map insertion for pointers. Effectively, if the member
is a pointer (currently indicated by having a varPtrPtr field) we add an
additional map for the pointer and then alter the subsequent mapping of
the member (the data) to utilise the member rather than the parents base
pointer. This appears to be necessary in certain cases when mapping
pointer data within record types to avoid segfaulting on device (due to
incorrect data mapping). In general this record type mapping may be
simplifiable in the future.
There are also additions of tests which should help to showcase the
affect of the changes above.
Commit: e508bacce45d4fb2ba07d02c55391b858000c3b3
https://github.com/llvm/llvm-project/commit/e508bacce45d4fb2ba07d02c55391b858000c3b3
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
A flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Transforms/omp-map-info-finalization.fir
M mlir/test/Target/LLVMIR/omptarget-data-use-dev-ordering.mlir
Log Message:
-----------
[Flang][OpenMP] Derived type explicit allocatable member mapping (#113557)
This PR is one of 3 in a PR stack, this is the primary change set which
seeks to extend the current derived type explicit member mapping support
to handle descriptor member mapping at arbitrary levels of nesting. The
PR stack seems to do this reasonably (from testing so far) but as you
can create quite complex mappings with derived types (in particular when
adding allocatable derived types or arrays of allocatable derived types)
I imagine there will be hiccups, which I am more than happy to address.
There will also be further extensions to this work to handle the
implicit auto-magical mapping of descriptor members in derived types and
a few other changes planned for the future (with some ideas on
optimizing things).
The changes in this PR primarily occur in the OpenMP lowering and the
OMPMapInfoFinalization pass.
In the OpenMP lowering several utility functions were added or extended
to support the generation of appropriate intermediate member mappings
which are currently required when the parent (or multiple parents) of a
mapped member are descriptor types. We need to map the entirety of these
types or do a "deep copy" for lack of a better term, where we map both
the base address and the descriptor as without the copying of both of
these we lack the information in the case of the descriptor to access
the member or attach the pointers data to the pointer and in the latter
case we require the base address to map the chunk of data. Currently we
do not segment descriptor based derived types as we do with regular
non-descriptor derived types, we effectively map their entirety in all
cases at the moment, I hope to address this at some point in the future
as it adds a fair bit of a performance penalty to having nestings of
allocatable derived types as an example. The process of mapping all
intermediate descriptor members in a members path only occurs if a
member has an allocatable or object parent in its symbol path or the
member itself is a member or allocatable. This occurs in the
createParentSymAndGenIntermediateMaps function, which will also generate
the appropriate address for the allocatable member within the derived
type to use as a the varPtr field of the map (for intermediate
allocatable maps and final allocatable mappings). In this case it's
necessary as we can't utilise the usual Fortran::lower functionality
such as gatherDataOperandAddrAndBounds without causing issues later in
the lowering due to extra allocas being spawned which seem to affect the
pointer attachment (at least this is my current assumption, it results
in memory access errors on the device due to incorrect map information
generation). This is similar to why we do not use the MLIR value
generated for this and utilise the original symbol provided when mapping
descriptor types external to derived types. Hopefully this can be
rectified in the future so this function can be simplified and more
closely aligned to the other type mappings. We also make use of
fir::CoordinateOp as opposed to the HLFIR version as the HLFIR version
doesn't support the appropriate lowering to FIR necessary at the moment,
we also cannot use a single CoordinateOp (similarly to a single GEP) as
when we index through a descriptor operation (BoxType) we encounter
issues later in the lowering, however in either case we need access to
intermediate descriptors so individual CoordinateOp's aid this
(although, being able to compress them into a smaller amount of
CoordinateOp's may simplify the IR and perhaps result in a better end
product, something to consider for the future).
The other large change area was in the OMPMapInfoFinalization pass,
where the pass had to be extended to support the expansion of box types
(or multiple nestings of box types) within derived types, or box type
derived types. This requires expanding each BoxType mapping from one
into two maps and then modifying all of the existing member indices of
the overarching parent mapping to account for the addition of these new
members alongside adjusting the existing member indices to support the
addition of these new maps which extend the original member indices (as
a base address of a box type is currently considered a member of the box
type at a position of 0 as when lowered to LLVM-IR it's a pointer
contained at this position in the descriptor type, however, this means
extending mapped children of this expanded descriptor type to
additionally incorporate the new member index in the correct location in
its own index list). I believe there is a reasonable amount of comments
that should aid in understanding this better, alongside the test
alterations for the pass.
A subset of the changes were also aimed at making some of the utilities
for packing and unpacking the DenseIntElementsAttr containing the member
indices shareable across the lowering and OMPMapInfoFinalization, this
required moving some functions to the Lower/Support/Utils.h header, and
transforming the lowering structure containing the member index data
into something more similar to the version used in
OMPMapInfoFinalization. There we also some other attempts at tidying
things up in relation to the member index data generation in the
lowering, some of which required creating a logical operator for the
OpenMP ID class so it can be utilised as a map key (it simply utilises
the symbol address for the moment as ordering isn't particularly
important).
Otherwise I have added a set of new tests encompassing some of the
mappings currently supported by this PR (unfortunately as you can have
arbitrary nestings of all shapes and types it's not very feasible to
cover them all).
Commit: 51809e4a26a8c6db6cce115822d185fe662dc0fc
https://github.com/llvm/llvm-project/commit/51809e4a26a8c6db6cce115822d185fe662dc0fc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-ld1.ll
Log Message:
-----------
[DAG] SimplifyDemandedVectorElts - add SimplifyMultipleUse handling to SEXT/ZEXT/TRUNC nodes (#116227)
Allows us to bypass multiple uses of a SEXT/ZEXT/TRUNC node operand
Commit: c95daac4c19fe54eeeb4d0ec5ca23f2673d1de71
https://github.com/llvm/llvm-project/commit/c95daac4c19fe54eeeb4d0ec5ca23f2673d1de71
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Spell out alias attribute/metadata violations are UB. (#116220)
Update the documentation for the noalias attribute, !alias.scope and
!loop.parallel_accesses metadata to clarify they are UB on voilation the
noalias property.
PR: https://github.com/llvm/llvm-project/pull/116220
---------
Co-authored-by: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Commit: e8a6624325e0c628ec23e5f124f1d2002f138dd5
https://github.com/llvm/llvm-project/commit/e8a6624325e0c628ec23e5f124f1d2002f138dd5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/LinkInModulesPass.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
Log Message:
-----------
[CodeGen] Remove unused includes (NFC) (#116459)
Identified with misc-include-cleaner.
Commit: 46d750be2e19220c318bc907dfaf6c61d3a0de92
https://github.com/llvm/llvm-project/commit/46d750be2e19220c318bc907dfaf6c61d3a0de92
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/ScopeInfo.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
Log Message:
-----------
[Sema] Remove unused includes (NFC) (#116461)
Identified with misc-include-cleaner.
Commit: b88e938b1f95e60a8dfe33d1b2b131027d1acf25
https://github.com/llvm/llvm-project/commit/b88e938b1f95e60a8dfe33d1b2b131027d1acf25
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[NFC] Remove whitespaces in `llvm/CMakeLists.txt`
Commit: 71b3b32c6ec8e4691b67b2571b4f44cdd15cb588
https://github.com/llvm/llvm-project/commit/71b3b32c6ec8e4691b67b2571b4f44cdd15cb588
Author: Maurice Heumann <MauriceHeumann at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/Driver/cl-zc.cpp
Log Message:
-----------
[Clang] [MS] Add /Zc:tlsGuards option to control tls guard emission (#113830)
This adds an option to control whether guards for on-demand TLS
initialization in combination with Microsoft's CXX ABI are emitted or
not.
The behaviour should match with Microsoft:
https://learn.microsoft.com/en-us/cpp/build/reference/zc-tlsguards?view=msvc-170
This fixes #103484
Commit: 1636580b0a9afb2272d94b125313e4b35e9af2a9
https://github.com/llvm/llvm-project/commit/1636580b0a9afb2272d94b125313e4b35e9af2a9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/fstream
M libcxx/include/strstream
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
Log Message:
-----------
[libc++] Avoid including <ostream> in <fstream> and <strstream> (#116014)
This reduces the include time of `<fstream>` from ~800ms to ~500ms.
Commit: 764834d63d5b1bf5852ae90acdedf66056c54c87
https://github.com/llvm/llvm-project/commit/764834d63d5b1bf5852ae90acdedf66056c54c87
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
A libcxx/include/__locale_dir/pad_and_output.h
M libcxx/include/__ostream/basic_ostream.h
A libcxx/include/__ostream/put_character_sequence.h
M libcxx/include/iomanip
M libcxx/include/locale
M libcxx/include/module.modulemap
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove <istream> and <ostream> includes from <iomanip> (#116223)
This reduces the include time of `<filesystem>` by ~50ms.
Commit: 15ca79998ae7f2a3919b8c1c3573730f4c5e13ed
https://github.com/llvm/llvm-project/commit/15ca79998ae7f2a3919b8c1c3573730f4c5e13ed
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 764834d63d5b
Commit: 4f48a81a620bc9280be4780f3554cdc9bda55bd3
https://github.com/llvm/llvm-project/commit/4f48a81a620bc9280be4780f3554cdc9bda55bd3
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/Makefile
A lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Support column breakpoints (#113787)
This commit adds support for column breakpoints to lldb-dap.
To do so, support for the `breakpointLocations` request was
added. To find all available breakpoint positions, we iterate over
the line table.
The `setBreakpoints` request already forwarded the column correctly to
`SBTarget::BreakpointCreateByLocation`. However, `SourceBreakpointMap`
did not keep track of multiple breakpoints in the same line. To do so,
the `SourceBreakpointMap` is now indexed by line+column instead of by
line only.
See http://jonasdevlieghere.com/post/lldb-column-breakpoints/ for a
high-level introduction to column breakpoints.
Commit: 47e6673006a0f27b39867f49b25bddc4e1116cd2
https://github.com/llvm/llvm-project/commit/47e6673006a0f27b39867f49b25bddc4e1116cd2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace toString(RelType) with operator<< while using ELFSyncStream
Commit: e2b4a700fd927e50a68ac0a42e4807a104495186
https://github.com/llvm/llvm-project/commit/e2b4a700fd927e50a68ac0a42e4807a104495186
Author: Tobias Hieta <tobias at hieta.se>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/release/merge-release-pr.py
Log Message:
-----------
[Utils] Fixed rebase in merge-release-pr script (#116340)
Recently GitHub changed something on their side so we no longer can
rebase release PR's with the API. This means that we now have to
manually rebase the PR locally and then push the results. This fixes
the script that I use to merge PRs to the release branch by changing
the rebase part to do the local rebase and also adds a new option
--rebase-only so that you can rebase the PRs easier.
Minor change is that the script now can take a URL to the pull request
as well as just the PR ID.
Commit: adb80d8a4cdc04936980fd88c6c8dd85ccac3135
https://github.com/llvm/llvm-project/commit/adb80d8a4cdc04936980fd88c6c8dd85ccac3135
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/__utility/scope_guard.h
Log Message:
-----------
[libc++] Address post-commit comments for __scope_guard (#116291)
Fixes #116204
Commit: dedc5159997ebd3573a2e6397ba9b08faeb1b015
https://github.com/llvm/llvm-project/commit/dedc5159997ebd3573a2e6397ba9b08faeb1b015
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__mutex/unique_lock.h
M libcxx/include/__system_error/system_error.h
A libcxx/include/__system_error/throw_system_error.h
M libcxx/include/__thread/thread.h
M libcxx/include/module.modulemap
M libcxx/include/print
M libcxx/include/shared_mutex
M libcxx/src/chrono.cpp
M libcxx/src/filesystem/filesystem_clock.cpp
M libcxx/src/random.cpp
M libcxx/src/system_error.cpp
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Avoid including <string> in <mutex> (#116254)
Commit: 3f67544b4dc81a3286e50d540a4fdabb161ea8b6
https://github.com/llvm/llvm-project/commit/3f67544b4dc81a3286e50d540a4fdabb161ea8b6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port dedc5159997e
Commit: 935d753c6dca0cd9bc5ea14fde5b00386ebcc5be
https://github.com/llvm/llvm-project/commit/935d753c6dca0cd9bc5ea14fde5b00386ebcc5be
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage fir ld1r combines. NFC
Commit: 612b779963c21c8028dc0651e956097b161b0a8a
https://github.com/llvm/llvm-project/commit/612b779963c21c8028dc0651e956097b161b0a8a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Update a comment (NFC) (#116500)
Note that Version0 has been removed in #116442.
Commit: 3fb83f65c4f38d7651b46d51b8e431417a69d539
https://github.com/llvm/llvm-project/commit/3fb83f65c4f38d7651b46d51b8e431417a69d539
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace toString(RelType) with operator<< while using ELFSyncStream
Commit: 797330e96c5abf0f1c623c1eb5ca69de28b484be
https://github.com/llvm/llvm-project/commit/797330e96c5abf0f1c623c1eb5ca69de28b484be
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/DepthFirstIterator.h
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/unittests/ADT/BreadthFirstIteratorTest.cpp
M llvm/unittests/ADT/DepthFirstIteratorTest.cpp
M llvm/unittests/ADT/PostOrderIteratorTest.cpp
Log Message:
-----------
[ADT][NFCI]: Fix iterator category for graph iterators with external storage (#116403)
Set the iterator category for graph iterators to input_iterator_tag when
the visited set is stored externally. In that case we can't provide
multi-pass guarantee, so we should not claim to be a forward iterator.
Fixes: #116400
Commit: 549413fa4034898250c506098c3602e0b07680a2
https://github.com/llvm/llvm-project/commit/549413fa4034898250c506098c3602e0b07680a2
Author: David Green <david.green at arm.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GIMatchTableExecutor.cpp
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
Log Message:
-----------
[AArch64][GlobalISel] Protect against folding loads across basic blocks.
isObviouslySafeToFold can look between a load and an instruction it can be
folded into, to check that no other memory operations prevents the fold. It
doesn't handle multiple basic blocks which we needs to guard against.
Commit: 58a971f42f1f2b2e25995c8cad439f4aa07c024d
https://github.com/llvm/llvm-project/commit/58a971f42f1f2b2e25995c8cad439f4aa07c024d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace contex-less toString(x) with toStr(ctx, x)
so that we can remove the global `ctx` from toString implementations.
Rename lld::toString (to lld::elf::toStr) to simplify name lookup (we
have many llvm::toString and another lld::toString(const llvm::opt::Arg
&)).
Commit: 64b9753d03946d8100e017a5cc4861d5d671c6d0
https://github.com/llvm/llvm-project/commit/64b9753d03946d8100e017a5cc4861d5d671c6d0
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/Analysis/BranchProbabilityInfoTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
Log Message:
-----------
[llvm] Replace `UndefValue` placeholders with `PoisonValue` in unit tests [NFC] (#116453)
This PR replaces all `UndefValue` act as placeholders with `PoisonValue`
in `llvm/unittests`.
Commit: a6755bdad1fb1a195841a2e803007dda029b5a6a
https://github.com/llvm/llvm-project/commit/a6755bdad1fb1a195841a2e803007dda029b5a6a
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Replace global ctx with getCtx()
Commit: 73e89cf66d4b88d568ff4c718ae7bf55588ef2be
https://github.com/llvm/llvm-project/commit/73e89cf66d4b88d568ff4c718ae7bf55588ef2be
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsFrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsMulMulBugPass.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
Log Message:
-----------
[Mips] Remove unused includes (NFC) (#116499)
Identified with misc-include-cleaner.
Commit: 764275949897533a4be0728250e69a94d228fbc5
https://github.com/llvm/llvm-project/commit/764275949897533a4be0728250e69a94d228fbc5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/MacroArgs.cpp
M clang/lib/Lex/MacroInfo.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPCallbacks.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/PreprocessingRecord.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/PreprocessorLexer.cpp
M clang/lib/Lex/TokenLexer.cpp
Log Message:
-----------
[Lex] Remove unused includes (NFC) (#116460)
Identified with misc-include-cleaner.
Commit: be5dad012eb75d61935f6c76034a8867f7443731
https://github.com/llvm/llvm-project/commit/be5dad012eb75d61935f6c76034a8867f7443731
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Target.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Replace internalLinkerError(getErrorLoc(ctx, buf) + ...) with InternalErr(ctx, buf)
and simplify `+ toStr(ctx, x)` to `<< x`.
The trailing '\n' << llvm::getBugReportMsg() is not very useful and
therefore removed.
Commit: 38870fe124eb5e6e24136f9d3e4551a62370faee
https://github.com/llvm/llvm-project/commit/38870fe124eb5e6e24136f9d3e4551a62370faee
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Remove unneeded toString(Error) when using ELFSyncStream
Commit: 6c19fa4bfc54a8cdb0c48b5024650ff5c630ea8d
https://github.com/llvm/llvm-project/commit/6c19fa4bfc54a8cdb0c48b5024650ff5c630ea8d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Remove unneeded toString(Error) when using ELFSyncStream
Commit: 4a6f59ac3c13e5c4df0b2deb3e6918d0ce219e57
https://github.com/llvm/llvm-project/commit/4a6f59ac3c13e5c4df0b2deb3e6918d0ce219e57
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Replace lld::warn with Warn(ctx)
Commit: 3f6a1d179305f266835242ac7d1e55249c50c074
https://github.com/llvm/llvm-project/commit/3f6a1d179305f266835242ac7d1e55249c50c074
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
Log Message:
-----------
Guard against self-assignment in the DominatorTreeBase move assignment operator. (#116464)
The `DominatorTreeBase` move assignment operator was not self-assignment
safe because the last thing it does before returning is to release all
resources held by the source object. This issue was reported by a static
analysis tool; no self-assignment is known to occur in practice.
Commit: 24c7d97cff189071a3c2195258bc52c7d0e609a5
https://github.com/llvm/llvm-project/commit/24c7d97cff189071a3c2195258bc52c7d0e609a5
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace context-less errorHandler() and error() with ctx.errHandler
Commit: baf59be89ba297b26aff9f62bbda161941512793
https://github.com/llvm/llvm-project/commit/baf59be89ba297b26aff9f62bbda161941512793
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[SelectionDAG] Fix return types of TC_RETURN for several targets (#116504)
TC_RETURN nodes do not have a glue result.
Commit: a626eb2a2fcda460eaad7bd6f2bdfdfa8f0f23c2
https://github.com/llvm/llvm-project/commit/a626eb2a2fcda460eaad7bd6f2bdfdfa8f0f23c2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Pass ctx to bAlloc/saver/uniqueSaver
Commit: ce13dd1f7e5a86dc2a60e12f90e958fb0c7daec0
https://github.com/llvm/llvm-project/commit/ce13dd1f7e5a86dc2a60e12f90e958fb0c7daec0
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputFiles.h
Log Message:
-----------
[ELF] Replace fatal with Fatal(ctx)
Commit: 3b75a5c4c84d17d6647ba079391722ed9be09f85
https://github.com/llvm/llvm-project/commit/3b75a5c4c84d17d6647ba079391722ed9be09f85
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Symbols.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Replace message(...) with Msg(ctx)
Commit: 4a67b93fe8ffa330f3e9018232589e75c58f5806
https://github.com/llvm/llvm-project/commit/4a67b93fe8ffa330f3e9018232589e75c58f5806
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Make checkError context-aware
Commit: 7d13775486b5e83959b0d96137176f366c41e13a
https://github.com/llvm/llvm-project/commit/7d13775486b5e83959b0d96137176f366c41e13a
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/DriverUtils.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Pass ctx &
Commit: 6f87d1437ebd6a72ee67f26fbe5b1fa906ffb574
https://github.com/llvm/llvm-project/commit/6f87d1437ebd6a72ee67f26fbe5b1fa906ffb574
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
Log Message:
-----------
[ELF] Initialize Ctx members
Prevent use of uninitialized memory when `ctx` becomes a local variable.
Commit: abbb0d9c94511c9e10ec2f5ca65f059b6fa5761f
https://github.com/llvm/llvm-project/commit/abbb0d9c94511c9e10ec2f5ca65f059b6fa5761f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Remove unneeded toStr(ctx, x) when using ELFSyncStream
This patch removes the last use of the global `elf::ctx` outside of
elf::link.
Commit: 33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f
https://github.com/llvm/llvm-project/commit/33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Move SharedFile::vernauxNum to Ctx
Commit: 7379a194d5c18de38e32c29ec5c60964e6784296
https://github.com/llvm/llvm-project/commit/7379a194d5c18de38e32c29ec5c60964e6784296
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/PPC64.cpp
Log Message:
-----------
[ELF] Replace PPC64 writeSequence static variables with bAlloc
to reduce global state.
Commit: 73bb022b469a32eb5aee30f2947f3cea5e903caa
https://github.com/llvm/llvm-project/commit/73bb022b469a32eb5aee30f2947f3cea5e903caa
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Remove global ctx
This commit completes the work that eliminates global variables like
config/target/inputSections/symTab from lld/ELF.
Key changes:
* Introduced `lld::elf::ctx` to encapsulate global state.
* Moved global variables into `Ctx lld::elf::ctx`
* Updated many functions to accept `Ctx &ctx`
* Made `ctx` a local variable (this commit)
If we don't count `static std::mutex`, this is the last major global
state within lld/ELF (minor ones like `SharedFile::vernauxNum`
(33ff9e43b4c5bdc3da31c6b11ad51d35a69bec5f) might not all be eliminated
yet).
Commit: dc6229bd662cf74a3f4fad75f1e7832123d00db7
https://github.com/llvm/llvm-project/commit/dc6229bd662cf74a3f4fad75f1e7832123d00db7
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[lld] Use context-aware outs() and errs()
Commit: 1bfe55aff5f01e81f268f4ba8dbf25c7fcebdc7c
https://github.com/llvm/llvm-project/commit/1bfe55aff5f01e81f268f4ba8dbf25c7fcebdc7c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/DriverUtils.cpp
M lld/COFF/Writer.cpp
Log Message:
-----------
[lld-link] Replace errorHandler() with ctx.e
errorHandler() uses the global state, which should be avoided in
lld/COFF code.
Commit: 5bb9465d35914e9833c4fe9278a855a4cd75c7af
https://github.com/llvm/llvm-project/commit/5bb9465d35914e9833c4fe9278a855a4cd75c7af
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
[llvm-exegesis] Reserve members in array
This patch reserves members in the RegisterSetUp vector as we statically
know the size.
Commit: 8c7c8eaa1933d24c1eb869ba85469908547e3677
https://github.com/llvm/llvm-project/commit/8c7c8eaa1933d24c1eb869ba85469908547e3677
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/DriverUtils.cpp
M lld/COFF/Writer.cpp
Log Message:
-----------
[lld-link] Replace global lld::errs() with ctx.e.errs()
Commit: fd9f3beb0f3f1745c0eb71e4dbd29ed7c1d04ff6
https://github.com/llvm/llvm-project/commit/fd9f3beb0f3f1745c0eb71e4dbd29ed7c1d04ff6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Upgrade a unit test to Version 3 (#116516)
I'm planning to remove MemProf Version 1, which is a maintenance
burden because it uses a different set of struct fields in
IndexedAllocationInfo and IndexedMemProfRecord compared to Version 2
and 3. (FWIW, Version 2 and 3 are much closer to each other.)
Before we remove the old version, we need to upgrade
test_memprof_merge to Version 3. Here are some remarks:
- Without this patch, we call Writer.addMemProfFrame, which I don't
think is correct. This way, we are adding IndexedMemProfRecord to
Writer2 without any frame. I'm changing that to
Writer2.addMemProfFrame.
- This patch adds a call to getCallStackMapping. Version 2 and 3
require a map from call stack IDs to call stacks.
- I'm calling makeRecordV2 instead of makeRecord to populate the
struct fields used by Version 2 and 3.
- Version 1 uses MemProfRecord::MemProfRecord (that is, a constructor)
to convert IndexedMemProfRecord to MemProfRecord. Version 2 and 3
use MemProfRecord::toMemProfRecord, a member function, to do the
same task.
Commit: 9664ce6d5955647d00eac7d74188008917857b21
https://github.com/llvm/llvm-project/commit/9664ce6d5955647d00eac7d74188008917857b21
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Simplify complex diagnostics
Commit: e57331ec6344fd0a5cd04e2f2da38d139cbf2417
https://github.com/llvm/llvm-project/commit/e57331ec6344fd0a5cd04e2f2da38d139cbf2417
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Move global relocMutex/undefs into Ctx
Commit: c1a6defd9ff1540638d660888c5f32ea5cf4fa7d
https://github.com/llvm/llvm-project/commit/c1a6defd9ff1540638d660888c5f32ea5cf4fa7d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[ELF] Make RelType a struct type
otherwise operator<<(const ELFSyncStream &s, RelType type) applies to
non-reloc-type uint32_t, which can be confusing.
Commit: 483516fd83f000fd6b2ac1cde943f5639f72b9e9
https://github.com/llvm/llvm-project/commit/483516fd83f000fd6b2ac1cde943f5639f72b9e9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] Remove unneeded Twine()
Commit: a6140af4f063f9b116e50d1b66b94fc912d822a4
https://github.com/llvm/llvm-project/commit/a6140af4f063f9b116e50d1b66b94fc912d822a4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
Log Message:
-----------
[Mips] Reduce number of selectVSplatUimm/Simm functions by using templates. (#116475)
The implementaton of methods only vary by what arguments they pass to
selectVSplatCommon.
Turn selectVSplatCommon into a virtual function and use template methods
in the base class to pass the immediate size.
Commit: 834457a1342c0a7e32fa36238c877636a19198ba
https://github.com/llvm/llvm-project/commit/834457a1342c0a7e32fa36238c877636a19198ba
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Simplify relocateNonAlloc diagnostic
Commit: ddc0eb70c8b60de9fa5e55f550ff3ac822c849f1
https://github.com/llvm/llvm-project/commit/ddc0eb70c8b60de9fa5e55f550ff3ac822c849f1
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/MinGW/Driver.cpp
Log Message:
-----------
[lld,MinGW] Use context-aware outs() and errs()
lld::outs() and lld::errs() use the global errorHandler() and should be
avoided.
Commit: 2f4572f5e7e2d7f4626e825404c11f07d191fb05
https://github.com/llvm/llvm-project/commit/2f4572f5e7e2d7f4626e825404c11f07d191fb05
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
Log Message:
-----------
[Mips] Change vsplat_imm_eq_1 to a ComplexPattern. (#116471)
Resolves a FIXME and avoids needing to workaround #116075.
Adding parentheses around the (vsplat_imm_eq_1) fixes the error cited in
the FIXME by changing the ComplexPattern from a leaf node to an
operator.
Commit: fcb6b132fa7284426349d6d0063d3a0ed8864683
https://github.com/llvm/llvm-project/commit/fcb6b132fa7284426349d6d0063d3a0ed8864683
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/COFF/DriverUtils.cpp
M lld/Common/ErrorHandler.cpp
M lld/MachO/Driver.cpp
M lld/MachO/Driver.h
M lld/MachO/DriverUtils.cpp
M lld/include/lld/Common/ErrorHandler.h
M lld/include/lld/Common/LLVM.h
M lld/wasm/Driver.cpp
Log Message:
-----------
[lld] Use context-aware outs() and errs()
For COFF and ELF that are mostly free of global states, lld::errs() and
lld::outs() should not be used. This migration change allows us to
remove lld::errs, which uses the global errorHandler().
Commit: 3c5f33717cc596df286c6439419b84db599681f9
https://github.com/llvm/llvm-project/commit/3c5f33717cc596df286c6439419b84db599681f9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove unused tablegen class. NFC
Commit: 34712c345561870de871e6831735a5683c9660c2
https://github.com/llvm/llvm-project/commit/34712c345561870de871e6831735a5683c9660c2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove unnecessary casts from some isel patterns. NFC
Commit: 275bcd02380fb3bd40b747ed320fcac266b971bc
https://github.com/llvm/llvm-project/commit/275bcd02380fb3bd40b747ed320fcac266b971bc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove some duplicate PatFrags. NFC
Commit: b3230dd452bc8eb9ab4479cdb98f944838cb58b6
https://github.com/llvm/llvm-project/commit/b3230dd452bc8eb9ab4479cdb98f944838cb58b6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
Log Message:
-----------
[Mips] Remove roots from ComplexPatterns that are never used as roots. NFC
Commit: 8f238f662c8237b88392f8a94469cd50d86636d6
https://github.com/llvm/llvm-project/commit/8f238f662c8237b88392f8a94469cd50d86636d6
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/LTO.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Make Ctx inherit from CommonLinkerContext
link calls `new CommonLinkerContext`. Now that `Ctx ctx` is a local
variable, we can make it inherit from CommonLinkerContext.
Commit: 2991a4e2097ab3f32d37fdceab08c658836e312c
https://github.com/llvm/llvm-project/commit/2991a4e2097ab3f32d37fdceab08c658836e312c
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace functions bAlloc/saver/uniqueSaver with member access
Commit: dbf37e956a0dd60ac84e3c08bc1fe8170cf44d22
https://github.com/llvm/llvm-project/commit/dbf37e956a0dd60ac84e3c08bc1fe8170cf44d22
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-16 (Sat, 16 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
Log Message:
-----------
[ELF] Move InputFile storage from make<> to LinkerDriver::files
Commit: 53dc4e7600f95ae232bc49b9051f77199e79ec13
https://github.com/llvm/llvm-project/commit/53dc4e7600f95ae232bc49b9051f77199e79ec13
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[ELF] createSyntheticSections: replace some make<> with unique_ptr
This removes some SpecificAlloc instantiations and makes lld smaller.
This drops the small memory waste due to the separate BumpPtrAllocator.
Commit: 5b1b6a62b8bd986adc711d0c0be5b6a8182be263
https://github.com/llvm/llvm-project/commit/5b1b6a62b8bd986adc711d0c0be5b6a8182be263
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Make elfHeader/programHeaders unique_ptr
This removes some SpecificAlloc instantiations, makes lld smaller, and
drops the small memory waste due to the separate BumpPtrAllocator.
Commit: 49b29368f72c493e61506b4203e7852f55e17062
https://github.com/llvm/llvm-project/commit/49b29368f72c493e61506b4203e7852f55e17062
Author: David Green <david.green at arm.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/phi.ll
Log Message:
-----------
[AArch64][GlobalISel] Expand handling of phi operations
Like other operations, non-power-2 vectors are widened to a power-2, larger
vectors with i128 elements are scalarized and smaller vectors are widened to be
at least 64bit.
Commit: f0b8025ca27f722777dcf3fe8b9e367d18bb2eb1
https://github.com/llvm/llvm-project/commit/f0b8025ca27f722777dcf3fe8b9e367d18bb2eb1
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
Log Message:
-----------
[mlir][Quant][NFC] Apply clang-format to `StripFuncQuantTypes.cpp` (#116535)
Commit: 811186764d1add4d83972db3ad0d2e7c96bb15a7
https://github.com/llvm/llvm-project/commit/811186764d1add4d83972db3ad0d2e7c96bb15a7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__ranges/to.h
Log Message:
-----------
[libc++] Fix a few problems found by clang-tidy
Commit: 206ee7191834186ae78bf57fcf21d29dd7ce24cf
https://github.com/llvm/llvm-project/commit/206ee7191834186ae78bf57fcf21d29dd7ce24cf
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Change vector tuple type's TypeSize to scalable (#114329)
Vector tuple is basically multiple grouped vector, so its size is also
determined by vscale, we need not to model it as a vector type but its
size need to be scalable.
Commit: 7c010bfdc540890e33c5db2424e0cfb9df08d410
https://github.com/llvm/llvm-project/commit/7c010bfdc540890e33c5db2424e0cfb9df08d410
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/include/__chrono/time_point.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/ratio
Log Message:
-----------
[libc++] Remove some unnecessary boilerplate in <__chrono/duration.h> (#116238)
Commit: 2edfa50e7fb8f34736b8d9d216ac908d08b2b0f8
https://github.com/llvm/llvm-project/commit/2edfa50e7fb8f34736b8d9d216ac908d08b2b0f8
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M offload/README.md
Log Message:
-----------
[Offload][NFC] Update README.md
Commit: 63aa8cf6becbeb4983e3d1a7fa3cd8a7c7147118
https://github.com/llvm/llvm-project/commit/63aa8cf6becbeb4983e3d1a7fa3cd8a7c7147118
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/ClangDataCollectorsEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
Log Message:
-----------
[NFC][Clang][TableGen] Fix file header comments (#116491)
Commit: 5c8c90d8212d8720fd8630aecc634bdff6261ad6
https://github.com/llvm/llvm-project/commit/5c8c90d8212d8720fd8630aecc634bdff6261ad6
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
M llvm/lib/LTO/LTOBackend.cpp
Log Message:
-----------
[NFC][LLVM] Fix a couple of build warnings (#116490)
- Fix `HANDLE_EXTENSION` macro redefinition warning in LTOBackend.cpp
- Fix "unnecessary brackets" around rf/df variable definitions warning.
Commit: 7e8bc5cf77bdda9e32b984b3fa91953361f24abb
https://github.com/llvm/llvm-project/commit/7e8bc5cf77bdda9e32b984b3fa91953361f24abb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
M llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
M llvm/lib/Target/Hexagon/HexagonGenMemAbsolute.cpp
M llvm/lib/Target/Hexagon/HexagonGenMux.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/Hexagon/HexagonPeephole.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
M llvm/lib/Target/Hexagon/RDFCopy.cpp
Log Message:
-----------
[Hexagon] Remove unused includes (NFC) (#116529)
Identified with misc-include-cleaner.
Commit: 5b7102d1f37eab7a8f17b7bf4124ca76fbdbd66d
https://github.com/llvm/llvm-project/commit/5b7102d1f37eab7a8f17b7bf4124ca76fbdbd66d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ObjectYAML/ArchiveEmitter.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLTypeHashing.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFYAML.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/ObjectYAML/MinidumpYAML.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/ObjectYAML/yaml2obj.cpp
Log Message:
-----------
[ObjectYAML] Remove unused includes (NFC) (#116530)
Identified with misc-include-cleaner.
Commit: 54dad9e269f365d0eff2f63c5ee843564eecca7e
https://github.com/llvm/llvm-project/commit/54dad9e269f365d0eff2f63c5ee843564eecca7e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/ObjCopy/Archive.cpp
M llvm/lib/ObjCopy/COFF/COFFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
M llvm/lib/ObjCopy/ObjCopy.cpp
M llvm/lib/ObjCopy/XCOFF/XCOFFObjcopy.cpp
M llvm/lib/ObjCopy/wasm/WasmObject.cpp
M llvm/lib/ObjCopy/wasm/WasmWriter.cpp
Log Message:
-----------
[ObjCopy] Remove unused includes (NFC) (#116534)
Identified with misc-include-cleaner.
Commit: dec6324cb05ac1d339c1b2bd43add968f2931c62
https://github.com/llvm/llvm-project/commit/dec6324cb05ac1d339c1b2bd43add968f2931c62
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/CommentCommandTraits.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DeclarationName.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OSLog.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtIterator.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTTBuilder.cpp
Log Message:
-----------
[AST] Remove unused includes (NFC) (#116549)
Identified with misc-include-cleaner.
Commit: 2d7ec7f0d39cb4b816fc9b9d535519c726980121
https://github.com/llvm/llvm-project/commit/2d7ec7f0d39cb4b816fc9b9d535519c726980121
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Rename the label for libc++ self-hosted runners (#116540)
Commit: 875d24c2302cf0194fdd44b012623f395a705863
https://github.com/llvm/llvm-project/commit/875d24c2302cf0194fdd44b012623f395a705863
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/Config.h
Log Message:
-----------
[ELF] Avoid list initialization with incomplete unique_ptr<OutputSection> member to work around clang < 16
Commit 5b1b6a62b8bd986adc711d0c0be5b6a8182be263 introduced the following
issue for older clang with libstdc++
```
In file included from /home/ray/llvm/lld/ELF/EhFrame.cpp:18:
In file included from /home/ray/llvm/lld/ELF/EhFrame.h:12:
In file included from /home/ray/llvm/lld/include/lld/Common/LLVM.h:21:
In file included from /home/ray/llvm/llvm/include/llvm/Support/Casting.h:20:
In file included from /usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/memory:78:
/usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/bits/unique_ptr.h:91:16: error: invalid application of 'sizeof' to an incomplete type 'lld::elf::OutputSection'
static_assert(sizeof(_Tp)>0,
^~~~~~~~~~~
/usr/lib64/gcc/x86_64-pc-linux-gnu/14.2.1/../../../../include/c++/14.2.1/bits/unique_ptr.h:398:4: note: in instantiation of member function 'std::default_delete<lld::elf::OutputSection>::operator()' requested here
get_deleter()(std::move(__ptr));
^
/home/ray/llvm/lld/ELF/Config.h:574:19: note: in instantiation of member function 'std::unique_ptr<lld::elf::OutputSection>::~unique_ptr' requested here
OutSections out{};
^
```
Commit: 0060c54e0da6d1429875da2d30895faa7562b706
https://github.com/llvm/llvm-project/commit/0060c54e0da6d1429875da2d30895faa7562b706
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp
M llvm/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugStringTableSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugSubsectionVisitor.cpp
M llvm/lib/DebugInfo/CodeView/GlobalTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/LazyRandomTypeCollection.cpp
M llvm/lib/DebugInfo/CodeView/MergingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/SymbolSerializer.cpp
M llvm/lib/DebugInfo/CodeView/TypeTableCollection.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/GSYM/ExtractRanges.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/DebugInfo/GSYM/InlineInfo.cpp
M llvm/lib/DebugInfo/GSYM/LookupResult.cpp
M llvm/lib/DebugInfo/GSYM/ObjectFileTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSort.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSupport.cpp
M llvm/lib/DebugInfo/LogicalView/LVReaderHandler.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/DebugInfo/PDB/Native/DbiModuleList.cpp
M llvm/lib/DebugInfo/PDB/Native/FormatUtil.cpp
M llvm/lib/DebugInfo/PDB/Native/GlobalsStream.cpp
M llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
M llvm/lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp
M llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumGlobals.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumInjectedSources.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumLineNumbers.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumSymbols.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeSession.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeArray.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeVTShape.cpp
M llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolCompiland.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFunc.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolPublicSymbol.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp
M llvm/lib/DebugInfo/Symbolize/Markup.cpp
M llvm/lib/DebugInfo/Symbolize/MarkupFilter.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
Log Message:
-----------
[DebugInfo] Remove unused includes (NFC) (#116551)
Identified with misc-include-cleaner.
Commit: 6d98f11f3b5498262917802323942c8dfc2a226f
https://github.com/llvm/llvm-project/commit/6d98f11f3b5498262917802323942c8dfc2a226f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] Work around extra "warning: $" with MSVC 14.41.34120
Commit: ec950b206353cfc36fb0701f1a77cc18aa2d18aa
https://github.com/llvm/llvm-project/commit/ec950b206353cfc36fb0701f1a77cc18aa2d18aa
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/test/ELF/aarch64-abs64-dyn.s
M lld/test/ELF/aarch64-cortex-a53-843419-address.s
M lld/test/ELF/aarch64-cortex-a53-843419-large.s
M lld/test/ELF/aarch64-cortex-a53-843419-large2.s
M lld/test/ELF/aarch64-cortex-a53-843419-nopatch.s
M lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
M lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
M lld/test/ELF/aarch64-fpic-abs16.s
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-adr_prel_lo21.s
M lld/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s
M lld/test/ELF/aarch64-fpic-got.s
M lld/test/ELF/aarch64-fpic-ldst32_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst64_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst8_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-prel16.s
M lld/test/ELF/aarch64-fpic-prel32.s
M lld/test/ELF/aarch64-fpic-prel64.s
M lld/test/ELF/aarch64-gnu-ifunc-address.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable2.s
M lld/test/ELF/aarch64-gnu-ifunc-nosym.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-gnu-ifunc.s
M lld/test/ELF/aarch64-gnu-ifunc2.s
M lld/test/ELF/aarch64-got-weak-undef.s
M lld/test/ELF/aarch64-ifunc-bti.s
M lld/test/ELF/aarch64-lo12-alignment.s
M lld/test/ELF/aarch64-memtag-android-abi.s
M lld/test/ELF/aarch64-memtag-globals.s
M lld/test/ELF/aarch64-undefined-weak.s
M lld/test/ELF/pack-dyn-relocs-loop.s
Log Message:
-----------
[ELF,test] Replace aarch64-none-* with aarch64
"none" is valid OS component and can cause confusion when used together
with linux/freebsd.
Commit: feb9b3701bf6650f91e12e7f4efbe72383f3f60b
https://github.com/llvm/llvm-project/commit/feb9b3701bf6650f91e12e7f4efbe72383f3f60b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Address post-commit comments for #113915.
Address post-commit comments for
https://github.com/llvm/llvm-project/pull/113915.
Commit: a8538b9138574142b9338ad0fce0f8ba1065fcbc
https://github.com/llvm/llvm-project/commit/a8538b9138574142b9338ad0fce0f8ba1065fcbc
Author: Julian Nagele <j.nagele at apple.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
A llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
Log Message:
-----------
[LV] Vectorize Epilogues for loops with small VF but high IC (#108190)
- Consider MainLoopVF * IC when determining whether Epilogue
Vectorization is profitable
- Allow the same VF for the Epilogue as for the main loop
- Use an upper bound for the trip count of the Epilogue when choosing
the Epilogue VF
PR: https://github.com/llvm/llvm-project/pull/108190
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: eed9af95e6133e94449c7be585bc3b5fad8ad769
https://github.com/llvm/llvm-project/commit/eed9af95e6133e94449c7be585bc3b5fad8ad769
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-load-store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
Log Message:
-----------
[RISCV][GISel] Make loads/stores with s16 register type and s16 memory type legal.
This is needed to support Zfh loads/stores.
This requires supporting extends from sext/zext form i16 and s16
G_FREEZE to support the current tests we have.
Commit: c4eeef32d5dc8ec7560edabf18ac29416a7551e5
https://github.com/llvm/llvm-project/commit/c4eeef32d5dc8ec7560edabf18ac29416a7551e5
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
[TBAA] Add test for generating pointer-tbaa for unnamed structs.
Currently we generate incorrect metadata not considering compatible
types in C.
Commit: 93a4244523b171c8a9cc2ba23e1107ef0ddf7436
https://github.com/llvm/llvm-project/commit/93a4244523b171c8a9cc2ba23e1107ef0ddf7436
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
Log Message:
-----------
[BOLT] Use new assembler directives for EH table emission (#116294)
When emitting C++ exception tables (LSDAs), BOLT used to estimate the
size of the tables beforehand. This implementation was necessary as the
assembler/streamer lacked the emitULEB128IntValue() functionality.
As I plan to introduce [u|s]uleb128-encoded exception tables in BOLT,
now is a perfect time to switch to the new API and eliminate the need
to pre-compute the size of the tables.
Commit: 315519917368dce841f1cb1e7b296846d13497c3
https://github.com/llvm/llvm-project/commit/315519917368dce841f1cb1e7b296846d13497c3
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
Log Message:
-----------
Thread safety analysis: Eliminate unneeded const_cast, NFC
Commit: 521c99627690e09ba25383c83232f94ff457f00c
https://github.com/llvm/llvm-project/commit/521c99627690e09ba25383c83232f94ff457f00c
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
Log Message:
-----------
[JITLink] Move Symbol to new block before updating size.
Symbol::setSize asserts that the new size does not overflow the containing
block, so we need to point the Symbol at the correct Block before updating its
size (otherwise we may get a spurious overflow assertion).
Commit: 224290d44899be4614eb6795aa514103cd76e597
https://github.com/llvm/llvm-project/commit/224290d44899be4614eb6795aa514103cd76e597
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
A llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
[ORC] Add LazyObjectLinkingLayer, lazy-linking support to llvm-jitlink (#116002)
LazyObjectLinkingLayer can be used to add object files that will not be linked
into the executor unless some function that they define is called at runtime.
(References to data members defined by these objects will still trigger
immediate linking)
To implement lazy linking, LazyObjectLinkingLayer uses the lazyReexports
utility to construct stubs for each function in a given object file, and an
ObjectLinkingLayer::Plugin to rename the function bodies at link-time. (Data
symbols are not renamed)
The llvm-jitlink utility is extended with a -lazy option that can be
passed before input files or archives to add them using the lazy linking
layer rather than the base ObjectLinkingLayer.
Commit: 723dec66f0a74888bb05862a543b0d7e7f96e1de
https://github.com/llvm/llvm-project/commit/723dec66f0a74888bb05862a543b0d7e7f96e1de
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 224290d44899
Commit: 826b845c9e97448395431be3e4e5da585bd98c5e
https://github.com/llvm/llvm-project/commit/826b845c9e97448395431be3e4e5da585bd98c5e
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
[X86] Support -march=diamondrapids (#113881)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 90e92239bd0706c44ef4add018c702e53101b253
https://github.com/llvm/llvm-project/commit/90e92239bd0706c44ef4add018c702e53101b253
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
Revert "[X86] Support -march=diamondrapids (#113881)" (#116563)
This reverts commit 826b845c9e97448395431be3e4e5da585bd98c5e.
Commit: 18ee00323f5fc22d32a74b636fcac84e697241f3
https://github.com/llvm/llvm-project/commit/18ee00323f5fc22d32a74b636fcac84e697241f3
Author: Alexander Belyaev <32522095+pifon2a at users.noreply.github.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][complex] Add a numerically-stable lowering for complex.expm1. (#115082)
The current conversion to Standard in the MLIR repo is not stable for
small imag(arg).
Commit: 6349c1c2819549565186f6b3b031b5f8fdd52bca
https://github.com/llvm/llvm-project/commit/6349c1c2819549565186f6b3b031b5f8fdd52bca
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Disable lazy-linking test on armv8 and powerpc.
These architectures are not supported yet.
Commit: c0cbcb4efe80eacfbfae1dac92657d7913270c4b
https://github.com/llvm/llvm-project/commit/c0cbcb4efe80eacfbfae1dac92657d7913270c4b
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Tweak lazy-link testcase's UNSUPPORTED condition for armv8a.
The previous attempt in 6349c1c28195 didn't seem to work: the test is still
failing as of https://lab.llvm.org/buildbot/#/builders/154/builds/7609.
Commit: 06011fee3ae0e9683aa8dbad50bf6ae35ee27e19
https://github.com/llvm/llvm-project/commit/06011fee3ae0e9683aa8dbad50bf6ae35ee27e19
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
Log Message:
-----------
[mlir] Fix -Wsign-compare in ComplexToStandard.cpp (NFC)
/llvm-project/mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp:529:21:
error: comparison of integers of different signs: 'int' and 'size_t' (aka 'unsigned long') [-Werror,-Wsign-compare]
529 | for (int i = 1; i < coefficients.size(); ++i) {
| ~ ^ ~~~~~~~~~~~~~~~~~~~
1 error generated.
Commit: 97836bed6357664f9b2fb87cfe10656b08309bac
https://github.com/llvm/llvm-project/commit/97836bed6357664f9b2fb87cfe10656b08309bac
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/cpus-intel.ll
Log Message:
-----------
Reland "[X86] Support -march=diamondrapids (#113881)" (#116564)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 61d1b7c5eded9b0e6e8adcd74cf181b3458656ed
https://github.com/llvm/llvm-project/commit/61d1b7c5eded9b0e6e8adcd74cf181b3458656ed
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
Log Message:
-----------
[ORC] Tweak lazy-link testcase's UNSUPPORTED condition for armv8a some more.
The change in c0cbcb4efe8 was insufficient: The armv8a subarch is a property of
the compiled testcase, not the test target triple. Having double-checked the
EPCIndirectionUtils::Create method we want to disable this test for all arm.*
prefixes except arm64 (we want the test to continue working on Darwin).
Commit: 92ffefe3510e0cbf5b9ded0f2e2caff4e6803f17
https://github.com/llvm/llvm-project/commit/92ffefe3510e0cbf5b9ded0f2e2caff4e6803f17
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
Log Message:
-----------
[Tablegen] Add more comments for result numbers to DAGISelEmitter.cpp (#116533)
Print what result number the Emit* nodes are storing their results in.
This makes it easy to track the inputs of later opcodes that consume
these results.
Commit: 45e882e2bfdb62b5930c22687525e0d8f7788f03
https://github.com/llvm/llvm-project/commit/45e882e2bfdb62b5930c22687525e0d8f7788f03
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
Log Message:
-----------
[RISCV] Add IsRV32 to some isel patterns not needed for RV64.
Commit: d9eda6b2f3843cf63fa36e7d5d670ca225cbcbd7
https://github.com/llvm/llvm-project/commit/d9eda6b2f3843cf63fa36e7d5d670ca225cbcbd7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/Inputs/input.ll
Log Message:
-----------
[MLGO] Remove extranous check lines from test input
This patch removes check lines from a test input. It was originally
copied from a test that had assertions automatically generated, but
given we only use it as an input, the check lines do absolutely nothing.
Remove them to improve readability of the test/prevent confusion.
Commit: 24feaab8380c69d5fa3eb8c21ef2d660913fd4a9
https://github.com/llvm/llvm-project/commit/24feaab8380c69d5fa3eb8c21ef2d660913fd4a9
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/statistics/basic/TestStats.py
A lldb/test/API/commands/statistics/basic/second.cpp
Log Message:
-----------
Fix statistics dump to report per-target (#113723)
"statistics dump" currently report the statistics of all targets in
debugger instead of current target. This is wrong because there is a
"statistics dump --all-targets" option that supposed to include
everything.
This PR fixes the issue by only report statistics for current target
instead of all. It also includes the change to reset statistics debug
info/symbol table parsing/indexing time during debugger destroy. This is
required so that we report current statistics if we plan to reuse
lldb/lldb-dap across debug sessions
---------
Co-authored-by: jeffreytan81 <jeffreytan at fb.com>
Commit: 686a291cdc909e9ab7c8659aa1cab82d0182d0d2
https://github.com/llvm/llvm-project/commit/686a291cdc909e9ab7c8659aa1cab82d0182d0d2
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
Log Message:
-----------
[ELF] Change Msg to respect stdoutOS
Commit: 1c4f335ec29c6bb269d0f8b2d6149d439312c69a
https://github.com/llvm/llvm-project/commit/1c4f335ec29c6bb269d0f8b2d6149d439312c69a
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/test/ELF/aarch64-feature-pauth.s
Log Message:
-----------
[PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (#113945)
Assume PAC instructions being supported with PAuth core info different from (0,0). The (0,0) value means that an ELF file is incompatible with PAuth - see https://github.com/ARM-software/abi-aa/blob/2024Q3/pauthabielf64/pauthabielf64.rst#core-information. With PAC non-hint instructions supported, `autia1716; br x17` can be replaced with `braa x17, x16; nop`, where `braa` is an authenticated branch instruction using IA key, discriminator from x16 and signed target address from x17.
Commit: fd3ff2007ab30c74772572798f3e494fdaac7ac2
https://github.com/llvm/llvm-project/commit/fd3ff2007ab30c74772572798f3e494fdaac7ac2
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/loop-directive.f90
A flang/test/Lower/OpenMP/loop-directive.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[flang][OpenMP] Add basic support to lower `loop` directive to MLIR (#114199)
Adds initial support for lowering the `loop` directive to MLIR.
The PR includes basic suport and testing for the following clauses:
* `collapse`
* `order`
* `private`
* `reduction`
Parent PR: #113911, only the latest commit is relevant to this PR.
Commit: 00aa08119aa03ea4722196bc7d0e84a4e2a044c7
https://github.com/llvm/llvm-project/commit/00aa08119aa03ea4722196bc7d0e84a4e2a044c7
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
[NFC] Clang format PeepholeOptimizer (#116325)
Commit: 3f9d02aae87b7c778b86cb79ebd4b64760653079
https://github.com/llvm/llvm-project/commit/3f9d02aae87b7c778b86cb79ebd4b64760653079
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/PeepholeOptimizer.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
M llvm/test/CodeGen/ARM/cmp1-peephole-thumb.mir
M llvm/test/CodeGen/Lanai/peephole-compare.mir
M llvm/test/CodeGen/PowerPC/bitcast-peephole.mir
Log Message:
-----------
[CodeGen][NewPM] Port PeepholeOptimizer to NPM (#116326)
With this, all machine SSA optimization passes are available in the new codegen pipeline.
Commit: 5ff52436fd0c7739765f1d849992713a3e9ae237
https://github.com/llvm/llvm-project/commit/5ff52436fd0c7739765f1d849992713a3e9ae237
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
Relax clang/test/CodeGen/tbaa-pointers.c for -Asserts.
Fixes c4eeef32d5dc (llvmorg-20-init-12475-gc4eeef32d5dc)
Commit: c2a3ed22695ee81f41452c8350c313c620aa75e6
https://github.com/llvm/llvm-project/commit/c2a3ed22695ee81f41452c8350c313c620aa75e6
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Bump libc++ CI to a more recent version of the Docker image (#116558)
The Docker image was built using the recently introduced Action that
builds and pushes to the LLVM Docker registry.
Commit: 3c31ee740669fc80ff1bb4ae3724aa778cd1659e
https://github.com/llvm/llvm-project/commit/3c31ee740669fc80ff1bb4ae3724aa778cd1659e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-17 (Sun, 17 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
Log Message:
-----------
[APInt] Call countTrailingZerosSlowCase() directly from isShiftedMask. NFC
We checked the single word case already and we already call
countLeadingZerosSlowCase and countPopulationSlowCase.
Commit: b4c0ef18226b7d1f82d71fc0171b99caec0d8d12
https://github.com/llvm/llvm-project/commit/b4c0ef18226b7d1f82d71fc0171b99caec0d8d12
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
Log Message:
-----------
[flang][OpenMP] Add MLIR lowering for `loop ... bind` (#114219)
Extends MLIR lowering support for the `loop` directive by adding
lowering support for the `bind` clause.
Parent PR: https://github.com/llvm/llvm-project/pull/114199, only the
latest commit is relevant to this PR.
Commit: 1dcb3db0ac1255bf556bf6b62d03a113bd5191d8
https://github.com/llvm/llvm-project/commit/1dcb3db0ac1255bf556bf6b62d03a113bd5191d8
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-phi.ll
M llvm/test/Transforms/LowerConstantIntrinsics/objectsize_basic.ll
Log Message:
-----------
[llvm] Fix behavior of llvm.objectsize in presence of negative / large offset (#115504)
The internal structure used to carry intermediate computations hold
signed values. If an object size happens to overflow signed values, we
can get invalid result, so make sure this situation never happens.
This is not very limitative as static allocation of such large values
should scarcely happen.
Commit: 63b926af5ff43a90dac285bbe0750e41e622eb3f
https://github.com/llvm/llvm-project/commit/63b926af5ff43a90dac285bbe0750e41e622eb3f
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
A mlir/test/Dialect/Linalg/lit.local.cfg
A mlir/test/Dialect/Linalg/td/generalize-pack.mlir
Log Message:
-----------
[mlir] Add apply_patterns.linalg.generalize_pack_unpack TD Op (#116373)
This PR introduces populateGeneralizePatterns, which collects the
following patterns:
* `GeneralizeOuterUnitDimsPackOpPattern`,
* `GeneralizeOuterUnitDimsUnPackOpPattern` (currently a TODO).
These patterns are wrapped in a new Transform Dialect Op:
`apply_patterns.linalg.generalize_pack_unpack`. This Op facilitates
creating more involved end-to-end compilation pipelines for
`tensor.pack` and `tensor.unpack` operations. It will be required in an
upcoming PR building on top of #115698.
No new tests are added in this PR. Instead, existing tests from:
* "generalize-tensor-pack.mlir"
are reused. To achieve this:
* I've updated the test to use
`transform.apply_patterns.linalg.generalize_pack_unpack` instead of
the flag
`--test-linalg-transform-patterns="test-generalize-tensor-pack"`,
avoiding artificial tests solely for the TD Op.
* The TD sequence is saved to a new file, "generalize_pack.mlir", and
pre-loaded using the option:
`--transform-preload-library='transform-library-paths=%p/td/generalize_pack.mlir'`
This avoids duplicating the sequence for every "split" in the input
file.
* Added "lit.local.cfg" to exclude the "test/Dialect/Linalg/td"
directory from test discovery, ensuring "generalize_pack.mlir" is
not treated as a test file.
Commit: 4548bff0e8139d4f375f1078dd50a74116eae0a2
https://github.com/llvm/llvm-project/commit/4548bff0e8139d4f375f1078dd50a74116eae0a2
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/test/IR/invalid-builtin-attributes.mlir
Log Message:
-----------
[mlir][Parser] Deduplicate floating-point parsing functionality (#116172)
The following functionality is duplicated in multiple places: trying to
parse an APFloat from a floating point literal or an integer in
hexadecimal representation (bit pattern). Move it to a common helper
function.
NFC apart from the slightly changed error messages. (We now print the
exact same error messages regardless of whether the float is parsed
standalone or inside of a tensor literal, etc.)
Commit: 4f78f8519056953d26102c7426fbb028caf13bc9
https://github.com/llvm/llvm-project/commit/4f78f8519056953d26102c7426fbb028caf13bc9
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAttributes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/decorations.mlir
Log Message:
-----------
[MLIR][SPIRV] Add definition and (de)serialization for cache controls (#115461)
[SPV_INTEL_cache_controls](https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_cache_controls.html)
defines decorations for load and store cache control. Add support for
this extension in the SPIR-V dialect.
As several `CacheControlLoadINTEL` and `CacheControlStoreINTEL` may be
applied to the same value, these are represented as array attributes.
(De)Serialization takes care of this representation.
---------
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: b5bc528c140f6dab6600a64c020cdbf6003e4d35
https://github.com/llvm/llvm-project/commit/b5bc528c140f6dab6600a64c020cdbf6003e4d35
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale_dir/pad_and_output.h
Log Message:
-----------
[libc++] Guard `__pad_and_output` with `_LIBCPP_HAS_LOCALIZATION` (#116580)
This fixes errors for no-localization builds (possibly introduced by
#116223).
Commit: 3fc5bb601ee1072605f1290b246874e01f3c26d9
https://github.com/llvm/llvm-project/commit/3fc5bb601ee1072605f1290b246874e01f3c26d9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
Log Message:
-----------
[Mips] Use getSignedConstant() for signed values (#116405)
This also adds a getSignedTargetConstant() helper, as these seem to be
fairly common in general.
Commit: 9a844a36eb9a21de27882b6193a82fda49986347
https://github.com/llvm/llvm-project/commit/9a844a36eb9a21de27882b6193a82fda49986347
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/cast-mul-select.ll
M llvm/test/Transforms/InstCombine/extract-select-agg.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
Log Message:
-----------
[InstCombine] Use InstSimplify in FoldOpIntoSelect (#116073)
Instead of only trying to constant fold the select arms, try to simplify
them. This subsumes https://github.com/llvm/llvm-project/pull/115969
which implements this for extractvalue only.
This is still fairly limited in that we will usually only call
FoldOpIntoSelect in the first place if we have a constant operand. This
can be relaxed in the future if worthwhile.
Commit: 6a12b43ac00096976a886bd6d3a1b70a804d09ca
https://github.com/llvm/llvm-project/commit/6a12b43ac00096976a886bd6d3a1b70a804d09ca
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .ci/generate_test_report.py
Log Message:
-----------
[ci] Fix error when no junit files are passed to report generator
This resulted in the style being None and despite the report being
empty as well, we tried to send it to the agent and Python can't
send None as an argument.
To fix this return "success" style and also check whether the
report has any content before calling the agent.
Commit: db90673d16e722726aa35fc009cbe6bd0b76b0c0
https://github.com/llvm/llvm-project/commit/db90673d16e722726aa35fc009cbe6bd0b76b0c0
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
Log Message:
-----------
[InstCombine] Re-queue users of phi when nsw/nuw flags of add are inferred (#113933)
This patch re-queue users of phi when one of its incoming add
instructions is updated. If an add instruction is updated, the analysis
results of phis may be improved. Thus we may further fold some users of
this phi node.
See the following case:
```
define i8 @trunc_in_loop_exit_block() {
; CHECK-LABEL: @trunc_in_loop_exit_block(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[IV_NEXT]], [[LOOP_LATCH]] ]
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[IV]], 100
; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_LATCH]], label [[EXIT:%.*]]
; CHECK: loop.latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT: br label [[LOOP]]
; CHECK: exit:
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[PHI]] to i8
; CHECK-NEXT: ret i8 [[TRUNC]]
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
%phi = phi i32 [ 1, %entry ], [ %iv.next, %loop.latch ]
%cmp = icmp ult i32 %iv, 100
br i1 %cmp, label %loop.latch, label %exit
loop.latch:
%iv.next = add i32 %iv, 1
br label %loop
exit:
%trunc = trunc i32 %phi to i8
ret i8 %trunc
}
```
`%iv u< 100` -> infer `nsw/nuw` for `%iv.next = add i32 %iv, 1`
-> `%iv` is non-negative -> infer `samesign` for `%cmp = icmp ult i32
%iv, 100`.
Without re-queuing users of phi nodes, we cannot improve `%cmp` in one
iteration.
Address review comment
https://github.com/llvm/llvm-project/pull/112642#discussion_r1804712271.
This patch also fixes some non-fixpoint issues in tests.
Commit: 4e7682b1c47d4bd81acb6bcb028b48a4ebff9117
https://github.com/llvm/llvm-project/commit/4e7682b1c47d4bd81acb6bcb028b48a4ebff9117
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.cpp
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_ranges-missing-section.s
Log Message:
-----------
[lldb] rm DWARFDebugRanges (#116379)
The class is only used from one place, which is trivial to implement
using the llvm class.
The main difference is that in the new implementation, the ranges are
parsed each time anew (instead of being parsed at startup and cached). I
believe this is fine because:
- this is already how things work with DWARF v5 debug_rnglists
- parsing debug_ranges is fairly fast (definitely faster than rnglists)
- generally, this result will be cached at a higher level anyway.
Browsing the code I did find one instance where that is not the case --
SymbolFileDWARF::ResolveFunctionAndBlock -- which is called each time we
resolve an address (to the block level). However, this function is
already pretty suboptimal: it first traverses the DIE tree (which
involves parsing all the DIE attributes) to find the correct block, then
it parses them again to construct the `lldb_private::Block`
representation, and *then* it uses the ID of the block DIE it found in
the first step to look up the `Block` object. If this turns out to be a
bottleneck, I think there are better ways to optimize it than caching
the debug_ranges parse.
The motiviation for this is that DWARFDebugRanges sorts the block
ranges, even though the order of the ranges is load-bearing (in the
absence of DW_AT_low_pc, the "base address" of a scope is determined by
the first range entry). Delaying the parsing (and sorting) step makes it
easier to access the first entry.
Commit: 0c04d43e8060f7b5bd4745c3400431abb3ad10b6
https://github.com/llvm/llvm-project/commit/0c04d43e8060f7b5bd4745c3400431abb3ad10b6
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[RISCV][NFC] refactor CFI emitting (#114227)
This patch refactor PR https://github.com/llvm/llvm-project/pull/110810
to remove code duplication.
Commit: 2b9edabe969e2f59f067ed7d49e2b0eca5411113
https://github.com/llvm/llvm-project/commit/2b9edabe969e2f59f067ed7d49e2b0eca5411113
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/docs/Dialects/Linalg/OpDSL.md
Log Message:
-----------
[docs] Add deprecation warning to OpDSL.md
As discussed in the forums, we're slowly moving ops away from OpDSL into TableGen. Adding a note to avoid people work on this area downstream.
Commit: 85a2d2df5777b7a0b468ec9c129f91fda1430240
https://github.com/llvm/llvm-project/commit/85a2d2df5777b7a0b468ec9c129f91fda1430240
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
Log Message:
-----------
[gn build] Port 4e7682b1c47d
Commit: 5a48162dc88e0c3db7bc0a63dee0eb3182ef00e3
https://github.com/llvm/llvm-project/commit/5a48162dc88e0c3db7bc0a63dee0eb3182ef00e3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
Log Message:
-----------
[libc++] Remove unnecessary std::vector accessors (#114423)
Now that we don't use __compressed_pair anymore inside std::vector, we
can remove some unnecessary accessors. This is a mechanical replacement
of the __alloc() and __end_cap() accessors, and similar for
std::vector<bool>.
Note that I consistently used this->__alloc_ instead of just __alloc_
since most of the code in <vector> uses that pattern to access members.
I don't think this is necessary anymore (and I'm even less certain I
like this), but I went for consistency with surrounding code. If we want
to change that, we can do a follow-up mechanical change.
Commit: 20d8f8ca1a9de3506c7cad55abcea501a0c57afa
https://github.com/llvm/llvm-project/commit/20d8f8ca1a9de3506c7cad55abcea501a0c57afa
Author: Bruno De Fraine <brunodf at synopsys.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/DebugInfo/X86/global-sra-struct-fit-segment.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/Transforms/GlobalOpt/globalsra-align.ll
A llvm/test/Transforms/GlobalOpt/pr115282.ll
Log Message:
-----------
[GlobalOpt] Fix global SRA incorrect alignment on some elements (#115328)
The logic had a flaw where the alignment from the original aggregate is
unintentionally retained for elements when the calculated known
alignment is not higher than the element's ABI type alignment.
Fixes #115282.
Commit: 20c653c3130899dc2d69003577a48c507891b89e
https://github.com/llvm/llvm-project/commit/20c653c3130899dc2d69003577a48c507891b89e
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
[bazel] port 63b926af5ff43a90dac285bbe0750e41e622eb3f
Commit: 9fc4654462c44569bab950c18d25ca7624f10691
https://github.com/llvm/llvm-project/commit/9fc4654462c44569bab950c18d25ca7624f10691
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Fix mislabeling in calling convention name (NFC)
We have explained how musttail can be guaranteed when the calling
convention is not `swifttailcc` or `tailcc`, ensure what needs to
adhere when it is the opposite case.
Commit: e370946978c3b50cc2716878122be332df554c6f
https://github.com/llvm/llvm-project/commit/e370946978c3b50cc2716878122be332df554c6f
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/member-pointers.cpp
Log Message:
-----------
[lldb] Infer MSInheritanceAttr for CXXRecordDecl with DWARF on Windows (#115177)
Following up from https://github.com/llvm/llvm-project/pull/112928, we
can reuse the approach from Clang Sema to infer the MSInheritanceModel
and add the necessary attribute manually. This allows the inspection of
member function pointers with DWARF on Windows.
Commit: 9d7026500df1023cee67c5bd10119e1ca9805241
https://github.com/llvm/llvm-project/commit/9d7026500df1023cee67c5bd10119e1ca9805241
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
Log Message:
-----------
[RISCV] Correct the precedence in isVRegClass (#116579)
Right shift has higher precedence than bitwise and, so it should be
parentheses around & operator. This case works as expected because
IsVRegClassShift is 0, other cases will fail.
Commit: 37feced61eb576aa93e2ea2dea700246b67e3a62
https://github.com/llvm/llvm-project/commit/37feced61eb576aa93e2ea2dea700246b67e3a62
Author: sondre-teigen <sondre.teigen at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][Tosa] Fix typo in avg_pool2d summary (#116538)
Commit: b64095c795ad0fd264bddd63b834bca431673f04
https://github.com/llvm/llvm-project/commit/b64095c795ad0fd264bddd63b834bca431673f04
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] port e370946978c3b50cc2716878122be332df554c6f
Commit: a6385a3fc8a88f092d07672210a1e773481c2919
https://github.com/llvm/llvm-project/commit/a6385a3fc8a88f092d07672210a1e773481c2919
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[mlir][OpenMP][NFC] use llvm::zip_equal for firstprivate copy region translation (#116416)
I think this is a bit easier to read.
Commit: 2f925d75dee8b4012d747d889ac4bb1d8a31d5a0
https://github.com/llvm/llvm-project/commit/2f925d75dee8b4012d747d889ac4bb1d8a31d5a0
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
Log Message:
-----------
[mlir][Vector] Move insert/extractelement distribution patterns to insert/extract (#116425)
This is a NFC-ish change that moves
vector.extractelement/vector.insertelement vector distribution patterns
to vector.insert/vector.extract.
Before:
0-d/1-d vector.extract -> vector.extractelement -> distributed
vector.extractelement
2-d+ vector.extract -> distributed vector.extract
After:
scalar input vector.extract -> distributed vector.extract
vector.extractelement -> distributed vector.extract
2d+ vector.extract -> distributed vector.extract
The same changes are done for insertelement/insert. The change allows us
to remove reliance on vector.extractelement/vector.insertelement, which
are soon to be depreciated:
https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops/71116/8
No extra tests are included because this patch doesn't introduce /
remove any functionality. It only changes the chain of lowerings. This
change can be completly NFC if we make the distributed operation
vector.extractelement/vector.insertelement, but that is slightly weird,
because you are going from extractelement -> extract -> extractelement.
Commit: ad3b291879b781b974b02091b9115f444fcbf59d
https://github.com/llvm/llvm-project/commit/ad3b291879b781b974b02091b9115f444fcbf59d
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
Log Message:
-----------
[MLIR][SPIRV] Add definition for `SPV_INTEL_split_barrier` ops (#115738)
The [`SPV_INTEL_split_barrier` extension](https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_split_barrier.html)
defines operations to split control barrier semantics in two operations.
Add support for these operations (arrive and wait) to the dialect.
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 030179c2cb113ab35e5cc71229816075e51dd8ab
https://github.com/llvm/llvm-project/commit/030179c2cb113ab35e5cc71229816075e51dd8ab
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
A flang/test/Transforms/debug-class-type.fir
Log Message:
-----------
[flang][debug] Support ClassType. (#114809)
This PR adds the handling of `ClassType`. It is treated as pointer to
the underlying type. Note that `ClassType` when passed to the function
have double indirection so it is represented as pointer to type
(compared to other types which may have a single indirection).
If `ClassType` wraps a pointer or allocatable then we take care to
generate it as PTR -> type (and not PTR -> PTR -> type).
This is how it looks like in the debugger.
```
subroutine test_proc (this)
class(test_type), intent (inout) :: this
allocate (this%b (3, 2))
call fill_array_2d (this%b)
print *, this%a
end
```
```
(gdb) p this
$6 = (PTR TO -> ( Type test_type )) 0x2052a0
(gdb) p this%a
$7 = 0
(gdb) p this%b
$8 = ((1, 2, 3) (4, 5, 6))
```
Commit: c25c6c32494c8d1038438b6208d42ba40f25270e
https://github.com/llvm/llvm-project/commit/c25c6c32494c8d1038438b6208d42ba40f25270e
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/unittests/Host/MainLoopTest.cpp
Log Message:
-----------
[lldb] Unify/improve MainLoop signal handling (#115197)
Change the signal handler to use a pipe to notify about incoming
signals. This has two benefits:
- the signal no longer has to happen on the MainLoop thread. With the
previous implementation, this had to be the case as that was the only
way to ensure that ppoll gets interrupted correctly. In a multithreaded
process, this would mean that all other threads have to have the signal
blocked at all times.
- we don't need the android-specific workaround, which was necessary due
to the syscall being implemented in a non-atomic way
When the MainLoop class was first implemented, we did not have the
interrupt self-pipe, so syscall interruption was the most
straight-forward implementation. Over time, the class gained new
abilities (the pipe being one of them), so we can now piggy-back on
those.
This patch also changes the kevent-based implementation to use the pipe
for signal notification as well. The motivation there is slightly
different:
- it makes the implementations more uniform
- it makes sure we handle all kinds of signals, like we do with the
linux version (EVFILT_SIGNAL only catches process-directed signals)
Commit: 1e4646d8191b13ac9c4d8c2cd3bb20a184f1966f
https://github.com/llvm/llvm-project/commit/1e4646d8191b13ac9c4d8c2cd3bb20a184f1966f
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in reduce add function. (#116243)
Part of #51787.
This patch adds constexpr support for the built-in reduce add function.
If this is the right way to go, I will add support for other reduce
functions in later patches.
---------
Co-authored-by: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Commit: 4c4a4134d5c0a0f9476b157862d378a7e571e9f0
https://github.com/llvm/llvm-project/commit/4c4a4134d5c0a0f9476b157862d378a7e571e9f0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Lower/OpenMP/Todo/defaultmap-clause.f90
M flang/test/Lower/OpenMP/Todo/task_detach.f90
M flang/test/Lower/OpenMP/Todo/task_untied.f90
A flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v50.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
Log Message:
-----------
[flang][OpenMP] Update frontend support for DEFAULTMAP clause (#116506)
Add ALL variable category, implement semantic checks to verify the
validity of the clause, improve error messages, add testcases.
The variable category modifier is optional since 5.0, make sure we allow
it to be missing. If it is missing, assume "all" in clause conversion.
Commit: 696c108703896e528c6b88824ba10402261f8635
https://github.com/llvm/llvm-project/commit/696c108703896e528c6b88824ba10402261f8635
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/test/MinGW/driver.test
Log Message:
-----------
[LLD][MinGW] Add support for --functionpadmin option (#116511)
This introduces the MinGW counterpart of `lld-link`'s `-functionpadmin`.
Commit: 40ea61b41d3b70ccf39d5ec11ac54100c9b0b388
https://github.com/llvm/llvm-project/commit/40ea61b41d3b70ccf39d5ec11ac54100c9b0b388
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw.cpp
Log Message:
-----------
[Clang][MinGW] Pass --functionpadmin to the linker when -fms-hotpatch is used (#116512)
Commit: 748a29f052749b9938480edbf29717bd6742fc66
https://github.com/llvm/llvm-project/commit/748a29f052749b9938480edbf29717bd6742fc66
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/include/__memory/allocator_arg_t.h
Log Message:
-----------
[libc++][NFC] Fix incorrect include guard
Commit: 222f6aff3db1cfee0a1461482584dc374886da73
https://github.com/llvm/llvm-project/commit/222f6aff3db1cfee0a1461482584dc374886da73
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_util.h
Log Message:
-----------
[libc] Remove more libc dependencies from the RPC header (#116437)
Summary:
The end goal is to make `rpc.h` a standalone header so that other
projects can include it without leaking `libc` internals. I'm trying to
replace stuff slowly before pulling it out all at once to reduce the
size of the changes.
This patch removes the atomic and a few sparse dependencies. Now we
mostly rely on the GPU utils, the sleep function, optional, and the
type traits. I'll clean these up in future patches. This removed the old
stuff I had around the memcpy, but I think that it's not quite as bad as
it once was, as it removes a branch and only uses a few extra VGPRs
since I believe the builtin memcpy was improved for AMD.
Commit: 32506126fb9c7fa38f215ec2fafa3ad4f17469db
https://github.com/llvm/llvm-project/commit/32506126fb9c7fa38f215ec2fafa3ad4f17469db
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/test/tools/llvm-readobj/ELF/reloc-types-aarch64.test
Log Message:
-----------
[PAC][llvm-readobj][ELF][AArch64] Define static AUTH TLSDESC relocations (#113716)
See specification https://github.com/ARM-software/abi-aa/pull/295
Commit: 756fe54dc7f7e7fcdfefb11d8f51b1687322daf7
https://github.com/llvm/llvm-project/commit/756fe54dc7f7e7fcdfefb11d8f51b1687322daf7
Author: Steven Perron <stevenperron at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
Log Message:
-----------
[SPIRV] Add write to image buffer for shaders. (#115927)
This commit adds an intrinsic that will write to an image buffer. We
chose to match the name of the DXIL intrinsic for simplicity in clang.
We cannot reuse the existing openCL write_image function because that is
not a reserved name in HLSL. There is not much common code to factor
out.
Commit: a52cb0a2b9c44cdd3b36e414b8d2b809ec8b2ec8
https://github.com/llvm/llvm-project/commit/a52cb0a2b9c44cdd3b36e414b8d2b809ec8b2ec8
Author: Romain Thomas <7450402+romainthomas at users.noreply.github.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
Log Message:
-----------
[PDB] Fix missing `consumeError` which raise error with asserts enabled (#116480)
As mentioned in the title, the missing `consumeError` triggers assertions.
Commit: abda8ce2ee2ad35af7f069fab851adaa4646d0ef
https://github.com/llvm/llvm-project/commit/abda8ce2ee2ad35af7f069fab851adaa4646d0ef
Author: André Rösti <an.roesti at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
M llvm/lib/MCA/HardwareUnits/LSUnit.cpp
M llvm/lib/MCA/HardwareUnits/Scheduler.cpp
Log Message:
-----------
llvm-mca: Disentangle `MemoryGroup` from `LSUnitBase` (#114159)
In MCA, the load/store unit is modeled through a `LSUnitBase` class.
Judging from the name `LSUnitBase`, I believe there is an intent to
allow for different specialized load/store unit implementations.
(However, currently there is only one implementation used in-tree,
`LSUnit`.)
PR #101534 fixed one instance where the specialized `LSUnit` was
hard-coded, opening the door for other subclasses to be used, but what
subclasses can do is, in my opinion, still overly limited due to a
reliance on the `MemoryGroup` class, e.g.
[here](https://github.com/llvm/llvm-project/blob/8b55162e195783dd27e1c69fb4d97971ef76725b/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#L88).
The `MemoryGroup` class is currently used in the default `LSUnit`
implementation to model data dependencies/hazards in the pipeline.
`MemoryGroups` form a graph of memory dependencies that inform the
scheduler when load/store instructions can be executed relative to each
other.
In my eyes, this is an implementation detail. Other `LSUnit`s may want
to keep track of data dependencies in different ways. As a concrete
example, a downstream use I am working on<sup>[1]</sup> uses a custom
load/store unit that makes use of available aliasing information. I
haven't been able to shoehorn our additional aliasing information into
the existing `MemoryGroup` abstraction. I think there is no need to
force subclasses to use `MemoryGroup`s; users of `LSUnitBase` are only
concerned with when, and for how long, a load/store instruction
executes.
This PR makes changes to instead leave it up to the subclasses how to
model such dependencies, and only prescribes an abstract interface in
`LSUnitBase`. It also moves data members and methods that are not
necessary to provide an abstract interface from `LSUnitBase` to the
`LSUnit` subclass. I decided to make the `MemoryGroup` a protected
subclass of `LSUnit`; that way, specializations may inherit from
`LSUnit` and still make use of `MemoryGroup`s if they wish to do so
(e.g. if they want to only overwrite the `dispatch` method).
**Drawbacks / Considerations**
My reason for suggesting this PR is an out-of-tree use. As such, these
changes don't introduce any new functionality for in-tree LLVM uses.
However, in my opinion, these changes improve code clarity and prescribe
a clear interface, which would be the main benefit for the LLVM
community.
A drawback of the more abstract interface is that virtual dispatching is
used in more places. However, note that virtual dispatch is already
currently used in some critical parts of the `LSUnitBase`, e.g. the
`isAvailable` and `dispatch` methods. As a quick check to ensure these
changes don't significantly negatively impact performance, I also ran
`time llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2
-iterations=3000 llvm/test/tools/llvm-mca/X86/BtVer2/dot-product.s`
before and after the changes; there was no observable difference in
runtimes (`0.292 s` total before, `0.286 s` total after changes).
<sup>[1]: MCAD started by @mshockwave and @chinmaydd.</sup>
Commit: 6e1acdcdc1b33c8d3cccf09b8d38279eef2ba69e
https://github.com/llvm/llvm-project/commit/6e1acdcdc1b33c8d3cccf09b8d38279eef2ba69e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Host/posix/MainLoopPosix.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Host/posix/MainLoopPosix.cpp:64:11: error: unused
variable 'bytes_written' [-Werror,-Wunused-variable]
Commit: 834dfd23155351c9885eddf7b9664f7697326946
https://github.com/llvm/llvm-project/commit/834dfd23155351c9885eddf7b9664f7697326946
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
R clang/include/clang/Parse/ParseDiagnostic.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/module.modulemap
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
Log Message:
-----------
[Parse] Remove ParseDiagnostic.h (#116496)
This patch removes clang/Parse/ParseDiagnostic.h because it just
forwards to clang/Basic/DiagnosticParse.h.
Commit: ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52
https://github.com/llvm/llvm-project/commit/ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRFrameLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRSubtarget.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetObjectFile.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.cpp
M llvm/lib/Target/BPF/BPFIRPeephole.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFPreserveDIType.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/GISel/BPFCallLowering.cpp
M llvm/lib/Target/BPF/GISel/BPFInstructionSelector.cpp
M llvm/lib/Target/BPF/GISel/BPFLegalizerInfo.cpp
M llvm/lib/Target/BPF/GISel/BPFRegisterBankInfo.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSubtarget.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
M llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp
M llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
M llvm/lib/Target/SystemZ/SystemZTDC.cpp
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/LVLGen.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEFrameLowering.cpp
M llvm/lib/Target/VE/VEISelDAGToDAG.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VERegisterInfo.cpp
M llvm/lib/Target/VE/VESubtarget.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
Log Message:
-----------
[Target] Remove unused includes (NFC) (#116577)
Identified with misc-include-cleaner.
Commit: 8f8016fe66dd260b03a4d1c2b50636e36e02942b
https://github.com/llvm/llvm-project/commit/8f8016fe66dd260b03a4d1c2b50636e36e02942b
Author: Hugh Delaney <hugh.delaney at codeplay.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
A llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
A llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
Log Message:
-----------
[NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (#114977)
Add patterns to lower `fmaxnum(fma(a, b, c), 0)` to `fma.rn{.ftz}.relu`
for `f16`, `f16x2`, `bf16`, `bf16x2` types, when `nnan` is used.
`fma_relu` honours `NaN`, so the substitution is only made if the `fma`
is `nnan`, since `fmaxnum` returns the non NaN argument when passed a
NaN value.
This patch also removes some `bf16` ftz instructions since `FTZ` is not
supported with the `bf16` type, according to the PTX ISA docs.
Commit: c25e09e238c6f872a116d10bbefba0beff145a57
https://github.com/llvm/llvm-project/commit/c25e09e238c6f872a116d10bbefba0beff145a57
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/GenerateInput.h
Log Message:
-----------
[libc++][test] Speed up input generating functions for benchmark tests (#115544)
The input generating functions for benchmark tests in the GenerateInput.h
file can be slightly improved by invoking vector::reserve before calling
vector::push_back. This slight performance improvement could potentially
speed-up all benchmark tests for containers and algorithms that use these
functions as inputs.
Commit: 52361d0368b79841be12156bf03cf8c1851e5df7
https://github.com/llvm/llvm-project/commit/52361d0368b79841be12156bf03cf8c1851e5df7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
Log Message:
-----------
[ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627)
This patch bails out non-dedicated exits to avoid adding exiting
conditions to invalid context.
Closes https://github.com/llvm/llvm-project/issues/116553.
Commit: dcd62070cf45f793f321fecdb4139a79628c4132
https://github.com/llvm/llvm-project/commit/dcd62070cf45f793f321fecdb4139a79628c4132
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
A flang/test/Lower/OpenMP/Todo/depend-clause-depobj.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
Log Message:
-----------
[Flang][OpenMP] Error gracefully for dependence-type with depobj (#116621)
It also modifies the error message to specify it is the dependence-type
that is not supported.
Resolves the crash in
https://github.com/llvm/llvm-project/issues/115647. A fix can come in
later as part of future OpenMP version support.
Commit: ceeb08b9e0a51a4d2e0804baeb579fe8a6485885
https://github.com/llvm/llvm-project/commit/ceeb08b9e0a51a4d2e0804baeb579fe8a6485885
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/Makefile
R lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
Revert "[lldb-dap] Support column breakpoints (#113787)"
This reverts commit 4f48a81a620bc9280be4780f3554cdc9bda55bd3.
The newly added test was failing on the public macOS Arm64 bots:
```
======================================================================
FAIL: test_column_breakpoints (TestDAP_breakpointLocations.TestDAP_setBreakpoints)
Test retrieving the available breakpoint locations.
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py", line 77, in test_column_breakpoints
self.assertEqual(
AssertionError: Lists differ: [{'co[70 chars]e': 41}, {'column': 3, 'line': 42}, {'column': 18, 'line': 42}] != [{'co[70 chars]e': 42}, {'column': 18, 'line': 42}]
First differing element 2:
{'column': 3, 'line': 41}
{'column': 3, 'line': 42}
First list contains 1 additional elements.
First extra element 4:
{'column': 18, 'line': 42}
[{'column': 39, 'line': 40},
{'column': 51, 'line': 40},
- {'column': 3, 'line': 41},
{'column': 3, 'line': 42},
{'column': 18, 'line': 42}]
Config=arm64-/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang
----------------------------------------------------------------------
Ran 1 test in 1.554s
FAILED (failures=1)
```
Commit: 68a3908148c6b6424b1ad4d0ed19d56435252832
https://github.com/llvm/llvm-project/commit/68a3908148c6b6424b1ad4d0ed19d56435252832
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
Log Message:
-----------
emitc: func: Set default dialect to 'emitc' (#116297)
Makes `emitc.func` implement the `OpAsmOpInterface` and overwrite the
`getDefaultDialect`. This allows ops inside `emitc.func`'s body to omit
the 'emitc.' prefix in the assembly.
Commit: b7d635ed30da49cc32b5b46d00e67ecc3ff9522f
https://github.com/llvm/llvm-project/commit/b7d635ed30da49cc32b5b46d00e67ecc3ff9522f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
AMDGPU: Copy correct predicates for SDWA reals (#116288)
There are a lot of messes in the special case
predicate handling. Currently broad let blocks
override specific predicates with more general
cases. For instructions with SDWA, the HasSDWA
predicate was overriding the SubtargetPredicate
for the instruction.
This fixes enough to properly disallow new instructions
that support SDWA on older targets.
Commit: 6bf8f08989420ccd10efed5fac88052ca16e1250
https://github.com/llvm/llvm-project/commit/6bf8f08989420ccd10efed5fac88052ca16e1250
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfWriter.h
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Add InstrProfWriter::addMemProfData (#116528)
This patch adds InstrProfWriter::addMemProfData, which adds the
complete MemProf profile (frames, call stacks, and records) to the
writer context.
Without this function, functions like loadInput in llvm-profdata.cpp
and InstrProfWriter::mergeRecordsFromWriter must add one item (frame,
call stack, or record) at a time. The new function std::moves the
entire MemProf profile to the writer context if the destination is
empty, which is the common use case. Otherwise, we fall back to
adding one item at a time behind the scene.
Here are a couple of reasons why we should add this function:
- We've had a bug where we forgot to add one of the three data
structures (frames, call stacks, and records) to the writer context,
resulting in a nearly empty indexed profile. We should always
package the three data structures together, especially on API
boundaries.
- We expose a little too much of the MemProf detail to
InstrProfWriter. I'd like to gradually transform
InstrProfReader/Writer to entities managing buffers (sequences of
bytes), with actual serialization/deserialization left to external
classes. We already do some of this in InstrProfReader, where
InstrProfReader "contracts out" to IndexedMemProfReader to handle
MemProf details.
I am not changing loadInput or InstrProfWriter::mergeRecordsFromWriter
for now because MemProfReader uses DenseMap for frames and call
stacks, whereas MemProfData uses MapVector. I'll resolve these
mismatches in subsequent patches.
Commit: 4092c0deef466e5b96a221e4066a78ae72efa7af
https://github.com/llvm/llvm-project/commit/4092c0deef466e5b96a221e4066a78ae72efa7af
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF,ARM] Move global sectionMap into the ARM class
Otherwise, LLD_IN_TEST=2 testing arm-plt-reloc.s crashes.
Follow-up to https://reviews.llvm.org/D150870
Commit: 2444b6f0df56d2aeb0ae6dce946443b23a3a9d3b
https://github.com/llvm/llvm-project/commit/2444b6f0df56d2aeb0ae6dce946443b23a3a9d3b
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
Log Message:
-----------
[llvm-objcopy] Replace custom -- parsing with DashDashParsing
The custom -- parsing from https://reviews.llvm.org/D102665 can be
replaced with the generic feature from https://reviews.llvm.org/D152286
Pull Request: https://github.com/llvm/llvm-project/pull/116565
Commit: c9260e21d092c3acbb77bb9f6fcd0820f6a138c1
https://github.com/llvm/llvm-project/commit/c9260e21d092c3acbb77bb9f6fcd0820f6a138c1
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeLayout] Do not rebuild chains with -apply-ext-tsp-for-size (#115934)
https://github.com/llvm/llvm-project/pull/109711 disables
`buildCFGChains()` when `-apply-ext-tsp-for-size` is used to improve
codesize. Tail merging can change the layout and normally requires
`buildCFGChains()` to be called again, but we want to prevent this when
optimizing for codesize. We saw slight size improvement on large
binaries with this change. If `-apply-ext-tsp-for-size` is not used,
this should be a NFC.
Commit: 1c4caece05f1885ba6ed80755d6b5de1b9f99579
https://github.com/llvm/llvm-project/commit/1c4caece05f1885ba6ed80755d6b5de1b9f99579
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
Log Message:
-----------
[Mips] Use APInt::isMask/isShiftedMask to simplify code. (#116582)
Commit: de2e270ee6fb29cfb7730dcf6aaa2552cd4a5efd
https://github.com/llvm/llvm-project/commit/de2e270ee6fb29cfb7730dcf6aaa2552cd4a5efd
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Materialize box when src or dst are rebox (#116494)
Commit: 9161e6ab745adeef67a129b4e1b6724f026125f0
https://github.com/llvm/llvm-project/commit/9161e6ab745adeef67a129b4e1b6724f026125f0
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Add debug checker to compare IR before/after a revert (#115968)
This will help us catch mistakes in change tracking. It's only enabled
when EXPENSIVE_CHECKS are enabled.
Commit: 4615cc38f35d111f09073f51cc734e29c9211067
https://github.com/llvm/llvm-project/commit/4615cc38f35d111f09073f51cc734e29c9211067
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
A llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
A llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
Log Message:
-----------
[RISCV] Inline Assembly Support for GPR Pairs ('R') (#112983)
This patch adds support for getting even-odd general purpose register
pairs into and out of inline assembly using the `R` constraint as
proposed in riscv-non-isa/riscv-c-api-doc#92
There are a few different pieces to this patch, each of which need their
own explanation.
- Renames the Register Class used for f64 values on rv32i_zdinx from
`GPRPair*` to `GPRF64Pair*`. These register classes are kept broadly
unmodified, as their primary value type is used for type inference
over selection patterns. This rename affects quite a lot of files.
- Adds new `GPRPair*` register classes which will be used for `R`
constraints and for instructions that need an even-odd GPR pair. This
new type is used for `amocas.d.*`(rv32) and `amocas.q.*`(rv64) in
Zacas, instead of the `GPRF64Pair` class being used before.
- Marks the new `GPRPair` class legal as for holding a `MVT::Untyped`.
Two new RISCVISD node types are added for creating and destructing a
pair - `BuildGPRPair` and `SplitGPRPair`, and are introduced when
bitcasting to/from the pair type and `untyped`.
- Adds functionality to `splitValueIntoRegisterParts` and
`joinRegisterPartsIntoValue` to handle changing `i<2*xlen>` MVTs into
`untyped` pairs.
- Adds an override for `getNumRegisters` to ensure that `i<2*xlen>`
values, when going to/from inline assembly, only allocate one (pair)
register (they would otherwise allocate two). This is due to a bug in
SelectionDAGBuilder.cpp which other backends also work around.
- Ensures that Clang understands that `R` is a valid inline assembly
constraint.
- This also allows `R` to be used for `f64` types on `rv32_zdinx`
architectures, where doubles are stored in a GPR pair.
Commit: 0ae58c45330d7b66eabf3db2684aa53144c06063
https://github.com/llvm/llvm-project/commit/0ae58c45330d7b66eabf3db2684aa53144c06063
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
Revert "[SandboxIR] Add debug checker to compare IR before/after a revert" (#116666)
Reverts llvm/llvm-project#115968. It caused buildbot failures.
Commit: 900c0565314618ec142b020cea1f9c86e2f8282b
https://github.com/llvm/llvm-project/commit/900c0565314618ec142b020cea1f9c86e2f8282b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV] Add an implementation of findRepresentativeClass to assign i32 to GPRRegClass for RV64. (#116165)
This is an alternative fix for #81192. This allows the SelectionDAG
scheduler to be able to find a representative register class for i32 on
RV64. The representative register class is the super register class with
the largest spill size that is also legal. The default implementation of
findRepresentativeClass only works for legal types which i32 is not for
RV64.
I did some investigation of why tablegen uses i32 in output patterns on
RV64. It appears it comes down to a function called
ForceArbitraryInstResultType that picks a type for the output
pattern when the isel pattern isn't specific enough. I believe it picks
the smallest type(lowested numbered) to resolve the conflict.
A similar issue occurs for f16 and bf16 which both use the FPR16
register class. If the isel pattern doesn't specify, tablegen may find
both f16 and bf16 and may pick bf16 from Zfh pattern when Zfbfmin isn't
present. Since bf16 isn't legal in that case, findRepresentativeClass
will fail.
For i8, i16, i32, this patch calls the base class with XLenVT to get the
representative class since XLenVT is always legal.
For bf16/f16, we call the base class with f32 since all of the f16/bf16
extensions depend on either F or Zfinx which will make f32 a legal type.
The final representative register class further depends on whether D or
Zdinx is also enabled, but that should be handled by the default
implementation.
Commit: 589ab28d87616006d7f8cf2402379811e2a6183f
https://github.com/llvm/llvm-project/commit/589ab28d87616006d7f8cf2402379811e2a6183f
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBBreakpointName.h
Log Message:
-----------
[lldb][sbapi][NFC] Remove commented out typedef from SBBreakpointName (#116434)
SBBreakpointName has a typedef for BreakpointHitCallback used in
SetCallback(), but this typedef has been commented out in
SBBreakpointName and added instead to SBDefines. Since SB API callbacks
are placed in SBDefines, this commit removes this commented out portion.
Commit: a7b2e73bcaa91255a20f1f2e692bec9eb6c17022
https://github.com/llvm/llvm-project/commit/a7b2e73bcaa91255a20f1f2e692bec9eb6c17022
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
Log Message:
-----------
Add support for reading the dynamic symbol table from PT_DYNAMIC (#112596)
Allow LLDB to parse the dynamic symbol table from an ELF file or memory
image in an ELF file that has no section headers. This patch uses the
ability to parse the PT_DYNAMIC segment and find the DT_SYMTAB,
DT_SYMENT, DT_HASH or DT_GNU_HASH to find and parse the dynamic symbol
table if the section headers are not present. It also adds a helper
function to read data from a .dynamic key/value pair entry correctly
from the file or from memory.
Commit: ab4253f6dff194a1e09448c8628809d21f148df9
https://github.com/llvm/llvm-project/commit/ab4253f6dff194a1e09448c8628809d21f148df9
Author: Michele Scandale <michele.scandale at gmail.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/PassManager.h
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
M llvm/unittests/Analysis/PluginInlineOrderAnalysisTest.cpp
Log Message:
-----------
[Analysis] Remove global state from `PluginInline{Advisor,Order}Analysis`. (#114615)
The plugin analysis for `InlineAdvisor` and `InlineOrder` currently
relies on shared global state to keep track if the analysis is
available.
This causes issues when pipelines using plugins and pipelines not using
plugins are run in the same process.
The shared global state can be easily replaced by checking in the given
instance of `ModuleAnalysisManager` if the plugin analysis has been
registered.
Commit: ed8ebad6eb84af60d1c1a8826f55d4d347d2e7bd
https://github.com/llvm/llvm-project/commit/ed8ebad6eb84af60d1c1a8826f55d4d347d2e7bd
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
Log Message:
-----------
[SelectionDAG] Support integer promotion for VP_LOAD and VP_STORE (#81299)
Add integer promotion support for for VP_LOAD and VP_STORE via legalization of extend
and truncate of each form.
Patch commandeered from: https://reviews.llvm.org/D109377
Commit: 19a0ab54de4c95027cb4b90fa6e60f17cd0b05ce
https://github.com/llvm/llvm-project/commit/19a0ab54de4c95027cb4b90fa6e60f17cd0b05ce
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-18 (Mon, 18 Nov 2024)
Changed paths:
M .ci/generate_test_report.py
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M bolt/lib/Core/BinaryEmitter.cpp
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
M clang/Maintainers.rst
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/AddressSanitizer.rst
M clang/docs/LeakSanitizer.rst
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/docs/doxygen.cfg.in
M clang/docs/tools/dump_ast_matchers.py
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/CanonicalType.h
M clang/include/clang/AST/Type.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
R clang/include/clang/Parse/ParseDiagnostic.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/module.modulemap
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/CommentCommandTraits.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DeclarationName.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConcepts.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/AST/ItaniumCXXABI.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OSLog.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtIterator.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTTBuilder.cpp
M clang/lib/Analysis/ProgramPoint.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/LinkInModulesPass.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/DriverOptions.cpp
M clang/lib/Driver/Job.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/MultilibBuilder.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
R clang/lib/Driver/ToolChains/SYCL.cpp
R clang/lib/Driver/ToolChains/SYCL.h
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/cuda_wrappers/new
M clang/lib/Headers/nvptxintrin.h
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/MacroArgs.cpp
M clang/lib/Lex/MacroInfo.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPCallbacks.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/PreprocessingRecord.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/PreprocessorLexer.cpp
M clang/lib/Lex/TokenLexer.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/ScopeInfo.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaFixItUtils.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M clang/test/CodeGen/attr-cpuspecific-cpus.c
M clang/test/CodeGen/attr-target-mv.c
A clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
M clang/test/Driver/arm-alignment.c
M clang/test/Driver/cl-zc.cpp
A clang/test/Driver/darwin-subframeworks.c
M clang/test/Driver/mingw.cpp
R clang/test/Driver/sycl-offload-jit.cpp
M clang/test/Driver/x86-march.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
A clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/constant_builtins_vector.cpp
A clang/test/Sema/nvptx-address-spaces.c
A clang/test/SemaCXX/attr-annotate-ast.cpp
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M clang/unittests/ASTMatchers/CMakeLists.txt
M clang/utils/TableGen/ASTTableGen.cpp
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/ClangDataCollectorsEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/utils/TableGen/ClangTypeNodesEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/analyzer/exploded-graph-rewriter.py
R clang/utils/generate_ast_matcher_doc_tests.py
M clang/www/c_status.html
M compiler-rt/lib/builtins/cpu_model/x86.c
M flang/include/flang/Lower/StatementContext.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/memory.h
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Runtime/freestanding-tools.h
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign-impl.h
M flang/runtime/assign.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
A flang/test/Lower/CUDA/cuda-return01.cuf
A flang/test/Lower/CUDA/cuda-return02.cuf
A flang/test/Lower/OpenMP/Todo/defaultmap-clause.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-depobj.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
M flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
R flang/test/Lower/OpenMP/Todo/loop-directive.f90
M flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
M flang/test/Lower/OpenMP/Todo/reduction-modifiers.f90
M flang/test/Lower/OpenMP/Todo/task_detach.f90
M flang/test/Lower/OpenMP/Todo/task_untied.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
A flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
A flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/target.f90
A flang/test/Parser/OpenMP/defaultmap-clause.f90
A flang/test/Parser/OpenMP/scan.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
A flang/test/Semantics/OpenMP/defaultmap-clause-v50.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/do05.f90
M flang/test/Semantics/OpenMP/nested-barrier.f90
M flang/test/Semantics/OpenMP/nested-master.f90
M flang/test/Semantics/OpenMP/nested-simd.f90
M flang/test/Semantics/OpenMP/ordered-simd.f90
M flang/test/Semantics/OpenMP/reduction-modifiers.f90
A flang/test/Semantics/OpenMP/scan1.f90
A flang/test/Semantics/OpenMP/scan2.f90
A flang/test/Transforms/debug-class-type.fir
M flang/test/Transforms/omp-map-info-finalization.fir
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_util.h
M libcxx/include/CMakeLists.txt
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/include/__chrono/time_point.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale_dir/locale_base_api.h
A libcxx/include/__locale_dir/pad_and_output.h
M libcxx/include/__memory/allocator_arg_t.h
M libcxx/include/__mutex/unique_lock.h
M libcxx/include/__ostream/basic_ostream.h
A libcxx/include/__ostream/put_character_sequence.h
M libcxx/include/__ranges/to.h
M libcxx/include/__system_error/system_error.h
A libcxx/include/__system_error/throw_system_error.h
M libcxx/include/__thread/thread.h
M libcxx/include/__utility/scope_guard.h
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/fstream
M libcxx/include/iomanip
M libcxx/include/locale
M libcxx/include/module.modulemap
M libcxx/include/print
M libcxx/include/ratio
M libcxx/include/shared_mutex
M libcxx/include/strstream
M libcxx/src/chrono.cpp
M libcxx/src/filesystem/filesystem_clock.cpp
M libcxx/src/random.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/GenerateInput.h
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
M lld/COFF/Driver.cpp
M lld/COFF/DriverUtils.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Writer.cpp
M lld/Common/ErrorHandler.cpp
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
M lld/MachO/Driver.cpp
M lld/MachO/Driver.h
M lld/MachO/DriverUtils.cpp
M lld/MachO/InputSection.h
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/docs/ReleaseNotes.rst
M lld/include/lld/Common/ErrorHandler.h
M lld/include/lld/Common/LLVM.h
A lld/test/COFF/arm64ec-invalid-name.s
M lld/test/ELF/aarch64-abs64-dyn.s
M lld/test/ELF/aarch64-cortex-a53-843419-address.s
M lld/test/ELF/aarch64-cortex-a53-843419-large.s
M lld/test/ELF/aarch64-cortex-a53-843419-large2.s
M lld/test/ELF/aarch64-cortex-a53-843419-nopatch.s
M lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s
M lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
M lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
M lld/test/ELF/aarch64-feature-pauth.s
M lld/test/ELF/aarch64-fpic-abs16.s
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-adr_prel_lo21.s
M lld/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s
M lld/test/ELF/aarch64-fpic-got.s
M lld/test/ELF/aarch64-fpic-ldst32_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst64_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-ldst8_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-prel16.s
M lld/test/ELF/aarch64-fpic-prel32.s
M lld/test/ELF/aarch64-fpic-prel64.s
M lld/test/ELF/aarch64-gnu-ifunc-address.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
M lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable2.s
M lld/test/ELF/aarch64-gnu-ifunc-nosym.s
M lld/test/ELF/aarch64-gnu-ifunc-plt.s
M lld/test/ELF/aarch64-gnu-ifunc.s
M lld/test/ELF/aarch64-gnu-ifunc2.s
M lld/test/ELF/aarch64-got-weak-undef.s
M lld/test/ELF/aarch64-ifunc-bti.s
M lld/test/ELF/aarch64-lo12-alignment.s
M lld/test/ELF/aarch64-memtag-android-abi.s
M lld/test/ELF/aarch64-memtag-globals.s
M lld/test/ELF/aarch64-undefined-weak.s
M lld/test/ELF/pack-dyn-relocs-loop.s
A lld/test/MachO/cgdata-generate-merge.s
M lld/test/MinGW/driver.test
M lld/wasm/Driver.cpp
M lldb/include/lldb/API/SBBreakpointName.h
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Host/posix/MainLoopPosix.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.cpp
R lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugRanges.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/statistics/basic/TestStats.py
A lldb/test/API/commands/statistics/basic/second.cpp
A lldb/test/Shell/ObjectFile/ELF/elf-dynsym.test
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_ranges-missing-section.s
M lldb/test/Shell/SymbolFile/DWARF/x86/member-pointers.cpp
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites_live.cpp
M lldb/unittests/Host/MainLoopTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/DepthFirstIterator.h
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalMergeFunctions.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/PeepholeOptimizer.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
A llvm/include/llvm/ExecutionEngine/Orc/LazyObjectLinkingLayer.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/InstrProfWriter.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelperArtifacts.cpp
M llvm/lib/CodeGen/GlobalISel/GIMatchTableExecutor.cpp
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp
M llvm/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugStringTableSubsection.cpp
M llvm/lib/DebugInfo/CodeView/DebugSubsectionVisitor.cpp
M llvm/lib/DebugInfo/CodeView/GlobalTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/LazyRandomTypeCollection.cpp
M llvm/lib/DebugInfo/CodeView/MergingTypeTableBuilder.cpp
M llvm/lib/DebugInfo/CodeView/SymbolSerializer.cpp
M llvm/lib/DebugInfo/CodeView/TypeTableCollection.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/GSYM/ExtractRanges.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/DebugInfo/GSYM/InlineInfo.cpp
M llvm/lib/DebugInfo/GSYM/LookupResult.cpp
M llvm/lib/DebugInfo/GSYM/ObjectFileTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSort.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSupport.cpp
M llvm/lib/DebugInfo/LogicalView/LVReaderHandler.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/DebugInfo/PDB/Native/DbiModuleList.cpp
M llvm/lib/DebugInfo/PDB/Native/FormatUtil.cpp
M llvm/lib/DebugInfo/PDB/Native/GlobalsStream.cpp
M llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
M llvm/lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp
M llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumGlobals.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumInjectedSources.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumLineNumbers.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumSymbols.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeSession.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeArray.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
M llvm/lib/DebugInfo/PDB/Native/NativeTypeVTShape.cpp
M llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolCompiland.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFunc.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolPublicSymbol.cpp
M llvm/lib/DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp
M llvm/lib/DebugInfo/Symbolize/Markup.cpp
M llvm/lib/DebugInfo/Symbolize/MarkupFilter.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
A llvm/lib/ExecutionEngine/Orc/LazyObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
M llvm/lib/MCA/HardwareUnits/LSUnit.cpp
M llvm/lib/MCA/HardwareUnits/Scheduler.cpp
M llvm/lib/ObjCopy/Archive.cpp
M llvm/lib/ObjCopy/COFF/COFFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
M llvm/lib/ObjCopy/ObjCopy.cpp
M llvm/lib/ObjCopy/XCOFF/XCOFFObjcopy.cpp
M llvm/lib/ObjCopy/wasm/WasmObject.cpp
M llvm/lib/ObjCopy/wasm/WasmWriter.cpp
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/ObjectYAML/ArchiveEmitter.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLTypeHashing.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFYAML.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/ObjectYAML/MinidumpYAML.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/ObjectYAML/yaml2obj.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRFrameLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRSubtarget.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetObjectFile.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.cpp
M llvm/lib/Target/BPF/BPFIRPeephole.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFPreserveDIType.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/BPF/BPFRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/GISel/BPFCallLowering.cpp
M llvm/lib/Target/BPF/GISel/BPFInstructionSelector.cpp
M llvm/lib/Target/BPF/GISel/BPFLegalizerInfo.cpp
M llvm/lib/Target/BPF/GISel/BPFRegisterBankInfo.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
M llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
M llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
M llvm/lib/Target/Hexagon/HexagonGenMemAbsolute.cpp
M llvm/lib/Target/Hexagon/HexagonGenMux.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/Hexagon/HexagonPeephole.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
M llvm/lib/Target/Hexagon/RDFCopy.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiFrameLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSubtarget.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsFrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsMulMulBugPass.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
M llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp
M llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrDFP.td
M llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
M llvm/lib/Target/SystemZ/SystemZTDC.cpp
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/LVLGen.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEFrameLowering.cpp
M llvm/lib/Target/VE/VEISelDAGToDAG.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VERegisterInfo.cpp
M llvm/lib/Target/VE/VESubtarget.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyNullifyDebugValueLists.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetObjectFile.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/TextAPI/Utils.cpp
M llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
M llvm/test/CodeGen/AArch64/arm64-ld1.ll
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/neon-vector-splat.ll
A llvm/test/CodeGen/AArch64/phi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
A llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
A llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll
M llvm/test/CodeGen/ARM/cmp1-peephole-thumb.mir
A llvm/test/CodeGen/Generic/cgdata-merge-crash.ll
M llvm/test/CodeGen/Lanai/peephole-compare.mir
M llvm/test/CodeGen/MLRegAlloc/Inputs/input.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
A llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
A llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
A llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
M llvm/test/CodeGen/NVPTX/i1-param.ll
A llvm/test/CodeGen/NVPTX/kernel-param-align.ll
M llvm/test/CodeGen/PowerPC/bitcast-peephole.mir
M llvm/test/CodeGen/PowerPC/const-nonsplat-array-init.ll
M llvm/test/CodeGen/PowerPC/const-splat-array-init.ll
M llvm/test/CodeGen/PowerPC/extract-and-store.ll
M llvm/test/CodeGen/PowerPC/f128-fma.ll
M llvm/test/CodeGen/PowerPC/f128-passByValue.ll
M llvm/test/CodeGen/PowerPC/merge_stores_dereferenceable.ll
M llvm/test/CodeGen/PowerPC/pr45301.ll
M llvm/test/CodeGen/PowerPC/pr47891.ll
M llvm/test/CodeGen/PowerPC/pr59074.ll
M llvm/test/CodeGen/PowerPC/swaps-le-1.ll
M llvm/test/CodeGen/PowerPC/vec-itofp.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-load-store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smax-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-smin-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/add.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/implicit-def.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/load.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/splatvector-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sub.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vmclr-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vmclr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/zext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-nonzero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-zero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize.ll
M llvm/test/CodeGen/RISCV/global-merge-offset.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
A llvm/test/CodeGen/RISCV/memset-pattern.ll
A llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
A llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
M llvm/test/CodeGen/X86/cpus-intel.ll
M llvm/test/CodeGen/XCore/float-intrinsics.ll
M llvm/test/DebugInfo/X86/global-sra-struct-fit-segment.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/foo-ret-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/var-x-42.ll
A llvm/test/ExecutionEngine/JITLink/Generic/lazy-link.ll
M llvm/test/MC/Disassembler/SystemZ/insns.txt
M llvm/test/MC/SystemZ/insn-bad-z13.s
M llvm/test/MC/SystemZ/insn-bad.s
M llvm/test/MC/SystemZ/insn-good-z13.s
M llvm/test/MC/SystemZ/insn-good.s
M llvm/test/MC/SystemZ/tokens.s
M llvm/test/ThinLTO/X86/memprof-aliased-location1.ll
M llvm/test/ThinLTO/X86/memprof-aliased-location2.ll
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
A llvm/test/Transforms/GVN/debugloc-load-select.ll
M llvm/test/Transforms/GlobalOpt/globalsra-align.ll
A llvm/test/Transforms/GlobalOpt/pr115282.ll
M llvm/test/Transforms/HotColdSplit/X86/do-not-split.ll
M llvm/test/Transforms/HotColdSplit/addr-taken.ll
M llvm/test/Transforms/HotColdSplit/apply-noreturn-bonus.ll
M llvm/test/Transforms/HotColdSplit/apply-penalty-for-inputs.ll
M llvm/test/Transforms/HotColdSplit/apply-penalty-for-outputs.ll
M llvm/test/Transforms/HotColdSplit/eh-typeid-for.ll
M llvm/test/Transforms/HotColdSplit/forward-dfs-reaches-marked-block.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-2.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-3.ll
M llvm/test/Transforms/HotColdSplit/minsize.ll
M llvm/test/Transforms/HotColdSplit/outline-cold-asm.ll
M llvm/test/Transforms/HotColdSplit/outline-disjoint-diamonds.ll
M llvm/test/Transforms/HotColdSplit/phi-with-distinct-outlined-values.ll
M llvm/test/Transforms/HotColdSplit/section-splitting-custom.ll
M llvm/test/Transforms/HotColdSplit/section-splitting-default.ll
M llvm/test/Transforms/HotColdSplit/split-cold-2.ll
M llvm/test/Transforms/HotColdSplit/succ-block-with-self-edge.ll
M llvm/test/Transforms/HotColdSplit/swifterror.ll
M llvm/test/Transforms/IndVarSimplify/2003-12-10-RemoveInstrCrash.ll
M llvm/test/Transforms/IndVarSimplify/2003-12-15-Crash.ll
M llvm/test/Transforms/IndVarSimplify/2005-11-18-Crash.ll
M llvm/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
M llvm/test/Transforms/IndVarSimplify/2009-05-24-useafterfree.ll
M llvm/test/Transforms/IndVarSimplify/2011-09-10-widen-nsw.ll
M llvm/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll
M llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll
M llvm/test/Transforms/IndVarSimplify/2014-06-21-congruent-constant.ll
M llvm/test/Transforms/IndVarSimplify/2020-12-15-trunc-bug-expensive-range-inference.ll
M llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
M llvm/test/Transforms/IndVarSimplify/X86/2011-11-15-multiexit.ll
M llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll
M llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr24804.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr24956.ll
M llvm/test/Transforms/IndVarSimplify/X86/pr25576.ll
M llvm/test/Transforms/IndVarSimplify/X86/variable-stride-ivs-1.ll
M llvm/test/Transforms/IndVarSimplify/X86/verify-scev.ll
M llvm/test/Transforms/IndVarSimplify/avoid-i0.ll
M llvm/test/Transforms/IndVarSimplify/const_phi.ll
M llvm/test/Transforms/IndVarSimplify/crash.ll
M llvm/test/Transforms/IndVarSimplify/divide-pointer.ll
M llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
M llvm/test/Transforms/IndVarSimplify/lcssa-preservation.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate11.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate7.ll
M llvm/test/Transforms/IndVarSimplify/loop_evaluate8.ll
M llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
M llvm/test/Transforms/IndVarSimplify/phi-uses-value-multiple-times.ll
M llvm/test/Transforms/IndVarSimplify/pr25578.ll
M llvm/test/Transforms/IndVarSimplify/pr26974.ll
M llvm/test/Transforms/IndVarSimplify/pr40454.ll
M llvm/test/Transforms/IndVarSimplify/sentinel.ll
M llvm/test/Transforms/IndVarSimplify/single-element-range.ll
M llvm/test/Transforms/Inline/infinite-loop-two-predecessors.ll
M llvm/test/Transforms/Inline/inline-indirect-chain.ll
M llvm/test/Transforms/Inline/inline-invoke-with-asm-call.ll
M llvm/test/Transforms/Inline/inline_cleanup.ll
M llvm/test/Transforms/Inline/pr33637.ll
M llvm/test/Transforms/Inline/pr53206.ll
M llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
M llvm/test/Transforms/InstCombine/cast-mul-select.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/extract-select-agg.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/InstSimplify/dead-code-removal.ll
M llvm/test/Transforms/InstSimplify/require-dominator.ll
A llvm/test/Transforms/InstSimplify/select-equivalence-fp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
A llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-phi.ll
M llvm/test/Transforms/LowerConstantIntrinsics/objectsize_basic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/aliased-location1.ll
M llvm/test/Transforms/MemProfContextDisambiguation/aliased-location2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
A llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/switch-sext.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/PowerPC/memset-pattern.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/lit.local.cfg
A llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/segmented-stores.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
M llvm/test/Transforms/SimplifyCFG/ForwardSwitchConditionToPHI.ll
M llvm/test/Transforms/SimplifyCFG/HoistCode.ll
A llvm/test/Transforms/SimplifyCFG/dbgloc-merge-invoke.ll
A llvm/test/Transforms/SimplifyCFG/switch-dup-bbs.ll
M llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll
M llvm/test/Verifier/intrinsic-immarg.ll
M llvm/test/Verifier/memprof-metadata-bad.ll
A llvm/test/Verifier/memset-pattern.ll
A llvm/test/tools/llvm-dlltool/arm64ec-invalid-name.test
A llvm/test/tools/llvm-lib/arm64ec-invalid-name.test
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
M llvm/test/tools/llvm-readobj/ELF/reloc-types-aarch64.test
M llvm/test/tools/llvm-readtapi/stubify-delete.test
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/ADT/BreadthFirstIteratorTest.cpp
M llvm/unittests/ADT/DepthFirstIteratorTest.cpp
M llvm/unittests/ADT/PostOrderIteratorTest.cpp
M llvm/unittests/Analysis/BranchProbabilityInfoTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
M llvm/unittests/Analysis/PluginInlineOrderAnalysisTest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/release/merge-release-pr.py
M mlir/docs/Dialects/Linalg/OpDSL.md
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAttributes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
M mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
M mlir/test/Dialect/Arith/int-range-interface.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
A mlir/test/Dialect/Linalg/lit.local.cfg
M mlir/test/Dialect/Linalg/rank-reduce-contraction-ops.mlir
A mlir/test/Dialect/Linalg/td/generalize-pack.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/IR/invalid-builtin-attributes.mlir
A mlir/test/Target/LLVMIR/Import/disjoint.ll
A mlir/test/Target/LLVMIR/disjoint.mlir
M mlir/test/Target/LLVMIR/omptarget-data-use-dev-ordering.mlir
R mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
A mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
A mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
M mlir/test/Target/SPIRV/decorations.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
M offload/README.md
M offload/test/offloading/fortran/basic-target-region-1D-array-section.f90
M offload/test/offloading/fortran/basic-target-region-3D-array-section.f90
M offload/test/offloading/fortran/basic-target-region-3D-array.f90
M offload/test/offloading/fortran/constant-arr-index.f90
M offload/test/offloading/fortran/declare-target-vars-in-target-region.f90
M offload/test/offloading/fortran/double-target-call-with-declare-target.f90
M offload/test/offloading/fortran/dtype-array-constant-index-map.f90
A offload/test/offloading/fortran/dtype-member-map-syntax-1.f90
A offload/test/offloading/fortran/dtype-member-map-syntax-2.f90
M offload/test/offloading/fortran/dump_map_tables.f90
M offload/test/offloading/fortran/local-descriptor-map-regress.f90
M offload/test/offloading/fortran/target-depend.f90
M offload/test/offloading/fortran/target-map-all-common-block-members.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-alloca-array-of-dtype.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-alloca-array.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-and-alloca-array-v2.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-and-alloca-array.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-array-and-scalar.f90
A offload/test/offloading/fortran/target-map-alloca-dtype-array-of-dtype.f90
M offload/test/offloading/fortran/target-map-allocatable-array-section-1d-bounds.f90
M offload/test/offloading/fortran/target-map-allocatable-array-section-3d-bounds.f90
A offload/test/offloading/fortran/target-map-allocatable-dtype.f90
M offload/test/offloading/fortran/target-map-allocatable-map-scopes.f90
M offload/test/offloading/fortran/target-map-common-block.f90
M offload/test/offloading/fortran/target-map-declare-target-link-common-block.f90
M offload/test/offloading/fortran/target-map-derived-type-full-1.f90
M offload/test/offloading/fortran/target-map-derived-type-full-2.f90
M offload/test/offloading/fortran/target-map-derived-type-full-implicit-1.f90
M offload/test/offloading/fortran/target-map-derived-type-full-implicit-2.f90
M offload/test/offloading/fortran/target-map-double-large-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-array-bounds.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-double-array-bounds.f90
M offload/test/offloading/fortran/target-map-double-nested-dtype-single-member.f90
A offload/test/offloading/fortran/target-map-dtype-3d-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-and-non-alloca-array.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-and-non-alloca-dtype.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-of-dtype.f90
A offload/test/offloading/fortran/target-map-dtype-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-dtype-allocatable-array.f90
A offload/test/offloading/fortran/target-map-dtype-allocatable-scalar-and-array.f90
M offload/test/offloading/fortran/target-map-dtype-arr-bounds-member-enter-exit-update.f90
M offload/test/offloading/fortran/target-map-dtype-arr-bounds-member-enter-exit.f90
M offload/test/offloading/fortran/target-map-dtype-explicit-individual-array-member.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-3D-member-bounds.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-member-bounds.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-array-member.f90
M offload/test/offloading/fortran/target-map-dtype-multi-explicit-member.f90
M offload/test/offloading/fortran/target-map-enter-exit-allocatables.f90
M offload/test/offloading/fortran/target-map-enter-exit-array-2.f90
M offload/test/offloading/fortran/target-map-enter-exit-array-bounds.f90
M offload/test/offloading/fortran/target-map-enter-exit-array.f90
M offload/test/offloading/fortran/target-map-enter-exit-scalar.f90
M offload/test/offloading/fortran/target-map-first-common-block-member.f90
M offload/test/offloading/fortran/target-map-individual-dtype-member-map.f90
M offload/test/offloading/fortran/target-map-large-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-mix-imp-exp-common-block-members.f90
A offload/test/offloading/fortran/target-map-multi-alloca-dtypes-with-multi-alloca-members.f90
A offload/test/offloading/fortran/target-map-multi-alloca-dtypes-with-multi-mixed-members.f90
A offload/test/offloading/fortran/target-map-nested-alloca-dtype-3d-alloca-array-bounds.f90
A offload/test/offloading/fortran/target-map-nested-alloca-dtype-alloca-array-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-3d-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-and-non-alloca-array.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array-and-non-alloca-dtype.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array-with-bounds.f90
A offload/test/offloading/fortran/target-map-nested-dtype-alloca-array.f90
M offload/test/offloading/fortran/target-map-nested-dtype-complex-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-derived-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-multi-member.f90
M offload/test/offloading/fortran/target-map-nested-dtype-single-member.f90
M offload/test/offloading/fortran/target-map-pointer-scopes-enter-exit.f90
M offload/test/offloading/fortran/target-map-pointer-target-array-section-3d-bounds.f90
M offload/test/offloading/fortran/target-map-pointer-target-scopes.f90
A offload/test/offloading/fortran/target-map-pointer-to-dtype-allocatable-member.f90
M offload/test/offloading/fortran/target-map-second-common-block-member.f90
M offload/test/offloading/fortran/target-map-two-dtype-explicit-member.f90
M offload/test/offloading/fortran/target-map-two-dtype-individual-member-array-1D-bounds.f90
M offload/test/offloading/fortran/target-map-two-dtype-mixed-implicit-explicit-capture-1.f90
M offload/test/offloading/fortran/target-map-two-dtype-mixed-implicit-explicit-capture-2.f90
M offload/test/offloading/fortran/target-map-two-dtype-multi-member-array-1D-bounds.f90
M offload/test/offloading/fortran/target-map-two-nested-dtype-member-array-map.f90
M offload/test/offloading/fortran/target-nested-target-data.f90
M offload/test/offloading/fortran/target-region-implicit-array.f90
M openmp/runtime/cmake/LibompDefinitions.cmake
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
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Address comments
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/7420027e7016...19a0ab54de4c
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