[all-commits] [llvm/llvm-project] c3f0a1: [𝘀𝗽𝗿] changes introduced through rebase

[Pengcheng Wang via All-commits]

  Branch: refs/heads/users/wangpc-pp/spr/riscv-support-__builtin_cpu_is
  Home:   https://github.com/llvm/llvm-project
  Commit: c3f0a1bcb00cf77257c75846958fd2d89d342105
      https://github.com/llvm/llvm-project/commit/c3f0a1bcb00cf77257c75846958fd2d89d342105
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-11-15 (Fri, 15 Nov 2024)

  Changed paths:

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]


  Commit: 00e09c72aa4e10bc247c4c232bfdab17cb45831a
      https://github.com/llvm/llvm-project/commit/00e09c72aa4e10bc247c4c232bfdab17cb45831a
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-11-15 (Fri, 15 Nov 2024)

  Changed paths:
    A clang/test/CodeGen/RISCV/builtin-cpu-is.c

  Log Message:
  -----------
  Add missing tests

Created using spr 1.3.6-beta.1


Compare: https://github.com/llvm/llvm-project/compare/b73520561788...00e09c72aa4e

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