[all-commits] [llvm/llvm-project] 5d7afd: [LLD][COFF] Add EC alias symbols for undefined x86...
Florian Mayer via All-commits
all-commits at lists.llvm.org
Tue Nov 12 15:14:31 PST 2024
Branch: refs/heads/users/fmayer/spr/apply-alignment-size-in-linker-rather-than-ir
Home: https://github.com/llvm/llvm-project
Commit: 5d7afd324ad23e7b44ba82dbf38287e02002ceec
https://github.com/llvm/llvm-project/commit/5d7afd324ad23e7b44ba82dbf38287e02002ceec
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/arm64ec-entry-mangle.test
Log Message:
-----------
[LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (#114466)
Commit: a58c3d3ac7c6b2fd9710ab2189d7971ef37e714f
https://github.com/llvm/llvm-project/commit/a58c3d3ac7c6b2fd9710ab2189d7971ef37e714f
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
Log Message:
-----------
Use `std::move` to avoid copy (#113055)
Commit: f8559751fc2b15b45ac417be9abe865085af45ad
https://github.com/llvm/llvm-project/commit/f8559751fc2b15b45ac417be9abe865085af45ad
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/test/Analysis/malloc.c
M lld/test/Unit/lit.cfg.py
M llvm/docs/HistoricalNotes/2001-05-18-ExceptionHandling.txt
M llvm/docs/HistoricalNotes/2002-05-12-InstListChange.txt
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/test/CodeGen/AArch64/i128-fast-isel-fallback.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
M llvm/test/Transforms/IROutliner/included-phi-nodes-end.ll
M llvm/test/Transforms/IROutliner/region-inputs-in-phi-nodes.ll
M llvm/test/Transforms/InstSimplify/ConstProp/2002-03-11-ConstPropCrash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/2002-05-03-DivideByZeroException.ll
M llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
M llvm/test/Unit/lit.cfg.py
M llvm/utils/TableGen/jupyter/tablegen_kernel/kernel.py
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[llvm-project] Fix typo "propogate" (#114795)
Commit: 0713bf9cc34e75572058b46f712d37031762fa9d
https://github.com/llvm/llvm-project/commit/0713bf9cc34e75572058b46f712d37031762fa9d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Inline small functions inside vector (#114567)
This helps with readability since the reader doesn't need to jump around
a bunch of times only to read functions that are implemented in 1 or 2
lines of code.
Commit: dfe737f231d7162ea5658df3b97fd71cc39441d8
https://github.com/llvm/llvm-project/commit/dfe737f231d7162ea5658df3b97fd71cc39441d8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/docs/Hardening.rst
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__configuration/abi.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/incomplete.sh.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.observers/assert.subscript.pass.cpp
Log Message:
-----------
[libc++] Apply post-commit review comments for unique_ptr<T[]> hardening (#111704)
Commit: 8b19d29a3f254505cf0981af6c3d8d9e6f9626fc
https://github.com/llvm/llvm-project/commit/8b19d29a3f254505cf0981af6c3d8d9e6f9626fc
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/docs/Status/FormatIssues.csv
M libcxx/docs/Status/FormatPaper.csv
Log Message:
-----------
[libc++] remove minor version in status pages (#113241)
Minor version of releases starts at `N.1.0` for all releases since 4532617ae42005.
The current status pages are not terribly wrong (the version during
development can be considered `N.0`), but still it's kinda weird to use
versions that never get released as the lower bound.
Commit: 9a211fe7e49b8b1376772a40ca31153fb7d504dd
https://github.com/llvm/llvm-project/commit/9a211fe7e49b8b1376772a40ca31153fb7d504dd
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
A llvm/test/TableGen/ArtificialSubregs.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Fix concatenation of subreg and artificial subregs (#114391)
When CoveredBySubRegs is true and a sub-register consists of two
parts; a regular subreg and an artificial subreg, then TableGen
should consider only concatenating the non-artificial subregs.
For example, S0_S1 is a concatenated subreg from D0_D1,
but S0_S1_HI should not be considered.
Commit: 3e8a8fce4aea14e7475c3ebf22227401e33bfe02
https://github.com/llvm/llvm-project/commit/3e8a8fce4aea14e7475c3ebf22227401e33bfe02
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
Log Message:
-----------
ValueTracking: clarify isNotCrossLaneOperation (NFC) (#112375)
Clarify the distinction between lanewise operations, and operations that
do not cross vector lanes, with an example, in the header comment.
Commit: cd16b077bf4bc6d55e06c41fa0f6774ac05dcb56
https://github.com/llvm/llvm-project/commit/cd16b077bf4bc6d55e06c41fa0f6774ac05dcb56
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/IR/Instructions.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/edge.ll
Log Message:
-----------
IR: introduce CmpInst::isEquivalence (#111979)
Steal impliesEquivalanceIf{True,False} (sic) from GVN, and extend it for
floating-point constant vectors, and accounting for denormal values.
Since InstCombine also performs GVN-like replacements, introduce
CmpInst::isEquivalence, and remove the corresponding code in GVN, with
the intent of using it in more places.
The code in GVN also has a bad FIXME saying that the optimization may be
valid in the nsz case, but this is not the case.
Alive2 proof: https://alive2.llvm.org/ce/z/vEaK8M
Commit: 3268d51a5c81be705a97216bf061fab9bb195ebe
https://github.com/llvm/llvm-project/commit/3268d51a5c81be705a97216bf061fab9bb195ebe
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
Log Message:
-----------
[clang][bytecode][NFC] Fix a possible build warning (#114800)
InterpBuiltinBitCast.cpp:95:3: warning: non-void function does not
return a value in all control paths [-Wreturn-type]
95 | }
| ^
1 warning generated.
Commit: ae0ab2486287a914d9506ac2ff73e41063bf9a7e
https://github.com/llvm/llvm-project/commit/ae0ab2486287a914d9506ac2ff73e41063bf9a7e
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/TableGen/ArtificialSubregs.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392)
TableGen builds up a map of "SubRegIdx -> Subclass" where Subclass is
the largest class where all registers have SubRegIdx as a sub-register.
When SubRegIdx (vis-a-vis the sub-register) is artificial it should
still include it in the map. This map is used in various places,
including in the calculation of the Lanemask of a register class, which
otherwise calculates an incorrect lanemask.
Commit: 1f55d771894e6f95c5401d8fec5c83538a6b8e9f
https://github.com/llvm/llvm-project/commit/1f55d771894e6f95c5401d8fec5c83538a6b8e9f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove unused parameter from pushData() (#114801)
Commit: 7da9da0b1902fe04985753d20dd37a9edd05dd41
https://github.com/llvm/llvm-project/commit/7da9da0b1902fe04985753d20dd37a9edd05dd41
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/test/test_demangle.pass.cpp
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/unittests/Demangle/PartialDemangleTest.cpp
Log Message:
-----------
[demangler] Enhance demangling in llvm-cxxfilt for fixed-point types. (#114257)
This patch adds support for fixed-point type in demanger.
Closes #114090.
Commit: b5dc7b8fc2a2884350f27e78410a4342555f2979
https://github.com/llvm/llvm-project/commit/b5dc7b8fc2a2884350f27e78410a4342555f2979
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm-c/Core.h
M llvm/lib/IR/Core.cpp
Log Message:
-----------
[LLVM] Change `LLVMIntrinsicCopyOverloadedName` API return type (#114334)
Change the return type of `LLVMIntrinsicCopyOverloadedName` and
`LLVMIntrinsicCopyOverloadedName2` to `char *` instead of `const char *`
since the returned memory is owned by the caller and we expect that the
returned pointer is passed to free to deallocate it (without casting it
back to non-const pointer).
Commit: 293c78ba0a93cb03238a909c96dcd399e685f575
https://github.com/llvm/llvm-project/commit/293c78ba0a93cb03238a909c96dcd399e685f575
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
A libclc/clc/include/clc/math/clc_ceil.h
A libclc/clc/include/clc/math/clc_fabs.h
A libclc/clc/include/clc/math/clc_floor.h
A libclc/clc/include/clc/math/clc_rint.h
A libclc/clc/include/clc/math/clc_trunc.h
A libclc/clc/include/clc/math/unary_decl.inc
A libclc/clc/include/clc/math/unary_intrin.inc
A libclc/clc/include/clc/utils.h
R libclc/generic/include/clc/math/unary_decl.inc
R libclc/generic/include/math/unary_intrin.inc
M libclc/generic/lib/clcmacro.h
M libclc/generic/lib/math/ceil.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/clc_sqrt.cl
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/math/fabs.cl
M libclc/generic/lib/math/floor.cl
M libclc/generic/lib/math/native_unary_intrinsic.inc
M libclc/generic/lib/math/rint.cl
M libclc/generic/lib/math/round.cl
M libclc/generic/lib/math/trunc.cl
Log Message:
-----------
[libclc] Move ceil/fabs/floor/rint/trunc to CLC library (#114774)
These functions are all mapped to LLVM intrinsics.
The clspv and spirv targets don't declare or define any of these CLC
functions, and instead map these to their corresponding OpenCL symbols.
Commit: 01463a269eb359219886f5b5b81d7f262868151f
https://github.com/llvm/llvm-project/commit/01463a269eb359219886f5b5b81d7f262868151f
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/stack-guard-global.ll
M llvm/test/CodeGen/PowerPC/stack-guard-tls.ll
M llvm/test/CodeGen/PowerPC/uaddo-64.ll
Log Message:
-----------
Fixed test case error which caused the default cpu is changed from generic to ppc64 for triple powerpc64 (#114828)
[Summary]
Fixed test case error in the
https://lab.llvm.org/buildbot/#/builders/33/builds/5801 which
caused by the commit https://github.com/llvm/llvm-project/pull/113943
Commit: 1c6ec29b6bf86709384049660c69cc2d31e356b2
https://github.com/llvm/llvm-project/commit/1c6ec29b6bf86709384049660c69cc2d31e356b2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/Todo/from-expectation-modifier.f90
A flang/test/Lower/OpenMP/Todo/from-iterator-modifier.f90
A flang/test/Lower/OpenMP/Todo/to-expectation-modifier.f90
A flang/test/Lower/OpenMP/Todo/to-iterator-modifier.f90
A flang/test/Parser/OpenMP/declare-target-to-clause.f90
A flang/test/Parser/OpenMP/from-clause.f90
A flang/test/Parser/OpenMP/target-update-to-clause.f90
A flang/test/Semantics/OpenMP/from-clause-v45.f90
A flang/test/Semantics/OpenMP/from-clause-v51.f90
A flang/test/Semantics/OpenMP/to-clause-v45.f90
A flang/test/Semantics/OpenMP/to-clause-v51.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Parsing support for iterator modifiers in FROM and TO (#114593)
Parse PRESENT modifier as well while we're at it (no MAPPER though). Add
semantic checks for these clauses in the TARGET UPDATE construct, TODO
messages in lowering.
Commit: 7c69491e486a93e8b86a390a0d5d580eeca7f7d5
https://github.com/llvm/llvm-project/commit/7c69491e486a93e8b86a390a0d5d580eeca7f7d5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/include/__type_traits/aligned_storage.h
Log Message:
-----------
[libc++] Simplify aligned_storage (#114665)
The main template of `aligned_storage` is only ever used when we have
extremely overaligned types (> 16384), so we effectively only ever use
the specializations currently. This means that we only instantiate the
main template for overaligned types. Instead of doing this dance, we can
just define the main template to use `_ALIGNAS`, just like the
specializations. This makes the implementation of `aligned_storage`
significantly less confusing.
Commit: 074209034f1c6193b37af004bb622683e84a1648
https://github.com/llvm/llvm-project/commit/074209034f1c6193b37af004bb622683e84a1648
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
M llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
Log Message:
-----------
[llvm-exegesis] Use older instructions to load lower vregs (#114768)
This patch makes X86 llvm-exegesis unconditionally use older
instructions to load the lower vector registers, rather than trying to
use AVX512 for everything when available. This fixes a case where we
would try and load AVX512 registers using the older instructions if such
a snippet was constructed while -mcpu was set to something that did not
support AVX512. This would lead to a machine code verification error
rather than resulting in incomplete snippet setup, which seems to be the
intention of how this should work.
Fixes #114691.
Commit: 3f3953a6e29ce52c0af767150cff3d5acde497e8
https://github.com/llvm/llvm-project/commit/3f3953a6e29ce52c0af767150cff3d5acde497e8
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Shafik and hstk30 as maintainers for issue triage (#114781)
Both volunteered for this role. Shafik has been actively performing
these duties for a while and hstk30 is interested in volunteering in
this space to help out.
Commit: 0ac2e42227ff565a8eab4c7c65c3ddb36aff3409
https://github.com/llvm/llvm-project/commit/0ac2e42227ff565a8eab4c7c65c3ddb36aff3409
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/scmp.ll
Log Message:
-----------
[DAG] SimplifyDemandedBits - ignore SRL node if we're just demanding known sign bits (#114805)
Check to see if we are only demanding (shifted) signbits from a SRL node that are also signbits in the source node.
We can't demand any upper zero bits that the SRL will shift in (up to max shift amount), and the lower demanded bits bound must already be all signbits.
Same fold as #114389 which added this for SimplifyMultipleUseDemandedBits
Commit: 30dd1297fa2cc172ef7a1435775010d7efd673fd
https://github.com/llvm/llvm-project/commit/30dd1297fa2cc172ef7a1435775010d7efd673fd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Transforms/Utils/LowerAtomic.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-integer-ops-0-to-add-0.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll
Log Message:
-----------
AMDGPU: Custom expand flat cmpxchg which may access private (#109410)
64-bit flat cmpxchg instructions do not work correctly for scratch
addresses, and need to be expanded as non-atomic.
Allow custom expansion of cmpxchg in AtomicExpand, as is
already the case for atomicrmw.
Commit: 76c16651c9f003332bff473d6703cf5bef367c99
https://github.com/llvm/llvm-project/commit/76c16651c9f003332bff473d6703cf5bef367c99
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang] Fix warnings
This patch fixes:
flang/lib/Semantics/check-omp-structure.cpp:286:27: error: lambda
capture 'this' is not used [-Werror,-Wunused-lambda-capture]
flang/lib/Semantics/check-omp-structure.cpp:299:21: error: private
field 'sctx_' is not used [-Werror,-Wunused-private-field]
Commit: d6344c1cd0d099f8d99ee320f33fc9254dbe8288
https://github.com/llvm/llvm-project/commit/d6344c1cd0d099f8d99ee320f33fc9254dbe8288
Author: Steven Perron <stevenperron at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
Log Message:
-----------
[HLSL][SPIRV] Add HLSL type translation for spirv. (#114273)
This commit partially implements SPIRTargetCodeGenInfo::getHLSLType. It
can now generate the spirv type for the following HLSL types:
1. RWBuffer
2. Buffer
3. Sampler
---------
Co-authored-by: Nathan Gauër <github at keenuts.net>
Commit: bc3c83fe789ae6041289a06a2fa22b750fc8956c
https://github.com/llvm/llvm-project/commit/bc3c83fe789ae6041289a06a2fa22b750fc8956c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/tools/sancov/sancov.cpp
Log Message:
-----------
[sancov] Use heterogeneous lookups with std::map (NFC) (#113406)
Commit: 5d6cb6f78ac93aedcf96e3a3bca61401a2177f31
https://github.com/llvm/llvm-project/commit/5d6cb6f78ac93aedcf96e3a3bca61401a2177f31
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
Log Message:
-----------
[mlir] Simplify code with MapVector::operator[] (NFC) (#113407)
Commit: 186dc9a4dfd8ab667c601c76b741e0e4551ad138
https://github.com/llvm/llvm-project/commit/186dc9a4dfd8ab667c601c76b741e0e4551ad138
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#113414)
Commit: d3d8103d533280f322383e35cf5a9fe3075e236c
https://github.com/llvm/llvm-project/commit/d3d8103d533280f322383e35cf5a9fe3075e236c
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M openmp/runtime/src/ompt-general.cpp
Log Message:
-----------
[OpenMP] Using `SimpleVLA` to handle vla usage in ompt-general.cpp. (#114583)
The `openmp` runtime failed to build on LoP with LLVM18 on LoP due to
the addition of `-Wvla-cxx-extension` as
```
llvm-project/openmp/runtime/src/ompt-general.cpp:711:15: error: variable length arrays in C++ are a Clang extension [-Werror,-Wvla-cxx-extension]
711 | int tmp_ids[ids_size];
| ^~~~~~~~
llvm-project/openmp/runtime/src/ompt-general.cpp:711:15: note: function parameter 'ids_size' with unknown value cannot be used in a constant expression
llvm-project/openmp/runtime/src/ompt-general.cpp:704:65: note: declared here
704 | OMPT_API_ROUTINE int ompt_get_place_proc_ids(int place_num, int ids_size,
| ^
1 error generated.
```
This patch is to ignore the checking against this usage.
Commit: 2cd32132dbf5ec4a0e62f8fea0cd48420561e970
https://github.com/llvm/llvm-project/commit/2cd32132dbf5ec4a0e62f8fea0cd48420561e970
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
M llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
A llvm/test/CodeGen/PowerPC/aix-inline-asm-clobber-warning.ll
M llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
M llvm/test/CodeGen/PowerPC/inc-of-add.ll
M llvm/test/CodeGen/PowerPC/inline-asm-clobber-warning.ll
M llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
M llvm/test/CodeGen/PowerPC/mflr-store.mir
M llvm/test/CodeGen/PowerPC/peephole-replaceInstr-after-eliminate-extsw.mir
M llvm/test/CodeGen/PowerPC/tocdata-non-zero-addend.mir
Log Message:
-----------
[PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
This patch utilizes getReservedRegs() to find asm clobberable registers.
And to make the result of getReservedRegs() accurate, this patch
implements the todo, which is to make r2 allocatable on AIX for some
leaf functions.
Commit: de87dda2da7febb66bdbaff8328632b1db6c88b1
https://github.com/llvm/llvm-project/commit/de87dda2da7febb66bdbaff8328632b1db6c88b1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/include/__hash_table
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__tuple/make_tuple_types.h
M libcxx/include/new
M libcxx/include/optional
M libcxx/include/variant
M libcxx/test/std/language.support/support.dynamic/ptr.launder/launder.pass.cpp
Log Message:
-----------
[libc++][NFC] Use more appropriate type traits for a few cases (#114025)
Commit: a779dc3754fe6cd2d72766f6313b3e88c0fd7d35
https://github.com/llvm/llvm-project/commit/a779dc3754fe6cd2d72766f6313b3e88c0fd7d35
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Supply default linker scripts (#114546)
Until now, this has been hardcoded as a downstream patch in lld. Add it
to the driver so that the private patch can be removed.
PS5 only. On PS4, the equivalent hardcoded configuration will remain in
the proprietary linker.
SIE tracker: TOOLCHAIN-16704
Commit: c6cce261f5f7e1bdb092374d51e44ab7bc04e769
https://github.com/llvm/llvm-project/commit/c6cce261f5f7e1bdb092374d51e44ab7bc04e769
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Delete ununsed data member, NFC
The `SemanticsContext &sctx_` ended up being unused in the committed
version, but the declaration remained.
Credit to Kazu Hirata for noticing it.
Commit: 4894c67230135c8cb177c0bff45a99c8bf09cefe
https://github.com/llvm/llvm-project/commit/4894c67230135c8cb177c0bff45a99c8bf09cefe
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
[HLSL] add IsTypedResourceElementCompatible type trait (#113730)
This PR implements a new type trait as a builtin,
`__builtin_hlsl_is_typed_resource_element_compatible`
This type traits verifies that the given input type is suitable as a
typed resource element type.
It checks that the given input type is homogeneous, has no more than 4
sub elements, does not exceed 16 bytes, and does not contain any arrays,
booleans, or enums.
Fixes #113223
Commit: 002a0a27bc4702d6f34434c1838cb1698a0b0098
https://github.com/llvm/llvm-project/commit/002a0a27bc4702d6f34434c1838cb1698a0b0098
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
Log Message:
-----------
AMDGPU: Fix broken frame index expansion for v_add_co_u32_e64 (#114634)
With an explicit carry out operand, one too many operands were deleted
resulting in a malformed v_mov_b32.
Commit: 95a2eb70cf850597a5e871380807911e55f341a7
https://github.com/llvm/llvm-project/commit/95a2eb70cf850597a5e871380807911e55f341a7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
A libcxx/test/configs/amdgpu-libc++-shared.cfg.in
A libcxx/test/configs/nvptx-libc++-shared.cfg.in
M libcxx/test/std/containers/sequences/deque/deque.modifiers/insert_range.pass.cpp
M libcxx/test/std/strings/basic.string/string.modifiers/string_replace/replace_with_range.pass.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libcxx] Add testing configuration for GPU targets (#104515)
Summary:
The GPU runs these tests using the files built from the `libc` project.
These will be placed in `include/<triple>` and `lib/<triple>`. We use
the `amdhsa-loader` and `nvptx-loader` tools, which are also provided by
`libc`. These launch a kernel called `_start` which calls `main` so we
can pretend like GPU programs are normal terminal applications.
We force serial exeuction here, because `llvm-lit` runs way too many
processes in parallel, which has a bad habit of making the GPU drivers
hang or run out of resources. This allows the compilation to be run in
parallel while the jobs themselves are serialized via a file lock.
In the future this can likely be refined to accept user specified
architectures, or better handle including the root directory by exposing
that instead of just `include/<triple>/c++/v1/`.
This currently fails ~1% of the tests on AMDGPU and ~3% of the tests on
NVPTX. This will hopefully be reduced further, and later patches can
XFAIL a lot of them once it's down to a reasonable number.
Future support will likely want to allow passing in a custom
architecture instead of simply relying on `-mcpu=native`.
Commit: 596fd103f896987463d212921421b3e78b6cf051
https://github.com/llvm/llvm-project/commit/596fd103f896987463d212921421b3e78b6cf051
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Share logic to connect predecessors in VPBB/VPIRBB execute (NFC)
This moves the common logic to connect IRBBs created for a VPBB to their
predecessors in the VPlan CFG, making it easier to keep in sync in the
future.
Commit: 2c682272ae7b307ca6e803de1c74baae152ef44c
https://github.com/llvm/llvm-project/commit/2c682272ae7b307ca6e803de1c74baae152ef44c
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
R clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
R clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
Revert "[HLSL] add IsTypedResourceElementCompatible type trait" (#114853)
Reverts llvm/llvm-project#113730
Reverting because test compiler-rt default failed, with:
error: comparison of different enumeration types ('Kind' and
'clang::Type::TypeClass')
Commit: 1c602c5fe5d0a22e9accc08fda4ea50f49938476
https://github.com/llvm/llvm-project/commit/1c602c5fe5d0a22e9accc08fda4ea50f49938476
Author: Roland McGrath <mcgrathr at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libc/include/__llvm-libc-common.h
Log Message:
-----------
[libc] Define away __restrict in C++ without GNU extensions (#114655)
The C99 restrict keyword is spelled __restrict in the libc
headers so it can be parsed by C++ compilers with GNU extensions
that recognize it. When GNU extensions are not available in C++
Commit: 51f7e98d59181ff024481eafd7a8532ae9dbce1b
https://github.com/llvm/llvm-project/commit/51f7e98d59181ff024481eafd7a8532ae9dbce1b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/runtime/CUDA/memory.cpp
Log Message:
-----------
[flang][cuda] Crash if mode is not handled (#114842)
Commit: 8f8e2b732635f03dc646a3c98db0b58a051745b8
https://github.com/llvm/llvm-project/commit/8f8e2b732635f03dc646a3c98db0b58a051745b8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/PathMappingList.h
M lldb/source/Target/PathMappingList.cpp
Log Message:
-----------
[lldb] Improve locking in PathMappingLists (NFC) (#114576)
In [D148380](https://reviews.llvm.org/D148380), Alex added locking to
PathMappingLists. The current implementation runs the callback under the
lock, which I don't believe is necessary. As far as I can tell, no users
of the callback are relying on the list not having been modified until
the callback is handled.
This patch implements my suggestion to unlock the mutex before the
callback. I also switched to a non-recursive mutex as I don't believe
the recursive property is needed. To make the class fully thread safe, I
did have to introduce another mutex to protect the callback members.
The motivation for this change is #114507. Specifically,
Target::SetExecutableModule calls Target::GetOrCreateModule, which
potentially performs path remapping, which in turns has a callback to
Target::SetExecutableModule.
Commit: 19ad7dd8dc92f2999c7651945451f3a24e034df9
https://github.com/llvm/llvm-project/commit/19ad7dd8dc92f2999c7651945451f3a24e034df9
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
Log Message:
-----------
[DirectX] Update DXIL op codes for annotateHandle and createHandleFromBinding to match the spec and DXC (#114473)
DXIL spec for reference:
[DXIL.rst](https://github.com/microsoft/DirectXShaderCompiler/blob/5704c4744e8752adf5c1bacbf94638f30ff330fd/docs/DXIL.rst?plain=1#L2330).
Commit: ffe96ad105464763f6f9521fbd93e2767e2561e5
https://github.com/llvm/llvm-project/commit/ffe96ad105464763f6f9521fbd93e2767e2561e5
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
Log Message:
-----------
[RISCV] Allow undef elements in isDeinterleaveShuffle (#114585)
This allows us to form vnsrl deinterleaves from non-power-of-two
shuffles after they've been legalized to a power of two.
Commit: 6c3704da420357300c4b228c815f41da27b3158d
https://github.com/llvm/llvm-project/commit/6c3704da420357300c4b228c815f41da27b3158d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/StripSymbols.cpp
Log Message:
-----------
StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (#114836)
Commit: ed19ef740bbef206fc8193f7ef29a8e9931d82d8
https://github.com/llvm/llvm-project/commit/ed19ef740bbef206fc8193f7ef29a8e9931d82d8
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/docs/NVPTXUsage.rst
Log Message:
-----------
[NVPTX][docs] Add isspacep.* to usage doc (#114839)
Commit: 3e15454eedb2ba207d8933aea4cdb8f2af4b1a61
https://github.com/llvm/llvm-project/commit/3e15454eedb2ba207d8933aea4cdb8f2af4b1a61
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[tsan] Clang format a few files (#114725)
Commit: 7ac78f13421c6e5dee4655211fc35225bb8812bc
https://github.com/llvm/llvm-project/commit/7ac78f13421c6e5dee4655211fc35225bb8812bc
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/include/clang/APINotes/Types.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
A clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/lifetimebound.cpp
Log Message:
-----------
[clang] Add preliminary lifetimebound support to APINotes (#114830)
Commit: c949500d519085a4e5b93928b14ca766a353ad73
https://github.com/llvm/llvm-project/commit/c949500d519085a4e5b93928b14ca766a353ad73
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/runtime/CUDA/memory.cpp
Log Message:
-----------
[flang][cuda] Fix not declared terminator (#114866)
Commit: 704808c275fa63d618c8d786313b3da815d4a75b
https://github.com/llvm/llvm-project/commit/704808c275fa63d618c8d786313b3da815d4a75b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Affine/Utils.h
M mlir/include/mlir/Interfaces/ViewLikeInterface.h
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/loop-coalescing.mlir
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Tensor/extract-slice-from-collapse-shape.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/python/dialects/affine.py
Log Message:
-----------
[mlir][affine] Add static basis support to affine.delinearize (#113846)
This commit makes `affine.delinealize` join other indexing operators,
like `vector.extract`, which store a mixed static/dynamic set of sizes,
offsets, or such. In this case, the `basis` (the set of values that will
be used to decompose the linear index) is now stored as an array of
index attributes where the basis is statically known, eliminating the
need to cretae constants.
This commit also adds copies of the delinearize utility in the affine
dialect to allow it to take an array of `OpFoldResult`s and extends te
DynamicIndexList parser/printer to allow specifying the delimiters in
tablegen (this is needed to avoid breaking existing syntax).
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: d727eecfa65fa906066783ca2cafa80ee1437798
https://github.com/llvm/llvm-project/commit/d727eecfa65fa906066783ca2cafa80ee1437798
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libc/test/integration/src/stdio/CMakeLists.txt
Log Message:
-----------
[libc] Disable failing AMDGPU test temporarily
Summary:
Started failing in https://lab.llvm.org/buildbot/#/builders/73/builds/7977.
Commit: 176d6535ae417364622ef547099bef3c525b1f0f
https://github.com/llvm/llvm-project/commit/176d6535ae417364622ef547099bef3c525b1f0f
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
Log Message:
-----------
[RISCV] Add tests for single source interleave shuffles
These are failing to match vnsrl because we only check for the dual source
form.
Commit: 3a5791e75c53234bb25cb7a427c990d3cb6a0883
https://github.com/llvm/llvm-project/commit/3a5791e75c53234bb25cb7a427c990d3cb6a0883
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
A llvm/include/llvm/Transforms/Utils/LongestCommonSequence.h
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SampleProf] Templatize longestCommonSequence (NFC) (#114633)
This patch moves the implementation of longestCommonSequence to a new
header file.
I'm planning to implement a profile undrifting algorithm for MemProf
so that the compiler can ingest somewhat stale MemProf profile and
still deliver most of the benefits that would be delivered if the
profile were completely up to date (with no line number or column
number differences).
Since the core undrifting algorithm is the same between MemProf and
AutoFDO, this patch turns longestCommonSequence into a template. The
original longestCommonSequence implementation is repurposed and now
serves as a wrapper around a template specialization.
Note that the usage differences between MemProf and AutoFDO are minor.
For example, I'm planning to use line-column number pair instead of
LineLocation, which uses a discriminator. To identify a function, I'm
planning to use uint64_t GUID instead of FunctionId.
For now, I'm returning matches via a function object InsertMatching
because it's impossible to infer the map type from LineLocation alone.
Specifically:
std::unordered_map<LineLocation, LineLocation>
does not work because we cannot infer the hash functor
LineLocationHash. I could define std::hash<LineLocation>.
Alternatively, in the future, I might switch to DenseMap and define
DenseMapInfo<LineLocation>. This way:
DenseMap<LineLocation, LineLocation>
automatically picks up DenseMapInfo<LineLocation>.
Commit: 9d09c6fd9c38a0e631e42a902ae215fb2f828da9
https://github.com/llvm/llvm-project/commit/9d09c6fd9c38a0e631e42a902ae215fb2f828da9
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Update device descriptor on data transfer (#114838)
When the destination of the data transfer is a global we might need to
sync the descriptor after the data transfer is done. This is the case
when the data transfer is from host/device to device as reallocation
might have happened and the descriptor on the device needs to take the
new values written on the host.
A new entry point is added `CUFDataTransferGlobalDescDesc` with the sync
when needed.
Commit: 795b4efad0259cbf03fc98e3045621916328ce57
https://github.com/llvm/llvm-project/commit/795b4efad0259cbf03fc98e3045621916328ce57
Author: Nachi G <nacgarg at users.noreply.github.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/test/Dialect/Index/index-canonicalize.mlir
Log Message:
-----------
[MLIR] Add canonicalizations to all eligible `index` binary ops (#114000)
Generalizes the following canonicalization pattern to all associative
and commutative binary ops in the `index` dialect.
```
x = v + c1
y = x + c2
-->
y = x + (c1 + c2)
```
This includes:
- `AddOp`
- `MulOp`
- `MaxSOp`
- `MaxUOp`
- `MinSOp`
- `MinUOp`
- `AndOp`
- `OrOp`
- `XOrOp`
The operation folding is implemented using the existing folders since
`createAndFold` is used in the canonicalization.
Commit: a57296ad411a75c1376458f6b09cb75128c6e785
https://github.com/llvm/llvm-project/commit/a57296ad411a75c1376458f6b09cb75128c6e785
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Create dependent modules in parallel (#114507)
Create dependent modules in parallel in Target::SetExecutableModule.
This change was inspired by #110646 which takes the same approach when
attaching. Jason suggested we could use the same approach when you
create a target in LLDB.
I used Slack for benchmarking, which loads 902 images.
```
Benchmark 1: ./bin/lldb /Applications/Slack.app/Contents/MacOS/Slack
Time (mean ± σ): 1.225 s ± 0.003 s [User: 3.977 s, System: 1.521 s]
Range (min … max): 1.220 s … 1.229 s 10 runs
Benchmark 2: ./bin/lldb /Applications/Slack.app/Contents/MacOS/Slack
Time (mean ± σ): 3.253 s ± 0.037 s [User: 3.013 s, System: 0.248 s]
Range (min … max): 3.211 s … 3.310 s 10 runs
```
We see about a 2x speedup, which matches what Jason saw for the attach
scenario. I also ran this under TSan to confirm this doesn't introduce
any races or deadlocks.
Commit: 8528130a0c862a41de7cd7952c6a0b58e1751419
https://github.com/llvm/llvm-project/commit/8528130a0c862a41de7cd7952c6a0b58e1751419
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 704808c275fa63d618c8d786313b3da815d4a75b
Commit: 8d023b7d660dc5347740cb5e17e1dfbf8ff93686
https://github.com/llvm/llvm-project/commit/8d023b7d660dc5347740cb5e17e1dfbf8ff93686
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Combine some setOperationAction calls and update a FIXME. NFC
Commit: d2d1b5897e871f7b4873befbe2b85db58744e42b
https://github.com/llvm/llvm-project/commit/d2d1b5897e871f7b4873befbe2b85db58744e42b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libclc/amdgcn/lib/integer/popcount.cl
M libclc/amdgcn/lib/math/fmax.cl
M libclc/amdgcn/lib/math/fmin.cl
M libclc/amdgcn/lib/math/ldexp.cl
M libclc/amdgpu/lib/math/half_native_unary.inc
M libclc/amdgpu/lib/math/nextafter.cl
M libclc/amdgpu/lib/math/sqrt.cl
A libclc/clc/include/clc/clcmacro.h
M libclc/clspv/lib/math/fma.cl
M libclc/generic/include/math/clc_sqrt.h
R libclc/generic/include/utils.h
M libclc/generic/lib/atom_int32_binary.inc
R libclc/generic/lib/clcmacro.h
M libclc/generic/lib/common/degrees.cl
M libclc/generic/lib/common/radians.cl
M libclc/generic/lib/common/sign.cl
M libclc/generic/lib/common/smoothstep.cl
M libclc/generic/lib/common/step.cl
M libclc/generic/lib/integer/add_sat.cl
M libclc/generic/lib/integer/clz.cl
M libclc/generic/lib/integer/mad_sat.cl
M libclc/generic/lib/integer/sub_sat.cl
M libclc/generic/lib/math/acos.cl
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/acospi.cl
M libclc/generic/lib/math/asin.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/asinpi.cl
M libclc/generic/lib/math/atan.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/atanpi.cl
M libclc/generic/lib/math/cbrt.cl
M libclc/generic/lib/math/ceil.cl
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/clc_sw_binary.inc
M libclc/generic/lib/math/clc_sw_unary.inc
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/math/clc_tanpi.cl
M libclc/generic/lib/math/copysign.cl
M libclc/generic/lib/math/cos.cl
M libclc/generic/lib/math/cosh.cl
M libclc/generic/lib/math/cospi.cl
M libclc/generic/lib/math/erf.cl
M libclc/generic/lib/math/erfc.cl
M libclc/generic/lib/math/exp.cl
M libclc/generic/lib/math/exp2.cl
M libclc/generic/lib/math/expm1.cl
M libclc/generic/lib/math/fabs.cl
M libclc/generic/lib/math/floor.cl
M libclc/generic/lib/math/fmax.cl
M libclc/generic/lib/math/fmin.cl
M libclc/generic/lib/math/frexp.cl
M libclc/generic/lib/math/frexp.inc
M libclc/generic/lib/math/half_binary.inc
M libclc/generic/lib/math/half_unary.inc
M libclc/generic/lib/math/ilogb.cl
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/lgamma.cl
M libclc/generic/lib/math/lgamma_r.cl
M libclc/generic/lib/math/log.cl
M libclc/generic/lib/math/log10.cl
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/log2.cl
M libclc/generic/lib/math/logb.cl
M libclc/generic/lib/math/maxmag.cl
M libclc/generic/lib/math/minmag.cl
M libclc/generic/lib/math/nan.cl
M libclc/generic/lib/math/native_unary_intrinsic.inc
M libclc/generic/lib/math/rsqrt.cl
M libclc/generic/lib/math/sin.cl
M libclc/generic/lib/math/sinh.cl
M libclc/generic/lib/math/sinpi.cl
M libclc/generic/lib/math/tables.h
M libclc/generic/lib/math/tanh.cl
M libclc/generic/lib/math/tgamma.cl
M libclc/generic/lib/math/unary_builtin.inc
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/select.cl
M libclc/ptx/lib/math/nextafter.cl
M libclc/r600/lib/math/fmax.cl
M libclc/r600/lib/math/fmin.cl
M libclc/r600/lib/math/native_rsqrt.cl
M libclc/r600/lib/math/rsqrt.cl
Log Message:
-----------
[libclc] Move clcmacro.h to CLC library. NFC (#114845)
Commit: e9de53875b9005233f07a68d80e144af8607893b
https://github.com/llvm/llvm-project/commit/e9de53875b9005233f07a68d80e144af8607893b
Author: Hubert Tong <hstong at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxxabi/src/demangle/README.txt
M llvm/include/llvm/Demangle/README.txt
Log Message:
-----------
NFC: Demangler README.txt: Fix LLVM unittests path
Commit: 22db91c5e8d212fb96e134be4a591d8d4fa1462b
https://github.com/llvm/llvm-project/commit/22db91c5e8d212fb96e134be4a591d8d4fa1462b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
Log Message:
-----------
[RISCV] Another length changing shuffle lowering case
"32" is currently a special number - it's one past the maximum representable
immediate on a vslidedown.vi and thus the first sub-vector we do *not*
consider "cheap" in RISCVTargetLowering::isExtractSubvectorCheap.
Commit: 97b7474970b3bb6af4c63782c408a1fd14468e29
https://github.com/llvm/llvm-project/commit/97b7474970b3bb6af4c63782c408a1fd14468e29
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Remove unneeded assert from SelectionDAG::getSignedConstant. NFC (#114336)
This assert is also present inside the APInt constructor after #114539.
Commit: 6127724786d581d2653df7420d1f28709288a107
https://github.com/llvm/llvm-project/commit/6127724786d581d2653df7420d1f28709288a107
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
R cmake/Modules/HandleOutOfTreeLLVM.cmake
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M libunwind/docs/BuildingLibunwind.rst
M llvm/docs/HowToBuildWindowsItaniumPrograms.rst
M runtimes/CMakeLists.txt
Log Message:
-----------
[cmake] Remove obsolete files, docs and CMake variables related to the standalone build (#112741)
The runtimes used to support a build mode called the "Standalone build",
which isn't supported anymore (and hasn't been for a few years).
However, various places in the code still contained stuff whose only
purpose was to support that build mode, and some outdated documentation.
This patch cleans that up (although I probably missed some).
- Remove HandleOutOfTreeLLVM.cmake which isn't referenced anymore
- Remove the LLVM_PATH CMake variable which isn't used anymore
- Update some outdated documentation referencing standalone builds
Commit: fa57c7a6a5f594a9e3ae2dbe3542cf89a20cdd73
https://github.com/llvm/llvm-project/commit/fa57c7a6a5f594a9e3ae2dbe3542cf89a20cdd73
Author: Hongtao Yu <hoy at meta.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
Log Message:
-----------
[mlir] Extend SCF loopUnrollByFactor to return the result loops (#114573)
There is a need of accessing the resulted epilog loop from the SC loop
unroller. It'd clean and convenient to get that directly from the loop
unroller instead of rescanning the whole function, as discussed in
https://github.com/triton-lang/triton/pull/5027 . I'm changing the
result type of `loopUnrollByFactor` for that.
Commit: bb9ff32867d633787b5dd2572bc6e2fe5dade107
https://github.com/llvm/llvm-project/commit/bb9ff32867d633787b5dd2572bc6e2fe5dade107
Author: Vincent Lee <thevinster at users.noreply.github.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Clean up unused exported files (#114620)
Some minor cleanup to the bazel files. These exported files are not
being referenced anymore in the tree, afaict, so let's clean them up.
Additionally, moved one of the filegroup targets higher to be consistent
with other filegroup usages where it's defined before first usage.
Commit: 2c95fb923308302a02096c7181498437345b14f9
https://github.com/llvm/llvm-project/commit/2c95fb923308302a02096c7181498437345b14f9
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
Log Message:
-----------
[test] Autogen a test to reflect a name change
I'd committed a new test recently. I apparently renamed it at the last
minute and forgot to run update. Thanksfully, the original name was
a suffix of the new name, so the matching continued to work and no
test failures were reported.
Commit: 21d25d2bcd74a311ddfea970c028e0b8d5ea129f
https://github.com/llvm/llvm-project/commit/21d25d2bcd74a311ddfea970c028e0b8d5ea129f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/lib/CodeGen/CGExpr.cpp
A clang/test/CodeGen/ubsan-type-ignorelist-enum.test
Log Message:
-----------
[ubsan] Suppression by type for `-fsanitize=enum` (#114754)
Similar to #107332.
Commit: d1d3e4b27341e267c3f79907430bc9dce24c6687
https://github.com/llvm/llvm-project/commit/d1d3e4b27341e267c3f79907430bc9dce24c6687
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
Log Message:
-----------
[WebAssembly] Add/Reorder legacy EH tests (#114363)
These tests are added to match the standard EH tests in #114361:
- `nested_try`
- `unwind_mismatches_with_loop`
These tests are useful to test certain aspects of the new EH but I think
they add more coverage to the legaacy tests as well.
And `unstackify_when_fixing_unwind_mismatch` and `unwind_mismatches_5`
have not changed; they have been just moved.
This also fixes some comments.
Commit: 73822e4335e16b3f8f290561579f1f1118e005af
https://github.com/llvm/llvm-project/commit/73822e4335e16b3f8f290561579f1f1118e005af
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
Log Message:
-----------
[WebAssembly] Fix comments in CFGStackify (NFC) (#114362)
This fixes comments in CFGStackify and renames a variable to be clearer.
Commit: be64ca912371ae62002aee3429de058052451d72
https://github.com/llvm/llvm-project/commit/be64ca912371ae62002aee3429de058052451d72
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
R lld/test/wasm/Inputs/require-feature-foo.yaml
R lld/test/wasm/target-feature-required.yaml
M lld/test/wasm/target-feature-used.yaml
M lld/wasm/Writer.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/test/ObjectYAML/wasm/target-features-section.yaml
Log Message:
-----------
[WebAssembly] Remove WASM_FEATURE_PREFIX_REQUIRED (NFC) (#113729)
This has not been emitted since
https://github.com/llvm/llvm-project/commit/3f34e1b883351c7d98426b084386a7aa762aa366.
The corresponding proposed tool-conventions change:
https://github.com/WebAssembly/tool-conventions/pull/236
Commit: 61e50b9f03311504bc7c846a05336a8b6491e6b2
https://github.com/llvm/llvm-project/commit/61e50b9f03311504bc7c846a05336a8b6491e6b2
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Added mmap and shm interceptors (#114862)
# Why do we think these are unsafe?
mmap and munmap are used for mapping a specific manipulation of the
virtual memory of a process. Typically used in things like databases and
area allocators.
They call the system calls `mmap` and `munmap` under the hood (confirmed
on mac using dtrace)
shm_open/unlink interact with shared memory across processes.
Similarly under the hood, they call the `shm_open`/`shm_unlink` system
calls (confirmed on mac using dtrace)
Commit: 910a73f3aa56388028d87e319862580daaf03152
https://github.com/llvm/llvm-project/commit/910a73f3aa56388028d87e319862580daaf03152
Author: LIU Hao <lh_mouse at 126.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/test/MC/X86/intel-syntax-ambiguous.s
M llvm/test/MC/X86/intel-syntax-ptr-sized.s
Log Message:
-----------
[X86] Make POP imply pointer-size operands, as with PUSH for Intel syntax (#114533)
On x86-32 the word PUSH (50+rd) and POP (58+rd) instructions assume only
32-bit operands, and on x86-64 they assume only 64-bit operands; in
neither case should the absence of an operand size be ambiguous.
Those special case were added in
f6fb78089060818b4352b540abc44da4f62b95ef and lacking of POP seemed an
oversight.
This closes https://github.com/llvm/llvm-project/issues/114531.
Commit: c271ba7f7961f7c2ba911853113e67ed6237a77b
https://github.com/llvm/llvm-project/commit/c271ba7f7961f7c2ba911853113e67ed6237a77b
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-invalid.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
Log Message:
-----------
[mlir][bufferization] Add support for recursive function calls (#114003)
This commit adds support for recursive function calls to One-Shot
Bufferize.
The analysis does not support recursive function calls. The function
body itself can be analyzed, but we cannot make any assumptions about
the aliasing relation between function result and function arguments.
Similarly, when looking at a `call` op, we do not know whether the
operands will bufferize to a memory read/write. In the absence of such
information, we have to conservatively assume that they do.
This commit is in preparation of removing the deprecated
`func-bufferize` pass. That pass can bufferize recursive functions.
Commit: 00a93e6207ac053e7a42368a52cf51a744ecd139
https://github.com/llvm/llvm-project/commit/00a93e6207ac053e7a42368a52cf51a744ecd139
Author: Peter Hawkins <phawkins at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
Log Message:
-----------
[mlir:python] Change PyOperation::create to actually return a PyOperation. (#114542)
In the tablegen-generated Python bindings, we typically see a pattern
like:
```
class ConstantOp(_ods_ir.OpView):
...
def __init__(self, value, *, loc=None, ip=None):
...
super().__init__(self.build_generic(attributes=attributes, operands=operands, successors=_ods_successors, regions=regions, loc=loc, ip=ip))
```
i.e., the generated code calls `OpView.__init__()` with the output of
`build_generic`. The purpose of `OpView` is to wrap another operation
object, and `OpView.__init__` can accept any `PyOperationBase` subclass,
and presumably the intention is that `build_generic` returns a
`PyOperation`, so the user ends up with a `PyOpView` wrapping a
`PyOperation`.
However, `PyOpView::buildGeneric` calls `PyOperation::create`, which
does not just build a PyOperation, but it also calls `createOpView` to
wrap that operation in a subclass of `PyOpView` and returns that view.
But that's rather pointless: we called this code from the constructor of
an `OpView` subclass, so we already have a view object ready to go; we
don't need to build another one!
If we change `PyOperation::create` to return the underlying
`PyOperation`, rather than a view wrapper, we can save allocating a
useless `PyOpView` object for each ODS-generated Python object.
This saves approximately 1.5s of Python time in a JAX LLM benchmark that
generates a mixture of upstream dialects and StableHLO.
Commit: 999dfb2067eb75609b735944af876279025ac171
https://github.com/llvm/llvm-project/commit/999dfb2067eb75609b735944af876279025ac171
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-narrow-binop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
Log Message:
-----------
[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)
This matches InstCombine and DAGCombine.
RISC-V only has an ADDI instruction so without this we need additional
patterns to do the conversion.
Some of the AMDGPU tests look like possible regressions. Maybe some
patterns from isel aren't imported.
Commit: ffcf3c8688f57acaf6a404a1238673c9d197ba9a
https://github.com/llvm/llvm-project/commit/ffcf3c8688f57acaf6a404a1238673c9d197ba9a
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lld/test/MachO/cgdata-generate.s
M llvm/docs/CommandGuide/llvm-cgdata.rst
M llvm/include/llvm/CGData/CodeGenData.h
M llvm/include/llvm/CGData/CodeGenData.inc
M llvm/include/llvm/CGData/CodeGenDataReader.h
M llvm/include/llvm/CGData/CodeGenDataWriter.h
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/CGData/CodeGenDataWriter.cpp
M llvm/test/tools/llvm-cgdata/empty.test
M llvm/test/tools/llvm-cgdata/error.test
R llvm/test/tools/llvm-cgdata/merge-archive.test
A llvm/test/tools/llvm-cgdata/merge-combined-funcmap-hashtree.test
R llvm/test/tools/llvm-cgdata/merge-concat.test
R llvm/test/tools/llvm-cgdata/merge-double.test
A llvm/test/tools/llvm-cgdata/merge-funcmap-archive.test
A llvm/test/tools/llvm-cgdata/merge-funcmap-concat.test
A llvm/test/tools/llvm-cgdata/merge-funcmap-double.test
A llvm/test/tools/llvm-cgdata/merge-funcmap-single.test
A llvm/test/tools/llvm-cgdata/merge-hashtree-archive.test
A llvm/test/tools/llvm-cgdata/merge-hashtree-concat.test
A llvm/test/tools/llvm-cgdata/merge-hashtree-double.test
A llvm/test/tools/llvm-cgdata/merge-hashtree-single.test
R llvm/test/tools/llvm-cgdata/merge-single.test
M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
Log Message:
-----------
[CGData][llvm-cgdata] Support for stable function map (#112664)
This introduces a new cgdata format for stable function maps. The raw
data is embedded in the __llvm_merge section during compile time. This
data can be read and merged using the llvm-cgdata tool, into an indexed
cgdata file. Consequently, the tool is now capable of handling either
outlined hash trees, stable function maps, or both, as they are
orthogonal.
Depends on #112662.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: ea859005b5ddb14548b9dc5b94d54d78754f5918
https://github.com/llvm/llvm-project/commit/ea859005b5ddb14548b9dc5b94d54d78754f5918
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
A llvm/test/Transforms/SafeStack/X86/alloca-addrspace-wrong-addrspace-error.ll
A llvm/test/Transforms/SafeStack/X86/alloca-addrspace-wrong-addrspace.ll
A llvm/test/Transforms/SafeStack/X86/alloca-addrspace.ll
Log Message:
-----------
SafeStack: Respect alloca addrspace (#112536)
Just insert addrspacecast in cases where the alloca uses a
different address space, since I don't know what else you
could possibly do.
Commit: fade3be83d8e4cad65418d3ab9849e49c8495cb3
https://github.com/llvm/llvm-project/commit/fade3be83d8e4cad65418d3ab9849e49c8495cb3
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Wrap `Atomic`/`NoTsanAtomic` int struct (#114909)
Prepare to replace macro with template.
Related to #114724, but it's not strictly needed.
Commit: 2d2371df0f0f8c3a1ee48ec27a908a263307d08c
https://github.com/llvm/llvm-project/commit/2d2371df0f0f8c3a1ee48ec27a908a263307d08c
Author: Pranav Kant <prka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[bazel][libc] Fix bazel build (#114917)
Commit: 9f73c69e5aa2d1112f72b2e18d4ae0462a6a2042
https://github.com/llvm/llvm-project/commit/9f73c69e5aa2d1112f72b2e18d4ae0462a6a2042
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
Log Message:
-----------
[ORC] Add signext on @sum() arguments in test. (#113308)
Make sure the inlined @sum() function has the right extension attributes
on its arguments.
A new struct TargetI32ArgExtensions is added that sets the Ret/Arg extension
strings given a string TargetTriple. This might be used elsewhere as well for
this purpose if needed.
Fixes: #112503
Commit: efe9ba56e709c1dc6133ec1270431277635fbc9e
https://github.com/llvm/llvm-project/commit/efe9ba56e709c1dc6133ec1270431277635fbc9e
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Deduplicate VECTOR_SHUFFLE fixed-length FP setOperationAction. NFC
Also reshuffle the nodes so they're in enum order.
Commit: 097718bfe2624bfdbb8a39ffe2113539f7a743ae
https://github.com/llvm/llvm-project/commit/097718bfe2624bfdbb8a39ffe2113539f7a743ae
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/OrcLazy/lit.local.cfg
M llvm/test/ExecutionEngine/OrcLazy/minimal-throw-catch.ll
Log Message:
-----------
[ORC] Enable lli -jit-kind=orc-lazy tests on aarch64.
Commit: 013f4a46d1978e370f940df3cbd04fb0399a04fe
https://github.com/llvm/llvm-project/commit/013f4a46d1978e370f940df3cbd04fb0399a04fe
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/BypassSlowDivision.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/Evaluator.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/FunctionComparator.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LowerSwitch.cpp
M llvm/lib/Transforms/Utils/MisExpect.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/SplitModule.cpp
M llvm/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp
M llvm/lib/Transforms/Utils/Utils.cpp
M llvm/lib/Transforms/Utils/VNCoercion.cpp
Log Message:
-----------
[Utils] Remove unused includes (NFC) (#114748)
Identified with misc-include-cleaner.
Commit: 2f13fbfcd1b874019191ab68b661d9b9d82d8556
https://github.com/llvm/llvm-project/commit/2f13fbfcd1b874019191ab68b661d9b9d82d8556
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Support bitcasting into float fields (#114825)
Commit: a7d1d381d2867858ebf4cc6c02c5d71369a6104e
https://github.com/llvm/llvm-project/commit/a7d1d381d2867858ebf4cc6c02c5d71369a6104e
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
Log Message:
-----------
[RISCV] Use integer VTypeInfo predicate for vmv_v_v_vl pattern (#114915)
When lowering fixed length f16 insert_subvector nodes at index 0 we
crashed with zvfhmin because we couldn't select vmv_v_v_vl.
This was due to the predicates requiring full zvfh, even though we only
need zve32x. Use the integer VTypeInfo instead similarly to
VPatSlideVL_VX_VI.
The extract_subvector tests aren't related but were just added for
consistency with the insert_subvector tests.
Commit: f8a2a5025ef890408c7201beec67085b830ecdf7
https://github.com/llvm/llvm-project/commit/f8a2a5025ef890408c7201beec67085b830ecdf7
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/RedirectionManager.cpp
Log Message:
-----------
[ORC] Pass InitialDests map for redirectable symbols by value.
RedirectableMaterializationUnit needs its own copy of this map anyway, so
passing by value allows us to potentially omit a copy.
Commit: a9f829a3d7556593e0814080c8e33eca09e3a51e
https://github.com/llvm/llvm-project/commit/a9f829a3d7556593e0814080c8e33eca09e3a51e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Move out `morder` params from __VA_ARGS__ (#114916)
In #114724 I'd like to cast from int to enum, but
existing code `mo = convert_morder(mo)` does not
allow that.
Commit: 2d6e9724725f542acb4dea54a5de818ac3ff9f5c
https://github.com/llvm/llvm-project/commit/2d6e9724725f542acb4dea54a5de818ac3ff9f5c
Author: Nimish Mishra <neelam.nimish at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/test/Lower/OpenMP/Todo/task_detach.f90
M flang/test/Parser/OpenMP/task.f90
Log Message:
-----------
[flang] Fix tests
Add an additional flag to tests.
Commit: 76b71c0bc4fb2e5e77a4602ce03687a31064c156
https://github.com/llvm/llvm-project/commit/76b71c0bc4fb2e5e77a4602ce03687a31064c156
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/version
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Set `__cpp_lib_smart_ptr_for_overwrite` (#114700)
The features were implemented in LLVM 16, but mistakenly considered
unimplemented in FTM tools.
Commit: ac4ffcf038f1607a40e7bada914d6febd79d98f1
https://github.com/llvm/llvm-project/commit/ac4ffcf038f1607a40e7bada914d6febd79d98f1
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
R llvm/test/MC/Disassembler/X86/amx-transpose-att.s
R llvm/test/MC/Disassembler/X86/amx-transpose-intel.s
A llvm/test/MC/X86/amx-transpose-att.s
A llvm/test/MC/X86/amx-transpose-intel.s
Log Message:
-----------
[X86][NFC] Move assemble tests to the right folder (#114934)
Commit: a8f80897ba4e41fa2ead50f9f6d652b80b4c51fb
https://github.com/llvm/llvm-project/commit/a8f80897ba4e41fa2ead50f9f6d652b80b4c51fb
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
Log Message:
-----------
[RISCV] Handle zvfhmin/zvfbfmin in lowerVECTOR_SHUFFLEAsVSlide1 (#114925)
Most of lowerVECTOR_SHUFFLE lowers to nodes that work on f16 and bf16
vectors, with the exception of the vslide1 lowering which tries to emit
vfslide1s. Handle this case as an integer vslide1 via fmv.x.h.
Fixes #114893
Commit: aea6b255f0362cc74f8c1263834cc477bc095a9e
https://github.com/llvm/llvm-project/commit/aea6b255f0362cc74f8c1263834cc477bc095a9e
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
Log Message:
-----------
[RISCV] Lower fixed-length {insert,extract}_vector_elt on zvfhmin/zvfbfmin (#114927)
RISCVTargetLowering::lower{INSERT,EXTRACT}_VECTOR_ELT already handles
f16 and bf16 scalable vectors after #110221, so we can reuse it for
fixed-length vectors.
Commit: 1a44a53cd52562c0a2805c738a5417dfa535cec9
https://github.com/llvm/llvm-project/commit/1a44a53cd52562c0a2805c738a5417dfa535cec9
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Log Message:
-----------
[LSR][NFC] Use range-based `for` (#113889)
Commit: 847d4eb42735e48f7a69036a257a2e531b0f6260
https://github.com/llvm/llvm-project/commit/847d4eb42735e48f7a69036a257a2e531b0f6260
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
Log Message:
-----------
Update clang static analyzers per rename of member functions in CanMakeCheckedPtr. (#114636)
The member functions that define CheckedPtr capable type is
incrementCheckedPtrCount and decrementCheckedPtrCount after the rename.
Commit: 19b26d37693b20dbe5bbe083dc6320ba21732da3
https://github.com/llvm/llvm-project/commit/19b26d37693b20dbe5bbe083dc6320ba21732da3
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
Log Message:
-----------
[HLSL][NFC] Cleanup - removed unused function, includes and param, fix typos (#113649)
Commit: 7767aa45abf9706fa5ec9a2b182f3ccde92a93f0
https://github.com/llvm/llvm-project/commit/7767aa45abf9706fa5ec9a2b182f3ccde92a93f0
Author: Sebastian Kreutzer <SebastianKreutzer at gmx.net>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/Driver/XRayArgs.cpp
M clang/test/Driver/XRay/xray-shared.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_trampoline_AArch64.S
M compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
M compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
M compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
M compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
Log Message:
-----------
[XRay][AArch64] Support -fxray-shared (#114431)
This patch adds support for `-fxray-shared` on AArch64. This feature,
introduced in #113548 for x86_64, enables the instrumentation of shared
libraries with XRay.
Changes:
- Adds AArch64 to the list of targets supporting `-fxray-shared`
- Introduces PIC versions of the AArch64 XRay trampolines
- Adjusts relevant XRay tests
Commit: f50547e8c8778ce279e1e3c0bb5f01b0c7ffa186
https://github.com/llvm/llvm-project/commit/f50547e8c8778ce279e1e3c0bb5f01b0c7ffa186
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
Log Message:
-----------
[RISCV] Lower fixed-length bf16 vector bitcasts (#114938)
Currently we crash because we can't select it. Also add tests for f16
with zvfhmin.
Commit: 7de1eff7cff35481e4a502858c5e3ff21502b186
https://github.com/llvm/llvm-project/commit/7de1eff7cff35481e4a502858c5e3ff21502b186
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/Protocol.cpp
Log Message:
-----------
[clangd] Check for editsNearCursor client capability under experimental capabilities (#114699)
This is done to support clients which only support adding custom
(language-specific or server-specific) capabilities under
'experimental'.
Fixes https://github.com/clangd/clangd/issues/2201
Commit: 70de0b8bea31bb734bce86581574a60a0968d838
https://github.com/llvm/llvm-project/commit/70de0b8bea31bb734bce86581574a60a0968d838
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Simplify initialization of MinProfitableTripCount (#113445)
Iteration runtime check confirms whether the trip count is greater than
VFxUF at least. Therefore, there is no need to adjust the
MinProfitableTripCount to VF if it is zero.
Retaining the original MinProfitableTripCount information is also
beneficial for supporting more profitable runtime checks in the future.
Commit: 3495d0456021618be73de1ed0a3aa97952513ffc
https://github.com/llvm/llvm-project/commit/3495d0456021618be73de1ed0a3aa97952513ffc
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-invalid.mir
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-not-a-reg.mir
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir
Log Message:
-----------
[AMDGPU][MIR] Serialize SpillPhysVGPRs (#113129)
Commit: e9a4f2c30a108c51eaa18f4ba2e803079aa7b8e1
https://github.com/llvm/llvm-project/commit/e9a4f2c30a108c51eaa18f4ba2e803079aa7b8e1
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
Log Message:
-----------
[RISCV] Convert test to opaque pointers. NFC
Commit: bf43a138f0a6220cd043a376200bd739cacb25e3
https://github.com/llvm/llvm-project/commit/bf43a138f0a6220cd043a376200bd739cacb25e3
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/AST/Decl.h
Log Message:
-----------
[clang] Initialize DeclaratorDecl.ExtInfo.TInfo to null (#114198)
I believe this has no effect current behavior but would make code safer
in case we forget to initialize this.
Commit: 283273fa1e3be4a03f06a5efd08a8c818be981fd
https://github.com/llvm/llvm-project/commit/283273fa1e3be4a03f06a5efd08a8c818be981fd
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
[clang] Add maintainer for Recovery expressions. (#114859)
Commit: d084bc291a21895fa2ecc74e2d1c9d1818ba4fd7
https://github.com/llvm/llvm-project/commit/d084bc291a21895fa2ecc74e2d1c9d1818ba4fd7
Author: Jérôme Duval <jerome.duval at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/profile/InstrProfilingPlatformOther.c
M compiler-rt/test/builtins/Unit/ctor_dtor.c
M compiler-rt/test/builtins/Unit/dso_handle.cpp
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/profile/Posix/gcov-destructor.c
M compiler-rt/test/profile/Posix/gcov-dlopen.c
M compiler-rt/test/profile/Posix/instrprof-dlopen-norpath.test
M compiler-rt/test/profile/instrprof-error.c
M compiler-rt/test/profile/lit.cfg.py
Log Message:
-----------
[compiler-rt][profile] Add support for LLVM profile for Haiku (#107575)
Haiku uses typical UNIX interfaces.
All tests pass except
instrprof-error.c
Posix/gcov-dlopen.c
Posix/gcov-destructor.c
Posix/instrprof-dlopen-norpath.test
---------
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: dc62edf10543137fbf7f3d4aaa21c17ff073a8fe
https://github.com/llvm/llvm-project/commit/dc62edf10543137fbf7f3d4aaa21c17ff073a8fe
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/test/Driver/hip-toolchain-no-rdc.hip
Log Message:
-----------
[clang][Driver][HIP] Add support for mixing AMDGCNSPIRV & concrete `offload-arch`s. (#113509)
This removes the temporary ban on mixing AMDGCN flavoured SPIR-V and
concrete targets (e.g. `gfx900`) in the same HIPAMD compilation. This is
done primarily by tweaking the effective / observable triple when the
target is `amdgcnspirv`, which seamlessly composes with the existing
infra. The test is stolen from #75357.
Commit: 46ccefb1236bf29b2d752715373d407f2d4c3d61
https://github.com/llvm/llvm-project/commit/46ccefb1236bf29b2d752715373d407f2d4c3d61
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/urem.ll
Log Message:
-----------
[CVP] Fix APInt ctor assertion with i1 urem
This is creating an APInt with value 2, which may not be well-defined
for i1 values. Fix this by replacing the Y.umul_sat(2) with
Y.uadd_sat(Y).
Commit: cdfd4cff555db532a9001662fc8d6a7b05f1c2c3
https://github.com/llvm/llvm-project/commit/cdfd4cff555db532a9001662fc8d6a7b05f1c2c3
Author: Hans <hans at hanshq.net>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[win/asan] Search both higher and lower in AllocateTrampolineRegion (#114212)
There may not always be available virtual memory at higher addresses
than the target function. Therefore, search also lower addresses while
ensuring that we stay within the accessible memory range.
Additionally, add more ReportError calls to make the reasons for
interception failure more clear.
Commit: a256e89fd1b9f42d3f29df42d4f21ea823476ff3
https://github.com/llvm/llvm-project/commit/a256e89fd1b9f42d3f29df42d4f21ea823476ff3
Author: Ying Huang <ying.huang at oss.cipunited.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/Mips/fp16-promote.ll
Log Message:
-----------
[Mips] Add additional half float tests (NFC)
For https://github.com/llvm/llvm-project/pull/110199.
Commit: bf01bb851b1e1a977ba1b92e7eb9c8c6d773e6d5
https://github.com/llvm/llvm-project/commit/bf01bb851b1e1a977ba1b92e7eb9c8c6d773e6d5
Author: aabhinavg <78288544+aabhinavg at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
[lldb] Refactor string manipulation in Debugger.cpp (#92565)
Summary of Changes:
Replaced the ineffective call to `substr` with a more efficient use of
`resize` to truncate the string.
Adjusted the code to use 'resize' instead of 'substr' for better
performance and readability.
Removed unwanted file from the previous commit.
Fixes: #91209
---------
Co-authored-by: aabhinavg <tiwariabhinavak at gmail.com>
Commit: 72f362170fbe7834febfe08d8bd1f7ba935ddbc9
https://github.com/llvm/llvm-project/commit/72f362170fbe7834febfe08d8bd1f7ba935ddbc9
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/test/Dialect/Math/polynomial-approximation.mlir
Log Message:
-----------
[mlir][Math] Fix 0-rank support for PolynomialApproximation (#114826)
This patch disambiguates 0-rank vectors and scalars in
PolynomialApproximation. This fixes a bug in PolynomialApproximation
where 0-rank vectors would be treated as scalars and arguments would not
be broadcasted properly.
Commit: 4831e0aa88debb3b7d0528bfd85db73a6a03aeff
https://github.com/llvm/llvm-project/commit/4831e0aa88debb3b7d0528bfd85db73a6a03aeff
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Linker/IRMover.cpp
A llvm/test/Assembler/mutually-recursive-types.ll
M llvm/test/Assembler/unsized-recursive-type.ll
M llvm/test/Linker/pr22807.ll
R llvm/test/Verifier/recursive-struct-param.ll
R llvm/test/Verifier/recursive-type-1.ll
R llvm/test/Verifier/recursive-type-2.ll
R llvm/test/Verifier/recursive-type-load.ll
R llvm/test/Verifier/recursive-type-store.ll
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[IR] Disallow recursive types (#114799)
StructType::setBody is the only mechanism that can potentially create
recursion in the type system. Add a runtime check that it is not
actually used to create recursion.
If the check fails, report an error from LLParser, BitcodeReader and
IRLinker. In all other cases assert that the check succeeds.
In future StructType::setBody will be removed in favor of specifying the
body when the type is created, so any performance hit from this runtime
check will be temporary.
Commit: 7f9d348eb2a54a2dd07ad9e029baef30d9d9b737
https://github.com/llvm/llvm-project/commit/7f9d348eb2a54a2dd07ad9e029baef30d9d9b737
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
Log Message:
-----------
[Clang] SemaFunctionEffects: When verifying a function, ignore any trailing `requires` clause. (#114266)
---------
Co-authored-by: Doug Wyatt <dwyatt at apple.com>
Commit: 5f84b332ec9fcb24d2e278aef511ac424e4aa3b9
https://github.com/llvm/llvm-project/commit/5f84b332ec9fcb24d2e278aef511ac424e4aa3b9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix discarding __builtin_bit_cast calls (#114926)
Optionally prepare storage for the result and do the bitcast anyway, to
get the right diagnostic output.
Commit: 6d2f4dd79d0106b8f4c743b2fb08ae0ea29411e0
https://github.com/llvm/llvm-project/commit/6d2f4dd79d0106b8f4c743b2fb08ae0ea29411e0
Author: Carlo Cabrera <github at carlo.cab>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/Contributing.rst
Log Message:
-----------
[llvm][docs] update links to `clang-format-diff.py` and `git-clang-format` (#114646)
Point to github instead of phabricator.
Commit: 5dc9c39ac15be0a8c0dd8ee1fb1c9f6f86691592
https://github.com/llvm/llvm-project/commit/5dc9c39ac15be0a8c0dd8ee1fb1c9f6f86691592
Author: David Green <david.green at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/load.ll
Log Message:
-----------
[GlobalISel] Check the correct register in sextload OneUse check. (#114763)
This fixes a bug that started triggering after #111730, where we could
remove a load with multiple uses. It looks like the match should be
checking the other register in a one-use check.
%SrcReg = load..
%DstReg = sign_extend_inreg %SrcReg
Commit: 93cda6d6a75e98d5516fbf12ce984604be834f01
https://github.com/llvm/llvm-project/commit/93cda6d6a75e98d5516fbf12ce984604be834f01
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
A llvm/test/CodeGen/SPIRV/no-opbitcast-between-identical-types.ll
Log Message:
-----------
[SPIR-V] No OpBitcast is generated for a bitcast between identical types (#114877)
The goal of the PR is to ensure that no OpBitcast is generated for a
bitcast between identical types.
This PR resolves https://github.com/llvm/llvm-project/issues/114482
Commit: 23f3bff7235890c8cf55e8a4a00f1a29e998bd54
https://github.com/llvm/llvm-project/commit/23f3bff7235890c8cf55e8a4a00f1a29e998bd54
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/MC/AArch64/SME/revd-diagnostics.s
M llvm/test/MC/AArch64/SME/revd.s
Log Message:
-----------
[AArch64] make REVD non-MOVPRFXable (#114430)
This patch updates REVD instruction and makes it non-MOVPRFXable as per
https://developer.arm.com/documentation/ddi0602/2024-06/SVE-Instructions/REVD--Reverse-64-bit-doublewords-in-elements--predicated--?lang=en
Commit: 1b3da362c5e32e7a2b23fe5febd9e1a09b484150
https://github.com/llvm/llvm-project/commit/1b3da362c5e32e7a2b23fe5febd9e1a09b484150
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix bitcasting packed bool vectors (#114937)
This is a special case we need to handle. We don't do bitcasting _into_
such vectors yet though.
Commit: 1e9d0685c5565074871b6af289ea0be4e4333c9b
https://github.com/llvm/llvm-project/commit/1e9d0685c5565074871b6af289ea0be4e4333c9b
Author: David Green <david.green at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll
M llvm/test/CodeGen/AArch64/neon-scalar-by-elem-fma.ll
Log Message:
-----------
[AArch64] Add extra fma+extract test cases. NFC
Commit: 8a1eba48edc8a9668123a6b925c6dbb7f45a363a
https://github.com/llvm/llvm-project/commit/8a1eba48edc8a9668123a6b925c6dbb7f45a363a
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/TidyProvider.h
Log Message:
-----------
[clangd] Fix use-after-free issues in TidyProvider.cpp (#114808)
Commit: 2de3d00edc614cdce4b30b68be564a7a3123dbf9
https://github.com/llvm/llvm-project/commit/2de3d00edc614cdce4b30b68be564a7a3123dbf9
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix a crash in `PadOp::fold` (#114921)
This PR fixes a crash when padding of `tosa.pad` is not dense elements.
Fixes #114762.
Commit: 9f0f6df03b1f6bc4feac8ca5670638b005d20d96
https://github.com/llvm/llvm-project/commit/9f0f6df03b1f6bc4feac8ca5670638b005d20d96
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Arith/Transforms/Passes.h
M mlir/include/mlir/Dialect/Arith/Transforms/Passes.td
M mlir/lib/Dialect/Arith/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Arith/Transforms/IntNarrowing.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
R mlir/test/Dialect/Arith/int-narrowing-invalid-options.mlir
R mlir/test/Dialect/Arith/int-narrowing.mlir
A mlir/test/Dialect/Arith/int-range-narrowing.mlir
R mlir/test/Dialect/Linalg/int-narrowing.mlir
Log Message:
-----------
[mlir] Add `arith-int-range-narrowing` pass (#112404)
This pass intended to narrow integer calculations to the specific
bitwidth, using `IntegerRangeAnalysis`.
We already have the `arith-int-narrowing` pass, but it mostly only doing
local analysis, while `IntegerRangeAnalysis` analyses entire program.
They ideally should be unified, but it's a task for the future.
Commit: 6620cd25234a42ca4b51490627afcb93fa443dc3
https://github.com/llvm/llvm-project/commit/6620cd25234a42ca4b51490627afcb93fa443dc3
Author: Walter Erquinigo <a20012251 at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/commands/process/launch/TestProcessLaunch.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[LLDB] Add a target.launch-working-dir setting (#113521)
Internally we use bazel in a way in which it can drop you in a LLDB
session with the target launched in a particular cwd, which is needed
for things to work. We've been making this automation work via `process
launch -w`. However, if later the user wants to restart the process with
`r`, then they end up using a different cwd for relaunching the process.
As a way to fix this, I'm adding a target-level setting that allows
configuring a default cwd used for launching the process without needing
the user to specify it manually.
Commit: 21f8e8c918f6cc814aa571ae349b496162187694
https://github.com/llvm/llvm-project/commit/21f8e8c918f6cc814aa571ae349b496162187694
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Port 9cfe3028ca7977fb582fa3b15b875e8772fc8fc0 (part 2)
Commit: e76d9214c8d104cb04e7d164d281db312ffa6024
https://github.com/llvm/llvm-project/commit/e76d9214c8d104cb04e7d164d281db312ffa6024
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir
Log Message:
-----------
[AMDGPU] Fix 3495d04 MIR test (#114963)
Needed to specify scratchRSrcReg and spreg in order to stop after
prologepilog.
- Fixes #113129 test failure
Commit: 49dfbd13ad846080eb00d71b076549c501f8f240
https://github.com/llvm/llvm-project/commit/49dfbd13ad846080eb00d71b076549c501f8f240
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
A flang/test/Integration/debug-complex-2.f90
A flang/test/Integration/debug-external-linkage-name.f90
Log Message:
-----------
flang][debug] Run AddDebugInfo before TargetRewrite. (#114418)
This help us generate debug info that better represents the actual
Fortran source code. It was briefly discussed
[here](https://github.com/llvm/llvm-project/pull/113917#pullrequestreview-2401339038).
Fixes #108711.
Commit: a88be11eef59b1722030e1219109ea0b76eebbe5
https://github.com/llvm/llvm-project/commit/a88be11eef59b1722030e1219109ea0b76eebbe5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] Add test coverage for #114901
Commit: 05e838f428555bcc4507bd37912da60ea9110ef6
https://github.com/llvm/llvm-project/commit/05e838f428555bcc4507bd37912da60ea9110ef6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] foldExtractedCmps - disable fold on non-commutative binops
The fold needs to be adjusted to correctly track the LHS/RHS operands, which will take some refactoring, for now just disable the fold in this case.
Fixes #114901
Commit: 5d39e0c7e1b50fc9a0f77daeef5eb63bcbba5b35
https://github.com/llvm/llvm-project/commit/5d39e0c7e1b50fc9a0f77daeef5eb63bcbba5b35
Author: Walter Erquinigo <a20012251 at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/commands/process/launch/TestProcessLaunch.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Revert "[LLDB] Add a target.launch-working-dir setting" (#114973)
Reverts llvm/llvm-project#113521 due to build bot failures mentioned in
the original PR.
Commit: cfa5ecde415d509b835b2dc5551187f2b7eff773
https://github.com/llvm/llvm-project/commit/cfa5ecde415d509b835b2dc5551187f2b7eff773
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/Analysis/ValueTracking/known-non-equal.ll
Log Message:
-----------
ValueTracking/test: cover recur limit in non-equal PHIs (#113205)
Add a test covering the recursion limit of isNonEqualPHIs.
Commit: d3e796c2d018a8e992fd06920c8f6235c14e5f0a
https://github.com/llvm/llvm-project/commit/d3e796c2d018a8e992fd06920c8f6235c14e5f0a
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Update not-yet-implemented errors, NFC (#114966)
This patch improves not-yet-implemented error diagnostics to more
closely follow the format used by Flang lowering for the same kind of
errors. This helps keep some level of uniformity from a user
perspective.
Commit: 445db93844cb50eeb6f587bef0749c2950b46e70
https://github.com/llvm/llvm-project/commit/445db93844cb50eeb6f587bef0749c2950b46e70
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for codegen with alias analysis
Commit: f3025c8b4fd797d99a8a8117254f93605ec46aa8
https://github.com/llvm/llvm-project/commit/f3025c8b4fd797d99a8a8117254f93605ec46aa8
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
Log Message:
-----------
[flang][OpenMP] Add alias analysis for omp private (#113566)
Enable alias analysis for omp private clause for code:
```
program main
integer :: arrayA(10,10)
integer :: tmp(2)
integer :: i,j
!$omp target teams distribute parallel do private(tmp)
do j = 1, 10
do i = 1,10
tmp = [i,j]
arrayA = tmp(1)
end do
end do
end program main
```
Commit: 07b6013e6f69bfdf46b9f2fa1bb4c76f9ef2376c
https://github.com/llvm/llvm-project/commit/07b6013e6f69bfdf46b9f2fa1bb4c76f9ef2376c
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Function.h
M llvm/lib/Analysis/CFGPrinter.cpp
Log Message:
-----------
[CFGPrinter] Allow CFG dumps with a given filename (#112906)
Add functions to print the CFG via the debugger using a specified
filename.
This is useful when comparing CFGs for the same function before vs after
a change, or when handling functions with names that are too long to be
file names.
Commit: 9a1a8f33850d6c7a090bbe7fcf60dcdda93482d0
https://github.com/llvm/llvm-project/commit/9a1a8f33850d6c7a090bbe7fcf60dcdda93482d0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/include/__split_buffer
M libcxx/include/__vector/vector.h
M libcxx/include/deque
Log Message:
-----------
[libc++][NFC] Simplify __split_buffer a bit (#114224)
This is possible since we're not using `__compressed_pair` anymore.
Commit: 4ff62052c832197054e3672df730579adce984bf
https://github.com/llvm/llvm-project/commit/4ff62052c832197054e3672df730579adce984bf
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/fp-rounding.ll
Log Message:
-----------
[LoongArch] Add test for scalar FP rounding (#114968)
Commit: f6948e8f9df4f0cf7d1754afe063b143a9091c0f
https://github.com/llvm/llvm-project/commit/f6948e8f9df4f0cf7d1754afe063b143a9091c0f
Author: Yongtao Huang <99629139+hyongtao-db at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
Log Message:
-----------
[LoopVectorize] Fix typo in branch-weights.ll test CEHCK->CHECK (NFC) (#113574)
Fix the typo CEHCK.
Signed-off-by: Yongtao Huang <yongtaoh2022 at gmail.com>
Commit: 03f06b97106b84569db8e0277e70e44bb3b1e9b7
https://github.com/llvm/llvm-project/commit/03f06b97106b84569db8e0277e70e44bb3b1e9b7
Author: Ding Fei <fding at feysh.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/clang-query/QueryParser.cpp
M clang-tools-extra/clang-query/QuerySession.h
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-query] add basic profiling on matching each ASTs (#114806)
We've found that basic profiling could help improving/optimizing when
developing clang-tidy checks.
This PR adds an extra command
```
set enable-profile (true|false) Set whether to enable matcher profiling.
```
which enables profiling queries on each file.
Sample output:
```
$ cat test.cql
set enable-profile true
m binaryOperator(isExpansionInMainFile())
$ cat test.c
int test(int i, int j) {
return i + j;
}
$ clang-query --track-memory -f test.cql test.c --
Match #1:
{{.*}}/test.c:2:10: note: "root" binds here
2 | return i + j;
| ^~~~~
1 match.
===-------------------------------------------------------------------------===
clang-query matcher profiling
===-------------------------------------------------------------------------===
Total Execution Time: 0.0000 seconds (0.0000 wall clock)
---User Time--- --System Time-- --User+System-- ---Wall Time--- ---Mem--- --- Name ---
0.0000 (100.0%) 0.0000 (100.0%) 0.0000 (100.0%) 0.0000 (100.0%) 224 {{.*}}/test.c
0.0000 (100.0%) 0.0000 (100.0%) 0.0000 (100.0%) 0.0000 (100.0%) 224 Total
```
Commit: f0231b6164fd89f3c6794afd178f5ee67e15be99
https://github.com/llvm/llvm-project/commit/f0231b6164fd89f3c6794afd178f5ee67e15be99
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/test/CodeGen/Mips/fp16-promote.ll
Log Message:
-----------
[MIPS] Use softPromoteHalf legalization for fp16 rather than PromoteFloat (#110199)
Fix part of #97975.
Commit: 928460afc15978df61278337f45eb8c9bcfd13b0
https://github.com/llvm/llvm-project/commit/928460afc15978df61278337f45eb8c9bcfd13b0
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/test/Transforms/ArgumentPromotion/pr33641_remove_arg_dbgvalue.ll
Log Message:
-----------
[ArgPromotion] Use poison instead of undef as placeholder in deleted metadata [NFC]
Commit: 6070aeb3b71520287e81e322b19f32f18ec2031a
https://github.com/llvm/llvm-project/commit/6070aeb3b71520287e81e322b19f32f18ec2031a
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
Log Message:
-----------
[Coro] Use poison instead of undef as placeholder [NFC]
Commit: b2d2494731976ab7aa9702f3134472db694b9332
https://github.com/llvm/llvm-project/commit/b2d2494731976ab7aa9702f3134472db694b9332
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/CartesianBenchmarks.h
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/VariantBenchmarks.h
M libcxx/test/benchmarks/algorithms.partition_point.bench.cpp
M libcxx/test/benchmarks/algorithms/count.bench.cpp
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
M libcxx/test/benchmarks/algorithms/fill.bench.cpp
M libcxx/test/benchmarks/algorithms/find.bench.cpp
M libcxx/test/benchmarks/algorithms/for_each.bench.cpp
M libcxx/test/benchmarks/algorithms/lexicographical_compare.bench.cpp
M libcxx/test/benchmarks/algorithms/lower_bound.bench.cpp
M libcxx/test/benchmarks/algorithms/make_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/make_heap_then_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/min_max_element.bench.cpp
M libcxx/test/benchmarks/algorithms/minmax.bench.cpp
M libcxx/test/benchmarks/algorithms/mismatch.bench.cpp
M libcxx/test/benchmarks/algorithms/pop_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/pstl.stable_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/push_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_contains.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_ends_with.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_make_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_make_heap_then_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_pop_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_push_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_stable_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/set_intersection.bench.cpp
M libcxx/test/benchmarks/algorithms/sort.bench.cpp
M libcxx/test/benchmarks/algorithms/sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/stable_sort.bench.cpp
M libcxx/test/benchmarks/allocation.bench.cpp
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/deque.bench.cpp
M libcxx/test/benchmarks/deque_iterator.bench.cpp
M libcxx/test/benchmarks/exception_ptr.bench.cpp
M libcxx/test/benchmarks/filesystem.bench.cpp
M libcxx/test/benchmarks/format.bench.cpp
M libcxx/test/benchmarks/format/write_double_comparison.bench.cpp
M libcxx/test/benchmarks/format/write_int_comparison.bench.cpp
M libcxx/test/benchmarks/format/write_string_comparison.bench.cpp
M libcxx/test/benchmarks/format_to.bench.cpp
M libcxx/test/benchmarks/format_to_n.bench.cpp
M libcxx/test/benchmarks/formatted_size.bench.cpp
M libcxx/test/benchmarks/formatter_float.bench.cpp
M libcxx/test/benchmarks/formatter_int.bench.cpp
M libcxx/test/benchmarks/function.bench.cpp
M libcxx/test/benchmarks/hash.bench.cpp
M libcxx/test/benchmarks/join_view.bench.cpp
M libcxx/test/benchmarks/lexicographical_compare_three_way.bench.cpp
M libcxx/test/benchmarks/libcxxabi/dynamic_cast.bench.cpp
M libcxx/test/benchmarks/libcxxabi/dynamic_cast_old_stress.bench.cpp
M libcxx/test/benchmarks/map.bench.cpp
M libcxx/test/benchmarks/monotonic_buffer.bench.cpp
M libcxx/test/benchmarks/numeric/gcd.bench.cpp
M libcxx/test/benchmarks/ordered_set.bench.cpp
M libcxx/test/benchmarks/random.bench.cpp
M libcxx/test/benchmarks/shared_mutex_vs_mutex.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/benchmarks/string.bench.cpp
M libcxx/test/benchmarks/stringstream.bench.cpp
M libcxx/test/benchmarks/system_error.bench.cpp
M libcxx/test/benchmarks/to_chars.bench.cpp
M libcxx/test/benchmarks/unordered_set_operations.bench.cpp
M libcxx/test/benchmarks/variant_visit_1.bench.cpp
M libcxx/test/benchmarks/variant_visit_2.bench.cpp
M libcxx/test/benchmarks/variant_visit_3.bench.cpp
M libcxx/test/benchmarks/vector_operations.bench.cpp
Log Message:
-----------
[libc++] Make benchmarks forward-compatible with the test suite (#114502)
This patch fixes warnings and errors that come up when running the
benchmarks as part of the test suite. It also adds the necessary Lit
annotations to make it pass in various configurations and increases the
portability of the benchmarks.
Commit: 119aac00d5d3001cce80dbe6cba065873836e1d4
https://github.com/llvm/llvm-project/commit/119aac00d5d3001cce80dbe6cba065873836e1d4
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/EarlyCSE.cpp
Log Message:
-----------
EarlyCSE: refactor getOrCreateResult (NFC) (#113339)
Commit: 5df387227ea39cb1b0ff7e7f9930744e663ed41c
https://github.com/llvm/llvm-project/commit/5df387227ea39cb1b0ff7e7f9930744e663ed41c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] visitAND - refactor "and (sub 0, ext(bool X)), 1 --> zext(bool X)" to use SDPatternMatch.
Commit: d7979c111ef80f77d1e04b1f49538f8946fe8f5f
https://github.com/llvm/llvm-project/commit/d7979c111ef80f77d1e04b1f49538f8946fe8f5f
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[Clang][TableGen] Add explicit symbol visibility macros to code generated (#109362)
Update ClangAttrEmitter TableGen to add explicit symbol visibility
macros to attribute class declarations it creates.
Both AnnotateFunctions and Attribute example plugins require
clang::AnnotateAttr TableGen created functions to be exported from the
Clang shared library.
This depends on macros to be added in
https://github.com/llvm/llvm-project/pull/108276
Commit: aef0e77c76e3fb810852f3d0c79cc4daae52f67e
https://github.com/llvm/llvm-project/commit/aef0e77c76e3fb810852f3d0c79cc4daae52f67e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/Mips/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/PowerPC/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/Thumb2/srem-seteq-illegal-types.ll
Log Message:
-----------
[DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (#114992)
If we're masking the LSB of a SRL node result and that is shifting down an extended sign bit, see if we can change the SRL to shift down the MSB directly.
These patterns can occur during legalisation when we've sign extended to a wider type but the SRL is still shifting from the subreg.
Alternative to #114967
Fixes the remaining regression in #112588
Commit: 6b64f365364a6bf9a0ae039f6115871bc3b8ce07
https://github.com/llvm/llvm-project/commit/6b64f365364a6bf9a0ae039f6115871bc3b8ce07
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
Log Message:
-----------
[NFC] Use `std::move` to avoid copy (#113080)
Commit: 4a04dd4bca75bf15548d777a8cfcf032f55d4289
https://github.com/llvm/llvm-project/commit/4a04dd4bca75bf15548d777a8cfcf032f55d4289
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
Log Message:
-----------
[RISCV] add varargs functions test (#114970)
This patch adds a test of varargs functions, that use frame pointer and
do the second sp adjustment.
Commit: ba60f6dc03126d8b26bba5be6338fd8b3580bd25
https://github.com/llvm/llvm-project/commit/ba60f6dc03126d8b26bba5be6338fd8b3580bd25
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGObjCMac.cpp
M llvm/tools/bugpoint/CrashDebugger.cpp
Log Message:
-----------
Remove leftover uses of llvm::Type::getPointerTo() (#114993)
`llvm::Type::getPointerTo()` is to be deprecated.
Replace remaining uses of it.
Commit: a5e189877ac3a50fb3ee385b8a434b691677537a
https://github.com/llvm/llvm-project/commit/a5e189877ac3a50fb3ee385b8a434b691677537a
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] NFC: Simplify 64 file offset naming in unit tests (#114908)
Commit: 15c7e9f9038e0c03c0dde1a8b85dd0f37072e832
https://github.com/llvm/llvm-project/commit/15c7e9f9038e0c03c0dde1a8b85dd0f37072e832
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan][NFC] Remove some unneeded headers, make guards more obvious (#114911)
Commit: 877cb9a2edc9057d70321e436e5ea8ccc1a87140
https://github.com/llvm/llvm-project/commit/877cb9a2edc9057d70321e436e5ea8ccc1a87140
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Support/KnownBits.cpp
M llvm/test/Analysis/ValueTracking/knownbits-sat-addsub.ll
M llvm/unittests/Support/KnownBitsTest.cpp
Log Message:
-----------
[KnownBits] Make `{s,u}{add,sub}_sat` optimal (#113096)
Changes are:
1) Make signed-overflow detection optimal
2) For signed-overflow, try to rule out direction even if we can't
totally rule out overflow.
3) Intersect add/sub assuming no overflow with possible overflow
clamping values as opposed to add/sub without the assumption.
Commit: b8f9063ae9ca82a93fc9ea1365362926c92cc0ca
https://github.com/llvm/llvm-project/commit/b8f9063ae9ca82a93fc9ea1365362926c92cc0ca
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++] Simplify string::reserve (#114869)
We're checking quite a few things that are either trivially true or
trivially false. These cases became trivial when we changed `reserve()`
to never shrink.
Commit: 0c18def2c18c4b99a5f448496461b60f576992fa
https://github.com/llvm/llvm-project/commit/0c18def2c18c4b99a5f448496461b60f576992fa
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/RISCV/interleave-greater-than-slice.ll
Log Message:
-----------
[SLP]Allow interleaving check only if it is less than number of elements
Need to check if the interleaving factor is less than total number of
elements in loads slice to handle it correctly and avoid compiler crash.
Fixes report https://github.com/llvm/llvm-project/pull/112361#issuecomment-2457227670
Commit: 0a68171b3c67503f7143856580f1b22a93ef566e
https://github.com/llvm/llvm-project/commit/0a68171b3c67503f7143856580f1b22a93ef566e
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/test/python/ir/array_attributes.py
Log Message:
-----------
Revert "[MLIR,Python] Support converting boolean numpy arrays to and from mlir attributes (#113064)"
This reverts commit fb7bf7a5acc65be44fc546f282942b91472553b3. There is
an ASan issue here, see the discussion on
https://github.com/llvm/llvm-project/pull/113064.
Commit: c50bb99d87f845262d7fcf3a2ee50c087ac05181
https://github.com/llvm/llvm-project/commit/c50bb99d87f845262d7fcf3a2ee50c087ac05181
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
Log Message:
-----------
[RISCV] Allow vslidedown.vx in isExtractSubvectorCheap for half VT case (#114886)
We have a special case where we allow the extract of the high half of a
vector and consider it cheap. However, we had previously required that
the type have no more than 32 elements for this to work. (Because
64/2=32, and the largest immediate for a vslidedown.vi is 31.)
This has the effect of pessimizing shuffle vector lowering for long
vectors - i.e. at SEW=e8, zvl128b, an m2 or m4 deinterleave can't be
matched because it gets scalarized during DAG construction and can't be
"profitably" rebuilt by DAG combine. Note that for RISCV, scalarization
via insert and extract is extremely expensive (i.e. two vslides per
element), so a slide + two half width shuffles is almost always a net
win. (i.e, this isn't really specific to vnsrl)
Separately, I want to look at the decision to scalarize at all, but it
seems worthwhile adjusting this while we're at it regardless.
Commit: 2c13dec3284d019fdedf7913083ce82aa5cb97aa
https://github.com/llvm/llvm-project/commit/2c13dec3284d019fdedf7913083ce82aa5cb97aa
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/optimizations/add-check-overflow.ll
Log Message:
-----------
[clang][llvm][SPIR-V] Explicitly encode native integer widths for SPIR-V (#110695)
SPIR-V doesn't currently encode "native" integer bit-widths in its
datalayout(s). This is problematic as it leads to optimisation passes,
such as InstCombine, getting ideas and e.g. shrinking to non
byte-multiple integer types, which is not desirable and can lead to
breakage further down in the toolchain. This patch addresses that by
encoding `i8`, `i16`, `i32` and `i64` as native types for vanilla SPIR-V
(the spec natively supports them), and `i32` and `i64` for AMDGCNSPIRV
(where the hardware targets are known). We also set the stack alignment
on the latter, as it is overaligned (32-bit vs 8-bit).
Commit: c2b61fcb3cd4ffa286b24437b7b6d66f0dee6c25
https://github.com/llvm/llvm-project/commit/c2b61fcb3cd4ffa286b24437b7b6d66f0dee6c25
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/IR/Intrinsics.cpp
Log Message:
-----------
[NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (#114822)
Add `using namespace Intrinsic` to Intrinsics.cpp file.
Commit: 44f49b551df8152a3e1e84705e116f8a20f62295
https://github.com/llvm/llvm-project/commit/44f49b551df8152a3e1e84705e116f8a20f62295
Author: muiez <73544786+muiez at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPMacroExpansion.cpp
Log Message:
-----------
[NFC] Move RegisterBuiltinMacro function into the Preprocessor class (#100142)
The `RegisterBuiltinMacro` function has been moved to the Preprocessor
class for accessibility and has been refactored for readability.
Commit: 75d673718a5d67a7b9a4d622466cd07927549ba8
https://github.com/llvm/llvm-project/commit/75d673718a5d67a7b9a4d622466cd07927549ba8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
Log Message:
-----------
AMDGPU: Fix clobbering temp reg for large frame indexes in VOP3 users (#114924)
For a VOP3 instruction that does not permit a literal operand with an
SGPR operand, this would re-use the same scratch register for both
operands,
clobbering the original value.
Commit: 1a684591da84dea644de6524a1d8646b245f636b
https://github.com/llvm/llvm-project/commit/1a684591da84dea644de6524a1d8646b245f636b
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/lang/cpp/dereferencing_references/TestCPPDereferencingReferences.py
M lldb/test/API/lang/cpp/dereferencing_references/main.cpp
Log Message:
-----------
Revert "Fix pointer to reference type (#113596)" (#114831)
This reverts commit 25909b811a7ddc983d042b15cb54ec271a673d63 due to
unresolved questions about the behavior of "frame var" and ValueObject
in the presence of references (see the original patch for discussion).
Commit: dd2c0b1bb9d685162eb955ed8269ba7f6982fe2d
https://github.com/llvm/llvm-project/commit/dd2c0b1bb9d685162eb955ed8269ba7f6982fe2d
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
Log Message:
-----------
[mlir][acc] Simplify data entry/exit operation builders (#114880)
Add new builders to DataBoundsOp, data entry ops, and data exit ops to
simplify their construction since many of their inputs are optional.
Additionally, small refactoring was needed for data exit ops to reduce
duplication. Unit tests were added to exercise the new builders.
Commit: d0bbe4fb546bf4d4283d453725867204e443fa8c
https://github.com/llvm/llvm-project/commit/d0bbe4fb546bf4d4283d453725867204e443fa8c
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Improve interleave load coverage (NF7, NF8, and one hot)
NF7 and NF8 were just missing from the coverage. The one active lane
cases should be a strided load instead.
Commit: 92574b5fafa2d0e8efe4082b76a2f179b121df29
https://github.com/llvm/llvm-project/commit/92574b5fafa2d0e8efe4082b76a2f179b121df29
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/unittests/ADT/FunctionRefTest.cpp
Log Message:
-----------
Fix a dangling reference in FunctionRefTest.cpp (#114949)
Commit: a63f915771ea89651a53584e483b3c5d9e73bd27
https://github.com/llvm/llvm-project/commit/a63f915771ea89651a53584e483b3c5d9e73bd27
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Lower/DirectivesCommon.h
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
M flang/test/Lower/OpenMP/atomic-capture.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenACC/invalid.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm-invalid.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[flang][openacc][openmp] Support implicit casting on the atomic interface (#114390)
ACCMP atomics do not support type conversion. Specifically, I have
encountered semantically incorrect code for atomic reads.
Example:
```
program main
implicit none
real(8) :: n
integer :: x
x = 1.0
!$acc atomic capture
n = x
x = n
!$acc end atomic
end program main
```
We have this error when compiling it with flang-new: `error:
loc("rep.f90":6:9): expected three operations in atomic.capture region
(one terminator, and two atomic ops)`
Yet, in the following generated FIR code, we observe three issues.
1. `fir.convert` intrudes into the capture region.
2. An incorrect temporary (`%2`) is being updated instead of `n`.
3. If we allow `n` in place of `%2`, the operand types of `atomic.read`
do not match. Introducing a `!fir.ref<i32> -> !fir.ref<f64>` conversion
on `x` is inaccurate because we need to convert the value of `x`.
```
%2 = "fir.alloca"() <{in_type = i32, operandSegmentSizes = array<i32: 0, 0>}> : () -> !fir.ref<i32>
%3 = "fir.alloca"() <{bindc_name = "n", in_type = f64, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFEn"}> : () -> !fir.ref<f64>
%4:2 = "hlfir.declare"(%3) <{operandSegmentSizes = array<i32: 1, 0, 0, 0>, uniq_name = "_QFEn"}> : (!fir.ref<f64>) -> (!fir.ref<f64>, !fir.ref<f64>)
%5 = "fir.alloca"() <{bindc_name = "x", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFEx"}> : () -> !fir.ref<i32>
%6:2 = "hlfir.declare"(%5) <{operandSegmentSizes = array<i32: 1, 0, 0, 0>, uniq_name = "_QFEx"}> : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
%7 = "arith.constant"() <{value = 1 : i32}> : () -> i32
"hlfir.assign"(%7, %6#0) : (i32, !fir.ref<i32>) -> ()
%8 = "fir.load"(%4#0) : (!fir.ref<f64>) -> f64
%9 = "fir.convert"(%8) : (f64) -> i32
"fir.store"(%9, %2) : (i32, !fir.ref<i32>) -> ()
%10 = "fir.load"(%6#0) : (!fir.ref<i32>) -> i32
%11 = "fir.convert"(%10) : (i32) -> f64
"acc.atomic.capture"() ({
"acc.atomic.read"(%2, %6#1) <{element_type = f64}> : (!fir.ref<i32>, !fir.ref<i32>) -> ()
%12 = "fir.convert"(%11) : (f64) -> i32
"acc.atomic.write"(%2, %12) : (!fir.ref<i32>, i32) -> ()
"acc.terminator"() : () -> ()
}) : () -> ()
```
This PR updates `flang/lib/Lower/DirectivesCommon.h` to solve the issues
by taking the following approaches (from top to bottom):
1. Move `fir.convert` for `atomic.write` out of the capture region.
2. Remove the `!fir.ref<i32> -> !fir.ref<f64>` conversion found in
`genOmpAccAtomicRead`.
3. Eliminate unnecessary `genExprAddr` calls on the RHS, which create an
invalid temporary for `x = 1.0`.
4. When generating a capture operation, refer to the original LHS
instead of the type-casted RHS.
Here, we have to allow for the cases where the operand types of
`atomic.read` differ from one another. Thus, this PR also removes the
`AllTypesMatch` trait from both `acc.atomic.read` and `omp.atomic.read`.
The example code is converted as follows:
```
%0 = fir.alloca f64 {bindc_name = "n", uniq_name = "_QFEn"}
%1:2 = hlfir.declare %0 {uniq_name = "_QFEn"} : (!fir.ref<f64>) -> (!fir.ref<f64>, !fir.ref<f64>)
%2 = fir.alloca i32 {bindc_name = "x", uniq_name = "_QFEx"}
%3:2 = hlfir.declare %2 {uniq_name = "_QFEx"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
%c1_i32 = arith.constant 1 : i32
hlfir.assign %c1_i32 to %3#0 : i32, !fir.ref<i32>
%4 = fir.load %1#0 : !fir.ref<f64>
%5 = fir.convert %4 : (f64) -> i32
acc.atomic.capture {
acc.atomic.read %1#1 = %3#1 : !fir.ref<f64>, !fir.ref<i32>, i32
acc.atomic.write %3#1 = %5 : !fir.ref<i32>, i32
}
```
Fixes #112911.
Commit: 34b0bb51213d0c4e3afa128d6107884cd7138cf2
https://github.com/llvm/llvm-project/commit/34b0bb51213d0c4e3afa128d6107884cd7138cf2
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Chris as the HLSL maintainer (#114863)
Chris has extensive knowledge of HLSL and a long track-record of quality
reviews in Clang.
Commit: c48fc467575e6dfa6578c66ebafa7c29de3fdaf4
https://github.com/llvm/llvm-project/commit/c48fc467575e6dfa6578c66ebafa7c29de3fdaf4
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Mariya as maintainer for constant expressions & Sema (#114974)
Mariya has extensive knowledge of the constant expression evaluator and
has done a lot of reviewing in Sema over the past year or so.
Commit: 8b7af60c0a919ce231d4ac88a39941bb04f8d44c
https://github.com/llvm/llvm-project/commit/8b7af60c0a919ce231d4ac88a39941bb04f8d44c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/unittests/IR/AffineMapTest.cpp
Log Message:
-----------
[mlir][affine] Add unit tests for `isProjectedPermutation` (#114775)
The only way to test `isProjectedPermutation` is through unit tests. The
concept of "projected permutations" is tricky to document and these
tests are a good source documentation of the expected/intended
behavoiur. Hence these additional unit tests.
Commit: 1a590870b6b3452934ecc245e01957fdab48909c
https://github.com/llvm/llvm-project/commit/1a590870b6b3452934ecc245e01957fdab48909c
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/AST/ASTContext.h
A clang/include/clang/AST/SYCLKernelInfo.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Sema/SemaSYCL.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/SemaSYCL/sycl-kernel-entry-point-attr-grammar.cpp
A clang/test/SemaSYCL/sycl-kernel-entry-point-attr-ignored.cpp
Log Message:
-----------
[SYCL] The sycl_kernel_entry_point attribute. (#111389)
The `sycl_kernel_entry_point` attribute is used to declare a function that
defines a pattern for an offload kernel to be emitted. The attribute requires
a single type argument that specifies the type used as a SYCL kernel name as
described in section 5.2, "Naming of kernels", of the SYCL 2020 specification.
Properties of the offload kernel are collected when a function declared with
the `sycl_kernel_entry_point` attribute is parsed or instantiated. These
properties, such as the kernel name type, are stored in the AST context where
they are (or will be) used for diagnostic purposes and to facilitate reflection
to a SYCL run-time library. These properties are not serialized with the AST
but are recreated upon deserialization.
The `sycl_kernel_entry_point` attribute is intended to replace the existing
`sycl_kernel` attribute which is intended to be deprecated in a future change
and removed following an appropriate deprecation period. The new attribute
differs in that it is enabled for both SYCL host and device compilation, may
be used with non-template functions, explicitly indicates the type used as
the kernel name type, and will impact AST generation.
This change adds the basic infrastructure for the new attribute. Future
changes will add diagnostics and new AST support that will be used to drive
generation of the corresponding offload kernel.
Commit: 41312b011a4a4b6f661779eeedebed0b8bac233f
https://github.com/llvm/llvm-project/commit/41312b011a4a4b6f661779eeedebed0b8bac233f
Author: Pranav Kant <prka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add :support to ast target (#115014)
Commit: bce08d822f8dc2993c831a05a33449ac495781ac
https://github.com/llvm/llvm-project/commit/bce08d822f8dc2993c831a05a33449ac495781ac
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.mli
Log Message:
-----------
[OCaml] Fix typo "moethd"
Commit: 8dfd9ff4b5a63e789014ba65ed765cb0f5ebaf34
https://github.com/llvm/llvm-project/commit/8dfd9ff4b5a63e789014ba65ed765cb0f5ebaf34
Author: Pranav Kant <prka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Unbreak bazel bot (#115016)
Broken first by #114620
Commit: 07443e9776f97090a776cba0288d65e90b6f1af4
https://github.com/llvm/llvm-project/commit/07443e9776f97090a776cba0288d65e90b6f1af4
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
Log Message:
-----------
[libc++][test] Improve ThrowingT to Accurately Throw after throw_after > 1 Use (#114077)
This PR fixes the `ThrowingT` class, which currently fails to raise
exceptions after a specified number of copy construction operations. The
class is intended to throw in a controlled manner based on a specified
counter value `throw_after`. However, its current implementation of the
copy constructor fails to achieve this goal.
The problem arises because the copy constructor does not initialize the
`throw_after_n_` member, leaving `throw_after_n_` to default to `nullptr`
as defined by the in-class initializer. As a result, its copy constructor
always checks against `nullptr`, causing an immediate exception rather
than throwing after the specified number `throw_after` of uses. The fix
is straightforward: simply initialize the `throw_after_n_` member in the
member initializer list.
This issue was previously uncovered because all exception tests for
`std::vector` in `exceptions.pass.cpp` used a `throw_after` value of 1,
which coincidentally aligned with the class's behavior.
Commit: 44c279c0620b0a5b984d3e78a4c559e40dcd50bc
https://github.com/llvm/llvm-project/commit/44c279c0620b0a5b984d3e78a4c559e40dcd50bc
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Nominate Saleem and myself as maintainers for API Notes (#114981)
Saleem has upstreamed a large chunk of API Notes infrastructure from the
Apple fork, and over the past year I've upstreamed the remaining part of
API Notes, added new annotations and improved C++ language support.
https://github.com/llvm/llvm-project/commits/main/clang/lib/APINotes
Commit: 7f5a13d1e85d85b9b0266c9edc97240d6b2f268f
https://github.com/llvm/llvm-project/commit/7f5a13d1e85d85b9b0266c9edc97240d6b2f268f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
Log Message:
-----------
[X86] vector-idiv-udiv-512.ll - regenerate test checks with vpternlog comments
Commit: 560517fb71e3928ab63cfa78ead7ff766e733f9d
https://github.com/llvm/llvm-project/commit/560517fb71e3928ab63cfa78ead7ff766e733f9d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
Log Message:
-----------
[X86] vector-fshl-*- regenerate test checks with vpternlog comments
Commit: 1715549373ab774bd73de0c982f7f01f30f94720
https://github.com/llvm/llvm-project/commit/1715549373ab774bd73de0c982f7f01f30f94720
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
Log Message:
-----------
[X86] vector-fshr-*- regenerate test checks with vpternlog comments
Commit: 4a88b9043fc400e9c7a8a7ca3cfd7a67be3a6a7f
https://github.com/llvm/llvm-project/commit/4a88b9043fc400e9c7a8a7ca3cfd7a67be3a6a7f
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
Log Message:
-----------
[MLIR] Fix dangling llvm::function_ref references (#114950)
Commit: 29d4d7f6207811952c23533bb7ffe509e0d1eb07
https://github.com/llvm/llvm-project/commit/29d4d7f6207811952c23533bb7ffe509e0d1eb07
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
A flang/test/Semantics/OpenMP/depend06.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
Log Message:
-----------
[flang][OpenMP] Add frontend support for INOUTSET and MUTEXINOUTSET (#114895)
These are additional modifiers of the "task dependence type" kind, which
is already handled by the frontend.
Commit: 52624d77c9d541dc6adccdbfea6e981e8e8079b8
https://github.com/llvm/llvm-project/commit/52624d77c9d541dc6adccdbfea6e981e8e8079b8
Author: Jaime González <jaime.gonzalez at appentra.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[clang] Check '-Wp,' arg has values before accesing (#113677)
Executing `clang -Wp,` without any argument value causes Undefined
Behavior due to accessing a SmallVector without elements
Executing clang in debug mode raises an assert and Valgrind complains as
follow:
```
$ valgrind bin/clang -Wp,
==18620== Memcheck, a memory error detector
==18620== Copyright (C) 2002-2022, and GNU GPL'd, by Julian Seward et al.
==18620== Using Valgrind-3.22.0 and LibVEX; rerun with -h for copyright info
==18620== Command: bin/clang -Wp,
==18620==
==18620== Conditional jump or move depends on uninitialised value(s)
==18620== at 0x44F215B: clang::driver::Driver::TranslateInputArgs(llvm::opt::InputArgList const&) const (in /home/jaime/devel/llvm-project/build/bin/clang-20)
==18620== by 0x4515831: clang::driver::Driver::BuildCompilation(llvm::ArrayRef<char const*>) (in /home/jaime/devel/llvm-project/build/bin/clang-20)
==18620== by 0x10B3435: clang_main(int, char**, llvm::ToolContext const&) (in /home/jaime/devel/llvm-project/build/bin/clang-20)
==18620== by 0xF78F99: main (in /home/jaime/devel/llvm-project/build/bin/clang-20)
==18620==
...
```
Commit: 616aff126caaf93a0d9868d279e4c99d1e45fef0
https://github.com/llvm/llvm-project/commit/616aff126caaf93a0d9868d279e4c99d1e45fef0
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Interfaces/InferIntRangeInterface.cpp
M mlir/test/Dialect/Vector/int-range-interface.mlir
Log Message:
-----------
[mlir] IntegerRangeAnalysis: handle vector types in getDestWidth() (#114898)
PR #112292 added support for vectors to the integer range inference
interface and analysis, but didn't update the getDestWidth() method.
This caused crashes when trying to infer the ranges of `arith.extsi`
with vector inputs, as the code would try to sign-extend a N-bit value
to a 0-bit one, which would assert and crash.
This commit fixes the issue by adding a getElementTypeOrSelf().
Commit: cb9700ebe4f8e002ed5f9ebf55bb44e3ecaf007c
https://github.com/llvm/llvm-project/commit/cb9700ebe4f8e002ed5f9ebf55bb44e3ecaf007c
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/XRayArgs.cpp
M clang/test/Driver/XRay/xray-shared.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_trampoline_AArch64.S
M compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
M compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
M compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
M compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
Log Message:
-----------
Revert "[XRay][AArch64] Support -fxray-shared" (#115022)
Reverts llvm/llvm-project#114431
Commit: 847d50791c07b2f0d644de4ed99cd9d35940bd0b
https://github.com/llvm/llvm-project/commit/847d50791c07b2f0d644de4ed99cd9d35940bd0b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Affine/Utils.h
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/invalid.mlir
M mlir/test/Dialect/Affine/ops.mlir
Log Message:
-----------
[mlir][affine] Define `affine.linearize_index` (#114480)
`affine.linearize_index` is the inverse of `affine.delinearize_index`
and general useful for representing computations (like those needed to
move from N-D to 1-D memrefs) that put together indices.
This commit introduces `affine.linearize_index` and one simple
canonicalization for it.
There are plans to add `affine.linearize_index` and
`affine.delinearize_index` pair canonicalizations, but we are saving
those for a followup PR (especially since having #113846 landed would
make them nicer).
Note while `affine` may not be the natural home for this operation,
https://discourse.llvm.org/t/better-location-of-affine-delinearize-operation/80565/13
didn't come to any better consensus location.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: 248e7483fc3a21067579263a784c9b831c0e09ff
https://github.com/llvm/llvm-project/commit/248e7483fc3a21067579263a784c9b831c0e09ff
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][affine] Generalize canonicalization for one-element delinearize (#114871)
There was an existing canonicalization pattern for delinearize_index
that would remove `affine.delinearize_index %linear into (%basis)`
under some conditions. However, the delinearize_index means that this
rewrite is always permissisible.
Commit: 9a5e5a6ecc96fb8fb3642c73ff585cb6b919f653
https://github.com/llvm/llvm-project/commit/9a5e5a6ecc96fb8fb3642c73ff585cb6b919f653
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[NFC][NVPTX] Remove use of MachineInstr prior to ISel (#114913)
Delete dead code that checks for `NVPTX::IMOV16rr`.
Commit: 652db7e4ff773df1bc78c920d1bc75a93e92bae6
https://github.com/llvm/llvm-project/commit/652db7e4ff773df1bc78c920d1bc75a93e92bae6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Support data transfer from pointer to a descriptor (#114892)
When source is a pointer to an array or a scalar, embox it and use the
`CUFDataTransferDescDesc` or `CUFDataTransferGlobalDescDesc` entry
points. The runtime is already able to deal with all the corner cases
like non contiguous arrays and so on so we exploit this.
Memset might still be used for simple case where we want to initialize
to 0 for example. This will come in a follow up patch.
Commit: 117e952a53ea97680293b7d8d6950090284ef198
https://github.com/llvm/llvm-project/commit/117e952a53ea97680293b7d8d6950090284ef198
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/LiveRangeEdit.cpp
A llvm/test/CodeGen/SystemZ/liverangeedit-kill-memop.mir
Log Message:
-----------
[LiveRangeEdit] Remove any MemoryOperand on MI when converting it to KILL. (#114407)
When LiveRangeEdit::eliminateDeadDef() converts an MI to a KILL instruction,
it should also call dropMemRefs() in order to erase any MachineMemOperand
present.
This was discovered in testing as the MachineVerifier does not accept an MMO
without the corresponding MI mayLoad/mayStore flag, which the KILL opcode
lacks.
Commit: 6d6287af842ded11771b23dd57c425a533c28d4b
https://github.com/llvm/llvm-project/commit/6d6287af842ded11771b23dd57c425a533c28d4b
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/trunc-shl-zext.ll
Log Message:
-----------
[NFC] Fix test for zext(shl(trunc)) fold (#113778)
This fold already exist but there is a call to [shouldChangeType
](https://github.com/llvm/llvm-project/blob/91fdfec263ff2b8e88433c4294a550cabb0f2314/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1202)
that blocks it if the target layout is missing a definition of the types
in the casts.
closes https://github.com/llvm/llvm-project/issues/61650
Commit: 07ee870c9ae44b7dd90548e1706118d1d9f816b2
https://github.com/llvm/llvm-project/commit/07ee870c9ae44b7dd90548e1706118d1d9f816b2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[AST] Fix a warning
This patch fixes:
clang/lib/AST/ASTContext.cpp:14432:8: error: unused variable 'IT'
[-Werror,-Wunused-variable]
Commit: 27d3e447d6a04b03f44b1cdedbc1e9a64fc21ce3
https://github.com/llvm/llvm-project/commit/27d3e447d6a04b03f44b1cdedbc1e9a64fc21ce3
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libc/newhdrgen/yaml_to_classes.py
Log Message:
-----------
[libc][newhdrgen] Fix NameError in yaml_to_classes.py (#114952)
Fixes "NameError: name 'yaml_file' is not defined" that would be raised
whenever running yaml_to_classes.py with the --add_function option since
commit 2e6d451d1565814415e2692ef8e5c3942d4c11a2.
Commit: 9540a7ae82dfabe551bfef94fc9f29ebebf841da
https://github.com/llvm/llvm-project/commit/9540a7ae82dfabe551bfef94fc9f29ebebf841da
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/srem-lkk.ll
M llvm/test/CodeGen/AArch64/srem-vector-lkk.ll
M llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/combine-udiv.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
M llvm/test/CodeGen/X86/pr62286.ll
M llvm/test/CodeGen/X86/pr67333.ll
M llvm/test/CodeGen/X86/sad.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
Log Message:
-----------
[DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (#112588)
The dpbusd_const.ll test change is due to us losing the expanded add reduction pattern as one of the elements is known to be zero (removing one of the adds from the reduction pyramid). I don't think its of concern.
Noticed while working on #107423
Commit: ce112a7f44ca0776d1192f6183a33e0c9f69df53
https://github.com/llvm/llvm-project/commit/ce112a7f44ca0776d1192f6183a33e0c9f69df53
Author: lialan <alan.li at me.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
Log Message:
-----------
[MLIR] support dynamic indexing in `VectorEmulateNarrowTypes` (#114169)
* Supports `vector.load` and `vector.transfer_read` ops.
* In the case of dynamic indexing, use per-element insertion/extraction
to build desired narrow type vectors.
* Fixed wrong function comment of `getCompressedMaskOp`.
---------
Co-authored-by: Han-Chung Wang <hanhan0912 at gmail.com>
Commit: 1e50958399e0bb2a558a5d5806a61da9b2ef9e74
https://github.com/llvm/llvm-project/commit/1e50958399e0bb2a558a5d5806a61da9b2ef9e74
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[tsan] Don't use `enum __tsan_memory_order` in tsan interface (#114724)
In C++ it's UB to use undeclared values as enum.
And there is support `__ATOMIC_HLE_ACQUIRE` and
`__ATOMIC_HLE_RELEASE` need such values.
Internal implementation was switched to `class enum`,
where that behavior is defined. But interface is C, so
we just switch to `int`.
Commit: a6fdfefbd04d2b85ba6c23def5790b735c075314
https://github.com/llvm/llvm-project/commit/a6fdfefbd04d2b85ba6c23def5790b735c075314
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerExtFunctionsWindows.cpp
Log Message:
-----------
[compiler-rt] Include stdlib.h for exit() (#115025)
It was originally included transitively, but no longer is after recent
<vector> cleanups in libc++.
Similar to #113951.
Commit: 3297858c19f3914513041d2c8407bc26c889793a
https://github.com/llvm/llvm-project/commit/3297858c19f3914513041d2c8407bc26c889793a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/tools/llvm-readobj/ObjDumper.cpp
Log Message:
-----------
[llvm-readobj] Use heterogenous lookups with std::map (NFC) (#114929)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: 8b8778bae5aab471e426632c755fff1fff0ec979
https://github.com/llvm/llvm-project/commit/8b8778bae5aab471e426632c755fff1fff0ec979
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
[WebAssembly] Use heterogenous lookups with std::set (NFC) (#114930)
Commit: 665dd23a2a9e6a7694b80ad3f333327dc4fe00f5
https://github.com/llvm/llvm-project/commit/665dd23a2a9e6a7694b80ad3f333327dc4fe00f5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
Log Message:
-----------
[Utils] Simplify code with DenseMap::operator[] (NFC) (#114932)
Commit: e28d44086f9d23b2aa6e4ae563bd4932b382477b
https://github.com/llvm/llvm-project/commit/e28d44086f9d23b2aa6e4ae563bd4932b382477b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/tools/clang-refactor/TestSupport.cpp
Log Message:
-----------
[clang-refactor] Simplify code with std::map::operator[] (NFC) (#114933)
Commit: 380fd09d982eb199e3c79834fc0f6dc92eb90239
https://github.com/llvm/llvm-project/commit/380fd09d982eb199e3c79834fc0f6dc92eb90239
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
A llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
Log Message:
-----------
[WebAssembly] Fix unwind mismatches in new EH (#114361)
This fixes unwind mismatches for the new EH spec.
The main flow is similar to that of the legacy EH's unwind mismatch
fixing. The new EH shared `fixCallUnwindMismatches` and
`fixCatchUnwindMismatches` functions, which gather the range of
instructions we need to fix their unwind destination for, with the
legacy EH. But unlike the legacy EH that uses `try`-`delegate`s to fix
them, the new EH wrap those instructions with nested
`try_table`-`end_try_table`s that jump to a "trampoline" BB, where we
rethrow (using a `throw_ref`) the exception to the correct `try_table`.
For a simple example of a call unwind mismatch, suppose if `call foo`
should unwind to the outer `try_table` but is wrapped in another
`try_table` (not shown here):
```wast
try_table
...
call foo ;; Unwind mismatch. Should unwind to the outer try_table
...
end_try_table
```
Then we wrap the call with a new nested `try_table`-`end_try_table`, add
a `block` / `end_block` right inside the target `try_table`, and make
the nested `try_table` jump to it using a `catch_all_ref` clause, and
rethrow the exception using a `throw_ref`:
```wast
try_table
block $l0 exnref
...
try_table (catch_all_ref $l0)
call foo
end_try_table
...
end_block ;; Trampoline BB
throw_ref
end_try_table
```
---
This fixes two existing bugs. These are not easy to test independently
without the unwind mismatch fixing. The first one is how we calculate
`ScopeTops`. Turns out, we should do it in the same way as in the legacy
EH even though there is no `end_try` at the end of `catch` block
anymore. `nested_try` in `cfg-stackify-eh.ll` tests this case.
The second bug is in `rewriteDepthImmediates`. `try_table`'s immediates
should be computed without the `try_table` itself, meaning
```wast
block
try_table (catch ... 0)
end_try_table
end_block
```
Here 0 should target not `end_try_table` but `end_block`. This bug
didn't crash the program because `placeTryTableMarker` generated only
the simple form of `try_table` that has a single catch clause and an
`end_block` follows right after the `end_try_table` in the same BB, so
jumping to an `end_try_table` is the same as jumping to the `end_block`.
But now we generate `catch` clauses with depths greater than 0 with when
fixing unwind mismatches, which uncovered this bug.
---
One case that needs a special treatment was when `end_loop` precedes an
`end_try_table` within a BB and this BB is a (true) unwind destination
when fixing unwind mismatches. In this case we need to split this
`end_loop` into a predecessor BB. This case is tested in
`unwind_mismatches_with_loop` in `cfg-stackify-eh.ll`.
---
`cfg-stackify-eh.ll` contains mostly the same set of tests with the
existing `cfg-stackify-eh-legacy.ll` with the updated FileCheck
expectations. As in `cfg-stackify-eh-legacy.ll`, the FileCheck lines
mostly only contain control flow instructions and calls for readability.
- `nested_try` and `unwind_mismatches_with_loop` are added to test newly
found bugs in the new EH.
- Some tests in `cfg-stackify-eh-legacy.ll` about the legacy-EH-specific
asepcts have not been added to `cfg-stackify-eh.ll`.
(`remove_unnecessary_instrs`, `remove_unnecessary_br`,
`fix_function_end_return_type_with_try_catch`, and
`branch_remapping_after_fixing_unwind_mismatches_0/1`)
Commit: b14c436311e3ff78f61dd59c90486432d13bf38e
https://github.com/llvm/llvm-project/commit/b14c436311e3ff78f61dd59c90486432d13bf38e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (#115032)
Reverts llvm/llvm-project#114724
Breaks OSX builds
Commit: 6a263cef2d6a38f92265e819310bc60bb2ba49ee
https://github.com/llvm/llvm-project/commit/6a263cef2d6a38f92265e819310bc60bb2ba49ee
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp:202:2:
error: extra ';' outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
Commit: c8221359f0507a12d6b1159ab85ba768960cbd3f
https://github.com/llvm/llvm-project/commit/c8221359f0507a12d6b1159ab85ba768960cbd3f
Author: Pranav Kant <prka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Add dep on Analysis to fix build break (#115033)
Commit: dbb4858a8c0cd883ff4e4d5df20152c4b295b909
https://github.com/llvm/llvm-project/commit/dbb4858a8c0cd883ff4e4d5df20152c4b295b909
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir] Fix warnings
This patch fixes:
mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp:137:8:
error: unused variable 'vectorType' [-Werror,-Wunused-variable]
mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp:154:8:
error: unused variable 'srcType' [-Werror,-Wunused-variable]
mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp:155:8:
error: unused variable 'destType' [-Werror,-Wunused-variable]
Commit: b509eb7740b3300b79b90f8a43c374e28d13dc48
https://github.com/llvm/llvm-project/commit/b509eb7740b3300b79b90f8a43c374e28d13dc48
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
[HLSL] add IsTypedResourceElementCompatible type trait (#114864)
This PR implements a new type trait as a builtin,
__builtin_hlsl_is_typed_resource_element_compatible
This type traits verifies that the given input type is suitable as a
typed resource element type.
It checks that the given input type is homogeneous, has no more than 4
sub elements, does not exceed 16 bytes, and does not contain any arrays,
booleans, or enums.
Fixes an issue in https://github.com/llvm/llvm-project/pull/113730 that
needed to cause that PR to be reverted.
Fixes https://github.com/llvm/llvm-project/issues/113223
Commit: 76f993b6f66822e5067fa22bc645b6f51f860710
https://github.com/llvm/llvm-project/commit/76f993b6f66822e5067fa22bc645b6f51f860710
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
R libcxx/test/support/experimental_any_helpers.h
Log Message:
-----------
[libc++][NFC] Remove unused header in test/support
Commit: 5f8b83e40cfe36c376e44ef4459becb64458cdba
https://github.com/llvm/llvm-project/commit/5f8b83e40cfe36c376e44ef4459becb64458cdba
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/depobj-construct-v50.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
Log Message:
-----------
[flang][OpenMP] Deprecation message for DESTROY with no argument (#114988)
[5.2:625:17] The syntax of the DESTROY clause on the DEPOBJ construct
with no argument was deprecated.
Commit: ff5551cdb07f07e15900be3593c56c5760f8dd38
https://github.com/llvm/llvm-project/commit/ff5551cdb07f07e15900be3593c56c5760f8dd38
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A clang/include/clang/AST/DynamicRecursiveASTVisitor.h
M clang/lib/AST/CMakeLists.txt
A clang/lib/AST/DynamicRecursiveASTVisitor.cpp
Log Message:
-----------
[Clang] [NFC] Introduce `DynamicRecursiveASTVisitor` (#110040)
See #105195 as well as the big comment in DynamicRecursiveASTVisitor.cpp
for more context.
Commit: 02e5c25f62d33202be6cca2650d3ae60c896775f
https://github.com/llvm/llvm-project/commit/02e5c25f62d33202be6cca2650d3ae60c896775f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] SimplifyDemandedBitsForTargetNode - cleanup SSE shift-by-immediate handlers. NFC.
Cleanup the SHLI/SRLI/SRAI handlers to be more consistent - prep for a future patch.
Commit: 61d5addd942a5ef8128e48d3617419e6320d8280
https://github.com/llvm/llvm-project/commit/61d5addd942a5ef8128e48d3617419e6320d8280
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/combine-srem.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/vector-bo-select.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
Log Message:
-----------
[X86] SimplifyDemandedBitsForTargetNode - call SimplifyMultipleUseDemandedBits on SSE shift-by-immediate nodes.
Attempt to peek through multiple-use SHLI/SRLI/SRAI source vectors.
Commit: 04aaa35d40d8c5ff030014866691f9a56e59c142
https://github.com/llvm/llvm-project/commit/04aaa35d40d8c5ff030014866691f9a56e59c142
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libc/test/src/__support/OSUtil/linux/vdso_test.cpp
M libc/test/src/__support/integer_literals_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_long_double_test.cpp
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/msync_test.cpp
M libc/test/src/sys/mman/linux/shm_test.cpp
M libc/test/src/unistd/access_test.cpp
Log Message:
-----------
[libc][NFC] Correct test header inclusion, license (#114604)
Some tests were including LibcTest.h directly. Instead you should
include Test.h which does proper indirection for other test frameworks
we support (zxtest, gtest). Also added some license headers to tests
that were missing them.
Commit: 3cdac0670823e2da58001bc2600d2e74c929ae5b
https://github.com/llvm/llvm-project/commit/3cdac0670823e2da58001bc2600d2e74c929ae5b
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
A clang/test/CodeGenHLSL/builtins/dot4add_i8packed.hlsl
A clang/test/SemaHLSL/BuiltIns/dot4add_i8packed-errors.hlsl
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/DirectX/dot4add_i8packed.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll
Log Message:
-----------
[HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (#113623)
- create a clang built-in in Builtins.td
- link dot4add_i8packed in hlsl_intrinsics.h
- add lowering to spirv backend through expansion of operation as OPSDot
is missing up to SPIRV 1.6 in SPIRVInstructionSelector.cpp
- add lowering to spirv backend using OpSDot in applicable SPIRV version
or if SPV_KHR_integer_dot_product is enabled
- add dot4add_i8packed intrinsic to IntrinsicsDirectX.td and mapping to
DXIL.td op Dot4AddI8Packed
- add tests for HLSL intrinsic lowering to dx/spv intrinsic in
dot4add_i8packed.hlsl
- add tests for sema checks in dot4add_i8packed-errors.hlsl
- add test of spir-v lowering in SPIRV/dot4add_i8packed.ll
- add test to dxil lowering in DirectX/dot4add_i8packed.ll
Resolves #99220
Commit: e952728f88c8b0e0208dc991dd9a04fe8c211cfb
https://github.com/llvm/llvm-project/commit/e952728f88c8b0e0208dc991dd9a04fe8c211cfb
Author: walter erquinigo <walter at modular.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/commands/process/launch/TestProcessLaunch.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[LLDB] Retry Add a target.launch-working-dir setting
This retries the PR 113521 skipping a test in a remote environment.
Commit: 23a01a413d29f2d5b1f6204d0237e3884ae0231e
https://github.com/llvm/llvm-project/commit/23a01a413d29f2d5b1f6204d0237e3884ae0231e
Author: jimingham <jingham at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/test/API/functionalities/inline-stepping/TestInlineStepping.py
Log Message:
-----------
More refinement of call site handling in stepping. (#114628)
When you set a "next branch breakpoint" and run to it while stepping,
you have to claim the stop at that breakpoint to be the top of the
inlined call stack, or you will seem to "step in" and then plans might
try to step back out again.
This records the PrefferedLineEntry for next branch breakpoints and adds
a test to make sure this works.
Commit: 7780cf01e2c6912684fae10d68f76d7d5a21d675
https://github.com/llvm/llvm-project/commit/7780cf01e2c6912684fae10d68f76d7d5a21d675
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vsample.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg_features.txt
Log Message:
-----------
[AMDGPU][MC] Fix disassemble of image_gather4 with d16 (#114609)
For GFX10+, image_gather4 instructions that have v[254:255] as dst reg
and the d16 bit on can be assembled correctly but the generated binary
fails to disassemble (e.g. image_gather4 v[254:255], v[1:2], s[8:15], s[12:15]
dmask:0x8 dim:SQ_RSRC_IMG_2D d16). This patch fixes this problem.
Commit: bac7a6b390c0b9d195089d5b211949a25ffdf20c
https://github.com/llvm/llvm-project/commit/bac7a6b390c0b9d195089d5b211949a25ffdf20c
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Pass `-z rodynamic` to the linker (#115009)
Until now, suppression of `DT_DEBUG` has been hardcoded as a downstream
patch in lld. This can instead be achieved by passing `-z rodynamic`.
Have the driver do this so that the private patch can be removed.
If the scope of lld's `-z rodynamic` is broadened (within reason) to do
more in future, that's likely to be fine as `PT_DYNAMIC` isn't writable
on PlayStation.
PS5 only. On PS4, the equivalent hardcoded configuration will remain in
the proprietary linker.
SIE tracker: TOOLCHAIN-16704
Commit: ce067c5a3b96e009964dc60d6b6a0f4b33c345c7
https://github.com/llvm/llvm-project/commit/ce067c5a3b96e009964dc60d6b6a0f4b33c345c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
R llvm/test/CodeGen/AMDGPU/promote-alloca-invalid-vector-gep.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
AMDGPU: Rename test file
Commit: 592c0fe55f6d9a811028b5f3507be91458ab2713
https://github.com/llvm/llvm-project/commit/592c0fe55f6d9a811028b5f3507be91458ab2713
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Evaluate/fold-real.cpp
M flang/test/Evaluate/errors01.f90
Log Message:
-----------
[flang] Tweak a SCALE/IEEE_SCALB folding overflow warning message (#114994)
Commit: 7c3fdcc27603cd2d6b01fa7b057b3099da75bc8d
https://github.com/llvm/llvm-project/commit/7c3fdcc27603cd2d6b01fa7b057b3099da75bc8d
Author: Artem Belevich <tra at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/CodeGenCUDA/Inputs/cuda.h
A clang/test/CodeGenCUDA/grid-constant.cu
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/SemaCUDA/Inputs/cuda.h
A clang/test/SemaCUDA/grid-constant.cu
Log Message:
-----------
[CUDA] Add support for __grid_constant__ attribute (#114589)
LLVM support for the attribute has been implemented already, so it just
plumbs it through to the CUDA front-end.
One notable difference from NVCC is that the attribute can be used
regardless of the targeted GPU. On the older GPUs it will just be
ignored. The attribute is a performance hint, and does not warrant a
hard error if compiler can't benefit from it on a particular GPU
variant.
Commit: a993dfcdbf64ef7a8bd7e5ec4d97287b650d4f50
https://github.com/llvm/llvm-project/commit/a993dfcdbf64ef7a8bd7e5ec4d97287b650d4f50
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
A flang/test/Transforms/debug-assumed-rank-array.fir
Log Message:
-----------
[flang][debug] Support assumed-rank arrays. (#114404)
The assumed-rank array are represented by DIGenericSubrange in debug
metadata. We have to provide 2 things.
1. Expression to get rank value at the runtime from descriptor.
2. Assuming the dimension number for which we want the array information
has been put on the DWARF expression stack, expressions which will
extract the lowerBound, count and stride information from the descriptor
for the said dimension.
With this patch in place, this is how I see an assumed_rank variable
being evaluated by GDB.
```
function mean(x) result(y)
integer, intent(in) :: x(..)
...
end
program main
use mod
implicit none
integer :: x1,xvec(3),xmat(3,3),xtens(3,3,3)
x1 = 5
xvec = 6
xmat = 7
xtens = 8
print *,mean(xvec), mean(xmat), mean(xtens), mean(x1)
end program main
(gdb) p x
$1 = (6, 6, 6)
(gdb) p x
$2 = ((7, 7, 7) (7, 7, 7) (7, 7, 7))
(gdb) p x
$3 = (((8, 8, 8) (8, 8, 8) (8, 8, 8)) ((8, 8, 8) (8, 8, 8) (8, 8, 8)) ((8, 8, 8) (8, 8, 8) (8, 8, 8)))
(gdb) p x
$4 = 5
```
Commit: 9b9369e0bb0131ba0336d9adb4ef098b6dafc7f4
https://github.com/llvm/llvm-project/commit/9b9369e0bb0131ba0336d9adb4ef098b6dafc7f4
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][tensor] Improve `FoldTensorCastProducerOp` (dynamic shapes) (#114559)
Currently, `FoldTensorCastProducerOp` incorrectly folds the following:
```mlir
%pack = tensor.pack %src
padding_value(%pad : i32)
inner_dims_pos = [0, 1]
inner_tiles = [%c8, 1]
into %cast : tensor<7x?xi32> -> tensor<1x1x?x1xi32>
%res = tensor.cast %pack : tensor<1x1x?x1xi32> to tensor<1x1x8x1xi32>
```
as (note the static trailing dim in the result and dynamic tile
dimension that corresponds to that):
```mlir
%res = tensor.pack %src
padding_value(%pad : i32)
inner_dims_pos = [0, 1]
inner_tiles = [%c8, 1]
into %cast : tensor<7x?xi32> -> tensor<1x1x8x1xi32>
```
This triggers an Op verification failure and is due to the fact that the
folder does not update the inner tile sizes in the pack Op. This PR
addresses that.
Note, supporting other Ops with size-like attributes is left as a TODO.
Commit: d02d9ce314f823181430e9f21c89806f9227c95f
https://github.com/llvm/llvm-project/commit/d02d9ce314f823181430e9f21c89806f9227c95f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Tensor/IR/TensorOps.cpp:4781:17: error: unused
variable 'tileSize' [-Werror,-Wunused-variable]
Commit: a33d42ad5f916f5b782076ca84fe565589079c6f
https://github.com/llvm/llvm-project/commit/a33d42ad5f916f5b782076ca84fe565589079c6f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port ff5551cdb07f
Commit: c695a32576525b047f92b90de71eb707c152e29c
https://github.com/llvm/llvm-project/commit/c695a32576525b047f92b90de71eb707c152e29c
Author: David Olsen <dolsen at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/CIR/CIRGenerator.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
A clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CIR/hello.c
Log Message:
-----------
[CIR] Call code gen; create empty cir.func op (#113483)
Finish hooking up ClangIR code gen into the Clang control flow,
initializing enough that basic code gen is possible.
Add an almost empty `cir.func` op to the ClangIR dialect. Currently the
only property of the function is its name. Add the code necessary to
code gen a cir.func op.
Create essentially empty files
clang/lib/CIR/Dialect/IR/{CIRAttrs.cpp,CIRTypes.cpp}. These will be
filled in later as attributes and types are defined in the ClangIR
dialect.
(Part of upstreaming the ClangIR incubator project into LLVM.)
Commit: 803f957e87e4083f6d61c8991171eeeaf0e6bd61
https://github.com/llvm/llvm-project/commit/803f957e87e4083f6d61c8991171eeeaf0e6bd61
Author: jimingham <jingham at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/Symbol/CompileUnit.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
A lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpoinsSameCUName.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/common.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/main.cpp
Log Message:
-----------
Fix a thinko in the CallSite handling code: (#114896)
I have to check for the sc list size being changed by the call-site
search, not just that it had more than one element.
Added a test for multiple CU's with the same name in a given module,
which would have caught this mistake.
We were also doing all the work to find call sites when the found decl
and specified decl's only difference was a column, but the incoming
specification hadn't specified a column (column number == 0).
Commit: 17d956588a2cc508acf98574f913eaef6d0e1af3
https://github.com/llvm/llvm-project/commit/17d956588a2cc508acf98574f913eaef6d0e1af3
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
Reapply "[tsan] Don't use `enum __tsan_memory_order` in tsan interface"" (#115034)
In C++ it's UB to use undeclared values as enum.
And there is support __ATOMIC_HLE_ACQUIRE and
__ATOMIC_HLE_RELEASE need such values.
So use `int` in TSAN interface, and mask out
irrelevant bits and cast to enum ASAP.
`ThreadSanitizer.cpp` already declare morder parameterd
in these functions as `i32`.
This may looks like a slight change, as we
previously didn't mask out additional bits for `fmo`,
and `NoTsanAtomic` call. But from implementation
it's clear that they are expecting exact enum.
Reverts llvm/llvm-project#115032
Reapply llvm/llvm-project#114724
Commit: db69d6939a93d1e401abe6bfe114e55b69297975
https://github.com/llvm/llvm-project/commit/db69d6939a93d1e401abe6bfe114e55b69297975
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Support data transfer from descriptor to a pointer (#115023)
Data transfer from a variable with a descriptor to a pointer. We create
a descriptor for the pointer so we can use the flang runtime to perform
the transfer. The Assign function handles all corner cases. We add a new
entry points `CUFDataTransferDescDescNoRealloc` to avoid reallocation
since the variable on the LHS is not an allocatable.
Commit: e566ae8812af77d4ebfd14f4ebe6055a1f71cc02
https://github.com/llvm/llvm-project/commit/e566ae8812af77d4ebfd14f4ebe6055a1f71cc02
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove s32 support for G_ABS on RV64.
I plan to remove s32 as a legal type to match SelectionDAG
and to remove i32 from the GPR regclass on RV64.
Commit: 8b659736f7393314a797b6cf2fa346316a624ecb
https://github.com/llvm/llvm-project/commit/8b659736f7393314a797b6cf2fa346316a624ecb
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
Log Message:
-----------
[SystemZ] Make lit test more specific (#115050)
The lit test fmuladd-soft-float.ll only specifies s390x as platform,
but the test is Linux specific, causing problems when run on z/OS.
This change updates the triple to fix this.
Commit: db1882e2484013066139f0b3f77d968d84a79158
https://github.com/llvm/llvm-project/commit/db1882e2484013066139f0b3f77d968d84a79158
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_interface_internal.h
A compiler-rt/lib/xray/xray_s390x.cpp
A compiler-rt/lib/xray/xray_trampoline_s390x.S
M compiler-rt/lib/xray/xray_tsc.h
Log Message:
-----------
[SystemZ][XRay] XRay runtime support for SystemZ (#113252)
Adds the runtime support routines for XRay on SystemZ. Only function
entry/exit is implemented.
Commit: 4a37799a489d80e505e3e20722570c47673476be
https://github.com/llvm/llvm-project/commit/4a37799a489d80e505e3e20722570c47673476be
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.h
A llvm/test/CodeGen/SystemZ/xray.ll
Log Message:
-----------
[SystemZ][XRay] Implement XRay instrumentation for SystemZ (#113253)
Expands pseudo instructions PATCHABLE_FUNCTION_ENTER and PATCHABLE_RET
into a small instruction sequence which calls into the XRay library.
Commit: 0c60573d1c2d19133d84da092b240f32e0574be5
https://github.com/llvm/llvm-project/commit/0c60573d1c2d19133d84da092b240f32e0574be5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
Log Message:
-----------
clang/AMDGPU: Emit grid size builtins with range metadata (#113038)
These cannot be 0.
Commit: 0b40f979298a2e7d4c3da7c067fc9747d0f93653
https://github.com/llvm/llvm-project/commit/0b40f979298a2e7d4c3da7c067fc9747d0f93653
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
R llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups.ll
Log Message:
-----------
AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (#113751)
0 does not make sense as a value for this to be, much less the default.
Also stop emitting each individual field if it is the default, rather than
if any element was the default. Also fix the name of the test since it didn't
exactly match the real attribute name.
Commit: 0428f2cb5a91cc93897252c9dc4883efea3dbd9a
https://github.com/llvm/llvm-project/commit/0428f2cb5a91cc93897252c9dc4883efea3dbd9a
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/XRayArgs.cpp
M clang/test/Driver/XRay/xray-mode-flags.cpp
Log Message:
-----------
[SystemZ][XRay] Enable XRay for SystemZ in clang (#113254)
With the support for xray for SystemZ in place, the option can now be
enabled in clang.
Commit: e8644e3b474136da43344a5afeeae63268f980e1
https://github.com/llvm/llvm-project/commit/e8644e3b474136da43344a5afeeae63268f980e1
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/shrink-mad-fma.mir
Log Message:
-----------
[AMDGPU][True16][MC] VOP2 update instructions with fake16 format (#114436)
Some old "t16" VOP2 instructions are actually in fake16 format. Correct
and update test file
Commit: fbbd8b0741586794721639715d1d974db56f83ac
https://github.com/llvm/llvm-project/commit/fbbd8b0741586794721639715d1d974db56f83ac
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Semantics/rewrite-parse-tree.cpp
A flang/test/Semantics/rewrite03.f90
Log Message:
-----------
[flang] Fix rewriting of misparsed statement functions (#112934)
Fortran's syntax is ambiguous for some assignment statements (to array
elements or to the targets of pointers returned by functions) that
appear as the first executable statements in a subprogram or BLOCK
construct. Is A(I)=X a statement function definition at the end of the
specification part, or ar array element assignment statement, or an
assignment to a pointer returned by a function named A?
Since f18 builds a parse tree for the entire source file before
beginning any semantic analysis, we can't tell which is which until
after name resolution, at which point the symbol table has been built.
So we have to walk the parse tree and rewrite some misparsed statement
function definitions that really were assignment statements.
There's a bug in that code, though, due to the fact that the
implementation used state in the parse tree walker to hold a list of
misparsed statement function definitions extracted from one
specification part to be reinserted at the beginning of the next
execution part that is visited; it didn't work for misparsed cases BLOCK
constructs. Their parse tree nodes encapsulate a parser::Block, not an
instance of the wrapper class parser::ExecutionPart. So misparsed
statement functions in BLOCK constructs were being rewritten into
assignment statement that were inserted at the beginning of the
executable part of the following subprogram, if and wherever one
happened to occur. This led to crashes in lowering and much
astonishment.
A simple fix would have been to adjust the rewriting code to always
insert the list at the next visited parser::Block, since
parser::ExecutionPart is just a wrapper around Block anyway; but this
patch goes further to do the "right thing", which is a restructuring of
the rewrite that avoids the use of state and any assumptions about parse
tree walking visitation order.
Fixes https://github.com/llvm/llvm-project/issues/112549.
Commit: 07e053fb95e131244dafab04aae84650de383664
https://github.com/llvm/llvm-project/commit/07e053fb95e131244dafab04aae84650de383664
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/runtime/assign.cpp
Log Message:
-----------
[flang][runtime] Fix finalization case in assignment (#113611)
There were two bugs in derived type array assignment processing that
caused finalization to fail to occur for a test case. The first bug was
an off-by-one error in address overlap testing that caused a false
positive result for the test, whose left-hand side's allocatable's
descriptor was immediately adjacent in memory to the right-hand side's
array's data.
The second bug was that in such overlap cases (even when legitimate)
finalization would fail due to the LHS's descriptor having been copied
to a temporary for deferred deallocation and then nullified.
This patch corrects the overlap analysis for this test, and also
properly finalizes the LHS when overlap does exist. Some nearby dead
code was removed to avoid future confusion.
Fixes https://github.com/llvm/llvm-project/issues/113375.
Commit: 850d42fb145c636a3b56a7616c3e3c5c188c1916
https://github.com/llvm/llvm-project/commit/850d42fb145c636a3b56a7616c3e3c5c188c1916
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Parser/token-sequence.h
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/token-sequence.cpp
A flang/test/Preprocessing/defined-in-macro.F90
Log Message:
-----------
[flang] Handle "defined" in macro expansions (#114844)
The preprocessor implements "defined(X)" and "defined X" in if/elif
directive expressions in such a way that they only work at the top
level, not when they appear in macro expansions. Fix that, which is a
little tricky due to the need to detect the "defined" keyword before
applying any macro expansion to its argument, and add a bunch of tests.
Fixes https://github.com/llvm/llvm-project/issues/114064.
Commit: 97982a8c605fac7c86d02e641a6cd7898b3ca343
https://github.com/llvm/llvm-project/commit/97982a8c605fac7c86d02e641a6cd7898b3ca343
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/stacksave-stackrestore.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/O0-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/addrspacecast.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/branch-relaxation.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/fp-fcanonicalize.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/frame-info.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/hwasan-check-memaccess.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
M llvm/test/CodeGen/RISCV/inline-asm-zfh-constraint-f.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/kcfi-mir.ll
M llvm/test/CodeGen/RISCV/large-stack.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr58025.ll
M llvm/test/CodeGen/RISCV/pr58286.ll
M llvm/test/CodeGen/RISCV/pr63365.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/pr88365.ll
M llvm/test/CodeGen/RISCV/prolog-epilogue.ll
M llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64-stackmap-nops.ll
M llvm/test/CodeGen/RISCV/rv64-statepoint-call-lowering.ll
M llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir
M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr93587.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/stack-folding.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-int.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/stack-inst-compress.mir
M llvm/test/CodeGen/RISCV/stack-offset.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
M llvm/test/CodeGen/RISCV/vlenb.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xcvbi.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
M llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir
M llvm/test/CodeGen/RISCV/zcmp-prolog-epilog-crash.mir
M llvm/test/CodeGen/RISCV/zcmp-with-float.ll
M llvm/test/CodeGen/RISCV/zdinx-large-spill.mir
M llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
Log Message:
-----------
[RISCV][CFI] add function epilogue cfi information (#110810)
This patch adds CFI instructions in the function epilogue.
Before patch:
addi sp, s0, -32
ld ra, 24(sp) # 8-byte Folded Reload
ld s0, 16(sp) # 8-byte Folded Reload
ld s1, 8(sp) # 8-byte Folded Reload
addi sp, sp, 32
ret
After patch:
addi sp, s0, -32
.cfi_def_cfa sp, 32
ld ra, 24(sp) # 8-byte Folded Reload
ld s0, 16(sp) # 8-byte Folded Reload
ld s1, 8(sp) # 8-byte Folded Reload
.cfi_restore ra
.cfi_restore s0
.cfi_restore s1
addi sp, sp, 32
.cfi_def_cfa_offset 0
ret
This functionality is already present in `riscv-gcc`, but it’s not in
`clang` and this slightly impairs the `lldb` debugging experience, e.g.
backtrace.
Commit: b8ac87f34a6f4405bf8d91339a10f188db30aa3b
https://github.com/llvm/llvm-project/commit/b8ac87f34a6f4405bf8d91339a10f188db30aa3b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/lib/AsmParser/LLLexer.cpp
A llvm/test/Assembler/c-style-comment.ll
A llvm/test/Assembler/invalid-c-style-comment0.ll
A llvm/test/Assembler/invalid-c-style-comment1.ll
A llvm/test/Assembler/invalid-c-style-comment2.ll
A llvm/test/Assembler/invalid-c-style-comment3.ll
Log Message:
-----------
[LLVM][AsmParser] Add support for C style comments (#111554)
Add support for C style comments in LLVM assembly.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 97262afa6d78bcf332f26a02834b43ac31f87f94
https://github.com/llvm/llvm-project/commit/97262afa6d78bcf332f26a02834b43ac31f87f94
Author: Eric <eric at efcs.ca>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
Allow specifying libcxx builder image. (#110303)
This change attempts to shift the libc++ builders over to new backend
infrastructure that allows running an arbitrary container for the
libc++ job.
This has been a long time in the making, and support from github
and gke is finally at the point where it's possible (hopefully).
This change should also demonstrate another important property:
No Downtime Upgrades.
If this goes well, we'll be able to test the upgrade as a part
of the PR process, and then commiting it to main should (ideally)
not break anything.
Commit: fedb9fdb98314ff0ddff065dbd6ef8b2b7e6ec96
https://github.com/llvm/llvm-project/commit/fedb9fdb98314ff0ddff065dbd6ef8b2b7e6ec96
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libc/src/sys/socket/linux/recvmsg.cpp
Log Message:
-----------
[libc] Fix sendmsg iovec unpoisoning (#115057)
The unpoisoning for sendmsg had a typo where it would not unpoison all
of the elements in the iovec, causing msan errors. This patch fixes
that.
Commit: a353e258ba495be58263d6cc6e382e6dde298361
https://github.com/llvm/llvm-project/commit/a353e258ba495be58263d6cc6e382e6dde298361
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
M llvm/test/Transforms/LoopDistribute/scev-inserted-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-versioning.ll
Log Message:
-----------
[LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (#113126)
If we have a pointer AddRec, the maximum increment is
2^(pointer-index-wdith - 1) - 1. This means that if incrementing the
AddRec wraps, the distance between the previously accessed location and
the wrapped location is > 2^(pointer-index-wdith - 1), i.e. if the GEP
for the AddRec is inbounds, this would be poison due to the object being
larger than half the pointer index type space. The poison would be
immediate UB when the memory access gets executed..
Similar reasoning can be applied for decrements.
PR: https://github.com/llvm/llvm-project/pull/113126
Commit: 823625cf1d9aba4017a486cfdd3e4b9b94c5ef49
https://github.com/llvm/llvm-project/commit/823625cf1d9aba4017a486cfdd3e4b9b94c5ef49
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Simplify morder conversion (#115075)
All valid values should fit into a byte.
This slightly reduce generated code on x86_64.
Commit: dccb1fe879d6a949884523eab66a8a51cee93d1a
https://github.com/llvm/llvm-project/commit/dccb1fe879d6a949884523eab66a8a51cee93d1a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mul-cpop.s
Log Message:
-----------
[RISCV] Update latency of MUL & CPOP in SiFive P600's scheduling model (#115042)
It should be 2 cycles rather than 3 cycles.
Commit: 6d7e51de5ec46c1fcc7a7e80135f561a88a1296b
https://github.com/llvm/llvm-project/commit/6d7e51de5ec46c1fcc7a7e80135f561a88a1296b
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
Log Message:
-----------
[AMDGPU] Extend type support for update_dpp intrinsic (#114597)
We can split 64-bit DPP as a post-RA pseudo if control values are
supported, but cannot handle other types.
Commit: c1cec8c0dc5b0296f0bc86745b867ff72c0a21e3
https://github.com/llvm/llvm-project/commit/c1cec8c0dc5b0296f0bc86745b867ff72c0a21e3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed splat ordering for loads, NFC
Commit: ce0d085842c652620969001b9d0c12912cec2c24
https://github.com/llvm/llvm-project/commit/ce0d085842c652620969001b9d0c12912cec2c24
Author: vporpo <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Query the scheduler for legality (#114616)
This patch adds the legality check of whether the candidate instructions
can be scheduled together. This uses a Scheduler object.
Commit: 5e75f294f1e2900e75f1f1e2cc4e5abe46366047
https://github.com/llvm/llvm-project/commit/5e75f294f1e2900e75f1f1e2cc4e5abe46366047
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
Log Message:
-----------
[ORC] Replace RedirectionManager::SymbolAddrMap typedef with SymbolMap. NFC.
They're the same type -- no need for a separate typedef here.
Commit: 13b5899c2904ba6b1f5223bf86679d046212da98
https://github.com/llvm/llvm-project/commit/13b5899c2904ba6b1f5223bf86679d046212da98
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/X86/pr114520.ll
Log Message:
-----------
[SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (#114943)
In #70357, I changed a isLegalOrCustom to isLegalOrCustomOrPromote in
visitSelect to enable integer min/max to be formed when the operation
was promoted. Unfortunately, this also affected floating point. For
floating point, fmaxnum may require a libcall so we also need to check
if the operation on the promoted type is legal or custom.
Other changes to RISC-V have seen made the original change untested so
this patch restores the original isLegalOrCustom.
Fixes #114520.
Commit: a20b902b356e84ec4380d324f7c72772fef0c114
https://github.com/llvm/llvm-project/commit/a20b902b356e84ec4380d324f7c72772fef0c114
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Copy some Zbb and Zbkb IR tests. NFC
These are copies of SDAG tests with some of the more specialized
cases removed. We can add them later when we're ready to improve them.
Commit: 339f395ecef9b7f501a4c4d2b54f85c7f723b50c
https://github.com/llvm/llvm-project/commit/339f395ecef9b7f501a4c4d2b54f85c7f723b50c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
Log Message:
-----------
[RISCV][GISel] Enable commute_constant_to_rhs in RISCVPostLegalizerCombiner.
Commit: 3163f8348faf858dec920f303e95dcf48dc1ea72
https://github.com/llvm/llvm-project/commit/3163f8348faf858dec920f303e95dcf48dc1ea72
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Log Message:
-----------
[RISCV][GISel] Use boolean predicated legalization action methods to simplify code. NFC (#115063)
These allow us to pass a subtarget feature to conditionally enable the
legalization action.
These were added by a3010c77910c706be4c51ce4a95d51211e335a1f and are
used by AArch64.
Commit: 332fda86fb20c6c2cdc58976a8739c6a13110734
https://github.com/llvm/llvm-project/commit/332fda86fb20c6c2cdc58976a8739c6a13110734
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__flat_map/flat_map.h
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove <string> and <vector> includes from <flat_map> (#114876)
`<string>` doesn't seem to be required at all and `flat_map` doesn't
support `vector<bool>`, so we can include just `vector<T>`. This cuts
the include time in half on my system.
Commit: a905203b9ea5ff1b68ca5ab760d6101f64ff3362
https://github.com/llvm/llvm-project/commit/a905203b9ea5ff1b68ca5ab760d6101f64ff3362
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Prefer strided load for interleave load with only one lane active (#115069)
If only one of the elements is actually used, then we can legally use a
strided load in place of the segment load. Doing so reduces vector
register pressure, so if both segment and strided are believed to be
element/segment at a time, then prefer the strided load variant.
Note that I've seen the vectorizer emitting wide interleave loads to
represent a strided load, so this does happen in practice. It doesn't
matter much for small LMUL*NF, but at large NF can start causing
problems in register allocation.
Note that this patch only covers the fixed vector formation cases. In
theory, we should do the same patch for scalable, but we can currently
only represent NF2 in scalable IR, and NF2 is assumed to be optimized to
better than segment-at-a-time by default, so there's currently nothing
to do.
Commit: 4d374479bea4b33c5623ccfedc0870e396fc34cd
https://github.com/llvm/llvm-project/commit/4d374479bea4b33c5623ccfedc0870e396fc34cd
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Replace some macros with templates (#114931)
Commit: 320389d4289c9bca579d74e9416bedb7fd4a0ef2
https://github.com/llvm/llvm-project/commit/320389d4289c9bca579d74e9416bedb7fd4a0ef2
Author: vporpo <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Generate vector instructions (#115087)
This patch implements some very basic code generation, for some opcodes.
Commit: d047488d4c4657be401ae01aa985c5a749f15168
https://github.com/llvm/llvm-project/commit/d047488d4c4657be401ae01aa985c5a749f15168
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec] Fix build warnings in VecUtilsTest
Commit: 435e58468a1a99a4bbfad88d060abd37a9bc6928
https://github.com/llvm/llvm-project/commit/435e58468a1a99a4bbfad88d060abd37a9bc6928
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/allocate_allocator_modifier_ast_print.cpp
A clang/test/OpenMP/allocate_allocator_modifier_codegen.cpp
A clang/test/OpenMP/allocate_allocator_modifier_messages.cpp
Log Message:
-----------
[clang][OpenMP] Add 'allocator' modifier for 'allocate' clause. (#114883)
The 'allocator' modifier is now accepted in the 'allocate' clause. Added
LIT tests covering codegen, PCH, template handling, and serialization
for 'allocator' modifier.
Added support for allocator-modifier to release notes.
Testing
- New allocate modifier LIT tests.
- OpenMP LIT tests.
- check-all
- relevant sollve_vv test cases
tests/5.2/scope/test_scope_allocate_construct.c
Commit: 92be2cb08632ea38f6fbc41adfeb475ba27447dd
https://github.com/llvm/llvm-project/commit/92be2cb08632ea38f6fbc41adfeb475ba27447dd
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/fp-rounding.ll
Log Message:
-----------
[LoongArch] Use LSX for scalar FP rounding with explicit rounding mode (#114766)
LoongArch FP base ISA only have frint.{s/d} instruction which reads the
global rounding mode. Utilize LSX for explicit rounding mode for scalar
ceil/floor/trunc/roundeven calls when -mlsx opend. It is faster than
calling the libm library functions.
Same as what gcc did:
https://gcc.gnu.org/pipermail/gcc-cvs/2023-November/394218.html
Commit: 4c3e1e3c4af1d215501a3b42655333a1167f0ab3
https://github.com/llvm/llvm-project/commit/4c3e1e3c4af1d215501a3b42655333a1167f0ab3
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCSchedule.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCSchedule.cpp
A llvm/test/CodeGen/AArch64/latency.ll
A llvm/test/CodeGen/ARM/latency.ll
Log Message:
-----------
[llvm][AsmPrinter] Add an option to print instruction latencies (#113243)
... matching what we have in the disassembler. This isn't turned on by
default since several of the scheduling models are not completely
accurate, and we don't want to be misleading.
Commit: db21dbd12a13c96786669df9142a3061813c47fb
https://github.com/llvm/llvm-project/commit/db21dbd12a13c96786669df9142a3061813c47fb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[RISCV][GISel] Add constant_fold_cast_op to RISCVPostLegalizerCombiner.
Commit: 11b768af3ed672c18c4197bf43273b31ccc3c95e
https://github.com/llvm/llvm-project/commit/11b768af3ed672c18c4197bf43273b31ccc3c95e
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix bug in invalidation of analyses
This makes sure we don't preserve analyses when we modify the IR.
This was causing errors in the EXPENSIVE_CHECKS build.
Commit: 9bc3102bea80f422f4f3b788186f6e1c636e0fba
https://github.com/llvm/llvm-project/commit/9bc3102bea80f422f4f3b788186f6e1c636e0fba
Author: Yun-Fly <yunfei.song at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
Log Message:
-----------
[mlir][scf] Extend consumer fusion to multiple tilable users (#111955)
Before, consumer fusion expects single usage(or others are terminator
op). This patch supports multiple tilable consumers fusion.
E.g.
```
%0 = scf.for {
...
%p = tiledProducer
...
}
%1 = tilableConsumer1 ins(%0 : ...)
%2 = tilableConsumer2 ins(%0 : ...)
```
===>
```
%0:3 = scf.for {
...
%p = tiledProducer
%1 = tiledConsumer1 ins(%p : ...)
%2 = tiledConsumer2 ins(%p : ...)
...
}
```
The key process is ensuring that the first user of loop
should not dominate any define of consumer operand(s).
Commit: 7c20bdf373d6cd7f35dee5c71cf94f0eb1be3200
https://github.com/llvm/llvm-project/commit/7c20bdf373d6cd7f35dee5c71cf94f0eb1be3200
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/unittests/Host/AlarmTest.cpp
Log Message:
-----------
[lldb] Fix synchronization in AlarmTest (NFC)
ThreadSanitizer detected a data race as if synchronized via sleep.
Commit: 3a26feb607c8cecc13d6ca4ed5213c3f9c10932c
https://github.com/llvm/llvm-project/commit/3a26feb607c8cecc13d6ca4ed5213c3f9c10932c
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
M llvm/test/Analysis/CostModel/RISCV/scalable-gather.ll
M llvm/test/Analysis/CostModel/RISCV/scalable-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
Log Message:
-----------
[RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (#114945)
In preparation for allowing zvfhmin and zvfbfmin in
isLegalElementTypeForRVV, this lowers fixed-length masked gathers and
scatters
We need to mark f16 and bf16 as legal in isLegalMaskedGatherScatter
otherwise ScalarizeMaskedMemIntrin will just scalarize them, but we can
move this back into isLegalElementTypeForRVV afterwards.
The scalarized codegen required #114938, #114927 and #114915 to not
crash.
Commit: 7fb13a934f19797cd722f2a80355690c21d6e3b9
https://github.com/llvm/llvm-project/commit/7fb13a934f19797cd722f2a80355690c21d6e3b9
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/IndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
Log Message:
-----------
[ORC] lazyReexports: Swap IndirectStubsManager for RedirectableSymbolsManager.
RedirectableSymbolsManager is a native SymbolStringPtr API (requires fewer
string operations) and has a narrower interface that permits a wider range of
implementations.
IndirectStubsManager is updated to make it a RedirectableSymbolsManager so that
existing uses continue to work.
Commit: 895a8e66c6d1e42519909981ab1bb0ad41231029
https://github.com/llvm/llvm-project/commit/895a8e66c6d1e42519909981ab1bb0ad41231029
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
Log Message:
-----------
[AArch64][GISel] Support neon.abs intrinsic for vector types (#107226)
This patch lowers the intrinsic to G_ABS and thus supports the intrinsic in GISel.
Commit: 236fda550d36d35a00785938c3e38b0f402aeda6
https://github.com/llvm/llvm-project/commit/236fda550d36d35a00785938c3e38b0f402aeda6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/CycleAnalysis.cpp
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/DemandedBits.cpp
M llvm/lib/Analysis/DomTreeUpdater.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
M llvm/lib/Analysis/IndirectCallPromotionAnalysis.cpp
M llvm/lib/Analysis/InstCount.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryLocation.cpp
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[Analysis] Remove unused includes (NFC) (#114936)
Identified with misc-include-cleaner.
Commit: 9ba0e5c27de210ca04937e87042e5e8541a9ee21
https://github.com/llvm/llvm-project/commit/9ba0e5c27de210ca04937e87042e5e8541a9ee21
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
R llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
Revert "[LoongArch][NFC] Pre-commit tests for codegen with alias analysis"
This reverts commit 445db93844cb50eeb6f587bef0749c2950b46e70.
Commit: a165bbddf9b47c11a0869d09cc32de1d2b19f89f
https://github.com/llvm/llvm-project/commit/a165bbddf9b47c11a0869d09cc32de1d2b19f89f
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
[LoongArch][NFC] Reland "Pre-commit tests for codegen with alias analysis"
Commit: e48d8f9fea69095757d3593a567316197ec70450
https://github.com/llvm/llvm-project/commit/e48d8f9fea69095757d3593a567316197ec70450
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/SemaCXX/cxx2c-placeholder-vars.cpp
Log Message:
-----------
[Clang] Correctly initialize placeholder fields from their initializers (#114196)
We made the incorrect assumption that names of fields are unique when
creating their default initializers.
We fix that by keeping track of the instantiaation pattern for field
decls that are placeholder vars,
like we already do for unamed fields.
Fixes #114069
Commit: d22d63a7855840dd6398b77dcad71f001788ac86
https://github.com/llvm/llvm-project/commit/d22d63a7855840dd6398b77dcad71f001788ac86
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
Log Message:
-----------
[MLIR][Affine] Fix signature of mlir::affine::permuteLoops (#111100)
The method doesn't mutate its argument. A mutable one was being passed
only to get around ArrayRef providing const on elements, which MLIR
doesn't use on IR types.
Commit: cbc7812565b0b0d60c0dadbd3743650f863237d4
https://github.com/llvm/llvm-project/commit/cbc7812565b0b0d60c0dadbd3743650f863237d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64d-double-convert.ll
Log Message:
-----------
[RISCV] Add Zdinx RUN line to rv64d-double-convert.ll. NFC
We already have a Zfinx RUN line for rv64f-float-convert.ll.
Commit: 492812f613280034b7c514d74113750814a3de76
https://github.com/llvm/llvm-project/commit/492812f613280034b7c514d74113750814a3de76
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Fix rethrow's index calculation (#114693)
So far we have assumed that we only rethrow the exception caught in the
innermost EH pad. This is true in code we directly generate, but after
inlining this may not be the case. For example, consider this code:
```ll
ehcleanup:
%0 = cleanuppad ...
call @destructor
cleanupret from %0 unwind label %catch.dispatch
```
If `destructor` gets inlined into this function, the code can be like
```ll
ehcleanup:
%0 = cleanuppad ...
invoke @throwing_func
to label %unreachale unwind label %catch.dispatch.i
catch.dispatch.i:
catchswitch ... [ label %catch.start.i ]
catch.start.i:
%1 = catchpad ...
invoke @some_function
to label %invoke.cont.i unwind label %terminate.i
invoke.cont.i:
catchret from %1 to label %destructor.exit
destructor.exit:
cleanupret from %0 unwind label %catch.dispatch
```
We lower a `cleanupret` into `rethrow`, which assumes it rethrows the
exception caught by the nearest dominating EH pad. But after the
inlining, the nearest dominating EH pad is not `ehcleanup` but
`catch.start.i`.
The problem exists in the same manner in the new (exnref) EH, because it
assumes the exception comes from the nearest EH pad and saves an exnref
from that EH pad and rethrows it (using `throw_ref`).
This problem can be fixed easily if `cleanupret` has the basic block
where its matching `cleanuppad` is. The bitcode instruction `cleanupret`
kind of has that info (it has a token from the `cleanuppad`), but that
info is lost when when we enter ISel, because `TargetSelectionDAG.td`'s
`cleanupret` node does not have any arguments:
https://github.com/llvm/llvm-project/blob/5091a359d9807db8f7d62375696f93fc34226969/llvm/include/llvm/Target/TargetSelectionDAG.td#L700
Note that `catchret` already has two basic block arguments, even though
neither of them means `catchpad`'s BB.
This PR adds the `cleanuppad`'s BB as an argument to `cleanupret` node
in ISel and uses it in the Wasm backend. Because this node is also used
in X86 backend we need to note its argument there too but nothing more
needs to change there as long as X86 doesn't need it.
---
- Details about changes in the Wasm backend:
After this PR, our pseudo `RETHROW` instruction takes a BB, which means
the EH pad whose exception it needs to rethrow. There are currently two
ways to generate a `RETHROW`: one is from `llvm.wasm.rethrow` intrinsic
and the other is from `CLEANUPRET` we discussed above. In case of
`llvm.wasm.rethrow`, we add a '0' as a placeholder argument when it is
lowered to a `RETHROW`, and change it to a BB in LateEHPrepare. As
written in the comments, this PR doesn't change how this BB is computed.
The BB argument will be converted to an immediate argument as with other
control flow instructions in CFGStackify.
In case of `CLEANUPRET`, it already has a BB argument pointing to an EH
pad, so it is just converted to a `RETHROW` with the same BB argument in
LateEHPrepare. This will also be lowered to an immediate in CFGStackify
with other control flow instructions.
---
Fixes #114600.
Commit: f4270045f49d4936cd1d60e49f780ae9b1c18fab
https://github.com/llvm/llvm-project/commit/f4270045f49d4936cd1d60e49f780ae9b1c18fab
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64d-double-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64f-float-convert-strict.ll
Log Message:
-----------
[RISCV] Add Zfinx/Zdinx RUN lines to rv64d-double-convert-strict.ll and rv64f-float-convert-strict.ll. NFC
Commit: 84ce230e4298672bb5247170d6183b31aa06fc4b
https://github.com/llvm/llvm-project/commit/84ce230e4298672bb5247170d6183b31aa06fc4b
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/include/__random/binomial_distribution.h
Log Message:
-----------
[libcxx] Use `lgamma` rather than `lgamma_r` with LLVM libc (#109556)
`lgamma_r` is currently only available on GPU targets.
Commit: 4480a22c2b8587c761a44c4290e3fdd9e4be75d3
https://github.com/llvm/llvm-project/commit/4480a22c2b8587c761a44c4290e3fdd9e4be75d3
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
Log Message:
-----------
[LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (#101641)
Following #90184, this patch emits vp.merge intrinsic, which is used to
set the inactive lanes in a select operation to the RHS instead of
undef. Currently, it is applied to out-loop reduction for EVL
vectorization.
This patch performs transformation to convert
select(header_mask, LHS, RHS)
into
vp.merge(all-true, LHS, RHS, EVL)
And always use the predicated reduction select to set the incoming value
of the reduction phi to support out-loop reduction when using tail
folding with EVL.
TODO: Postpone the adjustment of the predicated reduction select to
VPlanTransform. The current adjustment might be too early, which could
lead to a situation where the predicated reduction select is adjusted,
but the EVL recipes cannot be successfully generated during
VPlanTransform.
Commit: 5adb5c05a2e9f31385fbba8b0436cbc07d91a44d
https://github.com/llvm/llvm-project/commit/5adb5c05a2e9f31385fbba8b0436cbc07d91a44d
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/memcmp-optsize.ll
A llvm/test/CodeGen/RISCV/memcmp.ll
Log Message:
-----------
[RISCV] Add tests for memcmp expansion
We add tests for the following cases:
* Length = 0, 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, 31, 32, 63, 64, 127,
128, runtime.
* Comparisons against zero.
* RUN lines for scalar/vector w/ or w/o strict align.
* Optimize for size.
Reviewers: topperc, preames
Reviewed By: topperc, preames
Pull Request: https://github.com/llvm/llvm-project/pull/107824
Commit: 0e907c17214aa3b1a60b66867fea3cc0f0dcbaa0
https://github.com/llvm/llvm-project/commit/0e907c17214aa3b1a60b66867fea3cc0f0dcbaa0
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/include/flang/Common/Fortran-features.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/Inputs/modfile70.mod
M flang/test/Semantics/modfile63.f90
A flang/test/Semantics/modfile70.f90
Log Message:
-----------
[flang] Prevent errors from being suppressed (#114420)
`ModFileReader::Say()` flags all messages as errors, but Flang was
mistakenly suppressing two errors when the `-w` flag was used, as they
were incorrectly conditioned to warning suppression. This fix ensures
that errors are reported regardless of the `-w` flag.
This commit also replaces two uses of `_warn_en_US` with `_err_en_US` to
prevent potential confusion in the future.
Commit: 6d719d9700261283e7f90cdaffb64a62d526f583
https://github.com/llvm/llvm-project/commit/6d719d9700261283e7f90cdaffb64a62d526f583
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_interface_internal.h
R compiler-rt/lib/xray/xray_s390x.cpp
R compiler-rt/lib/xray/xray_trampoline_s390x.S
M compiler-rt/lib/xray/xray_tsc.h
Log Message:
-----------
Revert "[SystemZ][XRay] XRay runtime support for SystemZ (#113252)"
for causing: https://github.com/llvm/llvm-project/issues/115129
This reverts commit db1882e2484013066139f0b3f77d968d84a79158.
Commit: 41248b598b8b18febc62ea61938870def2421126
https://github.com/llvm/llvm-project/commit/41248b598b8b18febc62ea61938870def2421126
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/docs/CodeReview.rst
M llvm/docs/Contributing.rst
Log Message:
-----------
[docs] Update docs on code-review process (#111735)
Clarify expectations for handling new comments post-LGTM but pre-commit.
This change aims to standardize expectations when new comments are added
after a patch has received LGTM but before it has been committed.
Currently, approaches to this vary, and this update seeks to clarify
best practices.
Commit: 7a5b040e20394a4794b4360a56de8a172b5e27f4
https://github.com/llvm/llvm-project/commit/7a5b040e20394a4794b4360a56de8a172b5e27f4
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
Log Message:
-----------
[RISCV] Add initial support of memcmp expansion
There are two passes that have dependency on the implementation
of `TargetTransformInfo::enableMemCmpExpansion` : `MergeICmps` and
`ExpandMemCmp`.
This PR adds the initial implementation of `enableMemCmpExpansion`
so that we can have some basic benefits from these two passes.
We don't enable expansion when there is no unaligned access support
currently because there are some issues about unaligned loads and
stores in `ExpandMemcmp` pass. We should fix these issues and enable
the expansion later.
Vector case hasn't been tested as we don't generate inlined vector
instructions for memcmp currently.
Reviewers: preames, arcbbb, topperc, asb, dtcxzyw
Reviewed By: topperc, preames
Pull Request: https://github.com/llvm/llvm-project/pull/107548
Commit: c96a85abfde822f2eda9076eb40078389b21f23e
https://github.com/llvm/llvm-project/commit/c96a85abfde822f2eda9076eb40078389b21f23e
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][VectorToSPIRV] Add conversion for vector.extract with dynamic indices (#114137)
Commit: dc55d31f4cf5c97b56f6b7e1c24b70674cc15a01
https://github.com/llvm/llvm-project/commit/dc55d31f4cf5c97b56f6b7e1c24b70674cc15a01
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][tensor] Fix a crash in `ExtractOp::fold` (#115001)
This PR fixes a crash when the tensor of `tensor.extract` is a dense
resource elements attribute.
Fixes #114728.
Co-authored-by: jinzhi <jinzhi6 at huawei.com>
Commit: 08411c855f77bd7416725c280ad3dccdc00b7dd6
https://github.com/llvm/llvm-project/commit/08411c855f77bd7416725c280ad3dccdc00b7dd6
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/test/CodeGen/RISCV/copysign-casts.ll
Log Message:
-----------
[RISCV] Correct fcopysign pattern for zdinx (#114954)
Correcting the pattern fixes the following error:
fatal error: error in backend: Cannot select: t17: f64 = fcopysign t5,
t8
Commit: 69d0bab82689d470e3fd68f50ca8b8d28f3e2294
https://github.com/llvm/llvm-project/commit/69d0bab82689d470e3fd68f50ca8b8d28f3e2294
Author: BoyaoWang430 <wangboyao at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
Log Message:
-----------
[RISCV] Add load/store clustering in post machine schedule (#111504)
#73789 added load clustering and #73796 tried to add store clustering.
If post machine schedule is used, previous cluster of load/store which
formed in machine schedule may break. In order to solve this, add
load/sotre clustering to post machine schedule.
Commit: c0a7b60fd1b244782032fefc261c4442c54c3935
https://github.com/llvm/llvm-project/commit/c0a7b60fd1b244782032fefc261c4442c54c3935
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
R flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
R flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
Log Message:
-----------
Revert "[flang][OpenMP] Add alias analysis for omp private" (#115135)
Reverts llvm/llvm-project#113566 (commit id: f3025c8b4fd797d99a8a8117254f93605ec46aa8 )
because of regression in Fujitsu compiler test suite.
Commit: 8431494094c8732d1426763d3e1aae322fa76830
https://github.com/llvm/llvm-project/commit/8431494094c8732d1426763d3e1aae322fa76830
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/Basic/SourceManager.cpp
M clang/test/Lexer/SourceLocationsOverflow.c
M clang/test/Misc/sloc-usage.cpp
Log Message:
-----------
[clang] Make source locations space usage diagnostics numbers easier to read (#114999)
Instead of writing "12345678B", write "12345678B (12.34MB)".
Commit: 37ce18951fded6be1de319b05b968918cb45c00b
https://github.com/llvm/llvm-project/commit/37ce18951fded6be1de319b05b968918cb45c00b
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
Log Message:
-----------
[RISCV] Add requirement of asserts
We forgot to add `REQUIRES: asserts` here.
Commit: 7be30fd5335ca7fe050ee1789ea2648f014daf1b
https://github.com/llvm/llvm-project/commit/7be30fd5335ca7fe050ee1789ea2648f014daf1b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A libclc/clc/include/clc/integer/clc_abs.h
A libclc/clc/include/clc/integer/clc_abs.inc
A libclc/clc/include/clc/integer/clc_abs_diff.h
A libclc/clc/include/clc/integer/clc_abs_diff.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/integer/clc_abs.cl
A libclc/clc/lib/generic/integer/clc_abs.inc
A libclc/clc/lib/generic/integer/clc_abs_diff.cl
A libclc/clc/lib/generic/integer/clc_abs_diff.inc
M libclc/generic/lib/integer/abs.cl
M libclc/generic/lib/integer/abs.inc
M libclc/generic/lib/integer/abs_diff.cl
M libclc/generic/lib/integer/abs_diff.inc
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_hypot.cl
Log Message:
-----------
[libclc] Move abs/abs_diff to CLC library
Commit: b4263ddbe7cbcc9e0b5b0ea07c252056355301d0
https://github.com/llvm/llvm-project/commit/b4263ddbe7cbcc9e0b5b0ea07c252056355301d0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/sincos_helpers.cl
Log Message:
-----------
[libclc] Use __clc_max in CLC functions
Commit: ed9dab67e2932baf11bfa514b07b159c3bffd518
https://github.com/llvm/llvm-project/commit/ed9dab67e2932baf11bfa514b07b159c3bffd518
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
Log Message:
-----------
[ARM] Add extra tests for CVE-2024-7883 with undef/poison
Commit: 8c565de5ec6d49143ba9ae7c73b188314d31e563
https://github.com/llvm/llvm-project/commit/8c565de5ec6d49143ba9ae7c73b188314d31e563
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/double-lround.ll
A llvm/test/CodeGen/LoongArch/float-lround.ll
Log Message:
-----------
[LoongArch] Support llvm.lround intrinsics with i32 return type. (#114733)
This is needed by flang, similar to RISCV-64 in
https://reviews.llvm.org/D147195.
Commit: 5acc4a3dc0e2145d2bfef47f1543bb291c2b866a
https://github.com/llvm/llvm-project/commit/5acc4a3dc0e2145d2bfef47f1543bb291c2b866a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__cstddef/nullptr_t.h
M libcxx/include/__cstddef/ptrdiff_t.h
M libcxx/include/__cstddef/size_t.h
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__functional/function.h
M libcxx/include/__functional/hash.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/forward_list
M libcxx/include/new
M libcxx/include/string_view
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.cmp/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.special/cmp_nullptr.pass.cpp
Log Message:
-----------
[libc++] Remove <stddef.h> includes from the granularized <cstddef> headers (#114788)
We can define some of these aliases without having to include the system
<stddef.h> and there doesn't seem to be much of a reason we shouldn't do
it this way.
Commit: c6f3b7bcd0596d30f8dabecdfb9e44f9a07b6e4c
https://github.com/llvm/llvm-project/commit/c6f3b7bcd0596d30f8dabecdfb9e44f9a07b6e4c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/docs/DesignDocs/ThreadingSupportAPI.rst
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/lexicographical_compare.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__atomic/aliases.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__atomic/cxx_atomic_impl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/high_resolution_clock.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/parser_std_format_spec.h
M libcxx/include/__chrono/statically_widen.h
M libcxx/include/__chrono/steady_clock.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
M libcxx/include/__config_site.in
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__filesystem/directory_entry.h
M libcxx/include/__filesystem/directory_iterator.h
M libcxx/include/__filesystem/operations.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__filesystem/recursive_directory_iterator.h
M libcxx/include/__format/concepts.h
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__format/format_context.h
M libcxx/include/__format/format_functions.h
M libcxx/include/__format/format_parse_context.h
M libcxx/include/__format/formatter_bool.h
M libcxx/include/__format/formatter_char.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__format/parser_std_format_spec.h
M libcxx/include/__format/unicode.h
M libcxx/include/__format/write_escaped.h
M libcxx/include/__functional/hash.h
M libcxx/include/__fwd/fstream.h
M libcxx/include/__fwd/ios.h
M libcxx/include/__fwd/istream.h
M libcxx/include/__fwd/ostream.h
M libcxx/include/__fwd/sstream.h
M libcxx/include/__fwd/streambuf.h
M libcxx/include/__fwd/string.h
M libcxx/include/__fwd/string_view.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_defaults.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
M libcxx/include/__mbstate_t.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory_resource/synchronized_pool_resource.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__ostream/print.h
M libcxx/include/__random/random_device.h
M libcxx/include/__ranges/istream_view.h
M libcxx/include/__stop_token/atomic_unique_lock.h
M libcxx/include/__stop_token/stop_callback.h
M libcxx/include/__stop_token/stop_source.h
M libcxx/include/__stop_token/stop_state.h
M libcxx/include/__stop_token/stop_token.h
M libcxx/include/__string/char_traits.h
M libcxx/include/__support/xlocale/__posix_l_fallback.h
M libcxx/include/__support/xlocale/__strtonum_fallback.h
M libcxx/include/__thread/formatter.h
M libcxx/include/__thread/id.h
M libcxx/include/__thread/jthread.h
M libcxx/include/__thread/support.h
M libcxx/include/__thread/this_thread.h
M libcxx/include/__thread/thread.h
M libcxx/include/__thread/timed_backoff_policy.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__vector/vector.h
M libcxx/include/barrier
M libcxx/include/chrono
M libcxx/include/codecvt
M libcxx/include/complex
M libcxx/include/condition_variable
M libcxx/include/cstdlib
M libcxx/include/deque
M libcxx/include/format
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/iomanip
M libcxx/include/ios
M libcxx/include/iosfwd
M libcxx/include/iostream
M libcxx/include/istream
M libcxx/include/latch
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/mutex
M libcxx/include/ostream
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/regex
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/sstream
M libcxx/include/stdatomic.h
M libcxx/include/stop_token
M libcxx/include/streambuf
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/syncstream
M libcxx/include/thread
M libcxx/include/vector
M libcxx/include/version
M libcxx/include/wchar.h
M libcxx/modules/std.compat.cppm.in
M libcxx/modules/std.compat/clocale.inc
M libcxx/modules/std.compat/cstdlib.inc
M libcxx/modules/std.compat/cwchar.inc
M libcxx/modules/std.compat/cwctype.inc
M libcxx/modules/std.cppm.in
M libcxx/modules/std/atomic.inc
M libcxx/modules/std/barrier.inc
M libcxx/modules/std/chrono.inc
M libcxx/modules/std/clocale.inc
M libcxx/modules/std/codecvt.inc
M libcxx/modules/std/complex.inc
M libcxx/modules/std/condition_variable.inc
M libcxx/modules/std/cstdlib.inc
M libcxx/modules/std/cwchar.inc
M libcxx/modules/std/cwctype.inc
M libcxx/modules/std/filesystem.inc
M libcxx/modules/std/format.inc
M libcxx/modules/std/fstream.inc
M libcxx/modules/std/future.inc
M libcxx/modules/std/iomanip.inc
M libcxx/modules/std/ios.inc
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/iostream.inc
M libcxx/modules/std/istream.inc
M libcxx/modules/std/latch.inc
M libcxx/modules/std/locale.inc
M libcxx/modules/std/memory.inc
M libcxx/modules/std/mutex.inc
M libcxx/modules/std/ostream.inc
M libcxx/modules/std/print.inc
M libcxx/modules/std/random.inc
M libcxx/modules/std/ranges.inc
M libcxx/modules/std/regex.inc
M libcxx/modules/std/semaphore.inc
M libcxx/modules/std/shared_mutex.inc
M libcxx/modules/std/spanstream.inc
M libcxx/modules/std/sstream.inc
M libcxx/modules/std/stop_token.inc
M libcxx/modules/std/streambuf.inc
M libcxx/modules/std/string.inc
M libcxx/modules/std/string_view.inc
M libcxx/modules/std/strstream.inc
M libcxx/modules/std/syncstream.inc
M libcxx/modules/std/thread.inc
M libcxx/src/algorithm.cpp
M libcxx/src/call_once.cpp
M libcxx/src/chrono.cpp
M libcxx/src/experimental/include/tzdb/tzdb_list_private.h
M libcxx/src/filesystem/time_utils.h
M libcxx/src/include/atomic_support.h
M libcxx/src/include/config_elast.h
M libcxx/src/ios.cpp
M libcxx/src/ios.instantiations.cpp
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
M libcxx/src/memory.cpp
M libcxx/src/memory_resource.cpp
M libcxx/src/ostream.cpp
M libcxx/src/print.cpp
M libcxx/src/random_shuffle.cpp
M libcxx/src/std_stream.h
M libcxx/src/string.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
M libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/test_data.json
M libcxx/test/libcxx/feature_test_macro/version_header.sh.py
M libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/test/libcxx/include_as_c.sh.cpp
M libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/libcxx/vendor/apple/availability-with-pedantic-errors.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.tests.h
M libcxx/test/std/language.support/support.limits/support.limits.general/barrier.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/iomanip.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/latch.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/semaphore.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/shared_mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/stop_token.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/thread.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/header_information.py
M libcxx/utils/libcxx/test/dsl.py
M libcxx/utils/libcxx/test/features.py
M runtimes/cmake/Modules/HandleFlags.cmake
Log Message:
-----------
[libc++] Refactor the configuration macros to being always defined (#112094)
This is a follow-up to #89178. This updates the `<__config_site>`
macros.
Commit: e29d092af8b0ed2b15ce1dfd9fc4caef1976eef7
https://github.com/llvm/llvm-project/commit/e29d092af8b0ed2b15ce1dfd9fc4caef1976eef7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-pmuldq.ll
Log Message:
-----------
[X86] getFauxShuffleMask - add ISD::SHL/SRL handling
This is currently mostly the same as the VSHLI/VSRLI handling below, although I've kept them separate as I'm investigating adding non-uniform shift amount handling as a followup
Commit: 270bfb2f2abc48ec916fce7e677fe3cc6f2908d0
https://github.com/llvm/llvm-project/commit/270bfb2f2abc48ec916fce7e677fe3cc6f2908d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
Log Message:
-----------
[X86] Add test coverage for #114959
Commit: 2f48765b45ba87d780caf7d058d416b5dda32d7e
https://github.com/llvm/llvm-project/commit/2f48765b45ba87d780caf7d058d416b5dda32d7e
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Remove -mllvm --tail-merge-threshold=0 from Bazel. (#115061)
Follow-up on the `-mllvm --tail-merge-threshold=0` removal promised in
aeccc16497a84d61200f7ccfa3864096349260d3 (see
b2a9ea4420127d10b18ae648b16757665f8bbd7c commit message on why we don't
need this in Bazel, and will only keep in AArch64-specific compile flags
in CMake build).
Commit: 3d4d033ceaf9e72491a20e9210f396aa3ec52fa5
https://github.com/llvm/llvm-project/commit/3d4d033ceaf9e72491a20e9210f396aa3ec52fa5
Author: David Green <david.green at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/Thumb2/mve-doublereduct.ll
Log Message:
-----------
[AArch64][Arm] Add nested double reduction tests. NFC
Commit: ebfafa2511f92eed484895f3265ced40f4c1fc70
https://github.com/llvm/llvm-project/commit/ebfafa2511f92eed484895f3265ced40f4c1fc70
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
A llvm/test/CodeGen/SPIRV/pointers/composite-fun-fix-ptr-arg.ll
Log Message:
-----------
[SPIR-V] Fix OpFunctionParameter vs. OpTypeFunction types for pointer arguments when there are functions with aggregate arguments (#115044)
The goal of the PR is to ensure that if module contains functions with
mutated signature (due to preprocessing of aggregate types), functions
still are going through re-creating of function type to preserve pointee
type information for arguments.
This fixes a bug when a module with (1) a function having aggregate
arguments and/or return, and (2) at least two functions with signatures
different only wrt. pointee types is translated so that one of two
similar functions gets an incorrect OpFunctionParameter type that is
different from the corresponding OpTypeFunction definition.
A reproducer is attached as a new test case.
Commit: f363f9d61eaff7090a19d226ea8786b2987d4fcc
https://github.com/llvm/llvm-project/commit/f363f9d61eaff7090a19d226ea8786b2987d4fcc
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/lib/orc/dlfcn_wrapper.cpp
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/orc/elfnix_platform.h
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC][Runtime] Add `dlupdate` for elf (#110406)
With the help of @lhames, This pull request introduces the dlupdate
function in the ORC runtime. dlupdate enables incremental execution of
new initializers introduced in the REPL environment. Unlike traditional
dlopen, which manages initializers, code mapping, and library reference
counts, dlupdate focuses exclusively on running new initializers.
Commit: d77a36e01b8fed496b29c3b2c12526f8dc380766
https://github.com/llvm/llvm-project/commit/d77a36e01b8fed496b29c3b2c12526f8dc380766
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorize] Use new getUniqueLatchExitBlock routine (#108231)
With PR #88385 I am introducing support for vectorising more loops with
early exits that don't require a scalar epilogue. As such, if a loop
doesn't have a unique exit block it will not automatically imply we
require a scalar epilogue. Also, in all places in the code today where
we use the variable LoopExitBlock we actually mean the exit block from
the latch. Therefore, it seemed reasonable to add a new
getUniqueLatchExitBlock that allows the caller to determine the exit
block taken from the latch and use this instead of getUniqueExitBlock. I
also renamed LoopExitBlock to be LatchExitBlock. I feel this not only
better reflects how the variable is used today, but also prepares the
code for PR #88385.
While doing this I also noticed that one of the comments in
requiresScalarEpilogue is wrong when we require a scalar epilogue, i.e.
when we're not exiting from the latch block. This doesn't always imply
we have multiple exits, e.g. see the test in
Transforms/LoopVectorize/unroll_nonlatch.ll
where the latch unconditionally branches back to the only exiting block.
Commit: 2d56de9e7e4a3accde42b4d7d329acd007989df8
https://github.com/llvm/llvm-project/commit/2d56de9e7e4a3accde42b4d7d329acd007989df8
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
Log Message:
-----------
Revert "[ARM] Add extra tests for CVE-2024-7883 with undef/poison"
Reverting because this causes a test failure in the expensive-checks
buildbot.
This reverts commit ed9dab67e2932baf11bfa514b07b159c3bffd518.
Commit: 9f8c3d3796ebf7ddd4a85134ff109cf03a0b9b5e
https://github.com/llvm/llvm-project/commit/9f8c3d3796ebf7ddd4a85134ff109cf03a0b9b5e
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
R lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpoinsSameCUName.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpointsSameCUName.py
Log Message:
-----------
[lldb][test] Correct typo in breakpoint test file name
Added by https://github.com/llvm/llvm-project/pull/114896.
Commit: c75353313ed73c6dc04beb322954bb905906f4a1
https://github.com/llvm/llvm-project/commit/c75353313ed73c6dc04beb322954bb905906f4a1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add 256-bit concat(shuffle(),shuffle()) handling
Improve IsConcatFree detection to handle splat vector-loads (which can be folded as X86ISD::SUBV_BROADCAST_LOAD).
Fixes #114959
Commit: 5a16ed96c5362aa8e9610fa266d6f6202b19edc3
https://github.com/llvm/llvm-project/commit/5a16ed96c5362aa8e9610fa266d6f6202b19edc3
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add +unaligned-scalar-mem to spacemit-x60 (#115125)
I can't find any official documentation on this, but from other
discussions[^1] and my own testing the spacemit-x60 seems to support
unaligned scalar loads and stores.
They seem to be performant, and just from a quick test we get a 2.45%
speedup on 500.perlbench_r on the Banana Pi F3[^2].
This would allow it to take advantage of #107548.
[^1]:
https://github.com/llvm/llvm-project/issues/110454#issuecomment-2382199460
[^2]: https://lnt.lukelau.me/db_default/v4/nts/32
Commit: f87484d5910c1c708bfd93ef588d6ff8307e2477
https://github.com/llvm/llvm-project/commit/f87484d5910c1c708bfd93ef588d6ff8307e2477
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVM/CMakeLists.txt
Log Message:
-----------
Fix libnvptxcompiler_static.a absolute path (#115015)
Now when building llvm-solid with `-DMLIR_ENABLE_NVPTXCOMPILER=ON`,
there will be an absolute path (`/path/to/libnvptxcompiler_static.a`) in
MLIRNVVMTarget dependencies (in
`/build/path/install/lib/cmake/mlir/MLIRTargets.cmake`). For example,
```cmake
set_target_properties(MLIRNVVMTarget PROPERTIES
INTERFACE_LINK_LIBRARIES "MLIRIR;MLIRExecutionEngineUtils;MLIRSupport;MLIRGPUDialect;MLIRTargetLLVM;MLIRNVVMToLLVMIRTranslation;LLVMSupport;/path/to/libnvptxcompiler_static.a"
)
```
If downstream project uses pre-built llvm and depends on MLIRNVVMTarget,
it may fail to build due to the absence of the
`libnvptxcompiler_static.a` absolute path.
After this commit, there will no absolute path in
`/build/path/install/lib/cmake/mlir/MLIRTargets.cmake`
```cmake
set_target_properties(MLIRNVVMTarget PROPERTIES
INTERFACE_LINK_LIBRARIES "MLIRIR;MLIRExecutionEngineUtils;MLIRSupport;MLIRGPUDialect;MLIRTargetLLVM;MLIRNVVMToLLVMIRTranslation;LLVMSupport;\$<LINK_ONLY:MLIR_NVPTXCOMPILER_LIB>"
)
```
Then downstream project can modify `libnvptxcompiler_static.a` path and
use cmake to build. For example,
```cmake
# find_library(...)
add_library(MLIR_NVPTXCOMPILER_LIB STATIC IMPORTED GLOBAL)
set_property(TARGET MLIR_NVPTXCOMPILER_LIB PROPERTY IMPORTED_LOCATION ${...})
```
Commit: 40556d08491f530e03746fb188b38e7f9cb272c7
https://github.com/llvm/llvm-project/commit/40556d08491f530e03746fb188b38e7f9cb272c7
Author: brod4910 <13954100+brod4910 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir
Log Message:
-----------
[MLIR][Tensor] Fix out-of-bounds FoldEmptyTensorWithDimOp crash (#112196)
Fixes #111270
Commit: ea6b8fa4b9b48a11c2657bedf35ad5291b1e2b9c
https://github.com/llvm/llvm-project/commit/ea6b8fa4b9b48a11c2657bedf35ad5291b1e2b9c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/PowerPC/f128-arith.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
Log Message:
-----------
[SDAG] Merge multiple-result libcall expansion into DAG.expandMultipleResultFPLibCall() (#114792)
This merges the logic for expanding both FFREXP and FSINCOS into one
method `DAG.expandMultipleResultFPLibCall()`. This reduces duplication
and also allows FFREXP to benefit from the stack slot elimination
implemented for FSINCOS. This method will also be used in future to
implement more multiple-result intrinsics (such as modf and sincospi).
Commit: 56077e5ac09eb2d6b7ca818abce2bbbcf179f529
https://github.com/llvm/llvm-project/commit/56077e5ac09eb2d6b7ca818abce2bbbcf179f529
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/locally-imported-arm64ec.test
Log Message:
-----------
[LLD][COFF] Add support for locally imported EC symbols (#114985)
Allow imported symbols to be recognized in both mangled and demangled
forms. Support __imp_aux_ symbols in addition to __imp_ symbols.
Commit: eab7be5d42ad30c9992ff72c3be9298702001dc8
https://github.com/llvm/llvm-project/commit/eab7be5d42ad30c9992ff72c3be9298702001dc8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__algorithm/adjacent_find.h
M libcxx/include/__algorithm/all_of.h
M libcxx/include/__algorithm/any_of.h
M libcxx/include/__algorithm/copy_if.h
M libcxx/include/__algorithm/count_if.h
M libcxx/include/__algorithm/iterator_operations.h
M libcxx/include/__algorithm/ranges_adjacent_find.h
M libcxx/include/__algorithm/ranges_all_of.h
M libcxx/include/__algorithm/ranges_any_of.h
M libcxx/include/__algorithm/ranges_copy_if.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__algorithm/ranges_count_if.h
M libcxx/include/__algorithm/ranges_fill_n.h
M libcxx/include/__algorithm/unique.h
Log Message:
-----------
[libc++] Forward more algorithms to the classic algorithms (#114674)
This partially addresses #105687.
Commit: 2bbb6c067020bef50435c2ba5addcd66d1b9a1dd
https://github.com/llvm/llvm-project/commit/2bbb6c067020bef50435c2ba5addcd66d1b9a1dd
Author: Chris Cotter <ccotter14 at bloomberg.net>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
Log Message:
-----------
[clang][NFC] Spell out DynTypedNode instead of auto (#114427)
Commit: 3c4e6c17f066d9cf5a5b065a05bdff472f721bf6
https://github.com/llvm/llvm-project/commit/3c4e6c17f066d9cf5a5b065a05bdff472f721bf6
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M flang/test/Driver/arch-specific-libdir-rpath.f95
Log Message:
-----------
[flang][Driver] When linking with the Fortran runtime, the `addArchSpecificRPath()` should be called too (#114837)
When linking with other runtimes (OpenMP, sanitizers), the
addArchSpecificRPath() is being called. The same thing should happen
when linking with the Fortran runtime, this will improve user experience
massively.
Commit: d8354d63db66e5d67d74b24b1611b578700f1134
https://github.com/llvm/llvm-project/commit/d8354d63db66e5d67d74b24b1611b578700f1134
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] Extend test coverage for #114901 with commuted test case
Commit: cab606c30661a746b2513a8330e0c8eca771913e
https://github.com/llvm/llvm-project/commit/cab606c30661a746b2513a8330e0c8eca771913e
Author: hev <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
M llvm/lib/Target/LoongArch/LoongArchSubtarget.h
M llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
[LoongArch] Enable alias analysis by default (#114980)
Enable use of alias analysis during code generation.
Commit: d8139ae50f72046a2fce36055d8dc936b50d20ef
https://github.com/llvm/llvm-project/commit/d8139ae50f72046a2fce36055d8dc936b50d20ef
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
Log Message:
-----------
[lldb][test] Use -gdwarf to fix same CU breakpoint test on Windows on Arm
clang when given -g on Windows produces a PDB file. For whatever reason,
the test doesn't work with that.
-gdwarf produces DWARF regardless of platform.
Fixes 803f957e87e4083f6d61c8991171eeeaf0e6bd61.
Commit: 5a062191f7b9467aaddb6fe4b84c16e60fe85cc8
https://github.com/llvm/llvm-project/commit/5a062191f7b9467aaddb6fe4b84c16e60fe85cc8
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
A llvm/test/CodeGen/SPIRV/pointers/OpExtInst-OpenCL_std-ptr-types.ll
Log Message:
-----------
[SPIR-V] Ensure correct pointee types of some OpenCL Extended Instructions' pointer arguments (#114846)
OpenCL Extended Instruction Set Specification defines relations between
return/operand types and pointee type of pointer arguments in case of
remquo, fract, frexp, lgamma_r, modf, sincos and prefetch instructions
(https://registry.khronos.org/SPIR-V/specs/unified1/OpenCL.ExtendedInstructionSet.100.html).
This PR ensures correct pointee types of those OpenCL Extended
Instructions' pointer arguments.
Commit: 38fffa630ee80163dc65e759392ad29798905679
https://github.com/llvm/llvm-project/commit/38fffa630ee80163dc65e759392ad29798905679
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CodeGen/PowerPC/altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
M clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init-no-parentheses.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init.c
M clang/test/CodeGen/RISCV/rvv-vls-bitwise-ops.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/SystemZ/zvector2.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vbmi2-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
M clang/test/CodeGen/X86/avx512vlvbmi2-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/X86/xop-builtins-cmp.c
M clang/test/CodeGen/X86/xop-builtins.c
M clang/test/CodeGen/aarch64-neon-3v.c
M clang/test/CodeGen/aarch64-neon-intrinsics.c
M clang/test/CodeGen/aarch64-neon-misc.c
M clang/test/CodeGen/aarch64-neon-shifts.c
M clang/test/CodeGen/aarch64-neon-tbl.c
M clang/test/CodeGen/aarch64-poly64.c
M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
M clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-mve-intrinsics/absneg.c
M clang/test/CodeGen/arm-mve-intrinsics/bitwise-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/cplusplus.cpp
M clang/test/CodeGen/arm-mve-intrinsics/vbicq.c
M clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/vornq.c
M clang/test/CodeGen/arm-neon-shifts.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtinshufflevector2.c
M clang/test/CodeGen/const-init.c
M clang/test/CodeGen/matrix-type-operators.c
M clang/test/CodeGen/neon-immediate-ubsan.c
M clang/test/CodeGen/nofpclass.c
M clang/test/CodeGen/ppc-vec_ct-truncate.c
M clang/test/CodeGen/variadic-nvptx.c
M clang/test/CodeGen/vecshift.c
M clang/test/CodeGen/vector-scalar.c
M clang/test/CodeGenCXX/auto-var-init.cpp
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenCXX/ext-vector-type-conditional.cpp
M clang/test/CodeGenCXX/matrix-type-builtins.cpp
M clang/test/CodeGenCXX/matrix-type-operators.cpp
M clang/test/CodeGenCXX/vector-size-conditional.cpp
M clang/test/CodeGenCXX/vector-splat-conversion.cpp
M clang/test/CodeGenHLSL/BasicFeatures/standard_conversion_sequences.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/CodeGenOpenCL/logical-ops.cl
M clang/test/CodeGenOpenCL/partial_initializer.cl
M clang/test/CodeGenOpenCL/shifts.cl
M clang/test/CodeGenOpenCL/vector_literals.cl
M clang/test/Headers/__clang_hip_math_deprecated.hip
M clang/test/Headers/wasm.c
M llvm/lib/IR/AsmWriter.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/logicalop.ll
M llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/div.ll
M llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
M llvm/test/Analysis/CostModel/AMDGPU/fneg.ll
M llvm/test/Analysis/CostModel/AMDGPU/logicalop.ll
M llvm/test/Analysis/CostModel/AMDGPU/mul.ll
M llvm/test/Analysis/CostModel/AMDGPU/rem.ll
M llvm/test/Analysis/CostModel/ARM/divrem.ll
M llvm/test/Analysis/CostModel/ARM/logicalop.ll
M llvm/test/Analysis/CostModel/PowerPC/logicalop.ll
M llvm/test/Analysis/CostModel/RISCV/arith-int.ll
M llvm/test/Analysis/CostModel/RISCV/logicalop.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-load-store.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-phi-const.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/CostModel/SystemZ/divrem-pow2.ll
M llvm/test/Analysis/CostModel/SystemZ/logicalop.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-latency.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/arith-fp.ll
M llvm/test/Analysis/CostModel/X86/div-codesize.ll
M llvm/test/Analysis/CostModel/X86/div-latency.ll
M llvm/test/Analysis/CostModel/X86/div-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/fshl-codesize.ll
M llvm/test/Analysis/CostModel/X86/fshl-latency.ll
M llvm/test/Analysis/CostModel/X86/fshl-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/fshl.ll
M llvm/test/Analysis/CostModel/X86/fshr-codesize.ll
M llvm/test/Analysis/CostModel/X86/fshr-latency.ll
M llvm/test/Analysis/CostModel/X86/fshr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/fshr.ll
M llvm/test/Analysis/CostModel/X86/logicalop.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-codesize.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-latency.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/mul-codesize.ll
M llvm/test/Analysis/CostModel/X86/mul-latency.ll
M llvm/test/Analysis/CostModel/X86/mul-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/mul.ll
M llvm/test/Analysis/CostModel/X86/rem-codesize.ll
M llvm/test/Analysis/CostModel/X86/rem-latency.ll
M llvm/test/Analysis/CostModel/X86/rem-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/slm-arith-costs.ll
M llvm/test/Analysis/CostModel/X86/vdiv-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-sizelatency.ll
M llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll
M llvm/test/Analysis/DemandedBits/vectors.ll
M llvm/test/Analysis/ValueTracking/known-bits.ll
M llvm/test/Analysis/ValueTracking/known-fpclass.ll
M llvm/test/Analysis/ValueTracking/known-non-zero.ll
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
M llvm/test/Analysis/ValueTracking/knownbits-bmi-pattern.ll
M llvm/test/Analysis/ValueTracking/knownbits-x86-hadd-hsub.ll
M llvm/test/Analysis/ValueTracking/knownzero-shift.ll
M llvm/test/Analysis/ValueTracking/numsignbits-shl.ll
M llvm/test/Assembler/ConstantExprFold.ll
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/opaque-ptr.ll
M llvm/test/Bitcode/constantsTest.3.2.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-p7-in-memory.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-memset.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-tbaa.ll
M llvm/test/CodeGen/NVPTX/variadics-lowering.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-negative.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-const.ll
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M llvm/test/Instrumentation/MemorySanitizer/vector-track-origins-neon.ll
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M llvm/test/Transforms/CorrelatedValuePropagation/overflows.ll
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M llvm/test/Transforms/DeadStoreElimination/offsetted-overlapping-stores.ll
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M llvm/test/Transforms/InstCombine/compare-udiv.ll
M llvm/test/Transforms/InstCombine/consecutive-ptrmask.ll
M llvm/test/Transforms/InstCombine/copysign-fneg-fabs.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/demorgan.ll
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M llvm/test/Transforms/InstCombine/div-shift.ll
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M llvm/test/Transforms/InstCombine/eq-of-parts.ll
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M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation.ll
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M llvm/test/Transforms/InstCombine/icmp-mul.ll
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M llvm/test/Transforms/InstCombine/icmp-shl-nuw.ll
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M llvm/test/Transforms/InstCombine/icmp-ult-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
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M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll
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M llvm/test/Transforms/InstCombine/sdiv-exact-by-power-of-two.ll
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-bitext.ll
M llvm/test/Transforms/InstCombine/select-divrem.ll
M llvm/test/Transforms/InstCombine/select-extractelement.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
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M llvm/test/Transforms/InstCombine/select-icmp-and.ll
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M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-shl.ll
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M llvm/test/Transforms/InstCombine/shl-and-signbit-icmpeq-zero.ll
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M llvm/test/Transforms/InstCombine/shl-demand.ll
M llvm/test/Transforms/InstCombine/shl-sub.ll
M llvm/test/Transforms/InstCombine/shl-unsigned-cmp-const.ll
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M llvm/test/Transforms/InstCombine/signbit-shl-and-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signed-mul-lack-of-overflow-check-via-mul-sdiv.ll
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M llvm/test/Transforms/InstCombine/signmask-of-sext-vs-of-shl-of-zext.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/test/Transforms/InstCombine/smin-icmp.ll
M llvm/test/Transforms/InstCombine/sqrt.ll
M llvm/test/Transforms/InstCombine/ssub-with-overflow.ll
M llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-lshr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible.ll
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M llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
M llvm/test/Transforms/InstCombine/trunc-demand.ll
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M llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
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M llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
M llvm/test/Transforms/InstCombine/uaddo.ll
M llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll
M llvm/test/Transforms/InstCombine/umin_cttz_ctlz.ll
M llvm/test/Transforms/InstCombine/unfold-masked-merge-with-const-mask-vector.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-mul-udiv.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/unsigned_saturated_sub.ll
M llvm/test/Transforms/InstCombine/variable-signext-of-variable-high-bit-extraction.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
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M llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract.ll
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M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll
M llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
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M llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll
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M llvm/test/Transforms/InstCombine/vector-udiv.ll
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M llvm/test/Transforms/InstCombine/xor-ashr.ll
M llvm/test/Transforms/InstCombine/xor-icmps.ll
M llvm/test/Transforms/InstCombine/xor-of-or.ll
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M llvm/test/Transforms/InstCombine/xor2.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/InstCombine/zext.ll
M llvm/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
M llvm/test/Transforms/InstSimplify/ConstProp/ARM/mve-vctp.ll
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
M llvm/test/Transforms/InstSimplify/ConstProp/bitcast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/cast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
M llvm/test/Transforms/InstSimplify/abs_intrinsic.ll
M llvm/test/Transforms/InstSimplify/add_vp.ll
M llvm/test/Transforms/InstSimplify/addsub.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/InstSimplify/bitreverse-fold.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/InstSimplify/canonicalize.ll
M llvm/test/Transforms/InstSimplify/cast-unsigned-icmp-cmp-0.ll
M llvm/test/Transforms/InstSimplify/cmp-vec-fast-path.ll
M llvm/test/Transforms/InstSimplify/compare.ll
M llvm/test/Transforms/InstSimplify/constantfold-add-nuw-allones-to-allones.ll
M llvm/test/Transforms/InstSimplify/constantfold-shl-nuw-C-to-C.ll
M llvm/test/Transforms/InstSimplify/ctpop-pow2.ll
M llvm/test/Transforms/InstSimplify/div.ll
M llvm/test/Transforms/InstSimplify/exp10.ll
M llvm/test/Transforms/InstSimplify/fast-math-strictfp.ll
M llvm/test/Transforms/InstSimplify/fast-math.ll
M llvm/test/Transforms/InstSimplify/fdiv.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic-strictfp.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic.ll
M llvm/test/Transforms/InstSimplify/floating-point-compare.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/fptoi-range.ll
M llvm/test/Transforms/InstSimplify/frexp.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/icmp-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp.ll
M llvm/test/Transforms/InstSimplify/implies.ll
M llvm/test/Transforms/InstSimplify/insertelement.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-non-zero.ll
M llvm/test/Transforms/InstSimplify/maxmin_intrinsics.ll
M llvm/test/Transforms/InstSimplify/negate.ll
M llvm/test/Transforms/InstSimplify/or-icmps-same-ops.ll
M llvm/test/Transforms/InstSimplify/or.ll
M llvm/test/Transforms/InstSimplify/pr28725.ll
M llvm/test/Transforms/InstSimplify/ptrmask.ll
M llvm/test/Transforms/InstSimplify/rem.ll
M llvm/test/Transforms/InstSimplify/returned.ll
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/sdiv.ll
M llvm/test/Transforms/InstSimplify/select-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/select-logical.ll
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M llvm/test/Transforms/InstSimplify/select_or_and.ll
M llvm/test/Transforms/InstSimplify/shift-knownbits.ll
M llvm/test/Transforms/InstSimplify/shift.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
M llvm/test/Transforms/InstSimplify/shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/shufflevector.ll
M llvm/test/Transforms/InstSimplify/strictfp-fadd.ll
M llvm/test/Transforms/InstSimplify/uscmp.ll
M llvm/test/Transforms/InstSimplify/vec-cmp.ll
M llvm/test/Transforms/InstSimplify/vec-icmp-of-cast.ll
M llvm/test/Transforms/InstSimplify/vector_gep.ll
M llvm/test/Transforms/InstSimplify/xor.ll
M llvm/test/Transforms/InterleavedAccess/X86/interleave-load-extract-shuffle-changes.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch-opaque-ptr.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch.ll
M llvm/test/Transforms/LoopUnroll/ARM/mve-upperbound.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors-inseltpoison.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/streaming-compatible-sve-no-maximize-bandwidth.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/vplan-native-inner-loop-only.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-not-when-safe.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/induction_plus.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/preserve-or-disjoint.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-int-row-major.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-add-sub-double-row-major.ll
M llvm/test/Transforms/MemCpyOpt/form-memset.ll
M llvm/test/Transforms/NewGVN/completeness.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/predicated-reduction.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr50555.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr88239.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vec-shift.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
M llvm/test/Transforms/Reassociate/fast-ReassociateVector.ll
M llvm/test/Transforms/Reassociate/negation.ll
M llvm/test/Transforms/Reassociate/xor_reassoc.ll
M llvm/test/Transforms/RewriteStatepointsForGC/vector-nonlive-clobber.ll
M llvm/test/Transforms/SCCP/add-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/intrinsics.ll
M llvm/test/Transforms/SCCP/ip-ranges-casts.ll
M llvm/test/Transforms/SCCP/overdefined-ext.ll
M llvm/test/Transforms/SCCP/trunc-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/vector-bitcast.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/external-use-icmp.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-root.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/sdiv-pow2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec15-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-min-max.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/widen.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/floating-point.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/getpointerschaincost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/minbw-with-and-and-scalar-trunc.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/phi-const.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduction-extension-after-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/scatter-vectorize-reversed.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-stores-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-bv-multi-uses.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-to-large-than-bw.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-node-trunc-with-signed-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec15-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-not-resized-op-resized.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_2.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-and-const-load.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-div.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_sel.ll
M llvm/test/Transforms/SLPVectorizer/X86/combined-stores-chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_smallpt.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-counter.ll
M llvm/test/Transforms/SLPVectorizer/X86/different-vec-widths.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/external_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep-nodes-with-non-gep-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep.ll
M llvm/test/Transforms/SLPVectorizer/X86/geps-non-pow-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/long_chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-gather-nodes-phi-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/mul64.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi3.ll
M llvm/test/Transforms/SLPVectorizer/X86/powof2div.ll
M llvm/test/Transforms/SLPVectorizer/X86/powof2mul.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr23510.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49933.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-bool-logic-op-inside.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_gather-load-redux-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-scalars-in-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder-non-empty.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/simple-loop.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-minbitwidth-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2_unord_geps.ll
M llvm/test/Transforms/SLPVectorizer/X86/stackrestore-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/stores_vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/unreachable.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/abs-overflow-incorrect-minbws.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
M llvm/test/Transforms/SLPVectorizer/freeze-signedness-missed.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/operand-is-reduced-val.ll
M llvm/test/Transforms/SLPVectorizer/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reduction_loads.ll
M llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
M llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-fix-109835.ll
M llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
M llvm/test/Transforms/SROA/tbaa-struct3.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-store.ll
M llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-select.ll
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
M llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/AArch64/vecreduce-shuffle.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization-shufflevector-splat.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
M llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll
M llvm/test/Transforms/VectorCombine/X86/scalarize-cmp.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle.ll
M llvm/test/tools/llvm-reduce/reduce-opcodes.ll
M llvm/test/tools/llvm-reduce/reduce-operands-fp.ll
M llvm/test/tools/llvm-reduce/reduce-operands-int.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
Commit: e3a0775651190a23d8234615b9fdadd81c1c24bc
https://github.com/llvm/llvm-project/commit/e3a0775651190a23d8234615b9fdadd81c1c24bc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/extract-cmp-binop.ll
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] foldExtractedCmps - (re-)enable fold on non-commutative binops
#114901 exposed that foldExtractedCmps didn't account for non-commutative binops, and were disabled by 05e838f428555bcc4507bd37912da60ea9110ef6
This patch re-enables support for non-commutative binops by ensuring that the LHS/RHS arg order of the binop is retained.
Commit: f1f5220958eb02a7ca4aa21cb95df4746e91bc3b
https://github.com/llvm/llvm-project/commit/f1f5220958eb02a7ca4aa21cb95df4746e91bc3b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/clocale
M libcxx/include/cstdint
Log Message:
-----------
[libc++] Only include the system <stdint.h> and <locale.h> if they exist (#115017)
Prior to aa7f377c96, we only did an #include_next of those system
headers if they existed. After removing those headers from libc++, we
started assuming that the system provided the headers because we
unconditionally started including them. This patch fixes that.
Commit: 28452acac05de8dc64aa7ba76af70ac541667cdd
https://github.com/llvm/llvm-project/commit/28452acac05de8dc64aa7ba76af70ac541667cdd
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] delayed privatisation for TASK (#114785)
This uses essentially an identical implementation to that used for
ParallelOp. The private variable allocation and deallocation use shared
functions to avoid code duplication. FIRSTPRIVATE variable copying uses
duplicated code for now because I anticipate the implementation
diverging in the near future once I store data for firstprivate
variables in the task description structure.
After enabling delayed privatisation for TASK in flang, one more test in
the fujitsu test suite passes (I haven't looked into why).
Commit: 88e9b373c0d7184b08c755024cce0778d18f0306
https://github.com/llvm/llvm-project/commit/88e9b373c0d7184b08c755024cce0778d18f0306
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
A llvm/test/Transforms/FunctionSpecialization/solver-constants.ll
A llvm/test/Transforms/FunctionSpecialization/solver-dead-blocks.ll
Log Message:
-----------
[FuncSpec] Query SCCPSolver in more places (#114964)
When traversing the use-def chain of an Argument in a candidate
specialization, also query the SCCPSolver to see if a Value is constant.
This allows us to better estimate the codesize savings of a candidate in
the presence of instructions that are a user of the argument we are
estimating savings for which also use arguments that have been found
constant by IPSCCP.
Similarly when estimating the dead basic blocks from branch and switch
instructions which become constant, also query the SCCPSolver to see if
a predecessor is unreachable.
Commit: 246b57cb2086b22ad8b41051c77e86ef478053a1
https://github.com/llvm/llvm-project/commit/246b57cb2086b22ad8b41051c77e86ef478053a1
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/test/Lower/PowerPC/ppc-vec-cmp.f90
M flang/test/Lower/PowerPC/ppc-vec-convert.f90
M flang/test/Lower/PowerPC/ppc-vec-perm.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-shift.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
Log Message:
-----------
Fix tests in flang/test/Lower/PowerPC after splat change.
Commit: 79f4d8f0145d72dff8c33745f35d45c74ecb3fdf
https://github.com/llvm/llvm-project/commit/79f4d8f0145d72dff8c33745f35d45c74ecb3fdf
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/AST/DeclTemplate.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/AST/ast-dump-decl.cpp
R clang/test/ASTMerge/class-template-spec/Inputs/class-template-spec.cpp
R clang/test/ASTMerge/class-template-spec/test.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Always use latest redeclaration of primary template" (#114569)" (#115156)
This reverts commit b24650e814e55d90acfc40acf045456c98f32b9c.
Commit: 2904f809cd1bf2651d6eceb2ad86553f407bf530
https://github.com/llvm/llvm-project/commit/2904f809cd1bf2651d6eceb2ad86553f407bf530
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
Log Message:
-----------
Revert "[Clang][Sema] Use the correct injected template arguments for partial specializations when collecting multi-level template argument lists (#112381)" (#115157)
This reverts commit 9381c6fd04cc16a7606633f57c96c11e58181ddb.
Commit: fbd89bcc6647ed611e579d8f9c38c97b8e6f7936
https://github.com/llvm/llvm-project/commit/fbd89bcc6647ed611e579d8f9c38c97b8e6f7936
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Transforms/PhaseOrdering/lto-argpromotion-ipsccp.ll
Log Message:
-----------
Reland "[LTO] Run Argument Promotion before IPSCCP" (#111853)
Run ArgumentPromotion before IPSCCP in the LTO pipeline, to expose more
constants to be propagated. We also run PostOrderFunctionAttrs to
improve the information available to ArgumentPromotion's alias analysis,
and SROA to clean up allocas.
Relands #111163.
Commit: 44ab3805b5a4a1f37e186e79b83c5cdc838312ed
https://github.com/llvm/llvm-project/commit/44ab3805b5a4a1f37e186e79b83c5cdc838312ed
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
R clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
R clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/Modules/cxx-templates.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Refactor collection of multi-level template argument lists (#106585, #111173)" (#111852)" (#115159)
This reverts commit 2bb3d3a3f32ffaef3d9b6a27db7f1941f0cb1136.
Commit: 2f743ac52e945e155ff3cb1f8ca5287b306b831e
https://github.com/llvm/llvm-project/commit/2f743ac52e945e155ff3cb1f8ca5287b306b831e
Author: Ilya Enkovich <ilya.enkovich at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/AMX/AMX.td
M mlir/include/mlir/Dialect/AMX/AMXDialect.h
M mlir/include/mlir/Dialect/AMX/Transforms.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/AMX/IR/AMXDialect.cpp
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
M mlir/test/Dialect/AMX/invalid.mlir
M mlir/test/Dialect/AMX/legalize-for-llvm.mlir
M mlir/test/Dialect/AMX/roundtrip.mlir
Log Message:
-----------
[MLIR] [AMX] Utilize x86_amx type for AMX dialect in MLIR. (#111197)
This patch is intended to resolve #109481 and improve the usability of
the AMX dialect.
In LLVM IR, AMX intrinsics use `x86_amx` which is one of the primitive
types. This type is supposed to be used for AMX intrinsic calls and no
other operations. AMX dialect of MLIR uses regular 2D vector types,
which are then lowered to arrays of vectors in the LLVMIR dialect. This
creates an inconsistency in the types used in the LLVMIR dialect and
LLVMIR. Translation of AMX intrinsic calls to LLVM IR doesn't require
result types to match and that is where tile loads and mul operation
results get `x86_amx` type. This works in very simple cases when mul and
tile store operations directly consume the result of another AMX
intrinsic call, but it doesn't work when an argument is a block argument
(phi node).
In addition to translation problems, this inconsistency between types
used in MLIR and LLVM IR makes MLIR verification and transformation
quite problematic. Both `amx.tileload` and `vector::transfer_read` can
load values of the same type, but only one of them can be used in AMX
operations. In general, by looking at a type of value, we cannot
determine if it can only be used for AMX operations or contrary can be
used in other operations but AMX ones.
To remove this inconsistency and make AMX operations more explicit in
their limitations, I propose to add `LLVMX86AMXType` type to the LLVMIR
dialect to match `x86_amx` type in LLVM IR, and introduce
`amx::TileType` to be used by AMX operations in MLIR. This resolves
translation problems for AMX usage with phi nodes and provides proper
type verification in MLIR for AMX operations.
P.S. This patch also adds missing FP16 support. It's trivial but
unrelated to type system changes, so let me know if I should submit it
separately.
---------
Signed-off-by: Ilya Enkovich <ilya.enkovich at intel.com>
Commit: 9b016e3cb2859ef06f0301ebbc48df294b2356dc
https://github.com/llvm/llvm-project/commit/9b016e3cb2859ef06f0301ebbc48df294b2356dc
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/test/CodeGen/Thumb2/mve-vcmla.ll
Log Message:
-----------
[ARM] Add early-clobber to MVE VCMLA.f32 (#114995)
This instruction (but not the f16 variant) cannot us the same register
for the output as either of the inputs, so it needs to be marked as
early-clobber.
Commit: 5d8be4c036aa5ce4a94f1f37a9155d5c877e23db
https://github.com/llvm/llvm-project/commit/5d8be4c036aa5ce4a94f1f37a9155d5c877e23db
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/apple.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_defaults.h
M libcxx/include/__locale_dir/locale_base_api/freebsd.h
M libcxx/include/locale
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Define an internal locale API as a shim on top of the current one (#114596)
Our current locale base API is a mix of non-reserved system names that
we incorrectly (re)define and internal functions and macros starting
with __libcpp. This patch introduces a function-based internal interface
to isolate the rest of the code base from that mess, so that we can work
on refactoring how each platform implements the base API in subsequent
patches. This makes it possible to refactor how each platform implements
the base localization API without impacting the rest of the code base.
Commit: 86e4beb702fde407a35938a1c37279a61c0291e7
https://github.com/llvm/llvm-project/commit/86e4beb702fde407a35938a1c37279a61c0291e7
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/Mips.h
M clang/test/CodeGen/target-data.c
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
A llvm/test/CodeGen/Mips/data-layout.ll
M llvm/test/CodeGen/Mips/implicit-sret.ll
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (#112084)
Fix parts of #102783.
Commit: f61a8bc305d60f1ab04225e2b210d8b3d9c97eb8
https://github.com/llvm/llvm-project/commit/f61a8bc305d60f1ab04225e2b210d8b3d9c97eb8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CodeGen/X86/builtin_test_helpers.h
Log Message:
-----------
[clang][x86] Prevent signed/unsigned comparison warnings on constexpr m128i/m256i/m512i match helpers.
These matches are here to help match hex patterns so consistently match with unsigned uint64_t types
Commit: 7585e2fd3caee30d5332c93995b7a6f51ab06660
https://github.com/llvm/llvm-project/commit/7585e2fd3caee30d5332c93995b7a6f51ab06660
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_movepi64_pi64 and _mm_move_epi64
Commit: fb90733e196039b0a77f43af98c42c9267a31e07
https://github.com/llvm/llvm-project/commit/fb90733e196039b0a77f43af98c42c9267a31e07
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
A clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/firstbithigh.ll
A llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
A llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
Log Message:
-----------
[HLSL] implement elementwise firstbithigh hlsl builtin (#111082)
Implements elementwise firstbithigh hlsl builtin.
Implements firstbituhigh intrinsic for spirv and directx, which handles
unsigned integers
Implements firstbitshigh intrinsic for spirv and directx, which handles
signed integers.
Fixes #113486
Closes #99115
Commit: b5d8a03de453b79ca3c0bf841931bcaacf2fc830
https://github.com/llvm/llvm-project/commit/b5d8a03de453b79ca3c0bf841931bcaacf2fc830
Author: Rin Dobrescu <irina.dobrescu at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
Log Message:
-----------
[AArch64] Add missing ASIMD FP convert instructions to scheduling model (#115146)
Some ASIMD FP convert instructions have incorrect scheduling
information. These instructions currently have latency 2, throughput 4
and utilise pipeline V. This patch corrects the scheduling models to
match the relevant Software Optimization Guide.
The V1 and V2 Software Optimization Guide show that ASIMD FP convert
instructions should all utilise pipelines V02. Their execution latency
and throughput should also differ depending on form. See section 3.17
"ASIMD floating-point instructions" in the Neoverse-V1 and Neoverse-V2
Software Optimization Guide for characteristics of instruction
performance.
Reference:
- V1 SOG: https://developer.arm.com/documentation/109897/latest/
- V2 SOG: https://developer.arm.com/documentation/109898/latest/
Commit: 8699f301ae70ce402618c061b6c45a99e31c5f5e
https://github.com/llvm/llvm-project/commit/8699f301ae70ce402618c061b6c45a99e31c5f5e
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Add more socket interceptors (#115020)
Adds getaddrinfo, getnameinfo, bind, listen, accept and connect
Commit: 76422385c3081475ed1bf0e23aa2f3913e66c5b8
https://github.com/llvm/llvm-project/commit/76422385c3081475ed1bf0e23aa2f3913e66c5b8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
Log Message:
-----------
[SLP]Support reordered buildvector nodes for better clustering
Patch adds reordering of the buildvector nodes for better clustering of
the compatible operations and future vectorization. Includes basic cost
estimation and if the transformation is not profitable - reverts it.
AVX512, -O3+LTO
Metric: size..text
Program size..text
results results0 diff
test-suite :: External/SPEC/CINT2006/401.bzip2/401.bzip2.test 74565.00 75701.00 1.5%
test-suite :: External/SPEC/CINT2017rate/541.leela_r/541.leela_r.test 75773.00 76397.00 0.8%
test-suite :: External/SPEC/CINT2017speed/641.leela_s/641.leela_s.test 75773.00 76397.00 0.8%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2014462.00 2024494.00 0.5%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 395219.00 396979.00 0.4%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 857795.00 859667.00 0.2%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 800472.00 802440.00 0.2%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 590699.00 591403.00 0.1%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 203006.00 203102.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 42408.00 42424.00 0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12451575.00 12451927.00 0.0%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1396480.00 1396448.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1396480.00 1396448.00 -0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 1047708.00 1047580.00 -0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-jpeg/consumer-jpeg.test 111344.00 111328.00 -0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 1087660.00 1087500.00 -0.0%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 280664.00 280616.00 -0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 502646.00 502006.00 -0.1%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1033135.00 1031567.00 -0.2%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 2070917.00 2065845.00 -0.2%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 2070917.00 2065845.00 -0.2%
test-suite :: External/SPEC/CINT2006/473.astar/473.astar.test 33893.00 33797.00 -0.3%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39677.00 39549.00 -0.3%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39674.00 39546.00 -0.3%
test-suite :: MultiSource/Benchmarks/MiBench/security-blowfish/security-blowfish.test 11560.00 11512.00 -0.4%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 653867.00 649275.00 -0.7%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 653867.00 649275.00 -0.7%
CINT2006/401.bzip2 - extra code vectorized
CINT2017rate/541.leela_r
CINT2017speed/641.leela_s - function
_ZN9FastBoard25get_pattern3_augment_specEiib not inlined anymore, better
vectorization
CFP2017rate/510.parest_r - better vectorization
JM/ldecod - better vectorization
JM/lencod - same
CINT2006/464.h264ref - extra code vectorized
CFP2006/447.dealII - extra vector code
MiBench/consumer-lame - vectorized 2 loops previously scalar
DOE-ProxyApps-C/miniGMG - small changes
Benchmarks/7zip - extra code vectorized, better vectorization
CFP2017rate/526.blender_r - extra vectorization
CFP2017speed/638.imagick_s
CFP2017rate/538.imagick_r - extra vectorization
MiBench/consumer-jpeg - extra vectorization
CINT2006/400.perlbench - extra vectorization
Prolangs-C/TimberWolfMC - small variations
Applications/sqlite3 - extra function vectorized and inlined
Benchmarks/tramp3d-v4 - extra code vectorized
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - extra code vectorized, function digcpy gets
vectorized and inlined
CINT2006/473.astar - extra code vectorized
MiBench/telecomm-gsm - extra code vectorized, better vector code
mediabench/gsm - same
MiBench/security-blowfish - extra code vectorized
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - sub4x4_dct function vectorized and gets
inlined
RISCV-V, SiFive-p670, O3+LTO
CFP2017rate/510.parest_r - extra vectorization
CFP2017rate/526.blender_r - extra vectorization
MiBench/consumer-lame - extra vectorized code
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/114284
Commit: c10d4b492d981c96fa3269bc0fe0b3ea9b1ca486
https://github.com/llvm/llvm-project/commit/c10d4b492d981c96fa3269bc0fe0b3ea9b1ca486
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/AST/SYCLKernelInfo.h
Log Message:
-----------
[clang][SYCL] Add a missing include to make the header standalone
Commit: f548d39c3c751446d124c08769080214680d53ba
https://github.com/llvm/llvm-project/commit/f548d39c3c751446d124c08769080214680d53ba
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
Log Message:
-----------
[Clang][Test] Update test after #115159 (#115172)
After #111852 was reverted in #115159, two tests now fail because they
partially depend on its changes. This patch temporarily fixes the
failing cases by updating the expected output to match the actual
output. Once #111852 is relanded, this can be reverted.
Commit: 3aa2f63822c0d829c875aa41ca2fd0103939dfaf
https://github.com/llvm/llvm-project/commit/3aa2f63822c0d829c875aa41ca2fd0103939dfaf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_castps_pd/_mm_castps_si128/_mm_castsi128_pd/_mm_castsi128_ps intrinsics
Commit: f74aed793819bf9e0509e802f33c5e29c350540c
https://github.com/llvm/llvm-project/commit/f74aed793819bf9e0509e802f33c5e29c350540c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/AArch64/trunc-nsw-nuw.ll
A llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
A llvm/test/CodeGen/X86/trunc-nsw-nuw.ll
Log Message:
-----------
[DAGCombiner] Add basic support for `trunc nsw/nuw` (#113808)
This patch adds basic support for `trunc nsw/nuw` in SDAG. It will allow
DAGCombiner to further eliminate in-reg `zext/sext` instructions.
Commit: 201d7607f87afff999b1257d27569a3053b85143
https://github.com/llvm/llvm-project/commit/201d7607f87afff999b1257d27569a3053b85143
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Add context-aware diagnostic functions (#112319)
The current diagnostic functions log/warn/error/fatal lack a context
argument and call the global `lld::errorHandler()`, which prevents
multiple lld instances in one process.
This patch introduces context-aware replacements:
* log => Log(ctx)
* warn => Warn(ctx)
* errorOrWarn => Err(ctx)
* error => ErrAlways(ctx)
* fatal => Fatal(ctx)
Example: `errorOrWarn(toString(f) + "xxx")` => `Err(ctx) << f << "xxx"`.
(`toString(f)` is shortened to `f` as a bonus and may access `ctx`
without accessing the global variable (see `Target.cpp`)).
`ctx.e = &context->e;` can be replaced with a non-global Errorhandler
when `ctx` becomes a local variable.
(For the ELF port, the long term goal is to eliminate `error`. Most can
be straightforwardly converted to `Err(ctx)`.)
Commit: 83f92c33a4b4bd703882e7e9bb2c5efd15042b96
https://github.com/llvm/llvm-project/commit/83f92c33a4b4bd703882e7e9bb2c5efd15042b96
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
Log Message:
-----------
[RISCV] fix SP recovery in varargs functions (#114316)
This patch fixes sp recovery in the epilogue in varargs functions when
fp register is presented and second sp adjustment is applied.
Source of the issue: https://github.com/llvm/llvm-project/pull/110809
Commit: 9f3b6adb1508a714dc12aa020a20d813d9ab9f42
https://github.com/llvm/llvm-project/commit/9f3b6adb1508a714dc12aa020a20d813d9ab9f42
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Exit early if the graph is empty, NFC
No need to check anything if the graph is empty, just exit early.
Commit: 6219c8083904b49d09f466b703ca47891f978278
https://github.com/llvm/llvm-project/commit/6219c8083904b49d09f466b703ca47891f978278
Author: Duncan <duncpro at icloud.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/newhdrgen/yaml/unistd.yaml
M libc/spec/linux.td
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/pipe2.cpp
A libc/src/unistd/pipe2.h
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/pipe2_test.cpp
Log Message:
-----------
[libc] [unistd] implement pipe2 syscall wrapper (#114474)
Closes #85289
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: b7ee03ffb8696c4d81a5a97c61cb2149c17e6573
https://github.com/llvm/llvm-project/commit/b7ee03ffb8696c4d81a5a97c61cb2149c17e6573
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.cpp
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.h
Log Message:
-----------
[clang-include-fixer] Use heterogenous lookups with std::map (NFC) (#115113)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: c4dfa03f9f44fa183daabdd4e6d760a432ef6531
https://github.com/llvm/llvm-project/commit/c4dfa03f9f44fa183daabdd4e6d760a432ef6531
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
Log Message:
-----------
[clang-tidy] Call StringMap::find without constructing std::string (NFC) (#115114)
StringMap::find takes StringRef, so we don't need to allocate
temporary instances of std::string.
Commit: 18d2539ce674c1eabac187403257ae53ed2ee264
https://github.com/llvm/llvm-project/commit/18d2539ce674c1eabac187403257ae53ed2ee264
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
Log Message:
-----------
[StaticAnalyzer] Simplify code with DenseMap::operator[] (NFC) (#115116)
Commit: 4d12a14357b136e996f8789786f1b76348b5582b
https://github.com/llvm/llvm-project/commit/4d12a14357b136e996f8789786f1b76348b5582b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/KCFI.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
Log Message:
-----------
[Instrumentation] Remove unused includes (NFC) (#115117)
Identified with misc-include-cleaner.
Commit: 57ab62a2aa80911391fd9ea49573b39e7e9aa0f0
https://github.com/llvm/llvm-project/commit/57ab62a2aa80911391fd9ea49573b39e7e9aa0f0
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
Log Message:
-----------
[flang] Add FIR AliasAnalysis alias() wrapper to allow external getSource() method (#115073)
Adding a wrapper around alias(mlir::Value lhs, mlir::Value rhs) to allow
user to provide Source objects.
Commit: efe87fbc9d52952dc7ee89579347cbf49ecfa609
https://github.com/llvm/llvm-project/commit/efe87fbc9d52952dc7ee89579347cbf49ecfa609
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (#114144)
Commit: 5dc8d61177225a86266beeedf09baa847f97edf0
https://github.com/llvm/llvm-project/commit/5dc8d61177225a86266beeedf09baa847f97edf0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Implement zexti32/zexti16 ComplexPatterns. (#115097)
Commit: 29e467fc78eb8b4308b57272ca4ad0d1f744f25f
https://github.com/llvm/llvm-project/commit/29e467fc78eb8b4308b57272ca4ad0d1f744f25f
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Type.h
Log Message:
-----------
[llvm] Deprecate Type::getPointerTo() (#113331)
`llvm::Type::getPointerTo()` is no longer needed with opaque pointers in LLVM.
It may rather confuse new contributors to think that LLVM has typed pointers.
Commit: aa7941289ee5b7d9bdf47e1b0ebf2130a86d9522
https://github.com/llvm/llvm-project/commit/aa7941289ee5b7d9bdf47e1b0ebf2130a86d9522
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
Log Message:
-----------
AMDGPU: Fold copy of scalar add of frame index (#115058)
This is a pre-optimization to avoid a regression in a future
commit. Currently we almost always emit frame index with
a v_mov_b32 and use vector adds for the pointer operations. We
need to consider the users of the frame index (or rather, the
transitive users of derived pointer operations) to know whether
the value will be used in a vector or scalar context. This saves
an sgpr->vgpr copy.
This optimization could be more general for any opcode that's
trivially convertible from a scalar to vector form (although this
is a workaround for a proper regbankselect).
Commit: 3b0f506c87cf7cf32604c9592aeca3ede0e1f79e
https://github.com/llvm/llvm-project/commit/3b0f506c87cf7cf32604c9592aeca3ede0e1f79e
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
Log Message:
-----------
[AMDGPU] Support `nuw` and `nusw` in buffer fat pointer lowering (#115039)
This commit usis the `nuw` flag on `getelemnetptr` to set the `nuw` flag
on buffer offset additions, and also moves from `inbounds` to the looser
`nusw` for the existing case.
Commit: 270f7cf68ae64a42d7112c0319f33a1d913e6333
https://github.com/llvm/llvm-project/commit/270f7cf68ae64a42d7112c0319f33a1d913e6333
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP][Docs] Update OpenMP supported features table (#115106)
OpenMP features table: added 'allocator' modifier for 'allocate' clause
as a completed feature in OpenMP 5.1 Implementation Details.
Commit: 8dd9f206b518a97132f3e2489ccc93704e638353
https://github.com/llvm/llvm-project/commit/8dd9f206b518a97132f3e2489ccc93704e638353
Author: Pranav Kant <prka at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix mlir:VectorToSPIRV (#115188)
Commit: 4d4024e1edf354113e8d0d11661d466ae5b0bee7
https://github.com/llvm/llvm-project/commit/4d4024e1edf354113e8d0d11661d466ae5b0bee7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lldb/test/API/lit.cfg.py
M lldb/test/Shell/lit.cfg.py
M lldb/test/Unit/lit.cfg.py
M lldb/test/Unit/lit.site.cfg.py.in
Log Message:
-----------
[lldb] Set MallocNanoZone for all sanitizers when running tests
Disabling MallocNanoZone is necessary for both ASan and TSan.
Commit: 38cc03f78e3046837d8fc29d729bc2cee0c31e89
https://github.com/llvm/llvm-project/commit/38cc03f78e3046837d8fc29d729bc2cee0c31e89
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Restore whole-archive state when `-fjmc` (#115181)
`--whole-archive` is passed to the linker to have it consume all objects
within the SIE Just My Code library, rather than just those that fulfil
outstanding references.
Prior to this change, `--no-whole-archive` was used to reset the
associated archive handling state in the linker, under the assumption
that `--whole-archive` wasn't already in effect. But that assumption may
be incorrect. So use `--push/pop-state` to restore the previous state,
whatever that may be.
Given the position of these switches on the link line, the problem
described with the outgoing code is unlikely to cause an issue in
practice. But push/pop protect against accidents due to future additions
to and reorderings of arguments.
PS5 only. The proprietary PS4 linker doesn't support `--push/pop-state`,
or an equivalent.
SIE tracker: TOOLCHAIN-16704.
Commit: 5a6cc509215b62e94de3b798ea26944a375ce6cb
https://github.com/llvm/llvm-project/commit/5a6cc509215b62e94de3b798ea26944a375ce6cb
Author: Jingyu Qiu <51221277+SoftJing1 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/newhdrgen/yaml/sys/mman.yaml
M libc/spec/linux.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mremap.cpp
A libc/src/sys/mman/mremap.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/mremap_test.cpp
Log Message:
-----------
[libc] add mremap (#112804)
Commit: 39f2bae2407e08176a453c7c7e6f4888bbf28a4e
https://github.com/llvm/llvm-project/commit/39f2bae2407e08176a453c7c7e6f4888bbf28a4e
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
A clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
Log Message:
-----------
[HLSL] Add RasterizerOrderedStructuredBuffer definition to HLSLExternalSemaSource (#113648)
Adds `RasterizerOrderedStructuredBuffer` definition to
HLSLExternalSemaSource. Adds separate tests for the AST shape and
element types. Adds constructor/handle.fromBinding and subscript test
cases to shared test file for structured buffers. Additional methods
will be added later.
Fixes #112776
Commit: aae5a38e4e5121e340541794404eb62f26e66bf0
https://github.com/llvm/llvm-project/commit/aae5a38e4e5121e340541794404eb62f26e66bf0
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Mark socket functions weak (#115088)
Downstream ther'es a user that needs the syscall wrappers to be weak. I
intend to set up a proper mechanism for just listing which functions
should be weak eventually, but for now this is necessary.
Commit: cb90d5b3ef463f0a471f9c6d39978c3764021dea
https://github.com/llvm/llvm-project/commit/cb90d5b3ef463f0a471f9c6d39978c3764021dea
Author: Evan Wilde <ewilde at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M cmake/Modules/CMakePolicy.cmake
Log Message:
-----------
[CMake] Enable CMP0156 if available (#115046)
Some linkers do not require that libraries are repeated on the command
line. The Apple linker emits warnings when duplicate libraries are
specified, resulting in a wall of warnings.
CMP0156 deduplicates libraries on the command line when the linker
doesn't require them.
This patch enables CMP0156 to quiet the warnings when using a version of
CMake that recognizes it (CMake 3.29 and newer).
Commit: 712c90e479f975f2e0c5ed4554dbf2f3a7a6d9d6
https://github.com/llvm/llvm-project/commit/712c90e479f975f2e0c5ed4554dbf2f3a7a6d9d6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_cvtsi64_sd
Commit: 6ccbf1da6c9225fddaf6911e7bb49ee011e845a6
https://github.com/llvm/llvm-project/commit/6ccbf1da6c9225fddaf6911e7bb49ee011e845a6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineSelect - use SelectableOp helper to match the zero operand as well as the target shuffle
For the "select(mask, extract_subvector(shuffle(x)), zero) --> extract_subvector(select(insert_subvector(mask), shuffle(x), zero))" fold, match the zero operand inside the SelectableOp helper.
Prep work for #113400 - we will be able to relax the zero operand requirement for some target shuffles.
Commit: ffc2233395f0b1a3a0c277d196bb0a0ccae84ab7
https://github.com/llvm/llvm-project/commit/ffc2233395f0b1a3a0c277d196bb0a0ccae84ab7
Author: Amara Emerson <amara at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
Log Message:
-----------
[AArch64][SVE2] Add pattern for constructive EXT instruction. (#115047)
rdar://137214338
Commit: 8c752900dda82115ebb8231e6d5ac703e703547e
https://github.com/llvm/llvm-project/commit/8c752900dda82115ebb8231e6d5ac703e703547e
Author: Gang Chen <gangc at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/Assembler/target-type-param-errors.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
A llvm/test/CodeGen/AMDGPU/s-barrier.ll
Log Message:
-----------
[AMDGPU] modify named barrier builtins and intrinsics (#114550)
Use a local pointer type to represent the named barrier in builtin and
intrinsic. This makes the definitions more user friendly
bacause they do not need to worry about the hardware ID assignment. Also
this approach is more like the other popular GPU programming language.
Named barriers should be represented as global variables of addrspace(3)
in LLVM-IR. Compiler assigns the special LDS offsets for those variables
during AMDGPULowerModuleLDS pass. Those addresses are converted to hw
barrier ID during instruction selection. The rest of the
instruction-selection changes are primarily due to the
intrinsic-definition changes.
Commit: cff2199e0f0e54177997ecf9571ba874231cefe4
https://github.com/llvm/llvm-project/commit/cff2199e0f0e54177997ecf9571ba874231cefe4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-narrow-binop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
Log Message:
-----------
Revert "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"
This reverts commit 999dfb2067eb75609b735944af876279025ac171.
I received a report that his may have increased fallbacks on AArch64.
Commit: b231647475b7fa78ad9382a5505889f1167e9cea
https://github.com/llvm/llvm-project/commit/b231647475b7fa78ad9382a5505889f1167e9cea
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A libclc/clc/include/clc/clc_as_type.h
M libclc/clc/include/clc/internal/clc.h
A libclc/clc/include/clc/relational/binary_decl.inc
A libclc/clc/include/clc/relational/clc_all.h
A libclc/clc/include/clc/relational/clc_any.h
A libclc/clc/include/clc/relational/clc_bitselect.h
A libclc/clc/include/clc/relational/clc_bitselect.inc
A libclc/clc/include/clc/relational/clc_isequal.h
A libclc/clc/include/clc/relational/clc_isfinite.h
A libclc/clc/include/clc/relational/clc_isgreater.h
A libclc/clc/include/clc/relational/clc_isgreaterequal.h
A libclc/clc/include/clc/relational/clc_isinf.h
A libclc/clc/include/clc/relational/clc_isless.h
A libclc/clc/include/clc/relational/clc_islessequal.h
A libclc/clc/include/clc/relational/clc_islessgreater.h
A libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/relational/clc_isnormal.h
A libclc/clc/include/clc/relational/clc_isnotequal.h
A libclc/clc/include/clc/relational/clc_isordered.h
A libclc/clc/include/clc/relational/clc_isunordered.h
A libclc/clc/include/clc/relational/clc_select.h
A libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_signbit.h
A libclc/clc/include/clc/relational/floatn.inc
A libclc/clc/include/clc/relational/relational.h
A libclc/clc/include/clc/relational/unary_decl.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/relational/clc_all.cl
A libclc/clc/lib/generic/relational/clc_any.cl
A libclc/clc/lib/generic/relational/clc_bitselect.cl
A libclc/clc/lib/generic/relational/clc_bitselect.inc
A libclc/clc/lib/generic/relational/clc_isequal.cl
A libclc/clc/lib/generic/relational/clc_isfinite.cl
A libclc/clc/lib/generic/relational/clc_isgreater.cl
A libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
A libclc/clc/lib/generic/relational/clc_isinf.cl
A libclc/clc/lib/generic/relational/clc_isless.cl
A libclc/clc/lib/generic/relational/clc_islessequal.cl
A libclc/clc/lib/generic/relational/clc_islessgreater.cl
A libclc/clc/lib/generic/relational/clc_isnan.cl
A libclc/clc/lib/generic/relational/clc_isnormal.cl
A libclc/clc/lib/generic/relational/clc_isnotequal.cl
A libclc/clc/lib/generic/relational/clc_isordered.cl
A libclc/clc/lib/generic/relational/clc_isunordered.cl
A libclc/clc/lib/generic/relational/clc_select.cl
A libclc/clc/lib/generic/relational/clc_select.inc
A libclc/clc/lib/generic/relational/clc_signbit.cl
M libclc/generic/include/clc/relational/any.h
R libclc/generic/include/clc/relational/binary_decl.inc
R libclc/generic/include/clc/relational/floatn.inc
R libclc/generic/include/clc/relational/unary_decl.inc
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/relational/all.cl
M libclc/generic/lib/relational/any.cl
A libclc/generic/lib/relational/binary_def.inc
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/isequal.cl
M libclc/generic/lib/relational/isfinite.cl
M libclc/generic/lib/relational/isgreater.cl
M libclc/generic/lib/relational/isgreaterequal.cl
M libclc/generic/lib/relational/isinf.cl
M libclc/generic/lib/relational/isless.cl
M libclc/generic/lib/relational/islessequal.cl
M libclc/generic/lib/relational/islessgreater.cl
M libclc/generic/lib/relational/isnan.cl
M libclc/generic/lib/relational/isnormal.cl
M libclc/generic/lib/relational/isnotequal.cl
M libclc/generic/lib/relational/isordered.cl
M libclc/generic/lib/relational/isunordered.cl
R libclc/generic/lib/relational/relational.h
M libclc/generic/lib/relational/signbit.cl
A libclc/generic/lib/relational/unary_def.inc
Log Message:
-----------
[libclc] Move relational functions to the CLC library (#115171)
The OpenCL relational functions now call their CLC counterparts, and the
CLC relational functions are defined identically to how the OpenCL
functions were defined.
As usual, clspv and spir-v targets bypass these.
No observable changes to any libclc target (measured with llvm-diff).
Commit: 381156c130553179fe3499403cf530deb73f1a3f
https://github.com/llvm/llvm-project/commit/381156c130553179fe3499403cf530deb73f1a3f
Author: Tex Riddell <texr at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/DirectX/atan2.ll
M llvm/test/CodeGen/DirectX/exp-vec.ll
M llvm/test/CodeGen/DirectX/log-vec.ll
M llvm/test/CodeGen/DirectX/step.ll
Log Message:
-----------
[HLSL] Update tests to use splat for vector constants (#115198)
Fixes test failures after splat IR printer change: 38fffa630ee8.
Commit: 768b0b4eb83e8ca62cc504ba3f0f9a0c46eea7b6
https://github.com/llvm/llvm-project/commit/768b0b4eb83e8ca62cc504ba3f0f9a0c46eea7b6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rv64-double-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-double-convert.ll
A llvm/test/CodeGen/RISCV/rv64-float-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-float-convert.ll
A llvm/test/CodeGen/RISCV/rv64-half-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-half-convert.ll
Log Message:
-----------
[RISCV] Add test cases for RV64 i128<->half/float/double (#115124)
These emit 'ti' libcalls.
Commit: 3ed4b0b0efca7a9467ce83fc62de9413da38006d
https://github.com/llvm/llvm-project/commit/3ed4b0b0efca7a9467ce83fc62de9413da38006d
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll
Log Message:
-----------
[NVPTX] Emit prmt selection value in hex (#115049)
Commit: a1be09a0f3278ab198ba27c5fb171192758d20db
https://github.com/llvm/llvm-project/commit/a1be09a0f3278ab198ba27c5fb171192758d20db
Author: Javed Absar <106147771+javedabsar1 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
Log Message:
-----------
[mlir][linalg] Fix isAllParallelLoops method implementation. (#115179)
Commit: e7bad34475e2fd72e8a9952ded4bfec68d2d0f5a
https://github.com/llvm/llvm-project/commit/e7bad34475e2fd72e8a9952ded4bfec68d2d0f5a
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/lib/fuzzer/CMakeLists.txt
M compiler-rt/lib/fuzzer/tests/CMakeLists.txt
M compiler-rt/lib/msan/tests/CMakeLists.txt
M compiler-rt/lib/tsan/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Use installed libc++(abi) for tests instead of build tree
Using the build tree is somewhat fragile since the layout is not
guaranteed to be stable and means the tests are tightly coupled to the
libc++/libc++abi build tree layout. Instead update the ExternalProject
to install the library and headers and do not add the build tree to
the include/linker flags.
Pull Request: https://github.com/llvm/llvm-project/pull/115077
Commit: a036d18f1a1b74fb8c13ea5bc4b02ce4fe40c997
https://github.com/llvm/llvm-project/commit/a036d18f1a1b74fb8c13ea5bc4b02ce4fe40c997
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
Log Message:
-----------
[compiler-rt] Reduce build output for tests
Use CMAKE_INSTALL_MESSAGE=LAZY to only print the local libc++(abi)
installation messages for changed files instead of all files.
Pull Request: https://github.com/llvm/llvm-project/pull/115085
Commit: 5be02d7a03c6d40d4d71264936d4aab98e4186aa
https://github.com/llvm/llvm-project/commit/5be02d7a03c6d40d4d71264936d4aab98e4186aa
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
M libcxxabi/include/CMakeLists.txt
Log Message:
-----------
[libc++abi] Stop copying headers to the build directory
This was needed before https://github.com/llvm/llvm-project/pull/115077
since the compiler-rt test build made assumptions about the build
layout of libc++ and libc++abi, but now they link against a local
installation of these libraries so we no longer need this workaround.
Reviewed By: ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/115086
Commit: ccf5d624f9a30911923b2cb3963cacb8076835d8
https://github.com/llvm/llvm-project/commit/ccf5d624f9a30911923b2cb3963cacb8076835d8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
Log Message:
-----------
[AMDGPU] Fix a warning
This patch fixes:
llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp:1031:17: error:
unused variable 'F' [-Werror,-Wunused-variable]
Commit: 375d1925dbd0c051fe2d4a86fe98ed08f4a502c5
https://github.com/llvm/llvm-project/commit/375d1925dbd0c051fe2d4a86fe98ed08f4a502c5
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll
Log Message:
-----------
Revert "[NVPTX] Emit prmt selection value in hex" (#115204)
Reverts llvm/llvm-project#115049
Commit: b57cbbcb6a6b8f7134848c52dce4b6f64c02d149
https://github.com/llvm/llvm-project/commit/b57cbbcb6a6b8f7134848c52dce4b6f64c02d149
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64-double-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64-float-convert.ll
Log Message:
-----------
[RISCV][GISel] Improve fptos/ui and s/uitofp handling and testing.
Replace clampScalar of the integer type with minScalar. We can't
narrow the integer type, we can only make it larger. If the type
is larger than xLen we need to use a 2*xlen libcall. If it's larger
than 2*xlen we can't handle it at all.
Commit: bcb64e13172c9b894be03ccefcf967e99949b32a
https://github.com/llvm/llvm-project/commit/bcb64e13172c9b894be03ccefcf967e99949b32a
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][serialization] Reduce `ASTWriter::WriteSourceManagerBlock()` scope
Commit: 0276621f8f5ae489fbe9343cb4cca07579a244a4
https://github.com/llvm/llvm-project/commit/0276621f8f5ae489fbe9343cb4cca07579a244a4
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][serialization] Reduce `ASTWriter::WriteControlBlock()` scope
Commit: e9bafa35d27042f8e1daa4ccf4a30bddf31878e8
https://github.com/llvm/llvm-project/commit/e9bafa35d27042f8e1daa4ccf4a30bddf31878e8
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
Log Message:
-----------
[mlir][tensor] Generalize/restrict `GeneralizeOuterUnitDimsPackOpPattern` (#114315)
This PR *restricts* `GeneralizeOuterUnitDimsPackOpPattern` to follow its
intended purpose (as per the documentation), which is to:
> require all outer dimensions of tensor.pack to be 1.
There was one in-tree test that violated this assumption (and happened
to work) – see `@simple_KCRS_to_KRSCsr` in
"generalize-tensor-pack.mlir". That test has been updated to satisfy the
new requirements of the pattern.
By enforcing the pattern to follow its intended design (i.e., making it
stricter), the calculation of shapes and sizes for various Ops that the
pattern generates (PadOp, ExtractSliceOp, EmptyOp, TensorOp, and
InsertSliceOp) becomes much simpler and easier to document. This also
helped *generalize* the pattern to support cases like the one below:
```mlir
func.func @simple_pad_and_pack_dynamic_tile_cst(
%src: tensor<5x1xf32>,
%dest: tensor<1x1x?x2xf32>,
%pad: f32) -> tensor<1x1x?x2xf32> {
%tile_dim_0 = arith.constant 8 : index
%0 = tensor.pack %src
padding_value(%pad : f32)
inner_dims_pos = [0, 1]
inner_tiles = [%tile_dim_0, 2]
into %dest : tensor<5x1xf32> -> tensor<1x1x?x2xf32>
return %0 : tensor<1x1x?x2xf32>
}
```
Note that the inner tile slice is dynamic but compile-time constant.
`getPackOpSourceOrPaddedSource`, which is used to generate PadOp,
detects this and generates a PadOp with static shapes. This is a good
optimization, but it means that all shapes/sizes for Ops generated by
`GeneralizeOuterUnitDimsPackOpPattern` also need to be updated to be
constant/static. By restricting the pattern and simplifying the
size/shape calculation, supporting the case above becomes much easier.
Notable implementation changes:
* PadOp processes the original source (no change in dimensions/rank).
ExtractSliceOp extracts the tile to pack and may reduce the rank. All
following ops work on the tile extracted by ExtractSliceOp (possibly
rank-reduced).
* All shape/size calculations assume that trailing dimensions match
inner_tiles from tensor.pack. All leading dimensions (i.e., outer
dimensions) are assumed to be 1.
* Dynamic sizes for ops like ExtractSliceOp are taken from inner_tiles
rather than computed as, for example, tensor.dim %dest, 2. It’s the
responsibility of the "producers" of tensor.pack to ensure that
dimensions in %dest match the specified tile sizes.
Commit: 4a6d13bf4db63f4cd845d38128c79c17bbf8d99c
https://github.com/llvm/llvm-project/commit/4a6d13bf4db63f4cd845d38128c79c17bbf8d99c
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
Log Message:
-----------
Remove unused variable to fix '[AMDGPU] modify named barrier builtins and intrinsics (#114550)'
https://github.com/llvm/llvm-project/pull/114550 caused a buildbot breakage (https://lab.llvm.org/buildbot/#/builders/66/builds/5853) because of an unused variable. This patch attempts to fix forward:
/home/b/sanitizer-x86_64-linux/build/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp:106:24: error: variable 'TTy' set but not used [-Werror,-Wunused-but-set-variable]
106 | if (TargetExtType *TTy = AMDGPU::isNamedBarrier(GV)) {
| ^
Commit: 304c41217303ce613de8f4042e570ac6ca8757e8
https://github.com/llvm/llvm-project/commit/304c41217303ce613de8f4042e570ac6ca8757e8
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][serialization] Reduce `ASTWriter::writeUnhashedControlBlock()` scope
Commit: a878dc8fb37434c4b1897e28e72420f3fd043b3a
https://github.com/llvm/llvm-project/commit/a878dc8fb37434c4b1897e28e72420f3fd043b3a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/cuf03.cuf
Log Message:
-----------
[flang][cuda] Do not emit warning for SHARED variable in device subprogram (#115195)
SHARED attribute is explicitly meant to be used in device subprogram
(https://docs.nvidia.com/hpc-sdk/compilers/cuda-fortran-prog-guide/index.html#cfpg-var-qual-attr-shared).
Do not emit warning.
Commit: 5942a99f8b7dd361c35eb1c9c32b2475dce2c0b2
https://github.com/llvm/llvm-project/commit/5942a99f8b7dd361c35eb1c9c32b2475dce2c0b2
Author: vporpo <vporpodas at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec] Notify scheduler about new instructions (#115102)
This patch registers the "createInstr" callback that notifies the
scheduler about newly created instructions. This guarantees that all
newly created instructions have a corresponding DAG node associated with
them. Without this the pass crashes when the scheduler encounters the
newly created vector instructions.
This patch also changes the lifetime of the sandboxir Ctx variable in
the SandboxVectorizer pass. It needs to be destroyed after the passes
get destroyed. Without this change when components like the Scheduler
get destroyed Ctx will have already been freed, which is not legal.
Commit: ff533b94b7e503019e35fe58b9622b3f76265fcb
https://github.com/llvm/llvm-project/commit/ff533b94b7e503019e35fe58b9622b3f76265fcb
Author: Pranav Kant <prka at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add dep to BuiltinDialectTdFiles (#115217)
Commit: f85be26a67fa822806c9e5c4c26a4bf782898d5a
https://github.com/llvm/llvm-project/commit/f85be26a67fa822806c9e5c4c26a4bf782898d5a
Author: Gang Chen <gangc at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
Log Message:
-----------
[AMDGPU] fix build error unused-var (#115199)
Commit: 21ded66dba0adfd34250df93b5321709883f5e94
https://github.com/llvm/llvm-project/commit/21ded66dba0adfd34250df93b5321709883f5e94
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Add zexti8 ComplexPattern.
Commit: 87f4bc0acad65b1d20160d4160c7778b187125fc
https://github.com/llvm/llvm-project/commit/87f4bc0acad65b1d20160d4160c7778b187125fc
Author: Martin Storsjö <martin at martin.st>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
Log Message:
-----------
[compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (#115167)
Since b4130bee6bfd34d8045f02fc9f951bcb5db9d85c, we check for
_LIBCPP_HAS_THREAD_API_PTHREAD to decide between using
SetThreadDescription or pthread_setname_np for setting the thread name.
c6f3b7bcd0596d30f8dabecdfb9e44f9a07b6e4c changed how libcxx defines
their configuration macros - now they are always defined, but defined to
0 or 1, while they previously were either defined or undefined.
As these libcxx defines used to be defined to an empty string (rather
than expanding to 1) if enabled, we can't easily produce an expression
that works both with older and newer libcxx. Additionally, these defines
are libcxx internal config macros that aren't a detail that isn't
supported and isn't meant to be relied upon.
Simply skip trying to set thread name on MinGW as we can't easily know
which kind of thread native handle we have. Setting the thread name is
only a nice to have, quality of life improvement - things should work
the same even without it.
Additionally, libfuzzer isn't generally usable on MinGW targets yet
(Clang doesn't include it in the getSupportedSanitizers() method for the
MinGW target), so this shouldn't make any difference in practice anyway.
Commit: df0a56cdd9c77e5c10260f99f8afc313b20d6db1
https://github.com/llvm/llvm-project/commit/df0a56cdd9c77e5c10260f99f8afc313b20d6db1
Author: Pranav Kant <prka at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix AMXDialect (#115221)
Commit: a6637ae2cc9a0e7c9a37603b3d277d7ca642bc36
https://github.com/llvm/llvm-project/commit/a6637ae2cc9a0e7c9a37603b3d277d7ca642bc36
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][deps] Share `FileManager` between modules (#115065)
The `FileManager` sharing between module-building `CompilerInstance`s
was disabled a while ago due to `FileEntry::getName()` being unreliable.
Now that we use `FileEntryRef::getNameAsRequested()` in places where it
matters, re-enabling `FileManager` is sound and improves performance of
`clang-scan-deps` by ~6.2%.
Commit: 7ef7c0d036fb4f37e4a33932c4c0e40714b39fb4
https://github.com/llvm/llvm-project/commit/7ef7c0d036fb4f37e4a33932c4c0e40714b39fb4
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Refine vector division latencies in SiFive P600's scheduling model (#115038)
For both vector integer and floating point divisions.
Co-authored-by: Yeting Kuo <yeting.kuo at sifive.com>
Commit: d08772b1512f630240d8b7feaab749e659d3fce8
https://github.com/llvm/llvm-project/commit/d08772b1512f630240d8b7feaab749e659d3fce8
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
M libcxxabi/include/CMakeLists.txt
Log Message:
-----------
Revert "[libc++abi] Stop copying headers to the build directory" (#115232)
Reverts llvm/llvm-project#115086
2-stage sanitizer build is not happy:
https://lab.llvm.org/buildbot/#/builders/25/builds/3915
Commit: bd3a3959dc5b72ccbc83334132dece3f38957666
https://github.com/llvm/llvm-project/commit/bd3a3959dc5b72ccbc83334132dece3f38957666
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
Log Message:
-----------
[lldb] Fix deprecated defines in debugserver (XROS -> VISIONOS) (NFC)
Commit: f6617d65e496823c748236cdbe8e42bf4c8d8a55
https://github.com/llvm/llvm-project/commit/f6617d65e496823c748236cdbe8e42bf4c8d8a55
Author: Augusto Noronha <anoronha at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/test/Assembler/debug-info.ll
A llvm/test/DebugInfo/AArch64/num_extra_inhabitants.ll
M llvm/unittests/IR/DebugTypeODRUniquingTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[DebugInfo] Add num_extra_inhabitants to debug info (#112590)
An extra inhabitant is a bit pattern that does not represent a valid
value for instances of a given type. The number of extra inhabitants is
the number of those bit configurations.
This is used by Swift to save space when composing types. For example,
because Bool only needs 2 bit patterns to represent all of its values
(true and false), an Optional<Bool> only occupies 1 byte in memory by
using a bit configuration that is unused by Bool. Which bit patterns are
unused are part of the ABI of the language.
Since Swift generics are not monomorphized, by using dynamic libraries
you can have generic types whose size, alignment, etc, are known only
at runtime (which is why this feature is needed).
This patch adds num_extra_inhabitants to LLVM-IR debug info and in DWARF
as an Apple extension.
Commit: cacbe71af7b1075f8ad1f84e002d1fcc83e85713
https://github.com/llvm/llvm-project/commit/cacbe71af7b1075f8ad1f84e002d1fcc83e85713
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/include/llvm/Analysis/LastRunTrackingAnalysis.h
M llvm/include/llvm/Transforms/InstCombine/InstCombine.h
M llvm/lib/Analysis/CMakeLists.txt
A llvm/lib/Analysis/LastRunTrackingAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/Transforms/Coroutines/coro-retcon-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon.ll
M llvm/unittests/Analysis/CMakeLists.txt
A llvm/unittests/Analysis/LastRunTrackingAnalysisTest.cpp
M llvm/unittests/Target/X86/TernlogTest.cpp
Log Message:
-----------
[Analysis] Avoid running transform passes that have just been run (#112092)
This patch adds a new analysis pass to track a set of passes and their
parameters to see if we can avoid running transform passes that have
just been run. The current implementation only skips redundant
InstCombine runs. I will add support for other passes in follow-up
patches.
RFC link:
https://discourse.llvm.org/t/rfc-pipeline-avoid-running-transform-passes-that-have-just-been-run/82467
Compile time improvement:
http://llvm-compile-time-tracker.com/compare.php?from=76007138f4ffd4e0f510d12b5e8cad529c21f24d&to=64134cf07ea7eb39c60320087c0c5afdc16c3a2b&stat=instructions%3Au
Commit: bbc3af0577a05bf5c06f5c39d51b7d48bd63d65f
https://github.com/llvm/llvm-project/commit/bbc3af0577a05bf5c06f5c39d51b7d48bd63d65f
Author: Ryan Mansfield <ryan_mansfield at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/tools/dsymutil/dsymutil.cpp
Log Message:
-----------
[dsymutil] Add missing newlines in error messages. (#115191)
Errors like "cannot create bundle: Not a directory" or "error:
a.out.dSYM: Is a directory" were being emitted without a newline.
Commit: 84745da74c8aa2749510c26cf0e3a35bececfa30
https://github.com/llvm/llvm-project/commit/84745da74c8aa2749510c26cf0e3a35bececfa30
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/unittests/Analysis/LastRunTrackingAnalysisTest.cpp
Log Message:
-----------
[Analysis] Fix a warning (NFC)
This patch fixes:
third-party/unittest/googletest/include/gtest/gtest.h:1379:11:
error: comparison of integers of different signs: 'const unsigned
int' and 'const int' [-Werror,-Wsign-compare]
Commit: 5348a30a580c280ad71198fee78e270de36628e7
https://github.com/llvm/llvm-project/commit/5348a30a580c280ad71198fee78e270de36628e7
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/aarch32.h
Log Message:
-----------
[ExecutionEngine] Simplify code with DenseMap::operator[] (NFC) (#115115)
Commit: cbfe87c2537d3bb16cb131078bc1251f68046971
https://github.com/llvm/llvm-project/commit/cbfe87c2537d3bb16cb131078bc1251f68046971
Author: Konstantin Schwarz <konstantin.schwarz at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
M llvm/test/CodeGen/AArch64/neon-perm.ll
Log Message:
-----------
[GlobalISel] Remove references to rhs of shufflevector if rhs is undef (#115076)
Commit: 7c8287586690650ee8bca2282b2a20cc7dc40bde
https://github.com/llvm/llvm-project/commit/7c8287586690650ee8bca2282b2a20cc7dc40bde
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
Log Message:
-----------
[GISel][RISCV][AMDGPU] Add G_SHL, G_LSHR, G_ASHR to binop_left_to_zero. (#115089)
Shifting 0 by any amount is still zero.
Commit: 29a5c054e6d56a912ed5ba3f84e8ca631872db8b
https://github.com/llvm/llvm-project/commit/29a5c054e6d56a912ed5ba3f84e8ca631872db8b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
ValueTracking: Allow getUnderlyingObject to look at vectors (#114311)
We can identify some easy vector of pointer cases, such as
a getelementptr with a scalar base.
Commit: 30d80009e5012eba5f2e026375038e81932d84f6
https://github.com/llvm/llvm-project/commit/30d80009e5012eba5f2e026375038e81932d84f6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/include/flang/Common/Fortran.h
M flang/lib/Common/Fortran.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/cuf17.cuf
Log Message:
-----------
[flang][cuda] Allow SHARED actual to DEVICE dummy (#115215)
Update the compatibility rules to allow SHARED actual argument passed to
DEVICE dummy argument. Emit a warning in that case.
Commit: af5c471a4d9a9bff30b381d1fe2fe828672bb812
https://github.com/llvm/llvm-project/commit/af5c471a4d9a9bff30b381d1fe2fe828672bb812
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][Vector] Add vector.extract(vector.shuffle) folder (#115105)
This PR adds a folder for extracting an element from a vector shuffle.
It turns something like:
```
%shuffle = vector.shuffle %a, %b [0, 8, 7, 15]
: vector<8xf32>, vector<8xf32>
%extract = vector.extract %shuffle[3] : f32 from vector<4xf32>
```
into:
```
%extract = vector.extract %b[7] : f32 from vector<8xf32>
```
Commit: 7cb66772e23c2208bb920e826661af244790735f
https://github.com/llvm/llvm-project/commit/7cb66772e23c2208bb920e826661af244790735f
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
Log Message:
-----------
[RISCV] Rework fixed-length masked load/store tests. NFC
Pass in the mask and vector directly as arguments, and add tests for
zvfhmin and zvfbfmin.
Commit: 05f87b2d65a7049ff0f846151ada6c0bcbf154a8
https://github.com/llvm/llvm-project/commit/05f87b2d65a7049ff0f846151ada6c0bcbf154a8
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
Log Message:
-----------
[RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (#115145)
This is the same idea as #114945.
Commit: de18fa1ace1cd717da9482a09d0a0db8666f48b7
https://github.com/llvm/llvm-project/commit/de18fa1ace1cd717da9482a09d0a0db8666f48b7
Author: Richard Smith <richard at metafoo.co.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/Program.h
Log Message:
-----------
Don't redundantly specify the default template argument to `BumpPtrAllocatorImpl` (#114857)
Commit: 70bc12e77fe25cd933f8a9815646add6f1ea842f
https://github.com/llvm/llvm-project/commit/70bc12e77fe25cd933f8a9815646add6f1ea842f
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
Log Message:
-----------
[RISCV] Remove unnecessary scalar extensions from test. NFC
Now that f16 and bf16 aren't being scalarized we don't need
zfhmin/zfbfmin.
Commit: c6091cdbedd86cdab0a0d0f18569bf28e016ed9d
https://github.com/llvm/llvm-project/commit/c6091cdbedd86cdab0a0d0f18569bf28e016ed9d
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
Log Message:
-----------
[SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (#114965)
Commit: da032b7903da57eb87015369e5c4db521cb4dbac
https://github.com/llvm/llvm-project/commit/da032b7903da57eb87015369e5c4db521cb4dbac
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (#115244)
Commit: 3bdd71137eb6a54a3f8a45bdb33bfe15edc05f28
https://github.com/llvm/llvm-project/commit/3bdd71137eb6a54a3f8a45bdb33bfe15edc05f28
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/select-bitcast-bigendian.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[TableGen][GISel] Extract helper function for constraining operands (#115148)
As a side effect, this fixes COPY_TO_REGCLASS not being constrained
if it is not top-level (the reason for changes in tests).
Commit: 481ff22b8b81bb5e2d40101b36eca3e90a7d1a5d
https://github.com/llvm/llvm-project/commit/481ff22b8b81bb5e2d40101b36eca3e90a7d1a5d
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
Log Message:
-----------
[RISCV] Lower fixed-length vp_{gather,scatter} for zvfhmin/zvfbfmin (#115253)
This uses the same lowering as masked gathers and scatters.
Commit: f0e2301b7c3f2576a4fbc53441e9378b966e21ef
https://github.com/llvm/llvm-project/commit/f0e2301b7c3f2576a4fbc53441e9378b966e21ef
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
Log Message:
-----------
[RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal interleaved access (#115257)
This is another piece split off from the work to add zvfhmin/zvfbfmin to
isLegalElementTypeForRVV.
This is needed to get InterleavedAccessPass to lower [de]interleaves to
segment load/stores.
Commit: ae6dbed5943d76c61fe95107c15a46f915180772
https://github.com/llvm/llvm-project/commit/ae6dbed5943d76c61fe95107c15a46f915180772
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/idot4s.ll
Log Message:
-----------
[AMDGPU] Use correct DWord for v_dot4 S0 operand (#115224)
Fixes a copy-paste typo.
The typo resulted in producing bad v_perm based operands for the v_dot4
combine. When adding a corresponding byte pair to the v_dot byte pair
chains, we must take note of the byte position in the corresponding
source nodes. These byte positions are used to ensure we extract the
correct DWord from the ultimate source, and formulate a correct
perm_mask from the extracted DWord.
With the typo, we the S0 byte would used the DWord offset for the
corresponding S1 byte. If this offset was not the same as the true DWord
offset for the S0 byte, we would extract and use the wrong byte for S0
in the v_dot.
Fixes https://github.com/llvm/llvm-project/issues/112941
Commit: f7ef7b2ff700360c90d568622e3efd563d9eff05
https://github.com/llvm/llvm-project/commit/f7ef7b2ff700360c90d568622e3efd563d9eff05
Author: vporpo <vporpodas at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Implement rescheduling (#115220)
This patch adds support for re-scheduling already scheduled
instructions. For now this will clear and rebuild the DAG, and will
reschedule the code using the new DAG.
Commit: 63c6fe4a0b18d5eaa50c002185cd270f20cf131b
https://github.com/llvm/llvm-project/commit/63c6fe4a0b18d5eaa50c002185cd270f20cf131b
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace fatal(...) with Fatal or Err
Commit: 09c2c5e1e9f3b3bb17f777f153407430f3cef15e
https://github.com/llvm/llvm-project/commit/09c2c5e1e9f3b3bb17f777f153407430f3cef15e
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/MSP430.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/CallGraphSort.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MapFile.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace error(...) with ErrAlways or Err
Most are migrated to ErrAlways mechanically.
In the future we should change most to Err.
Commit: f8bae3af74e7c60d996f0d331cad04f2eace7f8f
https://github.com/llvm/llvm-project/commit/f8bae3af74e7c60d996f0d331cad04f2eace7f8f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace warn(...) with Warn
Commit: 9b058bb42d49afb61b07a7eeeea1ad3d1407f1c9
https://github.com/llvm/llvm-project/commit/9b058bb42d49afb61b07a7eeeea1ad3d1407f1c9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace errorOrWarn(...) with Err
Commit: 343a810725f27bfe92fbd04a42d42aa9caaee7a6
https://github.com/llvm/llvm-project/commit/343a810725f27bfe92fbd04a42d42aa9caaee7a6
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-vectorized.ll
Log Message:
-----------
[RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal strided access (#115264)
This is also split off from the zvfhmin/zvfbfmin
isLegalElementTypeForRVV work.
Enabling this will cause SLP and RISCVGatherScatterLowering to emit
@llvm.experimental.vp.strided.{load,store} intrinsics, and codegen
support for this was added in #109387 and #114750.
Commit: 9f796159f28775b3f93d77e173c1fd3413c2e60e
https://github.com/llvm/llvm-project/commit/9f796159f28775b3f93d77e173c1fd3413c2e60e
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/STLFunctionalExtras.h
Log Message:
-----------
Add clang::lifetimebound annotation to llvm::function_ref (#115019)
This helps catch dangling llvm::function_ref references, see #114950,
#114949, #114808, #114789
Commit: adb0d8ddceb143749c519d14b8b31b481071da77
https://github.com/llvm/llvm-project/commit/adb0d8ddceb143749c519d14b8b31b481071da77
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
Log Message:
-----------
[Clang] Distinguish expanding-pack-in-place cases for SubstTemplateTypeParmTypes (#114220)
In 50e5411e4, we preserved the pack substitution index within
SubstTemplateTypeParmType nodes and performed in-place expansions of
packs such that type constraints on a lambda that serve as a pattern of
a fold expression could be evaluated if the type constraints contain any
packs that are expanded by the fold expression.
However, we made an incorrect assumption of the condition under which
in-place expansion should occur. For example, a SizeOfPackExpr case
relies on SubstTemplateTypeParmType nodes being transformed to
SubstTemplateTypeParmPackTypes rather than expanding them immediately in
place.
This fixes that by adding a flag to SubstTemplateTypeParmType to
discriminate such in-place expansion situations.
Fixes https://github.com/llvm/llvm-project/issues/113518
Commit: 3850801ca57575640a6ad3a5a421a416dc5c6f12
https://github.com/llvm/llvm-project/commit/3850801ca57575640a6ad3a5a421a416dc5c6f12
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
Log Message:
-----------
[RISCV] Add vcpop.m/vfirst.m to RISCVMaskedPseudosTable
We seem to forget these two instructions.
Reviewers: preames, frasercrmck, lukel97, topperc
Reviewed By: lukel97
Pull Request: https://github.com/llvm/llvm-project/pull/115162
Commit: 0b9f1cc024ca6c7e8d60524be07c0ddfcd08b23c
https://github.com/llvm/llvm-project/commit/0b9f1cc024ca6c7e8d60524be07c0ddfcd08b23c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll
M llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
A llvm/test/Transforms/LoopUnroll/pr114879.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M polly/test/CodeGen/OpenMP/floord-as-argument-to-subfunction.ll
M polly/test/CodeGen/inner_scev_sdiv_2.ll
M polly/test/CodeGen/inner_scev_sdiv_3.ll
M polly/test/CodeGen/non-affine-phi-node-expansion.ll
M polly/test/CodeGen/phi-defined-before-scop.ll
M polly/test/CodeGen/scop_expander_insert_point.ll
M polly/test/CodeGen/stack-overflow-in-load-hoisting.ll
M polly/test/ScopInfo/complex_domain_binary_condition.ll
M polly/test/ScopInfo/scev-div-with-evaluatable-divisor.ll
Log Message:
-----------
[SCEV] Disallow simplifying phi(undef, X) to X (#115109)
See the following case:
```
@GlobIntONE = global i32 0, align 4
define ptr @src() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel: ; preds = %for.body.peel.begin
br i1 true, label %cleanup.peel, label %cleanup.loopexit.peel
cleanup.loopexit.peel: ; preds = %for.body.peel
br label %cleanup.peel
cleanup.peel: ; preds = %cleanup.loopexit.peel, %for.body.peel
%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE, %cleanup.loopexit.peel ]
br i1 true, label %for.body.peel.next, label %cleanup7
for.body.peel.next: ; preds = %cleanup.peel
br label %for.body.peel.next1
for.body.peel.next1: ; preds = %for.body.peel.next
br label %entry.peel.newph
entry.peel.newph: ; preds = %for.body.peel.next1
br label %for.body
for.body: ; preds = %cleanup, %entry.peel.newph
%retval.0 = phi ptr [ %retval.2.peel, %entry.peel.newph ], [ %retval.2, %cleanup ]
br i1 false, label %cleanup, label %cleanup.loopexit
cleanup.loopexit: ; preds = %for.body
br label %cleanup
cleanup: ; preds = %cleanup.loopexit, %for.body
%retval.2 = phi ptr [ %retval.0, %for.body ], [ @GlobIntONE, %cleanup.loopexit ]
br i1 false, label %for.body, label %cleanup7.loopexit
cleanup7.loopexit: ; preds = %cleanup
%retval.2.lcssa.ph = phi ptr [ %retval.2, %cleanup ]
br label %cleanup7
cleanup7: ; preds = %cleanup7.loopexit, %cleanup.peel
%retval.2.lcssa = phi ptr [ %retval.2.peel, %cleanup.peel ], [ %retval.2.lcssa.ph, %cleanup7.loopexit ]
ret ptr %retval.2.lcssa
}
define ptr @tgt() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel: ; preds = %for.body.peel.begin
br i1 true, label %cleanup.peel, label %cleanup.loopexit.peel
cleanup.loopexit.peel: ; preds = %for.body.peel
br label %cleanup.peel
cleanup.peel: ; preds = %cleanup.loopexit.peel, %for.body.peel
%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE, %cleanup.loopexit.peel ]
br i1 true, label %for.body.peel.next, label %cleanup7
for.body.peel.next: ; preds = %cleanup.peel
br label %for.body.peel.next1
for.body.peel.next1: ; preds = %for.body.peel.next
br label %entry.peel.newph
entry.peel.newph: ; preds = %for.body.peel.next1
br label %for.body
for.body: ; preds = %cleanup, %entry.peel.newph
br i1 false, label %cleanup, label %cleanup.loopexit
cleanup.loopexit: ; preds = %for.body
br label %cleanup
cleanup: ; preds = %cleanup.loopexit, %for.body
br i1 false, label %for.body, label %cleanup7.loopexit
cleanup7.loopexit: ; preds = %cleanup
%retval.2.lcssa.ph = phi ptr [ %retval.2.peel, %cleanup ]
br label %cleanup7
cleanup7: ; preds = %cleanup7.loopexit, %cleanup.peel
%retval.2.lcssa = phi ptr [ %retval.2.peel, %cleanup.peel ], [ %retval.2.lcssa.ph, %cleanup7.loopexit ]
ret ptr %retval.2.lcssa
}
```
1. `simplifyInstruction(%retval.2.peel)` returns `@GlobIntONE`. Thus,
`ScalarEvolution::createNodeForPHI` returns SCEV expr `@GlobIntONE` for
`%retval.2.peel`.
2. `SimplifyIndvar::replaceIVUserWithLoopInvariant` tries to replace the
use of `%retval.2.peel` in `%retval.2.lcssa.ph` with `@GlobIntONE`.
3. `simplifyLoopAfterUnroll -> simplifyLoopIVs -> SCEVExpander::expand`
reuses `%retval.2.peel = phi ptr [ undef, %for.body.peel ], [
@GlobIntONE, %cleanup.loopexit.peel ]` to generate code for
`@GlobIntONE`. It is incorrect.
This patch disallows simplifying `phi(undef, X)` to `X` by setting
`CanUseUndef` to false.
Closes https://github.com/llvm/llvm-project/issues/114879.
Commit: ae5bfa0cef0873d30e7dd5cb20ff4437b244203e
https://github.com/llvm/llvm-project/commit/ae5bfa0cef0873d30e7dd5cb20ff4437b244203e
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
Log Message:
-----------
[clang] Output an error when [[lifetimebound]] attribute is applied on a function implicit object parameter while the function returns void (#114203)
Fixes: https://github.com/llvm/llvm-project/issues/107556
Commit: 1469d82e1cb3edc939d6b93089046edfef0cf36c
https://github.com/llvm/llvm-project/commit/1469d82e1cb3edc939d6b93089046edfef0cf36c
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/Analysis/BasicAA/phi-values-usage.ll
M llvm/test/Analysis/BasicAA/underlying-value.ll
M llvm/test/Analysis/BlockFrequencyInfo/irreducible_loop_crash.ll
M llvm/test/Analysis/BranchProbabilityInfo/deopt-invoke.ll
M llvm/test/Analysis/BranchProbabilityInfo/loop.ll
M llvm/test/Analysis/BranchProbabilityInfo/unreachable.ll
M llvm/test/Analysis/CostModel/SystemZ/intrinsic-cost-crash.ll
M llvm/test/Analysis/CycleInfo/basic.ll
M llvm/test/Analysis/CycleInfo/unreachable-predecessor.ll
M llvm/test/Analysis/Delinearization/type_mismatch.ll
M llvm/test/Analysis/Delinearization/undef.ll
M llvm/test/Analysis/DependenceAnalysis/MIVCheckConst.ll
M llvm/test/Analysis/DependenceAnalysis/NonAffineExpr.ll
M llvm/test/Analysis/Dominators/basic.ll
M llvm/test/Analysis/Dominators/print-dot-dom.ll
M llvm/test/Analysis/MemoryDependenceAnalysis/invariant.group-bug.ll
M llvm/test/Analysis/MemorySSA/cyclicphi.ll
M llvm/test/Analysis/MemorySSA/debugvalue.ll
M llvm/test/Analysis/MemorySSA/debugvalue2.ll
M llvm/test/Analysis/MemorySSA/forward-unreachable.ll
M llvm/test/Analysis/MemorySSA/function-clobber.ll
M llvm/test/Analysis/MemorySSA/invariant-groups.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-disablebasicaa.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-simplified-clone.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-valuemap.ll
M llvm/test/Analysis/MemorySSA/phi-translation.ll
M llvm/test/Analysis/MemorySSA/pr28880.ll
M llvm/test/Analysis/MemorySSA/pr40749_2.ll
M llvm/test/Analysis/MemorySSA/pr41640.ll
M llvm/test/Analysis/MemorySSA/pr41853.ll
M llvm/test/Analysis/MemorySSA/pr42940.ll
M llvm/test/Analysis/MemorySSA/pr43317.ll
M llvm/test/Analysis/MemorySSA/pr43320.ll
M llvm/test/Analysis/MemorySSA/pr43427.ll
M llvm/test/Analysis/MemorySSA/pr43438.ll
M llvm/test/Analysis/MemorySSA/pr43493.ll
M llvm/test/Analysis/MemorySSA/pr43541.ll
M llvm/test/Analysis/MemorySSA/pr43641.ll
M llvm/test/Analysis/MemorySSA/pr45976.ll
M llvm/test/Analysis/MemorySSA/reduce_clobber_limit.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/MemorySSA/unreachable.ll
M llvm/test/Analysis/MemorySSA/update_unroll.ll
M llvm/test/Analysis/PhiValues/basic.ll
M llvm/test/Analysis/PhiValues/long_phi_chain.ll
M llvm/test/Analysis/PostDominators/pr6047_a.ll
M llvm/test/Analysis/PostDominators/pr6047_b.ll
M llvm/test/Analysis/PostDominators/pr6047_c.ll
M llvm/test/Analysis/PostDominators/pr6047_d.ll
M llvm/test/Analysis/ScalarEvolution/2011-04-26-FoldAddRec.ll
M llvm/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll
M llvm/test/Analysis/ScalarEvolution/avoid-infinite-recursion-0.ll
M llvm/test/Analysis/ScalarEvolution/avoid-infinite-recursion-1.ll
M llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
M llvm/test/Analysis/ScalarEvolution/expander-replace-congruent-ivs.ll
M llvm/test/Analysis/ScalarEvolution/how-far-to-zero.ll
M llvm/test/Analysis/ScalarEvolution/overflow-intrinsics-trip-count.ll
M llvm/test/Analysis/ScalarEvolution/pointer-sign-bits.ll
M llvm/test/Analysis/ScalarEvolution/pr22674.ll
M llvm/test/Analysis/ScalarEvolution/pr22856.ll
M llvm/test/Analysis/ScalarEvolution/pr25369.ll
M llvm/test/Analysis/ScalarEvolution/scev-aa.ll
M llvm/test/Analysis/ScalarEvolution/scev-canonical-mode.ll
M llvm/test/Analysis/ScalarEvolution/scev-invalid.ll
M llvm/test/Analysis/ScalarEvolution/shift-recurrences.ll
M llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
M llvm/test/Assembler/atomicrmw.ll
M llvm/test/Assembler/convergence-control.ll
M llvm/test/Bitcode/convergence-control.ll
M llvm/test/DebugInfo/ARM/illegal-fragment.ll
M llvm/test/DebugInfo/ARM/machine-cp-updates-dbg-reg.mir
M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
M llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
M llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
M llvm/test/DebugInfo/X86/dbg-value-terminator.ll
M llvm/test/DebugInfo/X86/deleted-bit-piece.ll
M llvm/test/DebugInfo/X86/earlydup-crash.ll
M llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
M llvm/test/DebugInfo/X86/mem2reg_fp80.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg2-dead-block-order.ll
M llvm/test/Other/loop-pass-ordering.ll
M llvm/test/Other/loopnest-pass-ordering.ll
M llvm/test/Other/opt-bisect-new-pass-manager.ll
M llvm/test/SafepointIRVerifier/from-same-relocation-in-phi-nodes.ll
M llvm/test/SafepointIRVerifier/unrecorded-live-at-sp.ll
M llvm/test/SafepointIRVerifier/uses-in-phi-nodes.ll
M llvm/test/Verifier/tbaa-cyclic.ll
M llvm/test/tools/llvm-reduce/operands-skip.ll
Log Message:
-----------
Remove `br i1 undef` from some regression tests [NFC] (#115130)
As defined in LangRef, branching on `undef` is undefined behavior.
This PR aims to remove undefined behavior from tests. As UB tests break
Alive2 and may be the root cause of breaking future optimizations.
Here's an Alive2 proof for one of the examples:
https://alive2.llvm.org/ce/z/TncxhP
Commit: 9b909b8886e35cf5816f660092a2337f779e3e3d
https://github.com/llvm/llvm-project/commit/9b909b8886e35cf5816f660092a2337f779e3e3d
Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
Log Message:
-----------
[AMDGPU][NFC] Precommit tests representing agpr spills. (#115270)
Presently we are only marking implicit-def for the
spilled AGPR tuple in the first spill instructions
and not implicit.
Commit: 5f342816efe1854333f2be41a03fdd25fa0db433
https://github.com/llvm/llvm-project/commit/5f342816efe1854333f2be41a03fdd25fa0db433
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
A llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
Log Message:
-----------
[llvm] Use computeConstantRange to improve llvm.objectsize computation (#114673)
Using LazyValueInfo, it is possible to compute valuable information for
allocation functions, GEP and alloca, even in the presence of dynamic
information.
llvm.objectsize plays an important role in _FORTIFY_SOURCE definitions,
so improving its diagnostic in turns improves the security of compiled
application.
As a side note, as a result of recent optimization improvements, clang
no longer passes
https://github.com/serge-sans-paille/builtin_object_size-test-suite This
commit restores the situation and greatly improves the scope of code
handled by the static version of __builtin_object_size.
Commit: d2aff182d379c9b84cebe0fdf58907f4de768f1e
https://github.com/llvm/llvm-project/commit/d2aff182d379c9b84cebe0fdf58907f4de768f1e
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/Transforms/Scalar.h
R llvm/include/llvm/Transforms/Scalar/TLSVariableHoist.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/CMakeLists.txt
M llvm/lib/Transforms/Scalar/Scalar.cpp
R llvm/lib/Transforms/Scalar/TLSVariableHoist.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
R llvm/test/CodeGen/X86/tls-loads-control.ll
R llvm/test/CodeGen/X86/tls-loads-control2.ll
R llvm/test/CodeGen/X86/tls-loads-control3.ll
M llvm/tools/llc/llc.cpp
Log Message:
-----------
Revert "TLS loads opimization (hoist)" (#114740)
This reverts commit c31014322c0b5ae596da129cbb844fb2198b4ef4.
Based on the discussions in #112772, this pass is not needed after the
introduction of `llvm.threadlocal.address` intrinsic.
Fixes https://github.com/llvm/llvm-project/issues/112771.
Commit: 2d7f34f2a5df9396a33a0ea044cfe3ddf33e1f5c
https://github.com/llvm/llvm-project/commit/2d7f34f2a5df9396a33a0ea044cfe3ddf33e1f5c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Don't special case depth for phi of select (#114996)
As discussed on
https://github.com/llvm/llvm-project/pull/114689#pullrequestreview-2411822612
and following, there is no principled reason why the phi of select case
should have a different recursion limit than the general case. There may
still be fan-out, and there may still be indirect recursion. Revert that
part of #113707.
Commit: 1b01064faad2cd93c516341cfaf047b7a0f8da42
https://github.com/llvm/llvm-project/commit/1b01064faad2cd93c516341cfaf047b7a0f8da42
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
Log Message:
-----------
[NVPTX] Add TMA bulk tensor copy intrinsics (#96083)
This patch adds NVVM intrinsics and NVPTX codegen for:
* cp.async.bulk.tensor.S2G.1D -> 5D variants, supporting both Tile and
Im2Col modes. These intrinsics optionally support cache_hints as
indicated by the boolean flag argument.
* cp.async.bulk.tensor.G2S.1D -> 5D variants, with support for both Tile
and Im2Col modes. The Im2Col variants have an extra set of offsets as
parameters. These intrinsics optionally support multicast and cache_hints,
as indicated by the boolean arguments at the end of the intrinsics.
* The backend looks through these flag arguments and lowers to the
appropriate PTX instruction.
* Lit tests are added for all combinations of these intrinsics in
cp-async-bulk-tensor-g2s/s2g.ll.
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst file.
* PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async-bulk-tensor
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: f9fecab1fd4e2aec74b864b1ee81679b14f13f5c
https://github.com/llvm/llvm-project/commit/f9fecab1fd4e2aec74b864b1ee81679b14f13f5c
Author: simpal01 <simi.pallipurath at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/print-multi-selection-flags.c
Log Message:
-----------
Add -mno-unaligned-access and -mbig-endian to ARM and AArch64 multilib flags (#114782)
This adds -mno-unaligned-access and -mbig-endian command line
options to the set of flags used by the multilib selection for ARM and
AArch64 targets.
Commit: 490e58a98e0518542c87aa16e326fcb446d7b1cc
https://github.com/llvm/llvm-project/commit/490e58a98e0518542c87aa16e326fcb446d7b1cc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
Log Message:
-----------
Fix MSVC "not all control paths return a value" warning. NFC
Commit: 6720ce75f61a306a3ed26b2205f09a7099e978e7
https://github.com/llvm/llvm-project/commit/6720ce75f61a306a3ed26b2205f09a7099e978e7
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-exegesis.rst
M llvm/tools/llvm-exegesis/README.md
Log Message:
-----------
[Docs][llvm-exegesis] Clarify AArch64 support (#114989)
Claiming AArch64 support for llvm-exegesis is a bit of a stretch in my
opinion as only a couple of opcodes with GPR64 operands will work for
snippet benchmarking, so I propose to clarify that AArch64 support is
very experimental. Also added some clarifications about its libpfm4
dependency.
Commit: 0c0d7a6ec7ece55d4516d7b902d488b42c850e16
https://github.com/llvm/llvm-project/commit/0c0d7a6ec7ece55d4516d7b902d488b42c850e16
Author: JoelWee <32009741+JoelWee at users.noreply.github.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR] Fix bazel after 2f743ac
Commit: 1361c19c04d0b3d9156fe0c5393d158cf69c14e7
https://github.com/llvm/llvm-project/commit/1361c19c04d0b3d9156fe0c5393d158cf69c14e7
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
M lldb/test/API/lang/cpp/const_static_integral_member/main.cpp
Log Message:
-----------
[lldb] Index static const members of classes, structs and unions as global variables in DWARF 4 and earlier (#111859)
In DWARF 4 and earlier `static const` members of structs, classes and
unions have an entry tag `DW_TAG_member`, and are also tagged as
`DW_AT_declaration`, but otherwise follow the same rules as
`DW_TAG_variable`.
Commit: dd98ae358b187be32a2e255eba5f91568524b86a
https://github.com/llvm/llvm-project/commit/dd98ae358b187be32a2e255eba5f91568524b86a
Author: JaydeepChauhan14 <167076022+JaydeepChauhan14 at users.noreply.github.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/TableGen/x86-instr-mapping.inc
A llvm/test/TableGen/x86-instr-mapping.td
Log Message:
-----------
Test added for x86-instr-mapping (#115170)
Commit: 9f02950a1589ebfc542f4f5a2475c2cc03e4e2e9
https://github.com/llvm/llvm-project/commit/9f02950a1589ebfc542f4f5a2475c2cc03e4e2e9
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
A llvm/test/CodeGen/Thumb2/mve-vadc-vsbc-spill.ll
Log Message:
-----------
[ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (#115174)
The MVE VADC and VSBC instructions read and write a carry bit in FPSCR,
which is exposed through the intrinsics. This makes it possible to write
code which has the FPSCR live across a function call, or which uses the
same value twice, so it needs to be possible to spill and reload it.
There is a missed optimisation in one of the test cases, where we reload
the FPSCR from the stack despite it still being live, I've not found a
simple way to prevent the register allocator from doing this.
Commit: 4fa1e8f970235918da8e7c467cdcd227c2f87536
https://github.com/llvm/llvm-project/commit/4fa1e8f970235918da8e7c467cdcd227c2f87536
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/tools/gold/X86/opt-level.ll
Log Message:
-----------
[gold] Fix test after pipeline change
After fbd89bcc6647ed611e579d8f9c38c97b8e6f7936 we're not running
FunctionAttrs at O1, so adjust the test expectation accordingly.
Commit: f43ef53dd20b83ea0db6fdba69025c9a76a1de08
https://github.com/llvm/llvm-project/commit/f43ef53dd20b83ea0db6fdba69025c9a76a1de08
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/Transforms/Mem2Reg/UndefValuesMerge.ll
Log Message:
-----------
[Mem2Reg] Regenerate test checks (NFC)
Switch to FileCheck and use UTC.
Commit: d87dbcbf137ab1c6b6c2db1fd3fe7d91a3142fa1
https://github.com/llvm/llvm-project/commit/d87dbcbf137ab1c6b6c2db1fd3fe7d91a3142fa1
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.td
Log Message:
-----------
[LoongArch] Reuse GPRRegisterClass to shorten some code in LoongArchRegisterInfo.td. NFC
Commit: abe0cd4621ccee26196ceb7506e908d4134f630e
https://github.com/llvm/llvm-project/commit/abe0cd4621ccee26196ceb7506e908d4134f630e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll
Log Message:
-----------
ValueTracking: pre-commit udiv/urem recurrence tests (#109198)
Commit: fef6613e9fc05bca8e315c65e8f8da796860a3cf
https://github.com/llvm/llvm-project/commit/fef6613e9fc05bca8e315c65e8f8da796860a3cf
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll
Log Message:
-----------
ValueTracking: simplify udiv/urem recurrences (#108973)
A urem recurrence has the property that the result can never exceed the
start value. A udiv recurrence has the property that the result can
never exceed either the start value or the numerator, whichever is
greater. Implement a simplification based on these properties.
Commit: dafbc97594c26da67e34ba0301a6126419ae4604
https://github.com/llvm/llvm-project/commit/dafbc97594c26da67e34ba0301a6126419ae4604
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/test/COFF/arm64ec-altnames.s
M lld/test/COFF/arm64ec-codemap.test
M lld/test/COFF/arm64ec-delayimport.test
M lld/test/COFF/arm64ec-export-thunks.test
M lld/test/COFF/arm64ec-import.test
M lld/test/COFF/arm64ec-lib.test
M lld/test/COFF/arm64ec-loadcfg.s
M lld/test/COFF/arm64ec-range-thunks.s
M lld/test/COFF/locally-imported-arm64ec.test
Log Message:
-----------
[LLD][COFF] Append a terminator entry to redirection metadata (#115202)
For MSVC compatibility.
Commit: 9470945b6695cf526df9249c3787d225f95eaf03
https://github.com/llvm/llvm-project/commit/9470945b6695cf526df9249c3787d225f95eaf03
Author: Valery Pykhtin <valery.pykhtin at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/CalcSpillWeights.cpp
Log Message:
-----------
[CalcSpillWeights] Simplify copy hint register collection. NFC. (#114236)
CopyHints set has been collecting duplicates of a register with
increasing weight and then deduplicated with HintedRegs set. Let's stop
collecting duplicates at the first place.
Commit: 3d0b283dcd6d9fbe41618fd476c14bc00b62b3e5
https://github.com/llvm/llvm-project/commit/3d0b283dcd6d9fbe41618fd476c14bc00b62b3e5
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseStmt.cpp
A clang/test/C/C2y/n3370.c
M clang/test/Sema/gnu-flags.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Add test coverage for WG14 N3370 (#115054)
This paper added case ranges in switch statements, which is a GNU
extension Clang has supported since at least Clang 3.0.
It updates the diagnostics to no longer call this a GNU extension except
in C++ mode.
Commit: 16cd5cdf4d6387e34d2bb723bc26c331c8d89d75
https://github.com/llvm/llvm-project/commit/16cd5cdf4d6387e34d2bb723bc26c331c8d89d75
Author: Jacob Bramley <jacob.bramley at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/Inputs/spurious-marker-symbol.yaml
A bolt/test/AArch64/spurious-marker-symbol.test
M llvm/include/llvm/Object/ObjectFile.h
Log Message:
-----------
[BOLT] Ignore AArch64 markers outside their sections. (#74106)
AArch64 uses $d and $x symbols to delimit data embedded in code.
However, sometimes we see $d symbols, typically in .eh_frame, with
addresses that belong to different sections. These occasionally fall
inside .text functions and cause BOLT to stop disassembling, which in
turn causes DWARF CFA processing to fail.
As a workaround, we just ignore symbols with addresses outside the
section they belong to. This behaviour is consistent with objdump and
similar tools.
Commit: e40a31b7baef8c39b9e03ebf94ddfefdba52601e
https://github.com/llvm/llvm-project/commit/e40a31b7baef8c39b9e03ebf94ddfefdba52601e
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/TraversalChecker.cpp
R clang/test/Analysis/traversal-algorithm.mm
Log Message:
-----------
[analyzer][NFC] Remove check::BranchCondition from debug.DumpTraversal (#113906)
This commit removes the `check::BranchCondition` callback of the debug
checker `debug.DumpTraversal` (in `TraversalChecker.cpp`) and the single
broken testcase that was referring to it.
The testcase `traversal-algorithm.mm` was added in 2012 to verify that
we're using DFS traversal -- however it failed to detect that we're no
longer using DFS traversal and in fact it continues to pass even if I
remove large random portions of its code.
This change was motivated by the plan discussed at
https://discourse.llvm.org/t/fixing-or-removing-check-branchcondition/82738
I also added some TODO notes to mark the rest of `TraversalChecker.cpp`
for removal in follow-up commits.
Commit: b358f218a114c1495cfb356b1b95c866c32f72c4
https://github.com/llvm/llvm-project/commit/b358f218a114c1495cfb356b1b95c866c32f72c4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
Log Message:
-----------
[X86] visitSelect - widen select(cond,extract_subvector(shuffle(vec0)),vec1) if it will create a mask instruction (#115223)
This patch extends the existing fold "select(mask, extract_subvector(shuffle(x)), zero) --> extract_subvector(select(insert_subvector(mask), shuffle(x), zero))", to also handle the non-zero case.
I've put in a restriction for VPERMV3 3 vector operands shuffles to only work with the zero select as in most circumstances we are not selecting with either of the source vectors (the only case the mask instructions match).
We should be able to generalize this in the future to work with other maskable instructions, but this is a good initial improvement.
Fixes #113400
Commit: 8269c400b430e4beb9fdb51b94dbc79b84c37f70
https://github.com/llvm/llvm-project/commit/8269c400b430e4beb9fdb51b94dbc79b84c37f70
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[mlir][OpenMP][NFC] delayed privatisation cleanup (#115298)
Upstreaming some code cleanups ahead of supporting delayed task
execution.
- Make allocatePrivateVars not need to be a template (it will need to
operate separately on firstprivate and private variables for delayed
task execution so it can't index into lists of all variables in the
operation).
- Use llvm::SmallVectorImpl for function arguments
- collectPrivatizationDecls already reserves size for privateDecls so we
don't need to do that in callers
- Use llvm::zip_equal instead of C-style array indexing
Commit: 9123dc6abfa76c90c04caf1a58574eff417a2aed
https://github.com/llvm/llvm-project/commit/9123dc6abfa76c90c04caf1a58574eff417a2aed
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
Log Message:
-----------
[AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (#115292)
Similar to #110986 - disabling inlining on MSVC release builds avoids an excessive build time issue affecting all recent versions of CL.EXE
Fixes #114425
Commit: f5e4ffaa49254706ad6fa209de8aec28e20f0041
https://github.com/llvm/llvm-project/commit/f5e4ffaa49254706ad6fa209de8aec28e20f0041
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
R llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
Log Message:
-----------
Revert "[llvm] Use computeConstantRange to improve llvm.objectsize computation (#114673)"
This reverts commit 5f342816efe1854333f2be41a03fdd25fa0db433.
This seems to break various builders, such as
https://lab.llvm.org/buildbot/#/builders/41/builds/3259
https://lab.llvm.org/buildbot/#/builders/76/builds/4298
Commit: 4fb953ac348d888541efe515439e0d844cdd7fbf
https://github.com/llvm/llvm-project/commit/4fb953ac348d888541efe515439e0d844cdd7fbf
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
M clang/test/Driver/amdgpu-macros.cl
Log Message:
-----------
[AMDGPU] Make `__GCC_DESTRUCTIVE_SIZE` 128 on AMDGPU (#115241)
Summary:
The cache line size on AMDGPU varies between 64 and 128 (The lowest L2
cache also goes to 256 on some architectures.) This macro is intended to
present a size that will not cause destructive interference, so we
choose the larger of those values.
Commit: dd116369f646d023a2e7e5c145a1bed5dcf9a45c
https://github.com/llvm/llvm-project/commit/dd116369f646d023a2e7e5c145a1bed5dcf9a45c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/CodeGen/AArch64/convertphitype.ll
M llvm/test/CodeGen/AArch64/sve-breakdown-scalable-vectortype.ll
M llvm/test/CodeGen/Hexagon/frame-offset-overflow.ll
M llvm/test/CodeGen/Hexagon/trunc-mpy.ll
M llvm/test/CodeGen/PowerPC/sms-phi-5.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/InstSimplify/phi.ll
M llvm/test/Transforms/LoopDeletion/pr53969.ll
M llvm/test/Transforms/LoopVectorize/pr31190.ll
M llvm/test/Transforms/Mem2Reg/UndefValuesMerge.ll
M llvm/test/Transforms/Mem2Reg/single-store.ll
Log Message:
-----------
[InstSimplify] Fix incorrect poison propagation when folding phi (#96631)
We can only replace phi(X, undef) with X, if X is known not to be
poison. Otherwise, the result may be more poisonous on the undef branch.
Fixes https://github.com/llvm/llvm-project/issues/68683.
Commit: a9cd941f392dbf99ddfcde9721bd5c485823bdf0
https://github.com/llvm/llvm-project/commit/a9cd941f392dbf99ddfcde9721bd5c485823bdf0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libcxx/include/print
Log Message:
-----------
[libcxx] Fix inverted `has_terminal` condition
Summary:
This used to indicate "has no terminal" and now it indicates "has
terminal" but the check was not changed.
Commit: 4f24d0355a70374bf072585281583553113bf5da
https://github.com/llvm/llvm-project/commit/4f24d0355a70374bf072585281583553113bf5da
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[VectorCombine] Use explicit ExtractElementInst getVectorOperand/getIndexOperand accessors. NFC.
Commit: e236a52a88956968f318fb908c584e5cb80b5b03
https://github.com/llvm/llvm-project/commit/e236a52a88956968f318fb908c584e5cb80b5b03
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/CMakeLists.txt
M libcxx/docs/TestingLibcxx.rst
M libcxx/docs/VendorDocumentation.rst
M libcxx/test/CMakeLists.txt
M libcxx/test/benchmarks/CMakeLists.txt
M libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/formatter_int.bench.cpp
R libcxx/test/benchmarks/lit.cfg.py.in
R libcxx/test/benchmarks/lit.site.cfg.py.in
M libcxx/test/benchmarks/util_smartptr.bench.cpp
M libcxx/test/configs/cmake-bridge.cfg.in
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/config.py
M libcxx/utils/libcxx/test/format.py
R libcxx/utils/libcxx/test/googlebenchmark.py
M libcxx/utils/libcxx/test/params.py
M libcxxabi/test/configs/cmake-bridge.cfg.in
M libunwind/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
[libc++] Unify the benchmarks with the test suite (#101399)
Instead of building the benchmarks separately via CMake and running them
separately from the test suite, this patch merges the benchmarks into
the test suite and handles both uniformly.
As a result:
- It is now possible to run individual benchmarks like we run tests
(e.g. using libcxx-lit), which is a huge quality-of-life improvement.
- The benchmarks will be run under exactly the same configuration as
the rest of the tests, which is a nice simplification. This does
mean that one has to be careful to enable the desired optimization
flags when running benchmarks, but that is easy with e.g.
`libcxx-lit <...> --param optimization=speed`.
- Benchmarks can use the same annotations as the rest of the test
suite, such as `// UNSUPPORTED` & friends.
When running the tests via `check-cxx`, we only compile the benchmarks
because running them would be too time consuming. This introduces a bit
of complexity in the testing setup, and instead it would be better to
allow passing a --dry-run flag to GoogleBenchmark executables, which is
the topic of https://github.com/google/benchmark/issues/1827.
I am not really satisfied with the layering violation of adding the
%{benchmark_flags} substitution to cmake-bridge, however I believe
this can be improved in the future.
Commit: 427a5cf105c409993c812f4fb1868bac96fce0c5
https://github.com/llvm/llvm-project/commit/427a5cf105c409993c812f4fb1868bac96fce0c5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libcxx/cmake/caches/Generic-hardening-mode-fast-with-abi-breaks.cmake
M libcxx/docs/Hardening.rst
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__configuration/abi.h
M libcxx/include/__iterator/bounded_iter.h
A libcxx/include/__iterator/static_bounded_iter.h
M libcxx/include/array
M libcxx/include/module.modulemap
R libcxx/test/libcxx/containers/sequences/array/array.zero/assert.back.pass.cpp
R libcxx/test/libcxx/containers/sequences/array/array.zero/assert.front.pass.cpp
R libcxx/test/libcxx/containers/sequences/array/array.zero/assert.subscript.pass.cpp
M libcxx/test/libcxx/input.output/iostream.format/print.fun/transcoding.pass.cpp
A libcxx/test/std/containers/sequences/array/assert.back.pass.cpp
A libcxx/test/std/containers/sequences/array/assert.front.pass.cpp
A libcxx/test/std/containers/sequences/array/assert.indexing.pass.cpp
A libcxx/test/std/containers/sequences/array/assert.iterators.pass.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++] Add support for bounded iterators in std::array (#110729)
This patch introduces a new kind of bounded iterator that knows the size
of its valid range at compile-time, as in std::array. This allows computing
the end of the range from the start of the range and the size, which requires
storing only the start of the range in the iterator instead of both the start
and the size (or start and end). The iterator wrapper is otherwise identical
in design to the existing __bounded_iter.
Since this requires changing the type of the iterators returned by
std::array, this new bounded iterator is controlled by an ABI flag.
As a drive-by, centralize the tests for std::array::operator[] and add
missing tests for OOB operator[] on non-empty arrays.
Fixes #70864
Commit: 21835ee28d47037137ea5a73ba466211b3e1a2d1
https://github.com/llvm/llvm-project/commit/21835ee28d47037137ea5a73ba466211b3e1a2d1
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
A llvm/test/CodeGen/MIR/AMDGPU/num-phys-vgpr-spill-lanes.ll
Log Message:
-----------
[AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (#115291)
Commit: 3ad0148020ca91cc288bffd8ad36e25f7555a3bb
https://github.com/llvm/llvm-project/commit/3ad0148020ca91cc288bffd8ad36e25f7555a3bb
Author: Md Asghar Ahmad Shahid <md.asghar.ahmad.shahid at intel.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/TransposeMatmul.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/python/dialects/linalg/ops.py
M mlir/test/python/integration/dialects/linalg/opsrun.py
M mlir/test/python/integration/dialects/transform.py
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
Log Message:
-----------
[MLIR][Linalg] Re-land linalg.matmul move to ODS. + Remove/update failing obsolete OpDSL tests. (#115319)
The earlier PR(https://github.com/llvm/llvm-project/pull/104783) which
introduces
transpose and broadcast semantic to linalg.matmul was reverted due to
two failing
OpDSL test for linalg.matmul.
Since linalg.matmul is now defined using TableGen ODS instead of
Python-based OpDSL,
these test started failing and needs to be removed/updated.
This commit removes/updates the failing obsolete tests from below files.
All other files
were part of earlier PR and just cherry picked.
"mlir/test/python/integration/dialects/linalg/opsrun.py"
"mlir/test/python/integration/dialects/transform.py"
---------
Co-authored-by: Renato Golin <rengolin at systemcall.eu>
Commit: c8a7f14b276fcea68c50ee6b9007680867d2393e
https://github.com/llvm/llvm-project/commit/c8a7f14b276fcea68c50ee6b9007680867d2393e
Author: weiwei chen <weiwei.chen at modular.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
Log Message:
-----------
[Backend] Add clearSubtargetMap API for TargetMachine. (#112383)
- [x] Add `clearSubtargetInfo` API to TargetMachine and each backend to
make it possible to release memory used in each backend's
`SubtargetInfo` map if needed. Keep this API as `protected` so that it
will be used with precautions.
Commit: 79fd61575977cb792af66b442fc2c6fbe837ebe4
https://github.com/llvm/llvm-project/commit/79fd61575977cb792af66b442fc2c6fbe837ebe4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/segmented-stores.ll
Log Message:
-----------
[SLP][NFC]Add a test with the segmented loads, NFC
Commit: c87d198cd964f37343083848f8fdd58bb0b00156
https://github.com/llvm/llvm-project/commit/c87d198cd964f37343083848f8fdd58bb0b00156
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
Log Message:
-----------
[ORC] Switch to new visibility macros for JIT debug symbols (#113848)
Use LLVM_ALWAYS_EXPORT for __jit_debug_descriptor and
__jit_debug_register_code so there exported even if LLVM is not built as
a shared library.
This is part of the work to enable LLVM_BUILD_LLVM_DYLIB and plugins on
windows #109483.
Commit: c3e9f4845452f7e752014773425745c9fb5558d1
https://github.com/llvm/llvm-project/commit/c3e9f4845452f7e752014773425745c9fb5558d1
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] port 4d4024e1edf3
Commit: ec05b883653ba1bb9e92399f78b99a9d9342efc0
https://github.com/llvm/llvm-project/commit/ec05b883653ba1bb9e92399f78b99a9d9342efc0
Author: Devajith <devajith.valaparambil.sreeramaswamy at cern.ch>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/LineEditor/LineEditor.h
M llvm/lib/LineEditor/LineEditor.cpp
Log Message:
-----------
[lineeditor] Add `setHistorySize()` method for adjusting history size (#110092)
This patch adds a `setHistorySize` method to `LineEditor`.
This is particularly useful for tools like `clang-repl`, `clang-query`,
`mlir-query`, and other REPL interfaces, where managing history size
might be needed.
Commit: 7aa02f9e3f90b13371e34f65f2828f534f935607
https://github.com/llvm/llvm-project/commit/7aa02f9e3f90b13371e34f65f2828f534f935607
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn] port c6f3b7bcd0596d3 (libc++ __config_site HAS_NO -> HAS)
Commit: 85eec89600085a054650585d3a3287a6e0a93a50
https://github.com/llvm/llvm-project/commit/85eec89600085a054650585d3a3287a6e0a93a50
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
Log Message:
-----------
[lldb][test] Disable new dwarf5 integral member tests on Windows
Added by https://github.com/llvm/llvm-project/pull/111859
Due to:
https://lab.llvm.org/buildbot/#/builders/141/builds/3691
This is not uncommon with DWARF testing on Windows. We may be
discarding the required information during linking.
I will look into it next week.
Commit: 24e2e259a06d9aa67dc278ac24dcb98da9dd63f6
https://github.com/llvm/llvm-project/commit/24e2e259a06d9aa67dc278ac24dcb98da9dd63f6
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
A clang/test/C/C2y/n3344.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Implement WG14 N3344 (#115313)
https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3344.pdf
This paper disallows a single `void` parameter from having qualifiers or
storage class specifiers. Clang has diagnosed most of these as an error
for a long time, but `register void` was previously accepted in all C
language modes and is now being rejected in all C language modes.
Commit: d74b1f029dcb7a89820cc5163925a113b10e64e2
https://github.com/llvm/llvm-project/commit/d74b1f029dcb7a89820cc5163925a113b10e64e2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/FunctionAttrs/vector-of-pointers-getunderlyingobject-crash.ll
Log Message:
-----------
ValueTracking: Do not return nullptr from getUnderlyingObject (#115258)
Fixup for 29a5c054e6d56a912ed5ba3f84e8ca631872db8b. The failure case
should return the last value found.
Commit: 9a0e0f543e6d491beaf9d64751be21d9afb4c7bb
https://github.com/llvm/llvm-project/commit/9a0e0f543e6d491beaf9d64751be21d9afb4c7bb
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/test/C/C2y/n3344.c
Log Message:
-----------
Fix failing test bot
This addresses the issue found by:
https://lab.llvm.org/buildbot/#/builders/144/builds/11070
Commit: 76a52db1edbd681058c291da0314af24b42925a3
https://github.com/llvm/llvm-project/commit/76a52db1edbd681058c291da0314af24b42925a3
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/test/Transforms/OpenMP/add_attributes.ll
Log Message:
-----------
[OpenMP] Add missing SExt attributes on i32 args. (#115242)
__kmpc_omp_taskwait_deps_51 arguments fixed.
Commit: e373ba46bb42790dc7aba4c1d7ba0c1590d5e7f4
https://github.com/llvm/llvm-project/commit/e373ba46bb42790dc7aba4c1d7ba0c1590d5e7f4
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/tools/llvm-objdump/XCOFF/private-header-auxiliary.test
M llvm/tools/llvm-objdump/XCOFFDump.cpp
Log Message:
-----------
[llvm-objdump] Implement decoding auxiliary header for xcoff with llvm-objdump --private-headers (#105682)
Implement decoding auxiliary header of XCOFF object file with
llvm-objdump --private-headers
Commit: 8449bf3d2137c467cd57a3a80663a9714dd57652
https://github.com/llvm/llvm-project/commit/8449bf3d2137c467cd57a3a80663a9714dd57652
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add release note for WG14 N3298
Commit: 03baa0ad6140789fc2851f655a4b88c938ec5e14
https://github.com/llvm/llvm-project/commit/03baa0ad6140789fc2851f655a4b88c938ec5e14
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/Headers/avxintrin.h
M clang/test/CodeGen/X86/avx-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm256_set_pd/_mm256_set_ps/_mm256_set1_pd/_mm256_set1_ps/_mm256_setr_pd/_mm256_setr_ps
Commit: 39e6dc09d2fe824647bc168fbe96f1fc57cb0998
https://github.com/llvm/llvm-project/commit/39e6dc09d2fe824647bc168fbe96f1fc57cb0998
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/test/CodeGen/X86/avx-builtins.c
Log Message:
-----------
[clang][x86] avx-builtins.c - reorder tests to keep alpha sorting order. NFC.
Commit: 522880cb99b0573d8689eee083b28af18ff3f9c2
https://github.com/llvm/llvm-project/commit/522880cb99b0573d8689eee083b28af18ff3f9c2
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/riscv.c
Log Message:
-----------
[compiler-rt][RISCV] Avoid using __init_riscv_feature_bits as a direc… (#115316)
…t constructor
`__init_riscv_feature_bits` takes an argument that can be
platform-specific, potentially pointing to the VDSO address of the
hwprobe system call for Linux. However, marking it as a constructor does
not guarantee that 0/NULL will always be passed to this argument, which
may result in treating an uninitialized or garbage value as a pointer to
hwprobe, leading to a crash.
The simplest solution is to introduce a small constructor function to
ensure that the platform-specific argument is set to 0/NULL.
Commit: 392807ec3e7243fee98bec5d59ea8ea58ad022cd
https://github.com/llvm/llvm-project/commit/392807ec3e7243fee98bec5d59ea8ea58ad022cd
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
Log Message:
-----------
[RISCV] Separate HW/SW shadow stack on RISC-V (#112478)
This patch follows https://github.com/llvm/llvm-project/pull/112477.
Previously `-fsanitize=shadow-call-stack` (which get transform to
`Attribute::ShadowCallStack`) is used for enable both hardware and
software shadow stack, and another option `-force-sw-shadow-stack` is
needed if the user wants to use the software shadow stack where hardware
software shadow stack could be supported. It decouples both by using the
string attribute `hw-shadow-stack` to distinguish from the software
shadow stack attribute.
Commit: 5a8956ea8b8ac1ef7b6c4e42553a55063ab699ea
https://github.com/llvm/llvm-project/commit/5a8956ea8b8ac1ef7b6c4e42553a55063ab699ea
Author: Keith Packard <keithp at keithp.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/aarch64/sme-libc-mem-routines.S
M compiler-rt/lib/builtins/aarch64/sme-libc-routines.c
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[compiler-rt][libunwind] Support aarch64 without FPU (#111235)
These two libraries don't build for `-march=armv8-a+nofp
-mabi=aapcs-soft` as a couple of uses of floating point instructions and
registers have crept in.
In libunwind, skip save/restore of FPU registers on targets without them.
In compiler-rt, fall back to the old C implementation of __arm_sc_memset when
the target doesn't have an FPU.
---------
Signed-off-by: Keith Packard <keithp at keithp.com>
Commit: ef353b02b0728f2328c3494c70dc426d58d23508
https://github.com/llvm/llvm-project/commit/ef353b02b0728f2328c3494c70dc426d58d23508
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-ptr.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-return-value.cpp
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
Introduce a new WebKit checker for a unchecked call arguments (#113708) (#114522)
This PR introduces alpha.webkit.UncheckedCallArgsChecker which detects a
function argument which is a raw reference or a raw pointer to a
CheckedPtr capable object.
Commit: 9fd3c4115cf2cd3da1405e1f2c38d53582b5dc81
https://github.com/llvm/llvm-project/commit/9fd3c4115cf2cd3da1405e1f2c38d53582b5dc81
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libcxx/include/__expected/unexpected.h
M libcxx/test/std/utilities/expected/expected.unexpected/equality.pass.cpp
Log Message:
-----------
[libc++] Fix `unexpected` heterogeneous comparison (#115249)
Currently, libc++ incorrectly rejects heterogeneous comparison of
`unexpected`, because the `operator==` is only a hidden friend of
`unexpected<_Err>` but not of `unexpected<_Err2>`. We need to call the
`error()` member function on `__y`.
Fixes #115326
Commit: f58757b8dc167809b69ec00f9b5ab59281df0902
https://github.com/llvm/llvm-project/commit/f58757b8dc167809b69ec00f9b5ab59281df0902
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
[SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (#114946)
Commit: c1ead03e01e47c797e32a3f981ace5ef21eebd18
https://github.com/llvm/llvm-project/commit/c1ead03e01e47c797e32a3f981ace5ef21eebd18
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
A clang/test/C/C2y/n3364.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Add conformance test for WG14 N3364 (#115332)
This paper is defining the translation-time behavior of initialization
with a signaling NaN. Clang has always supported the correct behavior.
Commit: ed6c106e6a9e4855f9bf328674be3d3c6ceb9586
https://github.com/llvm/llvm-project/commit/ed6c106e6a9e4855f9bf328674be3d3c6ceb9586
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace errorCount with errCount(ctx)
to reduce reliance on the global context.
Commit: 9501af5f92bb31fa9527d12a4b17b88d9fd651c4
https://github.com/llvm/llvm-project/commit/9501af5f92bb31fa9527d12a4b17b88d9fd651c4
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/LineEditor/LineEditor.h
M llvm/lib/LineEditor/LineEditor.cpp
Log Message:
-----------
Revert "[lineeditor] Add `setHistorySize()` method for adjusting history size (#110092)"
This reverts commit ec05b883653ba1bb9e92399f78b99a9d9342efc0.
Reason: buildbot breakage (https://lab.llvm.org/buildbot/#/builders/66/builds/5904)
/home/b/sanitizer-x86_64-linux/build/llvm-project/llvm/lib/LineEditor/LineEditor.cpp:23:15: error: unused variable 'DefaultHistorySize' [-Werror,-Wunused-const-variable]
23 | constexpr int DefaultHistorySize = 800;
| ^~~~~~~~~~~~~~~~~~
1 error generated.
Commit: c980cc086989a5910c4e6321063e805f767a3b90
https://github.com/llvm/llvm-project/commit/c980cc086989a5910c4e6321063e805f767a3b90
Author: Job Henandez Lara <jobhdezlara93 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libc/hdr/func/CMakeLists.txt
R libc/hdr/func/_Exit.h
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/at_quick_exit_test.cpp
M libc/test/src/stdlib/atexit_test.cpp
Log Message:
-----------
[libc] Remove _Exit proxy func header and use LIBC_NAMESPACE::_Exit in tests (#114904)
This improves/fixes this pr
https://github.com/llvm/llvm-project/pull/114718. In this PR we removed
the _Exit proxy func because it was not needed. Instead we used
`LIBC_NAMESPACE::_Exit`
Commit: f8b96160feb99b3fc37b1857caf2abcfea7e5a06
https://github.com/llvm/llvm-project/commit/f8b96160feb99b3fc37b1857caf2abcfea7e5a06
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/CXX/temp/temp.res/p4.cpp
Log Message:
-----------
[Clang] skip default argument instantiation for non-defining friend declarations (#113777)
This fixes a crash when instantiating default arguments for templated
friend function declarations which lack a definition.
There are implementation limits which prevents us from finding the
pattern for such functions, and this causes difficulties
setting up the instantiation scope for the function parameters.
This patch skips instantiating the default argument in these cases,
which causes a minor regression in error recovery, but otherwise avoids
the crash.
Fixes #113324
Commit: e8b7d8bfb5692d73df3d8e728925f62fb3bd9ec5
https://github.com/llvm/llvm-project/commit/e8b7d8bfb5692d73df3d8e728925f62fb3bd9ec5
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/test/CodeGen/aarch64-cpu-supports-target.c
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGenCXX/attr-target-version.cpp
M clang/test/Sema/aarch64-cpu-supports.c
M clang/test/Sema/attr-target-clones-aarch64.c
M clang/test/SemaCXX/attr-target-version.cpp
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/lib/Target/AArch64/AArch64FMV.td
Log Message:
-----------
[FMV][AArch64] Remove features which expose non exploitable runtime behavior. (#114387)
Features ebf16, memtag3, and rpres allow existing instructions to behave
differently depending on the value of certain control registers. FMV
does not read the content of control registers making these features
unsuitable for runtime dispatch. See the ACLE patch for more info:
https://github.com/ARM-software/acle/pull/355
Commit: 7c63b10fce562ce2c0caa436fd163ad57e011bf6
https://github.com/llvm/llvm-project/commit/7c63b10fce562ce2c0caa436fd163ad57e011bf6
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[NFC][AMDGPU] Guard FP8 related instructions properly (#115211)
Currently `fp8-insts` is used in the front end to guard builtins, but the
corresponding feature is never used in tablegen files to guard those
instructions. Intead, it uses `isGFX940Plus`. The `gfx9-4-generic target` doesn't
support those instructions, thus we need to update the guard properly.
Commit: ef8d88ca1af0a8348bc616e93d50919462224d9b
https://github.com/llvm/llvm-project/commit/ef8d88ca1af0a8348bc616e93d50919462224d9b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Support scalar to array data transfer (#115273)
Do it via descriptor assignment until we have a more efficient way.
Commit: c13258ac495af2cca829752405123b5c9b70fa80
https://github.com/llvm/llvm-project/commit/c13258ac495af2cca829752405123b5c9b70fa80
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/SyntheticSections.cpp
M lld/test/ELF/arm-fix-cortex-a8-blx.s
M lld/test/ELF/arm-fix-cortex-a8-recognize.s
Log Message:
-----------
[ELF] Replace log with Log(ctx)
Commit: 9a43ae5514d7fa306b58a221fe80e1f87259e7b8
https://github.com/llvm/llvm-project/commit/9a43ae5514d7fa306b58a221fe80e1f87259e7b8
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU] Introduce a "new" target feature `xf32-insts` (#115214)
The feature itself is not new. Just to use it to guard corresponding instructions. No test is needed, like its parent PR.
Commit: 6ca50a2593641f45b5310d907e6323f5eb367dfa
https://github.com/llvm/llvm-project/commit/6ca50a2593641f45b5310d907e6323f5eb367dfa
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libclc/generic/lib/relational/binary_def.inc
M libclc/generic/lib/relational/unary_def.inc
Log Message:
-----------
[libclc] Correct use of CLC macro on two definitions
_CLC_DECL is for declarations and _CLC_DEF for definitions, as the names
imply.
No change to any bitcode module.
Commit: 5f4e3a3ced525c84a5268e51a56fe47b5456fd81
https://github.com/llvm/llvm-project/commit/5f4e3a3ced525c84a5268e51a56fe47b5456fd81
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/APINotes/Types.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
M clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/lifetimebound.cpp
Log Message:
-----------
[clang] Support 'this' position for lifetimebound attribute (#115021)
This patch makes the position -1 interpreted as the position for 'this'.
Adds some basic infrastructure and support for lifetimebound attribute.
Commit: bc7e099aa82d44b5682ec3dbd1322ccc5000a50d
https://github.com/llvm/llvm-project/commit/bc7e099aa82d44b5682ec3dbd1322ccc5000a50d
Author: dyung <douglas.yung at sony.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
R llvm/test/CodeGen/MIR/AMDGPU/num-phys-vgpr-spill-lanes.ll
Log Message:
-----------
Revert "[AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes" (#115353)
Reverts llvm/llvm-project#115291
Reverting due to test failures on many bots including
https://lab.llvm.org/buildbot/#/builders/174/builds/8049
Commit: 7760ae7b608193a410b71df7ae7daccf2a6b09c1
https://github.com/llvm/llvm-project/commit/7760ae7b608193a410b71df7ae7daccf2a6b09c1
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
Log Message:
-----------
[X86] Switch to the new symbol visibility macros (#109982)
Switch LLVMInitialize* functions to new the symbol visibility macros
that will work for windows.
This is part of the work to enable LLVM_BUILD_LLVM_DYLIB and plugins on
windows.
Commit: bf30b6c33c17d43402d23f8cade450437fcff800
https://github.com/llvm/llvm-project/commit/bf30b6c33c17d43402d23f8cade450437fcff800
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
A clang/test/CodeGenHLSL/builtins/dot4add_u8packed.hlsl
A clang/test/SemaHLSL/BuiltIns/dot4add_u8packed-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/dot4add_u8packed.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_u8packed.ll
Log Message:
-----------
[HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (#115068)
```- create a clang built-in in Builtins.td
- link dot4add_u8packed in hlsl_intrinsics.h
- add lowering to spirv backend through expansion of operation as OpUDot is missing up to SPIRV 1.6 in SPIRVInstructionSelector.cpp
- add lowering to spirv backend using OpUDot if applicable SPIRV version or SPV_KHR_integer_dot_product is enabled
- add dot4add_u8packed intrinsic to IntrinsicsDirectX.td and mapping to DXIL.td op Dot4AddU8Packed
- add tests for HLSL intrinsic lowering to dx/spv intrinsic in dot4add_u8packed.hlsl
- add tests for sema checks in dot4add_u8packed-errors.hlsl
- add test of spir-v lowering in SPIRV/dot4add_u8packed.ll
- add test to dxil lowering in DirectX/dot4add_u8packed.ll
```
Resolves #99219
Commit: e8b70e97447dc0d93a277b0373345d3a1bae1aa9
https://github.com/llvm/llvm-project/commit/e8b70e97447dc0d93a277b0373345d3a1bae1aa9
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/docs/TableGen/ProgRef.rst
M llvm/lib/TableGen/Record.cpp
M llvm/test/TableGen/true-false.td
Log Message:
-----------
[TableGen] Make `!and` and `!or` short-circuit (#113963)
The idea is that by preemptively simplifying the result of `!and` and `!or`, we can fold
some of the conditional operators, like `!if` or `!cond`, as early as
possible.
Commit: 7f60f1312ae007d645fc96618db1238baea088b9
https://github.com/llvm/llvm-project/commit/7f60f1312ae007d645fc96618db1238baea088b9
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
A llvm/test/CodeGen/AMDGPU/unnamed-function-resource-info.ll
Log Message:
-----------
[AMDGPU] Fix resource usage information for unnamed functions (#115320)
Resource usage information would try to overwrite unnamed functions if
there are multiple within the same compilation unit. This aims to either
use the `MCSymbol` assigned to the unnamed function (i.e.,
`CurrentFnSym`), or, rematerialize the `MCSymbol` for the unnamed
function.
Commit: b970a78335a3d46a6dbdaa762e7285e9a90c969c
https://github.com/llvm/llvm-project/commit/b970a78335a3d46a6dbdaa762e7285e9a90c969c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (#115101)
I plan to make i32 an illegal type for RV64 to match SelectionDAG and to
remove i32 from the GPR register class.
I've added 2 custom nodes for CTZW and CLZW to match SelectionDAG. For
cpopw we pattern match G_AND+G_CTPOP in isel.
Commit: 22b4b1ab1050b4210f3c5dae54c0503ef7ad85f3
https://github.com/llvm/llvm-project/commit/22b4b1ab1050b4210f3c5dae54c0503ef7ad85f3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
Revert "[SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (#114946)"
This reverts commit f58757b8dc167809b69ec00f9b5ab59281df0902.
Failing buildbots:
https://lab.llvm.org/buildbot/#/builders/174/builds/8058
https://lab.llvm.org/buildbot/#/builders/127/builds/1357
Commit: ef73533f36d5f2132630e88899b5e64999cb8364
https://github.com/llvm/llvm-project/commit/ef73533f36d5f2132630e88899b5e64999cb8364
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libcxx/include/__utility/small_buffer.h
Log Message:
-----------
[z/OS][libc++] Remove `align_val_t` dependency in small_buffer.h (#114396)
Rewriting `__alloc()` and `__dealloc()` template functions to avoid errors when `small_buffer.h` is
included in the modules LIT tests. For example:
```
test-suite-install/include/c++/v1/__utility/small_buffer.h:69:81: error: use of undeclared identifier 'align_val_t'
# | 69 | byte* __allocation = static_cast<byte*>(::operator new[](sizeof(_Stored), align_val_t{alignof(_Stored)}));
# | | ^
```
Commit: 7bd9be2e0a74e6d17ec3f95ff364a4461dec4dbe
https://github.com/llvm/llvm-project/commit/7bd9be2e0a74e6d17ec3f95ff364a4461dec4dbe
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/HIPUtility.cpp
Log Message:
-----------
[Driver] Use heterogenous lookups with std::set (NFC) (#115259)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: c714f928b2f9ab3dd481f272a2aa72b83fd0562e
https://github.com/llvm/llvm-project/commit/c714f928b2f9ab3dd481f272a2aa72b83fd0562e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/InstallAPI/Frontend.cpp
Log Message:
-----------
[InstallAPI] Call DenseMap::find without constructing std::string (NFC) (#115260)
KnownIncludes is of DenseMap<StringRef, HeaderType>, so we don't need
to allocate a temporary instance of std::string.
Commit: 937e5069a740837ea3cb466df8e75a53f6d48254
https://github.com/llvm/llvm-project/commit/937e5069a740837ea3cb466df8e75a53f6d48254
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/Internalize.cpp
Log Message:
-----------
[IPO] Simplify code with DenseMap::operator[] (NFC) (#115261)
Commit: 1ae5ecca4afb5134899d79e446afd0296d1ed5ef
https://github.com/llvm/llvm-project/commit/1ae5ecca4afb5134899d79e446afd0296d1ed5ef
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#115262)
Commit: b02e5bc5b1be9d94689ebe1cf1244b7da540fb19
https://github.com/llvm/llvm-project/commit/b02e5bc5b1be9d94689ebe1cf1244b7da540fb19
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/ObjCARC/ProvenanceAnalysis.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/LoopPredication.cpp
M llvm/lib/Transforms/Scalar/LowerWidenableCondition.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
Log Message:
-----------
[Transforms] Remove unused includes (NFC) (#115263)
Identified with misc-include-cleaner.
Commit: 4ac891cdd286b251a445c1e3a77d56f55a29858b
https://github.com/llvm/llvm-project/commit/4ac891cdd286b251a445c1e3a77d56f55a29858b
Author: Job Henandez Lara <jobhdezlara93 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libc/test/src/stdlib/at_quick_exit_test.cpp
M libc/test/src/stdlib/atexit_test.cpp
Log Message:
-----------
[libc] Add the `src/stdlib/_Exit.h` header to `at_quick_exit_test.cpp` and `atexit_test.cpp` (#115351)
Hello, I merged this https://github.com/llvm/llvm-project/pull/114904 a
few mins ago and the tests failed because i did not add the header
`src/stdlib/_Exit.h` in `at_quick_exit_test.cpp` and `atexit_test.cpp`.
I ran both builds/tests and everything was good. thanks
Commit: b7a8f5f4c978856852bc39dc3d29265756e37cfe
https://github.com/llvm/llvm-project/commit/b7a8f5f4c978856852bc39dc3d29265756e37cfe
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Exit early from attempt-to-reorder, if it is useless
Adds early exits, which just save compile time. It can exit earl, if the
total number of scalars is 2, or all scalars are constant, or the opcode
is the same and not alternate. In this case reordering will not happen
and compiler can exit early to save compile time
Commit: 200afcf6128911892d61c2a331186fe9a4da2a3e
https://github.com/llvm/llvm-project/commit/200afcf6128911892d61c2a331186fe9a4da2a3e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[RISCV] Add combines_for_extload to RISCVPostLegalizerCombiner.
Commit: 60e3a81c4299baf80e7b80db9cb8368223ee9546
https://github.com/llvm/llvm-project/commit/60e3a81c4299baf80e7b80db9cb8368223ee9546
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/test/API/functionalities/abbreviation/TestAbbreviations.py
Log Message:
-----------
[lldb] Add builtin e alias for expression (#115359)
The changes in 461f859a72 (llvm/llvm-project#65974) resulted in a change
in behavior not just for completion, but also for selection of inexect
commands.
Since many use `e` to mean `expression`, this change adds an alias for
`e`. Note that the referenced change similarly aliases `h` to `help`.
Commit: 3f4df523152054224709ba88e9afd4efa22021c9
https://github.com/llvm/llvm-project/commit/3f4df523152054224709ba88e9afd4efa22021c9
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 427a5cf105c4
Commit: e9cb9285ced8d914048e0ccaf1900ffc75bdeee4
https://github.com/llvm/llvm-project/commit/e9cb9285ced8d914048e0ccaf1900ffc75bdeee4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port cacbe71af7b1
Commit: 64c921875a833136e7417c9077f55cc0c37773b7
https://github.com/llvm/llvm-project/commit/64c921875a833136e7417c9077f55cc0c37773b7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
Log Message:
-----------
[gn build] Port d2aff182d379
Commit: 3deee235986802694175259e078dfad0edcb40ed
https://github.com/llvm/llvm-project/commit/3deee235986802694175259e078dfad0edcb40ed
Author: Ian Wood <75152913+IanWood1 at users.noreply.github.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/InferIntRangeInterfaceImpls.cpp
Log Message:
-----------
[mlir] IntegerRangeAnalysis: don't loop over splat attr (#115229)
If the `DenseIntElementsAttr` is a splat value, there is no need to loop
over the entire attr. Instead, just update with the splat value.
Commit: 1fef4ad188dfad0e39f93e4b0330780118f27305
https://github.com/llvm/llvm-project/commit/1fef4ad188dfad0e39f93e4b0330780118f27305
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
R llvm/test/MC/Disassembler/AMDGPU/vinterp-fake16.txt
A llvm/test/MC/Disassembler/AMDGPU/vinterp.txt
Log Message:
-----------
[AMDGPU][True16][MC] update true16 flag on vinterp test (#115356)
A non-funcitonal change.
update true16 flag on vinterp dasm test
Commit: 09fb01a5e564a0cb7c121e1cc529e9aa30d95108
https://github.com/llvm/llvm-project/commit/09fb01a5e564a0cb7c121e1cc529e9aa30d95108
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
Log Message:
-----------
[gn build] Enable hwasan for aarch64 Android (#115219)
Commit: 15d1560ea4047a2b4b14c826767089f538ddda70
https://github.com/llvm/llvm-project/commit/15d1560ea4047a2b4b14c826767089f538ddda70
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/lib/Basic/Attributes.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[Clang] Improve EmitClangAttrSpellingListIndex (#114899)
`EmitClangAttrSpellingListIndex()` performs a lot of unnecessary string
comparisons which is wasteful in time and stack space. This commit
attempts to refactor this method to be more performant.
Commit: dd1c99bac4dc1d5ceeadc79dd31fa12f3e615f18
https://github.com/llvm/llvm-project/commit/dd1c99bac4dc1d5ceeadc79dd31fa12f3e615f18
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[TableGen] Fix a warning
This patch fixes:
clang/utils/TableGen/ClangAttrEmitter.cpp:3869:51: error: captured
structured bindings are a C++20 extension
[-Werror,-Wc++20-extensions]
Commit: 1f2509993e6e0717b547b5214b06550af4f3008f
https://github.com/llvm/llvm-project/commit/1f2509993e6e0717b547b5214b06550af4f3008f
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/updateCounter.ll
Log Message:
-----------
[DirectX] introducing lowering for `bufferUpdateCounter` (#115041)
- Adding custom lowering for `bufferUpdateCounter`
- introduces llvm intrinsic `int_dx_updateCounter`
- adds tests
Closes #92147
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 87feafc391ab1e35997994ad378af727e4947c67
https://github.com/llvm/llvm-project/commit/87feafc391ab1e35997994ad378af727e4947c67
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
Log Message:
-----------
[RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (#115107)
I plan to make i32 an illegal type for RV64 to match SelectionDAG and to
remove i32 from the GPR register class.
RORW/ROLW target opcodes are added to match SelectionDAG.
The regression in rv64zbb-zbkb.ll requires factoring
isSExtCheaperThanZExt into the G_ANYEXT constant folder. That requires
some interface changes so I didn't do it in this patch.
Commit: de41b137ddb68b5172f1ab042b0b0b495afbb490
https://github.com/llvm/llvm-project/commit/de41b137ddb68b5172f1ab042b0b0b495afbb490
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A offload/cmake/caches/Offload.cmake
M openmp/docs/SupportAndFAQ.rst
Log Message:
-----------
[Offload] Provide a CMake cache file to easily build offloading (#115074)
Summary:
This patch adds a cache file that will automatically enable openpm,
offload, and all the fancy GPU libraries.
Commit: e109c493210572535de25950e7b83f74b8d11a6a
https://github.com/llvm/llvm-project/commit/e109c493210572535de25950e7b83f74b8d11a6a
Author: Pranav Kant <prka at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/STLFunctionalExtras.h
Log Message:
-----------
Revert "Add clang::lifetimebound annotation to llvm::function_ref (#1… (#115376)
…15019)"
This reverts commit 9f796159f28775b3f93d77e173c1fd3413c2e60e.
This is breaking compiler-rt/lib/sanitizer_common/...
Author knows about the breakage.
Commit: dec38399795a7f238508ee100e5b057165724a60
https://github.com/llvm/llvm-project/commit/dec38399795a7f238508ee100e5b057165724a60
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/repeated-address-store.ll
Log Message:
-----------
[SLP][NFC]Add a test with the missed vectorization opportunity for stores with same address
Commit: ae9d0623ad65d84022bb4ed8446b6491451ae575
https://github.com/llvm/llvm-project/commit/ae9d0623ad65d84022bb4ed8446b6491451ae575
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-f16-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-itofp-f16-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-itofp-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-f16-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (#115236)
I plan to make i32 an illegal type for RV64 to match SelectionDAG and to
remove i32 from the GPR register class.
I've added a sexti32 ComplexPattern to select sext.w+fcvt.s.l as
fcvt.s.w. The recently added zexti32 handles selecting and+fcvt.s.lu as
fcvt.s.wu. There are still some regressions that suggest we should match
g_zero_extend in zexti32.
Commit: 7475156d49406785a974b1205d11fe3de9c1553e
https://github.com/llvm/llvm-project/commit/7475156d49406785a974b1205d11fe3de9c1553e
Author: Bill Wendling <morbo at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/AST/ast-print-builtin-counted-by-ref.c
A clang/test/CodeGen/builtin-counted-by-ref.c
A clang/test/Sema/builtin-counted-by-ref.c
A clang/test/Sema/builtin-counted-by-ref.cpp
Log Message:
-----------
[Clang] Add __builtin_counted_by_ref builtin (#114495)
The __builtin_counted_by_ref builtin is used on a flexible array
pointer and returns a pointer to the "counted_by" attribute's COUNT
argument, which is a field in the same non-anonymous struct as the
flexible array member. This is useful for automatically setting the
count field without needing the programmer's intervention. Otherwise
it's possible to get this anti-pattern:
ptr = alloc(<ty>, ..., COUNT);
ptr->FAM[9] = 42; /* <<< Sanitizer will complain */
ptr->count = COUNT;
To prevent this anti-pattern, the user can create an allocator that
automatically performs the assignment:
#define alloc(TY, FAM, COUNT) ({ \
TY __p = alloc(get_size(TY, COUNT)); \
if (__builtin_counted_by_ref(__p->FAM)) \
*__builtin_counted_by_ref(__p->FAM) = COUNT; \
__p; \
})
The builtin's behavior is heavily dependent upon the "counted_by"
attribute existing. It's main utility is during allocation to avoid
the above anti-pattern. If the flexible array member doesn't have that
attribute, the builtin becomes a no-op. Therefore, if the flexible
array member has a "count" field not referenced by "counted_by", it
must be set explicitly after the allocation as this builtin will
return a "nullptr" and the assignment will most likely be elided.
---------
Co-authored-by: Bill Wendling <isanbard at gmail.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: bdf8e308b7ea430f619ca3aa1199a76eb6b4e2d4
https://github.com/llvm/llvm-project/commit/bdf8e308b7ea430f619ca3aa1199a76eb6b4e2d4
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
Log Message:
-----------
AMDGPU: Don't avoid clamp of bit shift in BFE pattern (#115372)
Enable pattern matching from "x<<32-y>>32-y" to "bfe x, 0, y" when we
know y is in [0,31].
This is the follow-up for the PR:
https://github.com/llvm/llvm-project/pull/114279 to fix the issue:
https://github.com/llvm/llvm-project/issues/114282
Commit: 62db1c8a076c7167e404412182f4a8915f4ff6ee
https://github.com/llvm/llvm-project/commit/62db1c8a076c7167e404412182f4a8915f4ff6ee
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/repeated-address-store.ll
Log Message:
-----------
[SLP]Better decision making on whether to try stores packs for vectorization
Since the stores are sorted by distance, comparing the indices in the
original array and early exit, if the index is less than the index of
the last store, not always the best strategy. Better to remove such
stores explicitly to try better to check for the vectorization
opportunity.
Fixes #115008
Commit: c02da382471fd0b338af76ce220e9567e3cb854a
https://github.com/llvm/llvm-project/commit/c02da382471fd0b338af76ce220e9567e3cb854a
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
Log Message:
-----------
[RISCV] Add tests for deinterleave(2-8) shuffles
Commit: 02668f60a9b5c0d5b8b6e60b4e897f763ad59a91
https://github.com/llvm/llvm-project/commit/02668f60a9b5c0d5b8b6e60b4e897f763ad59a91
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
Log Message:
-----------
[RISCV] Match single source deinterleave shuffles for vnsrl (#114878)
We had previously only been matching the two source case where both
sources came from a wider source type. We can also match the single
source case - provided the result is m4 or smaller because we will need
a wider type to represent the source.
The main goal of this to ensure that vnsrl matching is robust to a
possible change in canonicalization for length changing shuffles that
I'm considering, but it has the nice effect of picking up a few cases we
missed along the way.
Commit: e189d61924ba0165b3a344c3d945b3e2aa373485
https://github.com/llvm/llvm-project/commit/e189d61924ba0165b3a344c3d945b3e2aa373485
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/unittests/Transforms/Instrumentation/CMakeLists.txt
A llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Add extractCallsFromIR (#115218)
This patch adds extractCallsFromIR, a function to extract calls from
the IR, which will be used to undrift call site locations in the
MemProf profile.
In a nutshell, the MemProf undrifting works as follows:
- Extract call site locations from the IR.
- Extract call site locations from the MemProf profile.
- Undrift the call site locations with longestCommonSequence.
This patch implements the first bullet point above. Specifically,
given the IR, the new function returns a map from caller GUIDs to
lists of corresponding call sites. For example:
Given:
foo() {
f1();
f2(); f3();
}
extractCallsFromIR returns:
Caller: foo ->
{{(Line 1, Column 3), Callee: f1},
{(Line 2, Column 3), Callee: f2},
{(Line 2, Column 9), Callee: f3}}
where the line numbers, relative to the beginning of the caller, and
column numbers are sorted in the ascending order. The value side of
the map -- the list of call sites -- can be directly passed to
longestCommonSequence.
To facilitate the review process, I've only implemented basic features
in extractCallsFromIR in this patch.
- The new function extracts calls from the LLVM "call" instructions
only. It does not look into the inline stack.
- It does not recognize or treat heap allocation functions in any
special way.
I will address these missing features in subsequent patches.
Commit: 53e49f15ab0b9b03e5671faea6f7870914b8f0ea
https://github.com/llvm/llvm-project/commit/53e49f15ab0b9b03e5671faea6f7870914b8f0ea
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTRecordWriter.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
Log Message:
-----------
[clang][serialization] Pass `ASTContext` explicitly (#115235)
This patch removes `ASTWriter::Context` and starts passing `ASTContext
&` explicitly to functions that actually need it. This is a
non-functional change with the end-goal of being able to write
lightweight PCM files with no `ASTContext` at all.
Commit: fd799add2186356dc19e81106a1428a2edf7c20b
https://github.com/llvm/llvm-project/commit/fd799add2186356dc19e81106a1428a2edf7c20b
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
M libcxxabi/include/CMakeLists.txt
Log Message:
-----------
Reapply "[libc++abi] Stop copying headers to the build directory"
This was needed before https://github.com/llvm/llvm-project/pull/115077
since the compiler-rt test build made assumptions about the build
layout of libc++ and libc++abi, but now they link against a local
installation of these libraries so we no longer need this workaround.
The last attempt at landing this was reverted due to buildbot failures
which should be fixed by https://github.com/llvm/llvm-zorg/pull/299.
Pull Request: https://github.com/llvm/llvm-project/pull/115379
Commit: 3b1b1271fb552c996d9fdfa9a997f33013dd275f
https://github.com/llvm/llvm-project/commit/3b1b1271fb552c996d9fdfa9a997f33013dd275f
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
M llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
A llvm/lib/Target/Xtensa/XtensaMachineFunctionInfo.h
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.h
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaTargetMachine.h
A llvm/test/CodeGen/Xtensa/branch-relaxation.ll
M llvm/test/CodeGen/Xtensa/ctlz-cttz-ctpop.ll
Log Message:
-----------
[Xtensa] Implement support for the BranchRelaxation. (#113450)
Commit: 49ee6069db372ce326bc36678e745459868c3771
https://github.com/llvm/llvm-project/commit/49ee6069db372ce326bc36678e745459868c3771
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryBasicBlock.h
M bolt/include/bolt/Core/FunctionLayout.h
M bolt/include/bolt/Passes/LongJmp.h
M bolt/lib/Core/FunctionLayout.cpp
M bolt/lib/Passes/LongJmp.cpp
A bolt/test/AArch64/compact-code-model.s
Log Message:
-----------
[BOLT][AArch64] Add support for compact code model (#112110)
Add `--compact-code-model` option that executes alternative branch
relaxation with an assumption that the resulting binary has less than
128MB of code. The relaxation is done in `relaxLocalBranches()`, which
operates on a function level and executes on multiple functions in
parallel.
Running the new option on AArch64 Clang binary produces slightly smaller
code and the relaxation finishes in about 1/10th of the time.
Note that the new `.text` has to be smaller than 128MB, *and* `.plt` has
to be closer than 128MB to `.text`.
Commit: faefedf7f8d520035a7c699baa12d5bb9bb93f49
https://github.com/llvm/llvm-project/commit/faefedf7f8d520035a7c699baa12d5bb9bb93f49
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/newhdrgen/yaml/math.yaml
M libc/spec/stdc.td
M libc/src/math/CMakeLists.txt
A libc/src/math/exp10m1f.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/exp10m1f.cpp
M libc/src/math/generic/explogxf.h
M libc/test/UnitTest/FPMatcher.h
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/exp10m1f_test.cpp
A libc/test/src/math/exp10m1f_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/exp10m1f_test.cpp
Log Message:
-----------
[libc][math][c23] Add exp10m1f C23 math function (#87992)
Fixes #86503.
Commit: accd8f98be29fb086d83cd318eeba8e491fcb799
https://github.com/llvm/llvm-project/commit/accd8f98be29fb086d83cd318eeba8e491fcb799
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M bolt/lib/Passes/LongJmp.cpp
Log Message:
-----------
[BOLT] Fix a warning
This patch:
bolt/lib/Passes/LongJmp.cpp:830:14: error: variable 'NumIterations'
set but not used [-Werror,-Wunused-but-set-variable]
Commit: 1cb119b168a6d24f32b05de7f22c7a06a0f0c407
https://github.com/llvm/llvm-project/commit/1cb119b168a6d24f32b05de7f22c7a06a0f0c407
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Instrumentation/BUILD.gn
Log Message:
-----------
[gn build] Port e189d61924ba
Commit: d4525b016f5a1ab2852acb2108742b2f9d0bd3bd
https://github.com/llvm/llvm-project/commit/d4525b016f5a1ab2852acb2108742b2f9d0bd3bd
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/AST/TemplateArgumentVisitor.h
Log Message:
-----------
[Clang] Dispatch default overloads of `TemplateArgumentVisitor` to the implementation
This fixes an issue where overriding
`clang::ConstTemplateArgumentVisitor::VisitTemplateArgument` in an
implementation visitor class did not have the desired effect: the
overload was not invoked when one of the visitor methods (e.g.
`VisitDeclarationArgument`) is not implemented, instead it dispatched to
`clang::ConstTemplateArgumentVisitor::VisitTemplateArgument` itself and
always returned a default-initialized result.
This makes `TemplateArgumentVisitor` and `ConstTemplateArgumentVisitor`
follow the implicit convention that is followed elsewhere in Clang AST,
in `RecursiveASTVisitor` and `TypeVisitor`.
Commit: cd022b7b2aa9e4a5762c4e82e24b228114956e3b
https://github.com/llvm/llvm-project/commit/cd022b7b2aa9e4a5762c4e82e24b228114956e3b
Author: Ian Wood <ianwood2024 at u.northwestern.edu>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/InferIntRangeInterfaceImpls.cpp
Log Message:
-----------
Revert "[mlir] IntegerRangeAnalysis: don't loop over splat..." (#115388)
Hitting assertion in IREE
https://github.com/iree-org/iree/actions/runs/11732283897/job/32684201665?pr=19066
```
iree-compile: /__w/iree/iree/third_party/llvm-project/mlir/include/mlir/IR/BuiltinAttributes.h:423: auto mlir::DenseElementsAttr::getValues() const [T = llvm::APInt]: Assertion `succeeded(range) && "element type cannot be iterated"' failed.
```
Reverts llvm/llvm-project#115229
Commit: 5b697ef5dd6b3e29e257e6099014bf8d8e77ac9a
https://github.com/llvm/llvm-project/commit/5b697ef5dd6b3e29e257e6099014bf8d8e77ac9a
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[mlir] Update CODEOWNERS file for vector dialect (#115398)
Adding myself to stay updated on patches since I have been reviewing /
upstreaming things related to vector dialect.
Commit: 74e6478f81b646f4bcaf6236161e54c7cb239874
https://github.com/llvm/llvm-project/commit/74e6478f81b646f4bcaf6236161e54c7cb239874
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
A bolt/test/X86/callcont-fallthru.s
Log Message:
-----------
[BOLT] Set call to continuation count in pre-aggregated profile
#109683 identified an issue with pre-aggregated profile where a call to
continuation fallthrough edge count is missing (profile discontinuity).
This issue only affects pre-aggregated profile but not perf data since
LBR stack has the necessary information to determine if the trace (fall-
through) starts at call continuation, whereas pre-aggregated fallthrough
lacks this information.
The solution is to look at branch records in pre-aggregated profiles
that correspond to returns and assign counts to call to continuation
fallthrough:
- BranchFrom is in another function or DSO,
- BranchTo may be a call continuation site:
- not an entry point/landing pad.
Note that we can't directly check if BranchFrom corresponds to a return
instruction if it's in external DSO.
Keep call continuation handling for perf data (`getFallthroughsInTrace`)
[1] as-is due to marginally better performance. The difference is that
return-converted call to continuation fallthrough is slightly more
frequent than other fallthroughs since the former only requires one LBR
address while the latter need two that belong to the profiled binary.
Hence return-converted fallthroughs have larger "weight" which affects
code layout.
[1] `DataAggregator::getFallthroughsInTrace`
https://github.com/llvm/llvm-project/blob/fea18afeed39fe4435d67eee1834f0f34b23013d/bolt/lib/Profile/DataAggregator.cpp#L906-L915
Test Plan: added callcont-fallthru.s
Reviewers: maksfb, ayermolo, ShatianWang, dcci
Reviewed By: maksfb, ShatianWang
Pull Request: https://github.com/llvm/llvm-project/pull/109486
Commit: 1ced07e06e23659a96dbf6d53cd68d3bbbe3d792
https://github.com/llvm/llvm-project/commit/1ced07e06e23659a96dbf6d53cd68d3bbbe3d792
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
Log Message:
-----------
[lldb][test] TestConstStaticIntegralMember.py: XFAIL DWARFv4 variant on Darwin (#115401)
https://github.com/llvm/llvm-project/pull/111859 fixed these tests for
DWARFv4 on Linux by adjusting the manual index. As part of the change we
unXFAILed these tests for DWARFv4 on all platforms. However, the manual
index isn't used on macOS so they're still broken. This patch reverts
the XFAIL on Darwin for DWARFv4.
Example CI failure:
```
FAIL: test_inline_static_members_dwarf4_dsym (TestConstStaticIntegralMember.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1769, in test_method
return attrvalue(self)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 153, in test_inline_static_members_dwarf4
self.check_inline_static_members("-gdwarf-4")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 129, in check_inline_static_members
self.check_global_var("A::int_val", "const int", "1")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 118, in check_global_var
self.assertGreaterEqual(len(var_list), 1)
AssertionError: 0 not greater than or equal to 1
```
Commit: 74deb661dfa9301ec6fed46114e59317b1503ded
https://github.com/llvm/llvm-project/commit/74deb661dfa9301ec6fed46114e59317b1503ded
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/CXX/temp/temp.res/p4.cpp
Log Message:
-----------
Revert "[Clang] skip default argument instantiation for non-defining friend declarations without specialization info to meet [dcl.fct.default] p4" (#115404)
Reverts llvm/llvm-project#113777
Reverted due to regression reported here:
https://github.com/llvm/llvm-project/pull/113777#issuecomment-2463465741
Commit: 037f8044f69f88101620707af1db948e6804e080
https://github.com/llvm/llvm-project/commit/037f8044f69f88101620707af1db948e6804e080
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-arith-f16.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-arith.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith-f16.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-arith-f16.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-arith.mir
Log Message:
-----------
[RISCV][GISel] Add fcopysign tests with mismatched types. NFC (#115364)
fcopysign takes two operands, one for the magnitude and exponent and the
other for the sign. The result type is determined by the magnitude and
exponent operand. The sign operand does not need to be the same type.
Note, in IR all 3 types must match.
We have isel patterns for all possible combinations of types and the
legalizer thinks they are all legal, but we had no tests for it. I was
unable to find any combiner rules that would create an instruction with
mismatch types.
Commit: d3177d8b902bb2dc4a8d61cd51e2662e605d7515
https://github.com/llvm/llvm-project/commit/d3177d8b902bb2dc4a8d61cd51e2662e605d7515
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fptoi-f16-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fptoi-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fptoi-f16-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fptoi-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fptoi-f16-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fptoi-rv64.mir
Log Message:
-----------
[RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (#115268)
I plan to make i32 an illegal type for RV64 to match SelectionDAG and to
remove i32 from the GPR register class.
Commit: 1febd71b4dcff17130d3a605eda880de046bbd0f
https://github.com/llvm/llvm-project/commit/1febd71b4dcff17130d3a605eda880de046bbd0f
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
A llvm/test/Transforms/InferAddressSpaces/NVPTX/isspacep.ll
Log Message:
-----------
[NVPTX] Add TTI support for folding isspacep in InferAS (#114486)
This change enables constant folding of '`@llvm.nvvm.isspacep.*`'
intrinsics if the address space can be propagated in InferAdressSpace.
Commit: 36d757f8406a00539228e15b44bb850936871421
https://github.com/llvm/llvm-project/commit/36d757f8406a00539228e15b44bb850936871421
Author: Adam Yang <hanbyang at microsoft.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/test/CodeGenHLSL/builtins/clamp-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/clamp.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/DirectX/clamp-vec.ll
M llvm/test/CodeGen/DirectX/clamp.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/clamp.ll
A llvm/test/CodeGen/SPIRV/opencl/clamp.ll
Log Message:
-----------
[HLSL][SPIRV] Added clamp intrinsic (#113394)
Fixes #88052
- Added the following intrinsics:
- `int_spv_uclamp`
- `int_spv_sclamp`
- `int_spv_fclamp`
- Updated DirectX counterparts to have the same three clamp intrinsics.
- Update the clamp.hlsl unit tests to include SPIRV
- Added the SPIRV specific tests
Commit: 4e668d5b27a339918bee4d994fca31d962519e80
https://github.com/llvm/llvm-project/commit/4e668d5b27a339918bee4d994fca31d962519e80
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h
A llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/ELF_LoongArch_relocations.s
A llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/lit.local.cfg
Log Message:
-----------
[RuntimeDyld] Add LoongArch support
This is necessary for supporting function calls in LLDB expressions for
LoongArch.
This patch is inspired by #99336 and simply extracts the parts related
to RuntimeDyld.
Reviewed By: lhames
Pull Request: https://github.com/llvm/llvm-project/pull/114741
Commit: 1c8fca82a0f4ac6df5db539e96adcad143f5ebe7
https://github.com/llvm/llvm-project/commit/1c8fca82a0f4ac6df5db539e96adcad143f5ebe7
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/include/lldb/Utility/ArchSpec.h
M lldb/source/Plugins/ABI/CMakeLists.txt
A lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
A lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h
A lldb/source/Plugins/ABI/LoongArch/CMakeLists.txt
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
Log Message:
-----------
[lldb][LoongArch] Function calls support in lldb expressions
This patch adds desired feature flags in JIT compiler to enable
hard-float instructions if target supports them and allows to use floats
and doubles in lldb expressions.
Fited tests:
lldb-shell :: Expr/TestAnonNamespaceParamFunc.cpp
lldb-shell :: Expr/TestIRMemoryMap.test
lldb-shell :: Expr/TestStringLiteralExpr.test
lldb-shell :: SymbolFile/DWARF/debug-types-expressions.test
Similar as #99336
Depens on: https://github.com/llvm/llvm-project/pull/114741
Reviewed By: SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/114742
Commit: 889d67785905ea85cdb17b2bf2b4b6f010b641f5
https://github.com/llvm/llvm-project/commit/889d67785905ea85cdb17b2bf2b4b6f010b641f5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/test/CodeGenHIP/default-attributes.hip
Log Message:
-----------
clang/AMDGPU: Restore O3 checks in default-attributes.hip (#115238)
These were dropped in b1bcb7ca460fcd317bbc8309e14c8761bf8394e0 to
avoid some bot failures.
Commit: 4fb43c47ddf0138bf5cb64ec64dfb530bc7db051
https://github.com/llvm/llvm-project/commit/4fb43c47ddf0138bf5cb64ec64dfb530bc7db051
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
Log Message:
-----------
AMDGPU: Fold more scalar operations on frame index to VALU (#115059)
Further extend workaround for the lack of proper regbankselect
for frame indexes.
Commit: e520b28397fa7ad39a9934df65f45cbdf5514a84
https://github.com/llvm/llvm-project/commit/e520b28397fa7ad39a9934df65f45cbdf5514a84
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
A clang/test/CodeGenHLSL/builtins/WaveActiveCountBits.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveCountBits-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/WaveActiveCountBits.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveCountBits.ll
Log Message:
-----------
[DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (#113382)
```
- add codegen for llvm builtin to spirv/directx intrinsic in CGBuiltin.cpp
- add lowering of spirv intrinsic to spirv backend in SPIRVInstructionSelector.cpp
- add lowering of directx intrinsic to dxil op in DXIL.td
- add test cases to illustrate passes
- add test case for semantic analysis
```
Resolves #80176
Commit: 8440ced89f232f71ad28a91cd88965548b3095b0
https://github.com/llvm/llvm-project/commit/8440ced89f232f71ad28a91cd88965548b3095b0
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lld/ELF/Thunks.cpp
Log Message:
-----------
[ELF] Change a Fatal to assert in addThunkAArch64. NFC
Commit: ee1608dd8e6d06d5aa6e62d7bbb6d60bae7bb5a5
https://github.com/llvm/llvm-project/commit/ee1608dd8e6d06d5aa6e62d7bbb6d60bae7bb5a5
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[CodeGen][MISched] Set DumpDirection after initPolicy (#115112)
Previously we set the dump direction according to command line
options, but we may override the scheduling direction in `initPolicy`
and this results in mismatch between dump and actual policy.
Here we simply set the dump direction after initializing the policy.
Commit: 50e73aeea2a7e2cbaeb66252aadea9a6144937df
https://github.com/llvm/llvm-project/commit/50e73aeea2a7e2cbaeb66252aadea9a6144937df
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/target-loop-unparse.f90
A flang/test/Semantics/OpenMP/loop-bind.f90
M flang/test/Semantics/OpenMP/nested-distribute.f90
M flang/test/Semantics/OpenMP/nested-teams.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Parse `bind` clause for `loop` direcitve. (#113662)
Adds parsing for the `bind` clause. The clause was already part of the
`loop` direcitve's definition but parsing was still missing.
Commit: bfa3ffb1e2d7c976c4db10dbdd8f5d09976c63be
https://github.com/llvm/llvm-project/commit/bfa3ffb1e2d7c976c4db10dbdd8f5d09976c63be
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/CMakeLists.txt
Log Message:
-----------
[FIX] Add missing component introduced in #115218
That causes link error:
```
ld.lld: error: undefined symbol: llvm::memprof::IndexedMemProfRecord::getGUID(llvm::StringRef)
>>> referenced by MemProfUseTest.cpp
>>> unittests/Transforms/Instrumentation/CMakeFiles/InstrumentationTests.dir/MemProfUseTest.cpp.o:((anonymous namespace)::MemProf_ExtractDirectCallsFromIR_Test::TestBody())
>>> referenced by MemProfUseTest.cpp
>>> unittests/Transforms/Instrumentation/CMakeFiles/InstrumentationTests.dir/MemProfUseTest.cpp.o:((anonymous namespace)::MemProf_ExtractDirectCallsFromIR_Test::TestBody())
>>> referenced by MemProfUseTest.cpp
>>> unittests/Transforms/Instrumentation/CMakeFiles/InstrumentationTests.dir/MemProfUseTest.cpp.o:((anonymous namespace)::MemProf_ExtractDirectCallsFromIR_Test::TestBody())
>>> referenced 1 more times
```
Commit: 594e11ce4247feb3197dc3cf0da331e96f9a098b
https://github.com/llvm/llvm-project/commit/594e11ce4247feb3197dc3cf0da331e96f9a098b
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-icp.ll
Log Message:
-----------
[MemProf] Avoid incorrect ICP symtab canonicalization (#115419)
ICP builds a symtab from the symbols in the module allowing mapping from
the VP metadata GUIDs to the Function. MemProf uses this same symtab
handling for its ICP during cloning. When symbols are added to the
symtab, the handling adds both a GUID computed from the function name,
or from the attached PGOFuncName metadata for locals, as well as a GUID
computed from the "canonicalized" name, which strips all "." suffixes
other than ".__uniq". This was originally meant to remove the ".llvm.*"
suffix added to promoted locals (done earlier in the ThinLTO backend).
In theory, it should no longer be needed as locals should have
PGOFuncName metadata.
However, this was causing a linker unsat, in code that used coroutines.
For an original coroutine function, there were several additional
functions created that had the same name, but different "." suffixes.
Therefore the canonical name for these additional functions had the same
GUID as that of the original function, leading to extra entries in the
symtab, and to selecting the wrong function for promotion. For regular
ICP this can happen, but is just a performance issue. However, for
memprof the promoted direct call calls a memprof clone, and because we
called the wrong function, in this case it didn't have a memprof clone
and we got a linker unsat.
We may be able to remove the canonical name handling for ICP in general,
but for now disable it for MemProf. At worst this could lead to not
finding a GUID in the symtab and not performing an ICP, so should be
conservatively correct.
Commit: ae509a085836079585228aede8a5017ad80e1aa9
https://github.com/llvm/llvm-project/commit/ae509a085836079585228aede8a5017ad80e1aa9
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
Log Message:
-----------
[RISCV][Clang] Reuse RVVOutBuiltinSet multiclass for builtin vfrsqrt7. NFC (#115269)
Commit: 694719a4801179198489d8dc492341b0ef0e59fa
https://github.com/llvm/llvm-project/commit/694719a4801179198489d8dc492341b0ef0e59fa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
Log Message:
-----------
[RISCV][GISel] Add G_ZEXT to RISCVInstructionSelector::selectZExtBits. (#115391)
Commit: b613a54075c6e704dcaa15a676bf732955eb4352
https://github.com/llvm/llvm-project/commit/b613a54075c6e704dcaa15a676bf732955eb4352
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Builders.h
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRVPass.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Transforms/Utils/FoldUtils.cpp
Log Message:
-----------
[mlir][IR][NFC] Cleanup insertion point API usage (#115415)
Use `setInsertionPointToStart` / `setInsertionPointToEnd` when possible.
Commit: 3ad640357744890a20494a4943d9a8a94c5b3776
https://github.com/llvm/llvm-project/commit/3ad640357744890a20494a4943d9a8a94c5b3776
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/docs/ShadowCallStack.rst
M clang/include/clang/Driver/Options.td
M clang/test/Driver/riscv-features.c
Log Message:
-----------
[Clang][RISCV] Remove forced-sw-shadow-stack (#115355)
This option was used to override the behavior of
`-fsanitize=shadowcallstack` on RISC-V backend, which by default use a
hardware implementation if possible, to use the software implementation
instead. After #112477 and #112478, now two implementation
is represented by independent options and we no longer need it.
Commit: 2f40e3e713efb550c05ff5f911ab4ce2e4a8dddf
https://github.com/llvm/llvm-project/commit/2f40e3e713efb550c05ff5f911ab4ce2e4a8dddf
Author: Janis Heims <janis.heims at undertheprinter.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/M68k/M68kSubtarget.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
A llvm/test/CodeGen/M68k/CodeModel/large-pic.ll
A llvm/test/CodeGen/M68k/CodeModel/large-pie-global-access.ll
A llvm/test/CodeGen/M68k/CodeModel/large-pie.ll
A llvm/test/CodeGen/M68k/CodeModel/large-static.ll
Log Message:
-----------
[M68k] implement large code model (#106381)
Fixes #106208.
Commit: 37b4df434d2cf82feb3672eeeb469e54ee8f7ff2
https://github.com/llvm/llvm-project/commit/37b4df434d2cf82feb3672eeeb469e54ee8f7ff2
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/AST/ExprCXX.h
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[Clang] Remove the wrong assumption when rebuilding SizeOfPackExprs for constraint normalization (#115120)
In 463a4f150, we assumed that all the template argument packs are of
size 1 when normalizing a constraint expression because I mistakenly
thought those packs were obtained from their injected template
parameters. This was wrong because we might be checking constraints when
instantiating a friend declaration within a class template
specialization, where the parent class template is specialized with
non-dependent template arguments.
In that sense, we shouldn't assume any pack size nor expand anything in
such a scenario. Moreover, there are no intermediate (substituted but
unexpanded) AST nodes for template template parameters, so we have to
special-case their transformations by looking into the instantiation
scope instead of extracting anything from template arguments.
Fixes #115098
Commit: c6414970d76ad79168fe7ec3c4400c5a5ca89d2d
https://github.com/llvm/llvm-project/commit/c6414970d76ad79168fe7ec3c4400c5a5ca89d2d
Author: Yuxuan Chen <ych at fb.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Coroutines/CoroAnnotationElide.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
M llvm/test/Transforms/Coroutines/coro-transform-must-elide.ll
A llvm/test/Transforms/Coroutines/gh114487-crash-in-cgscc.ll
A llvm/test/Transforms/Coroutines/gh114487-non-inlinable.ll
Log Message:
-----------
[Coroutines] Inline the `.noalloc` ramp function marked coro_safe_elide (#114004)
Commit: d233fedfb0de882353c348cd1ac57dab619efa6d
https://github.com/llvm/llvm-project/commit/d233fedfb0de882353c348cd1ac57dab619efa6d
Author: Yuxuan Chen <ych at fb.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
A llvm/test/Transforms/Coroutines/coro-split-noinline.ll
Log Message:
-----------
[Coroutines] Respect noinline attributes when eliding heap allocation (#115384)
Commit: 9061e6e58a78046963f0eb5991e98346e01a0bf7
https://github.com/llvm/llvm-project/commit/9061e6e58a78046963f0eb5991e98346e01a0bf7
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/extract-vector-elt-sve.ll
Log Message:
-----------
[GlobalISel][AArch64] Legalize G_EXTRACT_VECTOR_ELT for SVE (#115161)
AArch64InstrGISel.td defines:
def : GINodeEquiv<G_EXTRACT_VECTOR_ELT, vector_extract>;
There are many patterns for SVE. Let's exploit that fact.
Commit: c17a914675f8fcadbf0ef440aae7e0ab6c49ec0c
https://github.com/llvm/llvm-project/commit/c17a914675f8fcadbf0ef440aae7e0ab6c49ec0c
Author: T-Tie <t_tttie at 163.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Smdbltrp and Ssdbltrp extension (#111837)
Smdbltrp and Ssdbltrp supports are added in this PR.
Specification link(Smdbltrp) :
[https://github.com/riscv/riscv-isa-manual/blob/main/src/smdbltrp.adoc](url)
Specification link(Ssdbltrp) :
[https://github.com/riscv/riscv-isa-manual/blob/main/src/ssdbltrp.adoc](url)
Commit: 1adca7af21f1d8cc12b0f1c33db8ab869b36ae48
https://github.com/llvm/llvm-project/commit/1adca7af21f1d8cc12b0f1c33db8ab869b36ae48
Author: Sebastian Kreutzer <SebastianKreutzer at gmx.net>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/Driver/XRayArgs.cpp
M clang/test/Driver/XRay/xray-shared.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_trampoline_AArch64.S
M compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
M compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
M compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
M compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
Log Message:
-----------
Reapply "[XRay][AArch64] Support -fxray-shared (#114431)" (#115300)
This patch implements support for `-fxray-shared` on AArch64 and fixes a
remaining issue in the previous PR #114431.
A bug in the XRay `CMakeLists.txt` caused the XRay assembly sources to
be built for every architecture in `XRAY_DSO_SUPPORTED_ARCH` on Apple.
This led to the compiler trying to compile AArch64 assembly for X86
targets and vice versa.
This is addressed here by ensuring that assembly sources are only built
for the matching architecture (see fixup commit).
**Original PR description:**
This patch adds support for `-fxray-shared` on AArch64. This feature,
introduced in #113548 for x86_64, enables the instrumentation of shared
libraries with XRay.
Changes:
- Adds AArch64 to the list of targets supporting `-fxray-shared`
- Introduces PIC versions of the AArch64 XRay trampolines
- Adjusts relevant XRay tests
Commit: a25d91a164b0a283dd809cf9b4d9442d24173fb7
https://github.com/llvm/llvm-project/commit/a25d91a164b0a283dd809cf9b4d9442d24173fb7
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
Log Message:
-----------
[RISCV] Skip DAG combine for bitcast fabs/fneg (#115325)
Disable the DAG combine for bitcast fabs/fneg in case of the zdinx
extension.
The combine folds the fabs/fneg nodes in some cases. This might result
in suboptimal code if compiled with the zdinx extension. In case of the
zdinx extension, there is no need to load the double value from an x
register to an f register, so the combine can be skipped.
Commit: 984bca9d1faaa1fa5c694f8f2a5524b2374d204a
https://github.com/llvm/llvm-project/commit/984bca9d1faaa1fa5c694f8f2a5524b2374d204a
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVNExpression.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/test/Transforms/GVN/pr113997.ll
M llvm/test/Transforms/NewGVN/pr113997.ll
Log Message:
-----------
[GVN][NewGVN] Take call attributes into account in expressions (#114545)
Drop `canBeReplacedBy` and take call attributes into account in
expressions.
Address comment
https://github.com/llvm/llvm-project/pull/114011#pullrequestreview-2409772313.
Commit: f02b1cc99e12ac0147d5c334f130a305d85e477a
https://github.com/llvm/llvm-project/commit/f02b1cc99e12ac0147d5c334f130a305d85e477a
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/prune-non-affecting-module-map-repeated.cpp
Log Message:
-----------
[ASTWriter] Detect more non-affecting FileIDs to reduce source location duplication (#112015)
Currently, any FileID that references a module map file that was
required for a compilation is considered as affecting. This misses an
important opportunity to reduce the source location space taken by the
resulting PCM.
In particular, consider the situation where the same module map file is
passed multiple times in the dependency chain:
```shell
$ clang -fmodule-map-file=foo.modulemap ... -o mod1.pcm
$ clang -fmodule-map-file=foo.modulemap -fmodule-file=mod1.pcm ... -o mod2.pcm
...
$ clang -fmodule-map-file=foo.modulemap -fmodule-file=mod$((N-1)).pcm ... -o mod$N.pcm
```
Because `foo.modulemap` is read before reading any of the `.pcm` files,
we have to create a unique `FileID` for it when creating each module.
However, when reading the `.pcm` files, we will reuse the `FileID`
loaded from it for the same module map file and the `FileID` we created
can never be used again, but we will still mark it as affecting and it
will take the source location space in the output PCM.
For a chain of N dependencies, this results in the file taking `N *
(size of file)` source location space, which could be significant. For
examples, we observer internally that some targets that run out of 2GB
of source location space end up wasting up to 20% of that space in
module maps as described above.
I take extra care to still write the InputFile entries for those files that occupied
source location space before. It is required for correctness of clang-scan-deps.
Commit: d6d73ec89e493c69cf24dc3a710d861e2ce08acb
https://github.com/llvm/llvm-project/commit/d6d73ec89e493c69cf24dc3a710d861e2ce08acb
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][vector] Disable vector.flat_transpose for scalable vectors (#115338)
Disables `vector.flat_transpose` for scalable vectors. As per the docs:
> This is the counterpart of llvm.matrix.transpose in MLIR
I'm not aware of any use of any matrix-multiply intrinsics in the
context of scalable vectors, hence disabling.
Note, this is a follow-on for #102573 in which I disabled
`vector.matrix_multiply`.
Commit: ff07df6620c32571c7e13ff96ec7976c63ed0ab8
https://github.com/llvm/llvm-project/commit/ff07df6620c32571c7e13ff96ec7976c63ed0ab8
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/test/Transforms/InstCombine/sub-of-negatible.ll
Log Message:
-----------
[InstCombine] Drop nsw in negation of select (#112893)
Closes https://github.com/llvm/llvm-project/issues/112666 and
https://github.com/llvm/llvm-project/issues/114181.
Commit: b9dd60228cbb2a173380a450f0f71ca43e917783
https://github.com/llvm/llvm-project/commit/b9dd60228cbb2a173380a450f0f71ca43e917783
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/sve-hadd.ll
Log Message:
-----------
[DAGCombiner] Remove a hasOneUse check in visitAND (#115142)
For some reason there was a hasOneUse check on the splat for the
second operand and it's not obvious to me why. The check blocks
optimisations for lowering of nodes like AVGFLOORU and AVGCEILU.
In a follow-on patch I also plan to improve the generated code
for AVGCEILU further by teaching computeKnownBits about
zero-extending masked loads.
Commit: 58a17e1bbc54357385d0b89cfc5635e402c31ef6
https://github.com/llvm/llvm-project/commit/58a17e1bbc54357385d0b89cfc5635e402c31ef6
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amxavx512intrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/amx_avx512_api.c
A clang/test/CodeGen/X86/amxavx512-builtins.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
A llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
A llvm/test/CodeGen/X86/amx-avx512-intrinsics.ll
A llvm/test/CodeGen/X86/amx-tile-avx512-internals.ll
A llvm/test/MC/Disassembler/X86/amx-avx512.txt
A llvm/test/MC/X86/amx-avx512-att.s
A llvm/test/MC/X86/amx-avx512-intel.s
Log Message:
-----------
[X86][AMX] Support AMX-AVX512 (#114070)
Commit: 4f3bf1c62ceb85d2e33857ada26b565822e65600
https://github.com/llvm/llvm-project/commit/4f3bf1c62ceb85d2e33857ada26b565822e65600
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 58a17e1bbc54
Commit: d74127e78aa7f8ab07b0926d25920444dde6c73c
https://github.com/llvm/llvm-project/commit/d74127e78aa7f8ab07b0926d25920444dde6c73c
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[flang][OpenMP][MLIR] Add MLIR op for loop directive (#113911)
Adds MLIR op that corresponds to the `loop` directive.
Commit: 546066e4f74d50c974248b0ed247f65ebf24b75c
https://github.com/llvm/llvm-project/commit/546066e4f74d50c974248b0ed247f65ebf24b75c
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/IR/DIBuilder.cpp
Log Message:
-----------
Fix DIBuilder::createVariantPart after f6617d65e496
which ended up passing 0 for the Discriminator arg, Discriminator for
the DataLocation arg, etc.
The DICompositeType::get's new NumExtraInhabitants parameter is at the
end, and has a default value, so no change in the caller is necessary.
See comment on https://github.com/llvm/llvm-project/pull/112590
Commit: ffe49b7bcfb37cbca8523b59cb5b26a74369a7d1
https://github.com/llvm/llvm-project/commit/ffe49b7bcfb37cbca8523b59cb5b26a74369a7d1
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lld/COFF/PDB.cpp
A lld/test/COFF/arm64ec-pdb.test
Log Message:
-----------
[LLD][COFF] Use correct machine types in PDB records on ARM64EC (#115309)
Commit: 799e520c51f47c54769e5bd8ce6ce2d2d3931445
https://github.com/llvm/llvm-project/commit/799e520c51f47c54769e5bd8ce6ce2d2d3931445
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/CodeGen/aarch64-cpu-supports-target.c
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/Sema/aarch64-cpu-supports.c
M clang/test/Sema/attr-target-clones-aarch64.c
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/lib/Target/AArch64/AArch64FMV.td
Log Message:
-----------
[FMV] Remove feature dgh. (#115363)
It belongs to the HINT space so it can be executed as NOP if the
hardware doesn't support it.
Reviewed in ACLE -> https://github.com/ARM-software/acle/pull/357
Commit: 4bcd4d843f660c1a435159a2964f0c4cf4564ab1
https://github.com/llvm/llvm-project/commit/4bcd4d843f660c1a435159a2964f0c4cf4564ab1
Author: Weaver <Tom.Weaver at sony.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/CodeGenHIP/default-attributes.hip
Log Message:
-----------
Revert "clang/AMDGPU: Restore O3 checks in default-attributes.hip (#115238)"
This reverts commit 889d67785905ea85cdb17b2bf2b4b6f010b641f5.
Caused the following build bot failures, author has failed to address:
https://lab.llvm.org/buildbot/#/builders/144/builds/11132
https://lab.llvm.org/buildbot/#/builders/46/builds/7541
https://lab.llvm.org/buildbot/#/builders/190/builds/9077
Please fix before recommitting.
Commit: 2c49301d91d743c4424997c5f670a453439b4b86
https://github.com/llvm/llvm-project/commit/2c49301d91d743c4424997c5f670a453439b4b86
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/DerivedTypes.h
Log Message:
-----------
[IR] Remove variadic overload of StructType::setBody. NFC. (#114421)
This is unused in-tree.
Commit: 31af00fda73df8e85e30c71f66e096d486ec8c8b
https://github.com/llvm/llvm-project/commit/31af00fda73df8e85e30c71f66e096d486ec8c8b
Author: amilendra <amilendra.kodithuwakku at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.7-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.8-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.9-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.2-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.3-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/test/MC/AArch64/spe.s
Log Message:
-----------
[AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (#115296)
The `SPE-EEF` system-register only feature introduced in Armv8.7-a adds
support for an extra system register (`PMSNEVFR_EL1`) to the Statistical
Profiling extension.
However, `SPE-EEF` is gated even for Armv8.7-a and the `spe-eef`
subtarget-feature is needed to enable it.
This behavior is inconsistent with the implementation for other
system-register only features as they can be used ungated under
supported architectures.
(e.g. HCX : Enable Armv8.7-A `HCRX_EL2` system register).
GCC/Binutils too do not add command line flags for features that only
enable system registers.
Fix by enabling `SPE-EEF` unconditionally under v8.7-A and above.
Commit: 0a7e5e34569737447e9e3e08b5f87883300061e5
https://github.com/llvm/llvm-project/commit/0a7e5e34569737447e9e3e08b5f87883300061e5
Author: Alona Enraght-Moony <code at alona.page>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M libcxx/docs/UserDocumentation.rst
Log Message:
-----------
[libc++][docs] Document _LIBCPP_ENABLE_CXX17_REMOVED_UNARY_BINARY_FUNCTION (#115405)
This was added in 681cde7dd8b5613dbafc9ca54e0288477f946be3, but isn't
currently documented.
Commit: df3f18b071d853896318d2d37186fc6289ffdb2b
https://github.com/llvm/llvm-project/commit/df3f18b071d853896318d2d37186fc6289ffdb2b
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/decorators.py
Log Message:
-----------
[lldb] Fixed the @skipUnlessAArch64MTELinuxCompiler decorator in case of Windows host (#115337)
Fixed the @skipUnlessAArch64MTELinuxCompiler decorator in case of
Windows host.
Commit: 39bce77bd6cdb334810ed95249683484e44c1165
https://github.com/llvm/llvm-project/commit/39bce77bd6cdb334810ed95249683484e44c1165
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
Log Message:
-----------
[lldb][test] TestConstStaticIntegralMember.py: XFAIL on Darwin for older compiler verions
Follow-up to https://github.com/llvm/llvm-project/pull/111859. Prior
to this PR we would never run these tests with DWARFv5 on older Clang
versions (since default wasn't DWARFv5 on macOS until recently). The
patch explicitly started running some of these tests with DWARFv5.
These were failing on the macOS matrix bot (with Clang-15/Clang-17).
```
======================================================================
FAIL: test_inline_static_members_dwarf5_dsym (TestConstStaticIntegralMember.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1769, in test_method
return attrvalue(self)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 150, in test_inline_static_members_dwarf5
self.check_inline_static_members("-gdwarf-5")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 129, in check_inline_static_members
self.check_global_var("A::int_val", "const int", "1")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 118, in check_global_var
self.assertGreaterEqual(len(var_list), 1)
AssertionError: 0 not greater than or equal to 1
```
Commit: 34bf9dd6d39cb2bf75731cea7a26c3563720cb67
https://github.com/llvm/llvm-project/commit/34bf9dd6d39cb2bf75731cea7a26c3563720cb67
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
Log Message:
-----------
[lldb][test] TestConstStaticIntegralMember.py: fix XFAIL decorators
The `compiler` parameter is not supported in the `expectedFailureDarwin`
decorator.
Change the decorator to `expectedFailureAll`, which is fine because
this only affects the `dsym` variant (which is only a macOS variant).
Commit: 3797daa5448f3471c0d7d1c67838922a83a06fa1
https://github.com/llvm/llvm-project/commit/3797daa5448f3471c0d7d1c67838922a83a06fa1
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-fpenv.ll
Log Message:
-----------
[AArch64] Create set.fpmr intrinsic and assembly lowering (#114248)
This patch introduces new llvm.set.fpmr intrinsics for setting value in
FPMR register and adds its lowering to series of read-compare-write
instructions. This intrinsic will be generated during lowering of FP8 C
intrinsics into LLVM-IR introduced in later patch.
***This is an experimental implementation of handling fp8 intriniscs and
is likely to change in the future.***
Commit: 6e4cd463e580046feb66597a61db352c63fd783b
https://github.com/llvm/llvm-project/commit/6e4cd463e580046feb66597a61db352c63fd783b
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/send-event/TestDAP_sendEvent.py
Log Message:
-----------
[lldb] s/assertEquals/assertEqual TestDAP_sendEvent
New unittest versions don't have the "s" version.
Commit: e3b0ef7aaacb7f1374cb0fc5f6dde4b95ebfa624
https://github.com/llvm/llvm-project/commit/e3b0ef7aaacb7f1374cb0fc5f6dde4b95ebfa624
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Remove forced-sw-shadow-stack in RISCVFeatures.td (#115447)
This patch removes forced-sw-shadow-stack related statements in
RISCVFeatures.td, which was missed in the last patch
https://github.com/llvm/llvm-project/pull/115355
Commit: 0daca808ce111f21db8c0ee9ea5d2509d6034557
https://github.com/llvm/llvm-project/commit/0daca808ce111f21db8c0ee9ea5d2509d6034557
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/C/C2y/n3344.c
Log Message:
-----------
Fix issues with WG14 N3344 changes
This amends 24e2e259a06d9aa67dc278ac24dcb98da9dd63f6 with a fix for
'register void *', which is still okay as a function parameter.
Commit: 724b432410fd59c63cc313d41824eda5ec84052f
https://github.com/llvm/llvm-project/commit/724b432410fd59c63cc313d41824eda5ec84052f
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/lib/Headers/stdalign.h
Log Message:
-----------
[z/OS] Make sure __alignas_is_defined and __alignof_is_defined are defined on z/OS. (#115368)
Commit: afa178d36017ab565c33a8639be16355a054b95b
https://github.com/llvm/llvm-project/commit/afa178d36017ab565c33a8639be16355a054b95b
Author: lfrenot <leon.frenot at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
A mlir/test/Target/LLVMIR/Import/exact.ll
A mlir/test/Target/LLVMIR/exact.mlir
Log Message:
-----------
[mlir][LLVM] Add exact flag (#115327)
The implementation is mostly based on the one existing for the nsw and
nuw flags.
If the exact flag is present, the corresponding operation returns a
poison value when the result is not exact. (For a division, if rounding
happens; for a right shift, if a non-zero bit is shifted out.)
Commit: 5fbe9b958dc3035480406c2cd4524e4827d2dfaf
https://github.com/llvm/llvm-project/commit/5fbe9b958dc3035480406c2cd4524e4827d2dfaf
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lld/COFF/Writer.cpp
A lld/test/COFF/cfguard-off-instrumented.s
Log Message:
-----------
[LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (#115374)
Commit: 0e39b1348e5fcadb129a6f113e5d708a526d8faa
https://github.com/llvm/llvm-project/commit/0e39b1348e5fcadb129a6f113e5d708a526d8faa
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/lib/ExecutionEngine/CMakeLists.txt
A mlir/lib/ExecutionEngine/SpirvCpuRuntimeWrappers.cpp
M mlir/test/CMakeLists.txt
A mlir/test/Integration/GPU/SPIRV/double.mlir
A mlir/test/Integration/GPU/SPIRV/lit.local.cfg
A mlir/test/Integration/GPU/SPIRV/simple_add.mlir
M mlir/test/lib/Pass/TestSPIRVCPURunnerPipeline.cpp
M mlir/test/lit.cfg.py
R mlir/test/mlir-spirv-cpu-runner/CMakeLists.txt
R mlir/test/mlir-spirv-cpu-runner/double.mlir
R mlir/test/mlir-spirv-cpu-runner/lit.local.cfg
R mlir/test/mlir-spirv-cpu-runner/mlir_test_spirv_cpu_runner_c_wrappers.cpp
R mlir/test/mlir-spirv-cpu-runner/simple_add.mlir
M mlir/tools/CMakeLists.txt
M mlir/tools/mlir-cpu-runner/mlir-cpu-runner.cpp
R mlir/tools/mlir-spirv-cpu-runner/CMakeLists.txt
R mlir/tools/mlir-spirv-cpu-runner/mlir-spirv-cpu-runner.cpp
Log Message:
-----------
[mlir] Remove the mlir-spirv-cpu-runner (move to mlir-cpu-runner) (#114563)
This commit builds on and completes the work done in
9f6c632ecda08bfff76b798c46d5d7cfde57b5e9 to eliminate the need for a
separate mlir-spirv-cpu-runner binary. Since the MLIR processing is
already done outside this runner, the only real difference between it
and the mlir-cpu-runner is the final linking step between the nested
LLVM IR modules. By moving this step into mlir-cpu-runner behind a new
command-line flag (`--link-nested-modules`), this commit is able to
completely remove the runner component of the mlir-spirv-cpu-runner.
The runtime libraries and the tests are moved and renamed to fit into
the Execution Engine and Integration tests, following the model of the
similar migration done for the CUDA Runner in D97463.
Commit: 231e03ba7e82896847dbc27d457dbb208f04699c
https://github.com/llvm/llvm-project/commit/231e03ba7e82896847dbc27d457dbb208f04699c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/selectopt-cast.ll
Log Message:
-----------
[AArch64] Add select-opt test with select transformed to cast.
Add tests with add and sub binops with zext i1 operands.
Commit: e5c6d1f4e6d6c8709f92b47717cffc486947ff1b
https://github.com/llvm/llvm-project/commit/e5c6d1f4e6d6c8709f92b47717cffc486947ff1b
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/docs/AMDGPUSupport.rst
M clang/docs/HIPSupport.rst
M clang/include/clang/Basic/MacroBuilder.h
M clang/lib/Basic/Targets/AMDGPU.cpp
A clang/test/Driver/hip-wavefront-size-deprecation-diagnostics.hip
Log Message:
-----------
[Clang][HIP] Deprecate the AMDGCN_WAVEFRONT_SIZE macros (#112849)
So far, these macros can be used in contexts where no meaningful
wavefront size is available. We therefore deprecate these macros, to
replace them with a more resilient interface to access wavefront size
information where it is available.
For SWDEV-491529.
Commit: 32c744ae339dc356060636bcdf75a5e2a67fca00
https://github.com/llvm/llvm-project/commit/32c744ae339dc356060636bcdf75a5e2a67fca00
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/decorators.py
Log Message:
-----------
[lldb] Fixed the @skipUnlessAArch64MTELinuxCompiler decorator (#115480)
It is broken after #115337
https://lab.llvm.org/buildbot/#/builders/195/builds/794
Commit: b0cfbfd74bfd9d077f7c1854a1b38dcbe9d402e4
https://github.com/llvm/llvm-project/commit/b0cfbfd74bfd9d077f7c1854a1b38dcbe9d402e4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/ast-print-openacc-loop-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/SemaOpenACC/compute-construct-async-clause.c
M clang/test/SemaOpenACC/compute-construct-attach-clause.c
M clang/test/SemaOpenACC/compute-construct-copy-clause.c
M clang/test/SemaOpenACC/compute-construct-copyin-clause.c
M clang/test/SemaOpenACC/compute-construct-copyout-clause.c
M clang/test/SemaOpenACC/compute-construct-create-clause.c
M clang/test/SemaOpenACC/compute-construct-default-clause.c
M clang/test/SemaOpenACC/compute-construct-deviceptr-clause.c
M clang/test/SemaOpenACC/compute-construct-firstprivate-clause.c
M clang/test/SemaOpenACC/compute-construct-if-clause.c
M clang/test/SemaOpenACC/compute-construct-no_create-clause.c
M clang/test/SemaOpenACC/compute-construct-num_gangs-clause.c
M clang/test/SemaOpenACC/compute-construct-num_workers-clause.c
M clang/test/SemaOpenACC/compute-construct-present-clause.c
M clang/test/SemaOpenACC/compute-construct-self-clause.c
M clang/test/SemaOpenACC/compute-construct-vector_length-clause.c
M clang/test/SemaOpenACC/compute-construct-wait-clause.c
M clang/test/SemaOpenACC/loop-ast.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-ast.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-collapse-ast.cpp
M clang/test/SemaOpenACC/loop-construct-collapse-clause.cpp
M clang/test/SemaOpenACC/loop-construct-device_type-ast.cpp
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.cpp
M clang/test/SemaOpenACC/loop-construct-gang-ast.cpp
M clang/test/SemaOpenACC/loop-construct-gang-clause.cpp
M clang/test/SemaOpenACC/loop-construct-private-clause.c
M clang/test/SemaOpenACC/loop-construct-private-clause.cpp
M clang/test/SemaOpenACC/loop-construct-reduction-ast.cpp
M clang/test/SemaOpenACC/loop-construct-reduction-clause.cpp
M clang/test/SemaOpenACC/loop-construct-tile-ast.cpp
M clang/test/SemaOpenACC/loop-construct-tile-clause.cpp
M clang/test/SemaOpenACC/loop-construct-vector-ast.cpp
M clang/test/SemaOpenACC/loop-construct-vector-clause.cpp
M clang/test/SemaOpenACC/loop-construct-worker-ast.cpp
M clang/test/SemaOpenACC/loop-construct-worker-clause.cpp
A clang/test/SemaOpenACC/loop-construct.cpp
M clang/test/SemaOpenACC/loop-loc-and-stmt.c
M clang/test/SemaOpenACC/loop-loc-and-stmt.cpp
Log Message:
-----------
[OpenACC] Implement `loop` restrictions on `for` loops. (#115370)
OpenACC restricts the contents of a 'for' loop affected by a 'loop'
construct without a 'seq'. The loop variable must be integer, pointer,
or random-access-iterator, it must monotonically increase/decrease, and
the trip count must be computable at runtime before the function.
This patch tries to implement some of these limitations to the best of
our ability, though it causes us to be perhaps overly restrictive at the
moment. I expect we'll revisit some of these rules/add additional
supported forms of loop-variable and 'monotonically increasing' here,
but the currently enforced rules are heavily inspired by the OMP
implementation here.
Commit: 844fe8f662de6d1a51f4a04b37fadb96b2009bd0
https://github.com/llvm/llvm-project/commit/844fe8f662de6d1a51f4a04b37fadb96b2009bd0
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][nfc] Rename @genbool_* as @constant_mask_* (#115335)
Renames `@genbool_*` tests as `@constant_mask_*`. That's to better
highlight which Op is tested and for better consistency with other test.
In addition,`@genbool_2d` is moved _above_ it's counterparts with
scalable vectors (again, for consistency).
Commit: d5677b630d0faf38e2e92797415ff80676f86063
https://github.com/llvm/llvm-project/commit/d5677b630d0faf38e2e92797415ff80676f86063
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/test/API/commands/target/basic/TestTargetCommand.py
Log Message:
-----------
[lldb] Fixed TestTargetCommand.py in case of Windows host and Linux target (#115470)
Fixed TestTargetCommand.py in case of Windows host and Linux target.
Commit: 107af4a62ee9afb4be2cba1bc7c12afb677445ef
https://github.com/llvm/llvm-project/commit/107af4a62ee9afb4be2cba1bc7c12afb677445ef
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
Log Message:
-----------
[StructurizeCFG] Introduce struct PredInfo. NFC. (#115457)
This just provides a neater encapsulation of the info about the
predicate for an edge, rather than ValueWeightPair aka std::pair.
Commit: 644a9a4327af4fb4f7b09832cafe3c82843231b5
https://github.com/llvm/llvm-project/commit/644a9a4327af4fb4f7b09832cafe3c82843231b5
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
Log Message:
-----------
[CodeExtractor][NFC] Refactor-out applyFirstDebugLoc. (#115358)
Split-off from #114419
Commit: ab9178e3e73dc715463e1019ed2cd449dc18bb18
https://github.com/llvm/llvm-project/commit/ab9178e3e73dc715463e1019ed2cd449dc18bb18
Author: David Green <david.green at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
Log Message:
-----------
[ARM] Add a couple of new MVE reduction tests. NFC
Nowadays we generate add(zext(mul(sext, sext)) with nneg zext and the multi-use
test is awkward to get right. This should help our test coverage with the vplan
cost transition.
Commit: 3c3f19ca5ea03428edacbd5d087b991c447c47dc
https://github.com/llvm/llvm-project/commit/3c3f19ca5ea03428edacbd5d087b991c447c47dc
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/IR/Intrinsics.cpp
Log Message:
-----------
Revert "[NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (#114822)"
This reverts commit c2b61fcb3cd4ffa286b24437b7b6d66f0dee6c25.
Intrinsic namespace contains memcpy which is a naming conflict with
memcpy from string.h header.
Commit: 53e6f627d7e81633b2e159675884bfcce11bdc00
https://github.com/llvm/llvm-project/commit/53e6f627d7e81633b2e159675884bfcce11bdc00
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] _mm_movpi64_epi64 - convert to shufflevector pattern instead of bitcasting to i64
Don't bitcast a v1i64 to i64 as constant expressions will struggle to handle this - convert to a shufflevector concat pattern like _mm_move_epi64 instead
Commit: 0f040433d325aa68ec6840aa179f3f314c26153a
https://github.com/llvm/llvm-project/commit/0f040433d325aa68ec6840aa179f3f314c26153a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/CodeGen/X86/mmx-builtins.c
Log Message:
-----------
[clang][x86] Update MMX intrinsic tests for both C/C++
Requires update to movmsk call to handle additional markers
Commit: 77bec78878762e34150fe23734fa43df796c873c
https://github.com/llvm/llvm-project/commit/77bec78878762e34150fe23734fa43df796c873c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
Log Message:
-----------
[SLP]Do not look for last instruction in schedule block for buildvectors
If looking for the insertion point for the node and the node is
a buildvector node, the compiler should not use scheduling info for such
nodes, they may contain only partial info, which is not fully correct
and may cause compiler crash.
Fixes #114082
Commit: f7bb12901e2955b972273a06dd028ab4b2822b44
https://github.com/llvm/llvm-project/commit/f7bb12901e2955b972273a06dd028ab4b2822b44
Author: wldfngrs <wldfngrs at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/newhdrgen/yaml/math.yaml
M libc/src/math/CMakeLists.txt
M libc/src/math/cospif16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/cospif16.cpp
A libc/src/math/generic/tanpif16.cpp
A libc/src/math/tanpif16.h
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/tanpif16_test.cpp
A libc/test/src/math/tanpif16_test.cpp
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
Log Message:
-----------
[libc][math][c23] Add tanpif16 function (#115183)
- Implementation of `tan` for 16-bit floating point inputs scaled by pi.
i.e,. `tanpif16()`
- Implementation of Tanpi in MPFRWrapper for MPFR versions < 4.2
- Exhaustive tests for `tanpif16()`
Commit: 1645d99bc9c16b1f9e2f08e36d67054498d8751e
https://github.com/llvm/llvm-project/commit/1645d99bc9c16b1f9e2f08e36d67054498d8751e
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M libcxx/include/__iterator/bounded_iter.h
M libcxx/include/__iterator/static_bounded_iter.h
A libcxx/test/libcxx/iterators/contiguous_iterators.verify.cpp
Log Message:
-----------
[libc++][hardening] Use `static_assert` for `__(static_)bounded_iter` (#115304)
We can't `static_assert` `__libcpp_is_contiguous_iterator` for
`__wrap_iter` currently because `__wrap_iter` is also used for wrapping
user-defined fancy pointers.
Fixes #115002.
Commit: 9aea6671085f02e6127750103ca48ae6a09ceeb8
https://github.com/llvm/llvm-project/commit/9aea6671085f02e6127750103ca48ae6a09ceeb8
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/Symbolize/DIPrinter.h
Log Message:
-----------
[symbolizer] Change the ErrorHandler from llvm::function_ref to std::function. (#115477)
This fixes dangling `ErrorHandler` references
([here](https://github.com/llvm/llvm-project/blob/main/compiler-rt/lib/sanitizer_common/symbolizer/sanitizer_symbolize.cpp#L48-L53)
is an example).
`llvm::function_ref` doesn't own the callable, and it is not safe to
store a function_ref (the `PlainPrinterBase` stores a
`llvm::function_ref` which can easily lead to dangling references).
Commit: 8b29c05b73310bba3d7abd007dbbd839c46b0ab4
https://github.com/llvm/llvm-project/commit/8b29c05b73310bba3d7abd007dbbd839c46b0ab4
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
A clang/test/Sema/attr-lifetimebound.c
Log Message:
-----------
[clang] Permit lifetimebound in all language modes (#115482)
Lifetimebound annotations can help diagnose common cases of dangling
including escaping the address of a stack variable from a function. This
is useful in all C family languages, restricting these diagnostics to
C++ is an artificial limitation.
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: da9499ebfb323602c42aeb674571fe89cec20ca6
https://github.com/llvm/llvm-project/commit/da9499ebfb323602c42aeb674571fe89cec20ca6
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
M lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll
M llvm/test/MC/AArch64/SVE2/aesd.s
M llvm/test/MC/AArch64/SVE2/aese.s
M llvm/test/MC/AArch64/SVE2/aesimc.s
M llvm/test/MC/AArch64/SVE2/aesmc.s
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu.s
M llvm/test/MC/AArch64/SVE2/pmullb-128.s
M llvm/test/MC/AArch64/SVE2/pmullt-128.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114293)
This patch introduces the amended feature flag for
[FEAT_SVE_AES](https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/The-Armv9-0-architecture-extension?lang=en#md457-the-armv90-architecture-extension__feat_FEAT_SVE_AES),
'**sve-aes**'. The existing flag associated with this feature,
'sve2-aes' must be retained as an alias of 'sve-aes' and 'sve2' for
backwards compatibility.
The
[ACLE](https://github.com/ARM-software/acle/blob/main/main/acle.md#aes-extension)
documents `__ARM_FEATURE_SVE2_AES`, which was previously defined to 1
when
> there is hardware support for the SVE2 AES (FEAT_SVE_AES) instructions
and if the associated ACLE intrinsics are available.
The front-end has been amended such that it is compatible with +sve2-aes
and +sve2+sve-aes.
Commit: 7844257fc2afe490ae4b923a770d20dabed5c3c6
https://github.com/llvm/llvm-project/commit/7844257fc2afe490ae4b923a770d20dabed5c3c6
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/vector_operations.bench.cpp
Log Message:
-----------
[libc++] Use explicit #include instead of transitive #include (#115420)
This benchmark test currently uses `std::unique_ptr` without explicitly
`#include <memory>`. I think we should not rely on transitive inclusion.
Commit: c93eb43a63d3b5c90e828608b5c2063644a3b161
https://github.com/llvm/llvm-project/commit/c93eb43a63d3b5c90e828608b5c2063644a3b161
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/test/API/lua_api/TestFileHandle.lua
Log Message:
-----------
[lldb] Fix TestFileHandle.lua
- Explicitly create an `SBFile`.
- Add missing call to `close`.
- Use `SetErrorFile` in TestLegacyFileErr.
Commit: e734de1f5a3c2ec0c88221eb0991b0922e30d902
https://github.com/llvm/llvm-project/commit/e734de1f5a3c2ec0c88221eb0991b0922e30d902
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/docs/AMDGPUSupport.rst
M clang/docs/HIPSupport.rst
M clang/include/clang/Basic/MacroBuilder.h
M clang/lib/Basic/Targets/AMDGPU.cpp
R clang/test/Driver/hip-wavefront-size-deprecation-diagnostics.hip
Log Message:
-----------
Revert "[Clang][HIP] Deprecate the AMDGCN_WAVEFRONT_SIZE macros" (#115499)
Reverts llvm/llvm-project#112849 due to test failure on Mac, reported by
@nico
Commit: 6737ba40406030cd8a7ea706cd56302f8be7a4b4
https://github.com/llvm/llvm-project/commit/6737ba40406030cd8a7ea706cd56302f8be7a4b4
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
Update the lifetimebound doc.
The lifetimebound attr is not C++ only anymore after 8b29c05b73310bba3d7abd007dbbd839c46b0ab4
Commit: c9552283c0bf277eba490cde9fd913510f4111c0
https://github.com/llvm/llvm-project/commit/c9552283c0bf277eba490cde9fd913510f4111c0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/lib/Headers/mmintrin.h
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/mmx-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for MMX _mm_set*_pi* intrinsics
Commit: 2407ff4645e9124507a4b5d910603ff7fc9e5734
https://github.com/llvm/llvm-project/commit/2407ff4645e9124507a4b5d910603ff7fc9e5734
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_movpi64_epi64
Commit: 51e8f822f39174eaf83b1d5798de329518970b02
https://github.com/llvm/llvm-project/commit/51e8f822f39174eaf83b1d5798de329518970b02
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/pr62014.ll
Log Message:
-----------
[X86] pr62014.ll - regenerate test checks with vpternlog comments
Commit: 71f82bba35c48eaf98c50aeeb4d2675156681c02
https://github.com/llvm/llvm-project/commit/71f82bba35c48eaf98c50aeeb4d2675156681c02
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
Log Message:
-----------
[SPIRV] Use heterogenous lookups with std::map (NFC) (#115425)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: 6ce44266fc2d06dfcbefd8146279473ccada52ca
https://github.com/llvm/llvm-project/commit/6ce44266fc2d06dfcbefd8146279473ccada52ca
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/DialectRegistry.h
M mlir/lib/IR/Dialect.cpp
Log Message:
-----------
[mlir] Use heterogenous lookups with std::map (NFC) (#115426)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: a4819d6aa30f849770c258abba67a4b721642ebf
https://github.com/llvm/llvm-project/commit/a4819d6aa30f849770c258abba67a4b721642ebf
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/lib/IR/MLIRContext.cpp
Log Message:
-----------
[mlir] Simplify code with StringMap::operator[] (NFC) (#115427)
Commit: bc7e5c2016e287b768d2a3a1de15f6bb644622ae
https://github.com/llvm/llvm-project/commit/bc7e5c2016e287b768d2a3a1de15f6bb644622ae
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Avoid repeated hash lookups (NFC) (#115428)
Commit: 2f243a5fb754c3688dfa225ce8073a281bca1a24
https://github.com/llvm/llvm-project/commit/2f243a5fb754c3688dfa225ce8073a281bca1a24
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port for 0e39b1348e5fcadb129a6f113e5d708a526d8faa
Commit: 3356eb3b15f391b9b4f62b0157fede16bd8cd5b3
https://github.com/llvm/llvm-project/commit/3356eb3b15f391b9b4f62b0157fede16bd8cd5b3
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/test/tools/llvm-reduce/reduce-flags.ll
M llvm/tools/llvm-reduce/deltas/ReduceInstructionFlags.cpp
Log Message:
-----------
[llvm-reduce] Reduce samesign flag from icmp (#115492)
Commit: 92a9bcc84d435ce28d59e7b07e2fb83a7f6bca63
https://github.com/llvm/llvm-project/commit/92a9bcc84d435ce28d59e7b07e2fb83a7f6bca63
Author: David Green <david.green at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll
M llvm/test/CodeGen/AArch64/neon-scalar-by-elem-fma.ll
Log Message:
-----------
[AArch64] Add tablegen patterns for fmla index with extract 0. (#114976)
We have tablegen patterns to produce an indexed `fmla s0, s1, v2.s[2]`
from
`fma extract(Rn, lane), Rm, Ra -> fmla`
But for the case of lane==0, we want to prefer the simple `fmadd s0, s1,
s2`. So we have patterns for
`fma extract(Rn, 0), Rm, Ra -> fmadd`
The problem arises when we have two extracts, as tablegen starts to
prefer the second pattern, as it looks more specialized. This patch adds
additional patterns to catch this case:
`fma extract(Rn, index), extract(Rm, 0), Ra -> fmla`
To make sure the simpler fmadd keeps being selected when both lanes are
extracted from lane 0 we need to add patterns for that case too:
`fma extract(Rn, 0), extract(Rm, 0), Ra -> fmadd`
Commit: 4027400d2ceefb5ce68d4508e5f30dc40c4f535b
https://github.com/llvm/llvm-project/commit/4027400d2ceefb5ce68d4508e5f30dc40c4f535b
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaType.cpp
A clang/test/C/C2y/n3342.c
M clang/test/Misc/warning-flags.c
M clang/test/Sema/declspec.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Add test coverage and documentation for WG14 N3342 (#115494)
This paper made qualified function types implementation-defined. We have
always supported this as an extension, so now we're documenting our
behavior.
Note, we still warn about this by default even in C2y mode because a
qualified function type is a sign of programmer confusion.
Commit: f756d38abf2ec40ee06ee5aa668db444e5d6f485
https://github.com/llvm/llvm-project/commit/f756d38abf2ec40ee06ee5aa668db444e5d6f485
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/C/C2y/n3342.c
Log Message:
-----------
Fix failing test bot
Fixes the issue found by:
https://lab.llvm.org/buildbot/#/builders/144/builds/11191
Commit: e5e15f9128b69f77668465b715b7984b8d5ad75a
https://github.com/llvm/llvm-project/commit/e5e15f9128b69f77668465b715b7984b8d5ad75a
Author: QuietMisdreavus <QuietMisdreavus at users.noreply.github.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
add QuietMisdreavus to Clang/ExtractAPI code owners (#115206)
Adding myself to the ExtractAPI code owners listing so i can participate
in code reviews.
Commit: 19f657d55d679cc3949e9e4c1a5bf76cc4c031b1
https://github.com/llvm/llvm-project/commit/19f657d55d679cc3949e9e4c1a5bf76cc4c031b1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
M llvm/test/CodeGen/X86/vector-sext.ll
Log Message:
-----------
[X86] combineToExtendBoolVectorInReg - use broadcast on AVX2+ targets
Make use of AVX2 broadcasts to splat the source integer across all lanes to simplify the per-lane byte shuffles.
Prep work to avoid a regression in the fix for #66150
Commit: 79c7b7ee9f8b1cec13d9c1026e2bae9b9e91bc6f
https://github.com/llvm/llvm-project/commit/79c7b7ee9f8b1cec13d9c1026e2bae9b9e91bc6f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineToExtendBoolVectorInReg - use SelectionDAG::getSplat helper instead of shuffle(scalar_to_vector(x))
Commit: 92e0fb0c944254312d7b9c6ca64a026643617f60
https://github.com/llvm/llvm-project/commit/92e0fb0c944254312d7b9c6ca64a026643617f60
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
A llvm/test/Transforms/LoopUnroll/preserve-branch-debuglocs.ll
Log Message:
-----------
[DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (#114225)
This patch fixes a simple error where as part of loop unrolling we
optimize conditional loop-exiting branches into unconditional branches
when we know that they will or won't exit the loop, but does not
propagate the source location of the original branch to the new one.
Found using https://github.com/llvm/llvm-project/pull/107279.
Commit: bde3d4a62e714f179c6e859758582d5ef9efa5f8
https://github.com/llvm/llvm-project/commit/bde3d4a62e714f179c6e859758582d5ef9efa5f8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
A llvm/test/MC/Disassembler/RISCV/rv32-invalid-shift.txt
Log Message:
-----------
[RISCV] Only allow 5 bit shift amounts in disassembler for RV32. (#115432)
Fixes 2 old TODOs
Commit: b535e4ecacf4d93ba9632a0e4e9f0dd616dd0472
https://github.com/llvm/llvm-project/commit/b535e4ecacf4d93ba9632a0e4e9f0dd616dd0472
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
Log Message:
-----------
[StructurizeCFG] Remove one SSAUpdater::AddAvailableValue. NFCI. (#115472)
Commit: 39358f846d1e336def88ff9c25581fab392d59fe
https://github.com/llvm/llvm-project/commit/39358f846d1e336def88ff9c25581fab392d59fe
Author: stefankoncarevic <skoncare at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Linalg/named-ops.mlir
Log Message:
-----------
[mlir][linalg] Add Grouped Convolution Ops: conv_2d_nhwgc_gfhwc and conv_2d_nhwgc_gfhwc_q (#108192)
This patch adds two new ops: linalg::Conv2DNhwgcGfhwcOp and
linalg::Conv2DNhwgcGfhwcQOp, and uses them to convert tosa group conv2d
Ops.
- Added linalg::Conv2DNhwgcGfhwcOp and linalg::Conv2DNhwgcGfhwcQOp.
- Updated the conversion process to use these new ops for tosa group
conv2d operations.
Commit: c3c2f46f7bd5891af13fef56a8754007f11ff6c1
https://github.com/llvm/llvm-project/commit/c3c2f46f7bd5891af13fef56a8754007f11ff6c1
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
A clang/test/C/C2y/n3346.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance and add test coverage for WG14 N3346 (#115516)
This converts some undefined behaviors during initialization to instead
be constraint violations. Clang has always implemented these as
constraints, so no compiler changes were needed.
Commit: f7eba08497a2a46f2c10737a110f6b778faf1615
https://github.com/llvm/llvm-project/commit/f7eba08497a2a46f2c10737a110f6b778faf1615
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/ObjectYAML/ELFEmitter.cpp
Log Message:
-----------
[ObjectYAML][ELF] Fix misspelling in `Elf_Verdaux` var name (NFC)
Commit: 60972a893e2bf915f6ff043c9396dea9619456fb
https://github.com/llvm/llvm-project/commit/60972a893e2bf915f6ff043c9396dea9619456fb
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/ObjectYAML/ELFYAML.h
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/test/tools/obj2yaml/ELF/verdef-section.yaml
M llvm/tools/obj2yaml/elf2yaml.cpp
Log Message:
-----------
[ObjectYAML][ELF] Allow verdaux entry offset to be user-defined
Commit: b85e5b49d3efc37e837757a5154884648dc57113
https://github.com/llvm/llvm-project/commit/b85e5b49d3efc37e837757a5154884648dc57113
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/C/C2y/n3346.c
Log Message:
-----------
Speculatively fix test bots
This should address the issues found by:
https://lab.llvm.org/buildbot/#/builders/12/builds/9226
https://lab.llvm.org/buildbot/#/builders/140/builds/10487
https://lab.llvm.org/buildbot/#/builders/27/builds/1752
Commit: d30a6dcfa06196dd98fc898219eb12bab04a56de
https://github.com/llvm/llvm-project/commit/d30a6dcfa06196dd98fc898219eb12bab04a56de
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
Log Message:
-----------
[AMDGPU] Reorganize tests to unblock #112403 (#115503)
We’re facing an issue (#113782) that is currently blocking #112403. However,
since #112403 involves extensive test changes, I’d prefer to land it as soon as
possible. This PR reorganizes the tests by moving test cases expected to fail
into a separate file. Additionally, it changes the `[15 x i32]` arguments to
`[13 x i32]` to bypass the issue.
Commit: e215a1e27d84adad2635a52393621eb4fa439dc9
https://github.com/llvm/llvm-project/commit/e215a1e27d84adad2635a52393621eb4fa439dc9
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-demote-scc-branches.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
A llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.o
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-update.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memmove-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/permlane-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-select.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)
Commit: 4661467003e7bc7f9bb89ab581517617d2a36c62
https://github.com/llvm/llvm-project/commit/4661467003e7bc7f9bb89ab581517617d2a36c62
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
A clang/test/C/C2y/n3341.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Add test coverage and documentation for WG14 N3341 (#115478)
This paper made empty structures and unions implementation-defined. We
have always supported this as a GNU extension, so now we're documenting
our behavior and removing the extension warning in C2y mode.
Commit: b70d1302cf2edaf95817a90f161691c684945273
https://github.com/llvm/llvm-project/commit/b70d1302cf2edaf95817a90f161691c684945273
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/C/C2y/n3346.c
Log Message:
-----------
Another speculative fix for WG14 N3346
This time it's for builders that don't default to C11 or later, such as:
https://lab.llvm.org/buildbot/#/builders/144/builds/11201
Commit: 2808f05e83643b3d5ef128340f6f4da994ed71e3
https://github.com/llvm/llvm-project/commit/2808f05e83643b3d5ef128340f6f4da994ed71e3
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/C/C2y/n3341.c
Log Message:
-----------
Update test case for bots which don't default to C17
Commit: 17f3e00911b860d535f41185e605c47babcc2039
https://github.com/llvm/llvm-project/commit/17f3e00911b860d535f41185e605c47babcc2039
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-narrow-binop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
Log Message:
-----------
Recommit "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"
The increase in fallbacks that was previously reported were not caused
by this change.
Original description:
This matches InstCombine and DAGCombine.
RISC-V only has an ADDI instruction so without this we need additional
patterns to do the conversion.
Some of the AMDGPU tests look like possible regressions. Maybe some
patterns from isel aren't imported.
Commit: e4d57d6a729fd955ccbdd8834065356f26284f3d
https://github.com/llvm/llvm-project/commit/e4d57d6a729fd955ccbdd8834065356f26284f3d
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
M clang/test/SemaOpenACC/compute-construct-if-clause.c
M clang/test/SemaOpenACC/loop-ast.cpp
M clang/test/SemaOpenACC/loop-construct-gang-ast.cpp
M clang/test/SemaOpenACC/loop-construct-vector-ast.cpp
M clang/test/SemaOpenACC/loop-construct-worker-ast.cpp
Log Message:
-----------
[OpenACC] Remove 'loop' link to parent construct
After implementing 'loop', we determined that the link to its parent
only ever uses the type, not the construct itself. This patch removes
it, as it is both a waste and causes problems with serialization.
Commit: e53c46a9084caac115d7f694e5f16f904b0d7124
https://github.com/llvm/llvm-project/commit/e53c46a9084caac115d7f694e5f16f904b0d7124
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
A llvm/test/Transforms/RewriteStatepointsForGC/base-atomicrmw.ll
Log Message:
-----------
[Statepoint] Treat result of atomicrmw xchg as a base pointer (#97280)
Atomic RMW Xchg wasn't handled before when searching for known base
pointers in the IR.
Commit: 40740c4494d971ce410e2051b8d3ea7bbe081c76
https://github.com/llvm/llvm-project/commit/40740c4494d971ce410e2051b8d3ea7bbe081c76
Author: Siddhesh Deodhar <153800103+siddhesh195 at users.noreply.github.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/MemRefToLLVM/AllocLikeConversion.cpp
A mlir/test/Conversion/MemRefToLLVM/invalid-uint.mlir
Log Message:
-----------
Fix crash when using when using --finalize-memref-to-llvm (#112433)
This patch fixes crash when attempting to convert uint to int address
space during finalize-memref-to-llvm by doing the following:
1. Add a check to verify that IntegerAttr is signed int before calling
IntegerAttr::getInt()
2. Emit error when getMemRefAddressSpace returns a failure()
Closes #111242
---------
Co-authored-by: Christian Ulmann <christianulmann at gmail.com>
Commit: 2b885f056585f82903f067840e54557a5b444b65
https://github.com/llvm/llvm-project/commit/2b885f056585f82903f067840e54557a5b444b65
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/test/C/C2y/n3346.c
Log Message:
-----------
Fix test for bots that don't default to C17
Commit: a749c98b49dc9a3863b685212d70be98b4f189c3
https://github.com/llvm/llvm-project/commit/a749c98b49dc9a3863b685212d70be98b4f189c3
Author: weiwei chen <weiwei.chen at modular.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Baze] Add missing lldbDataFormatter.py back to BUILD.bazel. (#115519)
- [x] Add `utils/lldbDataFormatters.py` back.
Commit: fe5a64d1160209f22624b112b2629b0d6c4bb264
https://github.com/llvm/llvm-project/commit/fe5a64d1160209f22624b112b2629b0d6c4bb264
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/expression.cpp
M flang/test/Parser/cuf-sanity-common
M flang/test/Parser/cuf-sanity-tree.CUF
M flang/test/Parser/cuf-sanity-unparse.CUF
Log Message:
-----------
[fang][cuda] Allow * in call chevron syntax (#115381)
Using `*` in call chevron syntax should be allowed. This patch updates
the parser to allow this usage.
```
call sub<<<*,nbBlock>>>()
```
Commit: 86405ed1012c97b063cbde12350fdea141e1ab78
https://github.com/llvm/llvm-project/commit/86405ed1012c97b063cbde12350fdea141e1ab78
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/Reassociate.cpp
A llvm/test/Transforms/Reassociate/preserve-debugloc.ll
Log Message:
-----------
[DebugInfo][Reassociate] Preserve DebugLocs when reassociating subs (#114226)
In NegateValue in Reassociate, we return the negation of an existing
value in order to break a subtract into an negate + add, potentially
creating a new instruction to perform the negation, but we neglect to
propagate the DebugLoc of the sub being replaced to the negate
instruction if one is created. This patch adds that propagation.
Found using https://github.com/llvm/llvm-project/pull/107279.
Commit: 40e545098e8bb5a18988316331e46c4557378afa
https://github.com/llvm/llvm-project/commit/40e545098e8bb5a18988316331e46c4557378afa
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/CIR/CIRGenerator.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypeCache.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
Log Message:
-----------
[clang][CIR] Move CIRGen types into clang::CIRGen (#115385)
https://github.com/llvm/clangir/issues/1025 explains why we want to move
the CIR dialect from the `mlir::cir` to the `cir` namespace. To avoid
overloading the `cir` namespace too much afterwards, move all symbols
whose equivalents live inside the `clang::CodeGen` namespace to a new
`clang::CIRGen` namespace, so that we match the original CodeGen's
structure more closely.
Commit: c72389d4feef9eafc902f99c41f85ed218b5bedf
https://github.com/llvm/llvm-project/commit/c72389d4feef9eafc902f99c41f85ed218b5bedf
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
Log Message:
-----------
[clang][CIR] Merge the mlir::cir namespace into cir (#115386)
https://github.com/llvm/clangir/issues/1025 discusses the motivation.
The mechanical parts of this change were done via:
find clang \( -name '*.h' -o -name '*.cpp' -o -name '*.td' \) -print0 |
xargs -0 perl -pi -e 's/mlir::cir/cir/g'
find clang \( -name '*.h' -o -name '*.cpp' \) -print0 | xargs -0 perl
-pi -e 's/::cir/cir/g'
There were some manual fixups and a clang-format run afterwards.
Commit: 0dbdb3251fe1f276785015c1de3b0a1035c9de8f
https://github.com/llvm/llvm-project/commit/0dbdb3251fe1f276785015c1de3b0a1035c9de8f
Author: Pranav Kant <prka at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Remove mlir-spirv-cpu-runner after 0e39b1348e5fcadb129a6f113e… (#115533)
…5d708a526d8faa
Commit: e5796321cee0f6b3c2fbf33813d6b3af1ddd8f18
https://github.com/llvm/llvm-project/commit/e5796321cee0f6b3c2fbf33813d6b3af1ddd8f18
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/lib/AST/Decl.cpp
Log Message:
-----------
[clang] Avoid unnecessary call to clang::NamespaceDecl::isRedundantInlineQualifierFor(). (#115196)
We observed 2X slowdown in lldb's expression evaluation with
https://github.com/llvm/llvm-project/pull/109147 in some cases. It turns
out that calling `isRedundantInlineQualifierFor` is quite expensive.
Using short-circuit evaluation in the if statement to avoid unnecessary
calls to that function.
Commit: 5005f8d2486d6eec7b2b8ae04f49e8a87ebf4bf6
https://github.com/llvm/llvm-project/commit/5005f8d2486d6eec7b2b8ae04f49e8a87ebf4bf6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
Log Message:
-----------
[RISCV] Add sub_to_add to RISCVPostLegalizerCombiner.
Commit: e8ce76f1a67e99e2eba54a3c8a85a0fd214e3606
https://github.com/llvm/llvm-project/commit/e8ce76f1a67e99e2eba54a3c8a85a0fd214e3606
Author: David Green <david.green at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
Log Message:
-----------
[GlobalISel][AArch64] Allow vector ptr to int unmerges (#115228)
Vector pointer -> scalar integer unmerges are already legal. This
loosens the verifier check for vector-of-pointers -> vectors.
Commit: a29e623e1257b100b507c592a405fee2e0ff34b9
https://github.com/llvm/llvm-project/commit/a29e623e1257b100b507c592a405fee2e0ff34b9
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
Log Message:
-----------
[compiler-rt] Make add_custom_libcxx() resilient to DESTDIR being set
If DESTDIR is set in the environment during the build/test stage, the
local libc++ installation will be installed under DESTDIR instead of being
in the build directory.
See https://github.com/llvm/llvm-project/pull/115077#issuecomment-2464640457
and https://gitlab.kitware.com/cmake/cmake/-/issues/18165.
Pull Request: https://github.com/llvm/llvm-project/pull/115525
Commit: bbcd35270ef4597402b924d547d845893e7fd165
https://github.com/llvm/llvm-project/commit/bbcd35270ef4597402b924d547d845893e7fd165
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
M lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll
M llvm/test/MC/AArch64/SVE2/aesd.s
M llvm/test/MC/AArch64/SVE2/aese.s
M llvm/test/MC/AArch64/SVE2/aesimc.s
M llvm/test/MC/AArch64/SVE2/aesmc.s
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu.s
M llvm/test/MC/AArch64/SVE2/pmullb-128.s
M llvm/test/MC/AArch64/SVE2/pmullt-128.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (#115539)
…293)"
This reverts commit da9499ebfb323602c42aeb674571fe89cec20ca6.
Commit: 6fb36f0bd0a34e6429960247cf088557ae7a6e96
https://github.com/llvm/llvm-project/commit/6fb36f0bd0a34e6429960247cf088557ae7a6e96
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
Log Message:
-----------
[flang][OpenMP] Remove std::variant with single alternative, NFC
Commit: 7dffc96a54f90569d6226dd5713c80fc8f30c76f
https://github.com/llvm/llvm-project/commit/7dffc96a54f90569d6226dd5713c80fc8f30c76f
Author: vporpo <vporpodas at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Clean up dead instructions (#115267)
When scalars get replaced by vectors the original scalars may become
dead. In that case erase them.
Commit: 144bdf3eb7128518ed162c5a168e3ec90922cd9e
https://github.com/llvm/llvm-project/commit/144bdf3eb7128518ed162c5a168e3ec90922cd9e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/select-invariant-cond-cost.ll
Log Message:
-----------
[VPlan] Also check if plan for best legacy VF contains simplifications.
The plan for the VF chosen by the legacy cost model could also contain
additional simplifications that cause cost differences. Also check if it
contains simplifications.
Fixes https://github.com/llvm/llvm-project/issues/114860.
Commit: db6f476e8e29c42691a3c3ea97d7230af2be5df8
https://github.com/llvm/llvm-project/commit/db6f476e8e29c42691a3c3ea97d7230af2be5df8
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
Log Message:
-----------
AMDGPU: Use "countMaxActiveBits() <= 5" to define uint5Bits (#115543)
countMaxTrailingOnes() is not correct. This patch follows the suggestion
from https://github.com/llvm/llvm-project/pull/115372.
Commit: 30ee3f4ec767f2f183d74eb949afa80b8b6261e2
https://github.com/llvm/llvm-project/commit/30ee3f4ec767f2f183d74eb949afa80b8b6261e2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.i1.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (#115537)
Commit: 552f6fe4d503900cae7620f2ddfd7393be670d27
https://github.com/llvm/llvm-project/commit/552f6fe4d503900cae7620f2ddfd7393be670d27
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu_m-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir
Log Message:
-----------
[RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (#115402)
We don't add a custom node for REMW as we can detect it with (srem
(sexti32), (sexti32)).
Commit: dbad9412909a1879f29a4f717b2bf149c9a58369
https://github.com/llvm/llvm-project/commit/dbad9412909a1879f29a4f717b2bf149c9a58369
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/lib/Basic/Attributes.cpp
Log Message:
-----------
[NFC][Clang] Use StringSwitch instead of array for parsing attribute scope (#115414)
Commit: b99d4112585302cbd01f9b851a04adc6e4fb5218
https://github.com/llvm/llvm-project/commit/b99d4112585302cbd01f9b851a04adc6e4fb5218
Author: John Harrison <harjohn at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/Breakpoint.cpp
M lldb/tools/lldb-dap/Breakpoint.h
M lldb/tools/lldb-dap/BreakpointBase.cpp
M lldb/tools/lldb-dap/BreakpointBase.h
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAPForward.h
M lldb/tools/lldb-dap/ExceptionBreakpoint.cpp
M lldb/tools/lldb-dap/ExceptionBreakpoint.h
M lldb/tools/lldb-dap/FunctionBreakpoint.cpp
M lldb/tools/lldb-dap/FunctionBreakpoint.h
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/InstructionBreakpoint.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-dap/SourceBreakpoint.h
M lldb/tools/lldb-dap/Watchpoint.cpp
M lldb/tools/lldb-dap/Watchpoint.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactoring breakpoints to not use the `g_dap` reference. (#115208)
Refactoring breakpoints to not use the `g_dap` reference.
Instead, when a breakpoint is constructed it will be passed a DAP
reference that it should use for its lifetime.
This is part of a larger refactor to remove the global `g_dap` variable
to allow us to create multiple DAP instances.
---------
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: ca33649abe5fad93c57afef54e43ed9b3249cd86
https://github.com/llvm/llvm-project/commit/ca33649abe5fad93c57afef54e43ed9b3249cd86
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-demote-scc-branches.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
R llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.o
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-update.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memmove-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/permlane-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-select.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)"
This reverts commit e215a1e27d84adad2635a52393621eb4fa439dc9 as it broke both
hip and openmp buildbots.
Commit: ccc9d7dc7af535aa240a96bc999911ee9ba2d534
https://github.com/llvm/llvm-project/commit/ccc9d7dc7af535aa240a96bc999911ee9ba2d534
Author: David Green <david.green at arm.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/ptradd.ll
Log Message:
-----------
[GlobalISel][AArch64] Update and extend ptradd.ll test. NFC
We can now support v4p0 pointers without running into verifier issues.
Commit: 441b82b20bf3a622155354e17ae66e0ccff50796
https://github.com/llvm/llvm-project/commit/441b82b20bf3a622155354e17ae66e0ccff50796
Author: Ian Wood <ianwood2024 at u.northwestern.edu>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/InferIntRangeInterfaceImpls.cpp
M mlir/test/Dialect/Vector/int-range-interface.mlir
Log Message:
-----------
[mlir][NFC] IntegerRangeAnalysis: don't loop over splat attr (#115399)
Reland https://github.com/llvm/llvm-project/pull/115229 which was
reverted by https://github.com/llvm/llvm-project/pull/115388 because it
was hitting an assertion in IREE. From the original change: If the
`DenseIntElementsAttr` is a splat value, there is no need to loop over
the entire attr. Instead, just update with the splat value.
The problem with the original implementation is that `SplatElementsAttr`
might be an attr of non `APInt` (e.g. float) elements. Instead, check if
`DenseIntElementsAttr` is splat and use the splat value. Added a test to
ensure there's no crash when handling float attrs.
Commit: 8a7a7b5ffc690bd012cf090d31d47ec938248ba3
https://github.com/llvm/llvm-project/commit/8a7a7b5ffc690bd012cf090d31d47ec938248ba3
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Remove unneeded code connecting blocks in VPBB:splitAt (NFC).
insertBlockAfter already takes care of transferring successors. Remove
unneeded code to transfer them manually.
Commit: 26a9f3f5906c62cff7f2245b98affa432b504a87
https://github.com/llvm/llvm-project/commit/26a9f3f5906c62cff7f2245b98affa432b504a87
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Cleanup getSameOpcode, return InstructionsState::invalid() for non-valid inputs
Just a cleanup and related changes
Commit: 8d8d9f0ece2337d0ce34f464f0ce3d5193460ca4
https://github.com/llvm/llvm-project/commit/8d8d9f0ece2337d0ce34f464f0ce3d5193460ca4
Author: John Harrison <harjohn at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
[lldb-dap] Fix lldb-dap build for windows, missing PATH_MAX. (#115551)
This should fix https://lab.llvm.org/buildbot/#/builders/141/builds/3722
Commit: 7a6a52a2f0c6af63f210562d4a0345232d30d54d
https://github.com/llvm/llvm-project/commit/7a6a52a2f0c6af63f210562d4a0345232d30d54d
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/SandboxIR/Instruction.cpp
Log Message:
-----------
[SandboxIR] Remove incorrect assertion. (#115553)
`insertBefore` can be called on a detached instruction, and we can't
check that the underlying instructions are ordered because instructions
without BB parents have no order.
This problem showed up as a different assertion failure in
`llvm::Instruction::comesBefore` in one of the unit tests when
`EXPENSIVE_CHECKS` are enabled.
Commit: fef4c8a43ac2dbec7921de7963a7bc3fde4f90f6
https://github.com/llvm/llvm-project/commit/fef4c8a43ac2dbec7921de7963a7bc3fde4f90f6
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
Log Message:
-----------
[AMDGPU] Disable verifier in `call-args-inreg-no-sgpr-for-csrspill-xfail.ll`
Similar to f9bd083, this could fix expensive check failure.
Commit: d4eb430c9e4abe0aa1d98915ec4529cc9be9b36b
https://github.com/llvm/llvm-project/commit/d4eb430c9e4abe0aa1d98915ec4529cc9be9b36b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
Log Message:
-----------
[flang][cuda] Support derived type in cuf.alloc (#115550)
Number of bytes to allocate was not computed when using `cuf.alloc` with
a derived type. Update the conversion to compute the number of bytes and
emit an error when type is not supported.
Commit: 023483f5ba6bbbec64bb340578b00bfa3399691d
https://github.com/llvm/llvm-project/commit/023483f5ba6bbbec64bb340578b00bfa3399691d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
Log Message:
-----------
[flang][cuda][NFC] Add test for <<<*, block>>> lowering (#115534)
Chevron syntax has been update to allow `*` to be used for the grid
value. Make sure we set the three grid values to -1, 1, 1 in lowering.
Commit: 6b21cf8ccad84e2670e458d8bdaccbd0ae37b46b
https://github.com/llvm/llvm-project/commit/6b21cf8ccad84e2670e458d8bdaccbd0ae37b46b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M flang/runtime/CUDA/kernel.cpp
Log Message:
-----------
[flang][cuda] Compute grid x when calling a kernel with <<<*, block>>> (#115538)
`-1, 1, 1` is passed when calling a kernel with the `<<<*, block>>>`
syntax. Query the device to compute the grid.x value.
Commit: 50850bc78b00b991cb361cb94a151befd83f6a5d
https://github.com/llvm/llvm-project/commit/50850bc78b00b991cb361cb94a151befd83f6a5d
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
A llvm/test/Transforms/LoopVectorize/uitofp-preserve-nneg.ll
Log Message:
-----------
[LV] Add test for preserving flags when widening casts; NFC
Commit: 8af5ae0648f85b9196a794700ebe5468a0cefd6b
https://github.com/llvm/llvm-project/commit/8af5ae0648f85b9196a794700ebe5468a0cefd6b
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/uitofp-preserve-nneg.ll
Log Message:
-----------
[VPlan] Preserve IR flags when widening casts
We have `nneg` for both `sext` and `uitofp`.
Fixes #114856
Closes #115373
Commit: 738250989ce516f02f809bdfde474a039c77e81f
https://github.com/llvm/llvm-project/commit/738250989ce516f02f809bdfde474a039c77e81f
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/utils/perf-training/bolt.lit.cfg
M clang/utils/perf-training/bolt.lit.site.cfg.in
M clang/utils/perf-training/lit.cfg
M clang/utils/perf-training/lit.site.cfg.in
A clang/utils/perf-training/llvm-support/build.test
Log Message:
-----------
[Clang][perf-training] Do build of libLLVMSupport for perf training (#111625)
This adds a build of the libLLVMSupport to the lit suite that is used
for generating profile data. This helps to improve both PGO and BOLT
optimization of clang over the existing hello world training program.
I considered building all of LLVM instead of just libLLVMSupport, but
there is only a marginal increase in performance for PGO only builds
when training with a build of all of LLVM, and I didn't think it was
enough to justify the increased build times given that it is the default
configuration.
The benchmark[1] I did showed that using libLLVMSupport for training
gives a 1.35 +- 0.02 speed up for clang optimized with PGO + BOLT vs
just 1.05 +- 0.01 speed up when training with hello world.
For comparison, training with a full LLVM build gave a speed up of 1.35
+- 0.1.
Raw data:
| PGO Training | BOLT Training | Speed Up | Error Range |
| ------------ | ------------- | -------- | ----------- |
| LLVM Support | LLVM Support | 1.35 | 0.02 |
| LLVM All | LLVM All | 1.34 | 0.01 |
| LLVM Support | Hello World | 1.29 | 0.02 |
| LLVM All | PGO-ONLY | 1.27 | 0.02 |
| LLVM Support | PGO-ONLY | 1.22 | 0.02 |
| Hello World | Hello World | 1.05 | 0.01 |
| Hello World | PGO-ONLY | 1.03 | 0.01 |
Time it takes to generate profile data (on a 64-core system):
| Training Data | PGO | BOLT |
| ------------- | ----- | ----- |
| LLVM All | 1090s | 3239s |
| LLVM Support | 91s | 655s |
| Hello World | 2s | 9s |
[1] Benchmark was compiling SemaDecl.cpp
Commit: d936924f5e22e8efbc27873f62e8dfc6e410fcf9
https://github.com/llvm/llvm-project/commit/d936924f5e22e8efbc27873f62e8dfc6e410fcf9
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M bolt/include/bolt/Profile/YAMLProfileReader.h
M bolt/lib/Profile/YAMLProfileReader.cpp
Log Message:
-----------
[BOLT][NFC] Make YamlProfileToFunction a DenseMap (#108712)
YAML function profiles have sparse function IDs, assigned from
sequential function IDs from profiled binary. For example, for one large
binary, YAML profile has 15K functions, but the highest ID is ~600K,
close to number of functions in the profiled binary.
In `matchProfileToFunction`, `YamlProfileToFunction` vector was resized
to match function ID, which entails a 40X overcommit. Change the type of
`YamlProfileToFunction` to DenseMap to reduce memory utilization.
#99891 makes use of it for profile lookup associated with a given binary
function.
Commit: 62a7bb09e3646780b7bceb7cef4eba257e3a9818
https://github.com/llvm/llvm-project/commit/62a7bb09e3646780b7bceb7cef4eba257e3a9818
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Resolve CHECK prefix conflict and add a bunch of FIXMEs to bitmanip tests. NFC
Commit: bc1aa2863bd33756a5cc0b729792be0aabed67f4
https://github.com/llvm/llvm-project/commit/bc1aa2863bd33756a5cc0b729792be0aabed67f4
Author: Lei Wang <wlei at fb.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/SampleProfile.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/test/Other/new-pm-pgo-O0.ll
Log Message:
-----------
[SampleFDO] Support enabling sample loader pass in O0 mode (#113985)
Add support for enabling sample loader pass in O0 mode(under
`-fsample-profile-use`). This can help verify PGO raw profile count
quality or provide a more accurate performance proxy(predictor), as O0
mode has minimal or no compiler optimizations that might otherwise
impact profile count accuracy.
- Explicitly disable the sample loader inlining to ensure it only emits
sampling annotation.
- Use flattened profile for O0 mode.
- Add the pass after `AddDiscriminatorsPass` pass to work with
`-fdebug-info-for-profiling`.
Commit: cb98366ea4ce02e739eb4091c6227b67b60616c9
https://github.com/llvm/llvm-project/commit/cb98366ea4ce02e739eb4091c6227b67b60616c9
Author: Pranav Kant <prka at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add exp10m1f (#115565)
Commit: ff98efa329f3866ed7ddd461e9473729c2b91568
https://github.com/llvm/llvm-project/commit/ff98efa329f3866ed7ddd461e9473729c2b91568
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[RISCV][GISel] Enable shift_immed_chain in RISCVPostLegalizerCombiner
This helps combine back to back shifts that may get created when
sext_inreg is legalized.
Commit: 818d715989a82a54bac038b9c293e34dbea45f5c
https://github.com/llvm/llvm-project/commit/818d715989a82a54bac038b9c293e34dbea45f5c
Author: Tex Riddell <texr at microsoft.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
Log Message:
-----------
[Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (#113637)
This change is part of this proposal:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294
- Return true for atan2 from isTriviallyVectorizable
- Add atan2 to VecFuncs.def for massv and accelerate libraries.
- Add atan2 to hasOptimizedCodeGen
- Add atan2 support in llvm/lib/Analysis/ValueTracking.cpp
llvm::getIntrinsicForCallSite and update vectorization tests
- Add atan2 name check to isLoweredToCall in
llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
- Note: there's no test coverage for these names in isLoweredToCall, except that Transforms/TailCallElim/inf-recursion.ll is impacted by the "fabs" case
Thanks to @jroelofs for the atan2 accelerate veclib and associated test
additions, plus the hasOptimizedCodeGen addition.
Part of: Implement the atan2 HLSL Function #70096.
Commit: ff2251543069d9a195256617620b5fdf81512471
https://github.com/llvm/llvm-project/commit/ff2251543069d9a195256617620b5fdf81512471
Author: Alan Zhao <ayzhao at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Headers/CMakeLists.txt
R clang/lib/Headers/amxavx512intrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
R clang/test/CodeGen/X86/amx_avx512_api.c
R clang/test/CodeGen/X86/amxavx512-builtins.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
R llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
R llvm/test/CodeGen/X86/amx-avx512-intrinsics.ll
R llvm/test/CodeGen/X86/amx-tile-avx512-internals.ll
R llvm/test/MC/Disassembler/X86/amx-avx512.txt
R llvm/test/MC/X86/amx-avx512-att.s
R llvm/test/MC/X86/amx-avx512-intel.s
Log Message:
-----------
Revert "[X86][AMX] Support AMX-AVX512" (#115570)
Reverts llvm/llvm-project#114070
Reason: Causes `immintrin.h` to fail to compile if `-msse` and
`-mno-sse2` are passed to clang:
https://github.com/llvm/llvm-project/pull/114070#issuecomment-2465926700
Commit: f791cfc822fab3fa87b4aa10ef96a3401481850f
https://github.com/llvm/llvm-project/commit/f791cfc822fab3fa87b4aa10ef96a3401481850f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port ff2251543069
Commit: 7ec682b16b49c754d5b4aa6347f8f5a00bd7dd78
https://github.com/llvm/llvm-project/commit/7ec682b16b49c754d5b4aa6347f8f5a00bd7dd78
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M llvm/include/llvm/MC/MCPseudoProbe.h
M llvm/lib/MC/MCPseudoProbe.cpp
Log Message:
-----------
[MC] Use StringRefs from pseudo_probe_desc section if it's mapped
Add `IsMMapped` flag to `buildGUID2FuncDescMap` controlling whether to
allocate a string in `FuncNameAllocator` or use StringRef directly.
Keep it false by default, only set it for BOLT use case because BOLT
keeps file sections in memory while processing them. llvm-profgen
constructs GUID2FuncDescMap and then releases the binary.
For medium sized binary with 0.8 GiB .pseudo_probe_desc section, this
saves 0.7 GiB peak RSS in perf2bolt.
Test Plan: no-op for llvm-profgen, NFC for perf2bolt
Reviewers: maksfb, dcci, wlei-llvm, rafaelauler, ayermolo
Reviewed By: wlei-llvm
Pull Request: https://github.com/llvm/llvm-project/pull/112996
Commit: b70eb8631386bbccca5a07bb0253aa738d4cda81
https://github.com/llvm/llvm-project/commit/b70eb8631386bbccca5a07bb0253aa738d4cda81
Author: Sam Clegg <sbc at chromium.org>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
A lld/test/wasm/lto/thinlto-emit-index.ll
A lld/test/wasm/lto/thinlto-object-suffix-replace.ll
A lld/test/wasm/lto/thinlto-prefix-replace.ll
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/InputFiles.cpp
M lld/wasm/InputFiles.h
M lld/wasm/LTO.cpp
M lld/wasm/Options.td
Log Message:
-----------
[lld][WebAssemlby] Implement --thinlto-object-suffix-replace/--thinlto-prefix-replace (#114625)
Fixes: #79604
Commit: 6548b6354d1d990e1c98736f5e7c3de876bedc8e
https://github.com/llvm/llvm-project/commit/6548b6354d1d990e1c98736f5e7c3de876bedc8e
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-demote-scc-branches.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
A llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.o
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-update.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memmove-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/permlane-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-select.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)"
This reverts commit ca33649abe5fad93c57afef54e43ed9b3249cd86.
Commit: d413335ccf5cad3a8cb4ebce49a1d22daabbf3ad
https://github.com/llvm/llvm-project/commit/d413335ccf5cad3a8cb4ebce49a1d22daabbf3ad
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
A clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
A clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
Log Message:
-----------
[HLSL] Add Append/ConsumeStructuredBuffer definitions to HLSLExternalSemaSource (#113643)
Adds `AppendStructuredBuffer` and `ConsumeStructuredBuffer` definition
to HLSLExternalSemaSource. Adds separate tests for the AST shape and
element types, and adds constructor/handle.fromBinding test case to
shared test file for structured buffers.
These buffers do not have any subscript operators. Append and Consume
methods will be added later in llvm/llvm-project#112968.
Fixes #112777
Commit: c93e001ca695e905cb965b36d63f7a348d1dd809
https://github.com/llvm/llvm-project/commit/c93e001ca695e905cb965b36d63f7a348d1dd809
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
Log Message:
-----------
[FIX][AMDGPU] Fix test case failures that caused by reapply of #112403
Commit: 60ea60e36eb6de19e8e509e5b50a390e95801321
https://github.com/llvm/llvm-project/commit/60ea60e36eb6de19e8e509e5b50a390e95801321
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
Log Message:
-----------
[RISCV] Fix some isel patterns that used a type where we normally put a regclass. NFC
Commit: c61832444d7539eddb939df1107a751a6784aff3
https://github.com/llvm/llvm-project/commit/c61832444d7539eddb939df1107a751a6784aff3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Teach extractCallsFromIR to look into inline stacks (#115441)
To undrift the profile, we need to extract as many caller-callee pairs
from the IR as we can to maximize the number of call sites in the
profile we can undrift.
Now, since MemProfUsePass runs after early inlining, some functions
have been inlined, and we may no longer have bodies for those
functions in the IR. To cope with this, this patch teaches
extractCallsFromIR to extract caller-calee pairs from inline stacks.
The output format of extractCallsFromIR remains the same. We still
return a map from caller GUIDs to lists of corresponding call sites.
Commit: 1bf385f10291101163a346c8f075d56e1578351b
https://github.com/llvm/llvm-project/commit/1bf385f10291101163a346c8f075d56e1578351b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/memcpy-fixed-align.ll
M llvm/test/CodeGen/AMDGPU/required-export-priority.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
Log Message:
-----------
AMDGPU: Default to selecting frame indexes to SGPRs (#115060)
Only select to a VGPR if it's trivally used in VGPR only contexts.
This fixes mishandling frame indexes used in SGPR only contexts,
like inline assembly constraints.
This is suboptimal in the common case where the frame index
is transitively used by only VALU ops. We make up for this by later
folding the copy to VALU plus scalar op in SIFoldOperands.
Commit: fb4f426c81d7e87dbb30df7abeba15ffc2f9f41a
https://github.com/llvm/llvm-project/commit/fb4f426c81d7e87dbb30df7abeba15ffc2f9f41a
Author: weiwei chen <weiwei.chen at modular.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Add a comment why an export file is needed. (#115556)
- [x] Add follow-up comment on why the export file is needed in
BUILD.bazel
Commit: 501a58344179242f702f55e0ee5c039290426c54
https://github.com/llvm/llvm-project/commit/501a58344179242f702f55e0ee5c039290426c54
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/MSP430/MSP430InstrInfo.td
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrSystem.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/test/CodeGen/X86/GlobalISel/select-blsi.mir
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
Log Message:
-----------
[TableGen][SelectionDAG] Remove the `implicit` DAG node (#115295)
The node was introduced in 59c39dc1 and was intended to allow writing
patterns like this:
`[(set AL, (mul AL, GR8:$src1)), (implicit EFLAGS)]`
However, it does not introduce new functionality because the same
pattern can be equivalently expressed as:
`[(set AL, EFLAGS, (mul AL, GR8:$src1))]`
The latter form is also more flexible as it allows reordering output
operands.
In most places uses of `implicit` were redundant -- removing them didn't
change anything in the generated DAG tables. The only three cases where
it did have effect are in X86InstrArithmetic.td and X86InstrSystem.td --
those were rewritten to use `set` node.
Removing `implicit` from some patterns made them importable by GISel,
hence the change in a test.
Commit: 5e02fd8d0b3c6638220c95e997c43fdc9d7ded3c
https://github.com/llvm/llvm-project/commit/5e02fd8d0b3c6638220c95e997c43fdc9d7ded3c
Author: Mirko <mirkomueller97 at live.de>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/LiveRangeShrink.cpp
A llvm/test/CodeGen/X86/lrshrink-debug.ll
Log Message:
-----------
[CodeGen][X86] LiveRangeShrink: fix increment after end (#115276)
This fixes the infinite loop discovered in #114195.
Since we skip debug instructions at the start of the loop we do not need
to skip them again at the end of the loop.
Commit: 8f4401374ca1a1eaf47d90d0fc3d189c862ae4f2
https://github.com/llvm/llvm-project/commit/8f4401374ca1a1eaf47d90d0fc3d189c862ae4f2
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amxavx512intrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/amx_avx512_api.c
A clang/test/CodeGen/X86/amxavx512-builtins.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
A llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
A llvm/test/CodeGen/X86/amx-avx512-intrinsics.ll
A llvm/test/CodeGen/X86/amx-tile-avx512-internals.ll
A llvm/test/MC/Disassembler/X86/amx-avx512.txt
A llvm/test/MC/X86/amx-avx512-att.s
A llvm/test/MC/X86/amx-avx512-intel.s
Log Message:
-----------
Reland "[X86][AMX] Support AMX-AVX512" (#115581)
Resolve compile fail without SSE2.
Commit: cdc1c1ac84ea525b8c2dceaeb7d29ede94346acf
https://github.com/llvm/llvm-project/commit/cdc1c1ac84ea525b8c2dceaeb7d29ede94346acf
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 8f4401374ca1
Commit: 09b372aa60548b8ee94a801d3d966001ad60a677
https://github.com/llvm/llvm-project/commit/09b372aa60548b8ee94a801d3d966001ad60a677
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/arm64-mul.ll
M llvm/test/CodeGen/AArch64/sadd_sat.ll
M llvm/test/CodeGen/AArch64/sadd_sat_plus.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/ssub_sat.ll
M llvm/test/CodeGen/AArch64/ssub_sat_plus.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[GISel][AArch64][RISCV] Allow G_SEXT_INREG patterns to be imported. (#115576)
SelectionDAG uses VTSDNode to store the extension type. GlobalISel uses
a literal constant operand.
For vectors, SelectionDAG uses a type with the same number of elements
as other operand of the sext_inreg. I assume for GISel we would just use
the scalar size.
Commit: b83399eab603320d3c2998450f4ada83e7fe746c
https://github.com/llvm/llvm-project/commit/b83399eab603320d3c2998450f4ada83e7fe746c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-08 (Fri, 08 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelperCompares.cpp
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
M llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
Log Message:
-----------
[GlobalISel] Remove unused includes (NFC) (#115429)
Identified with misc-include-cleaner.
Commit: fe6366928201b7500ee7e903c01bf4bbd661ee2d
https://github.com/llvm/llvm-project/commit/fe6366928201b7500ee7e903c01bf4bbd661ee2d
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/FinalizeISel.h
M llvm/include/llvm/CodeGen/LocalStackSlotAllocation.h
M llvm/include/llvm/CodeGen/MIRPrinter.h
M llvm/include/llvm/CodeGen/MachineVerifier.h
M llvm/include/llvm/CodeGen/PHIElimination.h
M llvm/include/llvm/CodeGen/RegAllocFast.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/OptimizePHIs.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TailDuplication.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
A llvm/test/CodeGen/X86/optnone.mir
Log Message:
-----------
[Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (#115471)
Support `MachineFunction` in `OptNoneInstrumentation`, also add
`isRequired` to all necessary passes.
Commit: 9afec3ca3e926cd481af372b72ee5bd7e54942d0
https://github.com/llvm/llvm-project/commit/9afec3ca3e926cd481af372b72ee5bd7e54942d0
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/optnone.mir
Log Message:
-----------
[Instrumentation] Fix test failure in #115471 (#115596)
Add triple to indicate this is x86 test.
Commit: 5a41800ea1d9bf382cf1039da6016550ddb072d7
https://github.com/llvm/llvm-project/commit/5a41800ea1d9bf382cf1039da6016550ddb072d7
Author: Afanasyev Ivan <ivafanas at gmail.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
Log Message:
-----------
[SROA] Fix NumPromoted statistic for SROA pass (#115586)
`NumPromoted` stat should not be increased if `SROASkipMem2Reg` is set
and nothing is changed.
Commit: 10f35a04c94e96c1cc0497f2b3b2ab8536a98059
https://github.com/llvm/llvm-project/commit/10f35a04c94e96c1cc0497f2b3b2ab8536a98059
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
Log Message:
-----------
[InstCombine] add control for SimplifyDemandedVectorElts depth limit (#113717)
Allows customizing the depth of the recursive search on vectors that
InstCombine does when looking for unused elements.
We find it helpful to be able to customize this for compile time
reasons.
Commit: 5a08acc1e7874a6cb4b273988b83e587e6fea605
https://github.com/llvm/llvm-project/commit/5a08acc1e7874a6cb4b273988b83e587e6fea605
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/test/CodeGen/RISCV/float-maximum-minimum.ll
Log Message:
-----------
[LegalizeTypes] Support softening FMINIMUM/FMAXIMUM (#115463)
Without this, you get an error "Do not know how to soften the result of
this operator!" when compiling for a soft float target.
The libcall names match those defined in glibc
<https://www.gnu.org/software/libc/manual/html_node/Misc-FP-Arithmetic.html>
and more recently added to LLVM's libc
<https://github.com/llvm/llvm-project/pull/86016>.
Commit: ae4fc80574cfbbf2b2b53f2728cd785db76e9e69
https://github.com/llvm/llvm-project/commit/ae4fc80574cfbbf2b2b53f2728cd785db76e9e69
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-nonzero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-zero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize.ll
M llvm/test/CodeGen/RISCV/global-merge-offset.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
Log Message:
-----------
[RISCV] When using global merging, don't enable merging of external globals by default (#115484)
AArch64 left this disabled after seeing some cases of slightly worse
codegen that weren't tracked down, so I suggest as a path to
incrementally moving towards enable globals merging we follow suit, and
evaluate turning on later.
This patch disables merging of external globals, but also adds a flag to
override that. This reduces churn in test cases, simplifies benchmarking
runs, and this flag can be removed later.
A follow-on PR enables the globals merging pass by default (and as it's
based on this commit, merging of external globals is disabled just as
they are for AArch64).
Commit: 8833a4474654f7413ae3c53a15e350e06bce2d2e
https://github.com/llvm/llvm-project/commit/8833a4474654f7413ae3c53a15e350e06bce2d2e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Connect scalar header to CFG in VPlan unit test.
This makes sure the VPIRBasicBlock is deleted when the VPlan is
destroyed.
Fixes https://github.com/llvm/llvm-project/issues/114623.
Commit: 581106759a3eb85d37aa004e0ad795dc8b433080
https://github.com/llvm/llvm-project/commit/581106759a3eb85d37aa004e0ad795dc8b433080
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/Inputs/loadconfig-arm64ec.s
M lld/test/COFF/arm64ec-pdb.test
A lld/test/COFF/lto-arm64ec.ll
Log Message:
-----------
[LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (#115474)
Commit: 1aff96b3dfcc58d62fda5b1452a8029f1a737cc2
https://github.com/llvm/llvm-project/commit/1aff96b3dfcc58d62fda5b1452a8029f1a737cc2
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
A llvm/test/Transforms/PhaseOrdering/X86/preserve-access-group.ll
Log Message:
-----------
[InstCombine] Add extra tests for preserving load metadata.
Test cases for https://github.com/llvm/llvm-project/issues/115595.
Commit: 56253c79c61fb5478bc3162cfe1e25e98791a148
https://github.com/llvm/llvm-project/commit/56253c79c61fb5478bc3162cfe1e25e98791a148
Author: David Green <david.green at arm.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AArch64/ptradd.ll
Log Message:
-----------
[GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (#115225)
When combining unmerge we could end up with ptr to i64 bitcasts. Make
sure they are created as ptrtoint/inttoptr instead.
Commit: 7ac62f33cffb618758edb6a0997c21b2319fbf9b
https://github.com/llvm/llvm-project/commit/7ac62f33cffb618758edb6a0997c21b2319fbf9b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
Log Message:
-----------
[InstCombine] Add load/select test with noundef/invariant.load.
Further extends the test coverage added in 1aff96b3dfc with a load with
noundef and invariant.load metadata, which may trigger UB.
Commit: 6beaa123a2899f52dd5f37b881d7fc398d70e167
https://github.com/llvm/llvm-project/commit/6beaa123a2899f52dd5f37b881d7fc398d70e167
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrUtils.td
Log Message:
-----------
[X86] Make use of `null_frag` (NFC) (#115601)
Commit: 1d41543c95f884e6ebecc63ab9d0d30ce481345c
https://github.com/llvm/llvm-project/commit/1d41543c95f884e6ebecc63ab9d0d30ce481345c
Author: lntue <lntue at google.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M libc/src/math/generic/log1p.cpp
M libc/test/src/math/smoke/log1p_test.cpp
Log Message:
-----------
[libc][math] Fix log1p SEGV with large inputs when FTZ/DAZ flags are set. (#115541)
Commit: 3654183afb283c9515a482f07fde730dd458a883
https://github.com/llvm/llvm-project/commit/3654183afb283c9515a482f07fde730dd458a883
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-icp.ll
Log Message:
-----------
[MemProf] Allow promotion if target is a declaration (#115555)
Fixes an oversight in the MemProf ICP handling, that was blocking
promotion/cloning of indirect calls when the profiled target is a
declaration (i.e wasn't imported). There is no issue promoting in
that case, and in fact the comment mentions we should attempt to at
least import as declarations to enable more promotion.
Note that normal ICP currently requires that the target be a definition,
which is how this check ended up here. The comment there says that it
must be a definition because ThinLTO could remove declarations for
symbols found to be globally dead in the binary. However, here we are
always performing MemProf ICP in the ThinLTO backends, which is after
the globally dead symbols are removed (via dropDeadSymbols before
starting the optimization pipeline) [1].
For now, guard this with an option (flag is off which means the new
promotion is enabled by default) to simplify debugging or disabling it
if
this proves problematic.
[1] In fact we could also be more aggressive in regular ICP when invoked
in the ThinLTO backend
Commit: 6fb2a6044f11e251c3847d227049d9dae8b87796
https://github.com/llvm/llvm-project/commit/6fb2a6044f11e251c3847d227049d9dae8b87796
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
A llvm/test/Transforms/VectorCombine/X86/pr115575.ll
Log Message:
-----------
[VectorCombine] Add test coverage for #115575
Commit: 958e37cd1feabf29fb1cc3fb5ac82051ad8d43eb
https://github.com/llvm/llvm-project/commit/958e37cd1feabf29fb1cc3fb5ac82051ad8d43eb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/pr115575.ll
Log Message:
-----------
[VectorCombine] scalarizeBinopOrCmp - check for out of bounds element indices
Fixes #115575
Commit: ccaded2b1d0d2cf3d8041baeeec9cfad632c9450
https://github.com/llvm/llvm-project/commit/ccaded2b1d0d2cf3d8041baeeec9cfad632c9450
Author: Harald van Dijk <harald.vandijk at codeplay.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/arg-attr-propagation.ll
Log Message:
-----------
[Inliner] Prevent adding pointer attributes to non-pointer arguments (#115569)
Fixes a crash seen after #114311
Commit: c3c424d2eafeba4ec25df8698e6311a8fa78fbfe
https://github.com/llvm/llvm-project/commit/c3c424d2eafeba4ec25df8698e6311a8fa78fbfe
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
Log Message:
-----------
[lldb-dap] Use heterogenous lookups with std::map (NFC) (#115590)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: eedff8b4c0c667c39b034f02c9a40693dff63eda
https://github.com/llvm/llvm-project/commit/eedff8b4c0c667c39b034f02c9a40693dff63eda
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/GSYM/OutputAggregator.h
Log Message:
-----------
[DebugInfo] Simplify code with std::map::operator[] (NFC) (#115591)
Commit: dfe43bd1ca46c59399b7cbbf81b09256232e27f9
https://github.com/llvm/llvm-project/commit/dfe43bd1ca46c59399b7cbbf81b09256232e27f9
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86ArgumentStackSlotRebase.cpp
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86DiscriminateMemOps.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86DynAllocaExpander.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FastPreTileConfig.cpp
M llvm/lib/Target/X86/X86FastTileConfig.cpp
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86IndirectThunks.cpp
M llvm/lib/Target/X86/X86InsertPrefetch.cpp
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InterleavedAccess.cpp
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86LowerTileCopy.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86PadShortFunction.cpp
M llvm/lib/Target/X86/X86PartialReduction.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TileConfig.cpp
M llvm/lib/Target/X86/X86WinFixupBufferSecurityCheck.cpp
Log Message:
-----------
[X86] Remove unused includes (NFC) (#115593)
Identified with misc-include-cleaner.
Commit: 95eeae195e608797314d71f7327e638a98764471
https://github.com/llvm/llvm-project/commit/95eeae195e608797314d71f7327e638a98764471
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Add PredIdx and SuccIdx arguments to connectBlocks (NFC).
Add extra arguments to connectBlocks which allow selecting which
existing predecessor/successor to update. This avoids having to
disconnect blocks first unnecessarily.
Suggested in https://github.com/llvm/llvm-project/pull/114292.
Commit: f8fea5d49ba6f9e6c6fedc5a6e1f7c30cefd5357
https://github.com/llvm/llvm-project/commit/f8fea5d49ba6f9e6c6fedc5a6e1f7c30cefd5357
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/tools/llvm-pdbutil/PdbYaml.h
Log Message:
-----------
[llvm] Add explicit visibility macros to YAMLTraits classes (#111484)
These symbols need to be exported for llvm-pdbutil when using windows
shared library builds.
Exclude the YAML traits declared in llvm-pdbutil so there not declared
as dllimported which will causing missing symbol errors for windows
shared library builds.
This is part of the work to enable LLVM_BUILD_LLVM_DYLIB and plugins on
window.
Commit: 230946fad69c952dc434aa3e2f92853c1ee8d304
https://github.com/llvm/llvm-project/commit/230946fad69c952dc434aa3e2f92853c1ee8d304
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
Log Message:
-----------
[ADT] Mark reverse and concat as nodiscard (#115611)
It may not be immediately obvious if these two functions modify the
given ranges or return a view over them. We have seen downstream code
that mistakenly assumed the given range would be mutated.
Add the `[[nodiscard]]` attribute to prevent these errors. Also clarify
the lack of mutation in the documentation comments.
Commit: 69fb9bcde0312e672e6f2280f8662784731d79e6
https://github.com/llvm/llvm-project/commit/69fb9bcde0312e672e6f2280f8662784731d79e6
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ThrowKeywordMissingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/throw-keyword-missing.cpp
Log Message:
-----------
Fix false positive in bugprone-throw-keyword-missing (#115302)
Fixes #115055
---------
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: ccb40b0b7a51a0619acc8a6b479b86ff28a19e5b
https://github.com/llvm/llvm-project/commit/ccb40b0b7a51a0619acc8a6b479b86ff28a19e5b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Add insertOnEdge to VPBlockUtils (NFC).
Add a new helper to insert a new VPBlockBase on an edge between 2
blocks. Suggested in https://github.com/llvm/llvm-project/pull/114292
and also useful for some existing code.
Commit: c236dbc343b497c11790adc61cf4e041aeb42dbc
https://github.com/llvm/llvm-project/commit/c236dbc343b497c11790adc61cf4e041aeb42dbc
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[Vectorize] Simplify code with MapVector::operator[] (NFC) (#115592)
Commit: 0ac4821b718dd14e80d3856efa532d52df6878bb
https://github.com/llvm/llvm-project/commit/0ac4821b718dd14e80d3856efa532d52df6878bb
Author: Javed Absar <106147771+javedabsar1 at users.noreply.github.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
A mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
Log Message:
-----------
[mlir][linalg] unfold projected permutation. (#114704)
Patterns to decompose the input operand(s) of a linalg.generic that has
a projected permutation` affine-map -- i.e. effectively a folded `transpose`,
`broadcast`, or a mixture of two -- into explicit transpose and broadcast.
This is useful for instance when trying to recognize named ops.
email: quic_mabsar at quicinc.com
Commit: 10b80ff0cc3e6af8fddb9003571e2cc22f9c58b2
https://github.com/llvm/llvm-project/commit/10b80ff0cc3e6af8fddb9003571e2cc22f9c58b2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
Log Message:
-----------
[Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (#115623)
Note that PointerUnion::{is,get,dyn_cast} have been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Commit: 38b0e1c939e818564019bb5bff95a0f1abbf9d19
https://github.com/llvm/llvm-project/commit/38b0e1c939e818564019bb5bff95a0f1abbf9d19
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GISel] Add legalizer-info-validation test. NFC
Based on the same test from AArch64. I used a reasonable superset
ISA string to get the most coverage. Might be worth adding more
RUN lines in the future.
Commit: 08af115d97e39223b5cc8bdbc56b1dfb758bf6d3
https://github.com/llvm/llvm-project/commit/08af115d97e39223b5cc8bdbc56b1dfb758bf6d3
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/amx_transpose_intrinsics.ll
Log Message:
-----------
Fix mistakes in #113532 (#115631)
Found during review #115151
Commit: d6e65a66095cc3c93ea78669bc41d0885780e8ea
https://github.com/llvm/llvm-project/commit/d6e65a66095cc3c93ea78669bc41d0885780e8ea
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Log Message:
-----------
Fix a warning. [-Wunused-but-set-variable]
Commit: 3cdd86bb476bb90e535552fe86ba5f9d15f33d37
https://github.com/llvm/llvm-project/commit/3cdd86bb476bb90e535552fe86ba5f9d15f33d37
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
[SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (#115417)
Commit: 639cafd05f5559c8fed92d58705dec817f876e23
https://github.com/llvm/llvm-project/commit/639cafd05f5559c8fed92d58705dec817f876e23
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-09 (Sat, 09 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GISel] Use boolean predicated legalization action methods to remove a custom lambda. (#115628)
Commit: f344367f583538746b13a5560bcdedacbd295ee7
https://github.com/llvm/llvm-project/commit/f344367f583538746b13a5560bcdedacbd295ee7
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M lld/test/ELF/aarch64-feature-pac.s
Log Message:
-----------
[PAC][lld] Test warning emitted for non-PAuth-marked files with `-z pac-plt` (#112958)
b6162622c054f changed semantics of `-z pac-plt` initially introduced in
e208208a3132c, so, the following comment from test/ELF/aarch64-feature-pac.s
is no longer true:
> There are no warnings in this case as the choice to use PAC in PLT entries
> is orthogonal to the choice of using PAC in relocatable objects. The
> presence of the PAC .note.gnu.property is an indication of preference by
> the relocatable object.
This patch updates the test so we ensure a warning is emitted for an
input file when `-z pac-plt` is passed but the file does not have
GNU_PROPERTY_AARCH64_FEATURE_1_PAC set in GNU_PROPERTY_AARCH64_FEATURE_1_AND
property.
Commit: e4c14190bb097162e15cd5822b3de97ea7bac0d6
https://github.com/llvm/llvm-project/commit/e4c14190bb097162e15cd5822b3de97ea7bac0d6
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Dominance.h
M mlir/lib/IR/Dominance.cpp
M mlir/test/Analysis/test-dominance.mlir
M mlir/test/lib/IR/TestDominance.cpp
Log Message:
-----------
[mlir][IR] `DominanceInfo`: Fix inconsistency in proper block/op dominance (#115413)
An operation is considered to properly dominate itself in a graph
region. That's because there is no concept of "dominance" in a graph
region. (`dominates` returns "true" for all pairs of ops in the same
block. It makes sense to do the same for `properlyDominates`.)
Previously, a block was *not* considered to dominate itself in a graph
region. This commit fixes this asymmetry between ops and blocks: both
are now properly dominating themselves in a graph region.
Commit: e1495283cf74590fbdeb6d46ad815b4d10b1902f
https://github.com/llvm/llvm-project/commit/e1495283cf74590fbdeb6d46ad815b4d10b1902f
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M clang/test/Driver/riscv-profiles.c
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/test/CodeGen/RISCV/attributes.ll
Log Message:
-----------
[RISCV] Use the 'B' extension in RISC-V profile definitions (#113942)
RVA22 has retroactively been defined as including 'B' (as it's a
shorthand for Zba+Zbb+Zbs, which were previously explicitly enumerated)
and RV{A,B,M}23 are defined featuring B. We don't currently infer B
whenever Zba+Zbb+Zbs are present due to concerns about compatibility
with external assemblers such as gas.
We don't believe that adding B to RVA22 will cause issues for users who
(for instance) build with clang and assemble with binutils as looking at
the binutils commit history:
zic64b support was only committed in
25f05199bb7e35820c23e802424484accb7936b1 in July 2024
B support was committed in c144f638337944101131d9fe6de4ab908f6d4c2d in
May 2024
So given we emit zic64b anyway (as it has always been in the RVA22
spec), no binutils that would have previously successfully assembled our
rva22u64 output should fail due to the addition of 'B'.
Commit: 59770a43826f19ed2a735b1e461a43c63bd456bf
https://github.com/llvm/llvm-project/commit/59770a43826f19ed2a735b1e461a43c63bd456bf
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
Log Message:
-----------
[NFC] Correct imprecise file location in the comment. (#115630)
Commit: 4edd711b4d7ec60117bf77ab79491dba8cf3bb76
https://github.com/llvm/llvm-project/commit/4edd711b4d7ec60117bf77ab79491dba8cf3bb76
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
Log Message:
-----------
[NVPTX] Add TMA bulk tensor prefetch intrinsics (#115527)
This patch adds NVVM intrinsics and NVPTX codegen for:
* cp.async.bulk.tensor.prefetch.1D -> 5D variants, supporting both Tile
and Im2Col modes. These intrinsics optionally support cache_hints as
indicated by the boolean flag argument.
* Lit tests are added for all combinations of these intrinsics in cp-async-bulk-tensor-prefetch.ll.
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst file.
* PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async-bulk-prefetch-tensor
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: d822c099eeacc69f6bf834a6373a41d0c9f84a3e
https://github.com/llvm/llvm-project/commit/d822c099eeacc69f6bf834a6373a41d0c9f84a3e
Author: Douglas <8796590+dgg5503 at users.noreply.github.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
A llvm/test/ExecutionEngine/JITLink/Generic/Inputs/sect at create/sectcreate-data.txt
R llvm/test/ExecutionEngine/JITLink/Generic/Inputs/sectcreate-data.txt
M llvm/test/ExecutionEngine/JITLink/Generic/sectcreate.test
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[JITLink] Use `rsplit` on `-sectcreate` argument in llvm-jitlink (#115511)
This accounts for cases where the file path may contain an `@` symbol.
In such cases, the split occurs too early causing argument parsing to
fail.
Commit: 27bf45aa36386136db179c494358670a994a98a5
https://github.com/llvm/llvm-project/commit/27bf45aa36386136db179c494358670a994a98a5
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
Log Message:
-----------
[InstCombine] Fix poison safety of folding shufflevector into select (#115483)
We are allowed to fold shufflevector into select iff the condition is
guaranteed not to be poison or the RHS is a poison.
Alive2: https://alive2.llvm.org/ce/z/28zEWR
Closes https://github.com/llvm/llvm-project/issues/115465.
Commit: a5a1612deb7af713835b5c8cf22105c5699bc62d
https://github.com/llvm/llvm-project/commit/a5a1612deb7af713835b5c8cf22105c5699bc62d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
Log Message:
-----------
[VPlan] Consistently use DEBUG_TYPE loop-vectorize.
This ensures debug messages in VPlan.cpp are included in the commonly
used -debug-only=loop-vectorize.
Commit: 81613ddcd6fe04a029c1a15a3454b5b0cd18a24c
https://github.com/llvm/llvm-project/commit/81613ddcd6fe04a029c1a15a3454b5b0cd18a24c
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
A llvm/include/llvm/ExecutionEngine/Orc/CoreContainers.h
Log Message:
-----------
[ORC] Move some typedefs from Core.h to a new header, CoreContainers.h. NFC.
This is a first step towards breaking up Core.h
Commit: 3d2849bd151f415b59044736e069c7605339b8e2
https://github.com/llvm/llvm-project/commit/3d2849bd151f415b59044736e069c7605339b8e2
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
A llvm/include/llvm/ExecutionEngine/Orc/MaterializationUnit.h
Log Message:
-----------
[ORC] Move MaterializationUnit from Core.h into its own header. NFC.
Continuing Core.h clean-up.
Commit: 7085ac8a0718a3a37c7cb6641203e72fbc0b1aea
https://github.com/llvm/llvm-project/commit/7085ac8a0718a3a37c7cb6641203e72fbc0b1aea
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MaterializationUnit.h
Log Message:
-----------
[ORC] Switch to C++17 nested namespaces. NFC.
Commit: ac30a0f349c960184c0165adcd87baecfc48a1af
https://github.com/llvm/llvm-project/commit/ac30a0f349c960184c0165adcd87baecfc48a1af
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/test/ELF/aarch64-feature-pac.s
M lld/test/ELF/aarch64-feature-pauth.s
Log Message:
-----------
[PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (#112959)
When PAuth core info is present and (platform,version) is not (0,0),
treat input files as pac-enabled and do not emit a warning with
`-z pac-plt` passed.
Commit: 2c10664afafcd5915ebbde9cb7cb0e9cf8751b34
https://github.com/llvm/llvm-project/commit/2c10664afafcd5915ebbde9cb7cb0e9cf8751b34
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
R libcxx/include/__type_traits/add_const.h
R libcxx/include/__type_traits/add_cv.h
A libcxx/include/__type_traits/add_cv_quals.h
R libcxx/include/__type_traits/add_volatile.h
M libcxx/include/__type_traits/is_trivially_assignable.h
M libcxx/include/__utility/as_const.h
M libcxx/include/any
M libcxx/include/module.modulemap
M libcxx/include/type_traits
M libcxx/include/variant
Log Message:
-----------
[libc++][NFC] Merge add_{const, cv, volatile}.h into a single header (#115610)
There isn't much benefit in having granular headers for only a few
simple lines of code.
Commit: ad2d313f7455fe27896db8df9ea9aadd60b53436
https://github.com/llvm/llvm-project/commit/ad2d313f7455fe27896db8df9ea9aadd60b53436
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 2c10664afafc
Commit: 7c13477351046c115ad86e047f3f7346bb925b19
https://github.com/llvm/llvm-project/commit/7c13477351046c115ad86e047f3f7346bb925b19
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
Log Message:
-----------
[X86] Delete unused X86setcc_commute node (NFC) (#115650)
The last use was removed by 87aa59a0.
Commit: 99f1019f596f745c720e97137bcadb239c573e3e
https://github.com/llvm/llvm-project/commit/99f1019f596f745c720e97137bcadb239c573e3e
Author: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M clang/docs/SafeBuffers.rst
Log Message:
-----------
[NFC] Trivial doc fixup in SafeBuffers.rst
Commit: 1d6d073fbbaebbde6891501fe20f02a0ea345131
https://github.com/llvm/llvm-project/commit/1d6d073fbbaebbde6891501fe20f02a0ea345131
Author: David Green <david.green at arm.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/test/CodeGen/AArch64/sve-intrinsics-counting-elems-i32.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-counting-elems.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
Log Message:
-----------
[AArch64] Remove FeatureUseScalarIncVL
FeatureUseScalarIncVL is a tuning feature, used to control whether addvl or
add+cnt is used. It was previously added as a dependency for FeatureSVE2, an
architecture feature but this can be seen as a layering violation. The main
disadvantage is that -use-scalar-inc-vl cannot be used without disabling sve2
and all dependant features.
This patch now replaces that with an option that if unset defaults to hasSVE ||
hasSME, but is otherwise overriden by the option. The hope is that no cpus will
rely on the tuning feature (or we can readdit if needed.
Commit: c8f33738a5a801b5bc083ae9b2ced39ef1b12980
https://github.com/llvm/llvm-project/commit/c8f33738a5a801b5bc083ae9b2ced39ef1b12980
Author: David Green <david.green at arm.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-ext.ll
Log Message:
-----------
[AArch64] Rewrite arm64-ext.ll test and cleanup. NFC
Commit: 91a48e06463b23679907e151bdfec3e6093e9f16
https://github.com/llvm/llvm-project/commit/91a48e06463b23679907e151bdfec3e6093e9f16
Author: David Green <david.green at arm.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-ext.ll
Log Message:
-----------
[AArch64][GlobalISel] Implicitly truncate APInt in matchExt combine.
The APInt using FirstRealElt + 1 is intended to match the next element, which
might overflow the size of MaskBits. This prevents a new assert in APInt from
triggering.
Commit: 5b19ed8bb4a36bd0b96f18151932aebd7a67f0e1
https://github.com/llvm/llvm-project/commit/5b19ed8bb4a36bd0b96f18151932aebd7a67f0e1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[llvm] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (#115626)
Note that PointerUnion::{is,get,dyn_cast} have been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Commit: a44ee8ec1c87be76e147d97f3be90a7e8630421b
https://github.com/llvm/llvm-project/commit/a44ee8ec1c87be76e147d97f3be90a7e8630421b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[TableGen] Use heterogenous lookups with std::map (NFC) (#115633)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: 2c0f463b2546a98e6215f3a85940ab9c0971d2aa
https://github.com/llvm/llvm-project/commit/2c0f463b2546a98e6215f3a85940ab9c0971d2aa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[Vectorize] Simplify code with DenseMap::operator[] (NFC) (#115635)
Commit: 1e25c921d523151e6ed2ffe86029ea2e2b267a6c
https://github.com/llvm/llvm-project/commit/1e25c921d523151e6ed2ffe86029ea2e2b267a6c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
Log Message:
-----------
[AArch64/GISel] Remove unused includes (NFC) (#115636)
Identified with misc-include-cleaner.
Commit: 15ce2e183fb801ff418eb1347a9d5893e5665782
https://github.com/llvm/llvm-project/commit/15ce2e183fb801ff418eb1347a9d5893e5665782
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M lldb/include/lldb/Interpreter/CommandObject.h
M lldb/source/Commands/CommandObjectMultiword.cpp
Log Message:
-----------
[lldb] Use heterogenous lookups with std::map (NFC) (#115590) (#115634)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: ff0698b258eba9afd888159358c7369c3f85e9ae
https://github.com/llvm/llvm-project/commit/ff0698b258eba9afd888159358c7369c3f85e9ae
Author: Will <william.fedele1 at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Fix examples for float to int saturating intrinsics (#115629)
As per the [LangRef:Simple
Constants](https://llvm.org/docs/LangRef.html#simple-constants), exact
decimal values of floating-point constants are required. For instance,
23.9 is a repeating decimal in binary and results in the reported error.
https://godbolt.org/z/1h7ETPnf6
Fixes #113529.
Commit: 028ea71fdda0c02cd11421cd1d26bec6f378666e
https://github.com/llvm/llvm-project/commit/028ea71fdda0c02cd11421cd1d26bec6f378666e
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/InitVariablesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/init-variables.cpp
Log Message:
-----------
[clang-tidy] fix insertion location for function pointers in cppcoreguidelines-init-variables (#112091)
Previously, the insertion location for the `= nullptr` fix would be
after the variable name. However, if the variable is of type function
pointer that is not an alias, then the insertion would happen inside the
type specification: `void (*a1)(void*);` -> `void (*a1 =
nullptr)(void*);`.
With this change, the insertion location will be at the next
'terminator'. That is, at the next `,` or `;`, as that will finish the
current declaration: `void (a1)(void*) = nullptr;`.
Fixes #112089
Commit: 7111d031f19ce7d523796b4812d6afcb2958b025
https://github.com/llvm/llvm-project/commit/7111d031f19ce7d523796b4812d6afcb2958b025
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
Log Message:
-----------
[Xtensa] Fix Clang -Wundefined-bool-conversion after #113450
Commit: 3006dddfe091bcb95924d72dddbb84f73186a344
https://github.com/llvm/llvm-project/commit/3006dddfe091bcb95924d72dddbb84f73186a344
Author: Janis Heims <janis.heims at undertheprinter.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Target/M68k/M68kFrameLowering.cpp
M llvm/test/CodeGen/M68k/multiple-return.ll
Log Message:
-----------
[M68k] fix call frame destruction elimination when returning structs (#107579)
Fixes #106213.
This adjusts `eliminateCallFramePseudoInstr` to match the behaviour of
the X86 backend.
Commit: dc11c0601577afb8f67513d041ee25dabe3555b9
https://github.com/llvm/llvm-project/commit/dc11c0601577afb8f67513d041ee25dabe3555b9
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithInitializers/LLJITWithInitializers.cpp
A llvm/include/llvm/ExecutionEngine/Orc/AbsoluteSymbols.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
A llvm/lib/ExecutionEngine/Orc/AbsoluteSymbols.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
M llvm/lib/ExecutionEngine/Orc/Speculation.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ExecutionSessionWrapperFunctionCallsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/LookupAndRecordAddrsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC] Move absoluteSymbols from Core.h to new AbsoluteSymbols.h header. NFC.
Continuing Core.h clean-up.
If you see any errors about a missing absoluteSymbols function you need to
include the new AbsoluteSymbols.h header.
Commit: 0e936e375e61ed2c85c5e9fc53c5a4ac01cf9ed1
https://github.com/llvm/llvm-project/commit/0e936e375e61ed2c85c5e9fc53c5a4ac01cf9ed1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port dc11c0601577
Commit: 3e30b365c1ec95f0cfb62c3cfdf4f6f1c824c0bd
https://github.com/llvm/llvm-project/commit/3e30b365c1ec95f0cfb62c3cfdf4f6f1c824c0bd
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
Log Message:
-----------
[Clang] SemaFunctionEffects: When verifying a function, ignore any conditional noexcept expression. (#115342)
---------
Co-authored-by: Doug Wyatt <dwyatt at apple.com>
Commit: e375c0f7d0c8f4c49ff2a430da0c3a7d058e9cf3
https://github.com/llvm/llvm-project/commit/e375c0f7d0c8f4c49ff2a430da0c3a7d058e9cf3
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/lib/Sema/SemaRISCV.cpp
Log Message:
-----------
[RISCV][Clang] Add RequiredFeatures to zvfh intrinsics (#115436)
This is a follow-up patch for
https://github.com/llvm/llvm-project/pull/101811.
That we can remove the type checking for fp16 from SemaRISCV.cpp.
Fixes: https://github.com/llvm/llvm-project/issues/101621 and
https://github.com/llvm/llvm-project/issues/94306
Commit: 595f3e925adaffcb10d40e2e704c67556e9afb18
https://github.com/llvm/llvm-project/commit/595f3e925adaffcb10d40e2e704c67556e9afb18
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Dominance.h
M mlir/lib/IR/Dominance.cpp
Log Message:
-----------
[mlir][IR][NFC] `PostDominanceInfo`: Mark all functions as `const` (#115597)
Same as `DominanceInfo`, all functions should be `const`.
Commit: 5082acce4fd3646d5760c02b2c21d9cd2a1d7130
https://github.com/llvm/llvm-project/commit/5082acce4fd3646d5760c02b2c21d9cd2a1d7130
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/lib/fuzzer/CMakeLists.txt
M compiler-rt/lib/fuzzer/tests/CMakeLists.txt
M compiler-rt/lib/msan/tests/CMakeLists.txt
M compiler-rt/lib/tsan/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Add custom libc++ workaround for CMake < 3.26
The INSTALL_BYPRODUCTS ExternalProject_Add() argument was only added in
CMake 3.26 and the current minimum is 3.20. Work around this by using an
explicit ExternalProject_Add_Step() call for the install step with a
BYPRODUCTS argument. We can't keep using the `install` name here since that
is reserved by the CMake implementation and results in errors when used.
This commit should be reverted once LLVM depends on CMake 3.26.
Pull Request: https://github.com/llvm/llvm-project/pull/115677
Commit: 5ca082cdfed2e0d3d9499d2c70d8a38dacd2539e
https://github.com/llvm/llvm-project/commit/5ca082cdfed2e0d3d9499d2c70d8a38dacd2539e
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Fix evl type on float VP reduction intrinsics (#115421)
Looks like a search-and-replace typo
Commit: b2e2d8b3f6bb7c647c1e4cfe6d2765e1b0a15497
https://github.com/llvm/llvm-project/commit/b2e2d8b3f6bb7c647c1e4cfe6d2765e1b0a15497
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
A llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
A llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
Log Message:
-----------
[RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (#115272)
This PR enables scalable loop vectorization for f16 with zvfhmin and
bf16 with zvfbfmin.
Enabling this was dependent on filling out the gaps for scalable
zvfhmin/zvfbfmin codegen, but everything that the loop vectorizer might
emit should now be handled.
It does this by marking f16 and bf16 as legal in
`isLegalElementTypeForRVV`. There are a few users of
`isLegalElementTypeForRVV` that have already been enabled in other PRs:
- `isLegalStridedLoadStore` #115264
- `isLegalInterleavedAccessType` #115257
- `isLegalMaskedLoadStore` #115145
- `isLegalMaskedGatherScatter` #114945
The remaining user is `isLegalToVectorizeReduction`. We can't promote
f16/bf16 reductions to f32 so we need to disable them for scalable
vectors. The cost model actually marks these as invalid, but for
out-of-tree reductions `ComputeReductionResult` doesn't get costed and
it will end up emitting a reduction intrinsic regardless, so we still
need to mark them as illegal. We might be able to remove this
restriction later for fmax and fmin reductions.
Commit: a912c81f651109c677dcfdf2b1173a78e853a19d
https://github.com/llvm/llvm-project/commit/a912c81f651109c677dcfdf2b1173a78e853a19d
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVLocation.cpp
A llvm/test/tools/llvm-debuginfo-analyzer/DWARF/Inputs/ThreadLocalStorage.ll
A llvm/test/tools/llvm-debuginfo-analyzer/DWARF/crash-thread-local-storage.test
Log Message:
-----------
[llvm-debuginfo-analyzer] Fix crash with thread local storage. (#113904)
The DW_OP_GNU_push_tls_address, DW_OP_form_tls_address DWARF
location forms generated for thread local storage variables, caused a
crash in the DWARFReader, due to incorrect number of operands.
Commit: ffc7feadece139c88f0e6930f16bfa9293747adc
https://github.com/llvm/llvm-project/commit/ffc7feadece139c88f0e6930f16bfa9293747adc
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/test/Dialect/Mesh/canonicalization.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/spmdization.mlir
M mlir/test/Dialect/Tensor/mesh-spmdization.mlir
Log Message:
-----------
[mlir][mesh] Handling changed halo region sizes during spmdization (#114238)
* Changed `MeshSharding::sharded_dims_sizes` from representing sizes per
shard to offsets to origin per shard.
- Local shard size are now a simple subtraction
- Offsets are now readily available without a reduction operation
- Enables constant value/shape propagation through standard
canonicalization
- Renamed to `sharded_dims_offsets` accordingly.
* First spmdization pattern for halo regions.
- Triggers when source and destination shardings differ only in their
halo sizes
- Copies local data from source into a new tensor and calls update_halo
- Supports arbitrary mesh dimensions (unlike the other patterns which
work on 1d meshes only)
* `UpdateHaloOp` implements `DestinationStyleOpInterface` and accepts
tensors and memrefs
- also accepts target and source halo sizes; both are required for
proper lowering
* minor refactoring for testing partial MeshSharding equality
* Canonicalization for ShardingOp folding constant values into
respective `static_*` attributes
Commit: 2eaf50716abae064804b9f9d27e157a98c83be2b
https://github.com/llvm/llvm-project/commit/2eaf50716abae064804b9f9d27e157a98c83be2b
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/jr-without-ra.ll
Log Message:
-----------
[LoongArch] Precommit test for avoid indirect branch jumps through ra. NFC
Reviewed By: SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/115423
Commit: 21ef17c626456496a18e2a078a11d8eccf26ee31
https://github.com/llvm/llvm-project/commit/21ef17c626456496a18e2a078a11d8eccf26ee31
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.td
M llvm/test/CodeGen/LoongArch/jr-without-ra.ll
Log Message:
-----------
[LoongArch] Avoid indirect branch jumps using the ra register
Micro-architecture unconditionally treats a "jr $ra" as "return from
subroutine", hence doing "jr $ra" would interfere with both subroutine
return prediction and the more general indirect branch prediction.
GCC thread: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110136
Reviewed By: SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/115424
Commit: d8ebb08a89734478bc66341cb95559b00a05b0b5
https://github.com/llvm/llvm-project/commit/d8ebb08a89734478bc66341cb95559b00a05b0b5
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/test/Shell/Commands/command-disassemble-process.yaml
M lldb/test/Shell/Commands/command-disassemble.s
Log Message:
-----------
[lldb] Have disassembler show load addresses when using a core file (#115453)
We got a bug report that the disassember output was not relocated (i.e.
a load address) for a core file (like it is for a live process). It
turns out this behavior it depends on whether the instructions were read
from an executable file or from process memory (a core file will not
typically contain the memory image for segments backed by an executable
file).
It's unclear whether this behavior is intentional, or if it was just
trying to handle the case where we're dissassembling a module without a
process, but I think it's undesirable. What makes it particularly
confusing is that the instruction addresses are relocated in this case
(unlike the when we don't have a process), so with large files and
adresses it gets very hard to see whether the relocation has been
applied or not.
This patch removes the data_from_file check so that the instruction is
relocated regardless of where it was read from. It will still not get
relocated for the raw module use case, as those can't be relocated
anywhere as they don't have a load address.
Commit: eddb79d56dd50bc6832c7d906ab4a0df2ae1d846
https://github.com/llvm/llvm-project/commit/eddb79d56dd50bc6832c7d906ab4a0df2ae1d846
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amxtf32intrin.h
A clang/lib/Headers/amxtf32transposeintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/amx_tf32.c
A clang/test/CodeGen/X86/amx_tf32_api.c
A clang/test/CodeGen/X86/amx_tf32_errors.c
A clang/test/CodeGen/X86/amx_tf32_inline_asm.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
A llvm/test/CodeGen/X86/amx-tf32-internal.ll
A llvm/test/CodeGen/X86/amx-tf32-intrinsics.ll
A llvm/test/MC/Disassembler/X86/AMX/x86-64-amx-tf32.txt
A llvm/test/MC/X86/AMX/x86-64-amx-tf32-att.s
A llvm/test/MC/X86/AMX/x86-64-amx-tf32-intel.s
Log Message:
-----------
[X86][AMX] Support AMX-TF32 (#115625)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: b7db403e701029c801fd990dceeb219de9fb800c
https://github.com/llvm/llvm-project/commit/b7db403e701029c801fd990dceeb219de9fb800c
Author: Han Qi <my at rhanqtl.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/test/CodeGen/aarch64-pure-scalable-args.c
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
M llvm/test/Transforms/CorrelatedValuePropagation/cond-using-block-value.ll
M llvm/test/Transforms/CorrelatedValuePropagation/deopt.ll
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
M llvm/test/Transforms/CorrelatedValuePropagation/minmaxabs.ll
M llvm/test/Transforms/CorrelatedValuePropagation/overflow_predicate.ll
M llvm/test/Transforms/CorrelatedValuePropagation/range.ll
M llvm/test/Transforms/CorrelatedValuePropagation/sdiv.ll
M llvm/test/Transforms/CorrelatedValuePropagation/srem.ll
M llvm/test/Transforms/CorrelatedValuePropagation/udiv-expansion.ll
M llvm/test/Transforms/CorrelatedValuePropagation/urem-expansion.ll
M llvm/test/Transforms/CorrelatedValuePropagation/uscmp.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
Log Message:
-----------
[CVP] Add `samesign` flag to `icmp` (#115642)
Closes #114820.
Commit: 01a5596b5295d1585716d2deade407adaa40fe20
https://github.com/llvm/llvm-project/commit/01a5596b5295d1585716d2deade407adaa40fe20
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-10 (Sun, 10 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86PfmCounters.td
M llvm/lib/Target/X86/X86SchedAlderlakeP.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
Log Message:
-----------
[llvm-exegesis][X86] Groups ports 2,3, and 11 for Golden Cove (#115645)
This patch updates the PFM counter mappings for Sapphire Rapids and
Alder Lake (p-cores) to group ports 2,3, and 11 despite the naming of
the performance counters. This is how the scheduling models assume
things work within LLVM, and seems to be a mistake within the Intel
perfmon documentation.
Fixes #113941.
Commit: 40f52e849b63a18510e915236bce390ead9b4575
https://github.com/llvm/llvm-project/commit/40f52e849b63a18510e915236bce390ead9b4575
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port eddb79d56dd5
Commit: d893c5ad3560af5cd44d79f764ef879aefc671d7
https://github.com/llvm/llvm-project/commit/d893c5ad3560af5cd44d79f764ef879aefc671d7
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/docs/AMDGPUSupport.rst
M clang/docs/HIPSupport.rst
M clang/include/clang/Basic/MacroBuilder.h
M clang/lib/Basic/Targets/AMDGPU.cpp
A clang/test/Driver/hip-wavefront-size-deprecation-diagnostics.hip
Log Message:
-----------
[Clang][HIP] Reapply: Deprecate the AMDGCN_WAVEFRONT_SIZE macros (#115507)
So far, these macros can be used in contexts where no meaningful
wavefront size is available. We therefore deprecate these macros, to
replace them with a more resilient interface to access wavefront size
information where it is available.
Reapplies #112849 with a fix for the non-hermetic clang test that failed
on Mac after the revert in #115499.
For SWDEV-491529.
Commit: b9fb6b6cb52fd99f3136d8680a5cad5a10a7977c
https://github.com/llvm/llvm-project/commit/b9fb6b6cb52fd99f3136d8680a5cad5a10a7977c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[llvm] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (#115681)
Note that PointerUnion::{is,get,dyn_cast} have been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Commit: ebcdc700d68582a44dd059c40f382583126f29a6
https://github.com/llvm/llvm-project/commit/ebcdc700d68582a44dd059c40f382583126f29a6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
Log Message:
-----------
[lldb] Use heterogenous lookups with std::map (NFC) (#115684)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string. Note that CommandMap just
started accepting heterogeneous lookups (#115634).
Commit: d1aa0da7e28f70715bd92b2bc2809ac04a832aa8
https://github.com/llvm/llvm-project/commit/d1aa0da7e28f70715bd92b2bc2809ac04a832aa8
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port for ffc7feadece139c88f0e6930f16bfa9293747adc
Commit: 2a448da6e63e2cd3dac63d5398bf121e994d7fc2
https://github.com/llvm/llvm-project/commit/2a448da6e63e2cd3dac63d5398bf121e994d7fc2
Author: Ingo Müller <ingomueller at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/MainModule.cpp
M mlir/python/mlir/_mlir_libs/_mlir/__init__.pyi
Log Message:
-----------
[mlir][python] Make types in register_(dialect|operation) more narrow. (#115307)
This PR makes the `pyClass`/`dialectClass` arguments of the pybind11
functions `register_dialect` and `register_operation` as well as their
return types more narrow, concretely, a `py::type` instead of a
`py::object`. As the name of the arguments indicate, they have to be
called with a type instance (a "class"). The PR also updates the typing
stubs of these functions (in the corresponding `.pyi` file), such that
static type checkers are aware of the changed type. With the previous
typing information, `pyright` raised errors on code generated by
tablegen.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 1277bea4311692d3bd3d1a6566ec1011d3e72f65
https://github.com/llvm/llvm-project/commit/1277bea4311692d3bd3d1a6566ec1011d3e72f65
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
Log Message:
-----------
[lldb] Disable TestCancelAttach for Windows host (#115619)
See #115618 for details.
Commit: 75c2888209473884cb3fa5720899d8199dafb8cb
https://github.com/llvm/llvm-project/commit/75c2888209473884cb3fa5720899d8199dafb8cb
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/test/CodeGen/LoongArch/e_flags.ll
Log Message:
-----------
[MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922)
The default value of this CPU affects the `FeatureBits` obtained by
`LoongArchTargetELFStreamer` when creating an ELF file, and it will
further affect the `Flags` field in the generated file.
So, the default CPU value should be consistent with the
`initializeSubtargetDependencies` in `LoongArchSubtarget.cpp`.
Otherwise, the `Flags` field may be unexpected.
Commit: aa15421b9ff67f362283657f74b2fa7314c25308
https://github.com/llvm/llvm-project/commit/aa15421b9ff67f362283657f74b2fa7314c25308
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86PfmCounters.td
Log Message:
-----------
[llvm-exegesis][X86] Update uop counter mappings for IceLake+
This patch updates the uop counter mappings for IceLake, AlderLake, and
SapphireRapids. The names of the counters were changed slightly between
these revisions for whatever reason. Validated by reading the libpfm4
source code and testing the exegesis binary with these changes on a
SapphireRapids system.
Commit: 34f8fbd269fc0d2d7d527d3661faea3eeb4587ac
https://github.com/llvm/llvm-project/commit/34f8fbd269fc0d2d7d527d3661faea3eeb4587ac
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/Sema/aarch64-incompat-sm-builtin-calls.c
Log Message:
-----------
[Clang][AArch64] svadda is not available in streaming mode
And Clang should give a diagnostic when it is used in a streaming
context.
Commit: 44a6b3a4b69185d3cf0076ae3cad765a10205bc0
https://github.com/llvm/llvm-project/commit/44a6b3a4b69185d3cf0076ae3cad765a10205bc0
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/test/OpenMP/depobj_codegen.cpp
Log Message:
-----------
Fix for codegen Crash in Clang when using locator omp_all_memory with depobj construct (#114221)
A codegen crash is occurring when a depend object was initialized with
omp_all_memory in the depobj directive.
https://github.com/llvm/llvm-project/issues/114214(url)
The root cause of issue looks to be the improper handling of the
dependency list when omp_all_memory was specified.
The change introduces the use of OMPTaskDataTy to manage dependencies.
The buildDependences function is called to construct the dependency
list, and the list is iterated over to emit and store the dependencies.
Reduced Test Case :
```
#include <omp.h>
int main()
{ omp_depend_t obj; #pragma omp depobj(obj) depend(inout: omp_all_memory) }
```
```
#1 0x0000000003de6623 SignalHandler(int) Signals.cpp:0:0
#2 0x00007f8e4a6b990f (/lib64/libpthread.so.0+0x1690f)
#3 0x00007f8e4a117d2a raise (/lib64/libc.so.6+0x4ad2a)
#4 0x00007f8e4a1193e4 abort (/lib64/libc.so.6+0x4c3e4)
#5 0x00007f8e4a10fc69 __assert_fail_base (/lib64/libc.so.6+0x42c69)
#6 0x00007f8e4a10fcf1 __assert_fail (/lib64/libc.so.6+0x42cf1)
#7 0x0000000004114367 clang::CodeGen::CodeGenFunction::EmitOMPDepobjDirective(clang::OMPDepobjDirective const&) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x4114367)
#8 0x00000000040f8fac clang::CodeGen::CodeGenFunction::EmitStmt(clang::Stmt const*, llvm::ArrayRef<clang::Attr const*>) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x40f8fac)
#9 0x00000000040ff4fb clang::CodeGen::CodeGenFunction::EmitCompoundStmtWithoutScope(clang::CompoundStmt const&, bool, clang::CodeGen::AggValueSlot) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x40ff4fb)
#10 0x00000000041847b2 clang::CodeGen::CodeGenFunction::EmitFunctionBody(clang::Stmt const*) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x41847b2)
#11 0x0000000004199e4a clang::CodeGen::CodeGenFunction::GenerateCode(clang::GlobalDecl, llvm::Function*, clang::CodeGen::CGFunctionInfo const&) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x4199e4a)
#12 0x00000000041f7b9d clang::CodeGen::CodeGenModule::EmitGlobalFunctionDefinition(clang::GlobalDecl, llvm::GlobalValue*) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x41f7b9d)
#13 0x00000000041f16a3 clang::CodeGen::CodeGenModule::EmitGlobalDefinition(clang::GlobalDecl, llvm::GlobalValue*) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x41f16a3)
#14 0x00000000041fd954 clang::CodeGen::CodeGenModule::EmitDeferred() (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x41fd954)
#15 0x0000000004200277 clang::CodeGen::CodeGenModule::Release() (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x4200277)
#16 0x00000000046b6a49 (anonymous namespace)::CodeGeneratorImpl::HandleTranslationUnit(clang::ASTContext&) ModuleBuilder.cpp:0:0
#17 0x00000000046b4cb6 clang::BackendConsumer::HandleTranslationUnit(clang::ASTContext&) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x46b4cb6)
#18 0x0000000006204d5c clang::ParseAST(clang::Sema&, bool, bool) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x6204d5c)
#19 0x000000000496b278 clang::FrontendAction::Execute() (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x496b278)
#20 0x00000000048dd074 clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x48dd074)
#21 0x0000000004a38092 clang::ExecuteCompilerInvocation(clang::CompilerInstance*) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0x4a38092)
#22 0x0000000000fd4e9c cc1_main(llvm::ArrayRef<char const*>, char const*, void*) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0xfd4e9c)
#23 0x0000000000fcca73 ExecuteCC1Tool(llvm::SmallVectorImpl<char const*>&, llvm::ToolContext const&) driver.cpp:0:0
#24 0x0000000000fd140c clang_main(int, char**, llvm::ToolContext const&) (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0xfd140c)
#25 0x0000000000ee2ef3 main (/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/bin/clang-18+0xee2ef3)
#26 0x00007f8e4a10224c __libc_start_main (/lib64/libc.so.6+0x3524c)
#27 0x0000000000fcaae9 _start /home/abuild/rpmbuild/BUILD/glibc-2.31/csu/../sysdeps/x86_64/start.S:120:0
clang: error: unable to execute command: Aborted
```
---------
Co-authored-by: Chandra Ghale <ghale at pe31.hpc.amslabs.hpecorp.net>
Commit: 911cee2fd086524517588a7bc8cffb88091612b4
https://github.com/llvm/llvm-project/commit/911cee2fd086524517588a7bc8cffb88091612b4
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/Headers/openmp_wrappers/complex_cmath.h
Log Message:
-----------
Fix for OpenMP offloading compilation error with GNU++20 option when using complex header (#115306)
The change done is to fix this issue.
[[Issue](https://github.com/llvm/llvm-project/issues/113207)] discussion
available in link provided.
When using the -std=c++20 flag with -fopenmp for OpenMP offloading
results in the following compilation error.
Reduced test Case :
```
> cat foo.cpp
#include <complex>
void foo(){
}
> CC -fopenmp -std=gnu++20 -fopenmp-targets=amdgcn-amd-amdhsa -Xopenmp-target=amdgcn-amd-amdhsa -march=gfx90a foo.cpp -c
In file included from foo.cpp:1:
In file included from /opt/cray/pe/cce/18.0.1/cce-clang/x86_64/lib/clang/18/include/openmp_wrappers/complex:51:
/opt/cray/pe/cce/18.0.1/cce-clang/x86_64/lib/clang/18/include/openmp_wrappers/complex_cmath.h:68:40: error: non-constexpr declaration of 'conj' follows constexpr declaration
68 | template <class _Tp> std::complex<_Tp> conj(const std::complex<_Tp> &__c) {
| ^
/usr/lib64/gcc/x86_64-suse-linux/13/../../../../include/c++/13/complex:970:5: note: previous declaration is here
970 | conj(const complex<_Tp>& __z)
| ^
1 error generated.
```
Co-authored-by: Chandra Ghale <ghale at pe31.hpc.amslabs.hpecorp.net>
Commit: 69b39e7cc7ace46ebffd8077820b29fe0768b5d9
https://github.com/llvm/llvm-project/commit/69b39e7cc7ace46ebffd8077820b29fe0768b5d9
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/sve-hadd.ll
Log Message:
-----------
[SelectionDAG] Add support for extending masked loads in computeKnownBits (#115450)
We already support computing known bits for extending loads, but not for
masked loads. For now I've only added support for zero-extends because
that's the only thing currently tested. Even when the passthru value is
poison we still know the top X bits are zero.
Commit: a4e507df7a07f234350669395d3521ed343a06ea
https://github.com/llvm/llvm-project/commit/a4e507df7a07f234350669395d3521ed343a06ea
Author: David Green <david.green at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
Log Message:
-----------
[AArch64][GlobalISel] Do not create LIFETIME instructions in functions. (#115669)
For the same reason that we do not translate lifetime markers in a -O0,
we should not translate them for optnone functions too.
Commit: a5d09f4ad94fab718e787fb6dce7933e7742eb1b
https://github.com/llvm/llvm-project/commit/a5d09f4ad94fab718e787fb6dce7933e7742eb1b
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/MachineVerifier/test_step-vector.mir
Log Message:
-----------
[GlobalISel] Add G_STEP_VECTOR instruction (#115598)
aka llvm.stepvector Intrinsic
Commit: 04b295e8938778251821f8a39903fdad0501112c
https://github.com/llvm/llvm-project/commit/04b295e8938778251821f8a39903fdad0501112c
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
Log Message:
-----------
[lldb][ObjC] Fix method list entry offset calculation (#115571)
The `relative_list_list_entry_t` offset field in the Objective-C runtime
is of type `int64_t`. There are cases where these offsets are negative
values. For negative offsets, LLDB would currently incorrectly
zero-extend the offset (dropping the fact that the offset was negative),
instead producing large offsets that, when added to the
`m_baseMethods_ptr` result in addresses that had their upper bits set
(e.g., `0x00017ff81b3241b0`). We then would try to `GetMethodList` from
such an address but fail to read it (because it's an invalid address).
This would manifest in Objective-C decls not getting completed correctly
(and formatters not working). We noticed this in CI failures on our
Intel bots. This happened to work fine on arm64 because we strip the
upper bits when calling `ClassDescriptorV2::method_list_t::Read` using
the `FixCodeAddress` ABI plugin API (which doesn't do that on Intel).
The fix is to sign-extend the offset calculation.
Example failure before this patch:
```
======================================================================
FAIL: test_break_dwarf (TestRuntimeTypes.RuntimeTypesTestCase)
Test setting objc breakpoints using '_regexp-break' and 'breakpoint set'.
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/michaelbuch/Git/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1769, in test_method
return attrvalue(self)
File "/Users/michaelbuch/Git/llvm-project/lldb/test/API/lang/objc/foundation/TestRuntimeTypes.py", line 48, in test_break
self.expect(
File "/Users/michaelbuch/Git/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 2370, in expect
self.runCmd(
File "/Users/michaelbuch/Git/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1000, in runCmd
self.assertTrue(self.res.Succeeded(), msg + output)
AssertionError: False is not true : Got a valid type
Error output:
error: <user expression 1>:1:11: no known method '+stringWithCString:encoding:'; cast the message send to the method's return type
1 | [NSString stringWithCString:"foo" encoding:1]
| ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Config=x86_64-/Users/michaelbuch/Git/lldb-build-main-no-modules/bin/clang
---------------------------------------------------------------------- ```
Commit: 00a1f1ab71302d190f8059d86a53ec62485fbce9
https://github.com/llvm/llvm-project/commit/00a1f1ab71302d190f8059d86a53ec62485fbce9
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/test/Dialect/MemRef/ops.mlir
M mlir/test/IR/core-ops.mlir
R mlir/test/IR/memory-ops.mlir
Log Message:
-----------
[MLIR] NFC. Move leftover memref op test cases out of test/IR (#115583)
Move memref dialect ops' test cases of test/IR/. It was also surprising
to not find test cases of ops like memref.view in test/Dialect/MemRef/.
NFC.
Commit: b91b6235dee3be69b429cace319ff39f1eadfe14
https://github.com/llvm/llvm-project/commit/b91b6235dee3be69b429cace319ff39f1eadfe14
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Mesh/IR/CMakeLists.txt
Log Message:
-----------
adding missing lib MLIRDestinationStyleOpInterface (#115703)
fixing CI failures caused by #114238 by adding
MLIRDestinationStyleOpInterface lib
@jplehr @mfrancio @rengolin
Commit: 8f9dbb0a780feed60416ebc6ef8e89f4b0c2dca7
https://github.com/llvm/llvm-project/commit/8f9dbb0a780feed60416ebc6ef8e89f4b0c2dca7
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/statement-function.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/OpenMP/task2.f90
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[flang][OpenMP] delayed privatisation lowering for TASK (#113591)
Commit: 6dc23b70097e4135ecde33f49550b1f473a5c385
https://github.com/llvm/llvm-project/commit/6dc23b70097e4135ecde33f49550b1f473a5c385
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
Log Message:
-----------
[SCEVExpander] Don't try to reuse SCEVUnknown values (#115141)
The expansion of a SCEVUnknown is trivial (it's just the wrapped value).
If we try to reuse an existing value it might be a more complex
expression that simplifies to the SCEVUnknown.
This is inspired by https://github.com/llvm/llvm-project/issues/114879,
because SCEVExpander replacing a constant with a phi node is just silly.
(I don't consider this a fix for that issue though.)
Commit: 6ad1dd3bdcc8f9bfdf9f6074c8dffe0675a2e4cf
https://github.com/llvm/llvm-project/commit/6ad1dd3bdcc8f9bfdf9f6074c8dffe0675a2e4cf
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/load-cmp.ll
A llvm/test/Transforms/InstCombine/sext-and.ll
Log Message:
-----------
[InstCombine] Fold (sext(a) & c1) == c2 to (a & c3) == trunc(c2) (#112646)
Fixes https://github.com/llvm/llvm-project/issues/85830.
Updated Alive proof: https://alive2.llvm.org/ce/z/KnvoP5
Commit: 7c3bbfdcf62e0a8806e3ae3130e8dc537fe5c775
https://github.com/llvm/llvm-project/commit/7c3bbfdcf62e0a8806e3ae3130e8dc537fe5c775
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr40730.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
Log Message:
-----------
[X86] lowerShuffleAsLanePermuteAndPermute - simplify lane crossing mask based on demanded elts
Don't demand every element of each demanded sublane - set the undemanded mask elements to UNDEF to allow simplification (usually to a VBROADCAST).
Fixes #66150
Commit: a7b249e4708d61e491390773d3bb1ee88db91a57
https://github.com/llvm/llvm-project/commit/a7b249e4708d61e491390773d3bb1ee88db91a57
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/STLFunctionalExtras.h
Log Message:
-----------
Reland "Add clang::lifetimebound annotation to llvm::function_ref"
This relands 9f79615, which was reverted in e109c49. The compiler-rt breakage is fixed.
Commit: c315c01a7ea92b562f8b63159e113abaf0b50e5a
https://github.com/llvm/llvm-project/commit/c315c01a7ea92b562f8b63159e113abaf0b50e5a
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Transforms/Passes.h
M mlir/test/Transforms/cse.mlir
Log Message:
-----------
[mlir][Transforms][NFC] CSE: Split tests and fix typo (#115680)
Add `-split-input-file` to CSE tests and fix a typo in `Passes.h`. (The
typo is harmless as long as the pass has no options.)
Commit: 1ca64c5fb74270661ca2f9ebd821f47dcb3152b4
https://github.com/llvm/llvm-project/commit/1ca64c5fb74270661ca2f9ebd821f47dcb3152b4
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/Transforms/CodeGenPrepare/X86/2008-11-24-RAUW-Self.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/consthoist-unreachable.ll
M llvm/test/Transforms/ConstantHoisting/ARM/same-offset-multi-types.ll
M llvm/test/Transforms/ConstantHoisting/PowerPC/masks.ll
M llvm/test/Transforms/ConstantHoisting/X86/pr43903-not-all-uses-rebased.ll
M llvm/test/Transforms/Coroutines/coro-async-remat.ll
M llvm/test/Transforms/CorrelatedValuePropagation/2010-09-26-MergeConstantRange.ll
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
M llvm/test/Transforms/CorrelatedValuePropagation/crash.ll
M llvm/test/Transforms/CorrelatedValuePropagation/pr35807.ll
M llvm/test/Transforms/DeadStoreElimination/overlap.ll
M llvm/test/Transforms/DeadStoreElimination/simple.ll
M llvm/test/Transforms/EarlyCSE/X86/preserve_memoryssa.ll
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionSpecialization/bug55000-read-uninitialized-value.ll
M llvm/test/Transforms/IRCE/pr57335.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#115691)
This PR aims to remove undefined behavior from tests under the directory
`llvm/transforms/CodegenPrepare, ConstantHoisting, Coroutines` etc.
Commit: 5e7662efec36b0117cfdf85c0182e026e0019c4e
https://github.com/llvm/llvm-project/commit/5e7662efec36b0117cfdf85c0182e026e0019c4e
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/05-dwarf-incorrect-lexical-scope-variable.test
Log Message:
-----------
[llvm-debuginfo-analyzer] Incorrect DW_AT_call_line/DW_AT_call_file. (#115701)
The code dealing with DW_AT_call_line/DW_AT_call_file is in the wrong
place. The correct functions were call, but with incorrect values:
DW_AT_call_line <-- Filename Index
DW_AT_call_file <-- Line number
Commit: 89aaf2cf68d00e86dfd102a449fc68ff7ea5c85c
https://github.com/llvm/llvm-project/commit/89aaf2cf68d00e86dfd102a449fc68ff7ea5c85c
Author: lfrenot <leon.frenot at ens-lyon.fr>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
A mlir/test/Target/LLVMIR/Import/nneg.ll
A mlir/test/Target/LLVMIR/nneg.mlir
Log Message:
-----------
[mlir][LLVM] Add nneg flag (#115498)
This implementation is based on the existing one for the exact flag.
If the nneg flag is set and the argument is negative, the result is a
poison value.
Commit: bc368e4b578730bf0b10acd5412e476ccf7a5807
https://github.com/llvm/llvm-project/commit/bc368e4b578730bf0b10acd5412e476ccf7a5807
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
Log Message:
-----------
[lldb][test] TestConstStaticIntegralMember.py: skip dsym variant for older compiler versions
The existing XFAIL was being ignored because of the `expectedFailureDarwin`
causing failures on the matrix macOS bot:
```
======================================================================
FAIL: test_inline_static_members_dwarf5_dsym (TestConstStaticIntegralMember.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1769, in test_method
return attrvalue(self)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 151, in test_inline_static_members_dwarf5
self.check_inline_static_members("-gdwarf-5")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 129, in check_inline_static_members
self.check_global_var("A::int_val", "const int", "1")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 118, in check_global_var
self.assertGreaterEqual(len(var_list), 1)
AssertionError: 0 not greater than or equal to 1
Config=x86_64-/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/clang_1501_build/bin/clang
======================================================================
FAIL: test_shadowed_static_inline_members_dwarf5_dsym (TestConstStaticIntegralMember.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1769, in test_method
return attrvalue(self)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 205, in test_shadowed_static_inline_members_dwarf5
self.check_shadowed_static_inline_members("-gdwarf-5")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 192, in check_shadowed_static_inline_members
self.check_global_var("ns::Foo::mem", "const int", "10")
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py", line 118, in check_global_var
self.assertGreaterEqual(len(var_list), 1)
AssertionError: 0 not greater than or equal to 1
Config=x86_64-/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/clang_1501_build/bin/clang
----------------------------------------------------------------------
```
Commit: 60641b0aae4ebf966285ac95e381c5709a83d1ac
https://github.com/llvm/llvm-project/commit/60641b0aae4ebf966285ac95e381c5709a83d1ac
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/aarch64-dup-extract-scalable.ll
Log Message:
-----------
[LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (#115189)
Adds missing bfloat patterns for unpacked scalable vectors.
Adds patterns for splatting extracts from fixed length vectors.
Commit: 5ea852ebafea9f29d34ed380066ee4f2fcf366ec
https://github.com/llvm/llvm-project/commit/5ea852ebafea9f29d34ed380066ee4f2fcf366ec
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] Add test coverage for #114001
Commit: 8941f898f1921857720034b9a0950e4ec32d5d87
https://github.com/llvm/llvm-project/commit/8941f898f1921857720034b9a0950e4ec32d5d87
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/test/API/lit.cfg.py
Log Message:
-----------
[lldb] Transfer some environment variables into the tests on Windows build host (#115613)
Some API tests (compiler calls) create a lot of garbage and cause
unexpected behavior in case of Windows host and Linux target, e.g.
```
lldb/test/API/commands/process/attach/%SystemDrive%/
lldb/test/API/functionalities/deleted-executable/%SystemDrive%/
lldb/test/API/functionalities/exec/%SystemDrive%/
lldb/test/API/functionalities/load_unload/%SystemDrive%/
lldb/test/API/functionalities/target-new-solib-notifications/%SystemDrive%/
lldb/test/API/functionalities/thread/create_after_attach/%SystemDrive%/
```
It can be fixed by transfer some standard Windows environment variables
into API tests.
Commit: f87737f3fdb6b2a7fa0d7b9c245eab0c39e6fb50
https://github.com/llvm/llvm-project/commit/f87737f3fdb6b2a7fa0d7b9c245eab0c39e6fb50
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/depobj-construct.f90
A flang/test/Parser/OpenMP/doacross-clause.f90
A flang/test/Parser/OpenMP/ordered-depend.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/depend06.f90
M flang/test/Semantics/OpenMP/depobj-construct-v50.f90
M flang/test/Semantics/OpenMP/depobj-construct-v51.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
M flang/test/Semantics/OpenMP/ordered01.f90
M flang/test/Semantics/OpenMP/ordered03.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Parse DOACROSS clause (#115396)
Extract the SINK/SOURCE parse tree elements into a separate class
`OmpDoacross`, share them between DEPEND and DOACROSS clauses. Most of
the changes in Semantics are to accommodate the new contents of
OmpDependClause, and a mere introduction of OmpDoacrossClause.
There are no semantic checks specifically for DOACROSS.
Commit: 30feb35c1ebc6f09d85df814f8aac57e8eb6fcc2
https://github.com/llvm/llvm-project/commit/30feb35c1ebc6f09d85df814f8aac57e8eb6fcc2
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__cxx03/CMakeLists.txt
M libcxx/utils/libcxx/header_information.py
Log Message:
-----------
[libc++] Update CMake dependency for generate_iwyu_mapping.py (#115387)
This script does not depend on the generated headers since those are
already special-cased in header_information.py. Change the dependency
list to depend on header_information.py instead. While looking at this
code also simplify the assignment to libcxx_root inside this script.
Commit: 3af4c2e16ec1cf8a099d69d69f40f3aa8bb43cc7
https://github.com/llvm/llvm-project/commit/3af4c2e16ec1cf8a099d69d69f40f3aa8bb43cc7
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/GenerateInput.h
Log Message:
-----------
[libc++][test] Clean up code in GenerateInput.h for benchmark testing (#115560)
This PR refines the code in `GenerateInput.h` used for benchmark testing
by implementing the following changes:
- Replaced all unqualified usages of `size_t` with `std::size_t`.
- Removed unnecessary curly braces `{}` from for loops that contain
simple single-statement bodies, in accordance with LLVM coding
standards.
Commit: 9f471fd12b9e2d6264f27974feaf893445e92393
https://github.com/llvm/llvm-project/commit/9f471fd12b9e2d6264f27974feaf893445e92393
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/__iterator/bounded_iter.h
M libcxx/include/__iterator/static_bounded_iter.h
M libcxx/include/__iterator/wrap_iter.h
A libcxx/test/libcxx/iterators/contiguous_iterators.conv.compile.pass.cpp
Log Message:
-----------
[libc++][hardening] Constrain construction for `__{(static_)bounded,wrap}_iter` (#115271)
This PR restricts construction to cases where reference types of
source/destination iterators are (`T&`, `T&`) or (`T&`, `const T&`) (
where `T` can be const).
Fixes #50058.
Commit: 4988376f76be755929fc017a27158e8b91fafb9c
https://github.com/llvm/llvm-project/commit/4988376f76be755929fc017a27158e8b91fafb9c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] Add test coverage for #113396
Commit: 4c4db3c943d686ff7c1fcf2dbc975e8462497efe
https://github.com/llvm/llvm-project/commit/4c4db3c943d686ff7c1fcf2dbc975e8462497efe
Author: ziereis <44057120+ziereis at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
Log Message:
-----------
add pattern for arith::UIToFPOp to VectorNarrowTypeRewritePatterns (#115485)
This pr just adds the patterns from
https://github.com/llvm/llvm-project/pull/89131 for the arith::UIToFPOp.
Also does some slight renaming and moving of the tests for better
readability.
Commit: 173529104d598785c2f8c36c047a6d0f1d0f060e
https://github.com/llvm/llvm-project/commit/173529104d598785c2f8c36c047a6d0f1d0f060e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[TableGen] Use heterogenous lookups with std::map (NFC) (#115682)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: a41922ad7530ef5e311afbff2721e69cbf520890
https://github.com/llvm/llvm-project/commit/a41922ad7530ef5e311afbff2721e69cbf520890
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
M llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp
M llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
M llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
M llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AArch64/SMEPeepholeOpt.cpp
M llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
Log Message:
-----------
[AArch64] Remove unused includes (NFC) (#115685)
Identified with misc-include-cleaner.
Commit: 3fcb9684cf6ba4ff9009ebabd9ff966eeb8b15f7
https://github.com/llvm/llvm-project/commit/3fcb9684cf6ba4ff9009ebabd9ff966eeb8b15f7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/cmp-alloca-offsets.ll
Log Message:
-----------
[InstSimplify] Add tests for comparison with zero-sized allocs (NFC)
Commit: 4981f8cb72ea7d04da601c868763b38bdc11e74e
https://github.com/llvm/llvm-project/commit/4981f8cb72ea7d04da601c868763b38bdc11e74e
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/v16i8_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v2i64_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v8i16_scalar_to_vector_shuffle.ll
Log Message:
-----------
[PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (#80784)
This patch fixes the combines for vector_shuffles when either or both of
its left and right hand side inputs are scalar_to_vector nodes.
Previously, when both left and right side inputs are scalar_to_vector
nodes, the current combine could not handle this situation, as the shuffle
mask was updated incorrectly. To temporarily solve this solution, this combine
was simply disabled and not performed.
Now, not only does this patch aim to resolve the previous issue of the
incorrect shuffle mask adjustments respectively, but it also updates any test
cases that are affected by this change.
Patch migrated from https://reviews.llvm.org/D130487.
Commit: 3338186d463b32a3bababaa345da861d93c83152
https://github.com/llvm/llvm-project/commit/3338186d463b32a3bababaa345da861d93c83152
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][affine] Remove one-element linearize_index as a canonicalization (#115542)
By analogy to the canonicalization for affine.delinearize_index, remove
affine.linearize_index ops that only have one multi-index input.
Example:
Canonicalize
```mlir
%1 = affine.linearize_index [%0] by (64)
```
to
```mlir
%1 = %0
```
While I'm here, get rid of an extra space in the syntax.
Commit: b08b252a023eeead07b3e77ce799c3a7d783a0b3
https://github.com/llvm/llvm-project/commit/b08b252a023eeead07b3e77ce799c3a7d783a0b3
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/Todo/ordered.f90
A flang/test/Semantics/OpenMP/doacross.f90
M flang/test/Semantics/OpenMP/ordered01.f90
M flang/test/Semantics/OpenMP/ordered03.f90
Log Message:
-----------
[flang][OpenMP] Semantic checks for DOACROSS clause (#115397)
Keep track of loop constructs and OpenMP loop constructs that have been
entered. Use the information to validate the variables in the SINK loop
iteration vector.
---------
Co-authored-by: Tom Eccles <tom.eccles at arm.com>
Commit: e19d74016971faed321e5cca20da7016047eb029
https://github.com/llvm/llvm-project/commit/e19d74016971faed321e5cca20da7016047eb029
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/CMakeLists.txt
M lldb/cmake/modules/FindLuaAndSwig.cmake
M lldb/docs/resources/build.rst
M lldb/test/API/lit.site.cfg.py.in
M lldb/test/API/lldbtest.py
M lldb/test/API/lua_api/TestLuaAPI.py
Log Message:
-----------
[lldb] Support both Lua 5.3 and Lua 5.4 (#115500)
Lua 5.3 and Lua 5.4 are similar enough that we can easily support both
in LLDB. This patch adds support for building LLDB with both and updates
the documentation accordingly.
Commit: bf601ba3322dd908ee9290af7f0d9bafa051a734
https://github.com/llvm/llvm-project/commit/bf601ba3322dd908ee9290af7f0d9bafa051a734
Author: lfrenot <leon.frenot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/nsw_nuw.ll
M mlir/test/Target/LLVMIR/nsw_nuw.mlir
Log Message:
-----------
[mlir][LLVM] Add nsw and nuw flags to trunc (#115509)
This implementation is based on the one already existing for the binary
operations.
If the nuw keyword is present, and any of the truncated bits are
non-zero, the result is a poison value. If the nsw keyword is present,
and any of the truncated bits are not the same as the top bit of the
truncation result, the result is a poison value.
Commit: 4a68e4cbd2423dcacada8162ab7c4bb8d7f7e2cf
https://github.com/llvm/llvm-project/commit/4a68e4cbd2423dcacada8162ab7c4bb8d7f7e2cf
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/string
A libcxx/test/libcxx/strings/basic.string/string.capacity/shrink_to_fit.pass.cpp
Log Message:
-----------
[libc++] Fix throwing away smaller allocations in string::shrink_to_fit (#115659)
Currently `string::shrink_to_fit()` throws away any allocations which
return more capacity than we requested, even if that allocation is still
smaller than the current capacity. This patch fixes this to compare the
returned allocation against the current capacity of the string instead
of against the requested capacity.
Commit: 8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f
https://github.com/llvm/llvm-project/commit/8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/AST/attr-lifetime-capture-by.cpp
A clang/test/SemaCXX/attr-lifetime-capture-by.cpp
Log Message:
-----------
[clang] Introduce [[clang::lifetime_capture_by(X)]] (#111499)
This implements the RFC
https://discourse.llvm.org/t/rfc-introduce-clang-lifetime-capture-by-x/81371
In this PR, we introduce `[[clang::lifetime_capture_by(X)]]` attribute
as discussed in the RFC.
As an implementation detail of this attribute, we store and use param
indices instead of raw param expressions. The parameter indices are
computed lazily at the end of function declaration since the function
decl (and therefore the subsequent parameters) are not visible yet while
parsing a parameter annotation.
In subsequent PR, we will infer this attribute for STL containers and
perform lifetime analysis to detect dangling cases.
Commit: 6c3d374d12bf04f8d4b24c093067d82746260292
https://github.com/llvm/llvm-project/commit/6c3d374d12bf04f8d4b24c093067d82746260292
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
Log Message:
-----------
[X86] vector-shuffle-v1.ll - regenerate test checks with vpternlog comments
Commit: 3ce544e6be098b5c355140de78bc49069fda33c3
https://github.com/llvm/llvm-project/commit/3ce544e6be098b5c355140de78bc49069fda33c3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
Log Message:
-----------
[X86] lowerShuffleAsBroadcast - improve handling of non-zero element index broadcasts
On AVX2+, support broadcasting of any element if it occurs in the bottom 128-bit subvector by shuffling the element down to element 0 and then broadcasting.
Fixes #113396
Commit: f895fc9550a207decc4b93dffb9d86ec8ac24985
https://github.com/llvm/llvm-project/commit/f895fc9550a207decc4b93dffb9d86ec8ac24985
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
Log Message:
-----------
[NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (#115203)
Add `getScalarIntVT()` to return scalar int VT based on if arch is 32 or
64bit.
Commit: 9d4837f47c48c634d4a0ac799188e1f5332495ef
https://github.com/llvm/llvm-project/commit/9d4837f47c48c634d4a0ac799188e1f5332495ef
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/ClangScanDeps/diagnostics.c
M clang/test/ClangScanDeps/header-search-pruning-transitive.c
M clang/test/ClangScanDeps/link-libraries.c
M clang/test/ClangScanDeps/modules-context-hash.c
M clang/test/ClangScanDeps/modules-dep-args.c
M clang/test/ClangScanDeps/modules-extern-submodule.c
M clang/test/ClangScanDeps/modules-extern-unrelated.m
M clang/test/ClangScanDeps/modules-file-path-isolation.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-full-by-mod-name.c
M clang/test/ClangScanDeps/modules-full.cpp
M clang/test/ClangScanDeps/modules-implicit-dot-private.m
M clang/test/ClangScanDeps/modules-incomplete-umbrella.c
M clang/test/ClangScanDeps/modules-inferred.m
M clang/test/ClangScanDeps/modules-no-undeclared-includes.c
M clang/test/ClangScanDeps/modules-pch-common-submodule.c
M clang/test/ClangScanDeps/modules-pch-common-via-submodule.c
M clang/test/ClangScanDeps/modules-pch.c
M clang/test/ClangScanDeps/modules-priv-fw-from-pub.m
M clang/test/ClangScanDeps/modules-redefinition.m
M clang/test/ClangScanDeps/modules-symlink-dir-vfs.c
M clang/test/ClangScanDeps/modules-transitive.c
M clang/test/ClangScanDeps/optimize-vfs.m
M clang/test/ClangScanDeps/removed-args.c
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang][deps][modules] Allocate input file paths lazily (#114457)
This PR builds on top of #113984 and attempts to avoid allocating input
file paths eagerly. Instead, the `InputFileInfo` type used by
`ASTReader` now only holds `StringRef`s that point into the PCM file
buffer, and the full input file paths get resolved on demand.
The dependency scanner makes use of this in a bit of a roundabout way:
`ModuleDeps` now only holds (an owning copy of) the short unresolved
input file paths, which get resolved lazily. This can be a big win, I'm
seeing up to a 5% speedup.
Commit: 396ed9c2a12daffdb0349c850beb59e891e2a42b
https://github.com/llvm/llvm-project/commit/396ed9c2a12daffdb0349c850beb59e891e2a42b
Author: Duncan <duncpro at icloud.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/arm/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/libc_search.rst
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__lsearchcompare_t.h
M libc/newhdrgen/yaml/search.yaml
M libc/spec/posix.td
M libc/src/search/CMakeLists.txt
A libc/src/search/lfind.cpp
A libc/src/search/lfind.h
M libc/test/src/search/CMakeLists.txt
A libc/test/src/search/lfind_test.cpp
Log Message:
-----------
[libc][search] implement posix `lfind` function (#114692)
# Changes
- Implement the POSIX
[`lfind`](https://man7.org/linux/man-pages/man3/lsearch.3.html)
function.
- Put a checkmark in the [posix support table
docs](https://libc.llvm.org/libc_search.html) next to `lfind`.
Commit: c11b6e80b6121ebbec6fdc32e51938b6a13ef104
https://github.com/llvm/llvm-project/commit/c11b6e80b6121ebbec6fdc32e51938b6a13ef104
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/stdfix-types.h
M libc/newhdrgen/yaml/stdfix.yaml
M libc/spec/stdc_ext.td
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/hkbits.cpp
A libc/src/stdfix/hkbits.h
A libc/src/stdfix/hrbits.cpp
A libc/src/stdfix/hrbits.h
A libc/src/stdfix/kbits.cpp
A libc/src/stdfix/kbits.h
A libc/src/stdfix/lkbits.cpp
A libc/src/stdfix/lkbits.h
A libc/src/stdfix/lrbits.cpp
A libc/src/stdfix/lrbits.h
A libc/src/stdfix/rbits.cpp
A libc/src/stdfix/rbits.h
A libc/src/stdfix/uhkbits.cpp
A libc/src/stdfix/uhkbits.h
A libc/src/stdfix/uhrbits.cpp
A libc/src/stdfix/uhrbits.h
A libc/src/stdfix/ukbits.cpp
A libc/src/stdfix/ukbits.h
A libc/src/stdfix/ulkbits.cpp
A libc/src/stdfix/ulkbits.h
A libc/src/stdfix/ulrbits.cpp
A libc/src/stdfix/ulrbits.h
A libc/src/stdfix/urbits.cpp
A libc/src/stdfix/urbits.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/FxBitsTest.h
A libc/test/src/stdfix/hkbits_test.cpp
A libc/test/src/stdfix/hrbits_test.cpp
A libc/test/src/stdfix/kbits_test.cpp
A libc/test/src/stdfix/lkbits_test.cpp
A libc/test/src/stdfix/lrbits_test.cpp
A libc/test/src/stdfix/rbits_test.cpp
A libc/test/src/stdfix/uhkbits_test.cpp
A libc/test/src/stdfix/uhrbits_test.cpp
A libc/test/src/stdfix/ukbits_test.cpp
A libc/test/src/stdfix/ulkbits_test.cpp
A libc/test/src/stdfix/ulrbits_test.cpp
A libc/test/src/stdfix/urbits_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point fxbits functions in llvm-libc (#114912)
Commit: a2171d7f0e2366ea5017c70673ce9b4e8be97f09
https://github.com/llvm/llvm-project/commit/a2171d7f0e2366ea5017c70673ce9b4e8be97f09
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[GISel][AArch64][RISCV] Don't call markAllIdxsAsCovered from minScalarSameAs/maxScalarSameAs. (#115637)
The predicate isn't user defined so we don't need to call
markAllIdxsAsCovered. Call actionIf instead of
widenScalarIf/narrowScalarIf.
Commit: 8366be73de39c446961fa56828390ad3438f8bc7
https://github.com/llvm/llvm-project/commit/8366be73de39c446961fa56828390ad3438f8bc7
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/spec/stdc_ext.td
Log Message:
-----------
[libc] fix typo and trailing whitespace
Fixes #114912
Commit: 2778af9a70bd4b4365bba2d20d50568f7ee3d18f
https://github.com/llvm/llvm-project/commit/2778af9a70bd4b4365bba2d20d50568f7ee3d18f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang] Fix warnings
This patch fixes:
flang/lib/Semantics/check-omp-structure.cpp:979:24: error: unused
variable 'top' [-Werror,-Wunused-variable]
flang/lib/Semantics/check-omp-structure.cpp:4441:24: error: unused
variable 'top' [-Werror,-Wunused-variable]
Commit: 11cc826c0a5802b03c85aa271b6fd16214f8f4d8
https://github.com/llvm/llvm-project/commit/11cc826c0a5802b03c85aa271b6fd16214f8f4d8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amdgpuintrin.h
A clang/lib/Headers/gpuintrin.h
A clang/lib/Headers/nvptxintrin.h
A clang/test/Headers/gpuintrin.c
A clang/test/Headers/gpuintrin_lang.c
Log Message:
-----------
[Clang] Implement resource directory headers for common GPU intrinsics (#110179)
Summary:
All GPU based languages provide some way to access things like the
thread ID or other resources. However, this is spread between many
different languages and it varies between targets. The goal here is to
provide a resource directory header that just provides these in an
easier to understand way, primarily so this can be used for C/C++ code.
The interface aims to be common, to faciliate easier porting, but target
specific stuff could be put in the individual headers.
Commit: 9c3a7ad7faab0e172d08e5873b88141ab9866985
https://github.com/llvm/llvm-project/commit/9c3a7ad7faab0e172d08e5873b88141ab9866985
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale_dir/locale_base_api.h
R libcxx/include/__locale_dir/locale_base_api/apple.h
R libcxx/include/__locale_dir/locale_base_api/freebsd.h
A libcxx/include/__locale_dir/support/apple.h
A libcxx/include/__locale_dir/support/bsd_like.h
A libcxx/include/__locale_dir/support/freebsd.h
M libcxx/include/iomanip
M libcxx/include/module.modulemap
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/member_swap.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/move_assign.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/move.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/bool.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/double.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/float.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/int.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_double.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/short.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_int.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long_long.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_short.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/signed_char.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/signed_char_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/unsigned_char.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/unsigned_char_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/wchar_t_pointer.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.manip/ws.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size_chart.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/ignore.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/peek.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/putback.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/read.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/readsome.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg_off.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/sync.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/tellg.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/unget.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/member_swap.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/move_assign.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/move.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/streambuf.pass.cpp
M libcxx/test/std/input.output/iostream.format/input.streams/istream/istream_sentry/ctor.pass.cpp
Log Message:
-----------
[libc++] Cleanly implement the base locale API for BSD-like platforms (#115176)
Instead of going through the old locale entry points, define the base
localization API for BSD-like platforms (Apple and FreeBSD) from
scratch, using <xlocale.h> as a basis. This doesn't actually change how
that functionality is implemented, it only avoids going through a maze
to do so.
This clean new support is implemented in a separate __locale_dir/support
directory, which mirrors what we do for the threading support API.
Eventually, everything under __locale_dir/locale_base_api will go away.
rdar://131476632
Commit: 87605b1fbafa7e8fcb1aac057a47886f3be0daa3
https://github.com/llvm/llvm-project/commit/87605b1fbafa7e8fcb1aac057a47886f3be0daa3
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] Port e19d74016971f
Commit: 0b07aaec38eaae0885c6f05b4bb1ef62cc3fe004
https://github.com/llvm/llvm-project/commit/0b07aaec38eaae0885c6f05b4bb1ef62cc3fe004
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/spec/stdc_ext.td
Log Message:
-----------
[libc] fix missing trailing commas
Fixes: #114912
Commit: 7c6d809dfc41e2f2de86b88f0ca14be4af432cd7
https://github.com/llvm/llvm-project/commit/7c6d809dfc41e2f2de86b88f0ca14be4af432cd7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 11cc826c0a58
Commit: e8fe895df12cfc2da6e584d893e12970f9d443eb
https://github.com/llvm/llvm-project/commit/e8fe895df12cfc2da6e584d893e12970f9d443eb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 9c3a7ad7faab
Commit: da78ac5d331953d3386fd56cd7979022be7400cf
https://github.com/llvm/llvm-project/commit/da78ac5d331953d3386fd56cd7979022be7400cf
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/test/Headers/gpuintrin_lang.c
Log Message:
-----------
[Clang] Fix GPU intrinsics test on different range metadata
Summary:
For some reason, a few compilers do not emit the range metadata which
makes this test fail. I can't reproduce it locally so hopefully removing
that will ecourage it to fix.
Commit: 058ac837bc35419bbbb34f3206f5aa229c669811
https://github.com/llvm/llvm-project/commit/058ac837bc35419bbbb34f3206f5aa229c669811
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle-with-root.ll
Log Message:
-----------
[SLP]Use generic createShuffle for buildvector
Use generic createShuffle function, which know how to adjust the vectors
correctly, to avoid compiler crash when trying to build a buildvector as
a shuffle
Fixes #115732
Commit: a2f9d1d078cefc3ee7b19610f7117d1fb1369f18
https://github.com/llvm/llvm-project/commit/a2f9d1d078cefc3ee7b19610f7117d1fb1369f18
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/GeneratePCH.cpp
Log Message:
-----------
[clang][serialization] Enable `ASTWriter` to work with `Preprocessor` only (#115237)
This PR builds on top of
https://github.com/llvm/llvm-project/pull/115235 and makes it possible
to call `ASTWriter::WriteAST()` with `Preprocessor` only instead of full
`Sema` object. So far, there are no clients that leverage the new
capability - that will come in a follow-up commit.
Commit: b242ae32f56372d7858945df72ce2f00f7e97bc3
https://github.com/llvm/llvm-project/commit/b242ae32f56372d7858945df72ce2f00f7e97bc3
Author: David Green <david.green at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/concat-vector.ll
Log Message:
-----------
[AArch64][GlobalISel] Protect against undef first element in CombineShuffleConcat.
In case the first element is undef, we need to look through to find a valid
type for the inputs.
Commit: 74003f11b3e4dd90665f8f8d911f40a22dd940d4
https://github.com/llvm/llvm-project/commit/74003f11b3e4dd90665f8f8d911f40a22dd940d4
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
A llvm/test/MC/AArch64/cfi_val_offset.s
Log Message:
-----------
[mc] Add CFI directive to emit val_offset() rules (#113971)
These specify that the value of the given register in the previous frame
is the CFA plus some offset. This isn't very common but can be necessary
if the original value is normally reconstructed from the stack/frame
pointer instead of being saved on the stack and reloaded from there.
Commit: 750247bc1cc34629a73f8311ccb87e3d7c03ae23
https://github.com/llvm/llvm-project/commit/750247bc1cc34629a73f8311ccb87e3d7c03ae23
Author: David Green <david.green at arm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/Thumb2/csel.ll
Log Message:
-----------
[ARM] Fix APInt assert for CSNEG known bits.
Use APInt::getAllOnes(32), to avoid the assert when constructing an APInt
from -1.
Commit: 2b58458225fb0f9cce6dabce7e4451f86c8c73a5
https://github.com/llvm/llvm-project/commit/2b58458225fb0f9cce6dabce7e4451f86c8c73a5
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
A llvm/test/CodeGen/MIR/skip-mir-comment-trailing-whitespace.mir
Log Message:
-----------
[MIRLexer][RISCV] Eat a space after the Machine comment (#115365)
The MIRPrinter emits ` :: ` at the start of a MMO. The MIRLexer eats all
the white space after the operand and before the `::` when there is no
comment. We need to eat the space after the comment to allow MIRLexer to
parse comments on a MMO.
Commit: 582a4799e1fc8e46b5872fdd38369d097bce79f2
https://github.com/llvm/llvm-project/commit/582a4799e1fc8e46b5872fdd38369d097bce79f2
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/linux/api.td
M libc/spec/posix.td
Log Message:
-----------
[libc] fix lfind old hdrgen (#115760)
Fixes: #114692
Commit: 3a03513fc6ef8f3272d33be19164243c9dbf0452
https://github.com/llvm/llvm-project/commit/3a03513fc6ef8f3272d33be19164243c9dbf0452
Author: Nikita Popov <nikita.ppv at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
R clang/test/AST/attr-lifetime-capture-by.cpp
R clang/test/SemaCXX/attr-lifetime-capture-by.cpp
Log Message:
-----------
Revert "[clang] Introduce [[clang::lifetime_capture_by(X)]] (#111499)"
This reverts commit 8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f.
Causes a large compile-time regression, see:
https://llvm-compile-time-tracker.com/compare.php?from=4a68e4cbd2423dcacada8162ab7c4bb8d7f7e2cf&to=8c4331c1abeb33eabf3cdbefa7f2b6e0540e7f4f&stat=instructions:u
Commit: b816c2628919de9a978132347f039ad23794837d
https://github.com/llvm/llvm-project/commit/b816c2628919de9a978132347f039ad23794837d
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
A llvm/test/CodeGen/MIR/RISCV/skip-mir-comment-trailing-whitespace.mir
R llvm/test/CodeGen/MIR/skip-mir-comment-trailing-whitespace.mir
Log Message:
-----------
[RISCV][MIR] Move skip-mir-comment-trailing-whitespace.mir into RISCV subdirectory
Commit: ef2d6dafc40c5a58532eb773fc74ddd8e1f53a33
https://github.com/llvm/llvm-project/commit/ef2d6dafc40c5a58532eb773fc74ddd8e1f53a33
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/FMF.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
A llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll
Log Message:
-----------
[InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (#106492)
Transform `fcmp + fadd + sel` into `fcmp + sel + fadd` which enables the
possibility of transforming `fcmp + sel` into `maxnum/minnum`
intrinsics.
Alive2 results:
https://alive2.llvm.org/ce/z/2cmimW
https://alive2.llvm.org/ce/z/Qh9ZJt
https://alive2.llvm.org/ce/z/vtLj3R
Commit: e399322d5ef2919ccd12f28a00e6b24621b11072
https://github.com/llvm/llvm-project/commit/e399322d5ef2919ccd12f28a00e6b24621b11072
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll
Log Message:
-----------
[GlobalISel] Import llvm.stepvector (#115721)
Commit: 3d73dbe7f0411a40562773c6a44d4a5d3dede523
https://github.com/llvm/llvm-project/commit/3d73dbe7f0411a40562773c6a44d4a5d3dede523
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
Log Message:
-----------
[AMDGPU] Remove unused AMDGPUISD enum members (NFC) (#115582)
Those were only used in `getTargetNodeName`.
Commit: bf1c86ce1d8e4020c44376176d4aff5cde66bda2
https://github.com/llvm/llvm-project/commit/bf1c86ce1d8e4020c44376176d4aff5cde66bda2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll
Log Message:
-----------
InstCombine: Regenerate test after "Transform (fcmp + fadd + sel)"
Update for the splat vector syntax, which landed after the last
precheck run.
Commit: c02b8a01b7caf2e4ffe17a123f1bcf59192e4b39
https://github.com/llvm/llvm-project/commit/c02b8a01b7caf2e4ffe17a123f1bcf59192e4b39
Author: Rolf Morel <rolf.morel at intel.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
Log Message:
-----------
[MLIR][Linalg] Fix unclosed code block which broke generated docs - NFC (#115763)
#115319 added a tablegen description for an op (MatmulOp) but missed
closing one of the code blocks in the description. As a result the
generated docs broke, i.e. https://mlir.llvm.org/docs/Dialects/Linalg
was broken after this code block.
Commit: 9eefa922f8ef60a8032db28a33f13ed6d5249d0a
https://github.com/llvm/llvm-project/commit/9eefa922f8ef60a8032db28a33f13ed6d5249d0a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Log Message:
-----------
AMDGPU/GlobalISel: Remove getVRegDef null checks in selector (#115530)
We should be able to assume every virtual register is defined.
Commit: 25d1ac11d537debb217c65c2bcdd087a60cff58e
https://github.com/llvm/llvm-project/commit/25d1ac11d537debb217c65c2bcdd087a60cff58e
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/include/clang/Lex/HeaderSearchOptions.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/GeneratePCH.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][deps] Only write preprocessor info into PCMs (#115239)
This patch builds on top of
https://github.com/llvm/llvm-project/pull/115237 and
https://github.com/llvm/llvm-project/pull/115235, only passing the
`Preprocessor` object to `ASTWriter`. This reduces the size of scanning
PCM files by 1/3 and speeds up scans by 16%.
Commit: 77ddcf7cbfb135f09c75c1d611b241f6e851df86
https://github.com/llvm/llvm-project/commit/77ddcf7cbfb135f09c75c1d611b241f6e851df86
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
A llvm/test/CodeGen/SystemZ/dag-combine-07.ll
Log Message:
-----------
[SystemZ] Fix bitwidth problem in FindReplicatedImm(). (#115383)
A test case emerged with an i32 truncating store of an i64 constant
operand, where the i64 constant did not fit in 32 bits, which caused
FindReplicatedImm() to crash.
Make sure to truncate the APInt in these cases.
Commit: 9254b81990a403f0a5d4a96a4e9efc69e19870bc
https://github.com/llvm/llvm-project/commit/9254b81990a403f0a5d4a96a4e9efc69e19870bc
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[tsan] Fix typo in type (#115769)
Introduced with #114931
Fixes https://github.com/golang/go/issues/70283
Commit: 515e11ae1cd4a29225f61aa31c7f657c8848a539
https://github.com/llvm/llvm-project/commit/515e11ae1cd4a29225f61aa31c7f657c8848a539
Author: Hugh Delaney <hugh.delaney at codeplay.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/DebugInfo/NVPTX/dbg-value-const-byref.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
Log Message:
-----------
[NVPTX] Use PTX 7.0 in DebugInfo tests (#115757)
Not doing so makes `%ptxas-verify` fail with:
`Feature 'Defining labels in .section' requires PTX ISA .version 7.0 or
later.`
Commit: f1800df5d53e14e2d865273e42bb0a3968129a7f
https://github.com/llvm/llvm-project/commit/f1800df5d53e14e2d865273e42bb0a3968129a7f
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/arm/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/windows/entrypoints.txt
Log Message:
-----------
[libc] fix lfind entrypoints (#115771)
- move arm entrypoint to fullbuild only
- remove baremetal entrypoints; we avoid POSIX on baremetal
- remove darwin/arm and windows entrypoints since these are untested
Fixes: #114692
Commit: 54ae9e7bbae60a2ddc629e0a7a854492c241774d
https://github.com/llvm/llvm-project/commit/54ae9e7bbae60a2ddc629e0a7a854492c241774d
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][SCF] Fix condition for fusability in consumer fusion API (#115768)
It was previously allowing either a tilable or dps op to be fused. Both
are required for consumer fusion.
Commit: bbf2ad026eb0b399364a889799ef6b45878cd299
https://github.com/llvm/llvm-project/commit/bbf2ad026eb0b399364a889799ef6b45878cd299
Author: Caslyn Tonelli <6718161+Caslyn at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxx/include/__config
Log Message:
-----------
[libc++] Amend error message for _LIBCPP_HAS_THREAD_API_EXTERNAL (#115774)
Noticed this while debugging a few things following
https://github.com/llvm/llvm-project/pull/112094. Amended error message
to reflect conditional check.
Commit: 36cbc09e636f3c0e93dc450a9464de8dbe92c75f
https://github.com/llvm/llvm-project/commit/36cbc09e636f3c0e93dc450a9464de8dbe92c75f
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] config macros is a support library (#115776)
Previously __support_macros_config was a cc_library, but making it a
libc_support_library makes things cleaner.
Commit: 1ae0dae368e4bbf2177603d5c310e794c4fd0bd8
https://github.com/llvm/llvm-project/commit/1ae0dae368e4bbf2177603d5c310e794c4fd0bd8
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/stdio/scanf_core/reader.h
M libc/src/stdio/sscanf.cpp
M libc/src/wchar/CMakeLists.txt
M libc/src/wchar/btowc.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/stdio/scanf_core/CMakeLists.txt
M libc/test/src/stdio/scanf_core/converter_test.cpp
M libc/test/src/sys/statvfs/linux/CMakeLists.txt
M libc/test/src/sys/statvfs/linux/fstatvfs_test.cpp
M libc/test/src/sys/statvfs/linux/statvfs_test.cpp
Log Message:
-----------
[libc] Clean up skipped and failing cmake (#115400)
I normally run my cmake with LIBC_CMAKE_VERBOSE_LOGGING set to ON so I
can debug build issues more easily. One of the effects of this is I see
which tests/entrypoints are skipped on my machine. This patch fixes up
the tests and entrypoints that were skipped, but easily fixed. These
were:
libc.src.pthread.pthread_spin_destroy
libc.src.pthread.pthread_spin_init
libc.src.pthread.pthread_spin_lock
libc.src.pthread.pthread_spin_trylock
libc.src.pthread.pthread_spin_unlock
(entrypoints were just missing)
libc.src.wchar.btowc
(I forgot to finish it)
libc.test.src.sys.statvfs.linux.statvfs_test
libc.test.src.sys.statvfs.linux.fstatvfs_test
(Incorrect includes for rmdir, needed some cleanup)
libc.test.integration.src.unistd.execve_test
(wrong dep for errno)
libc.test.src.math.smoke.fmaf_test
(add_fp_unittest doesn't support flags)
libc.test.src.stdio.scanf_core.converter_test
(needed to be moved away from string_reader, further cleanup needed)
Commit: 448d7da5626f412fead00114dc7612c0844b4125
https://github.com/llvm/llvm-project/commit/448d7da5626f412fead00114dc7612c0844b4125
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
Log Message:
-----------
[libc][stdfix] disable lkbits on riscv (#115781)
Link: #114912
Link: #115778
Commit: 5098b56d22b53196e92788fbfd70b01212376db4
https://github.com/llvm/llvm-project/commit/5098b56d22b53196e92788fbfd70b01212376db4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__utility/exception_guard.h
A libcxx/include/__utility/scope_guard.h
M libcxx/include/module.modulemap
M libcxx/include/string
Log Message:
-----------
[libc++] Introduce a standalone __scope_guard and use it in <string> (#114867)
This introduces a new `__scope_guard` without any fancy features. The
scope guard is used in `<string>` to simplify some of the ASan
annotations (especially by making it harder to forget them where
exceptions are thrown).
Commit: ad35450d85bd0d1f222e94cac91d884b7ed6c77b
https://github.com/llvm/llvm-project/commit/ad35450d85bd0d1f222e94cac91d884b7ed6c77b
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 5098b56d22b5
Commit: 615e28e6271025cc3dbdf8c04e9902a5dd8b2b0c
https://github.com/llvm/llvm-project/commit/615e28e6271025cc3dbdf8c04e9902a5dd8b2b0c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu_m-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-ext-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove s32 as a legal type for G_SMUL on RV64.
Commit: 375bb38f728874c371ea044bcd62b3869ea25e98
https://github.com/llvm/llvm-project/commit/375bb38f728874c371ea044bcd62b3869ea25e98
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Add i32 zext.h pattern for Zbkb.
This resolves a FIXME and reduces tests diffs from later patches
remove i32 as a legal type.
Commit: e8c4842f0ce7a81440e2147a0c9bcc690714a6e5
https://github.com/llvm/llvm-project/commit/e8c4842f0ce7a81440e2147a0c9bcc690714a6e5
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/Parse/ParseOpenMP.cpp
Log Message:
-----------
[clang][OpenMP][NFC] Move 'allocate' clause modifier parsing into fun… (#115775)
…ction
Parsing of 'allocate' clause modifier ('allocator') has been moved into
a separate function in anticipation of adding another modifier
('align').
Commit: 28cdebf7bae4aae5f79272cbdf324f9e8110aed3
https://github.com/llvm/llvm-project/commit/28cdebf7bae4aae5f79272cbdf324f9e8110aed3
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
Log Message:
-----------
[libc][stdfix] disable ulkbits on riscv (#115781) (#115792)
I should have disabled this in #115781. Mea culpa.
Link: #114912
Link: #115778
Link: #115781
Commit: eaed095a566cf75aa7df208defeb101ce1a6ed96
https://github.com/llvm/llvm-project/commit/eaed095a566cf75aa7df208defeb101ce1a6ed96
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
M libcxxabi/include/CMakeLists.txt
Log Message:
-----------
Revert "Reapply "[libc++abi] Stop copying headers to the build directory"" (#115793)
Reverts llvm/llvm-project#115379
Reverting since this broke the Fuchsia builders.
Commit: c280522f7e359117adde10de4158f9f6fec20a7b
https://github.com/llvm/llvm-project/commit/c280522f7e359117adde10de4158f9f6fec20a7b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/shift-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-add-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-addo-subo-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-and-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ashr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-const-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fshl-fshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-lshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-or-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-shl-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sub-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-xor-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-splatvector-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Remove s32 support for G_ADD/SUB/AND/OR/XOR on RV64.
This is consistent with other patches to remove s32 recently.
Commit: f109517d153609d4a8a3a3d3d3cc06da1b629364
https://github.com/llvm/llvm-project/commit/f109517d153609d4a8a3a3d3d3cc06da1b629364
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M lldb/include/lldb/Core/Disassembler.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-private-interfaces.h
M lldb/source/API/SBFunction.cpp
M lldb/source/API/SBSymbol.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectDisassemble.h
M lldb/source/Commands/Options.td
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Plugins/Architecture/Mips/ArchitectureMips.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h
M lldb/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Symbol/Function.cpp
M lldb/source/Symbol/Symbol.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/source/Target/ThreadPlanTracer.cpp
M lldb/source/Target/TraceDumper.cpp
A lldb/test/Shell/Commands/command-disassemble-cpu-features.yaml
M lldb/unittests/Disassembler/ARM/TestArm64Disassembly.cpp
M lldb/unittests/Disassembler/ARM/TestArmv7Disassembly.cpp
M lldb/unittests/Disassembler/RISCV/TestMCDisasmInstanceRISCV.cpp
M lldb/unittests/Disassembler/x86/TestGetControlFlowKindx86.cpp
Log Message:
-----------
[lldb] Support overriding the disassembly CPU & features (#115382)
Add the ability to override the disassembly CPU and CPU features through
a target setting (`target.disassembly-cpu` and
`target.disassembly-features`) and a `disassemble` command option
(`--cpu` and `--features`).
This is especially relevant for architectures like RISC-V which relies
heavily on CPU extensions.
The majority of this patch is plumbing the options through. I recommend
looking at DisassemblerLLVMC and the test for the observable change in
behavior.
Commit: 49e004fbe0416bc23ebea8824805fd7f07f90fa8
https://github.com/llvm/llvm-project/commit/49e004fbe0416bc23ebea8824805fd7f07f90fa8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/LoongArch/vararg.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg.ll
Log Message:
-----------
[nfc][msan] Regenerate tests missing FileCheck (#115794)
Extracted and updated from #115018
Co-authored-by: Kamil Kashapov <kashapov at ispras.ru>
Commit: da032a609c1bde6f6775cf1650e08a205920d920
https://github.com/llvm/llvm-project/commit/da032a609c1bde6f6775cf1650e08a205920d920
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
Log Message:
-----------
[Wunsafe-buffer-usage] Fix false positives in handling string literals. (#115552)
Do not warn when a string literal is indexed and the idex value is
within the bounds of the length of the string.
(rdar://139106996)
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: 31dc2b9aa06f998472fa4a7f147a778ebdc80003
https://github.com/llvm/llvm-project/commit/31dc2b9aa06f998472fa4a7f147a778ebdc80003
Author: Douglas <Douglas.Gliner at sony.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M flang/include/flang/Lower/CustomIntrinsicCall.h
Log Message:
-----------
[flang] Fix typo in `CustomIntrinsicCall.h` (NFC) (#115789)
Fix typo in `CustomIntrinsicCall.h`: `DEPRICATED` -> `DEPRECATED`
Commit: de2fad32513f7420988df1cf99aff90e0a067469
https://github.com/llvm/llvm-project/commit/de2fad32513f7420988df1cf99aff90e0a067469
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
Log Message:
-----------
[Clang] Fix dependent expression handling for assumptions (#115646)
The function definition instantiation assumes any declarations used
inside are already transformed before transforming the body, so we need
to preserve the transformed expression of CXXAssumeAttr even if it is
not a constant expression. Moreover, the full expression of the
assumption should also entail a potential lambda capture transformation,
hence the call to ActOnFinishFullExpr() after TransformExpr().
Fixes #114787
Commit: aad256598d7fd14d736eda76ee9eba8905bd84b8
https://github.com/llvm/llvm-project/commit/aad256598d7fd14d736eda76ee9eba8905bd84b8
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl-ins-gr2vr.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-repl-ins-gr2vr.ll
Log Message:
-----------
[LoongArch] Pre-commit test for vreplgr2vr + vinsgr2vr intrinsics (#115702)
Inspired by https://github.com/llvm/llvm-project/issues/101624.
A later commit will optimize it.
Commit: 3b29a8a00809e868e3df7e687695670ff5077fbd
https://github.com/llvm/llvm-project/commit/3b29a8a00809e868e3df7e687695670ff5077fbd
Author: Min <45393763+MinxuanZ at users.noreply.github.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp
Log Message:
-----------
[libfuzzer] use timer_create() instead of setitimer() for linux (#110274)
SetTimer() now uses setitimer() to sending SIGALRM every `
UnitTimeoutSec/2 + 1` s
Set UnitTimeoutSec with the `-timeout=` option
"POSIX.1-2008 marks getitimer() and setitimer() obsolete" and also has
some issues regarding accuracy of the timers under load . See
https://linux.die.net/man/2/setitimer.
I propose using timer_create() and sigaction() ,See
http://man7.org/linux/man-pages/man2/timer_create.2.html
# test result on my x86_64 linux
`make check-fuzzer`
Commit: e855feac41fd89aebf540a155d21f12a3e82f05b
https://github.com/llvm/llvm-project/commit/e855feac41fd89aebf540a155d21f12a3e82f05b
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
Log Message:
-----------
[clang-tidy] fix bugprone-sizeof-expression when sizeof expression with template types (#115275)
Fixed: #115175.
`dependent type` are not the same even pointers are the same.
---------
Co-authored-by: whisperity <whisperity at gmail.com>
Commit: f9125ddc1faafaceac9064e889cd9b4a77523677
https://github.com/llvm/llvm-project/commit/f9125ddc1faafaceac9064e889cd9b4a77523677
Author: Florian Mayer <fmayer at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp
Log Message:
-----------
Revert "[libfuzzer] use timer_create() instead of setitimer() for linux" (#115811)
Reverts llvm/llvm-project#110274
Buildbots broke
Commit: d1e17a3f23a30815030b784d813141a469b3d7fb
https://github.com/llvm/llvm-project/commit/d1e17a3f23a30815030b784d813141a469b3d7fb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ashr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fshl-fshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-lshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-shl-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/shift.ll
Log Message:
-----------
[RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (#115559)
Unless the shift amount is constant. In that case we zero extend the
shift amount and promote the other input the same way widenScalar would.
I'm not using widenScalar because that requires a separate call for each
operand so it was easier to do both operands at once.
Commit: b4339dd612597bf3fae01e42d644ba709e4ae446
https://github.com/llvm/llvm-project/commit/b4339dd612597bf3fae01e42d644ba709e4ae446
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[RISCV] Promote s32 G_SEXT_INREG for RV64
Commit: 3aa24eae52aa463ce47b528879a9a24e04956b88
https://github.com/llvm/llvm-project/commit/3aa24eae52aa463ce47b528879a9a24e04956b88
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Log Message:
-----------
[SelectionDAG] Simplify classof of MemSDNode and MemIntrinsicSDNode (NFC) (#115720)
`SDNodeBits.IsMemIntrinsic` is set if and only if the node is an
instance of `MemIntrinsicSDNode`. Thus, to check if a node is an
instance of `MemIntrinsicSDNode` we only need to check this bit.
Commit: ffa45f2e6aafaf3ed51919beb886325e908d4c20
https://github.com/llvm/llvm-project/commit/ffa45f2e6aafaf3ed51919beb886325e908d4c20
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/constant64.mir
Log Message:
-----------
[RISCV][GISel] Use correct constant for i32 INT_MAX in test. NFC
Commit: 23fbaff9a3fd2b26418e0c2f10b701049399251f
https://github.com/llvm/llvm-project/commit/23fbaff9a3fd2b26418e0c2f10b701049399251f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Source.cpp
M clang/lib/AST/ByteCode/Source.h
Log Message:
-----------
[ByteCode] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (#115809)
Note that PointerUnion::{is,get,dyn_cast} have been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Commit: 82d5dd28b4de7245088f7ed40da37f8cf80461e4
https://github.com/llvm/llvm-project/commit/82d5dd28b4de7245088f7ed40da37f8cf80461e4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVConstantPoolValue.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVLandingPadSetup.cpp
M llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/RISCV/RISCVZacasABIFix.cpp
Log Message:
-----------
[RISCV] Remove unused includes (NFC) (#115814)
Identified with misc-include-cleaner.
Commit: f77101ea7913ab6a6b28ad03c152c615a89900f6
https://github.com/llvm/llvm-project/commit/f77101ea7913ab6a6b28ad03c152c615a89900f6
Author: Malay Sanghi <malay.sanghi at intel.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amxmovrsintrin.h
A clang/lib/Headers/amxmovrstransposeintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/amx_movrs.c
A clang/test/CodeGen/X86/amx_movrs_api.c
A clang/test/CodeGen/X86/amx_movrs_errors.c
A clang/test/CodeGen/X86/amx_movrs_tranpose.c
A clang/test/CodeGen/X86/amx_movrs_tranpose_api.c
A clang/test/CodeGen/X86/amx_movrs_transpose_errors.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
A llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
A llvm/test/CodeGen/X86/amx_movrs_transpose_intrinsics.ll
A llvm/test/MC/Disassembler/X86/AMX/x86-64-amx-movrs.txt
A llvm/test/MC/X86/AMX/x86-64-amx-movrs-att.s
A llvm/test/MC/X86/AMX/x86-64-amx-movrs-intel.s
Log Message:
-----------
[X86][AMX] Support AMX-MOVRS (#115151)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: adb476b0125127939fd116f616a0c18909d4a377
https://github.com/llvm/llvm-project/commit/adb476b0125127939fd116f616a0c18909d4a377
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[nfc][msan] Clang-format MemorySanitizer.cpp (#115828)
Extracted from #109284
Co-authored-by: Kamil Kashapov <kashapov at ispras.ru>
Commit: 0c5bf565ba7059ca8542c522fcab019f2e2c82bb
https://github.com/llvm/llvm-project/commit/0c5bf565ba7059ca8542c522fcab019f2e2c82bb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port f77101ea7913
Commit: 6a857fe8b960cb26cf03a0c825250726589a7771
https://github.com/llvm/llvm-project/commit/6a857fe8b960cb26cf03a0c825250726589a7771
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-11 (Mon, 11 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/constant64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/sext-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/shift-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zext-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-const-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-constbarrier-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fshl-fshr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-extract-subvector.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-icmp.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-insert-subvector.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-splatvector-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-zext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Promote s32 G_CONSTANT on RV64.
Commit: 956361ca080a689a96b6552d28681aaf0ad2f494
https://github.com/llvm/llvm-project/commit/956361ca080a689a96b6552d28681aaf0ad2f494
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Zabha/Zacas implies Zaamo (#115694)
The Zabha/Zacas extension depends upon the Zaamo extension.
Ref: https://github.com/riscv/riscv-isa-manual/blob/main/src/zacas.adoc
https://github.com/riscv/riscv-isa-manual/blob/main/src/zabha.adoc.
Commit: 28e4aad45a64ec893c02f21b9c2afe7efe5f4a2a
https://github.com/llvm/llvm-project/commit/28e4aad45a64ec893c02f21b9c2afe7efe5f4a2a
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/trunctfbf2.c
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[X86][BF16] Add libcall for FP128 -> BF16 (#115825)
This is to fix #115710.
Commit: fa9888747548a8965ed9932daa53281794ebc5b6
https://github.com/llvm/llvm-project/commit/fa9888747548a8965ed9932daa53281794ebc5b6
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
Log Message:
-----------
[MLIR][LLVM] Cleanup attr-dict printing (NFC) (#115765)
This commit simplifies the custom attribute dictionary printing and uses
it only for printing ops that have fast math flags.
Commit: 93589057830b2c3c35500ee8cac25c717a1e98f9
https://github.com/llvm/llvm-project/commit/93589057830b2c3c35500ee8cac25c717a1e98f9
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrSPE.td
M llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
M llvm/test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll
M llvm/test/MC/PowerPC/ppc64-errors.s
Log Message:
-----------
[PowerPC] Add error for incorrect use of memory operands (#114277)
If an instruction doesn't support memory operands, but one is provided,
an error should be raised. And conversely, if an instruction requires a
memory operand, but none is given, an error should be raised.
Commit: b94a24e5ddfc52baeafdf4dc9fee5d18d8a508a3
https://github.com/llvm/llvm-project/commit/b94a24e5ddfc52baeafdf4dc9fee5d18d8a508a3
Author: Kamil Kashapov <kashapov at ispras.ru>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[nfc][msan] Reorder ifs in CreateVarArgHelper
Part of #109284
Commit: 469ac118418fff2fc07e5705ff527405060ac586
https://github.com/llvm/llvm-project/commit/469ac118418fff2fc07e5705ff527405060ac586
Author: Kamil Kashapov <kashapov at ispras.ru>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[nfc][msan] Remove 64 from VarArg*Helper names
Part of #109284
Commit: ca4cd08fb9d7a03fbd00bca05d5dbfa87cd6db4e
https://github.com/llvm/llvm-project/commit/ca4cd08fb9d7a03fbd00bca05d5dbfa87cd6db4e
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/CMakeLists.txt
A lldb/source/Plugins/ObjectFile/XCOFF/CMakeLists.txt
A lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
A lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
A lldb/test/Shell/ObjectFile/XCOFF/basic-info.yaml
M lldb/tools/lldb-server/CMakeLists.txt
M lldb/tools/lldb-server/SystemInitializerLLGS.cpp
Log Message:
-----------
[lldb][AIX] Added XCOFF Object File Header for AIX (#111814)
Added XCOFF Object File Header for AIX.
Added base functionality for XCOFF support. Will enhance the files in
incremental PRs
Details about XCOFF file format on AIX:
[XCOFF](https://www.ibm.com/docs/en/aix/7.3?topic=formats-xcoff-object-file-format)
Commit: 2a3c08f620fc89823ebf1d2af4ea0beb97671db2
https://github.com/llvm/llvm-project/commit/2a3c08f620fc89823ebf1d2af4ea0beb97671db2
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Symbol/Function.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
Log Message:
-----------
[lldb] (Begin to) support discontinuous lldb_private::Functions (#115730)
This is the beginning of a different, more fundamental approach to
handling. This PR tries to tries to minimize functional changes. It only
makes sure that we store the true set of ranges inside the function
object, so that subsequent patches can make use of it.
Commit: ad26835b2c7e3c9b6244faf943db6948d2f1661b
https://github.com/llvm/llvm-project/commit/ad26835b2c7e3c9b6244faf943db6948d2f1661b
Author: Kamil Kashapov <kashapov at ispras.ru>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[nfc][msan] Move VarArgGenericHelper
Part of #109284
Commit: 58ca7078ce188af21ea5f924573cb00bdb63cbb6
https://github.com/llvm/llvm-project/commit/58ca7078ce188af21ea5f924573cb00bdb63cbb6
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/ADCE/blocks-with-dead-term-nondeterministic.ll
M llvm/test/Transforms/ADCE/broken-loop-info.ll
M llvm/test/Transforms/AlignmentFromAssumptions/amdgpu-crash.ll
M llvm/test/Transforms/AlignmentFromAssumptions/start-unk.ll
M llvm/test/Transforms/Attributor/IPConstantProp/fp-bc-icmp-const-fold.ll
M llvm/test/Transforms/BDCE/order.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-instructions-before-call.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-no-or-structure.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-no-splitting.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-split-or-phi.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-split-preserve-debug.ll
M llvm/test/Transforms/CodeExtractor/LoopExtractor_infinite.ll
M llvm/test/Transforms/CodeExtractor/extract-assume.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#115688)
This PR aims to remove undefined behavior from tests.
Commit: 6ade03d79d537cd194360015c7bca1463104d84a
https://github.com/llvm/llvm-project/commit/6ade03d79d537cd194360015c7bca1463104d84a
Author: Lukas Sommer <lukas.sommer at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
A mlir/test/Conversion/SPIRVToLLVM/group-ops-to-llvm.mlir
A mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir
Log Message:
-----------
[mlir][spirv] Add spirv-to-llvm conversion for group operations (#115501)
Lowering for some of the uniform and non-uniform group operations
defined in section 3.52.21 of the SPIR-V specification from SPIR-V
dialect to LLVM dialect.
Similar to #111864, lower the operations to builtin functions understood
by SPIR-V tools.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at codeplay.com>
Commit: 0e52a0721ef91238bfb2141cbd9c72b830839139
https://github.com/llvm/llvm-project/commit/0e52a0721ef91238bfb2141cbd9c72b830839139
Author: Jake Egan <jake.egan at ibm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrSPE.td
M llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
M llvm/test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll
M llvm/test/MC/PowerPC/ppc64-errors.s
Log Message:
-----------
Revert "[PowerPC] Add error for incorrect use of memory operands (#114277)"
This commit broke a test on a couple bots
lld :: ELF/ppc64-local-exec-tls.s
This reverts commit 93589057830b2c3c35500ee8cac25c717a1e98f9.
Commit: 3183b3aad130ac6754f294046c008a85b9925894
https://github.com/llvm/llvm-project/commit/3183b3aad130ac6754f294046c008a85b9925894
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Interpreter/Interpreter.h
A clang/include/clang/Interpreter/RemoteJITUtils.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
A clang/lib/Interpreter/RemoteJITUtils.cpp
A clang/test/Interpreter/out-of-process.cpp
M clang/tools/clang-repl/CMakeLists.txt
M clang/tools/clang-repl/ClangRepl.cpp
Log Message:
-----------
[Clang-Repl] Add support for out-of-process execution. (#110418)
This PR introduces out-of-process (OOP) execution support for
Clang-Repl. With this enhancement, two new flags, `oop-executor` and
`oop-executor-connect`, are added to the Clang-Repl interface. These
flags enable the launch of an external executor
(`llvm-jitlink-executor`), which handles code execution in a separate
process.
Commit: 88ad44ec43bdaba5185a0227ec81eb15bd0f7c5a
https://github.com/llvm/llvm-project/commit/88ad44ec43bdaba5185a0227ec81eb15bd0f7c5a
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/GVN/2011-04-27-phioperands.ll
M llvm/test/Transforms/GVN/2012-05-22-PreCrash.ll
M llvm/test/Transforms/GVN/PRE/phi-translate-2.ll
M llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll
M llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
M llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll
M llvm/test/Transforms/GVN/crash.ll
M llvm/test/Transforms/GVN/equality-assume.ll
M llvm/test/Transforms/GVN/pre-new-inst.ll
M llvm/test/Transforms/GVN/stale-loop-info.ll
M llvm/test/Transforms/GVN/unreachable_block_infinite_loop.ll
M llvm/test/Transforms/GVNHoist/hoist-call.ll
M llvm/test/Transforms/GVNHoist/hoist-mssa.ll
M llvm/test/Transforms/GVNHoist/hoist-simplify-phi.ll
M llvm/test/Transforms/GVNHoist/hoist-very-busy.ll
M llvm/test/Transforms/GVNHoist/non-trivial-phi.ll
M llvm/test/Transforms/GVNHoist/pr30216.ll
M llvm/test/Transforms/GVNHoist/pr36787.ll
M llvm/test/Transforms/GVNSink/dither.ll
M llvm/test/Transforms/GVNSink/sink-common-code.ll
M llvm/test/Transforms/GVNSink/struct.ll
M llvm/test/Transforms/GuardWidening/basic.ll
M llvm/test/Transforms/GuardWidening/basic_widenable_condition_guards.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#115817)
This PR removes tests with `br i1 undef` under `llvm/tests/G*`.
There were a few tests that I couldn't fix to pass lit. I'll come back
and fix those later.
Commit: 6d23ac1aa250e05b1c6781922da584fe9908b537
https://github.com/llvm/llvm-project/commit/6d23ac1aa250e05b1c6781922da584fe9908b537
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/HowToUpdateDebugInfo.rst
Log Message:
-----------
[DebugInfo] Update policy for when to merge locations (#115349)
Following discussions on PR #114231 this patch changes the policy on
merging locations, making the rule that new instructions should use a
merge of the locations of all the instructions whose output is produced
by the new instructions; in the case where only one instruction's output
is produced, as in most InstCombine optimizations, we use only that
instruction's location.
Commit: 99a3c3ffcf0a4164ead8a65d44bdcbd583769b9f
https://github.com/llvm/llvm-project/commit/99a3c3ffcf0a4164ead8a65d44bdcbd583769b9f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
[InstCombine][GitHub] Auto-add llvm:instcombine label (NFC) (#115736)
Add `llvm:instcombine` label to PRs touching InstCombine or
InstSimplify. (We track InstSimplify issues under `llvm:instcombine` as
well, so I added it here as well.)
Commit: 36f21eedcfd06ff97ead9625adbf6d8153edd233
https://github.com/llvm/llvm-project/commit/36f21eedcfd06ff97ead9625adbf6d8153edd233
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/cmp-alloca-offsets.ll
Log Message:
-----------
[InstSimplify] Fix alloca alignments in test (NFC)
These zero-sized types should be 1-aligned, but we seem to
default to 8-aligned.
Commit: e385e0d3e71e17da0b2023f480259c95923707bd
https://github.com/llvm/llvm-project/commit/e385e0d3e71e17da0b2023f480259c95923707bd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ModulesBuilder.h
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] [Modules] Support Reusable Modules Builder (#106683)
This is the following patch of
https://github.com/llvm/llvm-project/pull/66462 to optimize its
performance.
# Motivation
To avoid data races, we choose "per file owns its dependent modules"
model. That said, every TU will own all the required module files so
that we don't need to worry about thread safety. And it looks like we
succeeded that we focus on the interfaces and structure of modules
support in clangd. But after all, this model is not good for
performance. Image we have 10000 TUs import std, we will have 10000
std.pcm in the memory. That is terrible both in time and space.
Given the current modules support in clangd works pretty well (almost
every issue report I received is more or less a clang's issue), I'd like
to improve the performance.
# High Level Changes
After this patch, the built module files will be owned by the module
builder and each TU will only have a reference to the built module
files.
The module builder have a map from module names to built module files.
When a new TU ask for a module file, the module builder will check if
the module file lives in the map and if the module file are up to date.
If yes, the module file will be returned. If no, the module file entry
would be erased in the module builder. We use `shared_ptr<>` to track
module file here so that the other TU owning the out dated module file
won't be affected. The out dated module file will be removed
automatically if other TU gets update or closed.
(I know the out dated module file may not exist due to the `CanReuse`
mechanism. But the design here is natural and can be seen as a redundant
design to make it more robust.)
When we a build a module, we will use the mutex and the condition
variable in the working thread to build it exclusively. All other
threads that also want the module file would have to wait for that
working thread. It might not sounds great but I think if we want to make
it asynchronous, we have to refactor TUScheduler as far as I know.
# Code Structure Changes
Thanks for the previous hard working reviewing, the interfaces almost
don't change in this patch. Almost all the work are isolated in
ModulesBuilder.cpp. A outliner is that we convert `ModulesBuilder` to an
abstract class since the implementation class needs to own the module
files.
And the core function to review is
`ReusableModulesBuilder::getOrBuildModuleFile`. It implements the core
logic to fetch the module file from the cache or build it if the module
file is not in the cache or out of date. And other important entities
are `BuildingModuleMutexes`, `BuildingModuleCVs`, `BuildingModules` and
`ModulesBuildingMutex`. These are mutexes and condition variables to
make sure the thread safety.
# User experience
I've implemented this in our downstream and ask our users to use it. I
also sent it https://github.com/ChuanqiXu9/clangd-for-modules here as
pre-version. The feedbacks are pretty good. And I didn't receive any bug
reports (about the reusable modules builder) yet.
# Other potential improvement
The are other two potential improvements can be done:
1. Scanning cache and a mechanism to get the required module information
more quickly. (Like the module maps in
https://github.com/ChuanqiXu9/clangd-for-modules)
2. Persist the module files. So that after we close the vscode and
reopen it, we can reuse the built module files since the last
invocation.
Commit: 41e3919ded78d8870f7c95e9181c7f7e29aa3cc4
https://github.com/llvm/llvm-project/commit/41e3919ded78d8870f7c95e9181c7f7e29aa3cc4
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
A clang/docs/WarningSuppressionMappings.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/Warnings.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Interpreter/CodeCompletion.cpp
M clang/lib/Serialization/ASTReader.cpp
A clang/test/Misc/Inputs/suppression-mapping.txt
A clang/test/Misc/warning-suppression-mappings-pragmas.cpp
A clang/test/Misc/warning-suppression-mappings.cpp
M clang/tools/driver/cc1gen_reproducer_main.cpp
M clang/tools/driver/driver.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M llvm/include/llvm/Support/SpecialCaseList.h
Log Message:
-----------
[clang] Introduce diagnostics suppression mappings (#112517)
This implements
https://discourse.llvm.org/t/rfc-add-support-for-controlling-diagnostics-severities-at-file-level-granularity-through-command-line/81292.
Users now can suppress warnings for certain headers by providing a
mapping with globs, a sample file looks like:
```
[unused]
src:*
src:*clang/*=emit
```
This will suppress warnings from `-Wunused` group in all files that
aren't under `clang/` directory. This mapping file can be passed to
clang via `--warning-suppression-mappings=foo.txt`.
At a high level, mapping file is stored in DiagnosticOptions and then
processed with rest of the warning flags when creating a
DiagnosticsEngine. This is a functor that uses SpecialCaseLists
underneath to match against globs coming from the mappings file.
This implies processing warning options now performs IO, relevant
interfaces are updated to take in a VFS, falling back to RealFileSystem
when one is not available.
Commit: 01dcc41cb856b6ed095a26315faa47d2ae9ce105
https://github.com/llvm/llvm-project/commit/01dcc41cb856b6ed095a26315faa47d2ae9ce105
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Dominance.h
M mlir/lib/IR/Dominance.cpp
Log Message:
-----------
[mlir][IR][NFC] `DominanceInfo`: Minor code cleanups (#115430)
Remove `properlyDominatesImpl` and implement the functionality in
`properlyDominates` directly.
Commit: 7665d3f0df78b8b58c1adb18d53f36351426da72
https://github.com/llvm/llvm-project/commit/7665d3f0df78b8b58c1adb18d53f36351426da72
Author: David Green <david.green at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
Log Message:
-----------
[ARM] Extra MVE reduction test cases. NFC
Commit: 4213bca8717dbf675558148b7d4186cd3980355d
https://github.com/llvm/llvm-project/commit/4213bca8717dbf675558148b7d4186cd3980355d
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
Log Message:
-----------
[flang][OpenMP] Add alias analysis for omp private (#115155)
Enable alias analysis for omp private clause for code:
```
program main
integer :: arrayA(10,10)
integer :: tmp(2)
integer :: i,j
!$omp target teams distribute parallel do private(tmp)
do j = 1, 10
do i = 1,10
tmp = [i,j]
arrayA = tmp(1)
end do
end do
end program main
```
This PR is based on: https://github.com/llvm/llvm-project/pull/113566
and it contains fix for Fujitsu test suite. Previous PR introduced
regression in Fujitsu test suite. For some Fujitsu test cases
`omp.yield` operation points to block argument. Alias analysis for such
MLIR code will be added in separate PR.
Commit: 5a1f239df55c25d49d6c193ef469606713fc74de
https://github.com/llvm/llvm-project/commit/5a1f239df55c25d49d6c193ef469606713fc74de
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[MISched] Add a hook to override PostRA scheduling policy (#115455)
PostRA scheduling supports different directions now, but we can
only specify it via command line options.
This patch adds a new hook `overridePostRASchedPolicy` for targets
to override PostRA scheduling policy.
Note that some options like tracking register pressure won't take
effect in PostRA scheduling.
Commit: 3ce0dbb718c9df123fd1cb87623aa31b3376fb61
https://github.com/llvm/llvm-project/commit/3ce0dbb718c9df123fd1cb87623aa31b3376fb61
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/docs/resources/build.rst
Log Message:
-----------
[lldb] Recommend Python 3.8 as the minimum Python version for LLDB (#114807)
See
https://discourse.llvm.org/t/rfc-lets-document-and-enforce-a-minimum-python-version-for-lldb/82731
for discussions.
This matches LLVM's requirement to run tests. For LLDB 20 there will be
a CMake warning telling builders that from LLDB 21 this will be a hard
requirement. From LLDB 21, it will be an error to try to build with
anything <= 3.8.
So there are no code changes in this commit. Once the llvm 20 branch is
created we can remove some < 3.8 support code.
As always, if you disable Python support you will not get any new
warnings or errors from this change.
Commit: e65c5428adab477331cf0a57b540e77850807843
https://github.com/llvm/llvm-project/commit/e65c5428adab477331cf0a57b540e77850807843
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/IR/Dominance.h
M mlir/lib/IR/Dominance.cpp
Log Message:
-----------
[mlir][IR] `DominanceInfo`: Deduplicate `properlyDominates` implementation (#115433)
The implementations of `DominanceInfo::properlyDominates` and
`PostDominanceInfo::properlyPostDominates` are almost identical: only
one line of code is different (apart from the missing `enclosingOpOk`
flag). Define the function in `DominanceInfoBase` to avoid the code
duplication.
Also rename the helper in `DominanceInfoBase` to
`properlyDominatesImpl`.
Note: This commit is not marked as NFC because
`PostDominanceInfo::properlyPostDominates` now also has an
`enclosingOpOk` argument.
Depends on #115430.
Commit: 3c585bdd3c53538b092ec36d81b038e43f605325
https://github.com/llvm/llvm-project/commit/3c585bdd3c53538b092ec36d81b038e43f605325
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/test/HLFIR/opt-bufferization.fir
Log Message:
-----------
[flang] Allow `VariableAssignBufferization` to handle `hlfir::ExprType` (#115136)
Given the following input:
```fortran
1. subroutine ComputeDifferencesKernel
2. implicit none
3. integer :: i
4. integer, dimension(1) :: a
5.
6. do i = 1, 10
7. a = [ i ]
8. end do
9. end subroutine ComputeDifferencesKernel
```
Currently, the assignment in line 7 ends up as a call to the Fortran
runtime function: `AAssign` since the corresponding `hlfir.assign` is
not optimized away by `VariableAssignBufferization`. The reason this
assignment is not optimized away is that `VariableAssignBufferization`
does not match whenever the RHS of the assignment is a `hlfir.expr`
value. However, this behavior is introduced only to prevent clashes
between `VariableAssignBufferization` and `ElementalAssignBufferization`
which optimizes away assignemnts that result from `hlfir.elemental` ops.
This patch relaxes that restriction by checking whether the RHS of an
`hlfir.assign` is the result of `hlfir.elemental` or not. If not, we can
safely proceed with `VariableAssignBufferization`.
Note that in the above example, we won't get a `hlfir.elemental` in the
IR. We would get if we changed line 7 to something like:
```fortran
7. a = [ i ] + b
```
In which case, `ElementalAssignBufferization` will kick in instead.
Commit: 512208b498d27e885cd9164bed516eeb910a4933
https://github.com/llvm/llvm-project/commit/512208b498d27e885cd9164bed516eeb910a4933
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl-ins-gr2vr.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-repl-ins-gr2vr.ll
Log Message:
-----------
[LoongArch] Optimize vreplgr2vr + vinsgr2vr intrinsic sequence (#115803)
Inspired by https://github.com/llvm/llvm-project/issues/101624.
Commit: ebb3508899c3e1773884cf5bc1b1df6f32450ca9
https://github.com/llvm/llvm-project/commit/ebb3508899c3e1773884cf5bc1b1df6f32450ca9
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Interpreter/Interpreter.h
R clang/include/clang/Interpreter/RemoteJITUtils.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
R clang/lib/Interpreter/RemoteJITUtils.cpp
R clang/test/Interpreter/out-of-process.cpp
M clang/tools/clang-repl/CMakeLists.txt
M clang/tools/clang-repl/ClangRepl.cpp
Log Message:
-----------
Revert "[Clang-Repl] Add support for out-of-process execution." (#115854)
Reverts llvm/llvm-project#110418
Buildbot encountered a failure.
Commit: 5dd9867e2d1e698fee980e31da114a37e4c7f612
https://github.com/llvm/llvm-project/commit/5dd9867e2d1e698fee980e31da114a37e4c7f612
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/utils/lit/lit/cl_arguments.py
Log Message:
-----------
[llvm][llvm-lit] Hide --use-unique-output-file-name from --help (#114812)
I was too hasty landing an option whose only known use at this time is
LLVM's own CI.
We may be able to remove it before the next branch that would be the
next llvm-lit release outside of llvm, but the timing may not work out.
So I am hiding the option in case that were to happen.
Commit: 7c04da12f0b45c88f3cc56d3803b484d54781e24
https://github.com/llvm/llvm-project/commit/7c04da12f0b45c88f3cc56d3803b484d54781e24
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/HowToAddABuilder.rst
Log Message:
-----------
[llvm][docs] Add terminology note to Buildbot docs (#115856)
Choosing another term for this one document would only create confusion,
and vendoring Buildbot to change it is a lot of work (as explained in
the linked Buildbot issue).
Commit: e723b10266756eceb79612f28fdd025475795822
https://github.com/llvm/llvm-project/commit/e723b10266756eceb79612f28fdd025475795822
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang][NFC] add release note for n3030 support (#115648)
Follow-up to #107260
CC @Fznamznon @AaronBallman
Commit: 40c75426a9af601ba94762ad10317800a6b25ca4
https://github.com/llvm/llvm-project/commit/40c75426a9af601ba94762ad10317800a6b25ca4
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/preserve-load-metadata.ll
Log Message:
-----------
[SimplifyCFG] Add test for updating llvm.access.group when hoisting.
Add extra test coverage for preserving llvm.access.group metadata when
hoisting.
Commit: 24c2c74bd29d4d550974f8249cbf8fdf1d033bfd
https://github.com/llvm/llvm-project/commit/24c2c74bd29d4d550974f8249cbf8fdf1d033bfd
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][Tensor] Retain discardable attrs in pack(cast) folder (#115772)
Commit: 1b63f47e900d5459912e4f8ee7aa16a372bdf519
https://github.com/llvm/llvm-project/commit/1b63f47e900d5459912e4f8ee7aa16a372bdf519
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/lib/Headers/amxfp8intrin.h
A clang/test/CodeGen/X86/amx_fp8_api.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86RegisterInfo.cpp
A llvm/test/CodeGen/X86/amx-fp8-internal.ll
Log Message:
-----------
[X86][AMX] Add AMX FP8 new APIs (#115829)
This is a follow-up to #113850.
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: f539d92dcabb4fd114d6cb1774e914e03adb0cc5
https://github.com/llvm/llvm-project/commit/f539d92dcabb4fd114d6cb1774e914e03adb0cc5
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[ci] Write test results to unique file names (#113160)
In this patch I'm using a new lit option so that the pipeline writes
many results files, one for each time lit is run:
```
--use-unique-output-file-name
When enabled, lit will add a unique element to the output file name, before the extension. For example "results.xml" will become "results.<something>.xml". The
"<something>" is not ordered in any way and is chosen so that existing files are not overwritten. [Default: Off]
```
(I added this to lit recently)
Alternatives were considered:
* mkfifo - does not work on bash for Windows.
* tail -f - does not print full content on file truncation
* lit wrapper script - more complication than using an option to lit
itself
* ninja/mv file/ninja/mv file etc - lots of changes needed to make the
scripts build each target separately
And after feedback I decided that using an option to lit itself is the
cleanest way to go. It can be removed when we no longer need it.
If I run the Linux build after this change:
```
$ bash ./.ci/monolithic-linux.sh "clang;lldb;lld" "check-lldb-shell check-lld" "libcxx;libcxxabi" "check-libcxx check-libcxxabi"
```
I get multiple test result files. In my case some tests fail so runtimes
aren't checked, but all projects are so there is 1 file for lldb and one
for lld:
```
$ ls build/*.xml
build/test-results.klc82utf.xml build/test-results.majylh73.xml
```
This change just collects the XML files as artifacts. Once I know that's
working, I can set up test reporting to make a summary of them.
Commit: e74a002433b4cf7f891ceedb61bd862867218a8b
https://github.com/llvm/llvm-project/commit/e74a002433b4cf7f891ceedb61bd862867218a8b
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
A .ci/generate_test_report.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
A .ci/requirements.txt
Log Message:
-----------
[ci] New script to generate test reports as Buildkite Annotations (#113447)
The CI builds now send the results of every lit run to a unique file.
This means we can read them all to make a combined report for all
tests.
This report will be shown as an "annotation" in the build results:
https://buildkite.com/docs/agent/v3/cli-annotate#creating-an-annotation
Here is an example:
https://buildkite.com/llvm-project/github-pull-requests/builds/112660
(make sure it is showing "All" instead of "Failures")
This is an alternative to using the existing Buildkite plugin:
https://github.com/buildkite-plugins/junit-annotate-buildkite-plugin
As the plugin is:
* Specific to Buildkite, and we may move away from Buildkite.
* Requires docker, unless we were to fork it ourselves.
* Does not let you customise the report format unless again,
we make our own fork.
Annotations use GitHub's flavour of Markdown so the main code in the
script generates that text. There is an extra "style" argument generated
to make the formatting nicer in Buildkite.
"context" is the name of the annotation that will be created. By using
different context names for Linux and Windows results we get 2 separate
annotations.
The script also handles calling the buildkite-agent. This makes passing
extra arguments to the agent easier, rather than piping the output of
this script into the agent.
In the future we can remove the agent part of it and simply use
the report content. Either printed to stdout or as a comment on
the GitHub PR.
Commit: 9652c1cc098fb2b237f0d4c91f3b3414f7afdbe1
https://github.com/llvm/llvm-project/commit/9652c1cc098fb2b237f0d4c91f3b3414f7afdbe1
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP] Use iterator_range/range-for for FindClauses, NFC (#115749)
Implement a thin wrapper `GetClauses` that returns llvm::iterator_range
made from the pair of iterators returned by FindClauses. This enables
the use of range-for, which in turn makes the code a little more
readable.
Commit: e05d91b30e1fe2ed9a90911de2b959395d0318c8
https://github.com/llvm/llvm-project/commit/e05d91b30e1fe2ed9a90911de2b959395d0318c8
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
Log Message:
-----------
[analyzer][NFC] Make RegionStore dumps deterministic (#115615)
Dump the memory space clusters before the other clusters, in
alphabetical order. Then default bindings over direct bindings, and if
any has symbolic offset, then those should come before the ones with
concrete offsets.
In theory, we should either have a symbolic offset OR concrete offsets,
but never both at the same time.
Needed for #114835
Commit: c3c2e1e161b4f11a2070966453067584223427de
https://github.com/llvm/llvm-project/commit/c3c2e1e161b4f11a2070966453067584223427de
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
Log Message:
-----------
[AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (#114406)
For partial reductions in the situation of the number of elements
being halved, a pair of wide add instructions can be used.
Commit: 6d8d9fc8d279623cca94b2b875a92517ed308f18
https://github.com/llvm/llvm-project/commit/6d8d9fc8d279623cca94b2b875a92517ed308f18
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Add test for icmp of pointers with known bits (NFC)
Commit: e3c958a9a4e47b97d8740dec182b946c50152616
https://github.com/llvm/llvm-project/commit/e3c958a9a4e47b97d8740dec182b946c50152616
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/include/__chrono/duration.h
M libcxx/include/ratio
Log Message:
-----------
[libc++] Replace template structs with template variables in <ratio> (#115782)
This avoids a bit of boilerplate.
Commit: 1c9467f148c36fbf89e4b73ad0743041bd0de470
https://github.com/llvm/llvm-project/commit/1c9467f148c36fbf89e4b73ad0743041bd0de470
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M compiler-rt/lib/builtins/trunctfbf2.c
Log Message:
-----------
compiler-rt/lib: Fix newline at eof
Commit: 3793decaaaf8bc4f7748e8e3c7f8073a80b677e7
https://github.com/llvm/llvm-project/commit/3793decaaaf8bc4f7748e8e3c7f8073a80b677e7
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] port 28e4aad45a64
Commit: 12e3ed8de8c6063b15916b3faf67c8c9cd17df1f
https://github.com/llvm/llvm-project/commit/12e3ed8de8c6063b15916b3faf67c8c9cd17df1f
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/Basic/DiagnosticIDs.cpp
Log Message:
-----------
[clang] Avoid possibly expensive SM call when suppression-mappings are off
Commit: 71d4f343f52756ca086d02151662e68633a0db52
https://github.com/llvm/llvm-project/commit/71d4f343f52756ca086d02151662e68633a0db52
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics-library.cpp
Log Message:
-----------
[flang] Use libm routine for compile-time folding on AIX (#114106)
On AIX, the implementation of `std::sqrt` is different from that of
`csqrtf`, it leads to different results in compile-time folding and
runtime evaluation. This patch is to make the routine calls using
the same implementation.
Commit: eea8b44aaa3464f52dea1d56ca47e0519b08fd36
https://github.com/llvm/llvm-project/commit/eea8b44aaa3464f52dea1d56ca47e0519b08fd36
Author: macurtis-amd <macurtis at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/intersect-empty-attr.ll
Log Message:
-----------
[GVN] Handle empty attrs in Expression == (#115761)
Commit: bf483ddb42065405e345393e022dc72357ec5a3a
https://github.com/llvm/llvm-project/commit/bf483ddb42065405e345393e022dc72357ec5a3a
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
A llvm/test/DebugInfo/MIR/X86/dbg-prologue-backup-loc2.mir
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
A llvm/test/DebugInfo/X86/dbg-prolog-end-backup-loc.ll
M llvm/test/DebugInfo/X86/dbg-prolog-end.ll
M llvm/test/DebugInfo/X86/empty-line-info.ll
M llvm/test/DebugInfo/X86/loop-align-debug.ll
Log Message:
-----------
[DWARF] Emit a worst-case prologue_end flag for pathological inputs (#107849)
prologue_end usually indicates where the end of the function-initialization
lies, and is where debuggers usually choose to put the initial breakpoint
for a function. Our current algorithm piggy-backs it on the first available
source-location: which doesn't necessarily have anything to do with the
start of the function.
To avoid this in heavily-optimised code that lacks many useful source
locations, pick a worst-case "if all else fails" prologue_end location, of
the first instruction that appears to do meaningful computation. It'll be
given the function-scope line number, which should run-on from the start of
the function anyway. This means if your code is completely inverted by the
optimiser, you can at least put a breakpoint at the _start_ like you
expect, even if it's difficult to then step through.
This patch also attempts to preserve some good behaviour we have without
optimisations -- at O0, if the prologue immediately falls into a loop body
without any computation happening, then prologue_end lands at the start of
that loop. This is desirable; but does mean we need to do more work to
detect and support those situations.
Commit: 88883528fd324bc641e5ef223631974c5de4c738
https://github.com/llvm/llvm-project/commit/88883528fd324bc641e5ef223631974c5de4c738
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
Log Message:
-----------
[NFC] Eliminate use of `lookupLLVMIntrinsicByName` in Coroutines (#114851)
Eliminate use of `lookupLLVMIntrinsicByName` from Coroutines in
preparation of changing it to support a different form of intrinsic name
table generated by intrinsic emitter.
Also eliminate call to `isCoroutineIntrinsicName` from
`declaresAnyIntrinsic` as the list of names traversed is the same list
which `isCoroutineIntrinsicName` checks.
Commit: 9a9af0a23fc910694b6a806b7ce9cb2e7e4240ef
https://github.com/llvm/llvm-project/commit/9a9af0a23fc910694b6a806b7ce9cb2e7e4240ef
Author: Shaw Young <58664393+shawbyoung at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Profile/ProfileYAMLMapping.h
M bolt/include/bolt/Profile/YAMLProfileReader.h
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
A bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
A bolt/test/X86/match-blocks-with-pseudo-probes.test
M bolt/test/X86/match-functions-with-calls-as-anchors.test
M bolt/test/X86/reader-stale-yaml.test
Log Message:
-----------
[BOLT] Match blocks with pseudo probes (#99891)
Match inline trees first between profile and the binary: by GUID,
checksum, parent, and inline site for inlined functions. Map profile
probes to binary probes via matched inline tree nodes. Each binary probe
has an associated binary basic block. If all probes from one profile
basic block map to the same binary basic block, it’s an exact match,
otherwise the block is determined by majority vote and reported as loose
match.
Pseudo probe matching happens between exact hash matching and call/loose
matching.
Introduce ProbeMatchSpec - a mechanism to match probes belonging to
another binary function. For example, given functions foo and bar:
```
void foo() {
bar();
}
```
profiled binary: bar is not inlined => have top-level function bar
new binary where the profile is applied to: bar is inlined into foo.
Currently, BOLT does 1:1 matching between profile functions and binary
functions based on the name. #100446 will extend this to N:M where
multiple profiles can be matched to one binary function (as in the
example above where binary function foo would use profiles for foo and
bar), and one profile can be matched to multiple binary functions (e.g.
if bar was inlined into multiple functions).
In this diff, ProbeMatchSpecs would only have one BinaryFunctionProfile
(existing name-based matching).
Test Plan: Added match-blocks-with-pseudo-probes.test
Performance test:
- Setup:
- Baseline no-BOLT: Clang with pseudo probes, ThinLTO + CSSPGO
(#79942)
- BOLT fresh: BOLTed Clang using fresh profile,
- BOLT stale (hash): BOLTed Clang using stale profile (collected on
Clang 10K commits back), `-infer-stale-profile` (hash+call block
matching)
- BOLT stale (+probe): BOLTed Clang using stale profile,
`-infer-stale-profile` with `-stale-matching-with-pseudo-probes`
(hash+call+pseudo probe block matching)
- 2S Intel SKX Xeon 6138 with 40C/80T and 256GB RAM, using 20C/40T for
build,
- BOLT profiles are collected on Clang compiling large preprocessed
C++ file.
- Benchmark: building Clang (average of 5 runs), see driver in
aaupov/llvm-devmtg-2022
- Results, wall time, lower is better:
- Baseline no-BOLT: 429.52 +- 2.61s,
- BOLT stale (hash): 413.21 +- 2.19s,
- BOLT stale (+probe): 409.69 +- 1.41s,
- BOLT fresh: 384.50 +- 1.80s.
---------
Co-authored-by: Amir Ayupov <aaupov at fb.com>
Commit: 469520ed9acc1308a492d03cf859703054a61730
https://github.com/llvm/llvm-project/commit/469520ed9acc1308a492d03cf859703054a61730
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
Log Message:
-----------
Revert "[analyzer][NFC] Make RegionStore dumps deterministic" (#115881)
Reverts llvm/llvm-project#115615
There are two problems with this PR:
1) If any of the dumps contains a store with a symbolic binding, we
crash.
2) The memory space clusters come last among the clusters, which is not
what I intended.
I'm reverting because of the crash.
Commit: 44076c9822bd80f11228474f98789eaafe4285b0
https://github.com/llvm/llvm-project/commit/44076c9822bd80f11228474f98789eaafe4285b0
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/test/CodeGen/AArch64/ptrauth-call.ll
M llvm/test/CodeGen/AArch64/ptrauth-ret-trap.ll
A llvm/test/CodeGen/AArch64/ptrauth-tail-call-regalloc.ll
M llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
Log Message:
-----------
[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)
Move the emission of the checks performed on the authenticated LR value
during tail calls to AArch64AsmPrinter class, so that different checker
sequences can be reused by pseudo instructions expanded there.
This adds one more option to AuthCheckMethod enumeration, the generic
XPAC variant which is not restricted to checking the LR register.
Commit: 6fe7ad8be35d054f3ba8437979b01b0aba3abd0e
https://github.com/llvm/llvm-project/commit/6fe7ad8be35d054f3ba8437979b01b0aba3abd0e
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
Log Message:
-----------
[mlir][vector][nfc] Add tests + update docs for narrow-type emulation (#115460)
The documentation for narrow-type emulation was sparse, so I’ve expanded
it with additional clarifications (e.g., specifying that the example
discusses `i4` -> `i8` emulation).
I also noticed some inconsistencies in testing for narrow-type
emulation, with several cases covered only for "loading" and missing for
"storing." To address this, I’ve:
* Added comments in the test file for easier reference,
* Added the missing tests for `vector.maskedstore`.
Additionally, I’ve renamed tests for `vector.masked{load|store}` for
clarity:
* `@vector_cst_maskedload_i8` -> `@vector_maskedload_i8_constant_mask`.
This makes it easier to contrast with similar functions, such as
`@vector_maskedload_i8`.
Lastly, I’ve added a high-level comment in VectorEmulateNarrowType.cpp
to clarify the overall design and intent of the file.
Commit: 99f44c8fed5b538ab37c4227d9059a65450b68de
https://github.com/llvm/llvm-project/commit/99f44c8fed5b538ab37c4227d9059a65450b68de
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libcxx/docs/Status/Cxx17Papers.csv
Log Message:
-----------
[libc++] update comment for P0067R5 (#113239)
Fix review comment from #91651 that was not addressed.
Commit: 3cc852ece438a63e7b09d1c84a81d21598454e1a
https://github.com/llvm/llvm-project/commit/3cc852ece438a63e7b09d1c84a81d21598454e1a
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/aarch64-targetattr.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/Preprocessor/aarch64-target-features.c
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
Log Message:
-----------
[FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (#113281)
Currently we maintain a hand written list of subtarget features which we
are implied for a given FMV feature. It is more robust to expand such
dependencies using ExtensionDependency from TargetParser, since that is
generated by tablegen. For this to work each FMV feature must have a
corresponding SubtargetFeature in place. FMV features which didn't
satisfy this criteria have been removed from the ACLE specification
(https://github.com/ARM-software/acle/pull/315). However, I deliberately
marked the ArchExtKind in FMVInfo structure as std::optional in case we
decide to break this rule in the future.
I have also added the missing dependencies:
* FEAT_DPB2 -> FEAT_DPB
* FEAT_FlagM2 -> FEAT_FlagM
Commit: 0d2ef7af1956b463b87a09500bd87bd4147616d4
https://github.com/llvm/llvm-project/commit/0d2ef7af1956b463b87a09500bd87bd4147616d4
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libclc/generic/lib/gen_convert.py
Log Message:
-----------
[libclc] Use builtin_convertvector to convert between vector types (#115865)
This keeps values in vectors, rather than scalarizing them and then
reconstituting the vector. The builtin is identical to performing a
C-style cast on each element, which is what we were doing by recursively
splitting the vector down to calling the "base" conversion function on
each element.
Commit: 7302c8dbe71b7c03b73a35a21fa4b415fa1f4505
https://github.com/llvm/llvm-project/commit/7302c8dbe71b7c03b73a35a21fa4b415fa1f4505
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/big_int.h
M libc/src/__support/float_to_string.h
M libc/src/__support/integer_literals.h
M libc/src/__support/str_to_float.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/str_to_long_double_test.cpp
M libc/test/src/math/smoke/CanonicalizeTest.h
M libc/test/src/stdlib/strtold_test.cpp
Log Message:
-----------
[libc][i386] FPBit support for 96b long double (#115084)
`long double` is haunted on most architectures, but it is especially so on
i386-linux-gnu. While have 80b of significant data, on i386-linux-gnu this type
has 96b of storage.
Fixes for supporting printf family of conversions for `long double` on
i386-linux-gnu. This allows the libc-stdlib-tests and libc_stdio_unittests
ninja target tests to pass on i386-linux-gnu.
Fixes: #110894
Link: #93709
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 6256f4b807e0637784c0bea948488adfe87cee5b
https://github.com/llvm/llvm-project/commit/6256f4b807e0637784c0bea948488adfe87cee5b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
R llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
A llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[CostModel][RISCV] Rename misleadingly named test file
RVV intrinsics are the C intrinsic API; this file actually contains tests
for the vp.* family of intrinsics.
Commit: fe18ab983d08b9e1726314009d677517d9cd5935
https://github.com/llvm/llvm-project/commit/fe18ab983d08b9e1726314009d677517d9cd5935
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
A llvm/test/DebugInfo/X86/is_stmt-at-block-start.ll
Log Message:
-----------
[DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (#108251)
This patch follows on from the changes made in #105524, by adding an
additional heuristic that prevents us from applying the start-of-MBB
is_stmt flag when we can see that, for all direct branches to the MBB,
the last line stepped on before the branch is the same as the first line
of the MBB. This is mainly to prevent certain pathological cases, such
as macros that expand to multiple basic blocks that all have the same
source location, from giving us repeated steps on the same line. This
approach is not comprehensive, since it relies on analyzeBranch to read
edges, but the default fallback of applying is_stmt may lead only to
useless steps in some cases, rather than skipping useful steps
altogether.
Commit: a55248789ed3f653740e0723d016203b9d585f26
https://github.com/llvm/llvm-project/commit/a55248789ed3f653740e0723d016203b9d585f26
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libclc/generic/lib/math/clc_remquo.cl
Log Message:
-----------
[libclc] Avoid using undefined vector3 components (#115857)
Using '.hi' on a vector3 is technically allowed by the spec and is
treated as a 4-element vector with an "undefined" w component. However,
it's more undef/poison code for the compiler to process and remove. We
can easily avoid it with a dedicated macro.
Commit: 8a1ca6cad9cd0e972c322910cdfbbe9552c6c7ca
https://github.com/llvm/llvm-project/commit/8a1ca6cad9cd0e972c322910cdfbbe9552c6c7ca
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
R .ci/generate_test_report.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
R .ci/requirements.txt
Log Message:
-----------
Revert "[ci] New script to generate test reports as Buildkite Annotations (#113447)"
This reverts commit e74a002433b4cf7f891ceedb61bd862867218a8b.
As it is failing on Linux with "OSError: [Errno 7] Argument list too long: 'buildkite-agent'".
Commit: 63fb980d50c2ab513dd046f93983bab93dee787f
https://github.com/llvm/llvm-project/commit/63fb980d50c2ab513dd046f93983bab93dee787f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/IR/Instructions.cpp
Log Message:
-----------
[IR] Add helper for comparing KnownBits with IR predicate (NFC) (#115878)
Add `ICmpInst::compare()` overload accepting `KnownBits`, similar to the
existing one accepting `APInt`. This is not directly part of KnownBits
(or APInt) for layering reasons.
Commit: 47ef3a0951e1f285caef4aff289b12ed0a57137d
https://github.com/llvm/llvm-project/commit/47ef3a0951e1f285caef4aff289b12ed0a57137d
Author: Greg Roth <grroth at microsoft.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
Log Message:
-----------
[DirectX] Eliminate resource global variables from module (#114105)
By giving these intrinsics their appropriate attributes, loads of
globals that are stored on the other side of these calls can be
eliminated by the EarlyCSE pass. Stores to the same globals and the
globals themselves require more direct intervention as part of the
create/annotated handle lowering.
Adds a test that verifies that the unneeded globals and their uses can
be eliminated and also that the attributes are set properly.
Fixes #104271
Commit: 20c4e95b9c03a77c2e5ce5f354114752d380c591
https://github.com/llvm/llvm-project/commit/20c4e95b9c03a77c2e5ce5f354114752d380c591
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/test/Shell/Commands/command-disassemble-mixed.c
M lldb/test/Shell/Commands/command-expr-diagnostics.test
M lldb/test/Shell/Commands/command-target-create-resolve-exe.test
M lldb/test/Shell/Expr/TestAnonNamespaceParamFunc.cpp
M lldb/test/Shell/Expr/TestIRMemoryMapWindows.test
M lldb/test/Shell/Process/Windows/exception_access_violation.cpp
M lldb/test/Shell/Process/Windows/process_load.cpp
M lldb/test/Shell/SymbolFile/DWARF/packed.cpp
M lldb/test/Shell/SymbolFile/NativePDB/local-variables.cpp
M lldb/test/Shell/SymbolFile/NativePDB/stack_unwinding01.cpp
M lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
M lldb/test/Shell/SymbolFile/PDB/class-layout.test
M lldb/test/Shell/SymbolFile/PDB/compilands.test
M lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
M lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
M lldb/test/Shell/SymbolFile/PDB/pointers.test
M lldb/test/Shell/SymbolFile/PDB/type-quals.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
M lldb/test/Shell/SymbolFile/PDB/variables-locations.test
M lldb/test/Shell/SymbolFile/PDB/vbases.test
M lldb/test/Shell/Target/dependent-modules-nodupe-windows.test
M lldb/test/Shell/lit.cfg.py
Log Message:
-----------
[lldb][test] Fix remote Shell tests failures on Windows host (#115716)
Since the remote Shell test execution feature was added, these tests
should now be disabled on Windows target instead of Windows host.
It should fix failures on
https://lab.llvm.org/staging/#/builders/197/builds/76.
Commit: ccddb6ffad1277c53d07de7d52a1b3c247084638
https://github.com/llvm/llvm-project/commit/ccddb6ffad1277c53d07de7d52a1b3c247084638
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
R llvm/test/DebugInfo/MIR/X86/dbg-prologue-backup-loc2.mir
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
R llvm/test/DebugInfo/X86/dbg-prolog-end-backup-loc.ll
M llvm/test/DebugInfo/X86/dbg-prolog-end.ll
M llvm/test/DebugInfo/X86/empty-line-info.ll
M llvm/test/DebugInfo/X86/loop-align-debug.ll
Log Message:
-----------
Revert "[DWARF] Emit a worst-case prologue_end flag for pathological inputs (#107849)"
This reverts commit bf483ddb42065405e345393e022dc72357ec5a3a.
See PR, there's a test testing for this behaviour (possibly adaptable), and
a duplicate line entry too
Commit: faaf2dbf6d2c080d817c4dfe9f888e456418bc2e
https://github.com/llvm/llvm-project/commit/faaf2dbf6d2c080d817c4dfe9f888e456418bc2e
Author: John Harrison <harjohn at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactoring JSONUtils to not use `g_dap` and instead passing in required arguments. (#115561)
This is part of a larger refactor to remove the global `g_dap` variable.
Commit: 5a094241de42867c35611b0eec6f3e19d8718c22
https://github.com/llvm/llvm-project/commit/5a094241de42867c35611b0eec6f3e19d8718c22
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Clarify RISC-V v? constraints
Pull Request: https://github.com/llvm/llvm-project/pull/115820
Commit: c3c3ccc364578c1897780974f685a44bdeec1584
https://github.com/llvm/llvm-project/commit/c3c3ccc364578c1897780974f685a44bdeec1584
Author: lialan <alan.li at me.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
Log Message:
-----------
[MLIR] support dynamic indexing of `vector.maskedload` in `VectorEmulateNarrowTypes` (#115070)
Based on existing emulating scheme, this patch expands to support
dynamic indexing by dynamically create intermediate new mask, new pass
thru vector and dynamically insert the result into destination vector.
the dynamic parts are constructed by multiple `vector.extract` and
`vector.insert` to rearrange the original mask/passthru vector, as
`vector.insert_strided_slice` and `vector.extract_strided_slice` only
take static offsets and indices.
Note: currently only supporting `vector.maskedload` with masks created
by `vector.constant_mask`. `vector.create_mask` is currently not
working.
---------
Co-authored-by: hasekawa-takumi <167335845+hasekawa-takumi at users.noreply.github.com>
Commit: 584d1a632f3af0daca4db02f7f3b2c7f48ab0ddf
https://github.com/llvm/llvm-project/commit/584d1a632f3af0daca4db02f7f3b2c7f48ab0ddf
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc] Create aliases with custom_command (#115885)
This in conjunction with a custom target prevents them from being
rebuilt if there are no changes.
Commit: 207e5ccceec8d3cc3f32723e78f2a142bc61b07d
https://github.com/llvm/llvm-project/commit/207e5ccceec8d3cc3f32723e78f2a142bc61b07d
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
A clang/test/CodeGen/AArch64/ABI-align-packed-assembly.c
A clang/test/CodeGen/AArch64/ABI-align-packed.c
A clang/test/CodeGen/AArch64/args-hfa.c
A clang/test/CodeGen/AArch64/args.cpp
A clang/test/CodeGen/AArch64/arguments-hfa-v3.c
A clang/test/CodeGen/AArch64/attr-mode-complex.c
A clang/test/CodeGen/AArch64/attr-mode-float.c
A clang/test/CodeGen/AArch64/bf16-dotprod-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-lane-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-ldst-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
A clang/test/CodeGen/AArch64/branch-protection-attr.c
A clang/test/CodeGen/AArch64/byval-temp.c
A clang/test/CodeGen/AArch64/cpu-supports-target.c
A clang/test/CodeGen/AArch64/cpu-supports.c
A clang/test/CodeGen/AArch64/debug-sve-vector-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx2-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx3-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx4-types.c
A clang/test/CodeGen/AArch64/debug-types.c
A clang/test/CodeGen/AArch64/elf-pauthabi.c
A clang/test/CodeGen/AArch64/fix-cortex-a53-835769.c
A clang/test/CodeGen/AArch64/fmv-dependencies.c
A clang/test/CodeGen/AArch64/fmv-resolver-emission.c
A clang/test/CodeGen/AArch64/fmv-streaming.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_scale.c
A clang/test/CodeGen/AArch64/fpm-helpers.c
A clang/test/CodeGen/AArch64/gcs.c
A clang/test/CodeGen/AArch64/inline-asm.c
A clang/test/CodeGen/AArch64/inlineasm-ios.c
A clang/test/CodeGen/AArch64/ls64-inline-asm.c
A clang/test/CodeGen/AArch64/ls64.c
A clang/test/CodeGen/AArch64/matmul.cpp
A clang/test/CodeGen/AArch64/mixed-target-attributes.c
A clang/test/CodeGen/AArch64/mops.c
A clang/test/CodeGen/AArch64/neon-2velem.c
A clang/test/CodeGen/AArch64/neon-3v.c
A clang/test/CodeGen/AArch64/neon-across.c
A clang/test/CodeGen/AArch64/neon-dot-product.c
A clang/test/CodeGen/AArch64/neon-extract.c
A clang/test/CodeGen/AArch64/neon-faminmax-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fcvt-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fma.c
A clang/test/CodeGen/AArch64/neon-fp16fml.c
A clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_fscale.c
A clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/neon-intrinsics.c
A clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
A clang/test/CodeGen/AArch64/neon-ldst-one.c
A clang/test/CodeGen/AArch64/neon-luti.c
A clang/test/CodeGen/AArch64/neon-misc-constrained.c
A clang/test/CodeGen/AArch64/neon-misc.c
A clang/test/CodeGen/AArch64/neon-perm.c
A clang/test/CodeGen/AArch64/neon-range-checks.c
A clang/test/CodeGen/AArch64/neon-scalar-copy.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
A clang/test/CodeGen/AArch64/neon-sha3.c
A clang/test/CodeGen/AArch64/neon-shifts.c
A clang/test/CodeGen/AArch64/neon-sm4-sm3.c
A clang/test/CodeGen/AArch64/neon-tbl.c
A clang/test/CodeGen/AArch64/neon-vcadd.c
A clang/test/CodeGen/AArch64/neon-vcmla.c
A clang/test/CodeGen/AArch64/neon-vcombine.c
A clang/test/CodeGen/AArch64/neon-vget-hilo.c
A clang/test/CodeGen/AArch64/neon-vget.c
A clang/test/CodeGen/AArch64/neon-vsqadd-float-conversion.c
A clang/test/CodeGen/AArch64/neon-vuqadd-float-conversion-warning.c
A clang/test/CodeGen/AArch64/poly-add.c
A clang/test/CodeGen/AArch64/poly128.c
A clang/test/CodeGen/AArch64/poly64.c
A clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
A clang/test/CodeGen/AArch64/pure-scalable-args.c
A clang/test/CodeGen/AArch64/sign-return-address.c
A clang/test/CodeGen/AArch64/sme-inline-streaming-attrs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/aarch64-sme-attrs.cpp
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_cnt.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_read.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_builtin.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_write.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_zero.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/aarch64-sme2-attrs.cpp
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add_sub_za16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_bmop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_clamp.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtn.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_faminmax.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fmlas16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_frint.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_int_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_max.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_maxnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_min.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_minnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mla.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlal.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlall.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mls.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlsl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mopa_nonwide.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_read.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sqdmulh.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sub.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vdot.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_qrshr.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_rshl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_zero_zt.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_movaz.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_zero.c
A clang/test/CodeGen/AArch64/soft-float-abi-errors.c
A clang/test/CodeGen/AArch64/soft-float-abi.c
A clang/test/CodeGen/AArch64/strictfp-builtins.c
A clang/test/CodeGen/AArch64/subarch-compatbility.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
A clang/test/CodeGen/AArch64/sve-inline-asm-crash.c
A clang/test/CodeGen/AArch64/sve-inline-asm-datatypes.c
A clang/test/CodeGen/AArch64/sve-inline-asm-negative-test.c
A clang/test/CodeGen/AArch64/sve-inline-asm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/README
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abs.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acle.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_aclt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_add.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adda.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_addv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_and.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_andv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bic.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brka.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpeq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmple.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmplt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpne.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpuo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_compact.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvtnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_div.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_divr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq_const.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eorv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_expa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_exth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_index.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp32.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_max.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_min.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mov.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_msb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nand.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_neg.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmsb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_not.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfalse.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfirst.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pnext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptest.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptrue.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdech.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qinch.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qsub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rbit.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rdffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpe.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recps.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinti.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrte.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrts.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_scale.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_setffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sqrt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_subr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sudot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tsmul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tssel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpkhi.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpklo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_usdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilele.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilelt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_wrffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2.c
A clang/test/CodeGen/AArch64/sve-vector-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
A clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vector-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vector-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vector-subscript-ops.c
A clang/test/CodeGen/AArch64/sve-vls-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vls-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vls-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vls-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vls-subscript-ops.c
A clang/test/CodeGen/AArch64/sve.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aba.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adalp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bcax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bdep.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bext.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bgrp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl1n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl2n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cdot.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cmla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtxnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eor3.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eorbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eortb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_faminmax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histcnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histseg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_logb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_luti.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_match.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mls.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nbsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nmatch.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qabs.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qcadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qneg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdcmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlsh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshlu.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rax1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_recpe.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rhadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsqrte.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sli.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4e.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4ekey.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sri.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subltb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_uqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilege.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilegt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_xar.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfadd.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmax.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmin.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfminnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfsub.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_cntp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_int_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pext.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pfalse.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ptrue.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qcvtn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qrshr.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_sclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_undef_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_pn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_x2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
A clang/test/CodeGen/AArch64/svepcs.c
A clang/test/CodeGen/AArch64/sysregs-target.c
A clang/test/CodeGen/AArch64/targetattr-arch.c
A clang/test/CodeGen/AArch64/targetattr-crypto.c
A clang/test/CodeGen/AArch64/targetattr.c
A clang/test/CodeGen/AArch64/tme.cpp
A clang/test/CodeGen/AArch64/type-sizes.c
A clang/test/CodeGen/AArch64/v8.1a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.5a-scalar-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.6a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/varargs-ms.c
A clang/test/CodeGen/AArch64/varargs-sve.c
A clang/test/CodeGen/AArch64/varargs.c
A clang/test/CodeGen/AArch64/vpcs.c
R clang/test/CodeGen/aarch64-ABI-align-packed-assembly.c
R clang/test/CodeGen/aarch64-ABI-align-packed.c
R clang/test/CodeGen/aarch64-args-hfa.c
R clang/test/CodeGen/aarch64-args.cpp
R clang/test/CodeGen/aarch64-arguments-hfa-v3.c
R clang/test/CodeGen/aarch64-attr-mode-complex.c
R clang/test/CodeGen/aarch64-attr-mode-float.c
R clang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-reinterpret-intrinsics.c
R clang/test/CodeGen/aarch64-branch-protection-attr.c
R clang/test/CodeGen/aarch64-byval-temp.c
R clang/test/CodeGen/aarch64-cpu-supports-target.c
R clang/test/CodeGen/aarch64-cpu-supports.c
R clang/test/CodeGen/aarch64-debug-sve-vector-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx2-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx3-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx4-types.c
R clang/test/CodeGen/aarch64-debug-types.c
R clang/test/CodeGen/aarch64-elf-pauthabi.c
R clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
R clang/test/CodeGen/aarch64-fmv-dependencies.c
R clang/test/CodeGen/aarch64-fmv-resolver-emission.c
R clang/test/CodeGen/aarch64-fmv-streaming.c
R clang/test/CodeGen/aarch64-fp8-intrinsics/acle_sme2_fp8_scale.c
R clang/test/CodeGen/aarch64-fpm-helpers.c
R clang/test/CodeGen/aarch64-gcs.c
R clang/test/CodeGen/aarch64-inline-asm.c
R clang/test/CodeGen/aarch64-inlineasm-ios.c
R clang/test/CodeGen/aarch64-ls64-inline-asm.c
R clang/test/CodeGen/aarch64-ls64.c
R clang/test/CodeGen/aarch64-matmul.cpp
R clang/test/CodeGen/aarch64-mixed-target-attributes.c
R clang/test/CodeGen/aarch64-mops.c
R clang/test/CodeGen/aarch64-neon-2velem.c
R clang/test/CodeGen/aarch64-neon-3v.c
R clang/test/CodeGen/aarch64-neon-across.c
R clang/test/CodeGen/aarch64-neon-dot-product.c
R clang/test/CodeGen/aarch64-neon-extract.c
R clang/test/CodeGen/aarch64-neon-faminmax-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fma.c
R clang/test/CodeGen/aarch64-neon-fp16fml.c
R clang/test/CodeGen/aarch64-neon-fp8-intrinsics/acle_neon_fscale.c
R clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-neon-intrinsics.c
R clang/test/CodeGen/aarch64-neon-ldst-one-rcpc3.c
R clang/test/CodeGen/aarch64-neon-ldst-one.c
R clang/test/CodeGen/aarch64-neon-luti.c
R clang/test/CodeGen/aarch64-neon-misc-constrained.c
R clang/test/CodeGen/aarch64-neon-misc.c
R clang/test/CodeGen/aarch64-neon-perm.c
R clang/test/CodeGen/aarch64-neon-range-checks.c
R clang/test/CodeGen/aarch64-neon-scalar-copy.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem-constrained.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
R clang/test/CodeGen/aarch64-neon-sha3.c
R clang/test/CodeGen/aarch64-neon-shifts.c
R clang/test/CodeGen/aarch64-neon-sm4-sm3.c
R clang/test/CodeGen/aarch64-neon-tbl.c
R clang/test/CodeGen/aarch64-neon-vcadd.c
R clang/test/CodeGen/aarch64-neon-vcmla.c
R clang/test/CodeGen/aarch64-neon-vcombine.c
R clang/test/CodeGen/aarch64-neon-vget-hilo.c
R clang/test/CodeGen/aarch64-neon-vget.c
R clang/test/CodeGen/aarch64-neon-vsqadd-float-conversion.c
R clang/test/CodeGen/aarch64-neon-vuqadd-float-conversion-warning.c
R clang/test/CodeGen/aarch64-poly-add.c
R clang/test/CodeGen/aarch64-poly128.c
R clang/test/CodeGen/aarch64-poly64.c
R clang/test/CodeGen/aarch64-pure-scalable-args-empty-union.c
R clang/test/CodeGen/aarch64-pure-scalable-args.c
R clang/test/CodeGen/aarch64-sign-return-address.c
R clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_builtin.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/aarch64-sme2-attrs.cpp
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_faminmax.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_frint.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_max.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_maxnm.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_min.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_minnm.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sqdmulh.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sub.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_add.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_rshl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_zero_zt.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_movaz.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
R clang/test/CodeGen/aarch64-soft-float-abi-errors.c
R clang/test/CodeGen/aarch64-soft-float-abi.c
R clang/test/CodeGen/aarch64-strictfp-builtins.c
R clang/test/CodeGen/aarch64-subarch-compatbility.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
R clang/test/CodeGen/aarch64-sve-inline-asm-crash.c
R clang/test/CodeGen/aarch64-sve-inline-asm-datatypes.c
R clang/test/CodeGen/aarch64-sve-inline-asm-negative-test.c
R clang/test/CodeGen/aarch64-sve-inline-asm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/README
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq_const.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c
R clang/test/CodeGen/aarch64-sve-vector-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vector-bits-codegen.c
R clang/test/CodeGen/aarch64-sve-vector-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vector-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vector-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vector-subscript-ops.c
R clang/test/CodeGen/aarch64-sve-vls-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vls-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vls-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vls-subscript-ops.c
R clang/test/CodeGen/aarch64-sve.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_faminmax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_luti.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dupq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_int_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ldnt1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_loads.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ptrue.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qrshr.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_store.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tblq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tbxq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_undef_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_x2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq2.c
R clang/test/CodeGen/aarch64-svepcs.c
R clang/test/CodeGen/aarch64-sysregs-target.c
R clang/test/CodeGen/aarch64-targetattr-arch.c
R clang/test/CodeGen/aarch64-targetattr-crypto.c
R clang/test/CodeGen/aarch64-targetattr.c
R clang/test/CodeGen/aarch64-tme.cpp
R clang/test/CodeGen/aarch64-type-sizes.c
R clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.5a-neon-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.5a-scalar-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.6a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-varargs-ms.c
R clang/test/CodeGen/aarch64-varargs-sve.c
R clang/test/CodeGen/aarch64-varargs.c
R clang/test/CodeGen/aarch64-vpcs.c
Log Message:
-----------
[test] Move CodeGen/aarch64-* into the AArch64 subfolder
Similar to other targets (AMDGPU, Mips, PowerPC, RISCV, X86, ...)
`ninja check-clang-codegen-aarch64` can be used to test this subfolder.
Pull Request: https://github.com/llvm/llvm-project/pull/115818
Commit: 7387338007e51ba8f85922d87ff18731d6f78365
https://github.com/llvm/llvm-project/commit/7387338007e51ba8f85922d87ff18731d6f78365
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libclc/clc/include/clc/geometric/clc_dot.h
M libclc/clc/include/clc/shared/clc_clamp.h
M libclc/clc/include/clc/shared/clc_max.h
M libclc/clc/include/clc/shared/clc_min.h
Log Message:
-----------
[libclc] Add some include guards to CLC declarations. NFC
Commit: 39351f8e46e3e42b945ed686537f182b4c313289
https://github.com/llvm/llvm-project/commit/39351f8e46e3e42b945ed686537f182b4c313289
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
A clang/test/SemaOpenACC/combined-construct-ast.cpp
A clang/test/SemaOpenACC/combined-construct.cpp
M clang/test/SemaOpenACC/compute-construct-ast.cpp
M clang/test/SemaOpenACC/compute-construct-default-clause.c
M clang/test/SemaOpenACC/compute-construct-if-clause.c
M clang/test/SemaOpenACC/no-branch-in-out.c
M clang/test/SemaOpenACC/no-branch-in-out.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[OpenACC] Implement AST/Sema for combined constructs
Combined constructs (OpenACC 3.3 section 2.11) are a short-cut for
writing a `loop` construct immediately inside of a `compute` construct.
However, this interaction requires we do additional work to ensure that
we get the semantics between the two correct, as well as diagnostics.
This patch adds the semantic analysis for the constructs (but no
clauses), as well as the AST nodes.
Commit: 5f140ba54794fe6ca379362b133eb27780e363d7
https://github.com/llvm/llvm-project/commit/5f140ba54794fe6ca379362b133eb27780e363d7
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
R clang/docs/WarningSuppressionMappings.rst
M clang/docs/index.rst
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/Warnings.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Interpreter/CodeCompletion.cpp
M clang/lib/Serialization/ASTReader.cpp
R clang/test/Misc/Inputs/suppression-mapping.txt
R clang/test/Misc/warning-suppression-mappings-pragmas.cpp
R clang/test/Misc/warning-suppression-mappings.cpp
M clang/tools/driver/cc1gen_reproducer_main.cpp
M clang/tools/driver/driver.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M llvm/include/llvm/Support/SpecialCaseList.h
Log Message:
-----------
Revert "[clang] Introduce diagnostics suppression mappings (#112517)"
This reverts commit 12e3ed8de8c6063b15916b3faf67c8c9cd17df1f.
This reverts commit 41e3919ded78d8870f7c95e9181c7f7e29aa3cc4.
There are some buildbot breakages in
https://lab.llvm.org/buildbot/#/builders/18/builds/6832.
Commit: 6d91d7ce6aeb46d948a5a476909825b71b0c84a2
https://github.com/llvm/llvm-project/commit/6d91d7ce6aeb46d948a5a476909825b71b0c84a2
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/branch-relaxation-rv32.ll
A llvm/test/CodeGen/RISCV/branch-relaxation-rv64.ll
R llvm/test/CodeGen/RISCV/branch-relaxation.ll
Log Message:
-----------
[RISCV][NFC] Split branch-relaxation test
This change splits the llvm/test/CodeGen/RISCV/branch-relaxation.ll test
which contained comments saying that different test functions were valid
or not on rv32/rv64. Not only was this confusing, but the inline
assembly in the test was being passed values wider than xlen on rv32.
Commit: 06e08696248ac01754c87c22cc8a4b797ef46430
https://github.com/llvm/llvm-project/commit/06e08696248ac01754c87c22cc8a4b797ef46430
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Profile/YAMLProfileWriter.cpp
Log Message:
-----------
[BOLT] Fix warnings
This patch fixes:
bolt/lib/Profile/StaleProfileMatching.cpp:694:24: error: unused
variable 'BinHash' [-Werror,-Wunused-variable]
bolt/lib/Profile/YAMLProfileWriter.cpp:206:61: error: missing field
'GUID' initializer [-Werror,-Wmissing-field-initializers]
bolt/lib/Profile/YAMLProfileReader.cpp:840:16: error: unused
variable 'MatchedWithPseudoProbes' [-Werror,-Wunused-variable]
Commit: 2c6424e691e32f79bc303203deb1c91634d62286
https://github.com/llvm/llvm-project/commit/2c6424e691e32f79bc303203deb1c91634d62286
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Ignore trivial functions and [[clang::noescape]]. (#114897)
This PR makes webkit.UncountedLambdaCapturesChecker ignore trivial
functions as well as the one being passed to an argument with
[[clang::noescape]] attribute. This dramatically reduces the false
positive rate for this checker.
To do this, this PR replaces VisitLambdaExpr in favor of checking
lambdas via VisitDeclRefExpr and VisitCallExpr. The idea is that if a
lambda is defined but never called or stored somewhere, then capturing
whatever variable in such a lambda is harmless.
VisitCallExpr explicitly looks for direct invocation of lambdas and
registers its DeclRefExpr to be ignored in VisitDeclRefExpr. If a lambda
is being passed to a function, it checks whether its argument is
annotated with [[clang::noescape]]. If it's not annotated such, it
checks captures for their safety.
Because WTF::switchOn could not be annotated with [[clang::noescape]] as
function type parameters are variadic template function so we hard-code
this function into the checker.
In order to check whether "this" pointer is ref-counted type or not, we
override TraverseDecl and record the most recent method's declaration.
In addition, this PR fixes a bug in isUnsafePtr that it was erroneously
checking whether std::nullopt was returned by isUncounted and
isUnchecked as opposed to the actual boolean value.
Finally, this PR also converts the accompanying test to use -verify and
adds a bunch of tests.
Commit: 789de766b5fc9c8ffa6e808a8baf0e585ac2e818
https://github.com/llvm/llvm-project/commit/789de766b5fc9c8ffa6e808a8baf0e585ac2e818
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Object/ELF.cpp
Log Message:
-----------
[NFC,SHT_LLVM_BB_ADDR_MAP] Fix undefined behaviour in ELF.cpp. (#115830)
`BBEntries` is defined outside of the loop and is used after move which
is undefined behavior.
Commit: b8d6659bff25458693c99a7c53372afcf6d66d7d
https://github.com/llvm/llvm-project/commit/b8d6659bff25458693c99a7c53372afcf6d66d7d
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
A llvm/test/CodeGen/AArch64/block-placement-optimize-branches.ll
M llvm/test/CodeGen/X86/conditional-tailcall.ll
Log Message:
-----------
[CodeLayout] Do not flip branch condition when using optsize (#114607)
* Do not use profile data when flipping a branch condition when
optimizing for size. This should improving outlining and ICF due to more
uniform instruction sequences.
* Refactor `optimizeBranches()` to use early `continue`s
* Use the correct debug location for `insertBranch()`
Commit: 57c33acac8c74eb071ede35d819918d8bd00e45b
https://github.com/llvm/llvm-project/commit/57c33acac8c74eb071ede35d819918d8bd00e45b
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/test/CodeGen/X86/sink-blockfreq.ll
Log Message:
-----------
[MachineSink] Sink into consistent blocks for optsize funcs (#115367)
Do not consider profile data when choosing a successor block to sink
into for optsize functions. This should result in more consistent
instruction sequences which will improve outlining and ICF. We've
observed a slight codesize improvement in a large binary. This is
similar reasoning to https://github.com/llvm/llvm-project/pull/114607.
Using profile data to select a block to sink into was original added in
https://github.com/llvm/llvm-project/commit/d04f7596e79d7c5cf7e4249ad62690afaecd01ec.
Commit: ae7392bf5c5d4c34c901ba4f472282206e68bf7b
https://github.com/llvm/llvm-project/commit/ae7392bf5c5d4c34c901ba4f472282206e68bf7b
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
A clang/test/Analysis/store-dump-orders.cpp
Log Message:
-----------
Reapply "[analyzer][NFC] Make RegionStore dumps deterministic" (#115884)
This is reapplies #115615 without using tuples. The eager call of
`getRegion()` and `getOffset()` could cause crashes when the Store had
symbolic bindings.
Here I'm fixing the crash by lazily calling those getters.
Also, the tuple version poorly sorted the Clusters. The memory spaces
should have come before the regular clusters.
Now, that is also fixed here, demonstrated by the test.
Commit: 1791b25f43f4e6a0b21284ce8076cfab160cb61a
https://github.com/llvm/llvm-project/commit/1791b25f43f4e6a0b21284ce8076cfab160cb61a
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
Log Message:
-----------
[clang][CIR] Change buildX functions to emitX (#115568)
The buildX naming convention originated when the CIRGen implementation
was planned to be substantially different from original CodeGen. CIRGen
is now a much closer adaption of CodeGen, and the emitX to buildX
renaming just makes things more confusing, since CodeGen also has some
helper functions whose names start with build or Build, so it's not
immediately clear which CodeGen function corresponds to a CIRGen buildX
function. Rename the buildX functions back to emitX to fix this.
Commit: 2b5b57c5cf78af66b5b9f514c4b51b4adc9a80df
https://github.com/llvm/llvm-project/commit/2b5b57c5cf78af66b5b9f514c4b51b4adc9a80df
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
Log Message:
-----------
[AMDGPU] Skip non-wwm reg implicit-def from bb prolog (#115834)
Currently all implicit-def instructions are part of
bb prolog. We should only include the wwm-register's
implicit definitions into the BB prolog. The other
vector class registers' implicit defs when exist at
the bb top might cause interference when pushed the
LR_split copy insertion downwards. The SplitKit is
very strict on altering the insertion points and will
assert such instances.
Commit: 3431d133ccfa75d16964be455238e2a1da0c2004
https://github.com/llvm/llvm-project/commit/3431d133ccfa75d16964be455238e2a1da0c2004
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[RISCV][TTI] Implement instruction cost for vp.reduce.* #114184
The VP variants simply return the same costs as the non-VP variants.
This assumes that reductions are VL predicated, and that VL predication
has no additional cost.
Commit: 853d52b8384951167214f81066e316d78f389c28
https://github.com/llvm/llvm-project/commit/853d52b8384951167214f81066e316d78f389c28
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Support derived type in cuf.data_transfer conversion (#115557)
Support derived type in `cuf.data_transfer` conversion by computing
their size in bytes.
Commit: dfb864a735da9153ab8a4bb107d4b01ac81ee364
https://github.com/llvm/llvm-project/commit/dfb864a735da9153ab8a4bb107d4b01ac81ee364
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[TableGen] Use heterogenous lookups with std::map (NFC) (#115810)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
This patch introduces alias:
using DiagsInGroup = std::map<std::string, GroupInfo, std::less<>>;
because the raw type is a bit mouthful.
Commit: c784d321d90a3609caeacfb525b7ccadd41a5195
https://github.com/llvm/llvm-project/commit/c784d321d90a3609caeacfb525b7ccadd41a5195
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[ThinLTO] Use heterogenous lookups with std::map (NFC) (#115812)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: 4048c64306e23b622443bbe7293057a9b07a13bb
https://github.com/llvm/llvm-project/commit/4048c64306e23b622443bbe7293057a9b07a13bb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/utils/TableGen/Common/GlobalISel/PatternParser.cpp
Log Message:
-----------
[llvm] Remove redundant control flow statements (NFC) (#115831)
Identified with readability-redundant-control-flow.
Commit: a93cbd4e762799206ae6e6c45f4a7d0da7e56513
https://github.com/llvm/llvm-project/commit/a93cbd4e762799206ae6e6c45f4a7d0da7e56513
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[SPIRV] Audit `select` Result in SPIRVInstructionSelector (#115193)
- as per the definition of `select` in GlobalISel/InstructionSelector.h
the return value is a boolean denoting if the select was successful
- doing `Result |=` is incorrect as all inserted instructions should be
succesful, hence we change to using `Result &=`
- ensure that the return value of all BuildMI instructions are
propagated correctly
Commit: 13ced90b007fdab3d0ecbe032ead2650d3e7717e
https://github.com/llvm/llvm-project/commit/13ced90b007fdab3d0ecbe032ead2650d3e7717e
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
M libc/include/llvm-libc-types/stdfix-types.h
Log Message:
-----------
[libc] {u}lkbits broken on riscv32 (#115799)
- Re-enabled ulkbits and lkbits for Risc-V
- Bumped `int_lk_t` to a `signed long long` and a `uint_ulk_t` to an
`unsigned long long` to guarantee they both fit in 8 bytes, which `long
_Accum` and `unsigned long _Accum` are defaulted to on 32bit
architectures.
This is probably inconvenient on systems that have a word size larger
than 64 bits?
#115778
Commit: c284326755b446c811d2bf0ee5f461b493ebf920
https://github.com/llvm/llvm-project/commit/c284326755b446c811d2bf0ee5f461b493ebf920
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/test/src/__support/CMakeLists.txt
Log Message:
-----------
[libc] Disable block test on AMDGPU as well
Summary:
Recently started failing on AMDGPU as well, will disable until I can
bisect it.
Commit: aaa37d6755e635bbd62ba58896acd54ceef64610
https://github.com/llvm/llvm-project/commit/aaa37d6755e635bbd62ba58896acd54ceef64610
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/Target/PowerPC/CMakeLists.txt
M llvm/lib/Target/PowerPC/PPC.h
R llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-used-with-stringpool.ll
M llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll
M llvm/test/CodeGen/PowerPC/expand-contiguous-isel.ll
M llvm/test/CodeGen/PowerPC/licm-remat.ll
M llvm/test/CodeGen/PowerPC/merge-private.ll
R llvm/test/CodeGen/PowerPC/merge-string-used-by-metadata.mir
M llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
R llvm/test/CodeGen/PowerPC/mergeable-string-pool-pass-only.mir
M llvm/test/CodeGen/PowerPC/mergeable-string-pool-pr92991.ll
M llvm/test/CodeGen/PowerPC/mergeable-string-pool-tls.ll
M llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll
M llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
M llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
Log Message:
-----------
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
Enable merging all constants without looking at use in GlobalMerge by
default to replace PPCMergeStringPool pass on Linux.
Commit: ba572abeb4fa698d04222877d10d1c547b6c2c01
https://github.com/llvm/llvm-project/commit/ba572abeb4fa698d04222877d10d1c547b6c2c01
Author: Steven Perron <stevenperron at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/HlslBufferLoad.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
M llvm/test/CodeGen/SPIRV/read_image.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll
Log Message:
-----------
[SPIRV] Add reads from image buffer for shaders. (#115178)
This commit adds an intrinsic that will read from an image buffer. We
chose to match the name of the DXIL intrinsic for simplicity in clang.
We cannot reuse the existing openCL readimage function because that is
not a reserved name in HLSL.
I considered trying to refactor generateReadImageInst, so that we could
share code between the two implementations. However, most of the code in
generateReadImageInst is concerned with trying to figure out which type
of image read is being done. Once we factor out the code that will be
common, then we end up with just a single call to the MIRBuilder being
common.
Commit: e458434ebe87f890db0d4a03bbc3de30f3d052b9
https://github.com/llvm/llvm-project/commit/e458434ebe87f890db0d4a03bbc3de30f3d052b9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
A mlir/test/Dialect/Vector/emulate-narrow-type-unsupported.mlir
M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
Log Message:
-----------
[mlir][vector] Restrict narrow-type-emulation patterns (#115612)
All patterns in populateVectorNarrowTypeEmulationPatterns currently
assume a 1-D vector load/store rather than an n-D vector load/store.
This assumption is evident in ConvertVectorTransferRead, for example,
here (extracted from `ConvertVectorTransferRead`):
```cpp
auto newRead = rewriter.create<vector::TransferReadOp>(
loc, VectorType::get(numElements, newElementType), adaptor.getSource(),
getValueOrCreateConstantIndexOp(rewriter, loc, linearizedIndices),
newPadding);
auto bitCast = rewriter.create<vector::BitCastOp>(
loc, VectorType::get(numElements * scale, oldElementType), newRead);
```
Both invocations of `VectorType::get()` here generate a 1-D vector.
Attempts to use these patterns with more generic cases, such as 2-D
vectors, fail. For example, trying to cast the following 2-D case to
`i32`:
```mlir
func.func @vector_maskedload_2d_i8_negative(
%idx1: index,
%idx2: index,
%num_elems: index,
%passthru: vector<2x4xi8>) -> vector<2x4xi8> {
%0 = memref.alloc() : memref<3x4xi8>
%mask = vector.create_mask %num_elems, %num_elems : vector<2x4xi1>
%1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru :
memref<3x4xi8>, vector<2x4xi1>, vector<2x4xi8> into vector<2x4xi8>
return %1 : vector<2x4xi8>
}
```
For example, casting to i32 produces:
```bash
error: 'vector.bitcast' op failed to verify that all of {source, result} have same rank
%1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru :
^
```
Instead of reworking these patterns (that's going to require much more
effort), I’ve marked them as 1-D only and extended
"TestEmulateNarrowTypePass" with an option to disable the Memref type
converter - that's to be able to add negative tests (otherwise, the type
converter throws an error we can't really test for). While not ideal,
this workaround should suit a test pass.
Commit: 7ebfbf9c87941315d7c9ca84d1b22acf2a5bd14d
https://github.com/llvm/llvm-project/commit/7ebfbf9c87941315d7c9ca84d1b22acf2a5bd14d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/test/Dialect/Linalg/generalize-tensor-pack-tile.mlir
M mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
Log Message:
-----------
[mlir][tensor] Update `GeneralizeOuterUnitDimsPackOpPattern` (#115312)
Avoid generating spurious tensor.extract_slice, follow-on for #114315.
This is best to demonstrate with an example. Here's input for
`GeneralizeOuterUnitDimsPackOpPattern`:
```mlir
%pack = tensor.pack %input
padding_value(%pad : f32)
inner_dims_pos = [1, 0]
inner_tiles = [2, %tile_dim_1]
into %output : tensor<5x1xf32> -> tensor<1x1x2x?xf32>
```
Output _before_:
```mlir
%padded = tensor.pad %arg0 low[0, 0] high[%0, 1] {
^bb0(%arg4: index, %arg5: index):
tensor.yield %arg2 : f32
} : tensor<5x1xf32> to tensor<?x2xf32>
// NOTE: skipped in the output _after_
%extracted_slice = tensor.extract_slice
%padded[0, 0] [%arg3, 2] [1, 1] :
tensor<?x2xf32> to tensor<?x2xf32>
%empty = tensor.empty(%arg3) : tensor<2x?xf32>
%transposed = linalg.transpose
ins(%extracted_slice : tensor<?x2xf32>)
outs(%empty : tensor<2x?xf32>)
permutation = [1, 0]
%inserted_slice = tensor.insert_slice %transposed=
into %arg1[0, 0, 0, 0] [1, 1, 2, %arg3] [1, 1, 1, 1] :
tensor<2x?xf32> into tensor<1x1x2x?xf32>
```
Output _after_:
```mlir
%padded = tensor.pad %arg0 low[0, 0] high[%0, 1] {
^bb0(%arg4: index, %arg5: index):
tensor.yield %arg2 : f32
} : tensor<5x1xf32> to tensor<?x2xf32>
%empty = tensor.empty(%arg3) : tensor<2x?xf32>
%transposed = linalg.transpose
ins(%padded : tensor<?x2xf32>)
outs(%empty : tensor<2x?xf32>) permutation = [1, 0]
%inserted_slice = tensor.insert_slice %transposed
into %arg1[0, 0, 0, 0] [1, 1, 2, %arg3] [1, 1, 1, 1] :
tensor<2x?xf32> into tensor<1x1x2x?xf32>
```
This PR also adds a check to verify that only the last N trailing
dimensions are tiled (for some value of N). Based on the PR
discussion, this restriction seems reasonable - especially as there
are no in-tree tests requiring otherwise. For now, it also simplifies
the computation of permutations for linalg.transpose. This
restriction can be relaxed in the future if needed.
Commit: f6795e6b4f619cbecc59a92f7e5fad7ca90ece54
https://github.com/llvm/llvm-project/commit/f6795e6b4f619cbecc59a92f7e5fad7ca90ece54
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
Log Message:
-----------
[CodeExtractor] Refactor extractCodeRegion, fix alloca emission. (#114419)
Reorganize the code into phases:
* Analyze/normalize
* Create extracted function prototype
* Generate the new function's implementation
* Generate call to new function
* Connect call to original function's CFG
The motivation is #114669 to optionally clone the selected code region
into the new function instead of moving it. The current structure made
it difficult to add such functionality since there was no obvious place
to do so, not made easier by some functions doing more than their name
suggests. For instance, constructFunction modifies code outside the
constructed function, but also function properties such as
setPersonalityFn are derived somewhere else. Another example is
emitCallAndSwitchStatement, which despite its name also inserts stores
for output parameters.
Many operations also implicitly depend on the order they are applied
which this patch tries to reduce. For instance, ExtractedFuncRetVals
becomes the list exit blocks which also defines the return value when
leaving via that block. It is computed early such that the new
function's return instructions and the switch can be generated
independently. Also, ExtractedFuncRetVals is combining the lists
ExitBlocks and OldTargets which were not always kept consistent with
each other or NumExitBlocks. The method recomputeExitBlocks() will
update it when necessary.
The coding style partially contradict the current coding standard. For
instance some local variable start with lower case letters. I updated
some, but not all occurrences to make the diff match at least some lines
as unchanged.
The patch [D96854](https://reviews.llvm.org/D96854) introduced some
confusion of function argument indexes this is fixed here as well, hence
the patch is not NFC anymore. Tested in modified CodeExtractorTest.cpp.
Patch [D121061](https://reviews.llvm.org/D121061) introduced
AllocationBlock, but not all allocas were inserted there.
Efectively includes the following fixes:
1. https://github.com/llvm/llvm-project/commit/ce73b1672a6053d5974dc2342881aac02efe2dbb
2. https://github.com/llvm/llvm-project/commit/4aaa92578686176243a294eeb2ca5697a99edcaa
3. Missing allocas, still unfixed
Originally submitted as https://reviews.llvm.org/D115218
Commit: 30753afc2a3171e962e261622781852a01fbec72
https://github.com/llvm/llvm-project/commit/30753afc2a3171e962e261622781852a01fbec72
Author: PikachuHy <pikachuhy at linux.alibaba.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
M mlir/test/Dialect/LLVMIR/sroa-intrinsics.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvm] Add support for memset.inline (#115711)
support `llvm.intr.memset.inline` in llvm-project repo before we add
support for `__builtin_memset_inline` in clangir
cc @bcardosolopes
Commit: 3ab5927b971c2cf758c68d36200ef8ec97916034
https://github.com/llvm/llvm-project/commit/3ab5927b971c2cf758c68d36200ef8ec97916034
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/CommentCommands.td
M clang/test/AST/ast-dump-comment.cpp
Log Message:
-----------
[Clang][Comments] Make @relates an inline comment command (#115040)
According to the Doxygen documentation,
the `relates`, `related`, `relatesalso`, and `relatedalso` commands all
have a single argument. This patch changes their classification from
`VerbatimLineCommand` to `InlineCommand` so the argument is correctly
parsed.
Commit: be89e794f782cb252183446967447239f80c8f9d
https://github.com/llvm/llvm-project/commit/be89e794f782cb252183446967447239f80c8f9d
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/VeneerElimination.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/test/AArch64/veneer-lld-abs.s
Log Message:
-----------
[BOLT][AArch64] Add support for long absolute LLD thunks/veneers (#113408)
Absolute thunks generated by LLD reference function addresses recorded
as data in code. Since they are generated by the linker, they don't have
relocations associated with them and thus the addresses are left
undetected. Use pattern matching to detect such thunks and handle them
in VeneerElimination pass.
Commit: d922045381347a9d5c7301bf870ee0482bfdf0d4
https://github.com/llvm/llvm-project/commit/d922045381347a9d5c7301bf870ee0482bfdf0d4
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M bolt/lib/Core/Exceptions.cpp
Log Message:
-----------
[BOLT] Use AsmInfo for address size. NFCI (#115932)
Use AsmInfo instead of DWARFObj interface for extracting address size
and format.
Commit: 70d6789c7a95c87bbe24b61a3fca8272060b290e
https://github.com/llvm/llvm-project/commit/70d6789c7a95c87bbe24b61a3fca8272060b290e
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
Log Message:
-----------
[bazel] Port for 7302c8dbe71b7c03b73a35a21fa4b415fa1f4505
Commit: 5cd6e21bddb882150068ea1c94e7b35c11f515be
https://github.com/llvm/llvm-project/commit/5cd6e21bddb882150068ea1c94e7b35c11f515be
Author: Miguel A. Arroyo <miguel.arroyo at rockstargames.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/LTO.cpp
M lld/COFF/Options.td
M lld/docs/ReleaseNotes.rst
A lld/test/COFF/savetemps-colon.ll
Log Message:
-----------
[LLD][COFF] allow saving intermediate files with /lldsavetemps (#115131)
* Parity with the `-save-temps=` flag in the `ELF` `lld` driver.
Commit: 014455a58762331b8eb7962c60bd64168c49f3b4
https://github.com/llvm/llvm-project/commit/014455a58762331b8eb7962c60bd64168c49f3b4
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/PowerPC/f128-arith.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
A llvm/test/CodeGen/X86/sincos-stack-args.ll
Log Message:
-----------
[SDAG] Limit sincos/frexp stack slot folding to stores chained to entry (#115906)
When the chain is not the entry node there is a risk the stores are
within a (CALLSEQ_START, CALLSEQ_END), which when the node is expanded
will lead to nested call sequences.
It should be possible to check for this and allow more cases, but for
now, let's limit this to cases where it's definitely safe.
Fixes #115323
Commit: 6aa74038588ed47e3fc0d829c1e7538cc110ba39
https://github.com/llvm/llvm-project/commit/6aa74038588ed47e3fc0d829c1e7538cc110ba39
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M libc/test/src/__support/FPUtil/fpbits_test.cpp
Log Message:
-----------
[libc] Fix fpbits test running 80bit ld everywhere (#115937)
After #115084 the 80 bit long double tests error if sizeof(long double)
isn't 96 or 128 bits. This caused failures in long double is double
systems (since long double is 64 bits) so I've disabled the 80 bit long
double tests on systems that don't use them.
Commit: c9b691e920611f3380683105c235c67ac1e6594f
https://github.com/llvm/llvm-project/commit/c9b691e920611f3380683105c235c67ac1e6594f
Author: Florian Mayer <fmayer at google.com>
Date: 2024-11-12 (Tue, 12 Nov 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .github/CODEOWNERS
M .github/new-prs-labeler.yml
M .github/workflows/containers/github-action-ci/stage1.Dockerfile
M .github/workflows/libcxx-build-and-test.yaml
M bolt/include/bolt/Core/BinaryBasicBlock.h
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/DIEBuilder.h
M bolt/include/bolt/Core/FunctionLayout.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Passes/LongJmp.h
M bolt/include/bolt/Profile/BoltAddressTranslation.h
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/include/bolt/Profile/ProfileYAMLMapping.h
M bolt/include/bolt/Profile/YAMLProfileReader.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/DIEBuilder.cpp
M bolt/lib/Core/Exceptions.cpp
M bolt/lib/Core/FunctionLayout.cpp
M bolt/lib/Core/HashUtilities.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/VeneerElimination.cpp
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Profile/YAMLProfileWriter.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
A bolt/test/AArch64/Inputs/spurious-marker-symbol.yaml
A bolt/test/AArch64/compact-code-model.s
A bolt/test/AArch64/split-funcs-lite.s
A bolt/test/AArch64/spurious-marker-symbol.test
A bolt/test/AArch64/veneer-lld-abs.s
A bolt/test/X86/callcont-fallthru.s
A bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
A bolt/test/X86/match-blocks-with-pseudo-probes.test
M bolt/test/X86/match-functions-with-calls-as-anchors.test
M bolt/test/X86/pre-aggregated-perf.test
M bolt/test/X86/reader-stale-yaml.test
M bolt/tools/driver/llvm-bolt.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.cpp
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.h
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/clang-query/QueryParser.cpp
M clang-tools-extra/clang-query/QuerySession.h
M clang-tools-extra/clang-tidy/CMakeLists.txt
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidyModuleRegistry.h
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
M clang-tools-extra/clang-tidy/altera/IdDependentBackwardBranchCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/CrtpConstructorAccessibilityCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.h
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.h
M clang-tools-extra/clang-tidy/bugprone/ThrowKeywordMissingCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/InitVariablesCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeUnionAccessCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStartsEndsWithCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStartsEndsWithCheck.h
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/readability/ContainerContainsCheck.cpp
M clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp
M clang-tools-extra/clang-tidy/readability/FunctionCognitiveComplexityCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ModulesBuilder.h
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/TidyProvider.h
M clang-tools-extra/clangd/URI.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/refactor/Tweak.h
M clang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
M clang-tools-extra/clangd/test/log.test
M clang-tools-extra/clangd/unittests/CallHierarchyTests.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineOutlineTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/nondeterministic-pointer-iteration-order.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/reserved-identifier.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/sizeof-expression.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-starts-ends-with.rst
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/IncludeSpeller.h
M clang-tools-extra/include-cleaner/test/tool.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
M clang-tools-extra/test/clang-query/invalid-command-line.cpp
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/string
M clang-tools-extra/test/clang-tidy/checkers/altera/id-dependent-backward-branch.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_algorithm
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_c++config.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_initializer_list
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_iterator_base
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_map
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_set
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_stl_pair
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_type_traits
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_unordered_map
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_unordered_set
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_vector
M clang-tools-extra/test/clang-tidy/checkers/bugprone/crtp-constructor-accessibility.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/nondeterministic-pointer-iteration-order.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/return-const-ref-from-parameter.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics-no-division.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/throw-keyword-missing.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/init-variables.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-union-access.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-func.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-var.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-starts-ends-with.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/container-contains.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.c
M clang-tools-extra/test/clang-tidy/checkers/readability/function-cognitive-complexity.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.c
M clang-tools-extra/test/clang-tidy/infrastructure/invalid-command-line.cpp
M clang-tools-extra/unittests/clang-tidy/AddConstTest.cpp
M clang/Maintainers.rst
M clang/README.md
M clang/bindings/python/tests/CMakeLists.txt
M clang/bindings/python/tests/cindex/test_access_specifiers.py
M clang/bindings/python/tests/cindex/test_cdb.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/bindings/python/tests/cindex/test_comment.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/bindings/python/tests/cindex/test_cursor_kind.py
M clang/bindings/python/tests/cindex/test_diagnostics.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/bindings/python/tests/cindex/test_exception_specification_kind.py
M clang/bindings/python/tests/cindex/test_file.py
M clang/bindings/python/tests/cindex/test_index.py
M clang/bindings/python/tests/cindex/test_linkage.py
M clang/bindings/python/tests/cindex/test_location.py
M clang/bindings/python/tests/cindex/test_rewrite.py
M clang/bindings/python/tests/cindex/test_source_range.py
M clang/bindings/python/tests/cindex/test_tls_kind.py
M clang/bindings/python/tests/cindex/test_token_kind.py
M clang/bindings/python/tests/cindex/test_tokens.py
M clang/bindings/python/tests/cindex/test_translation_unit.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/bindings/python/tests/cindex/util.py
M clang/cmake/modules/AddClang.cmake
M clang/docs/AMDGPUSupport.rst
M clang/docs/APINotes.rst
M clang/docs/AddressSanitizer.rst
M clang/docs/ClangFormat.rst
M clang/docs/ClangFormatStyleOptions.rst
R clang/docs/ClangFormattedStatus.rst
M clang/docs/ClangLinkerWrapper.rst
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M clang/docs/HIPSupport.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LibASTMatchersReference.html
M clang/docs/OpenMPSupport.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
A clang/docs/SafeBuffers.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/docs/ShadowCallStack.rst
M clang/docs/analyzer/checkers.rst
M clang/docs/analyzer/user-docs.rst
M clang/docs/analyzer/user-docs/CommandLineUsage.rst
A clang/docs/analyzer/user-docs/FAQ.rst
M clang/docs/index.rst
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M clang/examples/Attribute/Attribute.cpp
M clang/include/clang-c/Index.h
M clang/include/clang/APINotes/Types.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/CommentCommands.td
M clang/include/clang/AST/CommentSema.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclFriend.h
M clang/include/clang/AST/DeclObjC.h
M clang/include/clang/AST/DeclOpenMP.h
M clang/include/clang/AST/DeclTemplate.h
A clang/include/clang/AST/DynamicRecursiveASTVisitor.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/ExprConcepts.h
M clang/include/clang/AST/ExternalASTSource.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/include/clang/AST/SYCLKernelInfo.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/StmtOpenMP.h
M clang/include/clang/AST/TemplateArgumentVisitor.h
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/ASTMatchers/ASTMatchersMacros.h
M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
M clang/include/clang/Analysis/AnyCall.h
A clang/include/clang/Analysis/FlowSensitive/CachedConstAccessorsLattice.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Analysis/FlowSensitive/NoopLattice.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/AMDGPUTypes.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsBase.td
M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
M clang/include/clang/Basic/BuiltinsLoongArchLSX.def
M clang/include/clang/Basic/BuiltinsNVPTX.def
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A clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/BuiltinsX86_64.def
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/DiagnosticCommonKinds.td
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M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/FileSystemStatCache.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/LangStandard.h
M clang/include/clang/Basic/MacroBuilder.h
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Basic/ParsedAttrInfo.h
A clang/include/clang/Basic/StackExhaustionHandler.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/TypeNodes.td
M clang/include/clang/Basic/arm_neon.td
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M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/CIRGenerator.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/include/clang/Driver/Distro.h
M clang/include/clang/Driver/Job.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/Types.def
M clang/include/clang/Driver/XRayArgs.h
M clang/include/clang/ExtractAPI/API.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Frontend/FrontendPluginRegistry.h
M clang/include/clang/Index/USRGeneration.h
M clang/include/clang/Lex/DirectoryLookup.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/HeaderSearchOptions.h
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/CodeCompleteConsumer.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaAMDGPU.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaInternal.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTRecordWriter.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
A clang/include/clang/Support/Compiler.h
M clang/include/clang/Tooling/CompilationDatabasePluginRegistry.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/include/clang/Tooling/ToolExecutorPluginRegistry.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/ARCMigrate/Internals.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/Boolean.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Floating.h
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/IntegralAP.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
A clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
A clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/ByteCode/Source.cpp
M clang/lib/AST/ByteCode/Source.h
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/Comment.cpp
M clang/lib/AST/CommentParser.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclObjC.cpp
M clang/lib/AST/DeclOpenMP.cpp
M clang/lib/AST/DeclTemplate.cpp
A clang/lib/AST/DynamicRecursiveASTVisitor.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/InheritViz.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/BodyFarm.cpp
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/CMakeLists.txt
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/FileSystemStatCache.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/LangStandards.cpp
M clang/lib/Basic/Module.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/SourceManager.cpp
A clang/lib/Basic/StackExhaustionHandler.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARC.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/AVR.h
M clang/lib/Basic/Targets/BPF.h
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/Lanai.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/M68k.cpp
M clang/lib/Basic/Targets/MSP430.h
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/PNaCl.cpp
M clang/lib/Basic/Targets/PNaCl.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Basic/Targets/XCore.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypeCache.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
A clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/ABIInfoImpl.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTT.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/CodeGenTBAA.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/ARM.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/SPIRV.cpp
M clang/lib/Driver/ToolChains/SPIRV.h
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/BreakableToken.h
M clang/lib/Format/CMakeLists.txt
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/DiagnosticRenderer.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/PrintPreprocessedOutput.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amdgpuintrin.h
A clang/lib/Headers/amxavx512intrin.h
A clang/lib/Headers/amxfp8intrin.h
M clang/lib/Headers/amxintrin.h
A clang/lib/Headers/amxmovrsintrin.h
A clang/lib/Headers/amxmovrstransposeintrin.h
A clang/lib/Headers/amxtf32intrin.h
A clang/lib/Headers/amxtf32transposeintrin.h
A clang/lib/Headers/amxtransposeintrin.h
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/cmpccxaddintrin.h
M clang/lib/Headers/emmintrin.h
A clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/intrin0.h
M clang/lib/Headers/mmintrin.h
A clang/lib/Headers/movrs_avx10_2_512intrin.h
A clang/lib/Headers/movrs_avx10_2intrin.h
A clang/lib/Headers/nvptxintrin.h
M clang/lib/Headers/opencl-c-base.h
M clang/lib/Headers/openmp_wrappers/complex_cmath.h
A clang/lib/Headers/sm4evexintrin.h
M clang/lib/Headers/stdalign.h
M clang/lib/Index/IndexingContext.h
M clang/lib/Index/USRGeneration.cpp
M clang/lib/InstallAPI/Frontend.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/TokenConcatenation.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaSwift.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderInternals.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/Serialization/GeneratePCH.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Checkers/BitwiseShiftChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
R clang/lib/StaticAnalyzer/Checkers/PointerIterationChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/PointerSortingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TraversalChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StandardLibrary.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
M clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc
A clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
A clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/lifetimebound.cpp
A clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
A clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/complex.cpp
A clang/test/AST/ByteCode/constexpr.c
M clang/test/AST/ByteCode/cxx98.cpp
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/AST/ByteCode/openmp.cpp
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/vectors.cpp
A clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
A clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/arm-mfp8.cpp
M clang/test/AST/ast-dump-aarch64-sve-types.c
M clang/test/AST/ast-dump-amdgpu-types.c
M clang/test/AST/ast-dump-comment.cpp
A clang/test/AST/ast-print-builtin-counted-by-ref.c
M clang/test/AST/ast-print-openacc-loop-construct.cpp
M clang/test/AST/attr-swift_attr.m
A clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-ptr.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-return-value.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
A clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
A clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg-std-array.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
A clang/test/Analysis/Inputs/overloaded-delete-in-header.h
M clang/test/Analysis/array-init-loop.cpp
M clang/test/Analysis/const-method-call.cpp
M clang/test/Analysis/infeasible-sink.c
M clang/test/Analysis/malloc.c
A clang/test/Analysis/overloaded-delete-in-system-header.cpp
R clang/test/Analysis/ptr-iter.cpp
R clang/test/Analysis/ptr-sort.cpp
M clang/test/Analysis/stack-addr-ps.c
A clang/test/Analysis/store-dump-orders.cpp
M clang/test/Analysis/string.c
M clang/test/Analysis/string.cpp
R clang/test/Analysis/traversal-algorithm.mm
M clang/test/Analysis/unary-sym-expr.c
A clang/test/C/C2y/n3298.c
A clang/test/C/C2y/n3341.c
A clang/test/C/C2y/n3342.c
A clang/test/C/C2y/n3344.c
A clang/test/C/C2y/n3346.c
A clang/test/C/C2y/n3364.c
A clang/test/C/C2y/n3370.c
M clang/test/CIR/hello.c
M clang/test/CMakeLists.txt
M clang/test/CXX/class.derived/p2.cpp
A clang/test/CXX/drs/cwg1884.cpp
M clang/test/CXX/drs/cwg18xx.cpp
A clang/test/CXX/drs/cwg279.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg9xx.cpp
R clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
A clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
R clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/ClangScanDeps/diagnostics.c
M clang/test/ClangScanDeps/header-search-pruning-transitive.c
M clang/test/ClangScanDeps/link-libraries.c
M clang/test/ClangScanDeps/modules-context-hash.c
M clang/test/ClangScanDeps/modules-dep-args.c
M clang/test/ClangScanDeps/modules-extern-submodule.c
M clang/test/ClangScanDeps/modules-extern-unrelated.m
M clang/test/ClangScanDeps/modules-file-path-isolation.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-full-by-mod-name.c
M clang/test/ClangScanDeps/modules-full.cpp
M clang/test/ClangScanDeps/modules-implicit-dot-private.m
M clang/test/ClangScanDeps/modules-incomplete-umbrella.c
M clang/test/ClangScanDeps/modules-inferred.m
M clang/test/ClangScanDeps/modules-no-undeclared-includes.c
M clang/test/ClangScanDeps/modules-pch-common-submodule.c
M clang/test/ClangScanDeps/modules-pch-common-via-submodule.c
M clang/test/ClangScanDeps/modules-pch.c
M clang/test/ClangScanDeps/modules-priv-fw-from-pub.m
M clang/test/ClangScanDeps/modules-redefinition.m
M clang/test/ClangScanDeps/modules-symlink-dir-vfs.c
M clang/test/ClangScanDeps/modules-transitive.c
M clang/test/ClangScanDeps/optimize-vfs.m
M clang/test/ClangScanDeps/print-timing.c
M clang/test/ClangScanDeps/removed-args.c
M clang/test/CodeGen/2004-02-20-Builtins.c
M clang/test/CodeGen/2008-07-22-bitfield-init-after-zero-len-array.c
M clang/test/CodeGen/2008-08-07-AlignPadding1.c
M clang/test/CodeGen/2009-06-14-anonymous-union-init.c
M clang/test/CodeGen/64bit-swiftcall.c
A clang/test/CodeGen/AArch64/ABI-align-packed-assembly.c
A clang/test/CodeGen/AArch64/ABI-align-packed.c
A clang/test/CodeGen/AArch64/args-hfa.c
A clang/test/CodeGen/AArch64/args.cpp
A clang/test/CodeGen/AArch64/arguments-hfa-v3.c
A clang/test/CodeGen/AArch64/attr-mode-complex.c
A clang/test/CodeGen/AArch64/attr-mode-float.c
A clang/test/CodeGen/AArch64/bf16-dotprod-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-lane-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-ldst-intrinsics.c
A clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
A clang/test/CodeGen/AArch64/branch-protection-attr.c
A clang/test/CodeGen/AArch64/byval-temp.c
A clang/test/CodeGen/AArch64/cpu-supports-target.c
A clang/test/CodeGen/AArch64/cpu-supports.c
A clang/test/CodeGen/AArch64/debug-sve-vector-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx2-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx3-types.c
A clang/test/CodeGen/AArch64/debug-sve-vectorx4-types.c
A clang/test/CodeGen/AArch64/debug-types.c
A clang/test/CodeGen/AArch64/elf-pauthabi.c
A clang/test/CodeGen/AArch64/fix-cortex-a53-835769.c
A clang/test/CodeGen/AArch64/fmv-dependencies.c
A clang/test/CodeGen/AArch64/fmv-resolver-emission.c
A clang/test/CodeGen/AArch64/fmv-streaming.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_scale.c
A clang/test/CodeGen/AArch64/fpm-helpers.c
A clang/test/CodeGen/AArch64/gcs.c
A clang/test/CodeGen/AArch64/inline-asm.c
A clang/test/CodeGen/AArch64/inlineasm-ios.c
A clang/test/CodeGen/AArch64/ls64-inline-asm.c
A clang/test/CodeGen/AArch64/ls64.c
A clang/test/CodeGen/AArch64/matmul.cpp
A clang/test/CodeGen/AArch64/mixed-target-attributes.c
A clang/test/CodeGen/AArch64/mops.c
A clang/test/CodeGen/AArch64/neon-2velem.c
A clang/test/CodeGen/AArch64/neon-3v.c
A clang/test/CodeGen/AArch64/neon-across.c
A clang/test/CodeGen/AArch64/neon-dot-product.c
A clang/test/CodeGen/AArch64/neon-extract.c
A clang/test/CodeGen/AArch64/neon-faminmax-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fcvt-intrinsics.c
A clang/test/CodeGen/AArch64/neon-fma.c
A clang/test/CodeGen/AArch64/neon-fp16fml.c
A clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_fscale.c
A clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/neon-intrinsics.c
A clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
A clang/test/CodeGen/AArch64/neon-ldst-one.c
A clang/test/CodeGen/AArch64/neon-luti.c
A clang/test/CodeGen/AArch64/neon-misc-constrained.c
A clang/test/CodeGen/AArch64/neon-misc.c
A clang/test/CodeGen/AArch64/neon-perm.c
A clang/test/CodeGen/AArch64/neon-range-checks.c
A clang/test/CodeGen/AArch64/neon-scalar-copy.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
A clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
A clang/test/CodeGen/AArch64/neon-sha3.c
A clang/test/CodeGen/AArch64/neon-shifts.c
A clang/test/CodeGen/AArch64/neon-sm4-sm3.c
A clang/test/CodeGen/AArch64/neon-tbl.c
A clang/test/CodeGen/AArch64/neon-vcadd.c
A clang/test/CodeGen/AArch64/neon-vcmla.c
A clang/test/CodeGen/AArch64/neon-vcombine.c
A clang/test/CodeGen/AArch64/neon-vget-hilo.c
A clang/test/CodeGen/AArch64/neon-vget.c
A clang/test/CodeGen/AArch64/neon-vsqadd-float-conversion.c
A clang/test/CodeGen/AArch64/neon-vuqadd-float-conversion-warning.c
A clang/test/CodeGen/AArch64/poly-add.c
A clang/test/CodeGen/AArch64/poly128.c
A clang/test/CodeGen/AArch64/poly64.c
A clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
A clang/test/CodeGen/AArch64/pure-scalable-args.c
A clang/test/CodeGen/AArch64/sign-return-address.c
A clang/test/CodeGen/AArch64/sme-inline-streaming-attrs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/aarch64-sme-attrs.cpp
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_add-i64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_cnt.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mopa-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za32.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_mops-za64.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_read.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_builtin.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_write.c
A clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_zero.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/aarch64-sme2-attrs.cpp
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_add_sub_za16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_bmop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_clamp.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_cvtn.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_faminmax.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fmlas16.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_frint.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_int_dots.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_max.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_maxnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_min.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_minnm.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mla.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlal.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlall.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mls.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mlsl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mopa_nonwide.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_read.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sqdmulh.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_sub.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_unpkx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vdot.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_add.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_qrshr.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_rshl.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx2.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx4.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write_lane_zt.c
A clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_zero_zt.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_movaz.c
A clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_zero.c
A clang/test/CodeGen/AArch64/soft-float-abi-errors.c
A clang/test/CodeGen/AArch64/soft-float-abi.c
A clang/test/CodeGen/AArch64/strictfp-builtins.c
A clang/test/CodeGen/AArch64/subarch-compatbility.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
A clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
A clang/test/CodeGen/AArch64/sve-inline-asm-crash.c
A clang/test/CodeGen/AArch64/sve-inline-asm-datatypes.c
A clang/test/CodeGen/AArch64/sve-inline-asm-negative-test.c
A clang/test/CodeGen/AArch64/sve-inline-asm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/README
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abs.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_acle.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_aclt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_add.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adda.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_addv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_adrw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_and.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_andv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_asrd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmlalt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bfmmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_bic.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brka.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_brkpb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_clz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpeq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpge.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpgt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmple.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmplt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpne.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cmpuo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cnth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_compact.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cvtnt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_div.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_divr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq_const.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_eorv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_expa.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_exth.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_extw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_index.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_insr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lasta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lastb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_lsr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp32.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_matmul_fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_max.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_maxv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_min.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minnmv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_minv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mov.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_msb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mulx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nand.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_neg.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmla.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmls.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nmsb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_nor.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_not.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_orv.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfalse.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pfirst.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_pnext.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptest.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ptrue.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qadd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdech.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qdecw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincd.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qinch.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qincw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_qsub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rbit.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rdffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpe.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recps.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_recpx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_reinterpret.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revb.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revh.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_revw.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinta.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rinti.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintm.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintn.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintp.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintx.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rintz.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrte.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rsqrts.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_scale.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_setffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_splice.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sqrt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sub.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_subr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_sudot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tbl.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tmad.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_trn2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tsmul.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_tssel.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpkhi.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_unpklo.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_usdot.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_uzp2.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilele.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_whilelt.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_wrffr.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip1.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2-fp64.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_zip2.c
A clang/test/CodeGen/AArch64/sve-vector-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
A clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vector-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vector-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vector-subscript-ops.c
A clang/test/CodeGen/AArch64/sve-vls-arith-ops.c
A clang/test/CodeGen/AArch64/sve-vls-bitwise-ops.c
A clang/test/CodeGen/AArch64/sve-vls-compare-ops.c
A clang/test/CodeGen/AArch64/sve-vls-shift-ops.c
A clang/test/CodeGen/AArch64/sve-vls-subscript-ops.c
A clang/test/CodeGen/AArch64/sve.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aba.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_abdlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adalp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_adclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_addwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bcax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bdep.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bext.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bgrp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl1n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_bsl2n.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cdot.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cmla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_cvtxnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eor3.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eorbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_eortb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_faminmax.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histcnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_histseg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_logb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_luti.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_match.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_maxp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minnmp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_minp.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mla.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mls.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_movlt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_mullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nbsl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_nmatch.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmul.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qabs.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qcadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlalt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmlslt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qdmullt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qneg.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdcmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlah.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmlsh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrdmulh.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qrshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshlu.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qshrunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsub.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qsubr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_qxtunt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_raddhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rax1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_recpe.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rhadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshl.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rshrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsqrte.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rsubhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sbclt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shllt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_shrnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sli.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4e.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sm4ekey.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sra.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sri.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subhnt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublbt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_sublt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subltb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwb.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_subwt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbl2.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_tbx.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_uqadd.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilege.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilegt.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilerw.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr-bfloat.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_whilewr.c
A clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_xar.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfadd.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmax.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmin.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfminnm.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfsub.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_cntp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_int_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pext.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pfalse.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ptrue.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qcvtn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qrshr.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_sclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set2_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set4_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uclamp.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_undef_bool.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_pn.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_x2.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
A clang/test/CodeGen/AArch64/svepcs.c
A clang/test/CodeGen/AArch64/sysregs-target.c
A clang/test/CodeGen/AArch64/targetattr-arch.c
A clang/test/CodeGen/AArch64/targetattr-crypto.c
A clang/test/CodeGen/AArch64/targetattr.c
A clang/test/CodeGen/AArch64/tme.cpp
A clang/test/CodeGen/AArch64/type-sizes.c
A clang/test/CodeGen/AArch64/v8.1a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-constrained.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
A clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.5a-scalar-frint3264-intrinsic.c
A clang/test/CodeGen/AArch64/v8.6a-neon-intrinsics.c
A clang/test/CodeGen/AArch64/varargs-ms.c
A clang/test/CodeGen/AArch64/varargs-sve.c
A clang/test/CodeGen/AArch64/varargs.c
A clang/test/CodeGen/AArch64/vpcs.c
M clang/test/CodeGen/PowerPC/altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
M clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init-no-parentheses.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init.c
A clang/test/CodeGen/RISCV/attr-hw-shadow-stack.c
M clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg5e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16ff.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64ff.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-vls-bitwise-ops.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/SystemZ/zvector2.c
A clang/test/CodeGen/X86/amx_avx512_api.c
A clang/test/CodeGen/X86/amx_fp8.c
A clang/test/CodeGen/X86/amx_fp8_api.c
A clang/test/CodeGen/X86/amx_fp8_errors.c
A clang/test/CodeGen/X86/amx_fp8_inline_asm.c
A clang/test/CodeGen/X86/amx_movrs.c
A clang/test/CodeGen/X86/amx_movrs_api.c
A clang/test/CodeGen/X86/amx_movrs_errors.c
A clang/test/CodeGen/X86/amx_movrs_tranpose.c
A clang/test/CodeGen/X86/amx_movrs_tranpose_api.c
A clang/test/CodeGen/X86/amx_movrs_transpose_errors.c
A clang/test/CodeGen/X86/amx_tf32.c
A clang/test/CodeGen/X86/amx_tf32_api.c
A clang/test/CodeGen/X86/amx_tf32_errors.c
A clang/test/CodeGen/X86/amx_tf32_inline_asm.c
A clang/test/CodeGen/X86/amx_transpose.c
A clang/test/CodeGen/X86/amx_transpose_api.c
A clang/test/CodeGen/X86/amx_transpose_errors.c
A clang/test/CodeGen/X86/amxavx512-builtins.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx-cmp-builtins.c
M clang/test/CodeGen/X86/avx-shuffle-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vbmi2-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
M clang/test/CodeGen/X86/avx512vlvbmi2-builtins.c
A clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/cmpccxadd-builtins-error.c
M clang/test/CodeGen/X86/mmx-builtins.c
A clang/test/CodeGen/X86/movrs-avx10.2-512-builtins-error-32.c
A clang/test/CodeGen/X86/movrs-avx10.2-512-builtins.c
A clang/test/CodeGen/X86/movrs-avx10.2-builtins-error-32.c
A clang/test/CodeGen/X86/movrs-avx10.2-builtins.c
A clang/test/CodeGen/X86/sm4-evex-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse3-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/X86/xop-builtins-cmp.c
M clang/test/CodeGen/X86/xop-builtins.c
R clang/test/CodeGen/aarch64-ABI-align-packed-assembly.c
R clang/test/CodeGen/aarch64-ABI-align-packed.c
R clang/test/CodeGen/aarch64-args-hfa.c
R clang/test/CodeGen/aarch64-args.cpp
R clang/test/CodeGen/aarch64-arguments-hfa-v3.c
R clang/test/CodeGen/aarch64-attr-mode-complex.c
R clang/test/CodeGen/aarch64-attr-mode-float.c
R clang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c
R clang/test/CodeGen/aarch64-bf16-reinterpret-intrinsics.c
R clang/test/CodeGen/aarch64-branch-protection-attr.c
R clang/test/CodeGen/aarch64-byval-temp.c
R clang/test/CodeGen/aarch64-cpu-supports-target.c
R clang/test/CodeGen/aarch64-cpu-supports.c
R clang/test/CodeGen/aarch64-debug-sve-vector-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx2-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx3-types.c
R clang/test/CodeGen/aarch64-debug-sve-vectorx4-types.c
R clang/test/CodeGen/aarch64-elf-pauthabi.c
R clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
R clang/test/CodeGen/aarch64-fmv-dependencies.c
R clang/test/CodeGen/aarch64-fmv-resolver-emission.c
R clang/test/CodeGen/aarch64-fmv-streaming.c
R clang/test/CodeGen/aarch64-fp8-intrinsics/acle_sme2_fp8_scale.c
R clang/test/CodeGen/aarch64-gcs.c
R clang/test/CodeGen/aarch64-inline-asm.c
R clang/test/CodeGen/aarch64-inlineasm-ios.c
R clang/test/CodeGen/aarch64-ls64-inline-asm.c
R clang/test/CodeGen/aarch64-ls64.c
R clang/test/CodeGen/aarch64-matmul.cpp
R clang/test/CodeGen/aarch64-mixed-target-attributes.c
R clang/test/CodeGen/aarch64-mops.c
R clang/test/CodeGen/aarch64-neon-2velem.c
R clang/test/CodeGen/aarch64-neon-3v.c
R clang/test/CodeGen/aarch64-neon-across.c
R clang/test/CodeGen/aarch64-neon-dot-product.c
R clang/test/CodeGen/aarch64-neon-extract.c
R clang/test/CodeGen/aarch64-neon-faminmax-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
R clang/test/CodeGen/aarch64-neon-fma.c
R clang/test/CodeGen/aarch64-neon-fp16fml.c
R clang/test/CodeGen/aarch64-neon-fp8-intrinsics/acle_neon_fscale.c
R clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-neon-intrinsics.c
R clang/test/CodeGen/aarch64-neon-ldst-one-rcpc3.c
R clang/test/CodeGen/aarch64-neon-ldst-one.c
R clang/test/CodeGen/aarch64-neon-luti.c
R clang/test/CodeGen/aarch64-neon-misc-constrained.c
R clang/test/CodeGen/aarch64-neon-misc.c
R clang/test/CodeGen/aarch64-neon-perm.c
R clang/test/CodeGen/aarch64-neon-range-checks.c
R clang/test/CodeGen/aarch64-neon-scalar-copy.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem-constrained.c
R clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
R clang/test/CodeGen/aarch64-neon-sha3.c
R clang/test/CodeGen/aarch64-neon-shifts.c
R clang/test/CodeGen/aarch64-neon-sm4-sm3.c
R clang/test/CodeGen/aarch64-neon-tbl.c
R clang/test/CodeGen/aarch64-neon-vcadd.c
R clang/test/CodeGen/aarch64-neon-vcmla.c
R clang/test/CodeGen/aarch64-neon-vcombine.c
R clang/test/CodeGen/aarch64-neon-vget-hilo.c
R clang/test/CodeGen/aarch64-neon-vget.c
R clang/test/CodeGen/aarch64-neon-vsqadd-float-conversion.c
R clang/test/CodeGen/aarch64-neon-vuqadd-float-conversion-warning.c
R clang/test/CodeGen/aarch64-poly-add.c
R clang/test/CodeGen/aarch64-poly128.c
R clang/test/CodeGen/aarch64-poly64.c
R clang/test/CodeGen/aarch64-sign-return-address.c
R clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_builtin.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
R clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/aarch64-sme2-attrs.cpp
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_faminmax.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_frint.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_max.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_maxnm.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_min.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_minnm.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sqdmulh.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sub.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_add.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_rshl.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx2.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx4.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write_lane_zt.c
R clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_zero_zt.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_movaz.c
R clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
R clang/test/CodeGen/aarch64-soft-float-abi-errors.c
R clang/test/CodeGen/aarch64-soft-float-abi.c
R clang/test/CodeGen/aarch64-strictfp-builtins.c
R clang/test/CodeGen/aarch64-subarch-compatbility.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
R clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
R clang/test/CodeGen/aarch64-sve-inline-asm-crash.c
R clang/test/CodeGen/aarch64-sve-inline-asm-datatypes.c
R clang/test/CodeGen/aarch64-sve-inline-asm-negative-test.c
R clang/test/CodeGen/aarch64-sve-inline-asm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/README
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq_const.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c
R clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c
R clang/test/CodeGen/aarch64-sve-vector-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vector-bits-codegen.c
R clang/test/CodeGen/aarch64-sve-vector-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vector-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vector-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vector-subscript-ops.c
R clang/test/CodeGen/aarch64-sve-vls-arith-ops.c
R clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
R clang/test/CodeGen/aarch64-sve-vls-compare-ops.c
R clang/test/CodeGen/aarch64-sve-vls-shift-ops.c
R clang/test/CodeGen/aarch64-sve-vls-subscript-ops.c
R clang/test/CodeGen/aarch64-sve.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_faminmax.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_luti.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c
R clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dupq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_int_reduce.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ldnt1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_loads.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ptrue.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qrshr.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_store.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tblq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tbxq.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_undef_bool.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_x2.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq1.c
R clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq2.c
R clang/test/CodeGen/aarch64-svepcs.c
R clang/test/CodeGen/aarch64-sysregs-target.c
R clang/test/CodeGen/aarch64-targetattr-arch.c
R clang/test/CodeGen/aarch64-targetattr-crypto.c
R clang/test/CodeGen/aarch64-targetattr.c
R clang/test/CodeGen/aarch64-tme.cpp
R clang/test/CodeGen/aarch64-type-sizes.c
R clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-constrained.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
R clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-v8.5a-neon-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.5a-scalar-frint3264-intrinsic.c
R clang/test/CodeGen/aarch64-v8.6a-neon-intrinsics.c
R clang/test/CodeGen/aarch64-varargs-ms.c
R clang/test/CodeGen/aarch64-varargs-sve.c
R clang/test/CodeGen/aarch64-varargs.c
R clang/test/CodeGen/aarch64-vpcs.c
A clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
A clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGen/arm-mve-intrinsics/absneg.c
M clang/test/CodeGen/arm-mve-intrinsics/bitwise-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/cplusplus.cpp
M clang/test/CodeGen/arm-mve-intrinsics/vbicq.c
M clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/vornq.c
M clang/test/CodeGen/arm-neon-shifts.c
M clang/test/CodeGen/arm-swiftcall.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/attr-counted-by-pr88931.cpp
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-clones-riscv.c
M clang/test/CodeGen/attr-target-version-riscv.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGen/attr-target-x86.c
A clang/test/CodeGen/builtin-counted-by-ref.c
M clang/test/CodeGen/builtin_set_flt_rounds.c
A clang/test/CodeGen/builtins-array-rank.cpp
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-nvptx-native-half-type-native.c
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/builtinshufflevector2.c
M clang/test/CodeGen/code-coverage.c
M clang/test/CodeGen/coff-aarch64-type-sizes.c
M clang/test/CodeGen/const-init.c
M clang/test/CodeGen/cx-complex-range.c
R clang/test/CodeGen/debug-info-renderscript-tag.rs
M clang/test/CodeGen/decl.c
M clang/test/CodeGen/designated-initializers.c
M clang/test/CodeGen/ext-int.c
A clang/test/CodeGen/fat-lto-objects-cfi.cpp
M clang/test/CodeGen/flexible-array-init.c
A clang/test/CodeGen/fmaxfmin-invalid-arguments-type.c
M clang/test/CodeGen/fp16-ops.c
M clang/test/CodeGen/global-init.c
M clang/test/CodeGen/init.c
A clang/test/CodeGen/linux-kernel-struct-union-initializer.c
A clang/test/CodeGen/linux-kernel-struct-union-initializer2.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/math-libcalls.c
M clang/test/CodeGen/matrix-type-operators.c
M clang/test/CodeGen/mdouble.c
M clang/test/CodeGen/memtag-globals.cpp
M clang/test/CodeGen/mingw-long-double.c
M clang/test/CodeGen/mms-bitfields.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
A clang/test/CodeGen/musttail-sret.cpp
M clang/test/CodeGen/neon-immediate-ubsan.c
M clang/test/CodeGen/nofpclass.c
A clang/test/CodeGen/pgo-cold-function-coverage.c
M clang/test/CodeGen/ppc-vec_ct-truncate.c
R clang/test/CodeGen/renderscript.c
M clang/test/CodeGen/rtsan_attribute_inserted.c
M clang/test/CodeGen/rtsan_no_attribute_sanitizer_disabled.c
A clang/test/CodeGen/sanitize-coverage-gated-callbacks.c
M clang/test/CodeGen/stack-protector-guard.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/tbaa-reference.cpp
A clang/test/CodeGen/ubsan-type-ignorelist-category-2.test
A clang/test/CodeGen/ubsan-type-ignorelist-category.test
A clang/test/CodeGen/ubsan-type-ignorelist-enum.test
M clang/test/CodeGen/union-init2.c
M clang/test/CodeGen/variadic-nvptx.c
M clang/test/CodeGen/vecshift.c
M clang/test/CodeGen/vector-scalar.c
M clang/test/CodeGen/windows-swiftcall.c
M clang/test/CodeGenCUDA/Inputs/cuda.h
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
M clang/test/CodeGenCUDA/bf16.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
A clang/test/CodeGenCUDA/grid-constant.cu
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inlined-key-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
M clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
M clang/test/CodeGenCXX/aarch64-sve-typeinfo.cpp
M clang/test/CodeGenCXX/aarch64-sve-vector-init.cpp
A clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
M clang/test/CodeGenCXX/armv7k.cpp
M clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version.cpp
M clang/test/CodeGenCXX/auto-var-init.cpp
M clang/test/CodeGenCXX/builtins.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/exceptions-no-rtti.cpp
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenCXX/ext-vector-type-conditional.cpp
M clang/test/CodeGenCXX/flexible-array-init.cpp
M clang/test/CodeGenCXX/implicit-record-visibility.cpp
M clang/test/CodeGenCXX/matrix-type-builtins.cpp
M clang/test/CodeGenCXX/matrix-type-operators.cpp
M clang/test/CodeGenCXX/mdefault-visibility-export-mapping-rtti.cpp
M clang/test/CodeGenCXX/modules-vtable.cppm
M clang/test/CodeGenCXX/ptrauth-rtti-layout.cpp
M clang/test/CodeGenCXX/ptrauth-type-info-vtable.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-virtual-inheritance-thunk.cpp
M clang/test/CodeGenCXX/rtti-linkage.cpp
M clang/test/CodeGenCXX/rtti-visibility.cpp
M clang/test/CodeGenCXX/symbol-partition.cpp
M clang/test/CodeGenCXX/type_visibility.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/vector-size-conditional.cpp
M clang/test/CodeGenCXX/vector-splat-conversion.cpp
M clang/test/CodeGenCXX/visibility-ms-compat.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-align.cpp
M clang/test/CodeGenCXX/vtable-available-externally.cpp
M clang/test/CodeGenCXX/vtable-key-function-arm.cpp
M clang/test/CodeGenCXX/vtable-key-function-ios.cpp
M clang/test/CodeGenCXX/vtable-key-function-win-comdat.cpp
M clang/test/CodeGenCXX/weak-extern-typeinfo.cpp
M clang/test/CodeGenCXX/windows-itanium-type-info.cpp
A clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenHLSL/BasicFeatures/standard_conversion_sequences.hlsl
A clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
A clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/builtins/RWBuffer-annotations.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
A clang/test/CodeGenHLSL/builtins/RWStructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/builtins/RasterizerOrderedBuffer-annotations.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
R clang/test/CodeGenHLSL/builtins/StructuredBuffer-annotations.hlsl
R clang/test/CodeGenHLSL/builtins/StructuredBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/builtins/StructuredBuffer-subscript.hlsl
A clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
A clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
A clang/test/CodeGenHLSL/builtins/WaveActiveCountBits.hlsl
A clang/test/CodeGenHLSL/builtins/WaveReadLaneAt.hlsl
M clang/test/CodeGenHLSL/builtins/clamp-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/clamp.hlsl
M clang/test/CodeGenHLSL/builtins/countbits.hlsl
A clang/test/CodeGenHLSL/builtins/dot4add_i8packed.hlsl
A clang/test/CodeGenHLSL/builtins/dot4add_u8packed.hlsl
A clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
M clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
A clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/CodeGenHLSL/builtins/wave_get_lane_index_do_while.hlsl
M clang/test/CodeGenHLSL/builtins/wave_get_lane_index_simple.hlsl
M clang/test/CodeGenHLSL/builtins/wave_get_lane_index_subcall.hlsl
M clang/test/CodeGenHLSL/builtins/wave_is_first_lane.hlsl
M clang/test/CodeGenHLSL/cbuf.hlsl
A clang/test/CodeGenHLSL/convergence/entry.point.hlsl
M clang/test/CodeGenObjC/aarch64-sve-types.m
M clang/test/CodeGenObjC/designated-initializers.m
M clang/test/CodeGenObjCXX/rtti.mm
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/amdgpu-nullptr.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/atomics-unsafe-hw-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx940.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx8.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/logical-ops.cl
M clang/test/CodeGenOpenCL/opencl_types.cl
M clang/test/CodeGenOpenCL/partial_initializer.cl
M clang/test/CodeGenOpenCL/pipe_builtin.cl
M clang/test/CodeGenOpenCL/shifts.cl
M clang/test/CodeGenOpenCL/vector_literals.cl
M clang/test/CodeGenOpenCLCXX/local_addrspace_init.clcpp
M clang/test/CodeGenSYCL/unique_stable_name_windows_diff.cpp
M clang/test/CoverageMapping/branch-constfolded.cpp
M clang/test/CoverageMapping/if.cpp
M clang/test/CoverageMapping/macro-expansion.c
M clang/test/CoverageMapping/mcdc-scratch-space.c
M clang/test/CoverageMapping/mcdc-system-headers.cpp
M clang/test/CoverageMapping/switch.cpp
M clang/test/CoverageMapping/switchmacro.c
M clang/test/Driver/XRay/xray-mode-flags.cpp
A clang/test/Driver/XRay/xray-shared.cpp
M clang/test/Driver/Xlinker-args.c
M clang/test/Driver/aarch64-v96a.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/arm-cortex-cpus-2.c
M clang/test/Driver/autocomplete.c
M clang/test/Driver/avr-mmcu.c
M clang/test/Driver/avr-toolchain.c
M clang/test/Driver/cl-options.c
A clang/test/Driver/clang-sycl-linker-test.cpp
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/cuda-cross-compiling.c
A clang/test/Driver/fprofile-generate-cold-function-coverage.c
M clang/test/Driver/fveclib.c
M clang/test/Driver/hip-include-path.hip
M clang/test/Driver/hip-link-save-temps.hip
M clang/test/Driver/hip-partial-link.hip
M clang/test/Driver/hip-runtime-libs-msvc.hip
M clang/test/Driver/hip-save-temps.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc-static-lib.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/hip-unbundle-preproc.hipi
A clang/test/Driver/hip-wavefront-size-deprecation-diagnostics.hip
M clang/test/Driver/hipspv-toolchain-rdc.hip
M clang/test/Driver/hipstdpar.c
R clang/test/Driver/index-header-map.c
M clang/test/Driver/linker-wrapper.c
A clang/test/Driver/loongarch-mannotate-tablejump.c
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mfrecipe.c
A clang/test/Driver/loongarch-mlam-bh.c
M clang/test/Driver/nvlink-wrapper.c
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.7-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.8-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.9-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.2-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.3-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
M clang/test/Driver/print-multi-selection-flags.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/ps5-linker.c
R clang/test/Driver/renderscript.rs
M clang/test/Driver/riscv-features.c
M clang/test/Driver/riscv-profiles.c
M clang/test/Driver/stack-protector-guard.c
A clang/test/Driver/sycl-link-spirv-target.cpp
M clang/test/Driver/unknown-std.c
M clang/test/Driver/wasm-features.c
A clang/test/Driver/windows-lto.c
M clang/test/Driver/x86-target-features.c
M clang/test/ExtractAPI/anonymous_record_no_typedef.c
M clang/test/ExtractAPI/typedef_anonymous_record.c
M clang/test/Format/clang-format-ignore.cpp
A clang/test/Format/dry-run-warning.cpp
A clang/test/Format/error-unfound-files.cpp
M clang/test/Frontend/plugin-attribute.cpp
M clang/test/Headers/__clang_hip_math_deprecated.hip
A clang/test/Headers/gpuintrin.c
A clang/test/Headers/gpuintrin_lang.c
A clang/test/Headers/header_unit_preprocessed_output.cpp
A clang/test/Headers/lasxintrin.c
A clang/test/Headers/lsxintrin.c
M clang/test/Headers/ms-intrin.cpp
M clang/test/Headers/opencl-c-header.cl
M clang/test/Headers/wasm.c
M clang/test/Index/pipe-size.cl
M clang/test/Lexer/SourceLocationsOverflow.c
M clang/test/Lexer/gnu-flags.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Misc/sloc-usage.cpp
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/arm.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/Misc/warning-flags.c
M clang/test/Modules/cxx-templates.cpp
M clang/test/Modules/cxx20-include-translation.cpp
A clang/test/Modules/diff-retain-comments-from-system-headers-flag.cppm
M clang/test/Modules/friend-definition-2.cpp
M clang/test/Modules/no-external-type-id.cppm
M clang/test/Modules/pr97313.cppm
A clang/test/Modules/prune-non-affecting-module-map-repeated.cpp
A clang/test/Modules/static-initializer.cppm
A clang/test/OpenMP/allocate_allocator_modifier_ast_print.cpp
A clang/test/OpenMP/allocate_allocator_modifier_codegen.cpp
A clang/test/OpenMP/allocate_allocator_modifier_messages.cpp
M clang/test/OpenMP/bug57757.cpp
M clang/test/OpenMP/depobj_codegen.cpp
M clang/test/PCH/cxx2a-constraints-crash.cpp
M clang/test/ParserHLSL/hlsl_contained_type_attr.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr.hlsl
M clang/test/ParserHLSL/hlsl_raw_buffer_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/Preprocessor/aarch64-target-features.c
A clang/test/Preprocessor/embed_zos.c
M clang/test/Preprocessor/feature_tests.cpp
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-win-macros.c
M clang/test/Preprocessor/riscv-target-features.c
A clang/test/Preprocessor/time64.c
M clang/test/Preprocessor/wasm-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M clang/test/Sema/aarch64-cpu-supports.c
M clang/test/Sema/aarch64-incompat-sm-builtin-calls.c
M clang/test/Sema/aarch64-neon-target.c
M clang/test/Sema/aarch64-sve-types.c
A clang/test/Sema/aarch64-vcmla-undef.c
M clang/test/Sema/arithmetic-fence-builtin.c
A clang/test/Sema/arm-mfp8.c
A clang/test/Sema/arm-mfp8.cpp
M clang/test/Sema/asm.c
A clang/test/Sema/attr-lifetimebound.c
M clang/test/Sema/attr-nonblocking-constraints.cpp
M clang/test/Sema/attr-target-clones-aarch64.c
M clang/test/Sema/attr-target-version.c
A clang/test/Sema/avr-size-align.c
A clang/test/Sema/builtin-counted-by-ref.c
A clang/test/Sema/builtin-counted-by-ref.cpp
M clang/test/Sema/builtins.c
M clang/test/Sema/constant-builtins-2.c
A clang/test/Sema/constant-builtins-fmaximum-num.cpp
A clang/test/Sema/constant-builtins-fminimum-num.cpp
M clang/test/Sema/constexpr.c
M clang/test/Sema/declspec.c
M clang/test/Sema/exprs.c
M clang/test/Sema/gnu-flags.c
R clang/test/Sema/renderscript.rs
M clang/test/Sema/unbounded-array-bounds.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCUDA/Inputs/cuda.h
M clang/test/SemaCUDA/fp16-arg-return.cu
A clang/test/SemaCUDA/grid-constant.cu
A clang/test/SemaCXX/GH41441.cpp
A clang/test/SemaCXX/GH95854.cpp
A clang/test/SemaCXX/PR113855.cpp
A clang/test/SemaCXX/amdgpu-barrier.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/attr-target-clones-riscv.cpp
M clang/test/SemaCXX/attr-target-version-riscv.cpp
M clang/test/SemaCXX/attr-target-version.cpp
M clang/test/SemaCXX/block-packs.cpp
M clang/test/SemaCXX/c99-variable-length-array.cpp
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A clang/unittests/Analysis/FlowSensitive/CachedConstAccessorsLatticeTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
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M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestCSharp.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Interpreter/CMakeLists.txt
M clang/unittests/Lex/HeaderSearchTest.cpp
M clang/unittests/StaticAnalyzer/CMakeLists.txt
M clang/unittests/StaticAnalyzer/MemRegionDescriptiveNameTest.cpp
A clang/unittests/StaticAnalyzer/SValSimplifyerTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/ClangSACheckersEmitter.cpp
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M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/perf-training/bolt.lit.cfg
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A clang/utils/perf-training/llvm-support/build.test
M clang/www/OpenProjects.html
M clang/www/analyzer/faq.html
M clang/www/analyzer/index.html
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
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R cmake/Modules/HandleOutOfTreeLLVM.cmake
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M compiler-rt/lib/asan/asan_fuchsia.cpp
M compiler-rt/lib/asan/asan_poisoning.cpp
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A compiler-rt/lib/builtins/trunctfbf2.c
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M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
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M compiler-rt/lib/hwasan/hwasan_thread.cpp
M compiler-rt/lib/hwasan/scripts/hwasan_symbolize
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M compiler-rt/lib/orc/macho_platform.cpp
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A compiler-rt/lib/rtsan/rtsan_checks.inc
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R compiler-rt/lib/rtsan/rtsan_interceptors.cpp
A compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
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A compiler-rt/lib/rtsan/rtsan_suppressions.cpp
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A compiler-rt/lib/sanitizer_common/sanitizer_thread_history.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_thread_history.h
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M flang/docs/OptionComparison.md
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M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Common/Fortran-features.h
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M flang/include/flang/Common/LangOptions.def
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A flang/include/flang/Common/erfc-scaled.h
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M flang/include/flang/Frontend/CodeGenOptions.h
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M flang/include/flang/Lower/Bridge.h
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A flang/include/flang/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.h
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M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Optimizer/Support/InternalNames.h
A flang/include/flang/Optimizer/Transforms/CUFCommon.h
A flang/include/flang/Optimizer/Transforms/CUFGPUToLLVMConversion.h
A flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
R flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Parser/token-sequence.h
M flang/include/flang/Runtime/CUDA/common.h
A flang/include/flang/Runtime/CUDA/kernel.h
M flang/include/flang/Runtime/CUDA/memory.h
A flang/include/flang/Runtime/CUDA/registration.h
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Runtime/freestanding-tools.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/scope.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/type.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Common/Fortran.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/intrinsics-library.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
M flang/lib/Optimizer/Builder/Runtime/Transformational.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/CUF/CMakeLists.txt
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
A flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AbstractResult.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
A flang/lib/Optimizer/Transforms/CUFCommon.cpp
A flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
A flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
A flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
R flang/lib/Optimizer/Transforms/CufImplicitDeviceGlobal.cpp
R flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/parsing.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/token-sequence.cpp
M flang/lib/Parser/type-parsers.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/kernel.cpp
M flang/runtime/CUDA/memory.cpp
A flang/runtime/CUDA/registration.cpp
M flang/runtime/Float128Math/math-entries.h
M flang/runtime/assign.cpp
M flang/runtime/numeric-templates.h
M flang/test/Analysis/AliasAnalysis/alias-analysis-3.fir
A flang/test/Analysis/AliasAnalysis/alias-analysis-9.fir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Driver/arch-specific-libdir-rpath.f95
A flang/test/Driver/atomic.f90
M flang/test/Driver/embed.f90
A flang/test/Driver/frecord-command-line.f90
M flang/test/Driver/frontend-forwarding.f90
A flang/test/Driver/integer-overflow.f90
A flang/test/Driver/mabi.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Evaluate/errors01.f90
A flang/test/Evaluate/fold-erfc-scaled.f90
M flang/test/Fir/CUDA/cuda-alloc-free.fir
A flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
A flang/test/Fir/CUDA/cuda-device-global.f90
A flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
A flang/test/Fir/CUDA/cuda-launch.fir
A flang/test/Fir/CUDA/cuda-register-func.fir
M flang/test/Fir/OpenACC/legalize-data.fir
A flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/box.fir
A flang/test/Fir/comdat-present.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/cuf-invalid.fir
M flang/test/Fir/embox-char.fir
M flang/test/Fir/optional.fir
M flang/test/Fir/polymorphic.fir
A flang/test/Fir/struct-return-x86-64.fir
M flang/test/Fir/tbaa.fir
M flang/test/Fir/tco-default-datalayout.fir
M flang/test/Fir/tco-explicit-datalayout.fir
A flang/test/HLFIR/assign-side-effects.fir
M flang/test/HLFIR/opt-bufferization.fir
A flang/test/HLFIR/order_assignments/vector-subscripts-scheduling.fir
M flang/test/HLFIR/order_assignments/where-scheduling.f90
A flang/test/Integration/OpenMP/atomic-capture-complex.f90
A flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
A flang/test/Integration/OpenMP/private-global.f90
A flang/test/Integration/debug-complex-2.f90
A flang/test/Integration/debug-external-linkage-name.f90
A flang/test/Integration/debug-extra-global-2.f90
A flang/test/Integration/debug-extra-global.f90
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
A flang/test/Lower/Intrinsics/ieee_real.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-allocatable.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
A flang/test/Lower/OpenMP/Todo/affinity-clause.f90
R flang/test/Lower/OpenMP/Todo/atomic-character.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
Log Message:
-----------
upd
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/bf8e6ed9596c...c9b691e92061
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