[all-commits] [llvm/llvm-project] 2b5b57: [AMDGPU] Skip non-wwm reg implicit-def from bb pro...

[Christudasan Devadasan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2b5b57c5cf78af66b5b9f514c4b51b4adc9a80df
      https://github.com/llvm/llvm-project/commit/2b5b57c5cf78af66b5b9f514c4b51b4adc9a80df
  Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
  Date:   2024-11-12 (Tue, 12 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
    M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
    M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
    M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
    M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
    M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
    M llvm/test/CodeGen/AMDGPU/merge-m0.mir

  Log Message:
  -----------
  [AMDGPU] Skip non-wwm reg implicit-def from bb prolog (#115834)

Currently all implicit-def instructions are part of
bb prolog. We should only include the wwm-register's
implicit definitions into the BB prolog. The other
vector class registers' implicit defs when exist at
the bb top might cause interference when pushed the
LR_split copy insertion downwards. The SplitKit is
very strict on altering the insertion points and will
assert such instances.



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