[all-commits] [llvm/llvm-project] c28052: [RISCV][GISel] Remove s32 support for G_ADD/SUB/AN...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c280522f7e359117adde10de4158f9f6fec20a7b
      https://github.com/llvm/llvm-project/commit/c280522f7e359117adde10de4158f9f6fec20a7b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-11-11 (Mon, 11 Nov 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
    M llvm/lib/Target/RISCV/RISCVGISel.td
    M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/load-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/shift-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/store-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-add-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-addo-subo-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-and-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ashr-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-const-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fshl-fshr-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-lshr-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-or-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-shl-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sub-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-xor-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-splatvector-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll

  Log Message:
  -----------
  [RISCV][GISel] Remove s32 support for G_ADD/SUB/AND/OR/XOR on RV64.

This is consistent with other patches to remove s32 recently.



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