[all-commits] [llvm/llvm-project] 01a559: [llvm-exegesis][X86] Groups ports 2, 3, and 11 for ...

[Aiden Grossman via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 01a5596b5295d1585716d2deade407adaa40fe20
      https://github.com/llvm/llvm-project/commit/01a5596b5295d1585716d2deade407adaa40fe20
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2024-11-10 (Sun, 10 Nov 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86PfmCounters.td
    M llvm/lib/Target/X86/X86SchedAlderlakeP.td
    M llvm/lib/Target/X86/X86SchedSapphireRapids.td

  Log Message:
  -----------
  [llvm-exegesis][X86] Groups ports 2,3, and 11 for Golden Cove (#115645)

This patch updates the PFM counter mappings for Sapphire Rapids and
Alder Lake (p-cores) to group ports 2,3, and 11 despite the naming of
the performance counters. This is how the scheduling models assume
things work within LLVM, and seems to be a mistake within the Intel
perfmon documentation.

Fixes #113941.



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