[all-commits] [llvm/llvm-project] 62db1c: [SLP]Better decision making on whether to try stor...
Alexander Richardson via All-commits
all-commits at lists.llvm.org
Thu Nov 7 14:50:24 PST 2024
Branch: refs/heads/users/arichardson/spr/reapply-libcabi-stop-copying-headers-to-the-build-directory
Home: https://github.com/llvm/llvm-project
Commit: 62db1c8a076c7167e404412182f4a8915f4ff6ee
https://github.com/llvm/llvm-project/commit/62db1c8a076c7167e404412182f4a8915f4ff6ee
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/repeated-address-store.ll
Log Message:
-----------
[SLP]Better decision making on whether to try stores packs for vectorization
Since the stores are sorted by distance, comparing the indices in the
original array and early exit, if the index is less than the index of
the last store, not always the best strategy. Better to remove such
stores explicitly to try better to check for the vectorization
opportunity.
Fixes #115008
Commit: c02da382471fd0b338af76ce220e9567e3cb854a
https://github.com/llvm/llvm-project/commit/c02da382471fd0b338af76ce220e9567e3cb854a
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
Log Message:
-----------
[RISCV] Add tests for deinterleave(2-8) shuffles
Commit: 02668f60a9b5c0d5b8b6e60b4e897f763ad59a91
https://github.com/llvm/llvm-project/commit/02668f60a9b5c0d5b8b6e60b4e897f763ad59a91
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
Log Message:
-----------
[RISCV] Match single source deinterleave shuffles for vnsrl (#114878)
We had previously only been matching the two source case where both
sources came from a wider source type. We can also match the single
source case - provided the result is m4 or smaller because we will need
a wider type to represent the source.
The main goal of this to ensure that vnsrl matching is robust to a
possible change in canonicalization for length changing shuffles that
I'm considering, but it has the nice effect of picking up a few cases we
missed along the way.
Commit: e189d61924ba0165b3a344c3d945b3e2aa373485
https://github.com/llvm/llvm-project/commit/e189d61924ba0165b3a344c3d945b3e2aa373485
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/unittests/Transforms/Instrumentation/CMakeLists.txt
A llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Add extractCallsFromIR (#115218)
This patch adds extractCallsFromIR, a function to extract calls from
the IR, which will be used to undrift call site locations in the
MemProf profile.
In a nutshell, the MemProf undrifting works as follows:
- Extract call site locations from the IR.
- Extract call site locations from the MemProf profile.
- Undrift the call site locations with longestCommonSequence.
This patch implements the first bullet point above. Specifically,
given the IR, the new function returns a map from caller GUIDs to
lists of corresponding call sites. For example:
Given:
foo() {
f1();
f2(); f3();
}
extractCallsFromIR returns:
Caller: foo ->
{{(Line 1, Column 3), Callee: f1},
{(Line 2, Column 3), Callee: f2},
{(Line 2, Column 9), Callee: f3}}
where the line numbers, relative to the beginning of the caller, and
column numbers are sorted in the ascending order. The value side of
the map -- the list of call sites -- can be directly passed to
longestCommonSequence.
To facilitate the review process, I've only implemented basic features
in extractCallsFromIR in this patch.
- The new function extracts calls from the LLVM "call" instructions
only. It does not look into the inline stack.
- It does not recognize or treat heap allocation functions in any
special way.
I will address these missing features in subsequent patches.
Commit: 53e49f15ab0b9b03e5671faea6f7870914b8f0ea
https://github.com/llvm/llvm-project/commit/53e49f15ab0b9b03e5671faea6f7870914b8f0ea
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTRecordWriter.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
Log Message:
-----------
[clang][serialization] Pass `ASTContext` explicitly (#115235)
This patch removes `ASTWriter::Context` and starts passing `ASTContext
&` explicitly to functions that actually need it. This is a
non-functional change with the end-goal of being able to write
lightweight PCM files with no `ASTContext` at all.
Commit: b0c09a0fd045f63fca718619046975efa2a21685
https://github.com/llvm/llvm-project/commit/b0c09a0fd045f63fca718619046975efa2a21685
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTRecordWriter.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/repeated-address-store.ll
M llvm/unittests/Transforms/Instrumentation/CMakeLists.txt
A llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
rebase
Created using spr 1.3.6-beta.1
Compare: https://github.com/llvm/llvm-project/compare/eb61f0fe07e9...b0c09a0fd045
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