[all-commits] [llvm/llvm-project] bdfadb: [mlir] Apply ClangTidy findings
wanglei via All-commits
all-commits at lists.llvm.org
Thu Nov 7 04:54:55 PST 2024
Branch: refs/heads/users/wangleiat/spr/runtimedyld-add-loongarch-support
Home: https://github.com/llvm/llvm-project
Commit: bdfadb16d7928eb6bde5bf6c4e7b499c18438a31
https://github.com/llvm/llvm-project/commit/bdfadb16d7928eb6bde5bf6c4e7b499c18438a31
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
Log Message:
-----------
[mlir] Apply ClangTidy findings
Remove unused using declarations
Commit: 2ff41b4eee0c6e30eaa7119b893fde4bdd010045
https://github.com/llvm/llvm-project/commit/2ff41b4eee0c6e30eaa7119b893fde4bdd010045
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/sve-saturating-arith.ll
Log Message:
-----------
[GlobalISel][AArch64] Legalize G_UADDSAT, G_SADDSAT, G_USUBSAT, and G… (#114664)
…_SSUBSAT
sve-int-imm.ll also tests saturation, but it has unsupported splats.
Commit: 0067b79feca267ca0d70fb4af8c08c9b78cdb418
https://github.com/llvm/llvm-project/commit/0067b79feca267ca0d70fb4af8c08c9b78cdb418
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-03 (Sun, 03 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/InstrProfWriter.h
Log Message:
-----------
[memprof] Use MinimumSupportedVersion in place of Verion0 (NFC) (#114723)
I'm planning to remove old versions of the MemProf indexed formats at
some point. Replacing these occurrences of Version0 with
MinimumSupportedVersion allows me to touch fewer places when I remove
old versions in the future.
Note that these two parameters being touched in this patch have
nothing to do with the default MemProf version that llvm-profdata
uses, which is controlled by MemProfVersionRequested in
llvm-profdata.cpp.
Commit: de6ab1bcbc55bab9b8cd46102a9f02dea5e2af12
https://github.com/llvm/llvm-project/commit/de6ab1bcbc55bab9b8cd46102a9f02dea5e2af12
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
Log Message:
-----------
[RISCV] Remove unnecessary +zfh from strided VP load/store tests. NFC
Commit: 8bc04e4c93cb681249c258bc0a1b1aa1b3fe71f4
https://github.com/llvm/llvm-project/commit/8bc04e4c93cb681249c258bc0a1b1aa1b3fe71f4
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
Log Message:
-----------
[RISCV] Remove completed TODO in VP strided load test. NFC
This was done in #101329
Commit: f8535fd8b4a986cafa2e77e0f880dbd4e10300d8
https://github.com/llvm/llvm-project/commit/f8535fd8b4a986cafa2e77e0f880dbd4e10300d8
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
Log Message:
-----------
[RISCV] Remove unused check prefixes from VP strided load test. NFC
Commit: 3dd1d888fb18b40859504e207e57abdc6c43d838
https://github.com/llvm/llvm-project/commit/3dd1d888fb18b40859504e207e57abdc6c43d838
Author: Justin Stitt <justinstitt at google.com>
Date: 2024-11-03 (Sun, 03 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/CodeGen/ubsan-type-ignorelist-category-2.test
A clang/test/CodeGen/ubsan-type-ignorelist-category.test
Log Message:
-----------
[Clang] Implement labelled type filtering for overflow/truncation sanitizers w/ SSCLs (#107332)
[Related
RFC](https://discourse.llvm.org/t/rfc-support-globpattern-add-operator-to-invert-matches/80683/5?u=justinstitt)
### Summary
Implement type-based filtering via [Sanitizer Special Case
Lists](https://clang.llvm.org/docs/SanitizerSpecialCaseList.html) for
the arithmetic overflow and truncation sanitizers.
Currently, using the `type:` prefix with these sanitizers does nothing.
I've hooked up the SSCL parsing with Clang codegen so that we don't emit
the overflow/truncation checks if the arithmetic contains an ignored
type.
### Usefulness
You can craft ignorelists that ignore specific types that are expected
to overflow or wrap-around. For example, to ignore `my_type` from
`unsigned-integer-overflow` instrumentation:
```bash
$ cat ignorelist.txt
[unsigned-integer-overflow]
type:my_type=no_sanitize
$ cat foo.c
typedef unsigned long my_type;
void foo() {
my_type a = ULONG_MAX;
++a;
}
$ clang foo.c -fsanitize=unsigned-integer-overflow -fsanitize-ignorelist=ignorelist.txt ; ./a.out
// --> no sanitizer error
```
If a type is functionally intended to overflow, like
[refcount_t](https://kernsec.org/wiki/index.php/Kernel_Protections/refcount_t)
and its associated APIs in the Linux kernel, then this type filtering
would prove useful for reducing sanitizer noise. Currently, the Linux
kernel dealt with this by
[littering](https://elixir.bootlin.com/linux/v6.10.8/source/include/linux/refcount.h#L139
) `__attribute__((no_sanitize("signed-integer-overflow")))` annotations
on all the `refcount_t` APIs. I think this serves as an example of how a
codebase could be made cleaner. We could make custom types that are
filtered out in an ignorelist, allowing for types to be more expressive
-- without the need for annotations. This accomplishes a similar goal to
https://github.com/llvm/llvm-project/pull/86618.
Yet another use case for this type filtering is whitelisting. We could
ignore _all_ types, save a few.
```bash
$ cat ignorelist.txt
[implicit-signed-integer-truncation]
type:*=no_sanitize # ignore literally all types
type:short=sanitize # except `short`
$ cat bar.c
// compile with -fsanitize=implicit-signed-integer-truncation
void bar(int toobig) {
char a = toobig; // not instrumented
short b = toobig; // instrumented
}
```
### Other ways to accomplish the goal of sanitizer
allowlisting/whitelisting
* ignore list SSCL type support (this PR that you're reading)
* [my sanitize-allowlist
branch](https://github.com/llvm/llvm-project/compare/main...JustinStitt:llvm-project:sanitize-allowlist)
- this just implements a sibling flag `-fsanitize-allowlist=`, removing
some of the double negative logic present with `skip`/`ignore` when
trying to whitelist something.
* [Glob
Negation](https://discourse.llvm.org/t/rfc-support-globpattern-add-operator-to-invert-matches/80683)
- Implement a negation operator to the GlobPattern class so the
ignorelist query can use them to simulate allowlisting
Please let me know which of the three options we like best. They are not
necessarily mutually exclusive.
Here's [another related
PR](https://github.com/llvm/llvm-project/pull/86618) which implements a
`wraps` attribute. This can accomplish a similar goal to this PR but
requires in-source changes to codebases and also covers a wider variety
of integer definedness problems.
### CCs
@kees @vitalybuka @bwendling
---------
Signed-off-by: Justin Stitt <justinstitt at google.com>
Commit: 263775c0fd721d09e6205cd77c7c0cf72003966c
https://github.com/llvm/llvm-project/commit/263775c0fd721d09e6205cd77c7c0cf72003966c
Author: David Green <david.green at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/load.ll
Log Message:
-----------
[AArch64] Extend and cleanup load.ll test. NFC
Adds some sext/zext variants of the scalar tests.
Commit: cec147ae5cb9debd74cc3dc2bca12e8cd8a30831
https://github.com/llvm/llvm-project/commit/cec147ae5cb9debd74cc3dc2bca12e8cd8a30831
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/asan/tests/CMakeLists.txt
M compiler-rt/lib/asan/tests/asan_oob_test.cpp
M compiler-rt/lib/asan/tests/asan_test.cpp
M compiler-rt/test/asan/CMakeLists.txt
M compiler-rt/test/asan/TestCases/zero_page_pc.cpp
M compiler-rt/test/sanitizer_common/CMakeLists.txt
M compiler-rt/test/ubsan/CMakeLists.txt
Log Message:
-----------
[ASan][test] Enable ASan tests on SPARC (#107405)
With PR #107223 and PR #107403, ASan testing can be enabled on SPARC.
This patch does so, 32-bit only on both Solaris and Linux. There is no
64-bit support even in GCC.
Apart from the obvious CMake changes, this patch includes a couple of
testcase adjustments necessary for SPARC:
- In `asan_oob_test.cpp`, the `OOB_int` subtest needs to be disabled: it
performs unaligned accesses that cannot work on a strict-alignment
target like SPARC.
- `asan_test.cpp` needs to disable subtests that depend on support for
`__builtin_setjmp` and `__builtin_longjmp`.
- `zero_page_pc.cpp` reports `0x5` as the faulting address on access to
`0x4`. I don't really know why, but it's consistent between Solaris and
Linux.
Tested on `sparcv9-sun-solaris2.11` and `sparc64-unknown-linux-gnu`.
Commit: 7ceb19e599fb42aeb103261425077dd10acbeae4
https://github.com/llvm/llvm-project/commit/7ceb19e599fb42aeb103261425077dd10acbeae4
Author: Qiu Chaofan <qcf at ecnelises.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/builtin_set_flt_rounds.c
Log Message:
-----------
[PowerPC] Support set_flt_rounds builtin (#73750)
Commit: 4f740f9d77cd038c8e55195fa189748e58ea6476
https://github.com/llvm/llvm-project/commit/4f740f9d77cd038c8e55195fa189748e58ea6476
Author: Xi Ruoyao <xry111 at xry111.site>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
M clang/include/clang/Basic/BuiltinsLoongArchLSX.def
M clang/test/Headers/lasxintrin.c
M clang/test/Headers/lsxintrin.c
Log Message:
-----------
[LoongArch][Clang] Make the parameters and return value of {x,}vxor.v builti ns `unsigned char` vectors (#114513)
The lsxintrin.h and and lasxintrin.h headers uses `unsigned char`
vectors instead of `signed char` vectors. GCC also uses `unsigned char`
for them, so align their definition with the headers and GCC.
Fixes #110834.
Depends on #114512.
Commit: daa9af179f5967e90cd45cec35ead793a4166679
https://github.com/llvm/llvm-project/commit/daa9af179f5967e90cd45cec35ead793a4166679
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
A llvm/test/Transforms/FunctionSpecialization/ssa-copy.ll
Log Message:
-----------
[FuncSpec] Handle ssa_copy intrinsic calls in InstCostVisitor (#114247)
Look through ssa_copy intrinsic calls when computing codesize bonus for
a specialization.
Also remove redundant logic to skip computing codesize bonus for
ssa_copy intrinsics, now these are considered zero-cost by TTI (in PR
#75294).
Commit: 8851ea64a5d01fbf406383f13fcba347e730bc2d
https://github.com/llvm/llvm-project/commit/8851ea64a5d01fbf406383f13fcba347e730bc2d
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
A llvm/test/Transforms/ConstantHoisting/ARM/apint-assert.ll
Log Message:
-----------
[ConstantHoist] Fix APInt ctor assertion
The result here may require truncation. Fix this by removing the
calculateOffsetDiff() helper entirely. As far as I can tell, this
code does not actually have to deal with different bitwidths.
findBaseConstants() will produce ranges of constants with equal
types, which is what maximizeConstantsInRange() will then work
on.
Fixes assertion reported at:
https://github.com/llvm/llvm-project/pull/114539#issuecomment-2453008679
Commit: ac1869aa70a8cb0e22679fd6eabbb30c101d22bc
https://github.com/llvm/llvm-project/commit/ac1869aa70a8cb0e22679fd6eabbb30c101d22bc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/reduction.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll
M llvm/test/Transforms/PhaseOrdering/X86/horiz-math-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/horiz-math.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll
Log Message:
-----------
[CostModel][X86] Add initial costs for non-lane-crossing one/two input shuffles (#114680)
Most of the x86 shuffle instructions operate within each 128-bit subvector lane, but our shuffle costs struggle to handle this and have to fallback to worst case shuffles that reference elements from any lane.
This patch detects shuffle masks that we know are "inlane" and enable us to assume a cheaper shuffle cost.
Commit: 90764582872bc4bd9613646b347b49c60ce2bc72
https://github.com/llvm/llvm-project/commit/90764582872bc4bd9613646b347b49c60ce2bc72
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/wsloop-simd.f90
Log Message:
-----------
Revert "[Flang][OpenMP] Disable lowering of omp.simd reductions in co… (#113683)
…mposites (#112686)"
Lowering of reductions in composite operations can now be re-enabled,
since previous commits in this PR stack fix the MLIR representation
produced and it no longer triggers a compiler crash during translation
to LLVM IR.
This reverts commit c44860c8d2582abd88794267b4fa0fa953bbef80.
Commit: f1888e4029ec2bf657a072518dcc1c9b461559be
https://github.com/llvm/llvm-project/commit/f1888e4029ec2bf657a072518dcc1c9b461559be
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libclc/generic/include/clc/clc.h
M libclc/generic/include/clc/clcmacros.h
Log Message:
-----------
[libclc] Add some include guards and format a file
Commit: e28d7f713471cf33908a0fe5223f480dfd9b06f0
https://github.com/llvm/llvm-project/commit/e28d7f713471cf33908a0fe5223f480dfd9b06f0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libclc/generic/lib/math/clc_tan.cl
Log Message:
-----------
[libclc] Format clc_tan.cl. NFC
Commit: 4aaa92578686176243a294eeb2ca5697a99edcaa
https://github.com/llvm/llvm-project/commit/4aaa92578686176243a294eeb2ca5697a99edcaa
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
Log Message:
-----------
[llvm][CodeExtractor] fix bug in parameter naming (#114237)
The code extractor tries to apply the names of source input and output
values to function arguments. Not all input and output values get added
as arguments: some are instead placed inside of a struct passed to the
function. The existing renaming code skipped trying to set these
struct-packed arguments names (as there is no corresponding function
argument to rename), but it still incremented the iterator over the
function arguments. This could result in dereferencing an end iterator
if struct-packed inputs/outputs preceded non-struct-packed
inputs/outputs.
This patch rewrites this loop to avoid the end iterator dereference.
Commit: eee8718e26b4ce8972abefc35d2beae96521075f
https://github.com/llvm/llvm-project/commit/eee8718e26b4ce8972abefc35d2beae96521075f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/optional/TestDataFormatterLibcxxOptionalSimulator.py
Log Message:
-----------
[lldb][test] TestDataFormatterLibcxxOptionalSimulator.py: skip on Clang-17
A Clang change introduced in this version breaks this test. Said
change was reverted in `52a9ba7ca4fb9427706c28bb3ca15f7a56eecf3f`
in newer versions of Clang.
Commit: 5e75880165553e9afb721239689a9c79ec84a108
https://github.com/llvm/llvm-project/commit/5e75880165553e9afb721239689a9c79ec84a108
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/load-store.ll
M llvm/test/CodeGen/PowerPC/big-endian-store-forward.ll
Log Message:
-----------
CodeGen/test: improve a test, regen with UTC (#113338)
Commit: 5ed3f463597700f6e41a16047c8bad2309aae12c
https://github.com/llvm/llvm-project/commit/5ed3f463597700f6e41a16047c8bad2309aae12c
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
A llvm/test/Transforms/FunctionSpecialization/cmp-with-range.ll
Log Message:
-----------
[FuncSpec] Improve handling of Comparison Instructions (#114073)
When visiting comparison instructions during computation of a
specializations's bonus, make use of information from the lattice value
of the other operand in the case where we have not found this to have a
specific constant value.
Commit: 5f30b1aae0a3e2d3c4c9a50ef4af9457fbea094f
https://github.com/llvm/llvm-project/commit/5f30b1aae0a3e2d3c4c9a50ef4af9457fbea094f
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/unittests/Transforms/IPO/FunctionSpecializationTest.cpp
Log Message:
-----------
[FuncSpec] Improve handling of BinaryOperator instructions (#114534)
When visiting BinaryOperator instructions during estimation of codesize
savings for a candidate specialization, don't bail when the other
operand is not found to be constant. This allows us to find more
constants than we otherwise would, for example `and(false, x)`.
Commit: afa23ea03741193e36b05ddd508d38a90a18a8b8
https://github.com/llvm/llvm-project/commit/afa23ea03741193e36b05ddd508d38a90a18a8b8
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrCompiler.td
A llvm/test/CodeGen/X86/tls-function-argument.ll
Log Message:
-----------
[X86] Insert CALLSEQ when lowering GlobalTLSAddress for ELF targets (#113706)
When lowering a TLS address for an ELF target, we introduce a call to
obtain the TLS base address. So far, we do not insert CALLSEQ_START/END
markers around this call when it is generated, but use a custom inserter
to insert them in a later phase. This is problematic, since the TLS
address call can land in a CALLSEQ for another call before it is
wrapped in its own CALLSEQ. That results in nested CALLSEQs, which are
illegal and cause errors when expensive checks are enabled, e.g., in
issues #45574 and #98042.
This patch instead wraps each TLS address call in a CALLSEQ when it is
generated so that instruction selection can avoid nested CALLSEQs. This
is an alternative to PR #106965, which instead changes the custom
inserter to avoid generating CALLSEQs when the TLS address call is
already in a CALLSEQ.
This patch also effectively reverts commit
[228978c](https://github.com/llvm/llvm-project/commit/228978c0dcfc9a9793f3dc8a69f42471192223bc),
which introduced the CustomInserter that so far added the CALLSEQ around
TLSAddrs.
Fixes #45574 and #98042.
Commit: f96ea8983b8edc941107c7df2e4f08b44a1663d0
https://github.com/llvm/llvm-project/commit/f96ea8983b8edc941107c7df2e4f08b44a1663d0
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/docs/APINotes.rst
Log Message:
-----------
[APINotes] Document immortal reference type annotation
API Notes allow annotating a C++ reference type with its retain/release
operations. These are honored by the Swift compiler when the type is
used from Swift. Apart from names of C++ functions that need to be
called to retain/release the object, API Notes also accept a value of
`immortal` which indicates that the object is to be considered alive for
the duration of the program.
Commit: b4ef43fc75dfeea76d4d968553858b2820420e58
https://github.com/llvm/llvm-project/commit/b4ef43fc75dfeea76d4d968553858b2820420e58
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libclc/generic/lib/math/clc_fma.cl
Log Message:
-----------
[libclc] Format clc_fma.cl. NFC
Commit: 17d8ed717fced72ed313ee7553309345630b0097
https://github.com/llvm/llvm-project/commit/17d8ed717fced72ed313ee7553309345630b0097
Author: Sam McCall <sam.mccall at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/AST/Type.cpp
A clang/test/SemaCXX/nullability_redecl.cpp
Log Message:
-----------
[clang] Make nullability-on-classes more robust to redeclarations (#114778)
This is relevant after b24650e814e55d90acfc40acf045456c98f32b9c where
the selected template decl can be anything, even apparently a friend
declaration in some cases.
Commit: e41df5cb8e34f471da351d6e78c0e47e3639fd12
https://github.com/llvm/llvm-project/commit/e41df5cb8e34f471da351d6e78c0e47e3639fd12
Author: Nathan Gauër <brioche at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
A llvm/test/CodeGen/SPIRV/decoration-order.ll
Log Message:
-----------
[SPIR-V] Fix OpDecorate emission after vreg def. (#114426)
In SPIR-V, OpDecorate instructions are allowed to forward-declare a
virtual register. But while we are at the MIR level, we must comply with
stricter rules, meaning OpDecorate should be emited after, not before
the reg definition.
(In some cases, we defined those just before, switching to just after).
Related to #110652
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: a15bf88d532ad2e81d7c54c480707f6c7d8bbeab
https://github.com/llvm/llvm-project/commit/a15bf88d532ad2e81d7c54c480707f6c7d8bbeab
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
Log Message:
-----------
[SLP][NFC]Add a test with missing freeze instruction before reduction, NFC
Commit: 7d3536840528bb91b6ff90c86084f7879459c450
https://github.com/llvm/llvm-project/commit/7d3536840528bb91b6ff90c86084f7879459c450
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
Log Message:
-----------
[RISCV] Lower vector_shuffle for bf16 (#114731)
This is much the same as with f16. Currently we scalarize if there's no
zvfbfmin, and crash if there is zvfbfmin because it will try to create a
bf16 build_vector, which we also can't lower.
Commit: 7bf0d6d032c5ef04a0f4966df8760664aaefc871
https://github.com/llvm/llvm-project/commit/7bf0d6d032c5ef04a0f4966df8760664aaefc871
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpstore.ll
Log Message:
-----------
[RISCV] Lower fixed-length strided VP loads and stores for zvfhmin/zvfbfmin (#114750)
Similarly to #114731, these don't actually require any instructions from
the extensions.
The motivation for this and #114731 is to eventually enable
isLegalElementTypeForRVV for f16 with zvfhmin and bf16 with zvfbfmin in
order to enable scalable vectorization.
Although the scalable codegen support for f16 and bf16 is now complete
enough for anything the loop vectorizer may emit, enabling
isLegalElementTypeForRVV would make certian hooks like
isLegalInterleavedAccessType and isLegalStridedLoadStore return true for
f16 and bf16. This means SLP would start emitting these intrinsics, so
we need to add fixed-length codegen support.
Commit: f1c341c36f1a8582163217196abf7401f81a4d2b
https://github.com/llvm/llvm-project/commit/f1c341c36f1a8582163217196abf7401f81a4d2b
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/include/__split_buffer
M libcxx/include/__vector/vector.h
M libcxx/include/deque
Log Message:
-----------
[libc++] Refactor __split_buffer to eliminate code duplication (#114138)
This PR refactors the `__split_buffer` class to eliminate code
duplication in the `push_back` and `push_front` member functions.
**Motivation:**
The lvalue and rvalue reference overloads of `push_back` share identical
logic, which coincides with that of `emplace_back`. Similarly, the
overloads of `push_front` also share identical logic but lack an
`emplace_front` member function, leading to an inconsistency. These
identical internal logics lead to significant code duplication, making
future maintenance more difficult.
**Summary of Refactor:**
This PR reduces code redundancy by:
1. Modifying both overloads of `push_back` to call `emplace_back`.
2. Introducing a new `emplace_front` member function that encapsulates
the logic of `push_front`, allowing both overloads of `push_front` to
call it (The addition of `emplace_front` also avoids the inconsistency
regarding the absence of `emplace_front`).
The refactoring results in reduced code duplication, improved
maintainability, and enhanced readability.
Commit: fb30208d1e4c2c1ba34c331f6f90a99552d2df97
https://github.com/llvm/llvm-project/commit/fb30208d1e4c2c1ba34c331f6f90a99552d2df97
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Floating.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
Log Message:
-----------
[clang][bytecode][NFC] Make Floating::bitcastToMemory const (#114777)
The other functions like this are also const.
Commit: 7bc10b920aa9521765ac523fe7423fc4c2b21114
https://github.com/llvm/llvm-project/commit/7bc10b920aa9521765ac523fe7423fc4c2b21114
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/include/__utility/pair.h
Log Message:
-----------
[libc++] Remove a few includes from pair.h (#114708)
Commit: ee29eb19f01bb6a0622e3e5112760228d0944188
https://github.com/llvm/llvm-project/commit/ee29eb19f01bb6a0622e3e5112760228d0944188
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/load-store.ll
Log Message:
-----------
CodeGen/NVPTX: regen a test, fixing build (#114779)
Commit: 45ae7d166ddf7265eddcfe9d0969a3408a2c7384
https://github.com/llvm/llvm-project/commit/45ae7d166ddf7265eddcfe9d0969a3408a2c7384
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
Log Message:
-----------
[SPIRV] Fix assert in `getOrCreateBaseRegister` for `i32 -1` (#114630)
When trying to create a const inst from a 32 bit signed value, we don't
want to sign-extend it to 64 bits, as the resulting value won't actually
fit in an `i32` if it was negative.
This fixes crashes in the following two tests after the APInt
constructor asserts were enabled in #114539:
```
Failed Tests (2):
LLVM :: CodeGen/SPIRV/transcoding/RelationalOperators.ll
LLVM :: CodeGen/SPIRV/uitofp-with-bool.ll
```
Commit: 310bb3b9a0b679094ff05562b97e14bf6986c071
https://github.com/llvm/llvm-project/commit/310bb3b9a0b679094ff05562b97e14bf6986c071
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/tools/dxil-dis/BasicIR.ll
M llvm/test/tools/dxil-dis/attribute-filter.ll
M llvm/test/tools/dxil-dis/debug-info.ll
M llvm/test/tools/dxil-dis/opaque-gep.ll
M llvm/test/tools/dxil-dis/opaque-pointers.ll
M llvm/test/tools/dxil-dis/opaque-value_as_metadata.ll
M llvm/test/tools/dxil-dis/shuffle.ll
Log Message:
-----------
[DirectX] Fix broken dxil-dis tests after #106146 (#114629)
In ab7518050183 "[DirectX] Remove trivially dead functions at linkage
finalize (#106146)" we updated the compiler to remove DXIL functions
that aren't marked with the "hlsl.export" attribute, but it seems we
forgot to add this attribute to the tests in `tools/dxil-dis`.
Commit: 790cbee34dfd2a840e3ee363725bc5829331ff0f
https://github.com/llvm/llvm-project/commit/790cbee34dfd2a840e3ee363725bc5829331ff0f
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[MLIR] Fix a stack-use-after-scope error in OpFormatGen.cpp (#114789)
Commit: 2dd74d4a76a9c32ecfb118371ddfd3d126ab7cd8
https://github.com/llvm/llvm-project/commit/2dd74d4a76a9c32ecfb118371ddfd3d126ab7cd8
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/SMEInstrFormats.td
A llvm/test/MC/AArch64/SME2p2/fmop4a-fp8-fp16-widening-diagnostics.s
A llvm/test/MC/AArch64/SME2p2/fmop4a-fp8-fp16-widening.s
Log Message:
-----------
[AArch64] Add assembly/disassembly for FMOP4A (widening, 2-way, FP8 to FP16) instructions (#113348)
The new instructions are described in
https://developer.arm.com/documentation/ddi0602/2024-09/SME-Instructions
Commit: c0ce44e8fc03882641f270539265b20dba0fffdd
https://github.com/llvm/llvm-project/commit/c0ce44e8fc03882641f270539265b20dba0fffdd
Author: Vadim D. <vvd170501 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/Tooling/Inclusions/Stdlib/StandardLibrary.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
M clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc
M clang/tools/include-mapping/cppreference_parser.py
Log Message:
-----------
[Tooling/Inclusion] Update std symbols mapping (#113612)
Fixes #113494
Commit: 2588b8be5624f721c56f44fd2a69f7327de8c0c1
https://github.com/llvm/llvm-project/commit/2588b8be5624f721c56f44fd2a69f7327de8c0c1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Implement bitcasts to composite types (#114776)
Only fixed-size, non-bitfield integral fields for now.
Commit: 899336735aeb2b41a48b6ac2c895da5e0f22dbf0
https://github.com/llvm/llvm-project/commit/899336735aeb2b41a48b6ac2c895da5e0f22dbf0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
Log Message:
-----------
[SLP]Be more pessimistic about poisonous reductions
Consider all possible reductions ops as being non-poisoning boolean
logical operations, which require freeze to be fully correct.
https://alive2.llvm.org/ce/z/TKWDMP
Fixes #114738
Commit: 2f1a0df72a3cf5b0f927a8c519cf327c4d0d008e
https://github.com/llvm/llvm-project/commit/2f1a0df72a3cf5b0f927a8c519cf327c4d0d008e
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
A clang/test/SemaCXX/PR113855.cpp
Log Message:
-----------
[clang][sema] Fixed a crash when mixture of designated and non-designated initializers in union (#114424)
Fixed: #113855
When the first init element is invalid, StructuredList can be empty.
It cause illegal state if we still set initialized field.
Commit: 227afac307fac0d4c8ac2a3709df415e34629883
https://github.com/llvm/llvm-project/commit/227afac307fac0d4c8ac2a3709df415e34629883
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[Clang] Consider outer instantiation scopes for constraint normalization (#114749)
We need to compare constraint expressions when instantiating a friend
declaration that is lexically defined within a class template. Since the
evaluation is deferred, the expression might refer to untransformed
function parameters such that the substitution needs the mapping of
instantiation.
These mappings are maintained by the function declaration instantiation,
so we need to establish a "transparent" LocalInstantiationScope before
substituting into the constraint.
No release note as this fixes a regression in 19.
Fixes https://github.com/llvm/llvm-project/issues/114685
Commit: a51712751c184ebe056718c938d2526693a31564
https://github.com/llvm/llvm-project/commit/a51712751c184ebe056718c938d2526693a31564
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
M llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
M llvm/test/CodeGen/PowerPC/Frames-dyn-alloca.ll
M llvm/test/CodeGen/PowerPC/Frames-large.ll
M llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll
M llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
M llvm/test/CodeGen/PowerPC/aix-dwarf.ll
M llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
M llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
M llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
M llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
M llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
M llvm/test/CodeGen/PowerPC/alloca-oversized.ll
M llvm/test/CodeGen/PowerPC/atomic-float.ll
M llvm/test/CodeGen/PowerPC/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/PowerPC/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/PowerPC/atomics-indexed.ll
M llvm/test/CodeGen/PowerPC/atomics.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.ll
M llvm/test/CodeGen/PowerPC/fma-assoc.ll
M llvm/test/CodeGen/PowerPC/fptoui-be-crash.ll
M llvm/test/CodeGen/PowerPC/frounds.ll
M llvm/test/CodeGen/PowerPC/ftrunc-legalize.ll
M llvm/test/CodeGen/PowerPC/hoist-logic.ll
M llvm/test/CodeGen/PowerPC/huge-frame-call.ll
M llvm/test/CodeGen/PowerPC/inc-of-add.ll
M llvm/test/CodeGen/PowerPC/kill_flag_verification.ll
M llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
M llvm/test/CodeGen/PowerPC/legalize-vaarg.ll
M llvm/test/CodeGen/PowerPC/licm-tocReg.ll
A llvm/test/CodeGen/PowerPC/llc_default_cpu.ll
M llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll
M llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll
M llvm/test/CodeGen/PowerPC/noredzone.ll
M llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll
M llvm/test/CodeGen/PowerPC/popcnt-zext.ll
M llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll
M llvm/test/CodeGen/PowerPC/ppc64-nest.ll
M llvm/test/CodeGen/PowerPC/ppc64-stackmap-nops.ll
M llvm/test/CodeGen/PowerPC/ppc64-varargs.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/ppcsoftops.ll
M llvm/test/CodeGen/PowerPC/pr43976.ll
M llvm/test/CodeGen/PowerPC/pr47660.ll
M llvm/test/CodeGen/PowerPC/pr74951.ll
M llvm/test/CodeGen/PowerPC/stack-clash-dynamic-alloca.ll
M llvm/test/CodeGen/PowerPC/stack-clash-prologue.ll
M llvm/test/CodeGen/PowerPC/stack-restore-with-setjmp.ll
M llvm/test/CodeGen/PowerPC/store-forward-be32.ll
M llvm/test/CodeGen/PowerPC/store-forward-be64.ll
M llvm/test/CodeGen/PowerPC/sub-of-not.ll
M llvm/test/CodeGen/PowerPC/toc-data-common.ll
M llvm/test/CodeGen/PowerPC/toc-data-const.ll
M llvm/test/CodeGen/PowerPC/toc-data.ll
M llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/PowerPC/vec-trunc2.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
M llvm/test/DebugInfo/XCOFF/empty.ll
M llvm/test/DebugInfo/XCOFF/explicit-section.ll
M llvm/test/DebugInfo/XCOFF/function-sections.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.generated.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.nogenerated.expected
M llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll
M llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands2.ll
Log Message:
-----------
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
Utilize common API in PPCTargetParser
(https://github.com/llvm/llvm-project/pull/97541) to set default CPU
with same interfaces for LLC.
This will update AIX default CPU to pwr7 and LoP powerppc64 default CPU
to ppc64.
Commit: 0653698d8637b8d565cbf59de591e2d8c61c20cc
https://github.com/llvm/llvm-project/commit/0653698d8637b8d565cbf59de591e2d8c61c20cc
Author: NimishMishra <42909663+NimishMishra at users.noreply.github.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
A flang/test/Lower/OpenMP/Todo/task_detach.f90
A flang/test/Parser/OpenMP/task.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Add parsing support for Task detach (#112312)
Add parsing support for task detach, along with parse/unparse tests.
Commit: 5d7afd324ad23e7b44ba82dbf38287e02002ceec
https://github.com/llvm/llvm-project/commit/5d7afd324ad23e7b44ba82dbf38287e02002ceec
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/arm64ec-entry-mangle.test
Log Message:
-----------
[LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (#114466)
Commit: a58c3d3ac7c6b2fd9710ab2189d7971ef37e714f
https://github.com/llvm/llvm-project/commit/a58c3d3ac7c6b2fd9710ab2189d7971ef37e714f
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
Log Message:
-----------
Use `std::move` to avoid copy (#113055)
Commit: f8559751fc2b15b45ac417be9abe865085af45ad
https://github.com/llvm/llvm-project/commit/f8559751fc2b15b45ac417be9abe865085af45ad
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/test/Analysis/malloc.c
M lld/test/Unit/lit.cfg.py
M llvm/docs/HistoricalNotes/2001-05-18-ExceptionHandling.txt
M llvm/docs/HistoricalNotes/2002-05-12-InstListChange.txt
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/test/CodeGen/AArch64/i128-fast-isel-fallback.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
M llvm/test/Transforms/IROutliner/included-phi-nodes-end.ll
M llvm/test/Transforms/IROutliner/region-inputs-in-phi-nodes.ll
M llvm/test/Transforms/InstSimplify/ConstProp/2002-03-11-ConstPropCrash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/2002-05-03-DivideByZeroException.ll
M llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
M llvm/test/Unit/lit.cfg.py
M llvm/utils/TableGen/jupyter/tablegen_kernel/kernel.py
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[llvm-project] Fix typo "propogate" (#114795)
Commit: 0713bf9cc34e75572058b46f712d37031762fa9d
https://github.com/llvm/llvm-project/commit/0713bf9cc34e75572058b46f712d37031762fa9d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Inline small functions inside vector (#114567)
This helps with readability since the reader doesn't need to jump around
a bunch of times only to read functions that are implemented in 1 or 2
lines of code.
Commit: dfe737f231d7162ea5658df3b97fd71cc39441d8
https://github.com/llvm/llvm-project/commit/dfe737f231d7162ea5658df3b97fd71cc39441d8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/docs/Hardening.rst
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__configuration/abi.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/incomplete.sh.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.observers/assert.subscript.pass.cpp
Log Message:
-----------
[libc++] Apply post-commit review comments for unique_ptr<T[]> hardening (#111704)
Commit: 8b19d29a3f254505cf0981af6c3d8d9e6f9626fc
https://github.com/llvm/llvm-project/commit/8b19d29a3f254505cf0981af6c3d8d9e6f9626fc
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/docs/Status/FormatIssues.csv
M libcxx/docs/Status/FormatPaper.csv
Log Message:
-----------
[libc++] remove minor version in status pages (#113241)
Minor version of releases starts at `N.1.0` for all releases since 4532617ae42005.
The current status pages are not terribly wrong (the version during
development can be considered `N.0`), but still it's kinda weird to use
versions that never get released as the lower bound.
Commit: 9a211fe7e49b8b1376772a40ca31153fb7d504dd
https://github.com/llvm/llvm-project/commit/9a211fe7e49b8b1376772a40ca31153fb7d504dd
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
A llvm/test/TableGen/ArtificialSubregs.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Fix concatenation of subreg and artificial subregs (#114391)
When CoveredBySubRegs is true and a sub-register consists of two
parts; a regular subreg and an artificial subreg, then TableGen
should consider only concatenating the non-artificial subregs.
For example, S0_S1 is a concatenated subreg from D0_D1,
but S0_S1_HI should not be considered.
Commit: 3e8a8fce4aea14e7475c3ebf22227401e33bfe02
https://github.com/llvm/llvm-project/commit/3e8a8fce4aea14e7475c3ebf22227401e33bfe02
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
Log Message:
-----------
ValueTracking: clarify isNotCrossLaneOperation (NFC) (#112375)
Clarify the distinction between lanewise operations, and operations that
do not cross vector lanes, with an example, in the header comment.
Commit: cd16b077bf4bc6d55e06c41fa0f6774ac05dcb56
https://github.com/llvm/llvm-project/commit/cd16b077bf4bc6d55e06c41fa0f6774ac05dcb56
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/IR/Instructions.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/edge.ll
Log Message:
-----------
IR: introduce CmpInst::isEquivalence (#111979)
Steal impliesEquivalanceIf{True,False} (sic) from GVN, and extend it for
floating-point constant vectors, and accounting for denormal values.
Since InstCombine also performs GVN-like replacements, introduce
CmpInst::isEquivalence, and remove the corresponding code in GVN, with
the intent of using it in more places.
The code in GVN also has a bad FIXME saying that the optimization may be
valid in the nsz case, but this is not the case.
Alive2 proof: https://alive2.llvm.org/ce/z/vEaK8M
Commit: 3268d51a5c81be705a97216bf061fab9bb195ebe
https://github.com/llvm/llvm-project/commit/3268d51a5c81be705a97216bf061fab9bb195ebe
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
Log Message:
-----------
[clang][bytecode][NFC] Fix a possible build warning (#114800)
InterpBuiltinBitCast.cpp:95:3: warning: non-void function does not
return a value in all control paths [-Wreturn-type]
95 | }
| ^
1 warning generated.
Commit: ae0ab2486287a914d9506ac2ff73e41063bf9a7e
https://github.com/llvm/llvm-project/commit/ae0ab2486287a914d9506ac2ff73e41063bf9a7e
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/TableGen/ArtificialSubregs.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392)
TableGen builds up a map of "SubRegIdx -> Subclass" where Subclass is
the largest class where all registers have SubRegIdx as a sub-register.
When SubRegIdx (vis-a-vis the sub-register) is artificial it should
still include it in the map. This map is used in various places,
including in the calculation of the Lanemask of a register class, which
otherwise calculates an incorrect lanemask.
Commit: 1f55d771894e6f95c5401d8fec5c83538a6b8e9f
https://github.com/llvm/llvm-project/commit/1f55d771894e6f95c5401d8fec5c83538a6b8e9f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove unused parameter from pushData() (#114801)
Commit: 7da9da0b1902fe04985753d20dd37a9edd05dd41
https://github.com/llvm/llvm-project/commit/7da9da0b1902fe04985753d20dd37a9edd05dd41
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/test/test_demangle.pass.cpp
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/unittests/Demangle/PartialDemangleTest.cpp
Log Message:
-----------
[demangler] Enhance demangling in llvm-cxxfilt for fixed-point types. (#114257)
This patch adds support for fixed-point type in demanger.
Closes #114090.
Commit: b5dc7b8fc2a2884350f27e78410a4342555f2979
https://github.com/llvm/llvm-project/commit/b5dc7b8fc2a2884350f27e78410a4342555f2979
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm-c/Core.h
M llvm/lib/IR/Core.cpp
Log Message:
-----------
[LLVM] Change `LLVMIntrinsicCopyOverloadedName` API return type (#114334)
Change the return type of `LLVMIntrinsicCopyOverloadedName` and
`LLVMIntrinsicCopyOverloadedName2` to `char *` instead of `const char *`
since the returned memory is owned by the caller and we expect that the
returned pointer is passed to free to deallocate it (without casting it
back to non-const pointer).
Commit: 293c78ba0a93cb03238a909c96dcd399e685f575
https://github.com/llvm/llvm-project/commit/293c78ba0a93cb03238a909c96dcd399e685f575
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
A libclc/clc/include/clc/math/clc_ceil.h
A libclc/clc/include/clc/math/clc_fabs.h
A libclc/clc/include/clc/math/clc_floor.h
A libclc/clc/include/clc/math/clc_rint.h
A libclc/clc/include/clc/math/clc_trunc.h
A libclc/clc/include/clc/math/unary_decl.inc
A libclc/clc/include/clc/math/unary_intrin.inc
A libclc/clc/include/clc/utils.h
R libclc/generic/include/clc/math/unary_decl.inc
R libclc/generic/include/math/unary_intrin.inc
M libclc/generic/lib/clcmacro.h
M libclc/generic/lib/math/ceil.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/clc_sqrt.cl
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/math/fabs.cl
M libclc/generic/lib/math/floor.cl
M libclc/generic/lib/math/native_unary_intrinsic.inc
M libclc/generic/lib/math/rint.cl
M libclc/generic/lib/math/round.cl
M libclc/generic/lib/math/trunc.cl
Log Message:
-----------
[libclc] Move ceil/fabs/floor/rint/trunc to CLC library (#114774)
These functions are all mapped to LLVM intrinsics.
The clspv and spirv targets don't declare or define any of these CLC
functions, and instead map these to their corresponding OpenCL symbols.
Commit: 01463a269eb359219886f5b5b81d7f262868151f
https://github.com/llvm/llvm-project/commit/01463a269eb359219886f5b5b81d7f262868151f
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/stack-guard-global.ll
M llvm/test/CodeGen/PowerPC/stack-guard-tls.ll
M llvm/test/CodeGen/PowerPC/uaddo-64.ll
Log Message:
-----------
Fixed test case error which caused the default cpu is changed from generic to ppc64 for triple powerpc64 (#114828)
[Summary]
Fixed test case error in the
https://lab.llvm.org/buildbot/#/builders/33/builds/5801 which
caused by the commit https://github.com/llvm/llvm-project/pull/113943
Commit: 1c6ec29b6bf86709384049660c69cc2d31e356b2
https://github.com/llvm/llvm-project/commit/1c6ec29b6bf86709384049660c69cc2d31e356b2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/Todo/from-expectation-modifier.f90
A flang/test/Lower/OpenMP/Todo/from-iterator-modifier.f90
A flang/test/Lower/OpenMP/Todo/to-expectation-modifier.f90
A flang/test/Lower/OpenMP/Todo/to-iterator-modifier.f90
A flang/test/Parser/OpenMP/declare-target-to-clause.f90
A flang/test/Parser/OpenMP/from-clause.f90
A flang/test/Parser/OpenMP/target-update-to-clause.f90
A flang/test/Semantics/OpenMP/from-clause-v45.f90
A flang/test/Semantics/OpenMP/from-clause-v51.f90
A flang/test/Semantics/OpenMP/to-clause-v45.f90
A flang/test/Semantics/OpenMP/to-clause-v51.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Parsing support for iterator modifiers in FROM and TO (#114593)
Parse PRESENT modifier as well while we're at it (no MAPPER though). Add
semantic checks for these clauses in the TARGET UPDATE construct, TODO
messages in lowering.
Commit: 7c69491e486a93e8b86a390a0d5d580eeca7f7d5
https://github.com/llvm/llvm-project/commit/7c69491e486a93e8b86a390a0d5d580eeca7f7d5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/include/__type_traits/aligned_storage.h
Log Message:
-----------
[libc++] Simplify aligned_storage (#114665)
The main template of `aligned_storage` is only ever used when we have
extremely overaligned types (> 16384), so we effectively only ever use
the specializations currently. This means that we only instantiate the
main template for overaligned types. Instead of doing this dance, we can
just define the main template to use `_ALIGNAS`, just like the
specializations. This makes the implementation of `aligned_storage`
significantly less confusing.
Commit: 074209034f1c6193b37af004bb622683e84a1648
https://github.com/llvm/llvm-project/commit/074209034f1c6193b37af004bb622683e84a1648
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
M llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
Log Message:
-----------
[llvm-exegesis] Use older instructions to load lower vregs (#114768)
This patch makes X86 llvm-exegesis unconditionally use older
instructions to load the lower vector registers, rather than trying to
use AVX512 for everything when available. This fixes a case where we
would try and load AVX512 registers using the older instructions if such
a snippet was constructed while -mcpu was set to something that did not
support AVX512. This would lead to a machine code verification error
rather than resulting in incomplete snippet setup, which seems to be the
intention of how this should work.
Fixes #114691.
Commit: 3f3953a6e29ce52c0af767150cff3d5acde497e8
https://github.com/llvm/llvm-project/commit/3f3953a6e29ce52c0af767150cff3d5acde497e8
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Shafik and hstk30 as maintainers for issue triage (#114781)
Both volunteered for this role. Shafik has been actively performing
these duties for a while and hstk30 is interested in volunteering in
this space to help out.
Commit: 0ac2e42227ff565a8eab4c7c65c3ddb36aff3409
https://github.com/llvm/llvm-project/commit/0ac2e42227ff565a8eab4c7c65c3ddb36aff3409
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/scmp.ll
Log Message:
-----------
[DAG] SimplifyDemandedBits - ignore SRL node if we're just demanding known sign bits (#114805)
Check to see if we are only demanding (shifted) signbits from a SRL node that are also signbits in the source node.
We can't demand any upper zero bits that the SRL will shift in (up to max shift amount), and the lower demanded bits bound must already be all signbits.
Same fold as #114389 which added this for SimplifyMultipleUseDemandedBits
Commit: 30dd1297fa2cc172ef7a1435775010d7efd673fd
https://github.com/llvm/llvm-project/commit/30dd1297fa2cc172ef7a1435775010d7efd673fd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Transforms/Utils/LowerAtomic.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-integer-ops-0-to-add-0.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll
Log Message:
-----------
AMDGPU: Custom expand flat cmpxchg which may access private (#109410)
64-bit flat cmpxchg instructions do not work correctly for scratch
addresses, and need to be expanded as non-atomic.
Allow custom expansion of cmpxchg in AtomicExpand, as is
already the case for atomicrmw.
Commit: 76c16651c9f003332bff473d6703cf5bef367c99
https://github.com/llvm/llvm-project/commit/76c16651c9f003332bff473d6703cf5bef367c99
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang] Fix warnings
This patch fixes:
flang/lib/Semantics/check-omp-structure.cpp:286:27: error: lambda
capture 'this' is not used [-Werror,-Wunused-lambda-capture]
flang/lib/Semantics/check-omp-structure.cpp:299:21: error: private
field 'sctx_' is not used [-Werror,-Wunused-private-field]
Commit: d6344c1cd0d099f8d99ee320f33fc9254dbe8288
https://github.com/llvm/llvm-project/commit/d6344c1cd0d099f8d99ee320f33fc9254dbe8288
Author: Steven Perron <stevenperron at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
Log Message:
-----------
[HLSL][SPIRV] Add HLSL type translation for spirv. (#114273)
This commit partially implements SPIRTargetCodeGenInfo::getHLSLType. It
can now generate the spirv type for the following HLSL types:
1. RWBuffer
2. Buffer
3. Sampler
---------
Co-authored-by: Nathan Gauër <github at keenuts.net>
Commit: bc3c83fe789ae6041289a06a2fa22b750fc8956c
https://github.com/llvm/llvm-project/commit/bc3c83fe789ae6041289a06a2fa22b750fc8956c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/tools/sancov/sancov.cpp
Log Message:
-----------
[sancov] Use heterogeneous lookups with std::map (NFC) (#113406)
Commit: 5d6cb6f78ac93aedcf96e3a3bca61401a2177f31
https://github.com/llvm/llvm-project/commit/5d6cb6f78ac93aedcf96e3a3bca61401a2177f31
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
Log Message:
-----------
[mlir] Simplify code with MapVector::operator[] (NFC) (#113407)
Commit: 186dc9a4dfd8ab667c601c76b741e0e4551ad138
https://github.com/llvm/llvm-project/commit/186dc9a4dfd8ab667c601c76b741e0e4551ad138
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#113414)
Commit: d3d8103d533280f322383e35cf5a9fe3075e236c
https://github.com/llvm/llvm-project/commit/d3d8103d533280f322383e35cf5a9fe3075e236c
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M openmp/runtime/src/ompt-general.cpp
Log Message:
-----------
[OpenMP] Using `SimpleVLA` to handle vla usage in ompt-general.cpp. (#114583)
The `openmp` runtime failed to build on LoP with LLVM18 on LoP due to
the addition of `-Wvla-cxx-extension` as
```
llvm-project/openmp/runtime/src/ompt-general.cpp:711:15: error: variable length arrays in C++ are a Clang extension [-Werror,-Wvla-cxx-extension]
711 | int tmp_ids[ids_size];
| ^~~~~~~~
llvm-project/openmp/runtime/src/ompt-general.cpp:711:15: note: function parameter 'ids_size' with unknown value cannot be used in a constant expression
llvm-project/openmp/runtime/src/ompt-general.cpp:704:65: note: declared here
704 | OMPT_API_ROUTINE int ompt_get_place_proc_ids(int place_num, int ids_size,
| ^
1 error generated.
```
This patch is to ignore the checking against this usage.
Commit: 2cd32132dbf5ec4a0e62f8fea0cd48420561e970
https://github.com/llvm/llvm-project/commit/2cd32132dbf5ec4a0e62f8fea0cd48420561e970
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
M llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
A llvm/test/CodeGen/PowerPC/aix-inline-asm-clobber-warning.ll
M llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
M llvm/test/CodeGen/PowerPC/inc-of-add.ll
M llvm/test/CodeGen/PowerPC/inline-asm-clobber-warning.ll
M llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
M llvm/test/CodeGen/PowerPC/mflr-store.mir
M llvm/test/CodeGen/PowerPC/peephole-replaceInstr-after-eliminate-extsw.mir
M llvm/test/CodeGen/PowerPC/tocdata-non-zero-addend.mir
Log Message:
-----------
[PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
This patch utilizes getReservedRegs() to find asm clobberable registers.
And to make the result of getReservedRegs() accurate, this patch
implements the todo, which is to make r2 allocatable on AIX for some
leaf functions.
Commit: de87dda2da7febb66bdbaff8328632b1db6c88b1
https://github.com/llvm/llvm-project/commit/de87dda2da7febb66bdbaff8328632b1db6c88b1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/include/__hash_table
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__tuple/make_tuple_types.h
M libcxx/include/new
M libcxx/include/optional
M libcxx/include/variant
M libcxx/test/std/language.support/support.dynamic/ptr.launder/launder.pass.cpp
Log Message:
-----------
[libc++][NFC] Use more appropriate type traits for a few cases (#114025)
Commit: a779dc3754fe6cd2d72766f6313b3e88c0fd7d35
https://github.com/llvm/llvm-project/commit/a779dc3754fe6cd2d72766f6313b3e88c0fd7d35
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Supply default linker scripts (#114546)
Until now, this has been hardcoded as a downstream patch in lld. Add it
to the driver so that the private patch can be removed.
PS5 only. On PS4, the equivalent hardcoded configuration will remain in
the proprietary linker.
SIE tracker: TOOLCHAIN-16704
Commit: c6cce261f5f7e1bdb092374d51e44ab7bc04e769
https://github.com/llvm/llvm-project/commit/c6cce261f5f7e1bdb092374d51e44ab7bc04e769
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Delete ununsed data member, NFC
The `SemanticsContext &sctx_` ended up being unused in the committed
version, but the declaration remained.
Credit to Kazu Hirata for noticing it.
Commit: 4894c67230135c8cb177c0bff45a99c8bf09cefe
https://github.com/llvm/llvm-project/commit/4894c67230135c8cb177c0bff45a99c8bf09cefe
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
[HLSL] add IsTypedResourceElementCompatible type trait (#113730)
This PR implements a new type trait as a builtin,
`__builtin_hlsl_is_typed_resource_element_compatible`
This type traits verifies that the given input type is suitable as a
typed resource element type.
It checks that the given input type is homogeneous, has no more than 4
sub elements, does not exceed 16 bytes, and does not contain any arrays,
booleans, or enums.
Fixes #113223
Commit: 002a0a27bc4702d6f34434c1838cb1698a0b0098
https://github.com/llvm/llvm-project/commit/002a0a27bc4702d6f34434c1838cb1698a0b0098
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
Log Message:
-----------
AMDGPU: Fix broken frame index expansion for v_add_co_u32_e64 (#114634)
With an explicit carry out operand, one too many operands were deleted
resulting in a malformed v_mov_b32.
Commit: 95a2eb70cf850597a5e871380807911e55f341a7
https://github.com/llvm/llvm-project/commit/95a2eb70cf850597a5e871380807911e55f341a7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
A libcxx/test/configs/amdgpu-libc++-shared.cfg.in
A libcxx/test/configs/nvptx-libc++-shared.cfg.in
M libcxx/test/std/containers/sequences/deque/deque.modifiers/insert_range.pass.cpp
M libcxx/test/std/strings/basic.string/string.modifiers/string_replace/replace_with_range.pass.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libcxx] Add testing configuration for GPU targets (#104515)
Summary:
The GPU runs these tests using the files built from the `libc` project.
These will be placed in `include/<triple>` and `lib/<triple>`. We use
the `amdhsa-loader` and `nvptx-loader` tools, which are also provided by
`libc`. These launch a kernel called `_start` which calls `main` so we
can pretend like GPU programs are normal terminal applications.
We force serial exeuction here, because `llvm-lit` runs way too many
processes in parallel, which has a bad habit of making the GPU drivers
hang or run out of resources. This allows the compilation to be run in
parallel while the jobs themselves are serialized via a file lock.
In the future this can likely be refined to accept user specified
architectures, or better handle including the root directory by exposing
that instead of just `include/<triple>/c++/v1/`.
This currently fails ~1% of the tests on AMDGPU and ~3% of the tests on
NVPTX. This will hopefully be reduced further, and later patches can
XFAIL a lot of them once it's down to a reasonable number.
Future support will likely want to allow passing in a custom
architecture instead of simply relying on `-mcpu=native`.
Commit: 596fd103f896987463d212921421b3e78b6cf051
https://github.com/llvm/llvm-project/commit/596fd103f896987463d212921421b3e78b6cf051
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Share logic to connect predecessors in VPBB/VPIRBB execute (NFC)
This moves the common logic to connect IRBBs created for a VPBB to their
predecessors in the VPlan CFG, making it easier to keep in sync in the
future.
Commit: 2c682272ae7b307ca6e803de1c74baae152ef44c
https://github.com/llvm/llvm-project/commit/2c682272ae7b307ca6e803de1c74baae152ef44c
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
R clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
R clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
Revert "[HLSL] add IsTypedResourceElementCompatible type trait" (#114853)
Reverts llvm/llvm-project#113730
Reverting because test compiler-rt default failed, with:
error: comparison of different enumeration types ('Kind' and
'clang::Type::TypeClass')
Commit: 1c602c5fe5d0a22e9accc08fda4ea50f49938476
https://github.com/llvm/llvm-project/commit/1c602c5fe5d0a22e9accc08fda4ea50f49938476
Author: Roland McGrath <mcgrathr at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libc/include/__llvm-libc-common.h
Log Message:
-----------
[libc] Define away __restrict in C++ without GNU extensions (#114655)
The C99 restrict keyword is spelled __restrict in the libc
headers so it can be parsed by C++ compilers with GNU extensions
that recognize it. When GNU extensions are not available in C++
Commit: 51f7e98d59181ff024481eafd7a8532ae9dbce1b
https://github.com/llvm/llvm-project/commit/51f7e98d59181ff024481eafd7a8532ae9dbce1b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/runtime/CUDA/memory.cpp
Log Message:
-----------
[flang][cuda] Crash if mode is not handled (#114842)
Commit: 8f8e2b732635f03dc646a3c98db0b58a051745b8
https://github.com/llvm/llvm-project/commit/8f8e2b732635f03dc646a3c98db0b58a051745b8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/PathMappingList.h
M lldb/source/Target/PathMappingList.cpp
Log Message:
-----------
[lldb] Improve locking in PathMappingLists (NFC) (#114576)
In [D148380](https://reviews.llvm.org/D148380), Alex added locking to
PathMappingLists. The current implementation runs the callback under the
lock, which I don't believe is necessary. As far as I can tell, no users
of the callback are relying on the list not having been modified until
the callback is handled.
This patch implements my suggestion to unlock the mutex before the
callback. I also switched to a non-recursive mutex as I don't believe
the recursive property is needed. To make the class fully thread safe, I
did have to introduce another mutex to protect the callback members.
The motivation for this change is #114507. Specifically,
Target::SetExecutableModule calls Target::GetOrCreateModule, which
potentially performs path remapping, which in turns has a callback to
Target::SetExecutableModule.
Commit: 19ad7dd8dc92f2999c7651945451f3a24e034df9
https://github.com/llvm/llvm-project/commit/19ad7dd8dc92f2999c7651945451f3a24e034df9
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
Log Message:
-----------
[DirectX] Update DXIL op codes for annotateHandle and createHandleFromBinding to match the spec and DXC (#114473)
DXIL spec for reference:
[DXIL.rst](https://github.com/microsoft/DirectXShaderCompiler/blob/5704c4744e8752adf5c1bacbf94638f30ff330fd/docs/DXIL.rst?plain=1#L2330).
Commit: ffe96ad105464763f6f9521fbd93e2767e2561e5
https://github.com/llvm/llvm-project/commit/ffe96ad105464763f6f9521fbd93e2767e2561e5
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
Log Message:
-----------
[RISCV] Allow undef elements in isDeinterleaveShuffle (#114585)
This allows us to form vnsrl deinterleaves from non-power-of-two
shuffles after they've been legalized to a power of two.
Commit: 6c3704da420357300c4b228c815f41da27b3158d
https://github.com/llvm/llvm-project/commit/6c3704da420357300c4b228c815f41da27b3158d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/StripSymbols.cpp
Log Message:
-----------
StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (#114836)
Commit: ed19ef740bbef206fc8193f7ef29a8e9931d82d8
https://github.com/llvm/llvm-project/commit/ed19ef740bbef206fc8193f7ef29a8e9931d82d8
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/docs/NVPTXUsage.rst
Log Message:
-----------
[NVPTX][docs] Add isspacep.* to usage doc (#114839)
Commit: 3e15454eedb2ba207d8933aea4cdb8f2af4b1a61
https://github.com/llvm/llvm-project/commit/3e15454eedb2ba207d8933aea4cdb8f2af4b1a61
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[tsan] Clang format a few files (#114725)
Commit: 7ac78f13421c6e5dee4655211fc35225bb8812bc
https://github.com/llvm/llvm-project/commit/7ac78f13421c6e5dee4655211fc35225bb8812bc
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/include/clang/APINotes/Types.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
A clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/lifetimebound.cpp
Log Message:
-----------
[clang] Add preliminary lifetimebound support to APINotes (#114830)
Commit: c949500d519085a4e5b93928b14ca766a353ad73
https://github.com/llvm/llvm-project/commit/c949500d519085a4e5b93928b14ca766a353ad73
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/runtime/CUDA/memory.cpp
Log Message:
-----------
[flang][cuda] Fix not declared terminator (#114866)
Commit: 704808c275fa63d618c8d786313b3da815d4a75b
https://github.com/llvm/llvm-project/commit/704808c275fa63d618c8d786313b3da815d4a75b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Affine/Utils.h
M mlir/include/mlir/Interfaces/ViewLikeInterface.h
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/loop-coalescing.mlir
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Tensor/extract-slice-from-collapse-shape.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/python/dialects/affine.py
Log Message:
-----------
[mlir][affine] Add static basis support to affine.delinearize (#113846)
This commit makes `affine.delinealize` join other indexing operators,
like `vector.extract`, which store a mixed static/dynamic set of sizes,
offsets, or such. In this case, the `basis` (the set of values that will
be used to decompose the linear index) is now stored as an array of
index attributes where the basis is statically known, eliminating the
need to cretae constants.
This commit also adds copies of the delinearize utility in the affine
dialect to allow it to take an array of `OpFoldResult`s and extends te
DynamicIndexList parser/printer to allow specifying the delimiters in
tablegen (this is needed to avoid breaking existing syntax).
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: d727eecfa65fa906066783ca2cafa80ee1437798
https://github.com/llvm/llvm-project/commit/d727eecfa65fa906066783ca2cafa80ee1437798
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libc/test/integration/src/stdio/CMakeLists.txt
Log Message:
-----------
[libc] Disable failing AMDGPU test temporarily
Summary:
Started failing in https://lab.llvm.org/buildbot/#/builders/73/builds/7977.
Commit: 176d6535ae417364622ef547099bef3c525b1f0f
https://github.com/llvm/llvm-project/commit/176d6535ae417364622ef547099bef3c525b1f0f
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
Log Message:
-----------
[RISCV] Add tests for single source interleave shuffles
These are failing to match vnsrl because we only check for the dual source
form.
Commit: 3a5791e75c53234bb25cb7a427c990d3cb6a0883
https://github.com/llvm/llvm-project/commit/3a5791e75c53234bb25cb7a427c990d3cb6a0883
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
A llvm/include/llvm/Transforms/Utils/LongestCommonSequence.h
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SampleProf] Templatize longestCommonSequence (NFC) (#114633)
This patch moves the implementation of longestCommonSequence to a new
header file.
I'm planning to implement a profile undrifting algorithm for MemProf
so that the compiler can ingest somewhat stale MemProf profile and
still deliver most of the benefits that would be delivered if the
profile were completely up to date (with no line number or column
number differences).
Since the core undrifting algorithm is the same between MemProf and
AutoFDO, this patch turns longestCommonSequence into a template. The
original longestCommonSequence implementation is repurposed and now
serves as a wrapper around a template specialization.
Note that the usage differences between MemProf and AutoFDO are minor.
For example, I'm planning to use line-column number pair instead of
LineLocation, which uses a discriminator. To identify a function, I'm
planning to use uint64_t GUID instead of FunctionId.
For now, I'm returning matches via a function object InsertMatching
because it's impossible to infer the map type from LineLocation alone.
Specifically:
std::unordered_map<LineLocation, LineLocation>
does not work because we cannot infer the hash functor
LineLocationHash. I could define std::hash<LineLocation>.
Alternatively, in the future, I might switch to DenseMap and define
DenseMapInfo<LineLocation>. This way:
DenseMap<LineLocation, LineLocation>
automatically picks up DenseMapInfo<LineLocation>.
Commit: 9d09c6fd9c38a0e631e42a902ae215fb2f828da9
https://github.com/llvm/llvm-project/commit/9d09c6fd9c38a0e631e42a902ae215fb2f828da9
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Update device descriptor on data transfer (#114838)
When the destination of the data transfer is a global we might need to
sync the descriptor after the data transfer is done. This is the case
when the data transfer is from host/device to device as reallocation
might have happened and the descriptor on the device needs to take the
new values written on the host.
A new entry point is added `CUFDataTransferGlobalDescDesc` with the sync
when needed.
Commit: 795b4efad0259cbf03fc98e3045621916328ce57
https://github.com/llvm/llvm-project/commit/795b4efad0259cbf03fc98e3045621916328ce57
Author: Nachi G <nacgarg at users.noreply.github.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/test/Dialect/Index/index-canonicalize.mlir
Log Message:
-----------
[MLIR] Add canonicalizations to all eligible `index` binary ops (#114000)
Generalizes the following canonicalization pattern to all associative
and commutative binary ops in the `index` dialect.
```
x = v + c1
y = x + c2
-->
y = x + (c1 + c2)
```
This includes:
- `AddOp`
- `MulOp`
- `MaxSOp`
- `MaxUOp`
- `MinSOp`
- `MinUOp`
- `AndOp`
- `OrOp`
- `XOrOp`
The operation folding is implemented using the existing folders since
`createAndFold` is used in the canonicalization.
Commit: a57296ad411a75c1376458f6b09cb75128c6e785
https://github.com/llvm/llvm-project/commit/a57296ad411a75c1376458f6b09cb75128c6e785
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Create dependent modules in parallel (#114507)
Create dependent modules in parallel in Target::SetExecutableModule.
This change was inspired by #110646 which takes the same approach when
attaching. Jason suggested we could use the same approach when you
create a target in LLDB.
I used Slack for benchmarking, which loads 902 images.
```
Benchmark 1: ./bin/lldb /Applications/Slack.app/Contents/MacOS/Slack
Time (mean ± σ): 1.225 s ± 0.003 s [User: 3.977 s, System: 1.521 s]
Range (min … max): 1.220 s … 1.229 s 10 runs
Benchmark 2: ./bin/lldb /Applications/Slack.app/Contents/MacOS/Slack
Time (mean ± σ): 3.253 s ± 0.037 s [User: 3.013 s, System: 0.248 s]
Range (min … max): 3.211 s … 3.310 s 10 runs
```
We see about a 2x speedup, which matches what Jason saw for the attach
scenario. I also ran this under TSan to confirm this doesn't introduce
any races or deadlocks.
Commit: 8528130a0c862a41de7cd7952c6a0b58e1751419
https://github.com/llvm/llvm-project/commit/8528130a0c862a41de7cd7952c6a0b58e1751419
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 704808c275fa63d618c8d786313b3da815d4a75b
Commit: 8d023b7d660dc5347740cb5e17e1dfbf8ff93686
https://github.com/llvm/llvm-project/commit/8d023b7d660dc5347740cb5e17e1dfbf8ff93686
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Combine some setOperationAction calls and update a FIXME. NFC
Commit: d2d1b5897e871f7b4873befbe2b85db58744e42b
https://github.com/llvm/llvm-project/commit/d2d1b5897e871f7b4873befbe2b85db58744e42b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libclc/amdgcn/lib/integer/popcount.cl
M libclc/amdgcn/lib/math/fmax.cl
M libclc/amdgcn/lib/math/fmin.cl
M libclc/amdgcn/lib/math/ldexp.cl
M libclc/amdgpu/lib/math/half_native_unary.inc
M libclc/amdgpu/lib/math/nextafter.cl
M libclc/amdgpu/lib/math/sqrt.cl
A libclc/clc/include/clc/clcmacro.h
M libclc/clspv/lib/math/fma.cl
M libclc/generic/include/math/clc_sqrt.h
R libclc/generic/include/utils.h
M libclc/generic/lib/atom_int32_binary.inc
R libclc/generic/lib/clcmacro.h
M libclc/generic/lib/common/degrees.cl
M libclc/generic/lib/common/radians.cl
M libclc/generic/lib/common/sign.cl
M libclc/generic/lib/common/smoothstep.cl
M libclc/generic/lib/common/step.cl
M libclc/generic/lib/integer/add_sat.cl
M libclc/generic/lib/integer/clz.cl
M libclc/generic/lib/integer/mad_sat.cl
M libclc/generic/lib/integer/sub_sat.cl
M libclc/generic/lib/math/acos.cl
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/acospi.cl
M libclc/generic/lib/math/asin.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/asinpi.cl
M libclc/generic/lib/math/atan.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/atanpi.cl
M libclc/generic/lib/math/cbrt.cl
M libclc/generic/lib/math/ceil.cl
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/clc_sw_binary.inc
M libclc/generic/lib/math/clc_sw_unary.inc
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/math/clc_tanpi.cl
M libclc/generic/lib/math/copysign.cl
M libclc/generic/lib/math/cos.cl
M libclc/generic/lib/math/cosh.cl
M libclc/generic/lib/math/cospi.cl
M libclc/generic/lib/math/erf.cl
M libclc/generic/lib/math/erfc.cl
M libclc/generic/lib/math/exp.cl
M libclc/generic/lib/math/exp2.cl
M libclc/generic/lib/math/expm1.cl
M libclc/generic/lib/math/fabs.cl
M libclc/generic/lib/math/floor.cl
M libclc/generic/lib/math/fmax.cl
M libclc/generic/lib/math/fmin.cl
M libclc/generic/lib/math/frexp.cl
M libclc/generic/lib/math/frexp.inc
M libclc/generic/lib/math/half_binary.inc
M libclc/generic/lib/math/half_unary.inc
M libclc/generic/lib/math/ilogb.cl
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/lgamma.cl
M libclc/generic/lib/math/lgamma_r.cl
M libclc/generic/lib/math/log.cl
M libclc/generic/lib/math/log10.cl
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/log2.cl
M libclc/generic/lib/math/logb.cl
M libclc/generic/lib/math/maxmag.cl
M libclc/generic/lib/math/minmag.cl
M libclc/generic/lib/math/nan.cl
M libclc/generic/lib/math/native_unary_intrinsic.inc
M libclc/generic/lib/math/rsqrt.cl
M libclc/generic/lib/math/sin.cl
M libclc/generic/lib/math/sinh.cl
M libclc/generic/lib/math/sinpi.cl
M libclc/generic/lib/math/tables.h
M libclc/generic/lib/math/tanh.cl
M libclc/generic/lib/math/tgamma.cl
M libclc/generic/lib/math/unary_builtin.inc
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/select.cl
M libclc/ptx/lib/math/nextafter.cl
M libclc/r600/lib/math/fmax.cl
M libclc/r600/lib/math/fmin.cl
M libclc/r600/lib/math/native_rsqrt.cl
M libclc/r600/lib/math/rsqrt.cl
Log Message:
-----------
[libclc] Move clcmacro.h to CLC library. NFC (#114845)
Commit: e9de53875b9005233f07a68d80e144af8607893b
https://github.com/llvm/llvm-project/commit/e9de53875b9005233f07a68d80e144af8607893b
Author: Hubert Tong <hstong at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M libcxxabi/src/demangle/README.txt
M llvm/include/llvm/Demangle/README.txt
Log Message:
-----------
NFC: Demangler README.txt: Fix LLVM unittests path
Commit: 22db91c5e8d212fb96e134be4a591d8d4fa1462b
https://github.com/llvm/llvm-project/commit/22db91c5e8d212fb96e134be4a591d8d4fa1462b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
Log Message:
-----------
[RISCV] Another length changing shuffle lowering case
"32" is currently a special number - it's one past the maximum representable
immediate on a vslidedown.vi and thus the first sub-vector we do *not*
consider "cheap" in RISCVTargetLowering::isExtractSubvectorCheap.
Commit: 97b7474970b3bb6af4c63782c408a1fd14468e29
https://github.com/llvm/llvm-project/commit/97b7474970b3bb6af4c63782c408a1fd14468e29
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Remove unneeded assert from SelectionDAG::getSignedConstant. NFC (#114336)
This assert is also present inside the APInt constructor after #114539.
Commit: 6127724786d581d2653df7420d1f28709288a107
https://github.com/llvm/llvm-project/commit/6127724786d581d2653df7420d1f28709288a107
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
R cmake/Modules/HandleOutOfTreeLLVM.cmake
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M libunwind/docs/BuildingLibunwind.rst
M llvm/docs/HowToBuildWindowsItaniumPrograms.rst
M runtimes/CMakeLists.txt
Log Message:
-----------
[cmake] Remove obsolete files, docs and CMake variables related to the standalone build (#112741)
The runtimes used to support a build mode called the "Standalone build",
which isn't supported anymore (and hasn't been for a few years).
However, various places in the code still contained stuff whose only
purpose was to support that build mode, and some outdated documentation.
This patch cleans that up (although I probably missed some).
- Remove HandleOutOfTreeLLVM.cmake which isn't referenced anymore
- Remove the LLVM_PATH CMake variable which isn't used anymore
- Update some outdated documentation referencing standalone builds
Commit: fa57c7a6a5f594a9e3ae2dbe3542cf89a20cdd73
https://github.com/llvm/llvm-project/commit/fa57c7a6a5f594a9e3ae2dbe3542cf89a20cdd73
Author: Hongtao Yu <hoy at meta.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
Log Message:
-----------
[mlir] Extend SCF loopUnrollByFactor to return the result loops (#114573)
There is a need of accessing the resulted epilog loop from the SC loop
unroller. It'd clean and convenient to get that directly from the loop
unroller instead of rescanning the whole function, as discussed in
https://github.com/triton-lang/triton/pull/5027 . I'm changing the
result type of `loopUnrollByFactor` for that.
Commit: bb9ff32867d633787b5dd2572bc6e2fe5dade107
https://github.com/llvm/llvm-project/commit/bb9ff32867d633787b5dd2572bc6e2fe5dade107
Author: Vincent Lee <thevinster at users.noreply.github.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Clean up unused exported files (#114620)
Some minor cleanup to the bazel files. These exported files are not
being referenced anymore in the tree, afaict, so let's clean them up.
Additionally, moved one of the filegroup targets higher to be consistent
with other filegroup usages where it's defined before first usage.
Commit: 2c95fb923308302a02096c7181498437345b14f9
https://github.com/llvm/llvm-project/commit/2c95fb923308302a02096c7181498437345b14f9
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
Log Message:
-----------
[test] Autogen a test to reflect a name change
I'd committed a new test recently. I apparently renamed it at the last
minute and forgot to run update. Thanksfully, the original name was
a suffix of the new name, so the matching continued to work and no
test failures were reported.
Commit: 21d25d2bcd74a311ddfea970c028e0b8d5ea129f
https://github.com/llvm/llvm-project/commit/21d25d2bcd74a311ddfea970c028e0b8d5ea129f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/lib/CodeGen/CGExpr.cpp
A clang/test/CodeGen/ubsan-type-ignorelist-enum.test
Log Message:
-----------
[ubsan] Suppression by type for `-fsanitize=enum` (#114754)
Similar to #107332.
Commit: d1d3e4b27341e267c3f79907430bc9dce24c6687
https://github.com/llvm/llvm-project/commit/d1d3e4b27341e267c3f79907430bc9dce24c6687
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
Log Message:
-----------
[WebAssembly] Add/Reorder legacy EH tests (#114363)
These tests are added to match the standard EH tests in #114361:
- `nested_try`
- `unwind_mismatches_with_loop`
These tests are useful to test certain aspects of the new EH but I think
they add more coverage to the legaacy tests as well.
And `unstackify_when_fixing_unwind_mismatch` and `unwind_mismatches_5`
have not changed; they have been just moved.
This also fixes some comments.
Commit: 73822e4335e16b3f8f290561579f1f1118e005af
https://github.com/llvm/llvm-project/commit/73822e4335e16b3f8f290561579f1f1118e005af
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
Log Message:
-----------
[WebAssembly] Fix comments in CFGStackify (NFC) (#114362)
This fixes comments in CFGStackify and renames a variable to be clearer.
Commit: be64ca912371ae62002aee3429de058052451d72
https://github.com/llvm/llvm-project/commit/be64ca912371ae62002aee3429de058052451d72
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
R lld/test/wasm/Inputs/require-feature-foo.yaml
R lld/test/wasm/target-feature-required.yaml
M lld/test/wasm/target-feature-used.yaml
M lld/wasm/Writer.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/test/ObjectYAML/wasm/target-features-section.yaml
Log Message:
-----------
[WebAssembly] Remove WASM_FEATURE_PREFIX_REQUIRED (NFC) (#113729)
This has not been emitted since
https://github.com/llvm/llvm-project/commit/3f34e1b883351c7d98426b084386a7aa762aa366.
The corresponding proposed tool-conventions change:
https://github.com/WebAssembly/tool-conventions/pull/236
Commit: 61e50b9f03311504bc7c846a05336a8b6491e6b2
https://github.com/llvm/llvm-project/commit/61e50b9f03311504bc7c846a05336a8b6491e6b2
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Added mmap and shm interceptors (#114862)
# Why do we think these are unsafe?
mmap and munmap are used for mapping a specific manipulation of the
virtual memory of a process. Typically used in things like databases and
area allocators.
They call the system calls `mmap` and `munmap` under the hood (confirmed
on mac using dtrace)
shm_open/unlink interact with shared memory across processes.
Similarly under the hood, they call the `shm_open`/`shm_unlink` system
calls (confirmed on mac using dtrace)
Commit: 910a73f3aa56388028d87e319862580daaf03152
https://github.com/llvm/llvm-project/commit/910a73f3aa56388028d87e319862580daaf03152
Author: LIU Hao <lh_mouse at 126.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/test/MC/X86/intel-syntax-ambiguous.s
M llvm/test/MC/X86/intel-syntax-ptr-sized.s
Log Message:
-----------
[X86] Make POP imply pointer-size operands, as with PUSH for Intel syntax (#114533)
On x86-32 the word PUSH (50+rd) and POP (58+rd) instructions assume only
32-bit operands, and on x86-64 they assume only 64-bit operands; in
neither case should the absence of an operand size be ambiguous.
Those special case were added in
f6fb78089060818b4352b540abc44da4f62b95ef and lacking of POP seemed an
oversight.
This closes https://github.com/llvm/llvm-project/issues/114531.
Commit: c271ba7f7961f7c2ba911853113e67ed6237a77b
https://github.com/llvm/llvm-project/commit/c271ba7f7961f7c2ba911853113e67ed6237a77b
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-invalid.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
Log Message:
-----------
[mlir][bufferization] Add support for recursive function calls (#114003)
This commit adds support for recursive function calls to One-Shot
Bufferize.
The analysis does not support recursive function calls. The function
body itself can be analyzed, but we cannot make any assumptions about
the aliasing relation between function result and function arguments.
Similarly, when looking at a `call` op, we do not know whether the
operands will bufferize to a memory read/write. In the absence of such
information, we have to conservatively assume that they do.
This commit is in preparation of removing the deprecated
`func-bufferize` pass. That pass can bufferize recursive functions.
Commit: 00a93e6207ac053e7a42368a52cf51a744ecd139
https://github.com/llvm/llvm-project/commit/00a93e6207ac053e7a42368a52cf51a744ecd139
Author: Peter Hawkins <phawkins at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
Log Message:
-----------
[mlir:python] Change PyOperation::create to actually return a PyOperation. (#114542)
In the tablegen-generated Python bindings, we typically see a pattern
like:
```
class ConstantOp(_ods_ir.OpView):
...
def __init__(self, value, *, loc=None, ip=None):
...
super().__init__(self.build_generic(attributes=attributes, operands=operands, successors=_ods_successors, regions=regions, loc=loc, ip=ip))
```
i.e., the generated code calls `OpView.__init__()` with the output of
`build_generic`. The purpose of `OpView` is to wrap another operation
object, and `OpView.__init__` can accept any `PyOperationBase` subclass,
and presumably the intention is that `build_generic` returns a
`PyOperation`, so the user ends up with a `PyOpView` wrapping a
`PyOperation`.
However, `PyOpView::buildGeneric` calls `PyOperation::create`, which
does not just build a PyOperation, but it also calls `createOpView` to
wrap that operation in a subclass of `PyOpView` and returns that view.
But that's rather pointless: we called this code from the constructor of
an `OpView` subclass, so we already have a view object ready to go; we
don't need to build another one!
If we change `PyOperation::create` to return the underlying
`PyOperation`, rather than a view wrapper, we can save allocating a
useless `PyOpView` object for each ODS-generated Python object.
This saves approximately 1.5s of Python time in a JAX LLM benchmark that
generates a mixture of upstream dialects and StableHLO.
Commit: 999dfb2067eb75609b735944af876279025ac171
https://github.com/llvm/llvm-project/commit/999dfb2067eb75609b735944af876279025ac171
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-narrow-binop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
Log Message:
-----------
[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)
This matches InstCombine and DAGCombine.
RISC-V only has an ADDI instruction so without this we need additional
patterns to do the conversion.
Some of the AMDGPU tests look like possible regressions. Maybe some
patterns from isel aren't imported.
Commit: ffcf3c8688f57acaf6a404a1238673c9d197ba9a
https://github.com/llvm/llvm-project/commit/ffcf3c8688f57acaf6a404a1238673c9d197ba9a
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M lld/test/MachO/cgdata-generate.s
M llvm/docs/CommandGuide/llvm-cgdata.rst
M llvm/include/llvm/CGData/CodeGenData.h
M llvm/include/llvm/CGData/CodeGenData.inc
M llvm/include/llvm/CGData/CodeGenDataReader.h
M llvm/include/llvm/CGData/CodeGenDataWriter.h
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/CGData/CodeGenDataWriter.cpp
M llvm/test/tools/llvm-cgdata/empty.test
M llvm/test/tools/llvm-cgdata/error.test
R llvm/test/tools/llvm-cgdata/merge-archive.test
A llvm/test/tools/llvm-cgdata/merge-combined-funcmap-hashtree.test
R llvm/test/tools/llvm-cgdata/merge-concat.test
R llvm/test/tools/llvm-cgdata/merge-double.test
A llvm/test/tools/llvm-cgdata/merge-funcmap-archive.test
A llvm/test/tools/llvm-cgdata/merge-funcmap-concat.test
A llvm/test/tools/llvm-cgdata/merge-funcmap-double.test
A llvm/test/tools/llvm-cgdata/merge-funcmap-single.test
A llvm/test/tools/llvm-cgdata/merge-hashtree-archive.test
A llvm/test/tools/llvm-cgdata/merge-hashtree-concat.test
A llvm/test/tools/llvm-cgdata/merge-hashtree-double.test
A llvm/test/tools/llvm-cgdata/merge-hashtree-single.test
R llvm/test/tools/llvm-cgdata/merge-single.test
M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
Log Message:
-----------
[CGData][llvm-cgdata] Support for stable function map (#112664)
This introduces a new cgdata format for stable function maps. The raw
data is embedded in the __llvm_merge section during compile time. This
data can be read and merged using the llvm-cgdata tool, into an indexed
cgdata file. Consequently, the tool is now capable of handling either
outlined hash trees, stable function maps, or both, as they are
orthogonal.
Depends on #112662.
This is a patch for
https://discourse.llvm.org/t/rfc-global-function-merging/82608.
Commit: ea859005b5ddb14548b9dc5b94d54d78754f5918
https://github.com/llvm/llvm-project/commit/ea859005b5ddb14548b9dc5b94d54d78754f5918
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
A llvm/test/Transforms/SafeStack/X86/alloca-addrspace-wrong-addrspace-error.ll
A llvm/test/Transforms/SafeStack/X86/alloca-addrspace-wrong-addrspace.ll
A llvm/test/Transforms/SafeStack/X86/alloca-addrspace.ll
Log Message:
-----------
SafeStack: Respect alloca addrspace (#112536)
Just insert addrspacecast in cases where the alloca uses a
different address space, since I don't know what else you
could possibly do.
Commit: fade3be83d8e4cad65418d3ab9849e49c8495cb3
https://github.com/llvm/llvm-project/commit/fade3be83d8e4cad65418d3ab9849e49c8495cb3
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Wrap `Atomic`/`NoTsanAtomic` int struct (#114909)
Prepare to replace macro with template.
Related to #114724, but it's not strictly needed.
Commit: 2d2371df0f0f8c3a1ee48ec27a908a263307d08c
https://github.com/llvm/llvm-project/commit/2d2371df0f0f8c3a1ee48ec27a908a263307d08c
Author: Pranav Kant <prka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[bazel][libc] Fix bazel build (#114917)
Commit: 9f73c69e5aa2d1112f72b2e18d4ae0462a6a2042
https://github.com/llvm/llvm-project/commit/9f73c69e5aa2d1112f72b2e18d4ae0462a6a2042
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
Log Message:
-----------
[ORC] Add signext on @sum() arguments in test. (#113308)
Make sure the inlined @sum() function has the right extension attributes
on its arguments.
A new struct TargetI32ArgExtensions is added that sets the Ret/Arg extension
strings given a string TargetTriple. This might be used elsewhere as well for
this purpose if needed.
Fixes: #112503
Commit: efe9ba56e709c1dc6133ec1270431277635fbc9e
https://github.com/llvm/llvm-project/commit/efe9ba56e709c1dc6133ec1270431277635fbc9e
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Deduplicate VECTOR_SHUFFLE fixed-length FP setOperationAction. NFC
Also reshuffle the nodes so they're in enum order.
Commit: 097718bfe2624bfdbb8a39ffe2113539f7a743ae
https://github.com/llvm/llvm-project/commit/097718bfe2624bfdbb8a39ffe2113539f7a743ae
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/OrcLazy/lit.local.cfg
M llvm/test/ExecutionEngine/OrcLazy/minimal-throw-catch.ll
Log Message:
-----------
[ORC] Enable lli -jit-kind=orc-lazy tests on aarch64.
Commit: 013f4a46d1978e370f940df3cbd04fb0399a04fe
https://github.com/llvm/llvm-project/commit/013f4a46d1978e370f940df3cbd04fb0399a04fe
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/BypassSlowDivision.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/Evaluator.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/FunctionComparator.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LowerSwitch.cpp
M llvm/lib/Transforms/Utils/MisExpect.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/SplitModule.cpp
M llvm/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp
M llvm/lib/Transforms/Utils/Utils.cpp
M llvm/lib/Transforms/Utils/VNCoercion.cpp
Log Message:
-----------
[Utils] Remove unused includes (NFC) (#114748)
Identified with misc-include-cleaner.
Commit: 2f13fbfcd1b874019191ab68b661d9b9d82d8556
https://github.com/llvm/llvm-project/commit/2f13fbfcd1b874019191ab68b661d9b9d82d8556
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Support bitcasting into float fields (#114825)
Commit: a7d1d381d2867858ebf4cc6c02c5d71369a6104e
https://github.com/llvm/llvm-project/commit/a7d1d381d2867858ebf4cc6c02c5d71369a6104e
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
Log Message:
-----------
[RISCV] Use integer VTypeInfo predicate for vmv_v_v_vl pattern (#114915)
When lowering fixed length f16 insert_subvector nodes at index 0 we
crashed with zvfhmin because we couldn't select vmv_v_v_vl.
This was due to the predicates requiring full zvfh, even though we only
need zve32x. Use the integer VTypeInfo instead similarly to
VPatSlideVL_VX_VI.
The extract_subvector tests aren't related but were just added for
consistency with the insert_subvector tests.
Commit: f8a2a5025ef890408c7201beec67085b830ecdf7
https://github.com/llvm/llvm-project/commit/f8a2a5025ef890408c7201beec67085b830ecdf7
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/RedirectionManager.cpp
Log Message:
-----------
[ORC] Pass InitialDests map for redirectable symbols by value.
RedirectableMaterializationUnit needs its own copy of this map anyway, so
passing by value allows us to potentially omit a copy.
Commit: a9f829a3d7556593e0814080c8e33eca09e3a51e
https://github.com/llvm/llvm-project/commit/a9f829a3d7556593e0814080c8e33eca09e3a51e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Move out `morder` params from __VA_ARGS__ (#114916)
In #114724 I'd like to cast from int to enum, but
existing code `mo = convert_morder(mo)` does not
allow that.
Commit: 2d6e9724725f542acb4dea54a5de818ac3ff9f5c
https://github.com/llvm/llvm-project/commit/2d6e9724725f542acb4dea54a5de818ac3ff9f5c
Author: Nimish Mishra <neelam.nimish at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/test/Lower/OpenMP/Todo/task_detach.f90
M flang/test/Parser/OpenMP/task.f90
Log Message:
-----------
[flang] Fix tests
Add an additional flag to tests.
Commit: 76b71c0bc4fb2e5e77a4602ce03687a31064c156
https://github.com/llvm/llvm-project/commit/76b71c0bc4fb2e5e77a4602ce03687a31064c156
Author: A. Jiang <de34 at live.cn>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/version
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Set `__cpp_lib_smart_ptr_for_overwrite` (#114700)
The features were implemented in LLVM 16, but mistakenly considered
unimplemented in FTM tools.
Commit: ac4ffcf038f1607a40e7bada914d6febd79d98f1
https://github.com/llvm/llvm-project/commit/ac4ffcf038f1607a40e7bada914d6febd79d98f1
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
R llvm/test/MC/Disassembler/X86/amx-transpose-att.s
R llvm/test/MC/Disassembler/X86/amx-transpose-intel.s
A llvm/test/MC/X86/amx-transpose-att.s
A llvm/test/MC/X86/amx-transpose-intel.s
Log Message:
-----------
[X86][NFC] Move assemble tests to the right folder (#114934)
Commit: a8f80897ba4e41fa2ead50f9f6d652b80b4c51fb
https://github.com/llvm/llvm-project/commit/a8f80897ba4e41fa2ead50f9f6d652b80b4c51fb
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
Log Message:
-----------
[RISCV] Handle zvfhmin/zvfbfmin in lowerVECTOR_SHUFFLEAsVSlide1 (#114925)
Most of lowerVECTOR_SHUFFLE lowers to nodes that work on f16 and bf16
vectors, with the exception of the vslide1 lowering which tries to emit
vfslide1s. Handle this case as an integer vslide1 via fmv.x.h.
Fixes #114893
Commit: aea6b255f0362cc74f8c1263834cc477bc095a9e
https://github.com/llvm/llvm-project/commit/aea6b255f0362cc74f8c1263834cc477bc095a9e
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
Log Message:
-----------
[RISCV] Lower fixed-length {insert,extract}_vector_elt on zvfhmin/zvfbfmin (#114927)
RISCVTargetLowering::lower{INSERT,EXTRACT}_VECTOR_ELT already handles
f16 and bf16 scalable vectors after #110221, so we can reuse it for
fixed-length vectors.
Commit: 1a44a53cd52562c0a2805c738a5417dfa535cec9
https://github.com/llvm/llvm-project/commit/1a44a53cd52562c0a2805c738a5417dfa535cec9
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Log Message:
-----------
[LSR][NFC] Use range-based `for` (#113889)
Commit: 847d4eb42735e48f7a69036a257a2e531b0f6260
https://github.com/llvm/llvm-project/commit/847d4eb42735e48f7a69036a257a2e531b0f6260
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
Log Message:
-----------
Update clang static analyzers per rename of member functions in CanMakeCheckedPtr. (#114636)
The member functions that define CheckedPtr capable type is
incrementCheckedPtrCount and decrementCheckedPtrCount after the rename.
Commit: 19b26d37693b20dbe5bbe083dc6320ba21732da3
https://github.com/llvm/llvm-project/commit/19b26d37693b20dbe5bbe083dc6320ba21732da3
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
Log Message:
-----------
[HLSL][NFC] Cleanup - removed unused function, includes and param, fix typos (#113649)
Commit: 7767aa45abf9706fa5ec9a2b182f3ccde92a93f0
https://github.com/llvm/llvm-project/commit/7767aa45abf9706fa5ec9a2b182f3ccde92a93f0
Author: Sebastian Kreutzer <SebastianKreutzer at gmx.net>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M clang/lib/Driver/XRayArgs.cpp
M clang/test/Driver/XRay/xray-shared.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_trampoline_AArch64.S
M compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
M compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
M compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
M compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
Log Message:
-----------
[XRay][AArch64] Support -fxray-shared (#114431)
This patch adds support for `-fxray-shared` on AArch64. This feature,
introduced in #113548 for x86_64, enables the instrumentation of shared
libraries with XRay.
Changes:
- Adds AArch64 to the list of targets supporting `-fxray-shared`
- Introduces PIC versions of the AArch64 XRay trampolines
- Adjusts relevant XRay tests
Commit: f50547e8c8778ce279e1e3c0bb5f01b0c7ffa186
https://github.com/llvm/llvm-project/commit/f50547e8c8778ce279e1e3c0bb5f01b0c7ffa186
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
Log Message:
-----------
[RISCV] Lower fixed-length bf16 vector bitcasts (#114938)
Currently we crash because we can't select it. Also add tests for f16
with zvfhmin.
Commit: 7de1eff7cff35481e4a502858c5e3ff21502b186
https://github.com/llvm/llvm-project/commit/7de1eff7cff35481e4a502858c5e3ff21502b186
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/Protocol.cpp
Log Message:
-----------
[clangd] Check for editsNearCursor client capability under experimental capabilities (#114699)
This is done to support clients which only support adding custom
(language-specific or server-specific) capabilities under
'experimental'.
Fixes https://github.com/clangd/clangd/issues/2201
Commit: 70de0b8bea31bb734bce86581574a60a0968d838
https://github.com/llvm/llvm-project/commit/70de0b8bea31bb734bce86581574a60a0968d838
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Simplify initialization of MinProfitableTripCount (#113445)
Iteration runtime check confirms whether the trip count is greater than
VFxUF at least. Therefore, there is no need to adjust the
MinProfitableTripCount to VF if it is zero.
Retaining the original MinProfitableTripCount information is also
beneficial for supporting more profitable runtime checks in the future.
Commit: 3495d0456021618be73de1ed0a3aa97952513ffc
https://github.com/llvm/llvm-project/commit/3495d0456021618be73de1ed0a3aa97952513ffc
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-invalid.mir
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-not-a-reg.mir
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir
Log Message:
-----------
[AMDGPU][MIR] Serialize SpillPhysVGPRs (#113129)
Commit: e9a4f2c30a108c51eaa18f4ba2e803079aa7b8e1
https://github.com/llvm/llvm-project/commit/e9a4f2c30a108c51eaa18f4ba2e803079aa7b8e1
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
Log Message:
-----------
[RISCV] Convert test to opaque pointers. NFC
Commit: bf43a138f0a6220cd043a376200bd739cacb25e3
https://github.com/llvm/llvm-project/commit/bf43a138f0a6220cd043a376200bd739cacb25e3
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/AST/Decl.h
Log Message:
-----------
[clang] Initialize DeclaratorDecl.ExtInfo.TInfo to null (#114198)
I believe this has no effect current behavior but would make code safer
in case we forget to initialize this.
Commit: 283273fa1e3be4a03f06a5efd08a8c818be981fd
https://github.com/llvm/llvm-project/commit/283273fa1e3be4a03f06a5efd08a8c818be981fd
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
[clang] Add maintainer for Recovery expressions. (#114859)
Commit: d084bc291a21895fa2ecc74e2d1c9d1818ba4fd7
https://github.com/llvm/llvm-project/commit/d084bc291a21895fa2ecc74e2d1c9d1818ba4fd7
Author: Jérôme Duval <jerome.duval at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/profile/InstrProfilingPlatformOther.c
M compiler-rt/test/builtins/Unit/ctor_dtor.c
M compiler-rt/test/builtins/Unit/dso_handle.cpp
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/profile/Posix/gcov-destructor.c
M compiler-rt/test/profile/Posix/gcov-dlopen.c
M compiler-rt/test/profile/Posix/instrprof-dlopen-norpath.test
M compiler-rt/test/profile/instrprof-error.c
M compiler-rt/test/profile/lit.cfg.py
Log Message:
-----------
[compiler-rt][profile] Add support for LLVM profile for Haiku (#107575)
Haiku uses typical UNIX interfaces.
All tests pass except
instrprof-error.c
Posix/gcov-dlopen.c
Posix/gcov-destructor.c
Posix/instrprof-dlopen-norpath.test
---------
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: dc62edf10543137fbf7f3d4aaa21c17ff073a8fe
https://github.com/llvm/llvm-project/commit/dc62edf10543137fbf7f3d4aaa21c17ff073a8fe
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/test/Driver/hip-toolchain-no-rdc.hip
Log Message:
-----------
[clang][Driver][HIP] Add support for mixing AMDGCNSPIRV & concrete `offload-arch`s. (#113509)
This removes the temporary ban on mixing AMDGCN flavoured SPIR-V and
concrete targets (e.g. `gfx900`) in the same HIPAMD compilation. This is
done primarily by tweaking the effective / observable triple when the
target is `amdgcnspirv`, which seamlessly composes with the existing
infra. The test is stolen from #75357.
Commit: 46ccefb1236bf29b2d752715373d407f2d4c3d61
https://github.com/llvm/llvm-project/commit/46ccefb1236bf29b2d752715373d407f2d4c3d61
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/urem.ll
Log Message:
-----------
[CVP] Fix APInt ctor assertion with i1 urem
This is creating an APInt with value 2, which may not be well-defined
for i1 values. Fix this by replacing the Y.umul_sat(2) with
Y.uadd_sat(Y).
Commit: cdfd4cff555db532a9001662fc8d6a7b05f1c2c3
https://github.com/llvm/llvm-project/commit/cdfd4cff555db532a9001662fc8d6a7b05f1c2c3
Author: Hans <hans at hanshq.net>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[win/asan] Search both higher and lower in AllocateTrampolineRegion (#114212)
There may not always be available virtual memory at higher addresses
than the target function. Therefore, search also lower addresses while
ensuring that we stay within the accessible memory range.
Additionally, add more ReportError calls to make the reasons for
interception failure more clear.
Commit: a256e89fd1b9f42d3f29df42d4f21ea823476ff3
https://github.com/llvm/llvm-project/commit/a256e89fd1b9f42d3f29df42d4f21ea823476ff3
Author: Ying Huang <ying.huang at oss.cipunited.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/Mips/fp16-promote.ll
Log Message:
-----------
[Mips] Add additional half float tests (NFC)
For https://github.com/llvm/llvm-project/pull/110199.
Commit: bf01bb851b1e1a977ba1b92e7eb9c8c6d773e6d5
https://github.com/llvm/llvm-project/commit/bf01bb851b1e1a977ba1b92e7eb9c8c6d773e6d5
Author: aabhinavg <78288544+aabhinavg at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
[lldb] Refactor string manipulation in Debugger.cpp (#92565)
Summary of Changes:
Replaced the ineffective call to `substr` with a more efficient use of
`resize` to truncate the string.
Adjusted the code to use 'resize' instead of 'substr' for better
performance and readability.
Removed unwanted file from the previous commit.
Fixes: #91209
---------
Co-authored-by: aabhinavg <tiwariabhinavak at gmail.com>
Commit: 72f362170fbe7834febfe08d8bd1f7ba935ddbc9
https://github.com/llvm/llvm-project/commit/72f362170fbe7834febfe08d8bd1f7ba935ddbc9
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/test/Dialect/Math/polynomial-approximation.mlir
Log Message:
-----------
[mlir][Math] Fix 0-rank support for PolynomialApproximation (#114826)
This patch disambiguates 0-rank vectors and scalars in
PolynomialApproximation. This fixes a bug in PolynomialApproximation
where 0-rank vectors would be treated as scalars and arguments would not
be broadcasted properly.
Commit: 4831e0aa88debb3b7d0528bfd85db73a6a03aeff
https://github.com/llvm/llvm-project/commit/4831e0aa88debb3b7d0528bfd85db73a6a03aeff
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Linker/IRMover.cpp
A llvm/test/Assembler/mutually-recursive-types.ll
M llvm/test/Assembler/unsized-recursive-type.ll
M llvm/test/Linker/pr22807.ll
R llvm/test/Verifier/recursive-struct-param.ll
R llvm/test/Verifier/recursive-type-1.ll
R llvm/test/Verifier/recursive-type-2.ll
R llvm/test/Verifier/recursive-type-load.ll
R llvm/test/Verifier/recursive-type-store.ll
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[IR] Disallow recursive types (#114799)
StructType::setBody is the only mechanism that can potentially create
recursion in the type system. Add a runtime check that it is not
actually used to create recursion.
If the check fails, report an error from LLParser, BitcodeReader and
IRLinker. In all other cases assert that the check succeeds.
In future StructType::setBody will be removed in favor of specifying the
body when the type is created, so any performance hit from this runtime
check will be temporary.
Commit: 7f9d348eb2a54a2dd07ad9e029baef30d9d9b737
https://github.com/llvm/llvm-project/commit/7f9d348eb2a54a2dd07ad9e029baef30d9d9b737
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
Log Message:
-----------
[Clang] SemaFunctionEffects: When verifying a function, ignore any trailing `requires` clause. (#114266)
---------
Co-authored-by: Doug Wyatt <dwyatt at apple.com>
Commit: 5f84b332ec9fcb24d2e278aef511ac424e4aa3b9
https://github.com/llvm/llvm-project/commit/5f84b332ec9fcb24d2e278aef511ac424e4aa3b9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix discarding __builtin_bit_cast calls (#114926)
Optionally prepare storage for the result and do the bitcast anyway, to
get the right diagnostic output.
Commit: 6d2f4dd79d0106b8f4c743b2fb08ae0ea29411e0
https://github.com/llvm/llvm-project/commit/6d2f4dd79d0106b8f4c743b2fb08ae0ea29411e0
Author: Carlo Cabrera <github at carlo.cab>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/Contributing.rst
Log Message:
-----------
[llvm][docs] update links to `clang-format-diff.py` and `git-clang-format` (#114646)
Point to github instead of phabricator.
Commit: 5dc9c39ac15be0a8c0dd8ee1fb1c9f6f86691592
https://github.com/llvm/llvm-project/commit/5dc9c39ac15be0a8c0dd8ee1fb1c9f6f86691592
Author: David Green <david.green at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/load.ll
Log Message:
-----------
[GlobalISel] Check the correct register in sextload OneUse check. (#114763)
This fixes a bug that started triggering after #111730, where we could
remove a load with multiple uses. It looks like the match should be
checking the other register in a one-use check.
%SrcReg = load..
%DstReg = sign_extend_inreg %SrcReg
Commit: 93cda6d6a75e98d5516fbf12ce984604be834f01
https://github.com/llvm/llvm-project/commit/93cda6d6a75e98d5516fbf12ce984604be834f01
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
A llvm/test/CodeGen/SPIRV/no-opbitcast-between-identical-types.ll
Log Message:
-----------
[SPIR-V] No OpBitcast is generated for a bitcast between identical types (#114877)
The goal of the PR is to ensure that no OpBitcast is generated for a
bitcast between identical types.
This PR resolves https://github.com/llvm/llvm-project/issues/114482
Commit: 23f3bff7235890c8cf55e8a4a00f1a29e998bd54
https://github.com/llvm/llvm-project/commit/23f3bff7235890c8cf55e8a4a00f1a29e998bd54
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/MC/AArch64/SME/revd-diagnostics.s
M llvm/test/MC/AArch64/SME/revd.s
Log Message:
-----------
[AArch64] make REVD non-MOVPRFXable (#114430)
This patch updates REVD instruction and makes it non-MOVPRFXable as per
https://developer.arm.com/documentation/ddi0602/2024-06/SVE-Instructions/REVD--Reverse-64-bit-doublewords-in-elements--predicated--?lang=en
Commit: 1b3da362c5e32e7a2b23fe5febd9e1a09b484150
https://github.com/llvm/llvm-project/commit/1b3da362c5e32e7a2b23fe5febd9e1a09b484150
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix bitcasting packed bool vectors (#114937)
This is a special case we need to handle. We don't do bitcasting _into_
such vectors yet though.
Commit: 1e9d0685c5565074871b6af289ea0be4e4333c9b
https://github.com/llvm/llvm-project/commit/1e9d0685c5565074871b6af289ea0be4e4333c9b
Author: David Green <david.green at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll
M llvm/test/CodeGen/AArch64/neon-scalar-by-elem-fma.ll
Log Message:
-----------
[AArch64] Add extra fma+extract test cases. NFC
Commit: 8a1eba48edc8a9668123a6b925c6dbb7f45a363a
https://github.com/llvm/llvm-project/commit/8a1eba48edc8a9668123a6b925c6dbb7f45a363a
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/TidyProvider.h
Log Message:
-----------
[clangd] Fix use-after-free issues in TidyProvider.cpp (#114808)
Commit: 2de3d00edc614cdce4b30b68be564a7a3123dbf9
https://github.com/llvm/llvm-project/commit/2de3d00edc614cdce4b30b68be564a7a3123dbf9
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix a crash in `PadOp::fold` (#114921)
This PR fixes a crash when padding of `tosa.pad` is not dense elements.
Fixes #114762.
Commit: 9f0f6df03b1f6bc4feac8ca5670638b005d20d96
https://github.com/llvm/llvm-project/commit/9f0f6df03b1f6bc4feac8ca5670638b005d20d96
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Arith/Transforms/Passes.h
M mlir/include/mlir/Dialect/Arith/Transforms/Passes.td
M mlir/lib/Dialect/Arith/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Arith/Transforms/IntNarrowing.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
R mlir/test/Dialect/Arith/int-narrowing-invalid-options.mlir
R mlir/test/Dialect/Arith/int-narrowing.mlir
A mlir/test/Dialect/Arith/int-range-narrowing.mlir
R mlir/test/Dialect/Linalg/int-narrowing.mlir
Log Message:
-----------
[mlir] Add `arith-int-range-narrowing` pass (#112404)
This pass intended to narrow integer calculations to the specific
bitwidth, using `IntegerRangeAnalysis`.
We already have the `arith-int-narrowing` pass, but it mostly only doing
local analysis, while `IntegerRangeAnalysis` analyses entire program.
They ideally should be unified, but it's a task for the future.
Commit: 6620cd25234a42ca4b51490627afcb93fa443dc3
https://github.com/llvm/llvm-project/commit/6620cd25234a42ca4b51490627afcb93fa443dc3
Author: Walter Erquinigo <a20012251 at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/commands/process/launch/TestProcessLaunch.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[LLDB] Add a target.launch-working-dir setting (#113521)
Internally we use bazel in a way in which it can drop you in a LLDB
session with the target launched in a particular cwd, which is needed
for things to work. We've been making this automation work via `process
launch -w`. However, if later the user wants to restart the process with
`r`, then they end up using a different cwd for relaunching the process.
As a way to fix this, I'm adding a target-level setting that allows
configuring a default cwd used for launching the process without needing
the user to specify it manually.
Commit: 21f8e8c918f6cc814aa571ae349b496162187694
https://github.com/llvm/llvm-project/commit/21f8e8c918f6cc814aa571ae349b496162187694
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Port 9cfe3028ca7977fb582fa3b15b875e8772fc8fc0 (part 2)
Commit: e76d9214c8d104cb04e7d164d281db312ffa6024
https://github.com/llvm/llvm-project/commit/e76d9214c8d104cb04e7d164d281db312ffa6024
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir
Log Message:
-----------
[AMDGPU] Fix 3495d04 MIR test (#114963)
Needed to specify scratchRSrcReg and spreg in order to stop after
prologepilog.
- Fixes #113129 test failure
Commit: 49dfbd13ad846080eb00d71b076549c501f8f240
https://github.com/llvm/llvm-project/commit/49dfbd13ad846080eb00d71b076549c501f8f240
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
A flang/test/Integration/debug-complex-2.f90
A flang/test/Integration/debug-external-linkage-name.f90
Log Message:
-----------
flang][debug] Run AddDebugInfo before TargetRewrite. (#114418)
This help us generate debug info that better represents the actual
Fortran source code. It was briefly discussed
[here](https://github.com/llvm/llvm-project/pull/113917#pullrequestreview-2401339038).
Fixes #108711.
Commit: a88be11eef59b1722030e1219109ea0b76eebbe5
https://github.com/llvm/llvm-project/commit/a88be11eef59b1722030e1219109ea0b76eebbe5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] Add test coverage for #114901
Commit: 05e838f428555bcc4507bd37912da60ea9110ef6
https://github.com/llvm/llvm-project/commit/05e838f428555bcc4507bd37912da60ea9110ef6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] foldExtractedCmps - disable fold on non-commutative binops
The fold needs to be adjusted to correctly track the LHS/RHS operands, which will take some refactoring, for now just disable the fold in this case.
Fixes #114901
Commit: 5d39e0c7e1b50fc9a0f77daeef5eb63bcbba5b35
https://github.com/llvm/llvm-project/commit/5d39e0c7e1b50fc9a0f77daeef5eb63bcbba5b35
Author: Walter Erquinigo <a20012251 at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/commands/process/launch/TestProcessLaunch.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Revert "[LLDB] Add a target.launch-working-dir setting" (#114973)
Reverts llvm/llvm-project#113521 due to build bot failures mentioned in
the original PR.
Commit: cfa5ecde415d509b835b2dc5551187f2b7eff773
https://github.com/llvm/llvm-project/commit/cfa5ecde415d509b835b2dc5551187f2b7eff773
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/Analysis/ValueTracking/known-non-equal.ll
Log Message:
-----------
ValueTracking/test: cover recur limit in non-equal PHIs (#113205)
Add a test covering the recursion limit of isNonEqualPHIs.
Commit: d3e796c2d018a8e992fd06920c8f6235c14e5f0a
https://github.com/llvm/llvm-project/commit/d3e796c2d018a8e992fd06920c8f6235c14e5f0a
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Update not-yet-implemented errors, NFC (#114966)
This patch improves not-yet-implemented error diagnostics to more
closely follow the format used by Flang lowering for the same kind of
errors. This helps keep some level of uniformity from a user
perspective.
Commit: 445db93844cb50eeb6f587bef0749c2950b46e70
https://github.com/llvm/llvm-project/commit/445db93844cb50eeb6f587bef0749c2950b46e70
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for codegen with alias analysis
Commit: f3025c8b4fd797d99a8a8117254f93605ec46aa8
https://github.com/llvm/llvm-project/commit/f3025c8b4fd797d99a8a8117254f93605ec46aa8
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
Log Message:
-----------
[flang][OpenMP] Add alias analysis for omp private (#113566)
Enable alias analysis for omp private clause for code:
```
program main
integer :: arrayA(10,10)
integer :: tmp(2)
integer :: i,j
!$omp target teams distribute parallel do private(tmp)
do j = 1, 10
do i = 1,10
tmp = [i,j]
arrayA = tmp(1)
end do
end do
end program main
```
Commit: 07b6013e6f69bfdf46b9f2fa1bb4c76f9ef2376c
https://github.com/llvm/llvm-project/commit/07b6013e6f69bfdf46b9f2fa1bb4c76f9ef2376c
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Function.h
M llvm/lib/Analysis/CFGPrinter.cpp
Log Message:
-----------
[CFGPrinter] Allow CFG dumps with a given filename (#112906)
Add functions to print the CFG via the debugger using a specified
filename.
This is useful when comparing CFGs for the same function before vs after
a change, or when handling functions with names that are too long to be
file names.
Commit: 9a1a8f33850d6c7a090bbe7fcf60dcdda93482d0
https://github.com/llvm/llvm-project/commit/9a1a8f33850d6c7a090bbe7fcf60dcdda93482d0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/include/__split_buffer
M libcxx/include/__vector/vector.h
M libcxx/include/deque
Log Message:
-----------
[libc++][NFC] Simplify __split_buffer a bit (#114224)
This is possible since we're not using `__compressed_pair` anymore.
Commit: 4ff62052c832197054e3672df730579adce984bf
https://github.com/llvm/llvm-project/commit/4ff62052c832197054e3672df730579adce984bf
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/fp-rounding.ll
Log Message:
-----------
[LoongArch] Add test for scalar FP rounding (#114968)
Commit: f6948e8f9df4f0cf7d1754afe063b143a9091c0f
https://github.com/llvm/llvm-project/commit/f6948e8f9df4f0cf7d1754afe063b143a9091c0f
Author: Yongtao Huang <99629139+hyongtao-db at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
Log Message:
-----------
[LoopVectorize] Fix typo in branch-weights.ll test CEHCK->CHECK (NFC) (#113574)
Fix the typo CEHCK.
Signed-off-by: Yongtao Huang <yongtaoh2022 at gmail.com>
Commit: 03f06b97106b84569db8e0277e70e44bb3b1e9b7
https://github.com/llvm/llvm-project/commit/03f06b97106b84569db8e0277e70e44bb3b1e9b7
Author: Ding Fei <fding at feysh.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/clang-query/QueryParser.cpp
M clang-tools-extra/clang-query/QuerySession.h
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-query] add basic profiling on matching each ASTs (#114806)
We've found that basic profiling could help improving/optimizing when
developing clang-tidy checks.
This PR adds an extra command
```
set enable-profile (true|false) Set whether to enable matcher profiling.
```
which enables profiling queries on each file.
Sample output:
```
$ cat test.cql
set enable-profile true
m binaryOperator(isExpansionInMainFile())
$ cat test.c
int test(int i, int j) {
return i + j;
}
$ clang-query --track-memory -f test.cql test.c --
Match #1:
{{.*}}/test.c:2:10: note: "root" binds here
2 | return i + j;
| ^~~~~
1 match.
===-------------------------------------------------------------------------===
clang-query matcher profiling
===-------------------------------------------------------------------------===
Total Execution Time: 0.0000 seconds (0.0000 wall clock)
---User Time--- --System Time-- --User+System-- ---Wall Time--- ---Mem--- --- Name ---
0.0000 (100.0%) 0.0000 (100.0%) 0.0000 (100.0%) 0.0000 (100.0%) 224 {{.*}}/test.c
0.0000 (100.0%) 0.0000 (100.0%) 0.0000 (100.0%) 0.0000 (100.0%) 224 Total
```
Commit: f0231b6164fd89f3c6794afd178f5ee67e15be99
https://github.com/llvm/llvm-project/commit/f0231b6164fd89f3c6794afd178f5ee67e15be99
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/test/CodeGen/Mips/fp16-promote.ll
Log Message:
-----------
[MIPS] Use softPromoteHalf legalization for fp16 rather than PromoteFloat (#110199)
Fix part of #97975.
Commit: 928460afc15978df61278337f45eb8c9bcfd13b0
https://github.com/llvm/llvm-project/commit/928460afc15978df61278337f45eb8c9bcfd13b0
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/test/Transforms/ArgumentPromotion/pr33641_remove_arg_dbgvalue.ll
Log Message:
-----------
[ArgPromotion] Use poison instead of undef as placeholder in deleted metadata [NFC]
Commit: 6070aeb3b71520287e81e322b19f32f18ec2031a
https://github.com/llvm/llvm-project/commit/6070aeb3b71520287e81e322b19f32f18ec2031a
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
Log Message:
-----------
[Coro] Use poison instead of undef as placeholder [NFC]
Commit: b2d2494731976ab7aa9702f3134472db694b9332
https://github.com/llvm/llvm-project/commit/b2d2494731976ab7aa9702f3134472db694b9332
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/test/benchmarks/CartesianBenchmarks.h
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/VariantBenchmarks.h
M libcxx/test/benchmarks/algorithms.partition_point.bench.cpp
M libcxx/test/benchmarks/algorithms/count.bench.cpp
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
M libcxx/test/benchmarks/algorithms/fill.bench.cpp
M libcxx/test/benchmarks/algorithms/find.bench.cpp
M libcxx/test/benchmarks/algorithms/for_each.bench.cpp
M libcxx/test/benchmarks/algorithms/lexicographical_compare.bench.cpp
M libcxx/test/benchmarks/algorithms/lower_bound.bench.cpp
M libcxx/test/benchmarks/algorithms/make_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/make_heap_then_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/min_max_element.bench.cpp
M libcxx/test/benchmarks/algorithms/minmax.bench.cpp
M libcxx/test/benchmarks/algorithms/mismatch.bench.cpp
M libcxx/test/benchmarks/algorithms/pop_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/pstl.stable_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/push_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_contains.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_ends_with.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_make_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_make_heap_then_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_pop_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_push_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_stable_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/set_intersection.bench.cpp
M libcxx/test/benchmarks/algorithms/sort.bench.cpp
M libcxx/test/benchmarks/algorithms/sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/stable_sort.bench.cpp
M libcxx/test/benchmarks/allocation.bench.cpp
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/deque.bench.cpp
M libcxx/test/benchmarks/deque_iterator.bench.cpp
M libcxx/test/benchmarks/exception_ptr.bench.cpp
M libcxx/test/benchmarks/filesystem.bench.cpp
M libcxx/test/benchmarks/format.bench.cpp
M libcxx/test/benchmarks/format/write_double_comparison.bench.cpp
M libcxx/test/benchmarks/format/write_int_comparison.bench.cpp
M libcxx/test/benchmarks/format/write_string_comparison.bench.cpp
M libcxx/test/benchmarks/format_to.bench.cpp
M libcxx/test/benchmarks/format_to_n.bench.cpp
M libcxx/test/benchmarks/formatted_size.bench.cpp
M libcxx/test/benchmarks/formatter_float.bench.cpp
M libcxx/test/benchmarks/formatter_int.bench.cpp
M libcxx/test/benchmarks/function.bench.cpp
M libcxx/test/benchmarks/hash.bench.cpp
M libcxx/test/benchmarks/join_view.bench.cpp
M libcxx/test/benchmarks/lexicographical_compare_three_way.bench.cpp
M libcxx/test/benchmarks/libcxxabi/dynamic_cast.bench.cpp
M libcxx/test/benchmarks/libcxxabi/dynamic_cast_old_stress.bench.cpp
M libcxx/test/benchmarks/map.bench.cpp
M libcxx/test/benchmarks/monotonic_buffer.bench.cpp
M libcxx/test/benchmarks/numeric/gcd.bench.cpp
M libcxx/test/benchmarks/ordered_set.bench.cpp
M libcxx/test/benchmarks/random.bench.cpp
M libcxx/test/benchmarks/shared_mutex_vs_mutex.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/benchmarks/string.bench.cpp
M libcxx/test/benchmarks/stringstream.bench.cpp
M libcxx/test/benchmarks/system_error.bench.cpp
M libcxx/test/benchmarks/to_chars.bench.cpp
M libcxx/test/benchmarks/unordered_set_operations.bench.cpp
M libcxx/test/benchmarks/variant_visit_1.bench.cpp
M libcxx/test/benchmarks/variant_visit_2.bench.cpp
M libcxx/test/benchmarks/variant_visit_3.bench.cpp
M libcxx/test/benchmarks/vector_operations.bench.cpp
Log Message:
-----------
[libc++] Make benchmarks forward-compatible with the test suite (#114502)
This patch fixes warnings and errors that come up when running the
benchmarks as part of the test suite. It also adds the necessary Lit
annotations to make it pass in various configurations and increases the
portability of the benchmarks.
Commit: 119aac00d5d3001cce80dbe6cba065873836e1d4
https://github.com/llvm/llvm-project/commit/119aac00d5d3001cce80dbe6cba065873836e1d4
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/EarlyCSE.cpp
Log Message:
-----------
EarlyCSE: refactor getOrCreateResult (NFC) (#113339)
Commit: 5df387227ea39cb1b0ff7e7f9930744e663ed41c
https://github.com/llvm/llvm-project/commit/5df387227ea39cb1b0ff7e7f9930744e663ed41c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] visitAND - refactor "and (sub 0, ext(bool X)), 1 --> zext(bool X)" to use SDPatternMatch.
Commit: d7979c111ef80f77d1e04b1f49538f8946fe8f5f
https://github.com/llvm/llvm-project/commit/d7979c111ef80f77d1e04b1f49538f8946fe8f5f
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[Clang][TableGen] Add explicit symbol visibility macros to code generated (#109362)
Update ClangAttrEmitter TableGen to add explicit symbol visibility
macros to attribute class declarations it creates.
Both AnnotateFunctions and Attribute example plugins require
clang::AnnotateAttr TableGen created functions to be exported from the
Clang shared library.
This depends on macros to be added in
https://github.com/llvm/llvm-project/pull/108276
Commit: aef0e77c76e3fb810852f3d0c79cc4daae52f67e
https://github.com/llvm/llvm-project/commit/aef0e77c76e3fb810852f3d0c79cc4daae52f67e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/Mips/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/PowerPC/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/Thumb2/srem-seteq-illegal-types.ll
Log Message:
-----------
[DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (#114992)
If we're masking the LSB of a SRL node result and that is shifting down an extended sign bit, see if we can change the SRL to shift down the MSB directly.
These patterns can occur during legalisation when we've sign extended to a wider type but the SRL is still shifting from the subreg.
Alternative to #114967
Fixes the remaining regression in #112588
Commit: 6b64f365364a6bf9a0ae039f6115871bc3b8ce07
https://github.com/llvm/llvm-project/commit/6b64f365364a6bf9a0ae039f6115871bc3b8ce07
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
Log Message:
-----------
[NFC] Use `std::move` to avoid copy (#113080)
Commit: 4a04dd4bca75bf15548d777a8cfcf032f55d4289
https://github.com/llvm/llvm-project/commit/4a04dd4bca75bf15548d777a8cfcf032f55d4289
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
Log Message:
-----------
[RISCV] add varargs functions test (#114970)
This patch adds a test of varargs functions, that use frame pointer and
do the second sp adjustment.
Commit: ba60f6dc03126d8b26bba5be6338fd8b3580bd25
https://github.com/llvm/llvm-project/commit/ba60f6dc03126d8b26bba5be6338fd8b3580bd25
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGObjCMac.cpp
M llvm/tools/bugpoint/CrashDebugger.cpp
Log Message:
-----------
Remove leftover uses of llvm::Type::getPointerTo() (#114993)
`llvm::Type::getPointerTo()` is to be deprecated.
Replace remaining uses of it.
Commit: a5e189877ac3a50fb3ee385b8a434b691677537a
https://github.com/llvm/llvm-project/commit/a5e189877ac3a50fb3ee385b8a434b691677537a
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] NFC: Simplify 64 file offset naming in unit tests (#114908)
Commit: 15c7e9f9038e0c03c0dde1a8b85dd0f37072e832
https://github.com/llvm/llvm-project/commit/15c7e9f9038e0c03c0dde1a8b85dd0f37072e832
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan][NFC] Remove some unneeded headers, make guards more obvious (#114911)
Commit: 877cb9a2edc9057d70321e436e5ea8ccc1a87140
https://github.com/llvm/llvm-project/commit/877cb9a2edc9057d70321e436e5ea8ccc1a87140
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Support/KnownBits.cpp
M llvm/test/Analysis/ValueTracking/knownbits-sat-addsub.ll
M llvm/unittests/Support/KnownBitsTest.cpp
Log Message:
-----------
[KnownBits] Make `{s,u}{add,sub}_sat` optimal (#113096)
Changes are:
1) Make signed-overflow detection optimal
2) For signed-overflow, try to rule out direction even if we can't
totally rule out overflow.
3) Intersect add/sub assuming no overflow with possible overflow
clamping values as opposed to add/sub without the assumption.
Commit: b8f9063ae9ca82a93fc9ea1365362926c92cc0ca
https://github.com/llvm/llvm-project/commit/b8f9063ae9ca82a93fc9ea1365362926c92cc0ca
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++] Simplify string::reserve (#114869)
We're checking quite a few things that are either trivially true or
trivially false. These cases became trivial when we changed `reserve()`
to never shrink.
Commit: 0c18def2c18c4b99a5f448496461b60f576992fa
https://github.com/llvm/llvm-project/commit/0c18def2c18c4b99a5f448496461b60f576992fa
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/RISCV/interleave-greater-than-slice.ll
Log Message:
-----------
[SLP]Allow interleaving check only if it is less than number of elements
Need to check if the interleaving factor is less than total number of
elements in loads slice to handle it correctly and avoid compiler crash.
Fixes report https://github.com/llvm/llvm-project/pull/112361#issuecomment-2457227670
Commit: 0a68171b3c67503f7143856580f1b22a93ef566e
https://github.com/llvm/llvm-project/commit/0a68171b3c67503f7143856580f1b22a93ef566e
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/test/python/ir/array_attributes.py
Log Message:
-----------
Revert "[MLIR,Python] Support converting boolean numpy arrays to and from mlir attributes (#113064)"
This reverts commit fb7bf7a5acc65be44fc546f282942b91472553b3. There is
an ASan issue here, see the discussion on
https://github.com/llvm/llvm-project/pull/113064.
Commit: c50bb99d87f845262d7fcf3a2ee50c087ac05181
https://github.com/llvm/llvm-project/commit/c50bb99d87f845262d7fcf3a2ee50c087ac05181
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
Log Message:
-----------
[RISCV] Allow vslidedown.vx in isExtractSubvectorCheap for half VT case (#114886)
We have a special case where we allow the extract of the high half of a
vector and consider it cheap. However, we had previously required that
the type have no more than 32 elements for this to work. (Because
64/2=32, and the largest immediate for a vslidedown.vi is 31.)
This has the effect of pessimizing shuffle vector lowering for long
vectors - i.e. at SEW=e8, zvl128b, an m2 or m4 deinterleave can't be
matched because it gets scalarized during DAG construction and can't be
"profitably" rebuilt by DAG combine. Note that for RISCV, scalarization
via insert and extract is extremely expensive (i.e. two vslides per
element), so a slide + two half width shuffles is almost always a net
win. (i.e, this isn't really specific to vnsrl)
Separately, I want to look at the decision to scalarize at all, but it
seems worthwhile adjusting this while we're at it regardless.
Commit: 2c13dec3284d019fdedf7913083ce82aa5cb97aa
https://github.com/llvm/llvm-project/commit/2c13dec3284d019fdedf7913083ce82aa5cb97aa
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/optimizations/add-check-overflow.ll
Log Message:
-----------
[clang][llvm][SPIR-V] Explicitly encode native integer widths for SPIR-V (#110695)
SPIR-V doesn't currently encode "native" integer bit-widths in its
datalayout(s). This is problematic as it leads to optimisation passes,
such as InstCombine, getting ideas and e.g. shrinking to non
byte-multiple integer types, which is not desirable and can lead to
breakage further down in the toolchain. This patch addresses that by
encoding `i8`, `i16`, `i32` and `i64` as native types for vanilla SPIR-V
(the spec natively supports them), and `i32` and `i64` for AMDGCNSPIRV
(where the hardware targets are known). We also set the stack alignment
on the latter, as it is overaligned (32-bit vs 8-bit).
Commit: c2b61fcb3cd4ffa286b24437b7b6d66f0dee6c25
https://github.com/llvm/llvm-project/commit/c2b61fcb3cd4ffa286b24437b7b6d66f0dee6c25
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/IR/Intrinsics.cpp
Log Message:
-----------
[NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (#114822)
Add `using namespace Intrinsic` to Intrinsics.cpp file.
Commit: 44f49b551df8152a3e1e84705e116f8a20f62295
https://github.com/llvm/llvm-project/commit/44f49b551df8152a3e1e84705e116f8a20f62295
Author: muiez <73544786+muiez at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPMacroExpansion.cpp
Log Message:
-----------
[NFC] Move RegisterBuiltinMacro function into the Preprocessor class (#100142)
The `RegisterBuiltinMacro` function has been moved to the Preprocessor
class for accessibility and has been refactored for readability.
Commit: 75d673718a5d67a7b9a4d622466cd07927549ba8
https://github.com/llvm/llvm-project/commit/75d673718a5d67a7b9a4d622466cd07927549ba8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
Log Message:
-----------
AMDGPU: Fix clobbering temp reg for large frame indexes in VOP3 users (#114924)
For a VOP3 instruction that does not permit a literal operand with an
SGPR operand, this would re-use the same scratch register for both
operands,
clobbering the original value.
Commit: 1a684591da84dea644de6524a1d8646b245f636b
https://github.com/llvm/llvm-project/commit/1a684591da84dea644de6524a1d8646b245f636b
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/lang/cpp/dereferencing_references/TestCPPDereferencingReferences.py
M lldb/test/API/lang/cpp/dereferencing_references/main.cpp
Log Message:
-----------
Revert "Fix pointer to reference type (#113596)" (#114831)
This reverts commit 25909b811a7ddc983d042b15cb54ec271a673d63 due to
unresolved questions about the behavior of "frame var" and ValueObject
in the presence of references (see the original patch for discussion).
Commit: dd2c0b1bb9d685162eb955ed8269ba7f6982fe2d
https://github.com/llvm/llvm-project/commit/dd2c0b1bb9d685162eb955ed8269ba7f6982fe2d
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
Log Message:
-----------
[mlir][acc] Simplify data entry/exit operation builders (#114880)
Add new builders to DataBoundsOp, data entry ops, and data exit ops to
simplify their construction since many of their inputs are optional.
Additionally, small refactoring was needed for data exit ops to reduce
duplication. Unit tests were added to exercise the new builders.
Commit: d0bbe4fb546bf4d4283d453725867204e443fa8c
https://github.com/llvm/llvm-project/commit/d0bbe4fb546bf4d4283d453725867204e443fa8c
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Improve interleave load coverage (NF7, NF8, and one hot)
NF7 and NF8 were just missing from the coverage. The one active lane
cases should be a strided load instead.
Commit: 92574b5fafa2d0e8efe4082b76a2f179b121df29
https://github.com/llvm/llvm-project/commit/92574b5fafa2d0e8efe4082b76a2f179b121df29
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/unittests/ADT/FunctionRefTest.cpp
Log Message:
-----------
Fix a dangling reference in FunctionRefTest.cpp (#114949)
Commit: a63f915771ea89651a53584e483b3c5d9e73bd27
https://github.com/llvm/llvm-project/commit/a63f915771ea89651a53584e483b3c5d9e73bd27
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Lower/DirectivesCommon.h
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
M flang/test/Lower/OpenMP/atomic-capture.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenACC/invalid.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm-invalid.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[flang][openacc][openmp] Support implicit casting on the atomic interface (#114390)
ACCMP atomics do not support type conversion. Specifically, I have
encountered semantically incorrect code for atomic reads.
Example:
```
program main
implicit none
real(8) :: n
integer :: x
x = 1.0
!$acc atomic capture
n = x
x = n
!$acc end atomic
end program main
```
We have this error when compiling it with flang-new: `error:
loc("rep.f90":6:9): expected three operations in atomic.capture region
(one terminator, and two atomic ops)`
Yet, in the following generated FIR code, we observe three issues.
1. `fir.convert` intrudes into the capture region.
2. An incorrect temporary (`%2`) is being updated instead of `n`.
3. If we allow `n` in place of `%2`, the operand types of `atomic.read`
do not match. Introducing a `!fir.ref<i32> -> !fir.ref<f64>` conversion
on `x` is inaccurate because we need to convert the value of `x`.
```
%2 = "fir.alloca"() <{in_type = i32, operandSegmentSizes = array<i32: 0, 0>}> : () -> !fir.ref<i32>
%3 = "fir.alloca"() <{bindc_name = "n", in_type = f64, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFEn"}> : () -> !fir.ref<f64>
%4:2 = "hlfir.declare"(%3) <{operandSegmentSizes = array<i32: 1, 0, 0, 0>, uniq_name = "_QFEn"}> : (!fir.ref<f64>) -> (!fir.ref<f64>, !fir.ref<f64>)
%5 = "fir.alloca"() <{bindc_name = "x", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFEx"}> : () -> !fir.ref<i32>
%6:2 = "hlfir.declare"(%5) <{operandSegmentSizes = array<i32: 1, 0, 0, 0>, uniq_name = "_QFEx"}> : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
%7 = "arith.constant"() <{value = 1 : i32}> : () -> i32
"hlfir.assign"(%7, %6#0) : (i32, !fir.ref<i32>) -> ()
%8 = "fir.load"(%4#0) : (!fir.ref<f64>) -> f64
%9 = "fir.convert"(%8) : (f64) -> i32
"fir.store"(%9, %2) : (i32, !fir.ref<i32>) -> ()
%10 = "fir.load"(%6#0) : (!fir.ref<i32>) -> i32
%11 = "fir.convert"(%10) : (i32) -> f64
"acc.atomic.capture"() ({
"acc.atomic.read"(%2, %6#1) <{element_type = f64}> : (!fir.ref<i32>, !fir.ref<i32>) -> ()
%12 = "fir.convert"(%11) : (f64) -> i32
"acc.atomic.write"(%2, %12) : (!fir.ref<i32>, i32) -> ()
"acc.terminator"() : () -> ()
}) : () -> ()
```
This PR updates `flang/lib/Lower/DirectivesCommon.h` to solve the issues
by taking the following approaches (from top to bottom):
1. Move `fir.convert` for `atomic.write` out of the capture region.
2. Remove the `!fir.ref<i32> -> !fir.ref<f64>` conversion found in
`genOmpAccAtomicRead`.
3. Eliminate unnecessary `genExprAddr` calls on the RHS, which create an
invalid temporary for `x = 1.0`.
4. When generating a capture operation, refer to the original LHS
instead of the type-casted RHS.
Here, we have to allow for the cases where the operand types of
`atomic.read` differ from one another. Thus, this PR also removes the
`AllTypesMatch` trait from both `acc.atomic.read` and `omp.atomic.read`.
The example code is converted as follows:
```
%0 = fir.alloca f64 {bindc_name = "n", uniq_name = "_QFEn"}
%1:2 = hlfir.declare %0 {uniq_name = "_QFEn"} : (!fir.ref<f64>) -> (!fir.ref<f64>, !fir.ref<f64>)
%2 = fir.alloca i32 {bindc_name = "x", uniq_name = "_QFEx"}
%3:2 = hlfir.declare %2 {uniq_name = "_QFEx"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
%c1_i32 = arith.constant 1 : i32
hlfir.assign %c1_i32 to %3#0 : i32, !fir.ref<i32>
%4 = fir.load %1#0 : !fir.ref<f64>
%5 = fir.convert %4 : (f64) -> i32
acc.atomic.capture {
acc.atomic.read %1#1 = %3#1 : !fir.ref<f64>, !fir.ref<i32>, i32
acc.atomic.write %3#1 = %5 : !fir.ref<i32>, i32
}
```
Fixes #112911.
Commit: 34b0bb51213d0c4e3afa128d6107884cd7138cf2
https://github.com/llvm/llvm-project/commit/34b0bb51213d0c4e3afa128d6107884cd7138cf2
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Chris as the HLSL maintainer (#114863)
Chris has extensive knowledge of HLSL and a long track-record of quality
reviews in Clang.
Commit: c48fc467575e6dfa6578c66ebafa7c29de3fdaf4
https://github.com/llvm/llvm-project/commit/c48fc467575e6dfa6578c66ebafa7c29de3fdaf4
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Add Mariya as maintainer for constant expressions & Sema (#114974)
Mariya has extensive knowledge of the constant expression evaluator and
has done a lot of reviewing in Sema over the past year or so.
Commit: 8b7af60c0a919ce231d4ac88a39941bb04f8d44c
https://github.com/llvm/llvm-project/commit/8b7af60c0a919ce231d4ac88a39941bb04f8d44c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/unittests/IR/AffineMapTest.cpp
Log Message:
-----------
[mlir][affine] Add unit tests for `isProjectedPermutation` (#114775)
The only way to test `isProjectedPermutation` is through unit tests. The
concept of "projected permutations" is tricky to document and these
tests are a good source documentation of the expected/intended
behavoiur. Hence these additional unit tests.
Commit: 1a590870b6b3452934ecc245e01957fdab48909c
https://github.com/llvm/llvm-project/commit/1a590870b6b3452934ecc245e01957fdab48909c
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/AST/ASTContext.h
A clang/include/clang/AST/SYCLKernelInfo.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Sema/SemaSYCL.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/SemaSYCL/sycl-kernel-entry-point-attr-grammar.cpp
A clang/test/SemaSYCL/sycl-kernel-entry-point-attr-ignored.cpp
Log Message:
-----------
[SYCL] The sycl_kernel_entry_point attribute. (#111389)
The `sycl_kernel_entry_point` attribute is used to declare a function that
defines a pattern for an offload kernel to be emitted. The attribute requires
a single type argument that specifies the type used as a SYCL kernel name as
described in section 5.2, "Naming of kernels", of the SYCL 2020 specification.
Properties of the offload kernel are collected when a function declared with
the `sycl_kernel_entry_point` attribute is parsed or instantiated. These
properties, such as the kernel name type, are stored in the AST context where
they are (or will be) used for diagnostic purposes and to facilitate reflection
to a SYCL run-time library. These properties are not serialized with the AST
but are recreated upon deserialization.
The `sycl_kernel_entry_point` attribute is intended to replace the existing
`sycl_kernel` attribute which is intended to be deprecated in a future change
and removed following an appropriate deprecation period. The new attribute
differs in that it is enabled for both SYCL host and device compilation, may
be used with non-template functions, explicitly indicates the type used as
the kernel name type, and will impact AST generation.
This change adds the basic infrastructure for the new attribute. Future
changes will add diagnostics and new AST support that will be used to drive
generation of the corresponding offload kernel.
Commit: 41312b011a4a4b6f661779eeedebed0b8bac233f
https://github.com/llvm/llvm-project/commit/41312b011a4a4b6f661779eeedebed0b8bac233f
Author: Pranav Kant <prka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add :support to ast target (#115014)
Commit: bce08d822f8dc2993c831a05a33449ac495781ac
https://github.com/llvm/llvm-project/commit/bce08d822f8dc2993c831a05a33449ac495781ac
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.mli
Log Message:
-----------
[OCaml] Fix typo "moethd"
Commit: 8dfd9ff4b5a63e789014ba65ed765cb0f5ebaf34
https://github.com/llvm/llvm-project/commit/8dfd9ff4b5a63e789014ba65ed765cb0f5ebaf34
Author: Pranav Kant <prka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Unbreak bazel bot (#115016)
Broken first by #114620
Commit: 07443e9776f97090a776cba0288d65e90b6f1af4
https://github.com/llvm/llvm-project/commit/07443e9776f97090a776cba0288d65e90b6f1af4
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
Log Message:
-----------
[libc++][test] Improve ThrowingT to Accurately Throw after throw_after > 1 Use (#114077)
This PR fixes the `ThrowingT` class, which currently fails to raise
exceptions after a specified number of copy construction operations. The
class is intended to throw in a controlled manner based on a specified
counter value `throw_after`. However, its current implementation of the
copy constructor fails to achieve this goal.
The problem arises because the copy constructor does not initialize the
`throw_after_n_` member, leaving `throw_after_n_` to default to `nullptr`
as defined by the in-class initializer. As a result, its copy constructor
always checks against `nullptr`, causing an immediate exception rather
than throwing after the specified number `throw_after` of uses. The fix
is straightforward: simply initialize the `throw_after_n_` member in the
member initializer list.
This issue was previously uncovered because all exception tests for
`std::vector` in `exceptions.pass.cpp` used a `throw_after` value of 1,
which coincidentally aligned with the class's behavior.
Commit: 44c279c0620b0a5b984d3e78a4c559e40dcd50bc
https://github.com/llvm/llvm-project/commit/44c279c0620b0a5b984d3e78a4c559e40dcd50bc
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Nominate Saleem and myself as maintainers for API Notes (#114981)
Saleem has upstreamed a large chunk of API Notes infrastructure from the
Apple fork, and over the past year I've upstreamed the remaining part of
API Notes, added new annotations and improved C++ language support.
https://github.com/llvm/llvm-project/commits/main/clang/lib/APINotes
Commit: 7f5a13d1e85d85b9b0266c9edc97240d6b2f268f
https://github.com/llvm/llvm-project/commit/7f5a13d1e85d85b9b0266c9edc97240d6b2f268f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
Log Message:
-----------
[X86] vector-idiv-udiv-512.ll - regenerate test checks with vpternlog comments
Commit: 560517fb71e3928ab63cfa78ead7ff766e733f9d
https://github.com/llvm/llvm-project/commit/560517fb71e3928ab63cfa78ead7ff766e733f9d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
Log Message:
-----------
[X86] vector-fshl-*- regenerate test checks with vpternlog comments
Commit: 1715549373ab774bd73de0c982f7f01f30f94720
https://github.com/llvm/llvm-project/commit/1715549373ab774bd73de0c982f7f01f30f94720
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
Log Message:
-----------
[X86] vector-fshr-*- regenerate test checks with vpternlog comments
Commit: 4a88b9043fc400e9c7a8a7ca3cfd7a67be3a6a7f
https://github.com/llvm/llvm-project/commit/4a88b9043fc400e9c7a8a7ca3cfd7a67be3a6a7f
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
Log Message:
-----------
[MLIR] Fix dangling llvm::function_ref references (#114950)
Commit: 29d4d7f6207811952c23533bb7ffe509e0d1eb07
https://github.com/llvm/llvm-project/commit/29d4d7f6207811952c23533bb7ffe509e0d1eb07
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
A flang/test/Semantics/OpenMP/depend06.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
Log Message:
-----------
[flang][OpenMP] Add frontend support for INOUTSET and MUTEXINOUTSET (#114895)
These are additional modifiers of the "task dependence type" kind, which
is already handled by the frontend.
Commit: 52624d77c9d541dc6adccdbfea6e981e8e8079b8
https://github.com/llvm/llvm-project/commit/52624d77c9d541dc6adccdbfea6e981e8e8079b8
Author: Jaime González <jaime.gonzalez at appentra.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[clang] Check '-Wp,' arg has values before accesing (#113677)
Executing `clang -Wp,` without any argument value causes Undefined
Behavior due to accessing a SmallVector without elements
Executing clang in debug mode raises an assert and Valgrind complains as
follow:
```
$ valgrind bin/clang -Wp,
==18620== Memcheck, a memory error detector
==18620== Copyright (C) 2002-2022, and GNU GPL'd, by Julian Seward et al.
==18620== Using Valgrind-3.22.0 and LibVEX; rerun with -h for copyright info
==18620== Command: bin/clang -Wp,
==18620==
==18620== Conditional jump or move depends on uninitialised value(s)
==18620== at 0x44F215B: clang::driver::Driver::TranslateInputArgs(llvm::opt::InputArgList const&) const (in /home/jaime/devel/llvm-project/build/bin/clang-20)
==18620== by 0x4515831: clang::driver::Driver::BuildCompilation(llvm::ArrayRef<char const*>) (in /home/jaime/devel/llvm-project/build/bin/clang-20)
==18620== by 0x10B3435: clang_main(int, char**, llvm::ToolContext const&) (in /home/jaime/devel/llvm-project/build/bin/clang-20)
==18620== by 0xF78F99: main (in /home/jaime/devel/llvm-project/build/bin/clang-20)
==18620==
...
```
Commit: 616aff126caaf93a0d9868d279e4c99d1e45fef0
https://github.com/llvm/llvm-project/commit/616aff126caaf93a0d9868d279e4c99d1e45fef0
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Interfaces/InferIntRangeInterface.cpp
M mlir/test/Dialect/Vector/int-range-interface.mlir
Log Message:
-----------
[mlir] IntegerRangeAnalysis: handle vector types in getDestWidth() (#114898)
PR #112292 added support for vectors to the integer range inference
interface and analysis, but didn't update the getDestWidth() method.
This caused crashes when trying to infer the ranges of `arith.extsi`
with vector inputs, as the code would try to sign-extend a N-bit value
to a 0-bit one, which would assert and crash.
This commit fixes the issue by adding a getElementTypeOrSelf().
Commit: cb9700ebe4f8e002ed5f9ebf55bb44e3ecaf007c
https://github.com/llvm/llvm-project/commit/cb9700ebe4f8e002ed5f9ebf55bb44e3ecaf007c
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/XRayArgs.cpp
M clang/test/Driver/XRay/xray-shared.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_trampoline_AArch64.S
M compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
M compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
M compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
M compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
Log Message:
-----------
Revert "[XRay][AArch64] Support -fxray-shared" (#115022)
Reverts llvm/llvm-project#114431
Commit: 847d50791c07b2f0d644de4ed99cd9d35940bd0b
https://github.com/llvm/llvm-project/commit/847d50791c07b2f0d644de4ed99cd9d35940bd0b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Affine/Utils.h
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/invalid.mlir
M mlir/test/Dialect/Affine/ops.mlir
Log Message:
-----------
[mlir][affine] Define `affine.linearize_index` (#114480)
`affine.linearize_index` is the inverse of `affine.delinearize_index`
and general useful for representing computations (like those needed to
move from N-D to 1-D memrefs) that put together indices.
This commit introduces `affine.linearize_index` and one simple
canonicalization for it.
There are plans to add `affine.linearize_index` and
`affine.delinearize_index` pair canonicalizations, but we are saving
those for a followup PR (especially since having #113846 landed would
make them nicer).
Note while `affine` may not be the natural home for this operation,
https://discourse.llvm.org/t/better-location-of-affine-delinearize-operation/80565/13
didn't come to any better consensus location.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: 248e7483fc3a21067579263a784c9b831c0e09ff
https://github.com/llvm/llvm-project/commit/248e7483fc3a21067579263a784c9b831c0e09ff
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][affine] Generalize canonicalization for one-element delinearize (#114871)
There was an existing canonicalization pattern for delinearize_index
that would remove `affine.delinearize_index %linear into (%basis)`
under some conditions. However, the delinearize_index means that this
rewrite is always permissisible.
Commit: 9a5e5a6ecc96fb8fb3642c73ff585cb6b919f653
https://github.com/llvm/llvm-project/commit/9a5e5a6ecc96fb8fb3642c73ff585cb6b919f653
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[NFC][NVPTX] Remove use of MachineInstr prior to ISel (#114913)
Delete dead code that checks for `NVPTX::IMOV16rr`.
Commit: 652db7e4ff773df1bc78c920d1bc75a93e92bae6
https://github.com/llvm/llvm-project/commit/652db7e4ff773df1bc78c920d1bc75a93e92bae6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Support data transfer from pointer to a descriptor (#114892)
When source is a pointer to an array or a scalar, embox it and use the
`CUFDataTransferDescDesc` or `CUFDataTransferGlobalDescDesc` entry
points. The runtime is already able to deal with all the corner cases
like non contiguous arrays and so on so we exploit this.
Memset might still be used for simple case where we want to initialize
to 0 for example. This will come in a follow up patch.
Commit: 117e952a53ea97680293b7d8d6950090284ef198
https://github.com/llvm/llvm-project/commit/117e952a53ea97680293b7d8d6950090284ef198
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/LiveRangeEdit.cpp
A llvm/test/CodeGen/SystemZ/liverangeedit-kill-memop.mir
Log Message:
-----------
[LiveRangeEdit] Remove any MemoryOperand on MI when converting it to KILL. (#114407)
When LiveRangeEdit::eliminateDeadDef() converts an MI to a KILL instruction,
it should also call dropMemRefs() in order to erase any MachineMemOperand
present.
This was discovered in testing as the MachineVerifier does not accept an MMO
without the corresponding MI mayLoad/mayStore flag, which the KILL opcode
lacks.
Commit: 6d6287af842ded11771b23dd57c425a533c28d4b
https://github.com/llvm/llvm-project/commit/6d6287af842ded11771b23dd57c425a533c28d4b
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/trunc-shl-zext.ll
Log Message:
-----------
[NFC] Fix test for zext(shl(trunc)) fold (#113778)
This fold already exist but there is a call to [shouldChangeType
](https://github.com/llvm/llvm-project/blob/91fdfec263ff2b8e88433c4294a550cabb0f2314/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1202)
that blocks it if the target layout is missing a definition of the types
in the casts.
closes https://github.com/llvm/llvm-project/issues/61650
Commit: 07ee870c9ae44b7dd90548e1706118d1d9f816b2
https://github.com/llvm/llvm-project/commit/07ee870c9ae44b7dd90548e1706118d1d9f816b2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[AST] Fix a warning
This patch fixes:
clang/lib/AST/ASTContext.cpp:14432:8: error: unused variable 'IT'
[-Werror,-Wunused-variable]
Commit: 27d3e447d6a04b03f44b1cdedbc1e9a64fc21ce3
https://github.com/llvm/llvm-project/commit/27d3e447d6a04b03f44b1cdedbc1e9a64fc21ce3
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libc/newhdrgen/yaml_to_classes.py
Log Message:
-----------
[libc][newhdrgen] Fix NameError in yaml_to_classes.py (#114952)
Fixes "NameError: name 'yaml_file' is not defined" that would be raised
whenever running yaml_to_classes.py with the --add_function option since
commit 2e6d451d1565814415e2692ef8e5c3942d4c11a2.
Commit: 9540a7ae82dfabe551bfef94fc9f29ebebf841da
https://github.com/llvm/llvm-project/commit/9540a7ae82dfabe551bfef94fc9f29ebebf841da
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/srem-lkk.ll
M llvm/test/CodeGen/AArch64/srem-vector-lkk.ll
M llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/combine-udiv.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
M llvm/test/CodeGen/X86/pr62286.ll
M llvm/test/CodeGen/X86/pr67333.ll
M llvm/test/CodeGen/X86/sad.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
Log Message:
-----------
[DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (#112588)
The dpbusd_const.ll test change is due to us losing the expanded add reduction pattern as one of the elements is known to be zero (removing one of the adds from the reduction pyramid). I don't think its of concern.
Noticed while working on #107423
Commit: ce112a7f44ca0776d1192f6183a33e0c9f69df53
https://github.com/llvm/llvm-project/commit/ce112a7f44ca0776d1192f6183a33e0c9f69df53
Author: lialan <alan.li at me.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-emulate-narrow-type-unaligned.mlir
Log Message:
-----------
[MLIR] support dynamic indexing in `VectorEmulateNarrowTypes` (#114169)
* Supports `vector.load` and `vector.transfer_read` ops.
* In the case of dynamic indexing, use per-element insertion/extraction
to build desired narrow type vectors.
* Fixed wrong function comment of `getCompressedMaskOp`.
---------
Co-authored-by: Han-Chung Wang <hanhan0912 at gmail.com>
Commit: 1e50958399e0bb2a558a5d5806a61da9b2ef9e74
https://github.com/llvm/llvm-project/commit/1e50958399e0bb2a558a5d5806a61da9b2ef9e74
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[tsan] Don't use `enum __tsan_memory_order` in tsan interface (#114724)
In C++ it's UB to use undeclared values as enum.
And there is support `__ATOMIC_HLE_ACQUIRE` and
`__ATOMIC_HLE_RELEASE` need such values.
Internal implementation was switched to `class enum`,
where that behavior is defined. But interface is C, so
we just switch to `int`.
Commit: a6fdfefbd04d2b85ba6c23def5790b735c075314
https://github.com/llvm/llvm-project/commit/a6fdfefbd04d2b85ba6c23def5790b735c075314
Author: Nico Weber <thakis at chromium.org>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerExtFunctionsWindows.cpp
Log Message:
-----------
[compiler-rt] Include stdlib.h for exit() (#115025)
It was originally included transitively, but no longer is after recent
<vector> cleanups in libc++.
Similar to #113951.
Commit: 3297858c19f3914513041d2c8407bc26c889793a
https://github.com/llvm/llvm-project/commit/3297858c19f3914513041d2c8407bc26c889793a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/tools/llvm-readobj/ObjDumper.cpp
Log Message:
-----------
[llvm-readobj] Use heterogenous lookups with std::map (NFC) (#114929)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: 8b8778bae5aab471e426632c755fff1fff0ec979
https://github.com/llvm/llvm-project/commit/8b8778bae5aab471e426632c755fff1fff0ec979
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
[WebAssembly] Use heterogenous lookups with std::set (NFC) (#114930)
Commit: 665dd23a2a9e6a7694b80ad3f333327dc4fe00f5
https://github.com/llvm/llvm-project/commit/665dd23a2a9e6a7694b80ad3f333327dc4fe00f5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
Log Message:
-----------
[Utils] Simplify code with DenseMap::operator[] (NFC) (#114932)
Commit: e28d44086f9d23b2aa6e4ae563bd4932b382477b
https://github.com/llvm/llvm-project/commit/e28d44086f9d23b2aa6e4ae563bd4932b382477b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/tools/clang-refactor/TestSupport.cpp
Log Message:
-----------
[clang-refactor] Simplify code with std::map::operator[] (NFC) (#114933)
Commit: 380fd09d982eb199e3c79834fc0f6dc92eb90239
https://github.com/llvm/llvm-project/commit/380fd09d982eb199e3c79834fc0f6dc92eb90239
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
A llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
Log Message:
-----------
[WebAssembly] Fix unwind mismatches in new EH (#114361)
This fixes unwind mismatches for the new EH spec.
The main flow is similar to that of the legacy EH's unwind mismatch
fixing. The new EH shared `fixCallUnwindMismatches` and
`fixCatchUnwindMismatches` functions, which gather the range of
instructions we need to fix their unwind destination for, with the
legacy EH. But unlike the legacy EH that uses `try`-`delegate`s to fix
them, the new EH wrap those instructions with nested
`try_table`-`end_try_table`s that jump to a "trampoline" BB, where we
rethrow (using a `throw_ref`) the exception to the correct `try_table`.
For a simple example of a call unwind mismatch, suppose if `call foo`
should unwind to the outer `try_table` but is wrapped in another
`try_table` (not shown here):
```wast
try_table
...
call foo ;; Unwind mismatch. Should unwind to the outer try_table
...
end_try_table
```
Then we wrap the call with a new nested `try_table`-`end_try_table`, add
a `block` / `end_block` right inside the target `try_table`, and make
the nested `try_table` jump to it using a `catch_all_ref` clause, and
rethrow the exception using a `throw_ref`:
```wast
try_table
block $l0 exnref
...
try_table (catch_all_ref $l0)
call foo
end_try_table
...
end_block ;; Trampoline BB
throw_ref
end_try_table
```
---
This fixes two existing bugs. These are not easy to test independently
without the unwind mismatch fixing. The first one is how we calculate
`ScopeTops`. Turns out, we should do it in the same way as in the legacy
EH even though there is no `end_try` at the end of `catch` block
anymore. `nested_try` in `cfg-stackify-eh.ll` tests this case.
The second bug is in `rewriteDepthImmediates`. `try_table`'s immediates
should be computed without the `try_table` itself, meaning
```wast
block
try_table (catch ... 0)
end_try_table
end_block
```
Here 0 should target not `end_try_table` but `end_block`. This bug
didn't crash the program because `placeTryTableMarker` generated only
the simple form of `try_table` that has a single catch clause and an
`end_block` follows right after the `end_try_table` in the same BB, so
jumping to an `end_try_table` is the same as jumping to the `end_block`.
But now we generate `catch` clauses with depths greater than 0 with when
fixing unwind mismatches, which uncovered this bug.
---
One case that needs a special treatment was when `end_loop` precedes an
`end_try_table` within a BB and this BB is a (true) unwind destination
when fixing unwind mismatches. In this case we need to split this
`end_loop` into a predecessor BB. This case is tested in
`unwind_mismatches_with_loop` in `cfg-stackify-eh.ll`.
---
`cfg-stackify-eh.ll` contains mostly the same set of tests with the
existing `cfg-stackify-eh-legacy.ll` with the updated FileCheck
expectations. As in `cfg-stackify-eh-legacy.ll`, the FileCheck lines
mostly only contain control flow instructions and calls for readability.
- `nested_try` and `unwind_mismatches_with_loop` are added to test newly
found bugs in the new EH.
- Some tests in `cfg-stackify-eh-legacy.ll` about the legacy-EH-specific
asepcts have not been added to `cfg-stackify-eh.ll`.
(`remove_unnecessary_instrs`, `remove_unnecessary_br`,
`fix_function_end_return_type_with_try_catch`, and
`branch_remapping_after_fixing_unwind_mismatches_0/1`)
Commit: b14c436311e3ff78f61dd59c90486432d13bf38e
https://github.com/llvm/llvm-project/commit/b14c436311e3ff78f61dd59c90486432d13bf38e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (#115032)
Reverts llvm/llvm-project#114724
Breaks OSX builds
Commit: 6a263cef2d6a38f92265e819310bc60bb2ba49ee
https://github.com/llvm/llvm-project/commit/6a263cef2d6a38f92265e819310bc60bb2ba49ee
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp:202:2:
error: extra ';' outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
Commit: c8221359f0507a12d6b1159ab85ba768960cbd3f
https://github.com/llvm/llvm-project/commit/c8221359f0507a12d6b1159ab85ba768960cbd3f
Author: Pranav Kant <prka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Add dep on Analysis to fix build break (#115033)
Commit: dbb4858a8c0cd883ff4e4d5df20152c4b295b909
https://github.com/llvm/llvm-project/commit/dbb4858a8c0cd883ff4e4d5df20152c4b295b909
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir] Fix warnings
This patch fixes:
mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp:137:8:
error: unused variable 'vectorType' [-Werror,-Wunused-variable]
mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp:154:8:
error: unused variable 'srcType' [-Werror,-Wunused-variable]
mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp:155:8:
error: unused variable 'destType' [-Werror,-Wunused-variable]
Commit: b509eb7740b3300b79b90f8a43c374e28d13dc48
https://github.com/llvm/llvm-project/commit/b509eb7740b3300b79b90f8a43c374e28d13dc48
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
[HLSL] add IsTypedResourceElementCompatible type trait (#114864)
This PR implements a new type trait as a builtin,
__builtin_hlsl_is_typed_resource_element_compatible
This type traits verifies that the given input type is suitable as a
typed resource element type.
It checks that the given input type is homogeneous, has no more than 4
sub elements, does not exceed 16 bytes, and does not contain any arrays,
booleans, or enums.
Fixes an issue in https://github.com/llvm/llvm-project/pull/113730 that
needed to cause that PR to be reverted.
Fixes https://github.com/llvm/llvm-project/issues/113223
Commit: 76f993b6f66822e5067fa22bc645b6f51f860710
https://github.com/llvm/llvm-project/commit/76f993b6f66822e5067fa22bc645b6f51f860710
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
R libcxx/test/support/experimental_any_helpers.h
Log Message:
-----------
[libc++][NFC] Remove unused header in test/support
Commit: 5f8b83e40cfe36c376e44ef4459becb64458cdba
https://github.com/llvm/llvm-project/commit/5f8b83e40cfe36c376e44ef4459becb64458cdba
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/depobj-construct-v50.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
Log Message:
-----------
[flang][OpenMP] Deprecation message for DESTROY with no argument (#114988)
[5.2:625:17] The syntax of the DESTROY clause on the DEPOBJ construct
with no argument was deprecated.
Commit: ff5551cdb07f07e15900be3593c56c5760f8dd38
https://github.com/llvm/llvm-project/commit/ff5551cdb07f07e15900be3593c56c5760f8dd38
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A clang/include/clang/AST/DynamicRecursiveASTVisitor.h
M clang/lib/AST/CMakeLists.txt
A clang/lib/AST/DynamicRecursiveASTVisitor.cpp
Log Message:
-----------
[Clang] [NFC] Introduce `DynamicRecursiveASTVisitor` (#110040)
See #105195 as well as the big comment in DynamicRecursiveASTVisitor.cpp
for more context.
Commit: 02e5c25f62d33202be6cca2650d3ae60c896775f
https://github.com/llvm/llvm-project/commit/02e5c25f62d33202be6cca2650d3ae60c896775f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] SimplifyDemandedBitsForTargetNode - cleanup SSE shift-by-immediate handlers. NFC.
Cleanup the SHLI/SRLI/SRAI handlers to be more consistent - prep for a future patch.
Commit: 61d5addd942a5ef8128e48d3617419e6320d8280
https://github.com/llvm/llvm-project/commit/61d5addd942a5ef8128e48d3617419e6320d8280
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/combine-srem.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/vector-bo-select.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
Log Message:
-----------
[X86] SimplifyDemandedBitsForTargetNode - call SimplifyMultipleUseDemandedBits on SSE shift-by-immediate nodes.
Attempt to peek through multiple-use SHLI/SRLI/SRAI source vectors.
Commit: 04aaa35d40d8c5ff030014866691f9a56e59c142
https://github.com/llvm/llvm-project/commit/04aaa35d40d8c5ff030014866691f9a56e59c142
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libc/test/src/__support/OSUtil/linux/vdso_test.cpp
M libc/test/src/__support/integer_literals_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_long_double_test.cpp
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/msync_test.cpp
M libc/test/src/sys/mman/linux/shm_test.cpp
M libc/test/src/unistd/access_test.cpp
Log Message:
-----------
[libc][NFC] Correct test header inclusion, license (#114604)
Some tests were including LibcTest.h directly. Instead you should
include Test.h which does proper indirection for other test frameworks
we support (zxtest, gtest). Also added some license headers to tests
that were missing them.
Commit: 3cdac0670823e2da58001bc2600d2e74c929ae5b
https://github.com/llvm/llvm-project/commit/3cdac0670823e2da58001bc2600d2e74c929ae5b
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
A clang/test/CodeGenHLSL/builtins/dot4add_i8packed.hlsl
A clang/test/SemaHLSL/BuiltIns/dot4add_i8packed-errors.hlsl
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/DirectX/dot4add_i8packed.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll
Log Message:
-----------
[HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (#113623)
- create a clang built-in in Builtins.td
- link dot4add_i8packed in hlsl_intrinsics.h
- add lowering to spirv backend through expansion of operation as OPSDot
is missing up to SPIRV 1.6 in SPIRVInstructionSelector.cpp
- add lowering to spirv backend using OpSDot in applicable SPIRV version
or if SPV_KHR_integer_dot_product is enabled
- add dot4add_i8packed intrinsic to IntrinsicsDirectX.td and mapping to
DXIL.td op Dot4AddI8Packed
- add tests for HLSL intrinsic lowering to dx/spv intrinsic in
dot4add_i8packed.hlsl
- add tests for sema checks in dot4add_i8packed-errors.hlsl
- add test of spir-v lowering in SPIRV/dot4add_i8packed.ll
- add test to dxil lowering in DirectX/dot4add_i8packed.ll
Resolves #99220
Commit: e952728f88c8b0e0208dc991dd9a04fe8c211cfb
https://github.com/llvm/llvm-project/commit/e952728f88c8b0e0208dc991dd9a04fe8c211cfb
Author: walter erquinigo <walter at modular.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/commands/process/launch/TestProcessLaunch.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[LLDB] Retry Add a target.launch-working-dir setting
This retries the PR 113521 skipping a test in a remote environment.
Commit: 23a01a413d29f2d5b1f6204d0237e3884ae0231e
https://github.com/llvm/llvm-project/commit/23a01a413d29f2d5b1f6204d0237e3884ae0231e
Author: jimingham <jingham at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/test/API/functionalities/inline-stepping/TestInlineStepping.py
Log Message:
-----------
More refinement of call site handling in stepping. (#114628)
When you set a "next branch breakpoint" and run to it while stepping,
you have to claim the stop at that breakpoint to be the top of the
inlined call stack, or you will seem to "step in" and then plans might
try to step back out again.
This records the PrefferedLineEntry for next branch breakpoints and adds
a test to make sure this works.
Commit: 7780cf01e2c6912684fae10d68f76d7d5a21d675
https://github.com/llvm/llvm-project/commit/7780cf01e2c6912684fae10d68f76d7d5a21d675
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vsample.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg_features.txt
Log Message:
-----------
[AMDGPU][MC] Fix disassemble of image_gather4 with d16 (#114609)
For GFX10+, image_gather4 instructions that have v[254:255] as dst reg
and the d16 bit on can be assembled correctly but the generated binary
fails to disassemble (e.g. image_gather4 v[254:255], v[1:2], s[8:15], s[12:15]
dmask:0x8 dim:SQ_RSRC_IMG_2D d16). This patch fixes this problem.
Commit: bac7a6b390c0b9d195089d5b211949a25ffdf20c
https://github.com/llvm/llvm-project/commit/bac7a6b390c0b9d195089d5b211949a25ffdf20c
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Pass `-z rodynamic` to the linker (#115009)
Until now, suppression of `DT_DEBUG` has been hardcoded as a downstream
patch in lld. This can instead be achieved by passing `-z rodynamic`.
Have the driver do this so that the private patch can be removed.
If the scope of lld's `-z rodynamic` is broadened (within reason) to do
more in future, that's likely to be fine as `PT_DYNAMIC` isn't writable
on PlayStation.
PS5 only. On PS4, the equivalent hardcoded configuration will remain in
the proprietary linker.
SIE tracker: TOOLCHAIN-16704
Commit: ce067c5a3b96e009964dc60d6b6a0f4b33c345c7
https://github.com/llvm/llvm-project/commit/ce067c5a3b96e009964dc60d6b6a0f4b33c345c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
R llvm/test/CodeGen/AMDGPU/promote-alloca-invalid-vector-gep.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
AMDGPU: Rename test file
Commit: 592c0fe55f6d9a811028b5f3507be91458ab2713
https://github.com/llvm/llvm-project/commit/592c0fe55f6d9a811028b5f3507be91458ab2713
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Evaluate/fold-real.cpp
M flang/test/Evaluate/errors01.f90
Log Message:
-----------
[flang] Tweak a SCALE/IEEE_SCALB folding overflow warning message (#114994)
Commit: 7c3fdcc27603cd2d6b01fa7b057b3099da75bc8d
https://github.com/llvm/llvm-project/commit/7c3fdcc27603cd2d6b01fa7b057b3099da75bc8d
Author: Artem Belevich <tra at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/CodeGenCUDA/Inputs/cuda.h
A clang/test/CodeGenCUDA/grid-constant.cu
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/SemaCUDA/Inputs/cuda.h
A clang/test/SemaCUDA/grid-constant.cu
Log Message:
-----------
[CUDA] Add support for __grid_constant__ attribute (#114589)
LLVM support for the attribute has been implemented already, so it just
plumbs it through to the CUDA front-end.
One notable difference from NVCC is that the attribute can be used
regardless of the targeted GPU. On the older GPUs it will just be
ignored. The attribute is a performance hint, and does not warrant a
hard error if compiler can't benefit from it on a particular GPU
variant.
Commit: a993dfcdbf64ef7a8bd7e5ec4d97287b650d4f50
https://github.com/llvm/llvm-project/commit/a993dfcdbf64ef7a8bd7e5ec4d97287b650d4f50
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
A flang/test/Transforms/debug-assumed-rank-array.fir
Log Message:
-----------
[flang][debug] Support assumed-rank arrays. (#114404)
The assumed-rank array are represented by DIGenericSubrange in debug
metadata. We have to provide 2 things.
1. Expression to get rank value at the runtime from descriptor.
2. Assuming the dimension number for which we want the array information
has been put on the DWARF expression stack, expressions which will
extract the lowerBound, count and stride information from the descriptor
for the said dimension.
With this patch in place, this is how I see an assumed_rank variable
being evaluated by GDB.
```
function mean(x) result(y)
integer, intent(in) :: x(..)
...
end
program main
use mod
implicit none
integer :: x1,xvec(3),xmat(3,3),xtens(3,3,3)
x1 = 5
xvec = 6
xmat = 7
xtens = 8
print *,mean(xvec), mean(xmat), mean(xtens), mean(x1)
end program main
(gdb) p x
$1 = (6, 6, 6)
(gdb) p x
$2 = ((7, 7, 7) (7, 7, 7) (7, 7, 7))
(gdb) p x
$3 = (((8, 8, 8) (8, 8, 8) (8, 8, 8)) ((8, 8, 8) (8, 8, 8) (8, 8, 8)) ((8, 8, 8) (8, 8, 8) (8, 8, 8)))
(gdb) p x
$4 = 5
```
Commit: 9b9369e0bb0131ba0336d9adb4ef098b6dafc7f4
https://github.com/llvm/llvm-project/commit/9b9369e0bb0131ba0336d9adb4ef098b6dafc7f4
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][tensor] Improve `FoldTensorCastProducerOp` (dynamic shapes) (#114559)
Currently, `FoldTensorCastProducerOp` incorrectly folds the following:
```mlir
%pack = tensor.pack %src
padding_value(%pad : i32)
inner_dims_pos = [0, 1]
inner_tiles = [%c8, 1]
into %cast : tensor<7x?xi32> -> tensor<1x1x?x1xi32>
%res = tensor.cast %pack : tensor<1x1x?x1xi32> to tensor<1x1x8x1xi32>
```
as (note the static trailing dim in the result and dynamic tile
dimension that corresponds to that):
```mlir
%res = tensor.pack %src
padding_value(%pad : i32)
inner_dims_pos = [0, 1]
inner_tiles = [%c8, 1]
into %cast : tensor<7x?xi32> -> tensor<1x1x8x1xi32>
```
This triggers an Op verification failure and is due to the fact that the
folder does not update the inner tile sizes in the pack Op. This PR
addresses that.
Note, supporting other Ops with size-like attributes is left as a TODO.
Commit: d02d9ce314f823181430e9f21c89806f9227c95f
https://github.com/llvm/llvm-project/commit/d02d9ce314f823181430e9f21c89806f9227c95f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Tensor/IR/TensorOps.cpp:4781:17: error: unused
variable 'tileSize' [-Werror,-Wunused-variable]
Commit: a33d42ad5f916f5b782076ca84fe565589079c6f
https://github.com/llvm/llvm-project/commit/a33d42ad5f916f5b782076ca84fe565589079c6f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port ff5551cdb07f
Commit: c695a32576525b047f92b90de71eb707c152e29c
https://github.com/llvm/llvm-project/commit/c695a32576525b047f92b90de71eb707c152e29c
Author: David Olsen <dolsen at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/CIR/CIRGenerator.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
A clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CIR/hello.c
Log Message:
-----------
[CIR] Call code gen; create empty cir.func op (#113483)
Finish hooking up ClangIR code gen into the Clang control flow,
initializing enough that basic code gen is possible.
Add an almost empty `cir.func` op to the ClangIR dialect. Currently the
only property of the function is its name. Add the code necessary to
code gen a cir.func op.
Create essentially empty files
clang/lib/CIR/Dialect/IR/{CIRAttrs.cpp,CIRTypes.cpp}. These will be
filled in later as attributes and types are defined in the ClangIR
dialect.
(Part of upstreaming the ClangIR incubator project into LLVM.)
Commit: 803f957e87e4083f6d61c8991171eeeaf0e6bd61
https://github.com/llvm/llvm-project/commit/803f957e87e4083f6d61c8991171eeeaf0e6bd61
Author: jimingham <jingham at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/Symbol/CompileUnit.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
A lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpoinsSameCUName.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/common.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/main.cpp
Log Message:
-----------
Fix a thinko in the CallSite handling code: (#114896)
I have to check for the sc list size being changed by the call-site
search, not just that it had more than one element.
Added a test for multiple CU's with the same name in a given module,
which would have caught this mistake.
We were also doing all the work to find call sites when the found decl
and specified decl's only difference was a column, but the incoming
specification hadn't specified a column (column number == 0).
Commit: 17d956588a2cc508acf98574f913eaef6d0e1af3
https://github.com/llvm/llvm-project/commit/17d956588a2cc508acf98574f913eaef6d0e1af3
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
Reapply "[tsan] Don't use `enum __tsan_memory_order` in tsan interface"" (#115034)
In C++ it's UB to use undeclared values as enum.
And there is support __ATOMIC_HLE_ACQUIRE and
__ATOMIC_HLE_RELEASE need such values.
So use `int` in TSAN interface, and mask out
irrelevant bits and cast to enum ASAP.
`ThreadSanitizer.cpp` already declare morder parameterd
in these functions as `i32`.
This may looks like a slight change, as we
previously didn't mask out additional bits for `fmo`,
and `NoTsanAtomic` call. But from implementation
it's clear that they are expecting exact enum.
Reverts llvm/llvm-project#115032
Reapply llvm/llvm-project#114724
Commit: db69d6939a93d1e401abe6bfe114e55b69297975
https://github.com/llvm/llvm-project/commit/db69d6939a93d1e401abe6bfe114e55b69297975
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Support data transfer from descriptor to a pointer (#115023)
Data transfer from a variable with a descriptor to a pointer. We create
a descriptor for the pointer so we can use the flang runtime to perform
the transfer. The Assign function handles all corner cases. We add a new
entry points `CUFDataTransferDescDescNoRealloc` to avoid reallocation
since the variable on the LHS is not an allocatable.
Commit: e566ae8812af77d4ebfd14f4ebe6055a1f71cc02
https://github.com/llvm/llvm-project/commit/e566ae8812af77d4ebfd14f4ebe6055a1f71cc02
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove s32 support for G_ABS on RV64.
I plan to remove s32 as a legal type to match SelectionDAG
and to remove i32 from the GPR regclass on RV64.
Commit: 8b659736f7393314a797b6cf2fa346316a624ecb
https://github.com/llvm/llvm-project/commit/8b659736f7393314a797b6cf2fa346316a624ecb
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
Log Message:
-----------
[SystemZ] Make lit test more specific (#115050)
The lit test fmuladd-soft-float.ll only specifies s390x as platform,
but the test is Linux specific, causing problems when run on z/OS.
This change updates the triple to fix this.
Commit: db1882e2484013066139f0b3f77d968d84a79158
https://github.com/llvm/llvm-project/commit/db1882e2484013066139f0b3f77d968d84a79158
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_interface_internal.h
A compiler-rt/lib/xray/xray_s390x.cpp
A compiler-rt/lib/xray/xray_trampoline_s390x.S
M compiler-rt/lib/xray/xray_tsc.h
Log Message:
-----------
[SystemZ][XRay] XRay runtime support for SystemZ (#113252)
Adds the runtime support routines for XRay on SystemZ. Only function
entry/exit is implemented.
Commit: 4a37799a489d80e505e3e20722570c47673476be
https://github.com/llvm/llvm-project/commit/4a37799a489d80e505e3e20722570c47673476be
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.h
A llvm/test/CodeGen/SystemZ/xray.ll
Log Message:
-----------
[SystemZ][XRay] Implement XRay instrumentation for SystemZ (#113253)
Expands pseudo instructions PATCHABLE_FUNCTION_ENTER and PATCHABLE_RET
into a small instruction sequence which calls into the XRay library.
Commit: 0c60573d1c2d19133d84da092b240f32e0574be5
https://github.com/llvm/llvm-project/commit/0c60573d1c2d19133d84da092b240f32e0574be5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
Log Message:
-----------
clang/AMDGPU: Emit grid size builtins with range metadata (#113038)
These cannot be 0.
Commit: 0b40f979298a2e7d4c3da7c067fc9747d0f93653
https://github.com/llvm/llvm-project/commit/0b40f979298a2e7d4c3da7c067fc9747d0f93653
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
R llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups.ll
Log Message:
-----------
AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (#113751)
0 does not make sense as a value for this to be, much less the default.
Also stop emitting each individual field if it is the default, rather than
if any element was the default. Also fix the name of the test since it didn't
exactly match the real attribute name.
Commit: 0428f2cb5a91cc93897252c9dc4883efea3dbd9a
https://github.com/llvm/llvm-project/commit/0428f2cb5a91cc93897252c9dc4883efea3dbd9a
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/XRayArgs.cpp
M clang/test/Driver/XRay/xray-mode-flags.cpp
Log Message:
-----------
[SystemZ][XRay] Enable XRay for SystemZ in clang (#113254)
With the support for xray for SystemZ in place, the option can now be
enabled in clang.
Commit: e8644e3b474136da43344a5afeeae63268f980e1
https://github.com/llvm/llvm-project/commit/e8644e3b474136da43344a5afeeae63268f980e1
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/shrink-mad-fma.mir
Log Message:
-----------
[AMDGPU][True16][MC] VOP2 update instructions with fake16 format (#114436)
Some old "t16" VOP2 instructions are actually in fake16 format. Correct
and update test file
Commit: fbbd8b0741586794721639715d1d974db56f83ac
https://github.com/llvm/llvm-project/commit/fbbd8b0741586794721639715d1d974db56f83ac
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Semantics/rewrite-parse-tree.cpp
A flang/test/Semantics/rewrite03.f90
Log Message:
-----------
[flang] Fix rewriting of misparsed statement functions (#112934)
Fortran's syntax is ambiguous for some assignment statements (to array
elements or to the targets of pointers returned by functions) that
appear as the first executable statements in a subprogram or BLOCK
construct. Is A(I)=X a statement function definition at the end of the
specification part, or ar array element assignment statement, or an
assignment to a pointer returned by a function named A?
Since f18 builds a parse tree for the entire source file before
beginning any semantic analysis, we can't tell which is which until
after name resolution, at which point the symbol table has been built.
So we have to walk the parse tree and rewrite some misparsed statement
function definitions that really were assignment statements.
There's a bug in that code, though, due to the fact that the
implementation used state in the parse tree walker to hold a list of
misparsed statement function definitions extracted from one
specification part to be reinserted at the beginning of the next
execution part that is visited; it didn't work for misparsed cases BLOCK
constructs. Their parse tree nodes encapsulate a parser::Block, not an
instance of the wrapper class parser::ExecutionPart. So misparsed
statement functions in BLOCK constructs were being rewritten into
assignment statement that were inserted at the beginning of the
executable part of the following subprogram, if and wherever one
happened to occur. This led to crashes in lowering and much
astonishment.
A simple fix would have been to adjust the rewriting code to always
insert the list at the next visited parser::Block, since
parser::ExecutionPart is just a wrapper around Block anyway; but this
patch goes further to do the "right thing", which is a restructuring of
the rewrite that avoids the use of state and any assumptions about parse
tree walking visitation order.
Fixes https://github.com/llvm/llvm-project/issues/112549.
Commit: 07e053fb95e131244dafab04aae84650de383664
https://github.com/llvm/llvm-project/commit/07e053fb95e131244dafab04aae84650de383664
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/runtime/assign.cpp
Log Message:
-----------
[flang][runtime] Fix finalization case in assignment (#113611)
There were two bugs in derived type array assignment processing that
caused finalization to fail to occur for a test case. The first bug was
an off-by-one error in address overlap testing that caused a false
positive result for the test, whose left-hand side's allocatable's
descriptor was immediately adjacent in memory to the right-hand side's
array's data.
The second bug was that in such overlap cases (even when legitimate)
finalization would fail due to the LHS's descriptor having been copied
to a temporary for deferred deallocation and then nullified.
This patch corrects the overlap analysis for this test, and also
properly finalizes the LHS when overlap does exist. Some nearby dead
code was removed to avoid future confusion.
Fixes https://github.com/llvm/llvm-project/issues/113375.
Commit: 850d42fb145c636a3b56a7616c3e3c5c188c1916
https://github.com/llvm/llvm-project/commit/850d42fb145c636a3b56a7616c3e3c5c188c1916
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Parser/token-sequence.h
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/token-sequence.cpp
A flang/test/Preprocessing/defined-in-macro.F90
Log Message:
-----------
[flang] Handle "defined" in macro expansions (#114844)
The preprocessor implements "defined(X)" and "defined X" in if/elif
directive expressions in such a way that they only work at the top
level, not when they appear in macro expansions. Fix that, which is a
little tricky due to the need to detect the "defined" keyword before
applying any macro expansion to its argument, and add a bunch of tests.
Fixes https://github.com/llvm/llvm-project/issues/114064.
Commit: 97982a8c605fac7c86d02e641a6cd7898b3ca343
https://github.com/llvm/llvm-project/commit/97982a8c605fac7c86d02e641a6cd7898b3ca343
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/stacksave-stackrestore.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/O0-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/addrspacecast.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/branch-relaxation.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/fp-fcanonicalize.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/frame-info.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/hwasan-check-memaccess.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
M llvm/test/CodeGen/RISCV/inline-asm-zfh-constraint-f.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/kcfi-mir.ll
M llvm/test/CodeGen/RISCV/large-stack.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr58025.ll
M llvm/test/CodeGen/RISCV/pr58286.ll
M llvm/test/CodeGen/RISCV/pr63365.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/pr88365.ll
M llvm/test/CodeGen/RISCV/prolog-epilogue.ll
M llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64-stackmap-nops.ll
M llvm/test/CodeGen/RISCV/rv64-statepoint-call-lowering.ll
M llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir
M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr93587.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/stack-folding.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-int.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/stack-inst-compress.mir
M llvm/test/CodeGen/RISCV/stack-offset.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
M llvm/test/CodeGen/RISCV/vlenb.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xcvbi.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
M llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir
M llvm/test/CodeGen/RISCV/zcmp-prolog-epilog-crash.mir
M llvm/test/CodeGen/RISCV/zcmp-with-float.ll
M llvm/test/CodeGen/RISCV/zdinx-large-spill.mir
M llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
Log Message:
-----------
[RISCV][CFI] add function epilogue cfi information (#110810)
This patch adds CFI instructions in the function epilogue.
Before patch:
addi sp, s0, -32
ld ra, 24(sp) # 8-byte Folded Reload
ld s0, 16(sp) # 8-byte Folded Reload
ld s1, 8(sp) # 8-byte Folded Reload
addi sp, sp, 32
ret
After patch:
addi sp, s0, -32
.cfi_def_cfa sp, 32
ld ra, 24(sp) # 8-byte Folded Reload
ld s0, 16(sp) # 8-byte Folded Reload
ld s1, 8(sp) # 8-byte Folded Reload
.cfi_restore ra
.cfi_restore s0
.cfi_restore s1
addi sp, sp, 32
.cfi_def_cfa_offset 0
ret
This functionality is already present in `riscv-gcc`, but it’s not in
`clang` and this slightly impairs the `lldb` debugging experience, e.g.
backtrace.
Commit: b8ac87f34a6f4405bf8d91339a10f188db30aa3b
https://github.com/llvm/llvm-project/commit/b8ac87f34a6f4405bf8d91339a10f188db30aa3b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/lib/AsmParser/LLLexer.cpp
A llvm/test/Assembler/c-style-comment.ll
A llvm/test/Assembler/invalid-c-style-comment0.ll
A llvm/test/Assembler/invalid-c-style-comment1.ll
A llvm/test/Assembler/invalid-c-style-comment2.ll
A llvm/test/Assembler/invalid-c-style-comment3.ll
Log Message:
-----------
[LLVM][AsmParser] Add support for C style comments (#111554)
Add support for C style comments in LLVM assembly.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 97262afa6d78bcf332f26a02834b43ac31f87f94
https://github.com/llvm/llvm-project/commit/97262afa6d78bcf332f26a02834b43ac31f87f94
Author: Eric <eric at efcs.ca>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
Allow specifying libcxx builder image. (#110303)
This change attempts to shift the libc++ builders over to new backend
infrastructure that allows running an arbitrary container for the
libc++ job.
This has been a long time in the making, and support from github
and gke is finally at the point where it's possible (hopefully).
This change should also demonstrate another important property:
No Downtime Upgrades.
If this goes well, we'll be able to test the upgrade as a part
of the PR process, and then commiting it to main should (ideally)
not break anything.
Commit: fedb9fdb98314ff0ddff065dbd6ef8b2b7e6ec96
https://github.com/llvm/llvm-project/commit/fedb9fdb98314ff0ddff065dbd6ef8b2b7e6ec96
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libc/src/sys/socket/linux/recvmsg.cpp
Log Message:
-----------
[libc] Fix sendmsg iovec unpoisoning (#115057)
The unpoisoning for sendmsg had a typo where it would not unpoison all
of the elements in the iovec, causing msan errors. This patch fixes
that.
Commit: a353e258ba495be58263d6cc6e382e6dde298361
https://github.com/llvm/llvm-project/commit/a353e258ba495be58263d6cc6e382e6dde298361
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
M llvm/test/Transforms/LoopDistribute/scev-inserted-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-versioning.ll
Log Message:
-----------
[LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (#113126)
If we have a pointer AddRec, the maximum increment is
2^(pointer-index-wdith - 1) - 1. This means that if incrementing the
AddRec wraps, the distance between the previously accessed location and
the wrapped location is > 2^(pointer-index-wdith - 1), i.e. if the GEP
for the AddRec is inbounds, this would be poison due to the object being
larger than half the pointer index type space. The poison would be
immediate UB when the memory access gets executed..
Similar reasoning can be applied for decrements.
PR: https://github.com/llvm/llvm-project/pull/113126
Commit: 823625cf1d9aba4017a486cfdd3e4b9b94c5ef49
https://github.com/llvm/llvm-project/commit/823625cf1d9aba4017a486cfdd3e4b9b94c5ef49
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Simplify morder conversion (#115075)
All valid values should fit into a byte.
This slightly reduce generated code on x86_64.
Commit: dccb1fe879d6a949884523eab66a8a51cee93d1a
https://github.com/llvm/llvm-project/commit/dccb1fe879d6a949884523eab66a8a51cee93d1a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mul-cpop.s
Log Message:
-----------
[RISCV] Update latency of MUL & CPOP in SiFive P600's scheduling model (#115042)
It should be 2 cycles rather than 3 cycles.
Commit: 6d7e51de5ec46c1fcc7a7e80135f561a88a1296b
https://github.com/llvm/llvm-project/commit/6d7e51de5ec46c1fcc7a7e80135f561a88a1296b
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
Log Message:
-----------
[AMDGPU] Extend type support for update_dpp intrinsic (#114597)
We can split 64-bit DPP as a post-RA pseudo if control values are
supported, but cannot handle other types.
Commit: c1cec8c0dc5b0296f0bc86745b867ff72c0a21e3
https://github.com/llvm/llvm-project/commit/c1cec8c0dc5b0296f0bc86745b867ff72c0a21e3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed splat ordering for loads, NFC
Commit: ce0d085842c652620969001b9d0c12912cec2c24
https://github.com/llvm/llvm-project/commit/ce0d085842c652620969001b9d0c12912cec2c24
Author: vporpo <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Query the scheduler for legality (#114616)
This patch adds the legality check of whether the candidate instructions
can be scheduled together. This uses a Scheduler object.
Commit: 5e75f294f1e2900e75f1f1e2cc4e5abe46366047
https://github.com/llvm/llvm-project/commit/5e75f294f1e2900e75f1f1e2cc4e5abe46366047
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
Log Message:
-----------
[ORC] Replace RedirectionManager::SymbolAddrMap typedef with SymbolMap. NFC.
They're the same type -- no need for a separate typedef here.
Commit: 13b5899c2904ba6b1f5223bf86679d046212da98
https://github.com/llvm/llvm-project/commit/13b5899c2904ba6b1f5223bf86679d046212da98
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/X86/pr114520.ll
Log Message:
-----------
[SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (#114943)
In #70357, I changed a isLegalOrCustom to isLegalOrCustomOrPromote in
visitSelect to enable integer min/max to be formed when the operation
was promoted. Unfortunately, this also affected floating point. For
floating point, fmaxnum may require a libcall so we also need to check
if the operation on the promoted type is legal or custom.
Other changes to RISC-V have seen made the original change untested so
this patch restores the original isLegalOrCustom.
Fixes #114520.
Commit: a20b902b356e84ec4380d324f7c72772fef0c114
https://github.com/llvm/llvm-project/commit/a20b902b356e84ec4380d324f7c72772fef0c114
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Copy some Zbb and Zbkb IR tests. NFC
These are copies of SDAG tests with some of the more specialized
cases removed. We can add them later when we're ready to improve them.
Commit: 339f395ecef9b7f501a4c4d2b54f85c7f723b50c
https://github.com/llvm/llvm-project/commit/339f395ecef9b7f501a4c4d2b54f85c7f723b50c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
Log Message:
-----------
[RISCV][GISel] Enable commute_constant_to_rhs in RISCVPostLegalizerCombiner.
Commit: 3163f8348faf858dec920f303e95dcf48dc1ea72
https://github.com/llvm/llvm-project/commit/3163f8348faf858dec920f303e95dcf48dc1ea72
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Log Message:
-----------
[RISCV][GISel] Use boolean predicated legalization action methods to simplify code. NFC (#115063)
These allow us to pass a subtarget feature to conditionally enable the
legalization action.
These were added by a3010c77910c706be4c51ce4a95d51211e335a1f and are
used by AArch64.
Commit: 332fda86fb20c6c2cdc58976a8739c6a13110734
https://github.com/llvm/llvm-project/commit/332fda86fb20c6c2cdc58976a8739c6a13110734
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__flat_map/flat_map.h
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove <string> and <vector> includes from <flat_map> (#114876)
`<string>` doesn't seem to be required at all and `flat_map` doesn't
support `vector<bool>`, so we can include just `vector<T>`. This cuts
the include time in half on my system.
Commit: a905203b9ea5ff1b68ca5ab760d6101f64ff3362
https://github.com/llvm/llvm-project/commit/a905203b9ea5ff1b68ca5ab760d6101f64ff3362
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Prefer strided load for interleave load with only one lane active (#115069)
If only one of the elements is actually used, then we can legally use a
strided load in place of the segment load. Doing so reduces vector
register pressure, so if both segment and strided are believed to be
element/segment at a time, then prefer the strided load variant.
Note that I've seen the vectorizer emitting wide interleave loads to
represent a strided load, so this does happen in practice. It doesn't
matter much for small LMUL*NF, but at large NF can start causing
problems in register allocation.
Note that this patch only covers the fixed vector formation cases. In
theory, we should do the same patch for scalable, but we can currently
only represent NF2 in scalable IR, and NF2 is assumed to be optimized to
better than segment-at-a-time by default, so there's currently nothing
to do.
Commit: 4d374479bea4b33c5623ccfedc0870e396fc34cd
https://github.com/llvm/llvm-project/commit/4d374479bea4b33c5623ccfedc0870e396fc34cd
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Replace some macros with templates (#114931)
Commit: 320389d4289c9bca579d74e9416bedb7fd4a0ef2
https://github.com/llvm/llvm-project/commit/320389d4289c9bca579d74e9416bedb7fd4a0ef2
Author: vporpo <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Generate vector instructions (#115087)
This patch implements some very basic code generation, for some opcodes.
Commit: d047488d4c4657be401ae01aa985c5a749f15168
https://github.com/llvm/llvm-project/commit/d047488d4c4657be401ae01aa985c5a749f15168
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec] Fix build warnings in VecUtilsTest
Commit: 435e58468a1a99a4bbfad88d060abd37a9bc6928
https://github.com/llvm/llvm-project/commit/435e58468a1a99a4bbfad88d060abd37a9bc6928
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/allocate_allocator_modifier_ast_print.cpp
A clang/test/OpenMP/allocate_allocator_modifier_codegen.cpp
A clang/test/OpenMP/allocate_allocator_modifier_messages.cpp
Log Message:
-----------
[clang][OpenMP] Add 'allocator' modifier for 'allocate' clause. (#114883)
The 'allocator' modifier is now accepted in the 'allocate' clause. Added
LIT tests covering codegen, PCH, template handling, and serialization
for 'allocator' modifier.
Added support for allocator-modifier to release notes.
Testing
- New allocate modifier LIT tests.
- OpenMP LIT tests.
- check-all
- relevant sollve_vv test cases
tests/5.2/scope/test_scope_allocate_construct.c
Commit: 92be2cb08632ea38f6fbc41adfeb475ba27447dd
https://github.com/llvm/llvm-project/commit/92be2cb08632ea38f6fbc41adfeb475ba27447dd
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/fp-rounding.ll
Log Message:
-----------
[LoongArch] Use LSX for scalar FP rounding with explicit rounding mode (#114766)
LoongArch FP base ISA only have frint.{s/d} instruction which reads the
global rounding mode. Utilize LSX for explicit rounding mode for scalar
ceil/floor/trunc/roundeven calls when -mlsx opend. It is faster than
calling the libm library functions.
Same as what gcc did:
https://gcc.gnu.org/pipermail/gcc-cvs/2023-November/394218.html
Commit: 4c3e1e3c4af1d215501a3b42655333a1167f0ab3
https://github.com/llvm/llvm-project/commit/4c3e1e3c4af1d215501a3b42655333a1167f0ab3
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCSchedule.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCSchedule.cpp
A llvm/test/CodeGen/AArch64/latency.ll
A llvm/test/CodeGen/ARM/latency.ll
Log Message:
-----------
[llvm][AsmPrinter] Add an option to print instruction latencies (#113243)
... matching what we have in the disassembler. This isn't turned on by
default since several of the scheduling models are not completely
accurate, and we don't want to be misleading.
Commit: db21dbd12a13c96786669df9142a3061813c47fb
https://github.com/llvm/llvm-project/commit/db21dbd12a13c96786669df9142a3061813c47fb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[RISCV][GISel] Add constant_fold_cast_op to RISCVPostLegalizerCombiner.
Commit: 11b768af3ed672c18c4197bf43273b31ccc3c95e
https://github.com/llvm/llvm-project/commit/11b768af3ed672c18c4197bf43273b31ccc3c95e
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix bug in invalidation of analyses
This makes sure we don't preserve analyses when we modify the IR.
This was causing errors in the EXPENSIVE_CHECKS build.
Commit: 9bc3102bea80f422f4f3b788186f6e1c636e0fba
https://github.com/llvm/llvm-project/commit/9bc3102bea80f422f4f3b788186f6e1c636e0fba
Author: Yun-Fly <yunfei.song at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
Log Message:
-----------
[mlir][scf] Extend consumer fusion to multiple tilable users (#111955)
Before, consumer fusion expects single usage(or others are terminator
op). This patch supports multiple tilable consumers fusion.
E.g.
```
%0 = scf.for {
...
%p = tiledProducer
...
}
%1 = tilableConsumer1 ins(%0 : ...)
%2 = tilableConsumer2 ins(%0 : ...)
```
===>
```
%0:3 = scf.for {
...
%p = tiledProducer
%1 = tiledConsumer1 ins(%p : ...)
%2 = tiledConsumer2 ins(%p : ...)
...
}
```
The key process is ensuring that the first user of loop
should not dominate any define of consumer operand(s).
Commit: 7c20bdf373d6cd7f35dee5c71cf94f0eb1be3200
https://github.com/llvm/llvm-project/commit/7c20bdf373d6cd7f35dee5c71cf94f0eb1be3200
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/unittests/Host/AlarmTest.cpp
Log Message:
-----------
[lldb] Fix synchronization in AlarmTest (NFC)
ThreadSanitizer detected a data race as if synchronized via sleep.
Commit: 3a26feb607c8cecc13d6ca4ed5213c3f9c10932c
https://github.com/llvm/llvm-project/commit/3a26feb607c8cecc13d6ca4ed5213c3f9c10932c
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
M llvm/test/Analysis/CostModel/RISCV/scalable-gather.ll
M llvm/test/Analysis/CostModel/RISCV/scalable-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
Log Message:
-----------
[RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (#114945)
In preparation for allowing zvfhmin and zvfbfmin in
isLegalElementTypeForRVV, this lowers fixed-length masked gathers and
scatters
We need to mark f16 and bf16 as legal in isLegalMaskedGatherScatter
otherwise ScalarizeMaskedMemIntrin will just scalarize them, but we can
move this back into isLegalElementTypeForRVV afterwards.
The scalarized codegen required #114938, #114927 and #114915 to not
crash.
Commit: 7fb13a934f19797cd722f2a80355690c21d6e3b9
https://github.com/llvm/llvm-project/commit/7fb13a934f19797cd722f2a80355690c21d6e3b9
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/IndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
Log Message:
-----------
[ORC] lazyReexports: Swap IndirectStubsManager for RedirectableSymbolsManager.
RedirectableSymbolsManager is a native SymbolStringPtr API (requires fewer
string operations) and has a narrower interface that permits a wider range of
implementations.
IndirectStubsManager is updated to make it a RedirectableSymbolsManager so that
existing uses continue to work.
Commit: 895a8e66c6d1e42519909981ab1bb0ad41231029
https://github.com/llvm/llvm-project/commit/895a8e66c6d1e42519909981ab1bb0ad41231029
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
Log Message:
-----------
[AArch64][GISel] Support neon.abs intrinsic for vector types (#107226)
This patch lowers the intrinsic to G_ABS and thus supports the intrinsic in GISel.
Commit: 236fda550d36d35a00785938c3e38b0f402aeda6
https://github.com/llvm/llvm-project/commit/236fda550d36d35a00785938c3e38b0f402aeda6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/CycleAnalysis.cpp
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/DemandedBits.cpp
M llvm/lib/Analysis/DomTreeUpdater.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
M llvm/lib/Analysis/IndirectCallPromotionAnalysis.cpp
M llvm/lib/Analysis/InstCount.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryLocation.cpp
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[Analysis] Remove unused includes (NFC) (#114936)
Identified with misc-include-cleaner.
Commit: 9ba0e5c27de210ca04937e87042e5e8541a9ee21
https://github.com/llvm/llvm-project/commit/9ba0e5c27de210ca04937e87042e5e8541a9ee21
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
R llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
Revert "[LoongArch][NFC] Pre-commit tests for codegen with alias analysis"
This reverts commit 445db93844cb50eeb6f587bef0749c2950b46e70.
Commit: a165bbddf9b47c11a0869d09cc32de1d2b19f89f
https://github.com/llvm/llvm-project/commit/a165bbddf9b47c11a0869d09cc32de1d2b19f89f
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
[LoongArch][NFC] Reland "Pre-commit tests for codegen with alias analysis"
Commit: e48d8f9fea69095757d3593a567316197ec70450
https://github.com/llvm/llvm-project/commit/e48d8f9fea69095757d3593a567316197ec70450
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/SemaCXX/cxx2c-placeholder-vars.cpp
Log Message:
-----------
[Clang] Correctly initialize placeholder fields from their initializers (#114196)
We made the incorrect assumption that names of fields are unique when
creating their default initializers.
We fix that by keeping track of the instantiaation pattern for field
decls that are placeholder vars,
like we already do for unamed fields.
Fixes #114069
Commit: d22d63a7855840dd6398b77dcad71f001788ac86
https://github.com/llvm/llvm-project/commit/d22d63a7855840dd6398b77dcad71f001788ac86
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
Log Message:
-----------
[MLIR][Affine] Fix signature of mlir::affine::permuteLoops (#111100)
The method doesn't mutate its argument. A mutable one was being passed
only to get around ArrayRef providing const on elements, which MLIR
doesn't use on IR types.
Commit: cbc7812565b0b0d60c0dadbd3743650f863237d4
https://github.com/llvm/llvm-project/commit/cbc7812565b0b0d60c0dadbd3743650f863237d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64d-double-convert.ll
Log Message:
-----------
[RISCV] Add Zdinx RUN line to rv64d-double-convert.ll. NFC
We already have a Zfinx RUN line for rv64f-float-convert.ll.
Commit: 492812f613280034b7c514d74113750814a3de76
https://github.com/llvm/llvm-project/commit/492812f613280034b7c514d74113750814a3de76
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Fix rethrow's index calculation (#114693)
So far we have assumed that we only rethrow the exception caught in the
innermost EH pad. This is true in code we directly generate, but after
inlining this may not be the case. For example, consider this code:
```ll
ehcleanup:
%0 = cleanuppad ...
call @destructor
cleanupret from %0 unwind label %catch.dispatch
```
If `destructor` gets inlined into this function, the code can be like
```ll
ehcleanup:
%0 = cleanuppad ...
invoke @throwing_func
to label %unreachale unwind label %catch.dispatch.i
catch.dispatch.i:
catchswitch ... [ label %catch.start.i ]
catch.start.i:
%1 = catchpad ...
invoke @some_function
to label %invoke.cont.i unwind label %terminate.i
invoke.cont.i:
catchret from %1 to label %destructor.exit
destructor.exit:
cleanupret from %0 unwind label %catch.dispatch
```
We lower a `cleanupret` into `rethrow`, which assumes it rethrows the
exception caught by the nearest dominating EH pad. But after the
inlining, the nearest dominating EH pad is not `ehcleanup` but
`catch.start.i`.
The problem exists in the same manner in the new (exnref) EH, because it
assumes the exception comes from the nearest EH pad and saves an exnref
from that EH pad and rethrows it (using `throw_ref`).
This problem can be fixed easily if `cleanupret` has the basic block
where its matching `cleanuppad` is. The bitcode instruction `cleanupret`
kind of has that info (it has a token from the `cleanuppad`), but that
info is lost when when we enter ISel, because `TargetSelectionDAG.td`'s
`cleanupret` node does not have any arguments:
https://github.com/llvm/llvm-project/blob/5091a359d9807db8f7d62375696f93fc34226969/llvm/include/llvm/Target/TargetSelectionDAG.td#L700
Note that `catchret` already has two basic block arguments, even though
neither of them means `catchpad`'s BB.
This PR adds the `cleanuppad`'s BB as an argument to `cleanupret` node
in ISel and uses it in the Wasm backend. Because this node is also used
in X86 backend we need to note its argument there too but nothing more
needs to change there as long as X86 doesn't need it.
---
- Details about changes in the Wasm backend:
After this PR, our pseudo `RETHROW` instruction takes a BB, which means
the EH pad whose exception it needs to rethrow. There are currently two
ways to generate a `RETHROW`: one is from `llvm.wasm.rethrow` intrinsic
and the other is from `CLEANUPRET` we discussed above. In case of
`llvm.wasm.rethrow`, we add a '0' as a placeholder argument when it is
lowered to a `RETHROW`, and change it to a BB in LateEHPrepare. As
written in the comments, this PR doesn't change how this BB is computed.
The BB argument will be converted to an immediate argument as with other
control flow instructions in CFGStackify.
In case of `CLEANUPRET`, it already has a BB argument pointing to an EH
pad, so it is just converted to a `RETHROW` with the same BB argument in
LateEHPrepare. This will also be lowered to an immediate in CFGStackify
with other control flow instructions.
---
Fixes #114600.
Commit: f4270045f49d4936cd1d60e49f780ae9b1c18fab
https://github.com/llvm/llvm-project/commit/f4270045f49d4936cd1d60e49f780ae9b1c18fab
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64d-double-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64f-float-convert-strict.ll
Log Message:
-----------
[RISCV] Add Zfinx/Zdinx RUN lines to rv64d-double-convert-strict.ll and rv64f-float-convert-strict.ll. NFC
Commit: 84ce230e4298672bb5247170d6183b31aa06fc4b
https://github.com/llvm/llvm-project/commit/84ce230e4298672bb5247170d6183b31aa06fc4b
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/include/__random/binomial_distribution.h
Log Message:
-----------
[libcxx] Use `lgamma` rather than `lgamma_r` with LLVM libc (#109556)
`lgamma_r` is currently only available on GPU targets.
Commit: 4480a22c2b8587c761a44c4290e3fdd9e4be75d3
https://github.com/llvm/llvm-project/commit/4480a22c2b8587c761a44c4290e3fdd9e4be75d3
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
Log Message:
-----------
[LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (#101641)
Following #90184, this patch emits vp.merge intrinsic, which is used to
set the inactive lanes in a select operation to the RHS instead of
undef. Currently, it is applied to out-loop reduction for EVL
vectorization.
This patch performs transformation to convert
select(header_mask, LHS, RHS)
into
vp.merge(all-true, LHS, RHS, EVL)
And always use the predicated reduction select to set the incoming value
of the reduction phi to support out-loop reduction when using tail
folding with EVL.
TODO: Postpone the adjustment of the predicated reduction select to
VPlanTransform. The current adjustment might be too early, which could
lead to a situation where the predicated reduction select is adjusted,
but the EVL recipes cannot be successfully generated during
VPlanTransform.
Commit: 5adb5c05a2e9f31385fbba8b0436cbc07d91a44d
https://github.com/llvm/llvm-project/commit/5adb5c05a2e9f31385fbba8b0436cbc07d91a44d
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/memcmp-optsize.ll
A llvm/test/CodeGen/RISCV/memcmp.ll
Log Message:
-----------
[RISCV] Add tests for memcmp expansion
We add tests for the following cases:
* Length = 0, 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, 31, 32, 63, 64, 127,
128, runtime.
* Comparisons against zero.
* RUN lines for scalar/vector w/ or w/o strict align.
* Optimize for size.
Reviewers: topperc, preames
Reviewed By: topperc, preames
Pull Request: https://github.com/llvm/llvm-project/pull/107824
Commit: 0e907c17214aa3b1a60b66867fea3cc0f0dcbaa0
https://github.com/llvm/llvm-project/commit/0e907c17214aa3b1a60b66867fea3cc0f0dcbaa0
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/include/flang/Common/Fortran-features.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/Inputs/modfile70.mod
M flang/test/Semantics/modfile63.f90
A flang/test/Semantics/modfile70.f90
Log Message:
-----------
[flang] Prevent errors from being suppressed (#114420)
`ModFileReader::Say()` flags all messages as errors, but Flang was
mistakenly suppressing two errors when the `-w` flag was used, as they
were incorrectly conditioned to warning suppression. This fix ensures
that errors are reported regardless of the `-w` flag.
This commit also replaces two uses of `_warn_en_US` with `_err_en_US` to
prevent potential confusion in the future.
Commit: 6d719d9700261283e7f90cdaffb64a62d526f583
https://github.com/llvm/llvm-project/commit/6d719d9700261283e7f90cdaffb64a62d526f583
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_interface_internal.h
R compiler-rt/lib/xray/xray_s390x.cpp
R compiler-rt/lib/xray/xray_trampoline_s390x.S
M compiler-rt/lib/xray/xray_tsc.h
Log Message:
-----------
Revert "[SystemZ][XRay] XRay runtime support for SystemZ (#113252)"
for causing: https://github.com/llvm/llvm-project/issues/115129
This reverts commit db1882e2484013066139f0b3f77d968d84a79158.
Commit: 41248b598b8b18febc62ea61938870def2421126
https://github.com/llvm/llvm-project/commit/41248b598b8b18febc62ea61938870def2421126
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/docs/CodeReview.rst
M llvm/docs/Contributing.rst
Log Message:
-----------
[docs] Update docs on code-review process (#111735)
Clarify expectations for handling new comments post-LGTM but pre-commit.
This change aims to standardize expectations when new comments are added
after a patch has received LGTM but before it has been committed.
Currently, approaches to this vary, and this update seeks to clarify
best practices.
Commit: 7a5b040e20394a4794b4360a56de8a172b5e27f4
https://github.com/llvm/llvm-project/commit/7a5b040e20394a4794b4360a56de8a172b5e27f4
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
Log Message:
-----------
[RISCV] Add initial support of memcmp expansion
There are two passes that have dependency on the implementation
of `TargetTransformInfo::enableMemCmpExpansion` : `MergeICmps` and
`ExpandMemCmp`.
This PR adds the initial implementation of `enableMemCmpExpansion`
so that we can have some basic benefits from these two passes.
We don't enable expansion when there is no unaligned access support
currently because there are some issues about unaligned loads and
stores in `ExpandMemcmp` pass. We should fix these issues and enable
the expansion later.
Vector case hasn't been tested as we don't generate inlined vector
instructions for memcmp currently.
Reviewers: preames, arcbbb, topperc, asb, dtcxzyw
Reviewed By: topperc, preames
Pull Request: https://github.com/llvm/llvm-project/pull/107548
Commit: c96a85abfde822f2eda9076eb40078389b21f23e
https://github.com/llvm/llvm-project/commit/c96a85abfde822f2eda9076eb40078389b21f23e
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][VectorToSPIRV] Add conversion for vector.extract with dynamic indices (#114137)
Commit: dc55d31f4cf5c97b56f6b7e1c24b70674cc15a01
https://github.com/llvm/llvm-project/commit/dc55d31f4cf5c97b56f6b7e1c24b70674cc15a01
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][tensor] Fix a crash in `ExtractOp::fold` (#115001)
This PR fixes a crash when the tensor of `tensor.extract` is a dense
resource elements attribute.
Fixes #114728.
Co-authored-by: jinzhi <jinzhi6 at huawei.com>
Commit: 08411c855f77bd7416725c280ad3dccdc00b7dd6
https://github.com/llvm/llvm-project/commit/08411c855f77bd7416725c280ad3dccdc00b7dd6
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/test/CodeGen/RISCV/copysign-casts.ll
Log Message:
-----------
[RISCV] Correct fcopysign pattern for zdinx (#114954)
Correcting the pattern fixes the following error:
fatal error: error in backend: Cannot select: t17: f64 = fcopysign t5,
t8
Commit: 69d0bab82689d470e3fd68f50ca8b8d28f3e2294
https://github.com/llvm/llvm-project/commit/69d0bab82689d470e3fd68f50ca8b8d28f3e2294
Author: BoyaoWang430 <wangboyao at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
Log Message:
-----------
[RISCV] Add load/store clustering in post machine schedule (#111504)
#73789 added load clustering and #73796 tried to add store clustering.
If post machine schedule is used, previous cluster of load/store which
formed in machine schedule may break. In order to solve this, add
load/sotre clustering to post machine schedule.
Commit: c0a7b60fd1b244782032fefc261c4442c54c3935
https://github.com/llvm/llvm-project/commit/c0a7b60fd1b244782032fefc261c4442c54c3935
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
R flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
R flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
Log Message:
-----------
Revert "[flang][OpenMP] Add alias analysis for omp private" (#115135)
Reverts llvm/llvm-project#113566 (commit id: f3025c8b4fd797d99a8a8117254f93605ec46aa8 )
because of regression in Fujitsu compiler test suite.
Commit: 8431494094c8732d1426763d3e1aae322fa76830
https://github.com/llvm/llvm-project/commit/8431494094c8732d1426763d3e1aae322fa76830
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/Basic/SourceManager.cpp
M clang/test/Lexer/SourceLocationsOverflow.c
M clang/test/Misc/sloc-usage.cpp
Log Message:
-----------
[clang] Make source locations space usage diagnostics numbers easier to read (#114999)
Instead of writing "12345678B", write "12345678B (12.34MB)".
Commit: 37ce18951fded6be1de319b05b968918cb45c00b
https://github.com/llvm/llvm-project/commit/37ce18951fded6be1de319b05b968918cb45c00b
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
Log Message:
-----------
[RISCV] Add requirement of asserts
We forgot to add `REQUIRES: asserts` here.
Commit: 7be30fd5335ca7fe050ee1789ea2648f014daf1b
https://github.com/llvm/llvm-project/commit/7be30fd5335ca7fe050ee1789ea2648f014daf1b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A libclc/clc/include/clc/integer/clc_abs.h
A libclc/clc/include/clc/integer/clc_abs.inc
A libclc/clc/include/clc/integer/clc_abs_diff.h
A libclc/clc/include/clc/integer/clc_abs_diff.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/integer/clc_abs.cl
A libclc/clc/lib/generic/integer/clc_abs.inc
A libclc/clc/lib/generic/integer/clc_abs_diff.cl
A libclc/clc/lib/generic/integer/clc_abs_diff.inc
M libclc/generic/lib/integer/abs.cl
M libclc/generic/lib/integer/abs.inc
M libclc/generic/lib/integer/abs_diff.cl
M libclc/generic/lib/integer/abs_diff.inc
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_hypot.cl
Log Message:
-----------
[libclc] Move abs/abs_diff to CLC library
Commit: b4263ddbe7cbcc9e0b5b0ea07c252056355301d0
https://github.com/llvm/llvm-project/commit/b4263ddbe7cbcc9e0b5b0ea07c252056355301d0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/sincos_helpers.cl
Log Message:
-----------
[libclc] Use __clc_max in CLC functions
Commit: ed9dab67e2932baf11bfa514b07b159c3bffd518
https://github.com/llvm/llvm-project/commit/ed9dab67e2932baf11bfa514b07b159c3bffd518
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
Log Message:
-----------
[ARM] Add extra tests for CVE-2024-7883 with undef/poison
Commit: 8c565de5ec6d49143ba9ae7c73b188314d31e563
https://github.com/llvm/llvm-project/commit/8c565de5ec6d49143ba9ae7c73b188314d31e563
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/double-lround.ll
A llvm/test/CodeGen/LoongArch/float-lround.ll
Log Message:
-----------
[LoongArch] Support llvm.lround intrinsics with i32 return type. (#114733)
This is needed by flang, similar to RISCV-64 in
https://reviews.llvm.org/D147195.
Commit: 5acc4a3dc0e2145d2bfef47f1543bb291c2b866a
https://github.com/llvm/llvm-project/commit/5acc4a3dc0e2145d2bfef47f1543bb291c2b866a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__cstddef/nullptr_t.h
M libcxx/include/__cstddef/ptrdiff_t.h
M libcxx/include/__cstddef/size_t.h
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__functional/function.h
M libcxx/include/__functional/hash.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/forward_list
M libcxx/include/new
M libcxx/include/string_view
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.cmp/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.special/cmp_nullptr.pass.cpp
Log Message:
-----------
[libc++] Remove <stddef.h> includes from the granularized <cstddef> headers (#114788)
We can define some of these aliases without having to include the system
<stddef.h> and there doesn't seem to be much of a reason we shouldn't do
it this way.
Commit: c6f3b7bcd0596d30f8dabecdfb9e44f9a07b6e4c
https://github.com/llvm/llvm-project/commit/c6f3b7bcd0596d30f8dabecdfb9e44f9a07b6e4c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/docs/DesignDocs/ThreadingSupportAPI.rst
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/lexicographical_compare.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__atomic/aliases.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__atomic/cxx_atomic_impl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/high_resolution_clock.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/parser_std_format_spec.h
M libcxx/include/__chrono/statically_widen.h
M libcxx/include/__chrono/steady_clock.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
M libcxx/include/__config_site.in
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__filesystem/directory_entry.h
M libcxx/include/__filesystem/directory_iterator.h
M libcxx/include/__filesystem/operations.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__filesystem/recursive_directory_iterator.h
M libcxx/include/__format/concepts.h
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__format/format_context.h
M libcxx/include/__format/format_functions.h
M libcxx/include/__format/format_parse_context.h
M libcxx/include/__format/formatter_bool.h
M libcxx/include/__format/formatter_char.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__format/parser_std_format_spec.h
M libcxx/include/__format/unicode.h
M libcxx/include/__format/write_escaped.h
M libcxx/include/__functional/hash.h
M libcxx/include/__fwd/fstream.h
M libcxx/include/__fwd/ios.h
M libcxx/include/__fwd/istream.h
M libcxx/include/__fwd/ostream.h
M libcxx/include/__fwd/sstream.h
M libcxx/include/__fwd/streambuf.h
M libcxx/include/__fwd/string.h
M libcxx/include/__fwd/string_view.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_defaults.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
M libcxx/include/__mbstate_t.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory_resource/synchronized_pool_resource.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__ostream/print.h
M libcxx/include/__random/random_device.h
M libcxx/include/__ranges/istream_view.h
M libcxx/include/__stop_token/atomic_unique_lock.h
M libcxx/include/__stop_token/stop_callback.h
M libcxx/include/__stop_token/stop_source.h
M libcxx/include/__stop_token/stop_state.h
M libcxx/include/__stop_token/stop_token.h
M libcxx/include/__string/char_traits.h
M libcxx/include/__support/xlocale/__posix_l_fallback.h
M libcxx/include/__support/xlocale/__strtonum_fallback.h
M libcxx/include/__thread/formatter.h
M libcxx/include/__thread/id.h
M libcxx/include/__thread/jthread.h
M libcxx/include/__thread/support.h
M libcxx/include/__thread/this_thread.h
M libcxx/include/__thread/thread.h
M libcxx/include/__thread/timed_backoff_policy.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__vector/vector.h
M libcxx/include/barrier
M libcxx/include/chrono
M libcxx/include/codecvt
M libcxx/include/complex
M libcxx/include/condition_variable
M libcxx/include/cstdlib
M libcxx/include/deque
M libcxx/include/format
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/iomanip
M libcxx/include/ios
M libcxx/include/iosfwd
M libcxx/include/iostream
M libcxx/include/istream
M libcxx/include/latch
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/mutex
M libcxx/include/ostream
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/regex
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/sstream
M libcxx/include/stdatomic.h
M libcxx/include/stop_token
M libcxx/include/streambuf
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/syncstream
M libcxx/include/thread
M libcxx/include/vector
M libcxx/include/version
M libcxx/include/wchar.h
M libcxx/modules/std.compat.cppm.in
M libcxx/modules/std.compat/clocale.inc
M libcxx/modules/std.compat/cstdlib.inc
M libcxx/modules/std.compat/cwchar.inc
M libcxx/modules/std.compat/cwctype.inc
M libcxx/modules/std.cppm.in
M libcxx/modules/std/atomic.inc
M libcxx/modules/std/barrier.inc
M libcxx/modules/std/chrono.inc
M libcxx/modules/std/clocale.inc
M libcxx/modules/std/codecvt.inc
M libcxx/modules/std/complex.inc
M libcxx/modules/std/condition_variable.inc
M libcxx/modules/std/cstdlib.inc
M libcxx/modules/std/cwchar.inc
M libcxx/modules/std/cwctype.inc
M libcxx/modules/std/filesystem.inc
M libcxx/modules/std/format.inc
M libcxx/modules/std/fstream.inc
M libcxx/modules/std/future.inc
M libcxx/modules/std/iomanip.inc
M libcxx/modules/std/ios.inc
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/iostream.inc
M libcxx/modules/std/istream.inc
M libcxx/modules/std/latch.inc
M libcxx/modules/std/locale.inc
M libcxx/modules/std/memory.inc
M libcxx/modules/std/mutex.inc
M libcxx/modules/std/ostream.inc
M libcxx/modules/std/print.inc
M libcxx/modules/std/random.inc
M libcxx/modules/std/ranges.inc
M libcxx/modules/std/regex.inc
M libcxx/modules/std/semaphore.inc
M libcxx/modules/std/shared_mutex.inc
M libcxx/modules/std/spanstream.inc
M libcxx/modules/std/sstream.inc
M libcxx/modules/std/stop_token.inc
M libcxx/modules/std/streambuf.inc
M libcxx/modules/std/string.inc
M libcxx/modules/std/string_view.inc
M libcxx/modules/std/strstream.inc
M libcxx/modules/std/syncstream.inc
M libcxx/modules/std/thread.inc
M libcxx/src/algorithm.cpp
M libcxx/src/call_once.cpp
M libcxx/src/chrono.cpp
M libcxx/src/experimental/include/tzdb/tzdb_list_private.h
M libcxx/src/filesystem/time_utils.h
M libcxx/src/include/atomic_support.h
M libcxx/src/include/config_elast.h
M libcxx/src/ios.cpp
M libcxx/src/ios.instantiations.cpp
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
M libcxx/src/memory.cpp
M libcxx/src/memory_resource.cpp
M libcxx/src/ostream.cpp
M libcxx/src/print.cpp
M libcxx/src/random_shuffle.cpp
M libcxx/src/std_stream.h
M libcxx/src/string.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
M libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/test_data.json
M libcxx/test/libcxx/feature_test_macro/version_header.sh.py
M libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/test/libcxx/include_as_c.sh.cpp
M libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/libcxx/vendor/apple/availability-with-pedantic-errors.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.tests.h
M libcxx/test/std/language.support/support.limits/support.limits.general/barrier.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/iomanip.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/latch.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/semaphore.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/shared_mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/stop_token.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/thread.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/header_information.py
M libcxx/utils/libcxx/test/dsl.py
M libcxx/utils/libcxx/test/features.py
M runtimes/cmake/Modules/HandleFlags.cmake
Log Message:
-----------
[libc++] Refactor the configuration macros to being always defined (#112094)
This is a follow-up to #89178. This updates the `<__config_site>`
macros.
Commit: e29d092af8b0ed2b15ce1dfd9fc4caef1976eef7
https://github.com/llvm/llvm-project/commit/e29d092af8b0ed2b15ce1dfd9fc4caef1976eef7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-pmuldq.ll
Log Message:
-----------
[X86] getFauxShuffleMask - add ISD::SHL/SRL handling
This is currently mostly the same as the VSHLI/VSRLI handling below, although I've kept them separate as I'm investigating adding non-uniform shift amount handling as a followup
Commit: 270bfb2f2abc48ec916fce7e677fe3cc6f2908d0
https://github.com/llvm/llvm-project/commit/270bfb2f2abc48ec916fce7e677fe3cc6f2908d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
Log Message:
-----------
[X86] Add test coverage for #114959
Commit: 2f48765b45ba87d780caf7d058d416b5dda32d7e
https://github.com/llvm/llvm-project/commit/2f48765b45ba87d780caf7d058d416b5dda32d7e
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Remove -mllvm --tail-merge-threshold=0 from Bazel. (#115061)
Follow-up on the `-mllvm --tail-merge-threshold=0` removal promised in
aeccc16497a84d61200f7ccfa3864096349260d3 (see
b2a9ea4420127d10b18ae648b16757665f8bbd7c commit message on why we don't
need this in Bazel, and will only keep in AArch64-specific compile flags
in CMake build).
Commit: 3d4d033ceaf9e72491a20e9210f396aa3ec52fa5
https://github.com/llvm/llvm-project/commit/3d4d033ceaf9e72491a20e9210f396aa3ec52fa5
Author: David Green <david.green at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/Thumb2/mve-doublereduct.ll
Log Message:
-----------
[AArch64][Arm] Add nested double reduction tests. NFC
Commit: ebfafa2511f92eed484895f3265ced40f4c1fc70
https://github.com/llvm/llvm-project/commit/ebfafa2511f92eed484895f3265ced40f4c1fc70
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
A llvm/test/CodeGen/SPIRV/pointers/composite-fun-fix-ptr-arg.ll
Log Message:
-----------
[SPIR-V] Fix OpFunctionParameter vs. OpTypeFunction types for pointer arguments when there are functions with aggregate arguments (#115044)
The goal of the PR is to ensure that if module contains functions with
mutated signature (due to preprocessing of aggregate types), functions
still are going through re-creating of function type to preserve pointee
type information for arguments.
This fixes a bug when a module with (1) a function having aggregate
arguments and/or return, and (2) at least two functions with signatures
different only wrt. pointee types is translated so that one of two
similar functions gets an incorrect OpFunctionParameter type that is
different from the corresponding OpTypeFunction definition.
A reproducer is attached as a new test case.
Commit: f363f9d61eaff7090a19d226ea8786b2987d4fcc
https://github.com/llvm/llvm-project/commit/f363f9d61eaff7090a19d226ea8786b2987d4fcc
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/lib/orc/dlfcn_wrapper.cpp
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/orc/elfnix_platform.h
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC][Runtime] Add `dlupdate` for elf (#110406)
With the help of @lhames, This pull request introduces the dlupdate
function in the ORC runtime. dlupdate enables incremental execution of
new initializers introduced in the REPL environment. Unlike traditional
dlopen, which manages initializers, code mapping, and library reference
counts, dlupdate focuses exclusively on running new initializers.
Commit: d77a36e01b8fed496b29c3b2c12526f8dc380766
https://github.com/llvm/llvm-project/commit/d77a36e01b8fed496b29c3b2c12526f8dc380766
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorize] Use new getUniqueLatchExitBlock routine (#108231)
With PR #88385 I am introducing support for vectorising more loops with
early exits that don't require a scalar epilogue. As such, if a loop
doesn't have a unique exit block it will not automatically imply we
require a scalar epilogue. Also, in all places in the code today where
we use the variable LoopExitBlock we actually mean the exit block from
the latch. Therefore, it seemed reasonable to add a new
getUniqueLatchExitBlock that allows the caller to determine the exit
block taken from the latch and use this instead of getUniqueExitBlock. I
also renamed LoopExitBlock to be LatchExitBlock. I feel this not only
better reflects how the variable is used today, but also prepares the
code for PR #88385.
While doing this I also noticed that one of the comments in
requiresScalarEpilogue is wrong when we require a scalar epilogue, i.e.
when we're not exiting from the latch block. This doesn't always imply
we have multiple exits, e.g. see the test in
Transforms/LoopVectorize/unroll_nonlatch.ll
where the latch unconditionally branches back to the only exiting block.
Commit: 2d56de9e7e4a3accde42b4d7d329acd007989df8
https://github.com/llvm/llvm-project/commit/2d56de9e7e4a3accde42b4d7d329acd007989df8
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
Log Message:
-----------
Revert "[ARM] Add extra tests for CVE-2024-7883 with undef/poison"
Reverting because this causes a test failure in the expensive-checks
buildbot.
This reverts commit ed9dab67e2932baf11bfa514b07b159c3bffd518.
Commit: 9f8c3d3796ebf7ddd4a85134ff109cf03a0b9b5e
https://github.com/llvm/llvm-project/commit/9f8c3d3796ebf7ddd4a85134ff109cf03a0b9b5e
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
R lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpoinsSameCUName.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpointsSameCUName.py
Log Message:
-----------
[lldb][test] Correct typo in breakpoint test file name
Added by https://github.com/llvm/llvm-project/pull/114896.
Commit: c75353313ed73c6dc04beb322954bb905906f4a1
https://github.com/llvm/llvm-project/commit/c75353313ed73c6dc04beb322954bb905906f4a1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add 256-bit concat(shuffle(),shuffle()) handling
Improve IsConcatFree detection to handle splat vector-loads (which can be folded as X86ISD::SUBV_BROADCAST_LOAD).
Fixes #114959
Commit: 5a16ed96c5362aa8e9610fa266d6f6202b19edc3
https://github.com/llvm/llvm-project/commit/5a16ed96c5362aa8e9610fa266d6f6202b19edc3
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add +unaligned-scalar-mem to spacemit-x60 (#115125)
I can't find any official documentation on this, but from other
discussions[^1] and my own testing the spacemit-x60 seems to support
unaligned scalar loads and stores.
They seem to be performant, and just from a quick test we get a 2.45%
speedup on 500.perlbench_r on the Banana Pi F3[^2].
This would allow it to take advantage of #107548.
[^1]:
https://github.com/llvm/llvm-project/issues/110454#issuecomment-2382199460
[^2]: https://lnt.lukelau.me/db_default/v4/nts/32
Commit: f87484d5910c1c708bfd93ef588d6ff8307e2477
https://github.com/llvm/llvm-project/commit/f87484d5910c1c708bfd93ef588d6ff8307e2477
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVM/CMakeLists.txt
Log Message:
-----------
Fix libnvptxcompiler_static.a absolute path (#115015)
Now when building llvm-solid with `-DMLIR_ENABLE_NVPTXCOMPILER=ON`,
there will be an absolute path (`/path/to/libnvptxcompiler_static.a`) in
MLIRNVVMTarget dependencies (in
`/build/path/install/lib/cmake/mlir/MLIRTargets.cmake`). For example,
```cmake
set_target_properties(MLIRNVVMTarget PROPERTIES
INTERFACE_LINK_LIBRARIES "MLIRIR;MLIRExecutionEngineUtils;MLIRSupport;MLIRGPUDialect;MLIRTargetLLVM;MLIRNVVMToLLVMIRTranslation;LLVMSupport;/path/to/libnvptxcompiler_static.a"
)
```
If downstream project uses pre-built llvm and depends on MLIRNVVMTarget,
it may fail to build due to the absence of the
`libnvptxcompiler_static.a` absolute path.
After this commit, there will no absolute path in
`/build/path/install/lib/cmake/mlir/MLIRTargets.cmake`
```cmake
set_target_properties(MLIRNVVMTarget PROPERTIES
INTERFACE_LINK_LIBRARIES "MLIRIR;MLIRExecutionEngineUtils;MLIRSupport;MLIRGPUDialect;MLIRTargetLLVM;MLIRNVVMToLLVMIRTranslation;LLVMSupport;\$<LINK_ONLY:MLIR_NVPTXCOMPILER_LIB>"
)
```
Then downstream project can modify `libnvptxcompiler_static.a` path and
use cmake to build. For example,
```cmake
# find_library(...)
add_library(MLIR_NVPTXCOMPILER_LIB STATIC IMPORTED GLOBAL)
set_property(TARGET MLIR_NVPTXCOMPILER_LIB PROPERTY IMPORTED_LOCATION ${...})
```
Commit: 40556d08491f530e03746fb188b38e7f9cb272c7
https://github.com/llvm/llvm-project/commit/40556d08491f530e03746fb188b38e7f9cb272c7
Author: brod4910 <13954100+brod4910 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir
Log Message:
-----------
[MLIR][Tensor] Fix out-of-bounds FoldEmptyTensorWithDimOp crash (#112196)
Fixes #111270
Commit: ea6b8fa4b9b48a11c2657bedf35ad5291b1e2b9c
https://github.com/llvm/llvm-project/commit/ea6b8fa4b9b48a11c2657bedf35ad5291b1e2b9c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/PowerPC/f128-arith.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
Log Message:
-----------
[SDAG] Merge multiple-result libcall expansion into DAG.expandMultipleResultFPLibCall() (#114792)
This merges the logic for expanding both FFREXP and FSINCOS into one
method `DAG.expandMultipleResultFPLibCall()`. This reduces duplication
and also allows FFREXP to benefit from the stack slot elimination
implemented for FSINCOS. This method will also be used in future to
implement more multiple-result intrinsics (such as modf and sincospi).
Commit: 56077e5ac09eb2d6b7ca818abce2bbbcf179f529
https://github.com/llvm/llvm-project/commit/56077e5ac09eb2d6b7ca818abce2bbbcf179f529
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/locally-imported-arm64ec.test
Log Message:
-----------
[LLD][COFF] Add support for locally imported EC symbols (#114985)
Allow imported symbols to be recognized in both mangled and demangled
forms. Support __imp_aux_ symbols in addition to __imp_ symbols.
Commit: eab7be5d42ad30c9992ff72c3be9298702001dc8
https://github.com/llvm/llvm-project/commit/eab7be5d42ad30c9992ff72c3be9298702001dc8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__algorithm/adjacent_find.h
M libcxx/include/__algorithm/all_of.h
M libcxx/include/__algorithm/any_of.h
M libcxx/include/__algorithm/copy_if.h
M libcxx/include/__algorithm/count_if.h
M libcxx/include/__algorithm/iterator_operations.h
M libcxx/include/__algorithm/ranges_adjacent_find.h
M libcxx/include/__algorithm/ranges_all_of.h
M libcxx/include/__algorithm/ranges_any_of.h
M libcxx/include/__algorithm/ranges_copy_if.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__algorithm/ranges_count_if.h
M libcxx/include/__algorithm/ranges_fill_n.h
M libcxx/include/__algorithm/unique.h
Log Message:
-----------
[libc++] Forward more algorithms to the classic algorithms (#114674)
This partially addresses #105687.
Commit: 2bbb6c067020bef50435c2ba5addcd66d1b9a1dd
https://github.com/llvm/llvm-project/commit/2bbb6c067020bef50435c2ba5addcd66d1b9a1dd
Author: Chris Cotter <ccotter14 at bloomberg.net>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
Log Message:
-----------
[clang][NFC] Spell out DynTypedNode instead of auto (#114427)
Commit: 3c4e6c17f066d9cf5a5b065a05bdff472f721bf6
https://github.com/llvm/llvm-project/commit/3c4e6c17f066d9cf5a5b065a05bdff472f721bf6
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M flang/test/Driver/arch-specific-libdir-rpath.f95
Log Message:
-----------
[flang][Driver] When linking with the Fortran runtime, the `addArchSpecificRPath()` should be called too (#114837)
When linking with other runtimes (OpenMP, sanitizers), the
addArchSpecificRPath() is being called. The same thing should happen
when linking with the Fortran runtime, this will improve user experience
massively.
Commit: d8354d63db66e5d67d74b24b1611b578700f1134
https://github.com/llvm/llvm-project/commit/d8354d63db66e5d67d74b24b1611b578700f1134
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] Extend test coverage for #114901 with commuted test case
Commit: cab606c30661a746b2513a8330e0c8eca771913e
https://github.com/llvm/llvm-project/commit/cab606c30661a746b2513a8330e0c8eca771913e
Author: hev <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
M llvm/lib/Target/LoongArch/LoongArchSubtarget.h
M llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
[LoongArch] Enable alias analysis by default (#114980)
Enable use of alias analysis during code generation.
Commit: d8139ae50f72046a2fce36055d8dc936b50d20ef
https://github.com/llvm/llvm-project/commit/d8139ae50f72046a2fce36055d8dc936b50d20ef
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
Log Message:
-----------
[lldb][test] Use -gdwarf to fix same CU breakpoint test on Windows on Arm
clang when given -g on Windows produces a PDB file. For whatever reason,
the test doesn't work with that.
-gdwarf produces DWARF regardless of platform.
Fixes 803f957e87e4083f6d61c8991171eeeaf0e6bd61.
Commit: 5a062191f7b9467aaddb6fe4b84c16e60fe85cc8
https://github.com/llvm/llvm-project/commit/5a062191f7b9467aaddb6fe4b84c16e60fe85cc8
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
A llvm/test/CodeGen/SPIRV/pointers/OpExtInst-OpenCL_std-ptr-types.ll
Log Message:
-----------
[SPIR-V] Ensure correct pointee types of some OpenCL Extended Instructions' pointer arguments (#114846)
OpenCL Extended Instruction Set Specification defines relations between
return/operand types and pointee type of pointer arguments in case of
remquo, fract, frexp, lgamma_r, modf, sincos and prefetch instructions
(https://registry.khronos.org/SPIR-V/specs/unified1/OpenCL.ExtendedInstructionSet.100.html).
This PR ensures correct pointee types of those OpenCL Extended
Instructions' pointer arguments.
Commit: 38fffa630ee80163dc65e759392ad29798905679
https://github.com/llvm/llvm-project/commit/38fffa630ee80163dc65e759392ad29798905679
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CodeGen/PowerPC/altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
M clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init-no-parentheses.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init.c
M clang/test/CodeGen/RISCV/rvv-vls-bitwise-ops.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/SystemZ/zvector2.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vbmi2-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
M clang/test/CodeGen/X86/avx512vlvbmi2-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/X86/xop-builtins-cmp.c
M clang/test/CodeGen/X86/xop-builtins.c
M clang/test/CodeGen/aarch64-neon-3v.c
M clang/test/CodeGen/aarch64-neon-intrinsics.c
M clang/test/CodeGen/aarch64-neon-misc.c
M clang/test/CodeGen/aarch64-neon-shifts.c
M clang/test/CodeGen/aarch64-neon-tbl.c
M clang/test/CodeGen/aarch64-poly64.c
M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
M clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-mve-intrinsics/absneg.c
M clang/test/CodeGen/arm-mve-intrinsics/bitwise-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/cplusplus.cpp
M clang/test/CodeGen/arm-mve-intrinsics/vbicq.c
M clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/vornq.c
M clang/test/CodeGen/arm-neon-shifts.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtinshufflevector2.c
M clang/test/CodeGen/const-init.c
M clang/test/CodeGen/matrix-type-operators.c
M clang/test/CodeGen/neon-immediate-ubsan.c
M clang/test/CodeGen/nofpclass.c
M clang/test/CodeGen/ppc-vec_ct-truncate.c
M clang/test/CodeGen/variadic-nvptx.c
M clang/test/CodeGen/vecshift.c
M clang/test/CodeGen/vector-scalar.c
M clang/test/CodeGenCXX/auto-var-init.cpp
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenCXX/ext-vector-type-conditional.cpp
M clang/test/CodeGenCXX/matrix-type-builtins.cpp
M clang/test/CodeGenCXX/matrix-type-operators.cpp
M clang/test/CodeGenCXX/vector-size-conditional.cpp
M clang/test/CodeGenCXX/vector-splat-conversion.cpp
M clang/test/CodeGenHLSL/BasicFeatures/standard_conversion_sequences.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/CodeGenOpenCL/logical-ops.cl
M clang/test/CodeGenOpenCL/partial_initializer.cl
M clang/test/CodeGenOpenCL/shifts.cl
M clang/test/CodeGenOpenCL/vector_literals.cl
M clang/test/Headers/__clang_hip_math_deprecated.hip
M clang/test/Headers/wasm.c
M llvm/lib/IR/AsmWriter.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/logicalop.ll
M llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/div.ll
M llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
M llvm/test/Analysis/CostModel/AMDGPU/fneg.ll
M llvm/test/Analysis/CostModel/AMDGPU/logicalop.ll
M llvm/test/Analysis/CostModel/AMDGPU/mul.ll
M llvm/test/Analysis/CostModel/AMDGPU/rem.ll
M llvm/test/Analysis/CostModel/ARM/divrem.ll
M llvm/test/Analysis/CostModel/ARM/logicalop.ll
M llvm/test/Analysis/CostModel/PowerPC/logicalop.ll
M llvm/test/Analysis/CostModel/RISCV/arith-int.ll
M llvm/test/Analysis/CostModel/RISCV/logicalop.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-load-store.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-phi-const.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/CostModel/SystemZ/divrem-pow2.ll
M llvm/test/Analysis/CostModel/SystemZ/logicalop.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-latency.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/arith-fp.ll
M llvm/test/Analysis/CostModel/X86/div-codesize.ll
M llvm/test/Analysis/CostModel/X86/div-latency.ll
M llvm/test/Analysis/CostModel/X86/div-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/fshl-codesize.ll
M llvm/test/Analysis/CostModel/X86/fshl-latency.ll
M llvm/test/Analysis/CostModel/X86/fshl-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/fshl.ll
M llvm/test/Analysis/CostModel/X86/fshr-codesize.ll
M llvm/test/Analysis/CostModel/X86/fshr-latency.ll
M llvm/test/Analysis/CostModel/X86/fshr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/fshr.ll
M llvm/test/Analysis/CostModel/X86/logicalop.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-codesize.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-latency.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/mul-codesize.ll
M llvm/test/Analysis/CostModel/X86/mul-latency.ll
M llvm/test/Analysis/CostModel/X86/mul-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/mul.ll
M llvm/test/Analysis/CostModel/X86/rem-codesize.ll
M llvm/test/Analysis/CostModel/X86/rem-latency.ll
M llvm/test/Analysis/CostModel/X86/rem-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/slm-arith-costs.ll
M llvm/test/Analysis/CostModel/X86/vdiv-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-sizelatency.ll
M llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll
M llvm/test/Analysis/DemandedBits/vectors.ll
M llvm/test/Analysis/ValueTracking/known-bits.ll
M llvm/test/Analysis/ValueTracking/known-fpclass.ll
M llvm/test/Analysis/ValueTracking/known-non-zero.ll
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
M llvm/test/Analysis/ValueTracking/knownbits-bmi-pattern.ll
M llvm/test/Analysis/ValueTracking/knownbits-x86-hadd-hsub.ll
M llvm/test/Analysis/ValueTracking/knownzero-shift.ll
M llvm/test/Analysis/ValueTracking/numsignbits-shl.ll
M llvm/test/Assembler/ConstantExprFold.ll
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/opaque-ptr.ll
M llvm/test/Bitcode/constantsTest.3.2.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-p7-in-memory.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-memset.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-tbaa.ll
M llvm/test/CodeGen/NVPTX/variadics-lowering.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-negative.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-const.ll
M llvm/test/CodeGen/Thumb2/mve-gather-optimisation-deep.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vshift.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_tbl.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/reduce.ll
M llvm/test/Instrumentation/MemorySanitizer/vector-track-origins-neon.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/Transforms/AggressiveInstCombine/ARM/fptosisat.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/fptosisat.ll
M llvm/test/Transforms/AggressiveInstCombine/masked-cmp.ll
M llvm/test/Transforms/AggressiveInstCombine/popcount.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_multi_uses.ll
M llvm/test/Transforms/AggressiveInstCombine/vector-or-load.ll
M llvm/test/Transforms/Attributor/nofpclass-powi.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info-vec.ll
M llvm/test/Transforms/BDCE/binops-multiuse.ll
M llvm/test/Transforms/BDCE/dead-uses.ll
M llvm/test/Transforms/BDCE/vectors-inseltpoison.ll
M llvm/test/Transforms/BDCE/vectors.ll
M llvm/test/Transforms/CodeGenPrepare/X86/fold-loop-of-urem.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/large-immediate.ll
M llvm/test/Transforms/ConstraintElimination/geps-ptrvector.ll
M llvm/test/Transforms/ConstraintElimination/vector-compares.ll
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
M llvm/test/Transforms/CorrelatedValuePropagation/overflows.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
M llvm/test/Transforms/DeadStoreElimination/X86/gather-null-pointer.ll
M llvm/test/Transforms/DeadStoreElimination/masked-dead-store.ll
M llvm/test/Transforms/DeadStoreElimination/offsetted-overlapping-stores.ll
M llvm/test/Transforms/DivRemPairs/AMDGPU/div-rem-pairs.ll
M llvm/test/Transforms/EarlyCSE/commute.ll
M llvm/test/Transforms/EarlyCSE/gep.ll
M llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll
M llvm/test/Transforms/GVN/non-integral-pointers.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
M llvm/test/Transforms/InferAddressSpaces/masked-gather-scatter.ll
M llvm/test/Transforms/InstCombine/2007-03-21-SignedRangeTest.ll
M llvm/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll
M llvm/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
M llvm/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll
M llvm/test/Transforms/InstCombine/AArch64/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/aes-intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll
M llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
M llvm/test/Transforms/InstCombine/X86/x86-movmsk.ll
M llvm/test/Transforms/InstCombine/X86/x86-muldq-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-muldq.ll
M llvm/test/Transforms/InstCombine/X86/x86-pack-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-pack.ll
M llvm/test/Transforms/InstCombine/X86/x86-pmulh.ll
M llvm/test/Transforms/InstCombine/X86/x86-pmulhrs.ll
M llvm/test/Transforms/InstCombine/X86/x86-ternlog.ll
M llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
M llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-xop.ll
M llvm/test/Transforms/InstCombine/abs-1.ll
M llvm/test/Transforms/InstCombine/abs-intrinsic.ll
M llvm/test/Transforms/InstCombine/add-mask-neg.ll
M llvm/test/Transforms/InstCombine/add-mask.ll
M llvm/test/Transforms/InstCombine/add-shl-sdiv-to-srem.ll
M llvm/test/Transforms/InstCombine/add-sitofp.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/add4.ll
M llvm/test/Transforms/InstCombine/add_or_sub.ll
M llvm/test/Transforms/InstCombine/addsub-constant-folding.ll
M llvm/test/Transforms/InstCombine/adjust-for-minmax.ll
M llvm/test/Transforms/InstCombine/and-compare.ll
M llvm/test/Transforms/InstCombine/and-fcmp.ll
M llvm/test/Transforms/InstCombine/and-or-icmp-const-icmp.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/and-or-not.ll
M llvm/test/Transforms/InstCombine/and-or.ll
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/and.ll
M llvm/test/Transforms/InstCombine/and2.ll
M llvm/test/Transforms/InstCombine/apint-add.ll
M llvm/test/Transforms/InstCombine/apint-mul1.ll
M llvm/test/Transforms/InstCombine/apint-mul2.ll
M llvm/test/Transforms/InstCombine/apint-select.ll
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/ashr-demand.ll
M llvm/test/Transforms/InstCombine/ashr-lshr.ll
M llvm/test/Transforms/InstCombine/avg-lsb.ll
M llvm/test/Transforms/InstCombine/binop-and-shifts.ll
M llvm/test/Transforms/InstCombine/binop-cast.ll
M llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll
M llvm/test/Transforms/InstCombine/binop-select-cast-of-select-cond.ll
M llvm/test/Transforms/InstCombine/binop-select.ll
M llvm/test/Transforms/InstCombine/bit-checks.ll
M llvm/test/Transforms/InstCombine/bit_ceil.ll
M llvm/test/Transforms/InstCombine/bit_floor.ll
M llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll
M llvm/test/Transforms/InstCombine/bitcast.ll
M llvm/test/Transforms/InstCombine/bitreverse.ll
M llvm/test/Transforms/InstCombine/bswap-fold.ll
M llvm/test/Transforms/InstCombine/bswap.ll
M llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll
M llvm/test/Transforms/InstCombine/canonicalize-clamp-like-pattern-between-negative-and-positive-thresholds.ll
M llvm/test/Transforms/InstCombine/canonicalize-clamp-like-pattern-between-zero-and-positive-threshold.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ugt-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ule-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-fcmp-inf.ll
M llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v3-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v3-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll
M llvm/test/Transforms/InstCombine/canonicalize-shl-lshr-to-masking.ll
M llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/canonicalize.ll
M llvm/test/Transforms/InstCombine/cast-int-fcmp-eq-0.ll
M llvm/test/Transforms/InstCombine/cast-int-icmp-eq-0.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
M llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
M llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
M llvm/test/Transforms/InstCombine/compare-signs.ll
M llvm/test/Transforms/InstCombine/compare-udiv.ll
M llvm/test/Transforms/InstCombine/consecutive-ptrmask.ll
M llvm/test/Transforms/InstCombine/copysign-fneg-fabs.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/demorgan.ll
M llvm/test/Transforms/InstCombine/dependent-ivs.ll
M llvm/test/Transforms/InstCombine/div-shift.ll
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/eq-of-parts.ll
M llvm/test/Transforms/InstCombine/exact.ll
M llvm/test/Transforms/InstCombine/exp2-1.ll
M llvm/test/Transforms/InstCombine/exp2-to-ldexp.ll
M llvm/test/Transforms/InstCombine/fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fabs-copysign.ll
M llvm/test/Transforms/InstCombine/fabs-fneg-fold.ll
M llvm/test/Transforms/InstCombine/fadd.ll
M llvm/test/Transforms/InstCombine/fast-math.ll
M llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/fma.ll
M llvm/test/Transforms/InstCombine/fmul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/fmul-sqrt.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fneg-as-int.ll
M llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fold-bin-operand.ll
M llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
M llvm/test/Transforms/InstCombine/fold-select-fmul-if-zero.ll
M llvm/test/Transforms/InstCombine/fold-select-trunc.ll
M llvm/test/Transforms/InstCombine/fold-signbit-test-power2.ll
M llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll
M llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
M llvm/test/Transforms/InstCombine/fsh.ll
M llvm/test/Transforms/InstCombine/funnel.ll
M llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
M llvm/test/Transforms/InstCombine/gep-custom-dl.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/get-lowbitmask-upto-and-including-bit.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/high-bit-signmask-with-trunc.ll
M llvm/test/Transforms/InstCombine/high-bit-signmask.ll
M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation-with-constant.ll
M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation.ll
M llvm/test/Transforms/InstCombine/hoist-not-from-ashr-operand.ll
M llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
M llvm/test/Transforms/InstCombine/icmp-add.ll
M llvm/test/Transforms/InstCombine/icmp-and-shift.ll
M llvm/test/Transforms/InstCombine/icmp-div-constant.ll
M llvm/test/Transforms/InstCombine/icmp-fsh.ll
M llvm/test/Transforms/InstCombine/icmp-logical.ll
M llvm/test/Transforms/InstCombine/icmp-mul-and.ll
M llvm/test/Transforms/InstCombine/icmp-mul.ll
M llvm/test/Transforms/InstCombine/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstCombine/icmp-of-and-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-or-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll
M llvm/test/Transforms/InstCombine/icmp-or.ll
M llvm/test/Transforms/InstCombine/icmp-power2-and-icmp-shifted-mask.ll
M llvm/test/Transforms/InstCombine/icmp-range.ll
M llvm/test/Transforms/InstCombine/icmp-rotate.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
M llvm/test/Transforms/InstCombine/icmp-shl-1-overflow.ll
M llvm/test/Transforms/InstCombine/icmp-shl-nsw.ll
M llvm/test/Transforms/InstCombine/icmp-shl-nuw.ll
M llvm/test/Transforms/InstCombine/icmp-shl.ll
M llvm/test/Transforms/InstCombine/icmp-shr-lt-gt.ll
M llvm/test/Transforms/InstCombine/icmp-shr.ll
M llvm/test/Transforms/InstCombine/icmp-signmask.ll
M llvm/test/Transforms/InstCombine/icmp-sub.ll
M llvm/test/Transforms/InstCombine/icmp-trunc.ll
M llvm/test/Transforms/InstCombine/icmp-uadd-sat.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-usub-sat.ll
M llvm/test/Transforms/InstCombine/icmp-vec-inseltpoison.ll
M llvm/test/Transforms/InstCombine/icmp-vec.ll
M llvm/test/Transforms/InstCombine/icmp-with-selects.ll
M llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll
M llvm/test/Transforms/InstCombine/insertelement.ll
M llvm/test/Transforms/InstCombine/integer-round-up-pow2-alignment.ll
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
M llvm/test/Transforms/InstCombine/intrinsics.ll
M llvm/test/Transforms/InstCombine/invert-variable-mask-in-masked-merge-vector.ll
M llvm/test/Transforms/InstCombine/is_fpclass.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/ldexp-ext.ll
M llvm/test/Transforms/InstCombine/ldexp.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
M llvm/test/Transforms/InstCombine/load-store-masked-constant-array.ll
M llvm/test/Transforms/InstCombine/log-pow.ll
M llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
M llvm/test/Transforms/InstCombine/logical-select.ll
M llvm/test/Transforms/InstCombine/low-bit-splat.ll
M llvm/test/Transforms/InstCombine/lshr-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/lshr-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/lshr-trunc-sext-to-ashr-sext.ll
M llvm/test/Transforms/InstCombine/lshr.ll
M llvm/test/Transforms/InstCombine/masked-merge-add.ll
M llvm/test/Transforms/InstCombine/masked-merge-and-of-ors.ll
M llvm/test/Transforms/InstCombine/masked-merge-or.ll
M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
M llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll
M llvm/test/Transforms/InstCombine/masked_intrinsics.ll
M llvm/test/Transforms/InstCombine/max-of-nots.ll
M llvm/test/Transforms/InstCombine/maximum.ll
M llvm/test/Transforms/InstCombine/maxnum.ll
M llvm/test/Transforms/InstCombine/merge-icmp.ll
M llvm/test/Transforms/InstCombine/min-positive.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
M llvm/test/Transforms/InstCombine/minmax-of-xor-x.ll
M llvm/test/Transforms/InstCombine/modulo.ll
M llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/mul-masked-bits.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/mul_fold.ll
M llvm/test/Transforms/InstCombine/narrow-math.ll
M llvm/test/Transforms/InstCombine/narrow.ll
M llvm/test/Transforms/InstCombine/negated-bitmask.ll
M llvm/test/Transforms/InstCombine/nested-select.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/nsw-inseltpoison.ll
M llvm/test/Transforms/InstCombine/nsw.ll
M llvm/test/Transforms/InstCombine/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
M llvm/test/Transforms/InstCombine/onehot_merge.ll
M llvm/test/Transforms/InstCombine/operand-complexity.ll
M llvm/test/Transforms/InstCombine/or-concat.ll
M llvm/test/Transforms/InstCombine/or-xor.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/overflow-mul.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-a.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-c.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-d.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-e.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-e.ll
M llvm/test/Transforms/InstCombine/pow-0.ll
M llvm/test/Transforms/InstCombine/pow-1.ll
M llvm/test/Transforms/InstCombine/pow-sqrt.ll
M llvm/test/Transforms/InstCombine/pow-to-ldexp.ll
M llvm/test/Transforms/InstCombine/pow_fp_int.ll
M llvm/test/Transforms/InstCombine/pr14365.ll
M llvm/test/Transforms/InstCombine/pr17827.ll
M llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll
M llvm/test/Transforms/InstCombine/pr38984.ll
M llvm/test/Transforms/InstCombine/pr53357.ll
M llvm/test/Transforms/InstCombine/pr98435.ll
M llvm/test/Transforms/InstCombine/ptrmask.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-a.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-c.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-d.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-e.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-f.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll
M llvm/test/Transforms/InstCombine/redundant-right-shift-input-masking.ll
M llvm/test/Transforms/InstCombine/rem-mul-shl.ll
M llvm/test/Transforms/InstCombine/rem.ll
M llvm/test/Transforms/InstCombine/reuse-constant-from-select-in-icmp.ll
M llvm/test/Transforms/InstCombine/rotate.ll
M llvm/test/Transforms/InstCombine/sadd-with-overflow.ll
M llvm/test/Transforms/InstCombine/sadd_sat.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/scalarization.ll
M llvm/test/Transforms/InstCombine/sdiv-canonicalize.ll
M llvm/test/Transforms/InstCombine/sdiv-exact-by-negative-power-of-two.ll
M llvm/test/Transforms/InstCombine/sdiv-exact-by-power-of-two.ll
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-bitext.ll
M llvm/test/Transforms/InstCombine/select-divrem.ll
M llvm/test/Transforms/InstCombine/select-extractelement.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
M llvm/test/Transforms/InstCombine/select-icmp-and-zero-shl.ll
M llvm/test/Transforms/InstCombine/select-icmp-and.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
M llvm/test/Transforms/InstCombine/select-safe-transforms.ll
M llvm/test/Transforms/InstCombine/select-value-equivalence.ll
M llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/select_meta.ll
M llvm/test/Transforms/InstCombine/set-lowbits-mask-canonicalize.ll
M llvm/test/Transforms/InstCombine/set.ll
M llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll
M llvm/test/Transforms/InstCombine/sext.ll
M llvm/test/Transforms/InstCombine/shift-add.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-shl.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-shl.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
M llvm/test/Transforms/InstCombine/shift-logic.ll
M llvm/test/Transforms/InstCombine/shift-shift.ll
M llvm/test/Transforms/InstCombine/shift-sra.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/shl-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/shl-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/shl-bo.ll
M llvm/test/Transforms/InstCombine/shl-demand.ll
M llvm/test/Transforms/InstCombine/shl-sub.ll
M llvm/test/Transforms/InstCombine/shl-unsigned-cmp-const.ll
M llvm/test/Transforms/InstCombine/shuffle_select-inseltpoison.ll
M llvm/test/Transforms/InstCombine/shuffle_select.ll
M llvm/test/Transforms/InstCombine/signbit-lshr-and-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signbit-shl-and-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signed-mul-lack-of-overflow-check-via-mul-sdiv.ll
M llvm/test/Transforms/InstCombine/signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/signext.ll
M llvm/test/Transforms/InstCombine/signmask-of-sext-vs-of-shl-of-zext.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/test/Transforms/InstCombine/smin-icmp.ll
M llvm/test/Transforms/InstCombine/sqrt.ll
M llvm/test/Transforms/InstCombine/ssub-with-overflow.ll
M llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-lshr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible.ll
M llvm/test/Transforms/InstCombine/sub-xor.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
M llvm/test/Transforms/InstCombine/trunc-demand.ll
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
M llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
M llvm/test/Transforms/InstCombine/uaddo.ll
M llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll
M llvm/test/Transforms/InstCombine/umin_cttz_ctlz.ll
M llvm/test/Transforms/InstCombine/unfold-masked-merge-with-const-mask-vector.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-mul-udiv.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/unsigned_saturated_sub.ll
M llvm/test/Transforms/InstCombine/variable-signext-of-variable-high-bit-extraction.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract.ll
M llvm/test/Transforms/InstCombine/vec_sext.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll
M llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vector-casts.ll
M llvm/test/Transforms/InstCombine/vector-mul.ll
M llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll
M llvm/test/Transforms/InstCombine/vector-trunc.ll
M llvm/test/Transforms/InstCombine/vector-udiv.ll
M llvm/test/Transforms/InstCombine/vector-urem.ll
M llvm/test/Transforms/InstCombine/vector-xor.ll
M llvm/test/Transforms/InstCombine/with_overflow.ll
M llvm/test/Transforms/InstCombine/xor-and-or.ll
M llvm/test/Transforms/InstCombine/xor-ashr.ll
M llvm/test/Transforms/InstCombine/xor-icmps.ll
M llvm/test/Transforms/InstCombine/xor-of-or.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/xor2.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/InstCombine/zext.ll
M llvm/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
M llvm/test/Transforms/InstSimplify/ConstProp/ARM/mve-vctp.ll
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
M llvm/test/Transforms/InstSimplify/ConstProp/bitcast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/cast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
M llvm/test/Transforms/InstSimplify/abs_intrinsic.ll
M llvm/test/Transforms/InstSimplify/add_vp.ll
M llvm/test/Transforms/InstSimplify/addsub.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/InstSimplify/bitreverse-fold.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/InstSimplify/canonicalize.ll
M llvm/test/Transforms/InstSimplify/cast-unsigned-icmp-cmp-0.ll
M llvm/test/Transforms/InstSimplify/cmp-vec-fast-path.ll
M llvm/test/Transforms/InstSimplify/compare.ll
M llvm/test/Transforms/InstSimplify/constantfold-add-nuw-allones-to-allones.ll
M llvm/test/Transforms/InstSimplify/constantfold-shl-nuw-C-to-C.ll
M llvm/test/Transforms/InstSimplify/ctpop-pow2.ll
M llvm/test/Transforms/InstSimplify/div.ll
M llvm/test/Transforms/InstSimplify/exp10.ll
M llvm/test/Transforms/InstSimplify/fast-math-strictfp.ll
M llvm/test/Transforms/InstSimplify/fast-math.ll
M llvm/test/Transforms/InstSimplify/fdiv.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic-strictfp.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic.ll
M llvm/test/Transforms/InstSimplify/floating-point-compare.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/fptoi-range.ll
M llvm/test/Transforms/InstSimplify/frexp.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/icmp-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp.ll
M llvm/test/Transforms/InstSimplify/implies.ll
M llvm/test/Transforms/InstSimplify/insertelement.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-non-zero.ll
M llvm/test/Transforms/InstSimplify/maxmin_intrinsics.ll
M llvm/test/Transforms/InstSimplify/negate.ll
M llvm/test/Transforms/InstSimplify/or-icmps-same-ops.ll
M llvm/test/Transforms/InstSimplify/or.ll
M llvm/test/Transforms/InstSimplify/pr28725.ll
M llvm/test/Transforms/InstSimplify/ptrmask.ll
M llvm/test/Transforms/InstSimplify/rem.ll
M llvm/test/Transforms/InstSimplify/returned.ll
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/sdiv.ll
M llvm/test/Transforms/InstSimplify/select-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/select-logical.ll
M llvm/test/Transforms/InstSimplify/select.ll
M llvm/test/Transforms/InstSimplify/select_or_and.ll
M llvm/test/Transforms/InstSimplify/shift-knownbits.ll
M llvm/test/Transforms/InstSimplify/shift.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
M llvm/test/Transforms/InstSimplify/shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/shufflevector.ll
M llvm/test/Transforms/InstSimplify/strictfp-fadd.ll
M llvm/test/Transforms/InstSimplify/uscmp.ll
M llvm/test/Transforms/InstSimplify/vec-cmp.ll
M llvm/test/Transforms/InstSimplify/vec-icmp-of-cast.ll
M llvm/test/Transforms/InstSimplify/vector_gep.ll
M llvm/test/Transforms/InstSimplify/xor.ll
M llvm/test/Transforms/InterleavedAccess/X86/interleave-load-extract-shuffle-changes.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch-opaque-ptr.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch.ll
M llvm/test/Transforms/LoopUnroll/ARM/mve-upperbound.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors-inseltpoison.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/streaming-compatible-sve-no-maximize-bandwidth.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/vplan-native-inner-loop-only.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-not-when-safe.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/induction_plus.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/preserve-or-disjoint.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-int-row-major.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-add-sub-double-row-major.ll
M llvm/test/Transforms/MemCpyOpt/form-memset.ll
M llvm/test/Transforms/NewGVN/completeness.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/predicated-reduction.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr50555.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr88239.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vec-shift.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
M llvm/test/Transforms/Reassociate/fast-ReassociateVector.ll
M llvm/test/Transforms/Reassociate/negation.ll
M llvm/test/Transforms/Reassociate/xor_reassoc.ll
M llvm/test/Transforms/RewriteStatepointsForGC/vector-nonlive-clobber.ll
M llvm/test/Transforms/SCCP/add-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/intrinsics.ll
M llvm/test/Transforms/SCCP/ip-ranges-casts.ll
M llvm/test/Transforms/SCCP/overdefined-ext.ll
M llvm/test/Transforms/SCCP/trunc-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/vector-bitcast.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/external-use-icmp.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-root.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/sdiv-pow2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec15-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-min-max.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/widen.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/floating-point.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/getpointerschaincost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/minbw-with-and-and-scalar-trunc.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/phi-const.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduction-extension-after-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/scatter-vectorize-reversed.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-stores-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-bv-multi-uses.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-to-large-than-bw.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-node-trunc-with-signed-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec15-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-not-resized-op-resized.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_2.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-and-const-load.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-div.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_sel.ll
M llvm/test/Transforms/SLPVectorizer/X86/combined-stores-chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_smallpt.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-counter.ll
M llvm/test/Transforms/SLPVectorizer/X86/different-vec-widths.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/external_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep-nodes-with-non-gep-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep.ll
M llvm/test/Transforms/SLPVectorizer/X86/geps-non-pow-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/long_chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-gather-nodes-phi-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/mul64.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi3.ll
M llvm/test/Transforms/SLPVectorizer/X86/powof2div.ll
M llvm/test/Transforms/SLPVectorizer/X86/powof2mul.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr23510.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49933.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-bool-logic-op-inside.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_gather-load-redux-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-scalars-in-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder-non-empty.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/simple-loop.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-minbitwidth-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2_unord_geps.ll
M llvm/test/Transforms/SLPVectorizer/X86/stackrestore-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/stores_vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/unreachable.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/abs-overflow-incorrect-minbws.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
M llvm/test/Transforms/SLPVectorizer/freeze-signedness-missed.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/operand-is-reduced-val.ll
M llvm/test/Transforms/SLPVectorizer/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reduction_loads.ll
M llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
M llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-fix-109835.ll
M llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
M llvm/test/Transforms/SROA/tbaa-struct3.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-store.ll
M llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-select.ll
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
M llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/AArch64/vecreduce-shuffle.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization-shufflevector-splat.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
M llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll
M llvm/test/Transforms/VectorCombine/X86/scalarize-cmp.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle.ll
M llvm/test/tools/llvm-reduce/reduce-opcodes.ll
M llvm/test/tools/llvm-reduce/reduce-operands-fp.ll
M llvm/test/tools/llvm-reduce/reduce-operands-int.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
Commit: e3a0775651190a23d8234615b9fdadd81c1c24bc
https://github.com/llvm/llvm-project/commit/e3a0775651190a23d8234615b9fdadd81c1c24bc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/extract-cmp-binop.ll
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] foldExtractedCmps - (re-)enable fold on non-commutative binops
#114901 exposed that foldExtractedCmps didn't account for non-commutative binops, and were disabled by 05e838f428555bcc4507bd37912da60ea9110ef6
This patch re-enables support for non-commutative binops by ensuring that the LHS/RHS arg order of the binop is retained.
Commit: f1f5220958eb02a7ca4aa21cb95df4746e91bc3b
https://github.com/llvm/llvm-project/commit/f1f5220958eb02a7ca4aa21cb95df4746e91bc3b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/clocale
M libcxx/include/cstdint
Log Message:
-----------
[libc++] Only include the system <stdint.h> and <locale.h> if they exist (#115017)
Prior to aa7f377c96, we only did an #include_next of those system
headers if they existed. After removing those headers from libc++, we
started assuming that the system provided the headers because we
unconditionally started including them. This patch fixes that.
Commit: 28452acac05de8dc64aa7ba76af70ac541667cdd
https://github.com/llvm/llvm-project/commit/28452acac05de8dc64aa7ba76af70ac541667cdd
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] delayed privatisation for TASK (#114785)
This uses essentially an identical implementation to that used for
ParallelOp. The private variable allocation and deallocation use shared
functions to avoid code duplication. FIRSTPRIVATE variable copying uses
duplicated code for now because I anticipate the implementation
diverging in the near future once I store data for firstprivate
variables in the task description structure.
After enabling delayed privatisation for TASK in flang, one more test in
the fujitsu test suite passes (I haven't looked into why).
Commit: 88e9b373c0d7184b08c755024cce0778d18f0306
https://github.com/llvm/llvm-project/commit/88e9b373c0d7184b08c755024cce0778d18f0306
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
A llvm/test/Transforms/FunctionSpecialization/solver-constants.ll
A llvm/test/Transforms/FunctionSpecialization/solver-dead-blocks.ll
Log Message:
-----------
[FuncSpec] Query SCCPSolver in more places (#114964)
When traversing the use-def chain of an Argument in a candidate
specialization, also query the SCCPSolver to see if a Value is constant.
This allows us to better estimate the codesize savings of a candidate in
the presence of instructions that are a user of the argument we are
estimating savings for which also use arguments that have been found
constant by IPSCCP.
Similarly when estimating the dead basic blocks from branch and switch
instructions which become constant, also query the SCCPSolver to see if
a predecessor is unreachable.
Commit: 246b57cb2086b22ad8b41051c77e86ef478053a1
https://github.com/llvm/llvm-project/commit/246b57cb2086b22ad8b41051c77e86ef478053a1
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/test/Lower/PowerPC/ppc-vec-cmp.f90
M flang/test/Lower/PowerPC/ppc-vec-convert.f90
M flang/test/Lower/PowerPC/ppc-vec-perm.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-shift.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
Log Message:
-----------
Fix tests in flang/test/Lower/PowerPC after splat change.
Commit: 79f4d8f0145d72dff8c33745f35d45c74ecb3fdf
https://github.com/llvm/llvm-project/commit/79f4d8f0145d72dff8c33745f35d45c74ecb3fdf
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/AST/DeclTemplate.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/AST/ast-dump-decl.cpp
R clang/test/ASTMerge/class-template-spec/Inputs/class-template-spec.cpp
R clang/test/ASTMerge/class-template-spec/test.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Always use latest redeclaration of primary template" (#114569)" (#115156)
This reverts commit b24650e814e55d90acfc40acf045456c98f32b9c.
Commit: 2904f809cd1bf2651d6eceb2ad86553f407bf530
https://github.com/llvm/llvm-project/commit/2904f809cd1bf2651d6eceb2ad86553f407bf530
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
Log Message:
-----------
Revert "[Clang][Sema] Use the correct injected template arguments for partial specializations when collecting multi-level template argument lists (#112381)" (#115157)
This reverts commit 9381c6fd04cc16a7606633f57c96c11e58181ddb.
Commit: fbd89bcc6647ed611e579d8f9c38c97b8e6f7936
https://github.com/llvm/llvm-project/commit/fbd89bcc6647ed611e579d8f9c38c97b8e6f7936
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Transforms/PhaseOrdering/lto-argpromotion-ipsccp.ll
Log Message:
-----------
Reland "[LTO] Run Argument Promotion before IPSCCP" (#111853)
Run ArgumentPromotion before IPSCCP in the LTO pipeline, to expose more
constants to be propagated. We also run PostOrderFunctionAttrs to
improve the information available to ArgumentPromotion's alias analysis,
and SROA to clean up allocas.
Relands #111163.
Commit: 44ab3805b5a4a1f37e186e79b83c5cdc838312ed
https://github.com/llvm/llvm-project/commit/44ab3805b5a4a1f37e186e79b83c5cdc838312ed
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
R clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
R clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/Modules/cxx-templates.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Refactor collection of multi-level template argument lists (#106585, #111173)" (#111852)" (#115159)
This reverts commit 2bb3d3a3f32ffaef3d9b6a27db7f1941f0cb1136.
Commit: 2f743ac52e945e155ff3cb1f8ca5287b306b831e
https://github.com/llvm/llvm-project/commit/2f743ac52e945e155ff3cb1f8ca5287b306b831e
Author: Ilya Enkovich <ilya.enkovich at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/AMX/AMX.td
M mlir/include/mlir/Dialect/AMX/AMXDialect.h
M mlir/include/mlir/Dialect/AMX/Transforms.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/AMX/IR/AMXDialect.cpp
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
M mlir/test/Dialect/AMX/invalid.mlir
M mlir/test/Dialect/AMX/legalize-for-llvm.mlir
M mlir/test/Dialect/AMX/roundtrip.mlir
Log Message:
-----------
[MLIR] [AMX] Utilize x86_amx type for AMX dialect in MLIR. (#111197)
This patch is intended to resolve #109481 and improve the usability of
the AMX dialect.
In LLVM IR, AMX intrinsics use `x86_amx` which is one of the primitive
types. This type is supposed to be used for AMX intrinsic calls and no
other operations. AMX dialect of MLIR uses regular 2D vector types,
which are then lowered to arrays of vectors in the LLVMIR dialect. This
creates an inconsistency in the types used in the LLVMIR dialect and
LLVMIR. Translation of AMX intrinsic calls to LLVM IR doesn't require
result types to match and that is where tile loads and mul operation
results get `x86_amx` type. This works in very simple cases when mul and
tile store operations directly consume the result of another AMX
intrinsic call, but it doesn't work when an argument is a block argument
(phi node).
In addition to translation problems, this inconsistency between types
used in MLIR and LLVM IR makes MLIR verification and transformation
quite problematic. Both `amx.tileload` and `vector::transfer_read` can
load values of the same type, but only one of them can be used in AMX
operations. In general, by looking at a type of value, we cannot
determine if it can only be used for AMX operations or contrary can be
used in other operations but AMX ones.
To remove this inconsistency and make AMX operations more explicit in
their limitations, I propose to add `LLVMX86AMXType` type to the LLVMIR
dialect to match `x86_amx` type in LLVM IR, and introduce
`amx::TileType` to be used by AMX operations in MLIR. This resolves
translation problems for AMX usage with phi nodes and provides proper
type verification in MLIR for AMX operations.
P.S. This patch also adds missing FP16 support. It's trivial but
unrelated to type system changes, so let me know if I should submit it
separately.
---------
Signed-off-by: Ilya Enkovich <ilya.enkovich at intel.com>
Commit: 9b016e3cb2859ef06f0301ebbc48df294b2356dc
https://github.com/llvm/llvm-project/commit/9b016e3cb2859ef06f0301ebbc48df294b2356dc
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/test/CodeGen/Thumb2/mve-vcmla.ll
Log Message:
-----------
[ARM] Add early-clobber to MVE VCMLA.f32 (#114995)
This instruction (but not the f16 variant) cannot us the same register
for the output as either of the inputs, so it needs to be marked as
early-clobber.
Commit: 5d8be4c036aa5ce4a94f1f37a9155d5c877e23db
https://github.com/llvm/llvm-project/commit/5d8be4c036aa5ce4a94f1f37a9155d5c877e23db
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/apple.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_defaults.h
M libcxx/include/__locale_dir/locale_base_api/freebsd.h
M libcxx/include/locale
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Define an internal locale API as a shim on top of the current one (#114596)
Our current locale base API is a mix of non-reserved system names that
we incorrectly (re)define and internal functions and macros starting
with __libcpp. This patch introduces a function-based internal interface
to isolate the rest of the code base from that mess, so that we can work
on refactoring how each platform implements the base API in subsequent
patches. This makes it possible to refactor how each platform implements
the base localization API without impacting the rest of the code base.
Commit: 86e4beb702fde407a35938a1c37279a61c0291e7
https://github.com/llvm/llvm-project/commit/86e4beb702fde407a35938a1c37279a61c0291e7
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/Mips.h
M clang/test/CodeGen/target-data.c
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
A llvm/test/CodeGen/Mips/data-layout.ll
M llvm/test/CodeGen/Mips/implicit-sret.ll
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (#112084)
Fix parts of #102783.
Commit: f61a8bc305d60f1ab04225e2b210d8b3d9c97eb8
https://github.com/llvm/llvm-project/commit/f61a8bc305d60f1ab04225e2b210d8b3d9c97eb8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CodeGen/X86/builtin_test_helpers.h
Log Message:
-----------
[clang][x86] Prevent signed/unsigned comparison warnings on constexpr m128i/m256i/m512i match helpers.
These matches are here to help match hex patterns so consistently match with unsigned uint64_t types
Commit: 7585e2fd3caee30d5332c93995b7a6f51ab06660
https://github.com/llvm/llvm-project/commit/7585e2fd3caee30d5332c93995b7a6f51ab06660
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_movepi64_pi64 and _mm_move_epi64
Commit: fb90733e196039b0a77f43af98c42c9267a31e07
https://github.com/llvm/llvm-project/commit/fb90733e196039b0a77f43af98c42c9267a31e07
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
A clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/firstbithigh.ll
A llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
A llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
Log Message:
-----------
[HLSL] implement elementwise firstbithigh hlsl builtin (#111082)
Implements elementwise firstbithigh hlsl builtin.
Implements firstbituhigh intrinsic for spirv and directx, which handles
unsigned integers
Implements firstbitshigh intrinsic for spirv and directx, which handles
signed integers.
Fixes #113486
Closes #99115
Commit: b5d8a03de453b79ca3c0bf841931bcaacf2fc830
https://github.com/llvm/llvm-project/commit/b5d8a03de453b79ca3c0bf841931bcaacf2fc830
Author: Rin Dobrescu <irina.dobrescu at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
Log Message:
-----------
[AArch64] Add missing ASIMD FP convert instructions to scheduling model (#115146)
Some ASIMD FP convert instructions have incorrect scheduling
information. These instructions currently have latency 2, throughput 4
and utilise pipeline V. This patch corrects the scheduling models to
match the relevant Software Optimization Guide.
The V1 and V2 Software Optimization Guide show that ASIMD FP convert
instructions should all utilise pipelines V02. Their execution latency
and throughput should also differ depending on form. See section 3.17
"ASIMD floating-point instructions" in the Neoverse-V1 and Neoverse-V2
Software Optimization Guide for characteristics of instruction
performance.
Reference:
- V1 SOG: https://developer.arm.com/documentation/109897/latest/
- V2 SOG: https://developer.arm.com/documentation/109898/latest/
Commit: 8699f301ae70ce402618c061b6c45a99e31c5f5e
https://github.com/llvm/llvm-project/commit/8699f301ae70ce402618c061b6c45a99e31c5f5e
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Add more socket interceptors (#115020)
Adds getaddrinfo, getnameinfo, bind, listen, accept and connect
Commit: 76422385c3081475ed1bf0e23aa2f3913e66c5b8
https://github.com/llvm/llvm-project/commit/76422385c3081475ed1bf0e23aa2f3913e66c5b8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
Log Message:
-----------
[SLP]Support reordered buildvector nodes for better clustering
Patch adds reordering of the buildvector nodes for better clustering of
the compatible operations and future vectorization. Includes basic cost
estimation and if the transformation is not profitable - reverts it.
AVX512, -O3+LTO
Metric: size..text
Program size..text
results results0 diff
test-suite :: External/SPEC/CINT2006/401.bzip2/401.bzip2.test 74565.00 75701.00 1.5%
test-suite :: External/SPEC/CINT2017rate/541.leela_r/541.leela_r.test 75773.00 76397.00 0.8%
test-suite :: External/SPEC/CINT2017speed/641.leela_s/641.leela_s.test 75773.00 76397.00 0.8%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2014462.00 2024494.00 0.5%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 395219.00 396979.00 0.4%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 857795.00 859667.00 0.2%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 800472.00 802440.00 0.2%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 590699.00 591403.00 0.1%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 203006.00 203102.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 42408.00 42424.00 0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12451575.00 12451927.00 0.0%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1396480.00 1396448.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1396480.00 1396448.00 -0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 1047708.00 1047580.00 -0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-jpeg/consumer-jpeg.test 111344.00 111328.00 -0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 1087660.00 1087500.00 -0.0%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 280664.00 280616.00 -0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 502646.00 502006.00 -0.1%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1033135.00 1031567.00 -0.2%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 2070917.00 2065845.00 -0.2%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 2070917.00 2065845.00 -0.2%
test-suite :: External/SPEC/CINT2006/473.astar/473.astar.test 33893.00 33797.00 -0.3%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39677.00 39549.00 -0.3%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39674.00 39546.00 -0.3%
test-suite :: MultiSource/Benchmarks/MiBench/security-blowfish/security-blowfish.test 11560.00 11512.00 -0.4%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 653867.00 649275.00 -0.7%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 653867.00 649275.00 -0.7%
CINT2006/401.bzip2 - extra code vectorized
CINT2017rate/541.leela_r
CINT2017speed/641.leela_s - function
_ZN9FastBoard25get_pattern3_augment_specEiib not inlined anymore, better
vectorization
CFP2017rate/510.parest_r - better vectorization
JM/ldecod - better vectorization
JM/lencod - same
CINT2006/464.h264ref - extra code vectorized
CFP2006/447.dealII - extra vector code
MiBench/consumer-lame - vectorized 2 loops previously scalar
DOE-ProxyApps-C/miniGMG - small changes
Benchmarks/7zip - extra code vectorized, better vectorization
CFP2017rate/526.blender_r - extra vectorization
CFP2017speed/638.imagick_s
CFP2017rate/538.imagick_r - extra vectorization
MiBench/consumer-jpeg - extra vectorization
CINT2006/400.perlbench - extra vectorization
Prolangs-C/TimberWolfMC - small variations
Applications/sqlite3 - extra function vectorized and inlined
Benchmarks/tramp3d-v4 - extra code vectorized
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - extra code vectorized, function digcpy gets
vectorized and inlined
CINT2006/473.astar - extra code vectorized
MiBench/telecomm-gsm - extra code vectorized, better vector code
mediabench/gsm - same
MiBench/security-blowfish - extra code vectorized
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - sub4x4_dct function vectorized and gets
inlined
RISCV-V, SiFive-p670, O3+LTO
CFP2017rate/510.parest_r - extra vectorization
CFP2017rate/526.blender_r - extra vectorization
MiBench/consumer-lame - extra vectorized code
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/114284
Commit: c10d4b492d981c96fa3269bc0fe0b3ea9b1ca486
https://github.com/llvm/llvm-project/commit/c10d4b492d981c96fa3269bc0fe0b3ea9b1ca486
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/AST/SYCLKernelInfo.h
Log Message:
-----------
[clang][SYCL] Add a missing include to make the header standalone
Commit: f548d39c3c751446d124c08769080214680d53ba
https://github.com/llvm/llvm-project/commit/f548d39c3c751446d124c08769080214680d53ba
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
Log Message:
-----------
[Clang][Test] Update test after #115159 (#115172)
After #111852 was reverted in #115159, two tests now fail because they
partially depend on its changes. This patch temporarily fixes the
failing cases by updating the expected output to match the actual
output. Once #111852 is relanded, this can be reverted.
Commit: 3aa2f63822c0d829c875aa41ca2fd0103939dfaf
https://github.com/llvm/llvm-project/commit/3aa2f63822c0d829c875aa41ca2fd0103939dfaf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_castps_pd/_mm_castps_si128/_mm_castsi128_pd/_mm_castsi128_ps intrinsics
Commit: f74aed793819bf9e0509e802f33c5e29c350540c
https://github.com/llvm/llvm-project/commit/f74aed793819bf9e0509e802f33c5e29c350540c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/AArch64/trunc-nsw-nuw.ll
A llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
A llvm/test/CodeGen/X86/trunc-nsw-nuw.ll
Log Message:
-----------
[DAGCombiner] Add basic support for `trunc nsw/nuw` (#113808)
This patch adds basic support for `trunc nsw/nuw` in SDAG. It will allow
DAGCombiner to further eliminate in-reg `zext/sext` instructions.
Commit: 201d7607f87afff999b1257d27569a3053b85143
https://github.com/llvm/llvm-project/commit/201d7607f87afff999b1257d27569a3053b85143
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Add context-aware diagnostic functions (#112319)
The current diagnostic functions log/warn/error/fatal lack a context
argument and call the global `lld::errorHandler()`, which prevents
multiple lld instances in one process.
This patch introduces context-aware replacements:
* log => Log(ctx)
* warn => Warn(ctx)
* errorOrWarn => Err(ctx)
* error => ErrAlways(ctx)
* fatal => Fatal(ctx)
Example: `errorOrWarn(toString(f) + "xxx")` => `Err(ctx) << f << "xxx"`.
(`toString(f)` is shortened to `f` as a bonus and may access `ctx`
without accessing the global variable (see `Target.cpp`)).
`ctx.e = &context->e;` can be replaced with a non-global Errorhandler
when `ctx` becomes a local variable.
(For the ELF port, the long term goal is to eliminate `error`. Most can
be straightforwardly converted to `Err(ctx)`.)
Commit: 83f92c33a4b4bd703882e7e9bb2c5efd15042b96
https://github.com/llvm/llvm-project/commit/83f92c33a4b4bd703882e7e9bb2c5efd15042b96
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
Log Message:
-----------
[RISCV] fix SP recovery in varargs functions (#114316)
This patch fixes sp recovery in the epilogue in varargs functions when
fp register is presented and second sp adjustment is applied.
Source of the issue: https://github.com/llvm/llvm-project/pull/110809
Commit: 9f3b6adb1508a714dc12aa020a20d813d9ab9f42
https://github.com/llvm/llvm-project/commit/9f3b6adb1508a714dc12aa020a20d813d9ab9f42
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Exit early if the graph is empty, NFC
No need to check anything if the graph is empty, just exit early.
Commit: 6219c8083904b49d09f466b703ca47891f978278
https://github.com/llvm/llvm-project/commit/6219c8083904b49d09f466b703ca47891f978278
Author: Duncan <duncpro at icloud.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/newhdrgen/yaml/unistd.yaml
M libc/spec/linux.td
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/pipe2.cpp
A libc/src/unistd/pipe2.h
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/pipe2_test.cpp
Log Message:
-----------
[libc] [unistd] implement pipe2 syscall wrapper (#114474)
Closes #85289
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: b7ee03ffb8696c4d81a5a97c61cb2149c17e6573
https://github.com/llvm/llvm-project/commit/b7ee03ffb8696c4d81a5a97c61cb2149c17e6573
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.cpp
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.h
Log Message:
-----------
[clang-include-fixer] Use heterogenous lookups with std::map (NFC) (#115113)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: c4dfa03f9f44fa183daabdd4e6d760a432ef6531
https://github.com/llvm/llvm-project/commit/c4dfa03f9f44fa183daabdd4e6d760a432ef6531
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
Log Message:
-----------
[clang-tidy] Call StringMap::find without constructing std::string (NFC) (#115114)
StringMap::find takes StringRef, so we don't need to allocate
temporary instances of std::string.
Commit: 18d2539ce674c1eabac187403257ae53ed2ee264
https://github.com/llvm/llvm-project/commit/18d2539ce674c1eabac187403257ae53ed2ee264
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
Log Message:
-----------
[StaticAnalyzer] Simplify code with DenseMap::operator[] (NFC) (#115116)
Commit: 4d12a14357b136e996f8789786f1b76348b5582b
https://github.com/llvm/llvm-project/commit/4d12a14357b136e996f8789786f1b76348b5582b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/KCFI.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
Log Message:
-----------
[Instrumentation] Remove unused includes (NFC) (#115117)
Identified with misc-include-cleaner.
Commit: 57ab62a2aa80911391fd9ea49573b39e7e9aa0f0
https://github.com/llvm/llvm-project/commit/57ab62a2aa80911391fd9ea49573b39e7e9aa0f0
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
Log Message:
-----------
[flang] Add FIR AliasAnalysis alias() wrapper to allow external getSource() method (#115073)
Adding a wrapper around alias(mlir::Value lhs, mlir::Value rhs) to allow
user to provide Source objects.
Commit: efe87fbc9d52952dc7ee89579347cbf49ecfa609
https://github.com/llvm/llvm-project/commit/efe87fbc9d52952dc7ee89579347cbf49ecfa609
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (#114144)
Commit: 5dc8d61177225a86266beeedf09baa847f97edf0
https://github.com/llvm/llvm-project/commit/5dc8d61177225a86266beeedf09baa847f97edf0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Implement zexti32/zexti16 ComplexPatterns. (#115097)
Commit: 29e467fc78eb8b4308b57272ca4ad0d1f744f25f
https://github.com/llvm/llvm-project/commit/29e467fc78eb8b4308b57272ca4ad0d1f744f25f
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Type.h
Log Message:
-----------
[llvm] Deprecate Type::getPointerTo() (#113331)
`llvm::Type::getPointerTo()` is no longer needed with opaque pointers in LLVM.
It may rather confuse new contributors to think that LLVM has typed pointers.
Commit: aa7941289ee5b7d9bdf47e1b0ebf2130a86d9522
https://github.com/llvm/llvm-project/commit/aa7941289ee5b7d9bdf47e1b0ebf2130a86d9522
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
Log Message:
-----------
AMDGPU: Fold copy of scalar add of frame index (#115058)
This is a pre-optimization to avoid a regression in a future
commit. Currently we almost always emit frame index with
a v_mov_b32 and use vector adds for the pointer operations. We
need to consider the users of the frame index (or rather, the
transitive users of derived pointer operations) to know whether
the value will be used in a vector or scalar context. This saves
an sgpr->vgpr copy.
This optimization could be more general for any opcode that's
trivially convertible from a scalar to vector form (although this
is a workaround for a proper regbankselect).
Commit: 3b0f506c87cf7cf32604c9592aeca3ede0e1f79e
https://github.com/llvm/llvm-project/commit/3b0f506c87cf7cf32604c9592aeca3ede0e1f79e
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
Log Message:
-----------
[AMDGPU] Support `nuw` and `nusw` in buffer fat pointer lowering (#115039)
This commit usis the `nuw` flag on `getelemnetptr` to set the `nuw` flag
on buffer offset additions, and also moves from `inbounds` to the looser
`nusw` for the existing case.
Commit: 270f7cf68ae64a42d7112c0319f33a1d913e6333
https://github.com/llvm/llvm-project/commit/270f7cf68ae64a42d7112c0319f33a1d913e6333
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP][Docs] Update OpenMP supported features table (#115106)
OpenMP features table: added 'allocator' modifier for 'allocate' clause
as a completed feature in OpenMP 5.1 Implementation Details.
Commit: 8dd9f206b518a97132f3e2489ccc93704e638353
https://github.com/llvm/llvm-project/commit/8dd9f206b518a97132f3e2489ccc93704e638353
Author: Pranav Kant <prka at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix mlir:VectorToSPIRV (#115188)
Commit: 4d4024e1edf354113e8d0d11661d466ae5b0bee7
https://github.com/llvm/llvm-project/commit/4d4024e1edf354113e8d0d11661d466ae5b0bee7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lldb/test/API/lit.cfg.py
M lldb/test/Shell/lit.cfg.py
M lldb/test/Unit/lit.cfg.py
M lldb/test/Unit/lit.site.cfg.py.in
Log Message:
-----------
[lldb] Set MallocNanoZone for all sanitizers when running tests
Disabling MallocNanoZone is necessary for both ASan and TSan.
Commit: 38cc03f78e3046837d8fc29d729bc2cee0c31e89
https://github.com/llvm/llvm-project/commit/38cc03f78e3046837d8fc29d729bc2cee0c31e89
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Restore whole-archive state when `-fjmc` (#115181)
`--whole-archive` is passed to the linker to have it consume all objects
within the SIE Just My Code library, rather than just those that fulfil
outstanding references.
Prior to this change, `--no-whole-archive` was used to reset the
associated archive handling state in the linker, under the assumption
that `--whole-archive` wasn't already in effect. But that assumption may
be incorrect. So use `--push/pop-state` to restore the previous state,
whatever that may be.
Given the position of these switches on the link line, the problem
described with the outgoing code is unlikely to cause an issue in
practice. But push/pop protect against accidents due to future additions
to and reorderings of arguments.
PS5 only. The proprietary PS4 linker doesn't support `--push/pop-state`,
or an equivalent.
SIE tracker: TOOLCHAIN-16704.
Commit: 5a6cc509215b62e94de3b798ea26944a375ce6cb
https://github.com/llvm/llvm-project/commit/5a6cc509215b62e94de3b798ea26944a375ce6cb
Author: Jingyu Qiu <51221277+SoftJing1 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/newhdrgen/yaml/sys/mman.yaml
M libc/spec/linux.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mremap.cpp
A libc/src/sys/mman/mremap.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/mremap_test.cpp
Log Message:
-----------
[libc] add mremap (#112804)
Commit: 39f2bae2407e08176a453c7c7e6f4888bbf28a4e
https://github.com/llvm/llvm-project/commit/39f2bae2407e08176a453c7c7e6f4888bbf28a4e
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
A clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
Log Message:
-----------
[HLSL] Add RasterizerOrderedStructuredBuffer definition to HLSLExternalSemaSource (#113648)
Adds `RasterizerOrderedStructuredBuffer` definition to
HLSLExternalSemaSource. Adds separate tests for the AST shape and
element types. Adds constructor/handle.fromBinding and subscript test
cases to shared test file for structured buffers. Additional methods
will be added later.
Fixes #112776
Commit: aae5a38e4e5121e340541794404eb62f26e66bf0
https://github.com/llvm/llvm-project/commit/aae5a38e4e5121e340541794404eb62f26e66bf0
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Mark socket functions weak (#115088)
Downstream ther'es a user that needs the syscall wrappers to be weak. I
intend to set up a proper mechanism for just listing which functions
should be weak eventually, but for now this is necessary.
Commit: cb90d5b3ef463f0a471f9c6d39978c3764021dea
https://github.com/llvm/llvm-project/commit/cb90d5b3ef463f0a471f9c6d39978c3764021dea
Author: Evan Wilde <ewilde at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M cmake/Modules/CMakePolicy.cmake
Log Message:
-----------
[CMake] Enable CMP0156 if available (#115046)
Some linkers do not require that libraries are repeated on the command
line. The Apple linker emits warnings when duplicate libraries are
specified, resulting in a wall of warnings.
CMP0156 deduplicates libraries on the command line when the linker
doesn't require them.
This patch enables CMP0156 to quiet the warnings when using a version of
CMake that recognizes it (CMake 3.29 and newer).
Commit: 712c90e479f975f2e0c5ed4554dbf2f3a7a6d9d6
https://github.com/llvm/llvm-project/commit/712c90e479f975f2e0c5ed4554dbf2f3a7a6d9d6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_cvtsi64_sd
Commit: 6ccbf1da6c9225fddaf6911e7bb49ee011e845a6
https://github.com/llvm/llvm-project/commit/6ccbf1da6c9225fddaf6911e7bb49ee011e845a6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineSelect - use SelectableOp helper to match the zero operand as well as the target shuffle
For the "select(mask, extract_subvector(shuffle(x)), zero) --> extract_subvector(select(insert_subvector(mask), shuffle(x), zero))" fold, match the zero operand inside the SelectableOp helper.
Prep work for #113400 - we will be able to relax the zero operand requirement for some target shuffles.
Commit: ffc2233395f0b1a3a0c277d196bb0a0ccae84ab7
https://github.com/llvm/llvm-project/commit/ffc2233395f0b1a3a0c277d196bb0a0ccae84ab7
Author: Amara Emerson <amara at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
Log Message:
-----------
[AArch64][SVE2] Add pattern for constructive EXT instruction. (#115047)
rdar://137214338
Commit: 8c752900dda82115ebb8231e6d5ac703e703547e
https://github.com/llvm/llvm-project/commit/8c752900dda82115ebb8231e6d5ac703e703547e
Author: Gang Chen <gangc at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/Assembler/target-type-param-errors.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
A llvm/test/CodeGen/AMDGPU/s-barrier.ll
Log Message:
-----------
[AMDGPU] modify named barrier builtins and intrinsics (#114550)
Use a local pointer type to represent the named barrier in builtin and
intrinsic. This makes the definitions more user friendly
bacause they do not need to worry about the hardware ID assignment. Also
this approach is more like the other popular GPU programming language.
Named barriers should be represented as global variables of addrspace(3)
in LLVM-IR. Compiler assigns the special LDS offsets for those variables
during AMDGPULowerModuleLDS pass. Those addresses are converted to hw
barrier ID during instruction selection. The rest of the
instruction-selection changes are primarily due to the
intrinsic-definition changes.
Commit: cff2199e0f0e54177997ecf9571ba874231cefe4
https://github.com/llvm/llvm-project/commit/cff2199e0f0e54177997ecf9571ba874231cefe4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-narrow-binop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
Log Message:
-----------
Revert "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"
This reverts commit 999dfb2067eb75609b735944af876279025ac171.
I received a report that his may have increased fallbacks on AArch64.
Commit: b231647475b7fa78ad9382a5505889f1167e9cea
https://github.com/llvm/llvm-project/commit/b231647475b7fa78ad9382a5505889f1167e9cea
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A libclc/clc/include/clc/clc_as_type.h
M libclc/clc/include/clc/internal/clc.h
A libclc/clc/include/clc/relational/binary_decl.inc
A libclc/clc/include/clc/relational/clc_all.h
A libclc/clc/include/clc/relational/clc_any.h
A libclc/clc/include/clc/relational/clc_bitselect.h
A libclc/clc/include/clc/relational/clc_bitselect.inc
A libclc/clc/include/clc/relational/clc_isequal.h
A libclc/clc/include/clc/relational/clc_isfinite.h
A libclc/clc/include/clc/relational/clc_isgreater.h
A libclc/clc/include/clc/relational/clc_isgreaterequal.h
A libclc/clc/include/clc/relational/clc_isinf.h
A libclc/clc/include/clc/relational/clc_isless.h
A libclc/clc/include/clc/relational/clc_islessequal.h
A libclc/clc/include/clc/relational/clc_islessgreater.h
A libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/relational/clc_isnormal.h
A libclc/clc/include/clc/relational/clc_isnotequal.h
A libclc/clc/include/clc/relational/clc_isordered.h
A libclc/clc/include/clc/relational/clc_isunordered.h
A libclc/clc/include/clc/relational/clc_select.h
A libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_signbit.h
A libclc/clc/include/clc/relational/floatn.inc
A libclc/clc/include/clc/relational/relational.h
A libclc/clc/include/clc/relational/unary_decl.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/relational/clc_all.cl
A libclc/clc/lib/generic/relational/clc_any.cl
A libclc/clc/lib/generic/relational/clc_bitselect.cl
A libclc/clc/lib/generic/relational/clc_bitselect.inc
A libclc/clc/lib/generic/relational/clc_isequal.cl
A libclc/clc/lib/generic/relational/clc_isfinite.cl
A libclc/clc/lib/generic/relational/clc_isgreater.cl
A libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
A libclc/clc/lib/generic/relational/clc_isinf.cl
A libclc/clc/lib/generic/relational/clc_isless.cl
A libclc/clc/lib/generic/relational/clc_islessequal.cl
A libclc/clc/lib/generic/relational/clc_islessgreater.cl
A libclc/clc/lib/generic/relational/clc_isnan.cl
A libclc/clc/lib/generic/relational/clc_isnormal.cl
A libclc/clc/lib/generic/relational/clc_isnotequal.cl
A libclc/clc/lib/generic/relational/clc_isordered.cl
A libclc/clc/lib/generic/relational/clc_isunordered.cl
A libclc/clc/lib/generic/relational/clc_select.cl
A libclc/clc/lib/generic/relational/clc_select.inc
A libclc/clc/lib/generic/relational/clc_signbit.cl
M libclc/generic/include/clc/relational/any.h
R libclc/generic/include/clc/relational/binary_decl.inc
R libclc/generic/include/clc/relational/floatn.inc
R libclc/generic/include/clc/relational/unary_decl.inc
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/relational/all.cl
M libclc/generic/lib/relational/any.cl
A libclc/generic/lib/relational/binary_def.inc
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/isequal.cl
M libclc/generic/lib/relational/isfinite.cl
M libclc/generic/lib/relational/isgreater.cl
M libclc/generic/lib/relational/isgreaterequal.cl
M libclc/generic/lib/relational/isinf.cl
M libclc/generic/lib/relational/isless.cl
M libclc/generic/lib/relational/islessequal.cl
M libclc/generic/lib/relational/islessgreater.cl
M libclc/generic/lib/relational/isnan.cl
M libclc/generic/lib/relational/isnormal.cl
M libclc/generic/lib/relational/isnotequal.cl
M libclc/generic/lib/relational/isordered.cl
M libclc/generic/lib/relational/isunordered.cl
R libclc/generic/lib/relational/relational.h
M libclc/generic/lib/relational/signbit.cl
A libclc/generic/lib/relational/unary_def.inc
Log Message:
-----------
[libclc] Move relational functions to the CLC library (#115171)
The OpenCL relational functions now call their CLC counterparts, and the
CLC relational functions are defined identically to how the OpenCL
functions were defined.
As usual, clspv and spir-v targets bypass these.
No observable changes to any libclc target (measured with llvm-diff).
Commit: 381156c130553179fe3499403cf530deb73f1a3f
https://github.com/llvm/llvm-project/commit/381156c130553179fe3499403cf530deb73f1a3f
Author: Tex Riddell <texr at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/DirectX/atan2.ll
M llvm/test/CodeGen/DirectX/exp-vec.ll
M llvm/test/CodeGen/DirectX/log-vec.ll
M llvm/test/CodeGen/DirectX/step.ll
Log Message:
-----------
[HLSL] Update tests to use splat for vector constants (#115198)
Fixes test failures after splat IR printer change: 38fffa630ee8.
Commit: 768b0b4eb83e8ca62cc504ba3f0f9a0c46eea7b6
https://github.com/llvm/llvm-project/commit/768b0b4eb83e8ca62cc504ba3f0f9a0c46eea7b6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rv64-double-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-double-convert.ll
A llvm/test/CodeGen/RISCV/rv64-float-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-float-convert.ll
A llvm/test/CodeGen/RISCV/rv64-half-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-half-convert.ll
Log Message:
-----------
[RISCV] Add test cases for RV64 i128<->half/float/double (#115124)
These emit 'ti' libcalls.
Commit: 3ed4b0b0efca7a9467ce83fc62de9413da38006d
https://github.com/llvm/llvm-project/commit/3ed4b0b0efca7a9467ce83fc62de9413da38006d
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll
Log Message:
-----------
[NVPTX] Emit prmt selection value in hex (#115049)
Commit: a1be09a0f3278ab198ba27c5fb171192758d20db
https://github.com/llvm/llvm-project/commit/a1be09a0f3278ab198ba27c5fb171192758d20db
Author: Javed Absar <106147771+javedabsar1 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
Log Message:
-----------
[mlir][linalg] Fix isAllParallelLoops method implementation. (#115179)
Commit: e7bad34475e2fd72e8a9952ded4bfec68d2d0f5a
https://github.com/llvm/llvm-project/commit/e7bad34475e2fd72e8a9952ded4bfec68d2d0f5a
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/lib/fuzzer/CMakeLists.txt
M compiler-rt/lib/fuzzer/tests/CMakeLists.txt
M compiler-rt/lib/msan/tests/CMakeLists.txt
M compiler-rt/lib/tsan/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Use installed libc++(abi) for tests instead of build tree
Using the build tree is somewhat fragile since the layout is not
guaranteed to be stable and means the tests are tightly coupled to the
libc++/libc++abi build tree layout. Instead update the ExternalProject
to install the library and headers and do not add the build tree to
the include/linker flags.
Pull Request: https://github.com/llvm/llvm-project/pull/115077
Commit: a036d18f1a1b74fb8c13ea5bc4b02ce4fe40c997
https://github.com/llvm/llvm-project/commit/a036d18f1a1b74fb8c13ea5bc4b02ce4fe40c997
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
Log Message:
-----------
[compiler-rt] Reduce build output for tests
Use CMAKE_INSTALL_MESSAGE=LAZY to only print the local libc++(abi)
installation messages for changed files instead of all files.
Pull Request: https://github.com/llvm/llvm-project/pull/115085
Commit: 5be02d7a03c6d40d4d71264936d4aab98e4186aa
https://github.com/llvm/llvm-project/commit/5be02d7a03c6d40d4d71264936d4aab98e4186aa
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
M libcxxabi/include/CMakeLists.txt
Log Message:
-----------
[libc++abi] Stop copying headers to the build directory
This was needed before https://github.com/llvm/llvm-project/pull/115077
since the compiler-rt test build made assumptions about the build
layout of libc++ and libc++abi, but now they link against a local
installation of these libraries so we no longer need this workaround.
Reviewed By: ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/115086
Commit: ccf5d624f9a30911923b2cb3963cacb8076835d8
https://github.com/llvm/llvm-project/commit/ccf5d624f9a30911923b2cb3963cacb8076835d8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
Log Message:
-----------
[AMDGPU] Fix a warning
This patch fixes:
llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp:1031:17: error:
unused variable 'F' [-Werror,-Wunused-variable]
Commit: 375d1925dbd0c051fe2d4a86fe98ed08f4a502c5
https://github.com/llvm/llvm-project/commit/375d1925dbd0c051fe2d4a86fe98ed08f4a502c5
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll
Log Message:
-----------
Revert "[NVPTX] Emit prmt selection value in hex" (#115204)
Reverts llvm/llvm-project#115049
Commit: b57cbbcb6a6b8f7134848c52dce4b6f64c02d149
https://github.com/llvm/llvm-project/commit/b57cbbcb6a6b8f7134848c52dce4b6f64c02d149
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64-double-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64-float-convert.ll
Log Message:
-----------
[RISCV][GISel] Improve fptos/ui and s/uitofp handling and testing.
Replace clampScalar of the integer type with minScalar. We can't
narrow the integer type, we can only make it larger. If the type
is larger than xLen we need to use a 2*xlen libcall. If it's larger
than 2*xlen we can't handle it at all.
Commit: bcb64e13172c9b894be03ccefcf967e99949b32a
https://github.com/llvm/llvm-project/commit/bcb64e13172c9b894be03ccefcf967e99949b32a
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][serialization] Reduce `ASTWriter::WriteSourceManagerBlock()` scope
Commit: 0276621f8f5ae489fbe9343cb4cca07579a244a4
https://github.com/llvm/llvm-project/commit/0276621f8f5ae489fbe9343cb4cca07579a244a4
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][serialization] Reduce `ASTWriter::WriteControlBlock()` scope
Commit: e9bafa35d27042f8e1daa4ccf4a30bddf31878e8
https://github.com/llvm/llvm-project/commit/e9bafa35d27042f8e1daa4ccf4a30bddf31878e8
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/test/Dialect/Linalg/generalize-tensor-pack.mlir
Log Message:
-----------
[mlir][tensor] Generalize/restrict `GeneralizeOuterUnitDimsPackOpPattern` (#114315)
This PR *restricts* `GeneralizeOuterUnitDimsPackOpPattern` to follow its
intended purpose (as per the documentation), which is to:
> require all outer dimensions of tensor.pack to be 1.
There was one in-tree test that violated this assumption (and happened
to work) – see `@simple_KCRS_to_KRSCsr` in
"generalize-tensor-pack.mlir". That test has been updated to satisfy the
new requirements of the pattern.
By enforcing the pattern to follow its intended design (i.e., making it
stricter), the calculation of shapes and sizes for various Ops that the
pattern generates (PadOp, ExtractSliceOp, EmptyOp, TensorOp, and
InsertSliceOp) becomes much simpler and easier to document. This also
helped *generalize* the pattern to support cases like the one below:
```mlir
func.func @simple_pad_and_pack_dynamic_tile_cst(
%src: tensor<5x1xf32>,
%dest: tensor<1x1x?x2xf32>,
%pad: f32) -> tensor<1x1x?x2xf32> {
%tile_dim_0 = arith.constant 8 : index
%0 = tensor.pack %src
padding_value(%pad : f32)
inner_dims_pos = [0, 1]
inner_tiles = [%tile_dim_0, 2]
into %dest : tensor<5x1xf32> -> tensor<1x1x?x2xf32>
return %0 : tensor<1x1x?x2xf32>
}
```
Note that the inner tile slice is dynamic but compile-time constant.
`getPackOpSourceOrPaddedSource`, which is used to generate PadOp,
detects this and generates a PadOp with static shapes. This is a good
optimization, but it means that all shapes/sizes for Ops generated by
`GeneralizeOuterUnitDimsPackOpPattern` also need to be updated to be
constant/static. By restricting the pattern and simplifying the
size/shape calculation, supporting the case above becomes much easier.
Notable implementation changes:
* PadOp processes the original source (no change in dimensions/rank).
ExtractSliceOp extracts the tile to pack and may reduce the rank. All
following ops work on the tile extracted by ExtractSliceOp (possibly
rank-reduced).
* All shape/size calculations assume that trailing dimensions match
inner_tiles from tensor.pack. All leading dimensions (i.e., outer
dimensions) are assumed to be 1.
* Dynamic sizes for ops like ExtractSliceOp are taken from inner_tiles
rather than computed as, for example, tensor.dim %dest, 2. It’s the
responsibility of the "producers" of tensor.pack to ensure that
dimensions in %dest match the specified tile sizes.
Commit: 4a6d13bf4db63f4cd845d38128c79c17bbf8d99c
https://github.com/llvm/llvm-project/commit/4a6d13bf4db63f4cd845d38128c79c17bbf8d99c
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
Log Message:
-----------
Remove unused variable to fix '[AMDGPU] modify named barrier builtins and intrinsics (#114550)'
https://github.com/llvm/llvm-project/pull/114550 caused a buildbot breakage (https://lab.llvm.org/buildbot/#/builders/66/builds/5853) because of an unused variable. This patch attempts to fix forward:
/home/b/sanitizer-x86_64-linux/build/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp:106:24: error: variable 'TTy' set but not used [-Werror,-Wunused-but-set-variable]
106 | if (TargetExtType *TTy = AMDGPU::isNamedBarrier(GV)) {
| ^
Commit: 304c41217303ce613de8f4042e570ac6ca8757e8
https://github.com/llvm/llvm-project/commit/304c41217303ce613de8f4042e570ac6ca8757e8
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][serialization] Reduce `ASTWriter::writeUnhashedControlBlock()` scope
Commit: a878dc8fb37434c4b1897e28e72420f3fd043b3a
https://github.com/llvm/llvm-project/commit/a878dc8fb37434c4b1897e28e72420f3fd043b3a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/cuf03.cuf
Log Message:
-----------
[flang][cuda] Do not emit warning for SHARED variable in device subprogram (#115195)
SHARED attribute is explicitly meant to be used in device subprogram
(https://docs.nvidia.com/hpc-sdk/compilers/cuda-fortran-prog-guide/index.html#cfpg-var-qual-attr-shared).
Do not emit warning.
Commit: 5942a99f8b7dd361c35eb1c9c32b2475dce2c0b2
https://github.com/llvm/llvm-project/commit/5942a99f8b7dd361c35eb1c9c32b2475dce2c0b2
Author: vporpo <vporpodas at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec] Notify scheduler about new instructions (#115102)
This patch registers the "createInstr" callback that notifies the
scheduler about newly created instructions. This guarantees that all
newly created instructions have a corresponding DAG node associated with
them. Without this the pass crashes when the scheduler encounters the
newly created vector instructions.
This patch also changes the lifetime of the sandboxir Ctx variable in
the SandboxVectorizer pass. It needs to be destroyed after the passes
get destroyed. Without this change when components like the Scheduler
get destroyed Ctx will have already been freed, which is not legal.
Commit: ff533b94b7e503019e35fe58b9622b3f76265fcb
https://github.com/llvm/llvm-project/commit/ff533b94b7e503019e35fe58b9622b3f76265fcb
Author: Pranav Kant <prka at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add dep to BuiltinDialectTdFiles (#115217)
Commit: f85be26a67fa822806c9e5c4c26a4bf782898d5a
https://github.com/llvm/llvm-project/commit/f85be26a67fa822806c9e5c4c26a4bf782898d5a
Author: Gang Chen <gangc at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
Log Message:
-----------
[AMDGPU] fix build error unused-var (#115199)
Commit: 21ded66dba0adfd34250df93b5321709883f5e94
https://github.com/llvm/llvm-project/commit/21ded66dba0adfd34250df93b5321709883f5e94
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Add zexti8 ComplexPattern.
Commit: 87f4bc0acad65b1d20160d4160c7778b187125fc
https://github.com/llvm/llvm-project/commit/87f4bc0acad65b1d20160d4160c7778b187125fc
Author: Martin Storsjö <martin at martin.st>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
Log Message:
-----------
[compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (#115167)
Since b4130bee6bfd34d8045f02fc9f951bcb5db9d85c, we check for
_LIBCPP_HAS_THREAD_API_PTHREAD to decide between using
SetThreadDescription or pthread_setname_np for setting the thread name.
c6f3b7bcd0596d30f8dabecdfb9e44f9a07b6e4c changed how libcxx defines
their configuration macros - now they are always defined, but defined to
0 or 1, while they previously were either defined or undefined.
As these libcxx defines used to be defined to an empty string (rather
than expanding to 1) if enabled, we can't easily produce an expression
that works both with older and newer libcxx. Additionally, these defines
are libcxx internal config macros that aren't a detail that isn't
supported and isn't meant to be relied upon.
Simply skip trying to set thread name on MinGW as we can't easily know
which kind of thread native handle we have. Setting the thread name is
only a nice to have, quality of life improvement - things should work
the same even without it.
Additionally, libfuzzer isn't generally usable on MinGW targets yet
(Clang doesn't include it in the getSupportedSanitizers() method for the
MinGW target), so this shouldn't make any difference in practice anyway.
Commit: df0a56cdd9c77e5c10260f99f8afc313b20d6db1
https://github.com/llvm/llvm-project/commit/df0a56cdd9c77e5c10260f99f8afc313b20d6db1
Author: Pranav Kant <prka at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix AMXDialect (#115221)
Commit: a6637ae2cc9a0e7c9a37603b3d277d7ca642bc36
https://github.com/llvm/llvm-project/commit/a6637ae2cc9a0e7c9a37603b3d277d7ca642bc36
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][deps] Share `FileManager` between modules (#115065)
The `FileManager` sharing between module-building `CompilerInstance`s
was disabled a while ago due to `FileEntry::getName()` being unreliable.
Now that we use `FileEntryRef::getNameAsRequested()` in places where it
matters, re-enabling `FileManager` is sound and improves performance of
`clang-scan-deps` by ~6.2%.
Commit: 7ef7c0d036fb4f37e4a33932c4c0e40714b39fb4
https://github.com/llvm/llvm-project/commit/7ef7c0d036fb4f37e4a33932c4c0e40714b39fb4
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Refine vector division latencies in SiFive P600's scheduling model (#115038)
For both vector integer and floating point divisions.
Co-authored-by: Yeting Kuo <yeting.kuo at sifive.com>
Commit: d08772b1512f630240d8b7feaab749e659d3fce8
https://github.com/llvm/llvm-project/commit/d08772b1512f630240d8b7feaab749e659d3fce8
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
M libcxxabi/include/CMakeLists.txt
Log Message:
-----------
Revert "[libc++abi] Stop copying headers to the build directory" (#115232)
Reverts llvm/llvm-project#115086
2-stage sanitizer build is not happy:
https://lab.llvm.org/buildbot/#/builders/25/builds/3915
Commit: bd3a3959dc5b72ccbc83334132dece3f38957666
https://github.com/llvm/llvm-project/commit/bd3a3959dc5b72ccbc83334132dece3f38957666
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
Log Message:
-----------
[lldb] Fix deprecated defines in debugserver (XROS -> VISIONOS) (NFC)
Commit: f6617d65e496823c748236cdbe8e42bf4c8d8a55
https://github.com/llvm/llvm-project/commit/f6617d65e496823c748236cdbe8e42bf4c8d8a55
Author: Augusto Noronha <anoronha at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/test/Assembler/debug-info.ll
A llvm/test/DebugInfo/AArch64/num_extra_inhabitants.ll
M llvm/unittests/IR/DebugTypeODRUniquingTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[DebugInfo] Add num_extra_inhabitants to debug info (#112590)
An extra inhabitant is a bit pattern that does not represent a valid
value for instances of a given type. The number of extra inhabitants is
the number of those bit configurations.
This is used by Swift to save space when composing types. For example,
because Bool only needs 2 bit patterns to represent all of its values
(true and false), an Optional<Bool> only occupies 1 byte in memory by
using a bit configuration that is unused by Bool. Which bit patterns are
unused are part of the ABI of the language.
Since Swift generics are not monomorphized, by using dynamic libraries
you can have generic types whose size, alignment, etc, are known only
at runtime (which is why this feature is needed).
This patch adds num_extra_inhabitants to LLVM-IR debug info and in DWARF
as an Apple extension.
Commit: cacbe71af7b1075f8ad1f84e002d1fcc83e85713
https://github.com/llvm/llvm-project/commit/cacbe71af7b1075f8ad1f84e002d1fcc83e85713
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/include/llvm/Analysis/LastRunTrackingAnalysis.h
M llvm/include/llvm/Transforms/InstCombine/InstCombine.h
M llvm/lib/Analysis/CMakeLists.txt
A llvm/lib/Analysis/LastRunTrackingAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/Transforms/Coroutines/coro-retcon-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon.ll
M llvm/unittests/Analysis/CMakeLists.txt
A llvm/unittests/Analysis/LastRunTrackingAnalysisTest.cpp
M llvm/unittests/Target/X86/TernlogTest.cpp
Log Message:
-----------
[Analysis] Avoid running transform passes that have just been run (#112092)
This patch adds a new analysis pass to track a set of passes and their
parameters to see if we can avoid running transform passes that have
just been run. The current implementation only skips redundant
InstCombine runs. I will add support for other passes in follow-up
patches.
RFC link:
https://discourse.llvm.org/t/rfc-pipeline-avoid-running-transform-passes-that-have-just-been-run/82467
Compile time improvement:
http://llvm-compile-time-tracker.com/compare.php?from=76007138f4ffd4e0f510d12b5e8cad529c21f24d&to=64134cf07ea7eb39c60320087c0c5afdc16c3a2b&stat=instructions%3Au
Commit: bbc3af0577a05bf5c06f5c39d51b7d48bd63d65f
https://github.com/llvm/llvm-project/commit/bbc3af0577a05bf5c06f5c39d51b7d48bd63d65f
Author: Ryan Mansfield <ryan_mansfield at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/tools/dsymutil/dsymutil.cpp
Log Message:
-----------
[dsymutil] Add missing newlines in error messages. (#115191)
Errors like "cannot create bundle: Not a directory" or "error:
a.out.dSYM: Is a directory" were being emitted without a newline.
Commit: 84745da74c8aa2749510c26cf0e3a35bececfa30
https://github.com/llvm/llvm-project/commit/84745da74c8aa2749510c26cf0e3a35bececfa30
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/unittests/Analysis/LastRunTrackingAnalysisTest.cpp
Log Message:
-----------
[Analysis] Fix a warning (NFC)
This patch fixes:
third-party/unittest/googletest/include/gtest/gtest.h:1379:11:
error: comparison of integers of different signs: 'const unsigned
int' and 'const int' [-Werror,-Wsign-compare]
Commit: 5348a30a580c280ad71198fee78e270de36628e7
https://github.com/llvm/llvm-project/commit/5348a30a580c280ad71198fee78e270de36628e7
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/aarch32.h
Log Message:
-----------
[ExecutionEngine] Simplify code with DenseMap::operator[] (NFC) (#115115)
Commit: cbfe87c2537d3bb16cb131078bc1251f68046971
https://github.com/llvm/llvm-project/commit/cbfe87c2537d3bb16cb131078bc1251f68046971
Author: Konstantin Schwarz <konstantin.schwarz at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
M llvm/test/CodeGen/AArch64/neon-perm.ll
Log Message:
-----------
[GlobalISel] Remove references to rhs of shufflevector if rhs is undef (#115076)
Commit: 7c8287586690650ee8bca2282b2a20cc7dc40bde
https://github.com/llvm/llvm-project/commit/7c8287586690650ee8bca2282b2a20cc7dc40bde
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
Log Message:
-----------
[GISel][RISCV][AMDGPU] Add G_SHL, G_LSHR, G_ASHR to binop_left_to_zero. (#115089)
Shifting 0 by any amount is still zero.
Commit: 29a5c054e6d56a912ed5ba3f84e8ca631872db8b
https://github.com/llvm/llvm-project/commit/29a5c054e6d56a912ed5ba3f84e8ca631872db8b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
ValueTracking: Allow getUnderlyingObject to look at vectors (#114311)
We can identify some easy vector of pointer cases, such as
a getelementptr with a scalar base.
Commit: 30d80009e5012eba5f2e026375038e81932d84f6
https://github.com/llvm/llvm-project/commit/30d80009e5012eba5f2e026375038e81932d84f6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/include/flang/Common/Fortran.h
M flang/lib/Common/Fortran.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/cuf17.cuf
Log Message:
-----------
[flang][cuda] Allow SHARED actual to DEVICE dummy (#115215)
Update the compatibility rules to allow SHARED actual argument passed to
DEVICE dummy argument. Emit a warning in that case.
Commit: af5c471a4d9a9bff30b381d1fe2fe828672bb812
https://github.com/llvm/llvm-project/commit/af5c471a4d9a9bff30b381d1fe2fe828672bb812
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][Vector] Add vector.extract(vector.shuffle) folder (#115105)
This PR adds a folder for extracting an element from a vector shuffle.
It turns something like:
```
%shuffle = vector.shuffle %a, %b [0, 8, 7, 15]
: vector<8xf32>, vector<8xf32>
%extract = vector.extract %shuffle[3] : f32 from vector<4xf32>
```
into:
```
%extract = vector.extract %b[7] : f32 from vector<8xf32>
```
Commit: 7cb66772e23c2208bb920e826661af244790735f
https://github.com/llvm/llvm-project/commit/7cb66772e23c2208bb920e826661af244790735f
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
Log Message:
-----------
[RISCV] Rework fixed-length masked load/store tests. NFC
Pass in the mask and vector directly as arguments, and add tests for
zvfhmin and zvfbfmin.
Commit: 05f87b2d65a7049ff0f846151ada6c0bcbf154a8
https://github.com/llvm/llvm-project/commit/05f87b2d65a7049ff0f846151ada6c0bcbf154a8
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
Log Message:
-----------
[RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (#115145)
This is the same idea as #114945.
Commit: de18fa1ace1cd717da9482a09d0a0db8666f48b7
https://github.com/llvm/llvm-project/commit/de18fa1ace1cd717da9482a09d0a0db8666f48b7
Author: Richard Smith <richard at metafoo.co.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/Program.h
Log Message:
-----------
Don't redundantly specify the default template argument to `BumpPtrAllocatorImpl` (#114857)
Commit: 70bc12e77fe25cd933f8a9815646add6f1ea842f
https://github.com/llvm/llvm-project/commit/70bc12e77fe25cd933f8a9815646add6f1ea842f
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
Log Message:
-----------
[RISCV] Remove unnecessary scalar extensions from test. NFC
Now that f16 and bf16 aren't being scalarized we don't need
zfhmin/zfbfmin.
Commit: c6091cdbedd86cdab0a0d0f18569bf28e016ed9d
https://github.com/llvm/llvm-project/commit/c6091cdbedd86cdab0a0d0f18569bf28e016ed9d
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
Log Message:
-----------
[SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (#114965)
Commit: da032b7903da57eb87015369e5c4db521cb4dbac
https://github.com/llvm/llvm-project/commit/da032b7903da57eb87015369e5c4db521cb4dbac
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (#115244)
Commit: 3bdd71137eb6a54a3f8a45bdb33bfe15edc05f28
https://github.com/llvm/llvm-project/commit/3bdd71137eb6a54a3f8a45bdb33bfe15edc05f28
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/select-bitcast-bigendian.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[TableGen][GISel] Extract helper function for constraining operands (#115148)
As a side effect, this fixes COPY_TO_REGCLASS not being constrained
if it is not top-level (the reason for changes in tests).
Commit: 481ff22b8b81bb5e2d40101b36eca3e90a7d1a5d
https://github.com/llvm/llvm-project/commit/481ff22b8b81bb5e2d40101b36eca3e90a7d1a5d
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
Log Message:
-----------
[RISCV] Lower fixed-length vp_{gather,scatter} for zvfhmin/zvfbfmin (#115253)
This uses the same lowering as masked gathers and scatters.
Commit: f0e2301b7c3f2576a4fbc53441e9378b966e21ef
https://github.com/llvm/llvm-project/commit/f0e2301b7c3f2576a4fbc53441e9378b966e21ef
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
Log Message:
-----------
[RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal interleaved access (#115257)
This is another piece split off from the work to add zvfhmin/zvfbfmin to
isLegalElementTypeForRVV.
This is needed to get InterleavedAccessPass to lower [de]interleaves to
segment load/stores.
Commit: ae6dbed5943d76c61fe95107c15a46f915180772
https://github.com/llvm/llvm-project/commit/ae6dbed5943d76c61fe95107c15a46f915180772
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/idot4s.ll
Log Message:
-----------
[AMDGPU] Use correct DWord for v_dot4 S0 operand (#115224)
Fixes a copy-paste typo.
The typo resulted in producing bad v_perm based operands for the v_dot4
combine. When adding a corresponding byte pair to the v_dot byte pair
chains, we must take note of the byte position in the corresponding
source nodes. These byte positions are used to ensure we extract the
correct DWord from the ultimate source, and formulate a correct
perm_mask from the extracted DWord.
With the typo, we the S0 byte would used the DWord offset for the
corresponding S1 byte. If this offset was not the same as the true DWord
offset for the S0 byte, we would extract and use the wrong byte for S0
in the v_dot.
Fixes https://github.com/llvm/llvm-project/issues/112941
Commit: f7ef7b2ff700360c90d568622e3efd563d9eff05
https://github.com/llvm/llvm-project/commit/f7ef7b2ff700360c90d568622e3efd563d9eff05
Author: vporpo <vporpodas at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Implement rescheduling (#115220)
This patch adds support for re-scheduling already scheduled
instructions. For now this will clear and rebuild the DAG, and will
reschedule the code using the new DAG.
Commit: 63c6fe4a0b18d5eaa50c002185cd270f20cf131b
https://github.com/llvm/llvm-project/commit/63c6fe4a0b18d5eaa50c002185cd270f20cf131b
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace fatal(...) with Fatal or Err
Commit: 09c2c5e1e9f3b3bb17f777f153407430f3cef15e
https://github.com/llvm/llvm-project/commit/09c2c5e1e9f3b3bb17f777f153407430f3cef15e
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/MSP430.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/CallGraphSort.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MapFile.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace error(...) with ErrAlways or Err
Most are migrated to ErrAlways mechanically.
In the future we should change most to Err.
Commit: f8bae3af74e7c60d996f0d331cad04f2eace7f8f
https://github.com/llvm/llvm-project/commit/f8bae3af74e7c60d996f0d331cad04f2eace7f8f
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace warn(...) with Warn
Commit: 9b058bb42d49afb61b07a7eeeea1ad3d1407f1c9
https://github.com/llvm/llvm-project/commit/9b058bb42d49afb61b07a7eeeea1ad3d1407f1c9
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace errorOrWarn(...) with Err
Commit: 343a810725f27bfe92fbd04a42d42aa9caaee7a6
https://github.com/llvm/llvm-project/commit/343a810725f27bfe92fbd04a42d42aa9caaee7a6
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-vectorized.ll
Log Message:
-----------
[RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal strided access (#115264)
This is also split off from the zvfhmin/zvfbfmin
isLegalElementTypeForRVV work.
Enabling this will cause SLP and RISCVGatherScatterLowering to emit
@llvm.experimental.vp.strided.{load,store} intrinsics, and codegen
support for this was added in #109387 and #114750.
Commit: 9f796159f28775b3f93d77e173c1fd3413c2e60e
https://github.com/llvm/llvm-project/commit/9f796159f28775b3f93d77e173c1fd3413c2e60e
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/STLFunctionalExtras.h
Log Message:
-----------
Add clang::lifetimebound annotation to llvm::function_ref (#115019)
This helps catch dangling llvm::function_ref references, see #114950,
#114949, #114808, #114789
Commit: adb0d8ddceb143749c519d14b8b31b481071da77
https://github.com/llvm/llvm-project/commit/adb0d8ddceb143749c519d14b8b31b481071da77
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
Log Message:
-----------
[Clang] Distinguish expanding-pack-in-place cases for SubstTemplateTypeParmTypes (#114220)
In 50e5411e4, we preserved the pack substitution index within
SubstTemplateTypeParmType nodes and performed in-place expansions of
packs such that type constraints on a lambda that serve as a pattern of
a fold expression could be evaluated if the type constraints contain any
packs that are expanded by the fold expression.
However, we made an incorrect assumption of the condition under which
in-place expansion should occur. For example, a SizeOfPackExpr case
relies on SubstTemplateTypeParmType nodes being transformed to
SubstTemplateTypeParmPackTypes rather than expanding them immediately in
place.
This fixes that by adding a flag to SubstTemplateTypeParmType to
discriminate such in-place expansion situations.
Fixes https://github.com/llvm/llvm-project/issues/113518
Commit: 3850801ca57575640a6ad3a5a421a416dc5c6f12
https://github.com/llvm/llvm-project/commit/3850801ca57575640a6ad3a5a421a416dc5c6f12
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
Log Message:
-----------
[RISCV] Add vcpop.m/vfirst.m to RISCVMaskedPseudosTable
We seem to forget these two instructions.
Reviewers: preames, frasercrmck, lukel97, topperc
Reviewed By: lukel97
Pull Request: https://github.com/llvm/llvm-project/pull/115162
Commit: 0b9f1cc024ca6c7e8d60524be07c0ddfcd08b23c
https://github.com/llvm/llvm-project/commit/0b9f1cc024ca6c7e8d60524be07c0ddfcd08b23c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll
M llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
A llvm/test/Transforms/LoopUnroll/pr114879.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M polly/test/CodeGen/OpenMP/floord-as-argument-to-subfunction.ll
M polly/test/CodeGen/inner_scev_sdiv_2.ll
M polly/test/CodeGen/inner_scev_sdiv_3.ll
M polly/test/CodeGen/non-affine-phi-node-expansion.ll
M polly/test/CodeGen/phi-defined-before-scop.ll
M polly/test/CodeGen/scop_expander_insert_point.ll
M polly/test/CodeGen/stack-overflow-in-load-hoisting.ll
M polly/test/ScopInfo/complex_domain_binary_condition.ll
M polly/test/ScopInfo/scev-div-with-evaluatable-divisor.ll
Log Message:
-----------
[SCEV] Disallow simplifying phi(undef, X) to X (#115109)
See the following case:
```
@GlobIntONE = global i32 0, align 4
define ptr @src() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel: ; preds = %for.body.peel.begin
br i1 true, label %cleanup.peel, label %cleanup.loopexit.peel
cleanup.loopexit.peel: ; preds = %for.body.peel
br label %cleanup.peel
cleanup.peel: ; preds = %cleanup.loopexit.peel, %for.body.peel
%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE, %cleanup.loopexit.peel ]
br i1 true, label %for.body.peel.next, label %cleanup7
for.body.peel.next: ; preds = %cleanup.peel
br label %for.body.peel.next1
for.body.peel.next1: ; preds = %for.body.peel.next
br label %entry.peel.newph
entry.peel.newph: ; preds = %for.body.peel.next1
br label %for.body
for.body: ; preds = %cleanup, %entry.peel.newph
%retval.0 = phi ptr [ %retval.2.peel, %entry.peel.newph ], [ %retval.2, %cleanup ]
br i1 false, label %cleanup, label %cleanup.loopexit
cleanup.loopexit: ; preds = %for.body
br label %cleanup
cleanup: ; preds = %cleanup.loopexit, %for.body
%retval.2 = phi ptr [ %retval.0, %for.body ], [ @GlobIntONE, %cleanup.loopexit ]
br i1 false, label %for.body, label %cleanup7.loopexit
cleanup7.loopexit: ; preds = %cleanup
%retval.2.lcssa.ph = phi ptr [ %retval.2, %cleanup ]
br label %cleanup7
cleanup7: ; preds = %cleanup7.loopexit, %cleanup.peel
%retval.2.lcssa = phi ptr [ %retval.2.peel, %cleanup.peel ], [ %retval.2.lcssa.ph, %cleanup7.loopexit ]
ret ptr %retval.2.lcssa
}
define ptr @tgt() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel: ; preds = %for.body.peel.begin
br i1 true, label %cleanup.peel, label %cleanup.loopexit.peel
cleanup.loopexit.peel: ; preds = %for.body.peel
br label %cleanup.peel
cleanup.peel: ; preds = %cleanup.loopexit.peel, %for.body.peel
%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE, %cleanup.loopexit.peel ]
br i1 true, label %for.body.peel.next, label %cleanup7
for.body.peel.next: ; preds = %cleanup.peel
br label %for.body.peel.next1
for.body.peel.next1: ; preds = %for.body.peel.next
br label %entry.peel.newph
entry.peel.newph: ; preds = %for.body.peel.next1
br label %for.body
for.body: ; preds = %cleanup, %entry.peel.newph
br i1 false, label %cleanup, label %cleanup.loopexit
cleanup.loopexit: ; preds = %for.body
br label %cleanup
cleanup: ; preds = %cleanup.loopexit, %for.body
br i1 false, label %for.body, label %cleanup7.loopexit
cleanup7.loopexit: ; preds = %cleanup
%retval.2.lcssa.ph = phi ptr [ %retval.2.peel, %cleanup ]
br label %cleanup7
cleanup7: ; preds = %cleanup7.loopexit, %cleanup.peel
%retval.2.lcssa = phi ptr [ %retval.2.peel, %cleanup.peel ], [ %retval.2.lcssa.ph, %cleanup7.loopexit ]
ret ptr %retval.2.lcssa
}
```
1. `simplifyInstruction(%retval.2.peel)` returns `@GlobIntONE`. Thus,
`ScalarEvolution::createNodeForPHI` returns SCEV expr `@GlobIntONE` for
`%retval.2.peel`.
2. `SimplifyIndvar::replaceIVUserWithLoopInvariant` tries to replace the
use of `%retval.2.peel` in `%retval.2.lcssa.ph` with `@GlobIntONE`.
3. `simplifyLoopAfterUnroll -> simplifyLoopIVs -> SCEVExpander::expand`
reuses `%retval.2.peel = phi ptr [ undef, %for.body.peel ], [
@GlobIntONE, %cleanup.loopexit.peel ]` to generate code for
`@GlobIntONE`. It is incorrect.
This patch disallows simplifying `phi(undef, X)` to `X` by setting
`CanUseUndef` to false.
Closes https://github.com/llvm/llvm-project/issues/114879.
Commit: ae5bfa0cef0873d30e7dd5cb20ff4437b244203e
https://github.com/llvm/llvm-project/commit/ae5bfa0cef0873d30e7dd5cb20ff4437b244203e
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
Log Message:
-----------
[clang] Output an error when [[lifetimebound]] attribute is applied on a function implicit object parameter while the function returns void (#114203)
Fixes: https://github.com/llvm/llvm-project/issues/107556
Commit: 1469d82e1cb3edc939d6b93089046edfef0cf36c
https://github.com/llvm/llvm-project/commit/1469d82e1cb3edc939d6b93089046edfef0cf36c
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/Analysis/BasicAA/phi-values-usage.ll
M llvm/test/Analysis/BasicAA/underlying-value.ll
M llvm/test/Analysis/BlockFrequencyInfo/irreducible_loop_crash.ll
M llvm/test/Analysis/BranchProbabilityInfo/deopt-invoke.ll
M llvm/test/Analysis/BranchProbabilityInfo/loop.ll
M llvm/test/Analysis/BranchProbabilityInfo/unreachable.ll
M llvm/test/Analysis/CostModel/SystemZ/intrinsic-cost-crash.ll
M llvm/test/Analysis/CycleInfo/basic.ll
M llvm/test/Analysis/CycleInfo/unreachable-predecessor.ll
M llvm/test/Analysis/Delinearization/type_mismatch.ll
M llvm/test/Analysis/Delinearization/undef.ll
M llvm/test/Analysis/DependenceAnalysis/MIVCheckConst.ll
M llvm/test/Analysis/DependenceAnalysis/NonAffineExpr.ll
M llvm/test/Analysis/Dominators/basic.ll
M llvm/test/Analysis/Dominators/print-dot-dom.ll
M llvm/test/Analysis/MemoryDependenceAnalysis/invariant.group-bug.ll
M llvm/test/Analysis/MemorySSA/cyclicphi.ll
M llvm/test/Analysis/MemorySSA/debugvalue.ll
M llvm/test/Analysis/MemorySSA/debugvalue2.ll
M llvm/test/Analysis/MemorySSA/forward-unreachable.ll
M llvm/test/Analysis/MemorySSA/function-clobber.ll
M llvm/test/Analysis/MemorySSA/invariant-groups.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-disablebasicaa.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-simplified-clone.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-valuemap.ll
M llvm/test/Analysis/MemorySSA/phi-translation.ll
M llvm/test/Analysis/MemorySSA/pr28880.ll
M llvm/test/Analysis/MemorySSA/pr40749_2.ll
M llvm/test/Analysis/MemorySSA/pr41640.ll
M llvm/test/Analysis/MemorySSA/pr41853.ll
M llvm/test/Analysis/MemorySSA/pr42940.ll
M llvm/test/Analysis/MemorySSA/pr43317.ll
M llvm/test/Analysis/MemorySSA/pr43320.ll
M llvm/test/Analysis/MemorySSA/pr43427.ll
M llvm/test/Analysis/MemorySSA/pr43438.ll
M llvm/test/Analysis/MemorySSA/pr43493.ll
M llvm/test/Analysis/MemorySSA/pr43541.ll
M llvm/test/Analysis/MemorySSA/pr43641.ll
M llvm/test/Analysis/MemorySSA/pr45976.ll
M llvm/test/Analysis/MemorySSA/reduce_clobber_limit.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/MemorySSA/unreachable.ll
M llvm/test/Analysis/MemorySSA/update_unroll.ll
M llvm/test/Analysis/PhiValues/basic.ll
M llvm/test/Analysis/PhiValues/long_phi_chain.ll
M llvm/test/Analysis/PostDominators/pr6047_a.ll
M llvm/test/Analysis/PostDominators/pr6047_b.ll
M llvm/test/Analysis/PostDominators/pr6047_c.ll
M llvm/test/Analysis/PostDominators/pr6047_d.ll
M llvm/test/Analysis/ScalarEvolution/2011-04-26-FoldAddRec.ll
M llvm/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll
M llvm/test/Analysis/ScalarEvolution/avoid-infinite-recursion-0.ll
M llvm/test/Analysis/ScalarEvolution/avoid-infinite-recursion-1.ll
M llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
M llvm/test/Analysis/ScalarEvolution/expander-replace-congruent-ivs.ll
M llvm/test/Analysis/ScalarEvolution/how-far-to-zero.ll
M llvm/test/Analysis/ScalarEvolution/overflow-intrinsics-trip-count.ll
M llvm/test/Analysis/ScalarEvolution/pointer-sign-bits.ll
M llvm/test/Analysis/ScalarEvolution/pr22674.ll
M llvm/test/Analysis/ScalarEvolution/pr22856.ll
M llvm/test/Analysis/ScalarEvolution/pr25369.ll
M llvm/test/Analysis/ScalarEvolution/scev-aa.ll
M llvm/test/Analysis/ScalarEvolution/scev-canonical-mode.ll
M llvm/test/Analysis/ScalarEvolution/scev-invalid.ll
M llvm/test/Analysis/ScalarEvolution/shift-recurrences.ll
M llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
M llvm/test/Assembler/atomicrmw.ll
M llvm/test/Assembler/convergence-control.ll
M llvm/test/Bitcode/convergence-control.ll
M llvm/test/DebugInfo/ARM/illegal-fragment.ll
M llvm/test/DebugInfo/ARM/machine-cp-updates-dbg-reg.mir
M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
M llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
M llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
M llvm/test/DebugInfo/X86/dbg-value-terminator.ll
M llvm/test/DebugInfo/X86/deleted-bit-piece.ll
M llvm/test/DebugInfo/X86/earlydup-crash.ll
M llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
M llvm/test/DebugInfo/X86/mem2reg_fp80.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg2-dead-block-order.ll
M llvm/test/Other/loop-pass-ordering.ll
M llvm/test/Other/loopnest-pass-ordering.ll
M llvm/test/Other/opt-bisect-new-pass-manager.ll
M llvm/test/SafepointIRVerifier/from-same-relocation-in-phi-nodes.ll
M llvm/test/SafepointIRVerifier/unrecorded-live-at-sp.ll
M llvm/test/SafepointIRVerifier/uses-in-phi-nodes.ll
M llvm/test/Verifier/tbaa-cyclic.ll
M llvm/test/tools/llvm-reduce/operands-skip.ll
Log Message:
-----------
Remove `br i1 undef` from some regression tests [NFC] (#115130)
As defined in LangRef, branching on `undef` is undefined behavior.
This PR aims to remove undefined behavior from tests. As UB tests break
Alive2 and may be the root cause of breaking future optimizations.
Here's an Alive2 proof for one of the examples:
https://alive2.llvm.org/ce/z/TncxhP
Commit: 9b909b8886e35cf5816f660092a2337f779e3e3d
https://github.com/llvm/llvm-project/commit/9b909b8886e35cf5816f660092a2337f779e3e3d
Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
Log Message:
-----------
[AMDGPU][NFC] Precommit tests representing agpr spills. (#115270)
Presently we are only marking implicit-def for the
spilled AGPR tuple in the first spill instructions
and not implicit.
Commit: 5f342816efe1854333f2be41a03fdd25fa0db433
https://github.com/llvm/llvm-project/commit/5f342816efe1854333f2be41a03fdd25fa0db433
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
A llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
Log Message:
-----------
[llvm] Use computeConstantRange to improve llvm.objectsize computation (#114673)
Using LazyValueInfo, it is possible to compute valuable information for
allocation functions, GEP and alloca, even in the presence of dynamic
information.
llvm.objectsize plays an important role in _FORTIFY_SOURCE definitions,
so improving its diagnostic in turns improves the security of compiled
application.
As a side note, as a result of recent optimization improvements, clang
no longer passes
https://github.com/serge-sans-paille/builtin_object_size-test-suite This
commit restores the situation and greatly improves the scope of code
handled by the static version of __builtin_object_size.
Commit: d2aff182d379c9b84cebe0fdf58907f4de768f1e
https://github.com/llvm/llvm-project/commit/d2aff182d379c9b84cebe0fdf58907f4de768f1e
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/Transforms/Scalar.h
R llvm/include/llvm/Transforms/Scalar/TLSVariableHoist.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/CMakeLists.txt
M llvm/lib/Transforms/Scalar/Scalar.cpp
R llvm/lib/Transforms/Scalar/TLSVariableHoist.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
R llvm/test/CodeGen/X86/tls-loads-control.ll
R llvm/test/CodeGen/X86/tls-loads-control2.ll
R llvm/test/CodeGen/X86/tls-loads-control3.ll
M llvm/tools/llc/llc.cpp
Log Message:
-----------
Revert "TLS loads opimization (hoist)" (#114740)
This reverts commit c31014322c0b5ae596da129cbb844fb2198b4ef4.
Based on the discussions in #112772, this pass is not needed after the
introduction of `llvm.threadlocal.address` intrinsic.
Fixes https://github.com/llvm/llvm-project/issues/112771.
Commit: 2d7f34f2a5df9396a33a0ea044cfe3ddf33e1f5c
https://github.com/llvm/llvm-project/commit/2d7f34f2a5df9396a33a0ea044cfe3ddf33e1f5c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Don't special case depth for phi of select (#114996)
As discussed on
https://github.com/llvm/llvm-project/pull/114689#pullrequestreview-2411822612
and following, there is no principled reason why the phi of select case
should have a different recursion limit than the general case. There may
still be fan-out, and there may still be indirect recursion. Revert that
part of #113707.
Commit: 1b01064faad2cd93c516341cfaf047b7a0f8da42
https://github.com/llvm/llvm-project/commit/1b01064faad2cd93c516341cfaf047b7a0f8da42
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
Log Message:
-----------
[NVPTX] Add TMA bulk tensor copy intrinsics (#96083)
This patch adds NVVM intrinsics and NVPTX codegen for:
* cp.async.bulk.tensor.S2G.1D -> 5D variants, supporting both Tile and
Im2Col modes. These intrinsics optionally support cache_hints as
indicated by the boolean flag argument.
* cp.async.bulk.tensor.G2S.1D -> 5D variants, with support for both Tile
and Im2Col modes. The Im2Col variants have an extra set of offsets as
parameters. These intrinsics optionally support multicast and cache_hints,
as indicated by the boolean arguments at the end of the intrinsics.
* The backend looks through these flag arguments and lowers to the
appropriate PTX instruction.
* Lit tests are added for all combinations of these intrinsics in
cp-async-bulk-tensor-g2s/s2g.ll.
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst file.
* PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async-bulk-tensor
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: f9fecab1fd4e2aec74b864b1ee81679b14f13f5c
https://github.com/llvm/llvm-project/commit/f9fecab1fd4e2aec74b864b1ee81679b14f13f5c
Author: simpal01 <simi.pallipurath at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/print-multi-selection-flags.c
Log Message:
-----------
Add -mno-unaligned-access and -mbig-endian to ARM and AArch64 multilib flags (#114782)
This adds -mno-unaligned-access and -mbig-endian command line
options to the set of flags used by the multilib selection for ARM and
AArch64 targets.
Commit: 490e58a98e0518542c87aa16e326fcb446d7b1cc
https://github.com/llvm/llvm-project/commit/490e58a98e0518542c87aa16e326fcb446d7b1cc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
Log Message:
-----------
Fix MSVC "not all control paths return a value" warning. NFC
Commit: 6720ce75f61a306a3ed26b2205f09a7099e978e7
https://github.com/llvm/llvm-project/commit/6720ce75f61a306a3ed26b2205f09a7099e978e7
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-exegesis.rst
M llvm/tools/llvm-exegesis/README.md
Log Message:
-----------
[Docs][llvm-exegesis] Clarify AArch64 support (#114989)
Claiming AArch64 support for llvm-exegesis is a bit of a stretch in my
opinion as only a couple of opcodes with GPR64 operands will work for
snippet benchmarking, so I propose to clarify that AArch64 support is
very experimental. Also added some clarifications about its libpfm4
dependency.
Commit: 0c0d7a6ec7ece55d4516d7b902d488b42c850e16
https://github.com/llvm/llvm-project/commit/0c0d7a6ec7ece55d4516d7b902d488b42c850e16
Author: JoelWee <32009741+JoelWee at users.noreply.github.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR] Fix bazel after 2f743ac
Commit: 1361c19c04d0b3d9156fe0c5393d158cf69c14e7
https://github.com/llvm/llvm-project/commit/1361c19c04d0b3d9156fe0c5393d158cf69c14e7
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
M lldb/test/API/lang/cpp/const_static_integral_member/main.cpp
Log Message:
-----------
[lldb] Index static const members of classes, structs and unions as global variables in DWARF 4 and earlier (#111859)
In DWARF 4 and earlier `static const` members of structs, classes and
unions have an entry tag `DW_TAG_member`, and are also tagged as
`DW_AT_declaration`, but otherwise follow the same rules as
`DW_TAG_variable`.
Commit: dd98ae358b187be32a2e255eba5f91568524b86a
https://github.com/llvm/llvm-project/commit/dd98ae358b187be32a2e255eba5f91568524b86a
Author: JaydeepChauhan14 <167076022+JaydeepChauhan14 at users.noreply.github.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
A llvm/test/TableGen/x86-instr-mapping.inc
A llvm/test/TableGen/x86-instr-mapping.td
Log Message:
-----------
Test added for x86-instr-mapping (#115170)
Commit: 9f02950a1589ebfc542f4f5a2475c2cc03e4e2e9
https://github.com/llvm/llvm-project/commit/9f02950a1589ebfc542f4f5a2475c2cc03e4e2e9
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
A llvm/test/CodeGen/Thumb2/mve-vadc-vsbc-spill.ll
Log Message:
-----------
[ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (#115174)
The MVE VADC and VSBC instructions read and write a carry bit in FPSCR,
which is exposed through the intrinsics. This makes it possible to write
code which has the FPSCR live across a function call, or which uses the
same value twice, so it needs to be possible to spill and reload it.
There is a missed optimisation in one of the test cases, where we reload
the FPSCR from the stack despite it still being live, I've not found a
simple way to prevent the register allocator from doing this.
Commit: 4fa1e8f970235918da8e7c467cdcd227c2f87536
https://github.com/llvm/llvm-project/commit/4fa1e8f970235918da8e7c467cdcd227c2f87536
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/tools/gold/X86/opt-level.ll
Log Message:
-----------
[gold] Fix test after pipeline change
After fbd89bcc6647ed611e579d8f9c38c97b8e6f7936 we're not running
FunctionAttrs at O1, so adjust the test expectation accordingly.
Commit: f43ef53dd20b83ea0db6fdba69025c9a76a1de08
https://github.com/llvm/llvm-project/commit/f43ef53dd20b83ea0db6fdba69025c9a76a1de08
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/Transforms/Mem2Reg/UndefValuesMerge.ll
Log Message:
-----------
[Mem2Reg] Regenerate test checks (NFC)
Switch to FileCheck and use UTC.
Commit: d87dbcbf137ab1c6b6c2db1fd3fe7d91a3142fa1
https://github.com/llvm/llvm-project/commit/d87dbcbf137ab1c6b6c2db1fd3fe7d91a3142fa1
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.td
Log Message:
-----------
[LoongArch] Reuse GPRRegisterClass to shorten some code in LoongArchRegisterInfo.td. NFC
Commit: abe0cd4621ccee26196ceb7506e908d4134f630e
https://github.com/llvm/llvm-project/commit/abe0cd4621ccee26196ceb7506e908d4134f630e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll
Log Message:
-----------
ValueTracking: pre-commit udiv/urem recurrence tests (#109198)
Commit: fef6613e9fc05bca8e315c65e8f8da796860a3cf
https://github.com/llvm/llvm-project/commit/fef6613e9fc05bca8e315c65e8f8da796860a3cf
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll
Log Message:
-----------
ValueTracking: simplify udiv/urem recurrences (#108973)
A urem recurrence has the property that the result can never exceed the
start value. A udiv recurrence has the property that the result can
never exceed either the start value or the numerator, whichever is
greater. Implement a simplification based on these properties.
Commit: dafbc97594c26da67e34ba0301a6126419ae4604
https://github.com/llvm/llvm-project/commit/dafbc97594c26da67e34ba0301a6126419ae4604
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/test/COFF/arm64ec-altnames.s
M lld/test/COFF/arm64ec-codemap.test
M lld/test/COFF/arm64ec-delayimport.test
M lld/test/COFF/arm64ec-export-thunks.test
M lld/test/COFF/arm64ec-import.test
M lld/test/COFF/arm64ec-lib.test
M lld/test/COFF/arm64ec-loadcfg.s
M lld/test/COFF/arm64ec-range-thunks.s
M lld/test/COFF/locally-imported-arm64ec.test
Log Message:
-----------
[LLD][COFF] Append a terminator entry to redirection metadata (#115202)
For MSVC compatibility.
Commit: 9470945b6695cf526df9249c3787d225f95eaf03
https://github.com/llvm/llvm-project/commit/9470945b6695cf526df9249c3787d225f95eaf03
Author: Valery Pykhtin <valery.pykhtin at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/CalcSpillWeights.cpp
Log Message:
-----------
[CalcSpillWeights] Simplify copy hint register collection. NFC. (#114236)
CopyHints set has been collecting duplicates of a register with
increasing weight and then deduplicated with HintedRegs set. Let's stop
collecting duplicates at the first place.
Commit: 3d0b283dcd6d9fbe41618fd476c14bc00b62b3e5
https://github.com/llvm/llvm-project/commit/3d0b283dcd6d9fbe41618fd476c14bc00b62b3e5
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseStmt.cpp
A clang/test/C/C2y/n3370.c
M clang/test/Sema/gnu-flags.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Add test coverage for WG14 N3370 (#115054)
This paper added case ranges in switch statements, which is a GNU
extension Clang has supported since at least Clang 3.0.
It updates the diagnostics to no longer call this a GNU extension except
in C++ mode.
Commit: 16cd5cdf4d6387e34d2bb723bc26c331c8d89d75
https://github.com/llvm/llvm-project/commit/16cd5cdf4d6387e34d2bb723bc26c331c8d89d75
Author: Jacob Bramley <jacob.bramley at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/Inputs/spurious-marker-symbol.yaml
A bolt/test/AArch64/spurious-marker-symbol.test
M llvm/include/llvm/Object/ObjectFile.h
Log Message:
-----------
[BOLT] Ignore AArch64 markers outside their sections. (#74106)
AArch64 uses $d and $x symbols to delimit data embedded in code.
However, sometimes we see $d symbols, typically in .eh_frame, with
addresses that belong to different sections. These occasionally fall
inside .text functions and cause BOLT to stop disassembling, which in
turn causes DWARF CFA processing to fail.
As a workaround, we just ignore symbols with addresses outside the
section they belong to. This behaviour is consistent with objdump and
similar tools.
Commit: e40a31b7baef8c39b9e03ebf94ddfefdba52601e
https://github.com/llvm/llvm-project/commit/e40a31b7baef8c39b9e03ebf94ddfefdba52601e
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/TraversalChecker.cpp
R clang/test/Analysis/traversal-algorithm.mm
Log Message:
-----------
[analyzer][NFC] Remove check::BranchCondition from debug.DumpTraversal (#113906)
This commit removes the `check::BranchCondition` callback of the debug
checker `debug.DumpTraversal` (in `TraversalChecker.cpp`) and the single
broken testcase that was referring to it.
The testcase `traversal-algorithm.mm` was added in 2012 to verify that
we're using DFS traversal -- however it failed to detect that we're no
longer using DFS traversal and in fact it continues to pass even if I
remove large random portions of its code.
This change was motivated by the plan discussed at
https://discourse.llvm.org/t/fixing-or-removing-check-branchcondition/82738
I also added some TODO notes to mark the rest of `TraversalChecker.cpp`
for removal in follow-up commits.
Commit: b358f218a114c1495cfb356b1b95c866c32f72c4
https://github.com/llvm/llvm-project/commit/b358f218a114c1495cfb356b1b95c866c32f72c4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
Log Message:
-----------
[X86] visitSelect - widen select(cond,extract_subvector(shuffle(vec0)),vec1) if it will create a mask instruction (#115223)
This patch extends the existing fold "select(mask, extract_subvector(shuffle(x)), zero) --> extract_subvector(select(insert_subvector(mask), shuffle(x), zero))", to also handle the non-zero case.
I've put in a restriction for VPERMV3 3 vector operands shuffles to only work with the zero select as in most circumstances we are not selecting with either of the source vectors (the only case the mask instructions match).
We should be able to generalize this in the future to work with other maskable instructions, but this is a good initial improvement.
Fixes #113400
Commit: 8269c400b430e4beb9fdb51b94dbc79b84c37f70
https://github.com/llvm/llvm-project/commit/8269c400b430e4beb9fdb51b94dbc79b84c37f70
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[mlir][OpenMP][NFC] delayed privatisation cleanup (#115298)
Upstreaming some code cleanups ahead of supporting delayed task
execution.
- Make allocatePrivateVars not need to be a template (it will need to
operate separately on firstprivate and private variables for delayed
task execution so it can't index into lists of all variables in the
operation).
- Use llvm::SmallVectorImpl for function arguments
- collectPrivatizationDecls already reserves size for privateDecls so we
don't need to do that in callers
- Use llvm::zip_equal instead of C-style array indexing
Commit: 9123dc6abfa76c90c04caf1a58574eff417a2aed
https://github.com/llvm/llvm-project/commit/9123dc6abfa76c90c04caf1a58574eff417a2aed
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
Log Message:
-----------
[AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (#115292)
Similar to #110986 - disabling inlining on MSVC release builds avoids an excessive build time issue affecting all recent versions of CL.EXE
Fixes #114425
Commit: f5e4ffaa49254706ad6fa209de8aec28e20f0041
https://github.com/llvm/llvm-project/commit/f5e4ffaa49254706ad6fa209de8aec28e20f0041
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
R llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
Log Message:
-----------
Revert "[llvm] Use computeConstantRange to improve llvm.objectsize computation (#114673)"
This reverts commit 5f342816efe1854333f2be41a03fdd25fa0db433.
This seems to break various builders, such as
https://lab.llvm.org/buildbot/#/builders/41/builds/3259
https://lab.llvm.org/buildbot/#/builders/76/builds/4298
Commit: fbe8a2f513208daf2375fa8f1bea679fe5272057
https://github.com/llvm/llvm-project/commit/fbe8a2f513208daf2375fa8f1bea679fe5272057
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/Inputs/spurious-marker-symbol.yaml
A bolt/test/AArch64/spurious-marker-symbol.test
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.cpp
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.h
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/clang-query/QueryParser.cpp
M clang-tools-extra/clang-query/QuerySession.h
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/TidyProvider.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/Maintainers.rst
M clang/docs/APINotes.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/APINotes/Types.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
A clang/include/clang/AST/DynamicRecursiveASTVisitor.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/PropertiesBase.td
A clang/include/clang/AST/SYCLKernelInfo.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
M clang/include/clang/Basic/BuiltinsLoongArchLSX.def
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/CIR/CIRGenerator.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/Floating.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
A clang/lib/AST/DynamicRecursiveASTVisitor.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/SourceManager.cpp
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
A clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
M clang/lib/StaticAnalyzer/Checkers/TraversalChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StandardLibrary.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
M clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc
A clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
A clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/lifetimebound.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
M clang/test/AST/ast-dump-decl.cpp
R clang/test/ASTMerge/class-template-spec/Inputs/class-template-spec.cpp
R clang/test/ASTMerge/class-template-spec/test.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/malloc.c
R clang/test/Analysis/traversal-algorithm.mm
A clang/test/C/C2y/n3370.c
M clang/test/CIR/hello.c
R clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
R clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGen/PowerPC/altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
M clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init-no-parentheses.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init.c
M clang/test/CodeGen/RISCV/rvv-vls-bitwise-ops.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/SystemZ/zvector2.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vbmi2-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
M clang/test/CodeGen/X86/avx512vlvbmi2-builtins.c
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/X86/xop-builtins-cmp.c
M clang/test/CodeGen/X86/xop-builtins.c
M clang/test/CodeGen/aarch64-neon-3v.c
M clang/test/CodeGen/aarch64-neon-intrinsics.c
M clang/test/CodeGen/aarch64-neon-misc.c
M clang/test/CodeGen/aarch64-neon-shifts.c
M clang/test/CodeGen/aarch64-neon-tbl.c
M clang/test/CodeGen/aarch64-poly64.c
M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
M clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-mve-intrinsics/absneg.c
M clang/test/CodeGen/arm-mve-intrinsics/bitwise-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/cplusplus.cpp
M clang/test/CodeGen/arm-mve-intrinsics/vbicq.c
M clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/vornq.c
M clang/test/CodeGen/arm-neon-shifts.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/builtin_set_flt_rounds.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtinshufflevector2.c
M clang/test/CodeGen/const-init.c
M clang/test/CodeGen/matrix-type-operators.c
M clang/test/CodeGen/neon-immediate-ubsan.c
M clang/test/CodeGen/nofpclass.c
M clang/test/CodeGen/ppc-vec_ct-truncate.c
M clang/test/CodeGen/target-data.c
A clang/test/CodeGen/ubsan-type-ignorelist-category-2.test
A clang/test/CodeGen/ubsan-type-ignorelist-category.test
A clang/test/CodeGen/ubsan-type-ignorelist-enum.test
M clang/test/CodeGen/variadic-nvptx.c
M clang/test/CodeGen/vecshift.c
M clang/test/CodeGen/vector-scalar.c
M clang/test/CodeGenCUDA/Inputs/cuda.h
A clang/test/CodeGenCUDA/grid-constant.cu
M clang/test/CodeGenCXX/auto-var-init.cpp
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenCXX/ext-vector-type-conditional.cpp
M clang/test/CodeGenCXX/matrix-type-builtins.cpp
M clang/test/CodeGenCXX/matrix-type-operators.cpp
M clang/test/CodeGenCXX/vector-size-conditional.cpp
M clang/test/CodeGenCXX/vector-splat-conversion.cpp
M clang/test/CodeGenHLSL/BasicFeatures/standard_conversion_sequences.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
A clang/test/CodeGenHLSL/builtins/dot4add_i8packed.hlsl
A clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/logical-ops.cl
M clang/test/CodeGenOpenCL/partial_initializer.cl
M clang/test/CodeGenOpenCL/shifts.cl
M clang/test/CodeGenOpenCL/vector_literals.cl
M clang/test/Driver/XRay/xray-mode-flags.cpp
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/print-multi-selection-flags.c
M clang/test/Driver/ps5-linker.c
M clang/test/Headers/__clang_hip_math_deprecated.hip
M clang/test/Headers/lasxintrin.c
M clang/test/Headers/lsxintrin.c
M clang/test/Headers/wasm.c
M clang/test/Lexer/SourceLocationsOverflow.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Misc/sloc-usage.cpp
M clang/test/Modules/cxx-templates.cpp
A clang/test/OpenMP/allocate_allocator_modifier_ast_print.cpp
A clang/test/OpenMP/allocate_allocator_modifier_codegen.cpp
A clang/test/OpenMP/allocate_allocator_modifier_messages.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
M clang/test/Sema/gnu-flags.c
M clang/test/SemaCUDA/Inputs/cuda.h
A clang/test/SemaCUDA/grid-constant.cu
A clang/test/SemaCXX/PR113855.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
M clang/test/SemaCXX/cxx2c-placeholder-vars.cpp
A clang/test/SemaCXX/nullability_redecl.cpp
A clang/test/SemaHLSL/BuiltIns/dot4add_i8packed-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
A clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
A clang/test/SemaSYCL/sycl-kernel-entry-point-attr-grammar.cpp
A clang/test/SemaSYCL/sycl-kernel-entry-point-attr-ignored.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/tools/clang-refactor/TestSupport.cpp
M clang/tools/include-mapping/cppreference_parser.py
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/www/c_status.html
M cmake/Modules/CMakePolicy.cmake
R cmake/Modules/HandleOutOfTreeLLVM.cmake
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/asan/tests/CMakeLists.txt
M compiler-rt/lib/asan/tests/asan_oob_test.cpp
M compiler-rt/lib/asan/tests/asan_test.cpp
M compiler-rt/lib/fuzzer/CMakeLists.txt
M compiler-rt/lib/fuzzer/FuzzerExtFunctionsWindows.cpp
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
M compiler-rt/lib/fuzzer/tests/CMakeLists.txt
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/msan/tests/CMakeLists.txt
M compiler-rt/lib/orc/dlfcn_wrapper.cpp
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/orc/elfnix_platform.h
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/profile/InstrProfilingPlatformOther.c
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/tsan/CMakeLists.txt
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
M compiler-rt/test/asan/CMakeLists.txt
M compiler-rt/test/asan/TestCases/zero_page_pc.cpp
M compiler-rt/test/builtins/Unit/ctor_dtor.c
M compiler-rt/test/builtins/Unit/dso_handle.cpp
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/profile/Posix/gcov-destructor.c
M compiler-rt/test/profile/Posix/gcov-dlopen.c
M compiler-rt/test/profile/Posix/instrprof-dlopen-norpath.test
M compiler-rt/test/profile/instrprof-error.c
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/sanitizer_common/CMakeLists.txt
M compiler-rt/test/ubsan/CMakeLists.txt
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Common/Fortran.h
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Parser/token-sequence.h
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Common/Fortran.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/token-sequence.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign.cpp
M flang/test/Driver/arch-specific-libdir-rpath.f95
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Evaluate/errors01.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
A flang/test/Integration/debug-complex-2.f90
A flang/test/Integration/debug-external-linkage-name.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-inoutset.f90
A flang/test/Lower/OpenMP/Todo/depend-clause-mutexinoutset.f90
A flang/test/Lower/OpenMP/Todo/from-expectation-modifier.f90
A flang/test/Lower/OpenMP/Todo/from-iterator-modifier.f90
A flang/test/Lower/OpenMP/Todo/task_detach.f90
A flang/test/Lower/OpenMP/Todo/to-expectation-modifier.f90
A flang/test/Lower/OpenMP/Todo/to-iterator-modifier.f90
M flang/test/Lower/OpenMP/atomic-capture.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M flang/test/Lower/OpenMP/wsloop-simd.f90
M flang/test/Lower/PowerPC/ppc-vec-cmp.f90
M flang/test/Lower/PowerPC/ppc-vec-convert.f90
M flang/test/Lower/PowerPC/ppc-vec-perm.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-shift.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
A flang/test/Parser/OpenMP/declare-target-to-clause.f90
A flang/test/Parser/OpenMP/from-clause.f90
A flang/test/Parser/OpenMP/target-update-to-clause.f90
A flang/test/Parser/OpenMP/task.f90
A flang/test/Preprocessing/defined-in-macro.F90
A flang/test/Semantics/Inputs/modfile70.mod
A flang/test/Semantics/OpenMP/depend06.f90
M flang/test/Semantics/OpenMP/depobj-construct-v50.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
A flang/test/Semantics/OpenMP/from-clause-v45.f90
A flang/test/Semantics/OpenMP/from-clause-v51.f90
A flang/test/Semantics/OpenMP/to-clause-v45.f90
A flang/test/Semantics/OpenMP/to-clause-v51.f90
M flang/test/Semantics/cuf03.cuf
A flang/test/Semantics/cuf17.cuf
M flang/test/Semantics/modfile63.f90
A flang/test/Semantics/modfile70.f90
A flang/test/Semantics/rewrite03.f90
A flang/test/Transforms/debug-assumed-rank-array.fir
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/__llvm-libc-common.h
M libc/newhdrgen/yaml/sys/mman.yaml
M libc/newhdrgen/yaml/unistd.yaml
M libc/newhdrgen/yaml_to_classes.py
M libc/spec/linux.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mremap.cpp
A libc/src/sys/mman/mremap.h
M libc/src/sys/socket/linux/recvmsg.cpp
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/pipe2.cpp
A libc/src/unistd/pipe2.h
M libc/test/integration/src/stdio/CMakeLists.txt
M libc/test/src/__support/OSUtil/linux/vdso_test.cpp
M libc/test/src/__support/integer_literals_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_long_double_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
A libc/test/src/sys/mman/linux/mremap_test.cpp
M libc/test/src/sys/mman/linux/msync_test.cpp
M libc/test/src/sys/mman/linux/shm_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/access_test.cpp
A libc/test/src/unistd/pipe2_test.cpp
M libclc/amdgcn/lib/integer/popcount.cl
M libclc/amdgcn/lib/math/fmax.cl
M libclc/amdgcn/lib/math/fmin.cl
M libclc/amdgcn/lib/math/ldexp.cl
M libclc/amdgpu/lib/math/half_native_unary.inc
M libclc/amdgpu/lib/math/nextafter.cl
M libclc/amdgpu/lib/math/sqrt.cl
A libclc/clc/include/clc/clc_as_type.h
A libclc/clc/include/clc/clcmacro.h
A libclc/clc/include/clc/integer/clc_abs.h
A libclc/clc/include/clc/integer/clc_abs.inc
A libclc/clc/include/clc/integer/clc_abs_diff.h
A libclc/clc/include/clc/integer/clc_abs_diff.inc
M libclc/clc/include/clc/internal/clc.h
A libclc/clc/include/clc/math/clc_ceil.h
A libclc/clc/include/clc/math/clc_fabs.h
A libclc/clc/include/clc/math/clc_floor.h
A libclc/clc/include/clc/math/clc_rint.h
A libclc/clc/include/clc/math/clc_trunc.h
A libclc/clc/include/clc/math/unary_decl.inc
A libclc/clc/include/clc/math/unary_intrin.inc
A libclc/clc/include/clc/relational/binary_decl.inc
A libclc/clc/include/clc/relational/clc_all.h
A libclc/clc/include/clc/relational/clc_any.h
A libclc/clc/include/clc/relational/clc_bitselect.h
A libclc/clc/include/clc/relational/clc_bitselect.inc
A libclc/clc/include/clc/relational/clc_isequal.h
A libclc/clc/include/clc/relational/clc_isfinite.h
A libclc/clc/include/clc/relational/clc_isgreater.h
A libclc/clc/include/clc/relational/clc_isgreaterequal.h
A libclc/clc/include/clc/relational/clc_isinf.h
A libclc/clc/include/clc/relational/clc_isless.h
A libclc/clc/include/clc/relational/clc_islessequal.h
A libclc/clc/include/clc/relational/clc_islessgreater.h
A libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/relational/clc_isnormal.h
A libclc/clc/include/clc/relational/clc_isnotequal.h
A libclc/clc/include/clc/relational/clc_isordered.h
A libclc/clc/include/clc/relational/clc_isunordered.h
A libclc/clc/include/clc/relational/clc_select.h
A libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_signbit.h
A libclc/clc/include/clc/relational/floatn.inc
A libclc/clc/include/clc/relational/relational.h
A libclc/clc/include/clc/relational/unary_decl.inc
A libclc/clc/include/clc/utils.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/integer/clc_abs.cl
A libclc/clc/lib/generic/integer/clc_abs.inc
A libclc/clc/lib/generic/integer/clc_abs_diff.cl
A libclc/clc/lib/generic/integer/clc_abs_diff.inc
A libclc/clc/lib/generic/relational/clc_all.cl
A libclc/clc/lib/generic/relational/clc_any.cl
A libclc/clc/lib/generic/relational/clc_bitselect.cl
A libclc/clc/lib/generic/relational/clc_bitselect.inc
A libclc/clc/lib/generic/relational/clc_isequal.cl
A libclc/clc/lib/generic/relational/clc_isfinite.cl
A libclc/clc/lib/generic/relational/clc_isgreater.cl
A libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
A libclc/clc/lib/generic/relational/clc_isinf.cl
A libclc/clc/lib/generic/relational/clc_isless.cl
A libclc/clc/lib/generic/relational/clc_islessequal.cl
A libclc/clc/lib/generic/relational/clc_islessgreater.cl
A libclc/clc/lib/generic/relational/clc_isnan.cl
A libclc/clc/lib/generic/relational/clc_isnormal.cl
A libclc/clc/lib/generic/relational/clc_isnotequal.cl
A libclc/clc/lib/generic/relational/clc_isordered.cl
A libclc/clc/lib/generic/relational/clc_isunordered.cl
A libclc/clc/lib/generic/relational/clc_select.cl
A libclc/clc/lib/generic/relational/clc_select.inc
A libclc/clc/lib/generic/relational/clc_signbit.cl
M libclc/clspv/lib/math/fma.cl
M libclc/generic/include/clc/clc.h
M libclc/generic/include/clc/clcmacros.h
R libclc/generic/include/clc/math/unary_decl.inc
M libclc/generic/include/clc/relational/any.h
R libclc/generic/include/clc/relational/binary_decl.inc
R libclc/generic/include/clc/relational/floatn.inc
R libclc/generic/include/clc/relational/unary_decl.inc
M libclc/generic/include/math/clc_sqrt.h
R libclc/generic/include/math/unary_intrin.inc
R libclc/generic/include/utils.h
M libclc/generic/lib/atom_int32_binary.inc
R libclc/generic/lib/clcmacro.h
M libclc/generic/lib/common/degrees.cl
M libclc/generic/lib/common/radians.cl
M libclc/generic/lib/common/sign.cl
M libclc/generic/lib/common/smoothstep.cl
M libclc/generic/lib/common/step.cl
M libclc/generic/lib/integer/abs.cl
M libclc/generic/lib/integer/abs.inc
M libclc/generic/lib/integer/abs_diff.cl
M libclc/generic/lib/integer/abs_diff.inc
M libclc/generic/lib/integer/add_sat.cl
M libclc/generic/lib/integer/clz.cl
M libclc/generic/lib/integer/mad_sat.cl
M libclc/generic/lib/integer/sub_sat.cl
M libclc/generic/lib/math/acos.cl
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/acospi.cl
M libclc/generic/lib/math/asin.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/asinpi.cl
M libclc/generic/lib/math/atan.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/atanpi.cl
M libclc/generic/lib/math/cbrt.cl
M libclc/generic/lib/math/ceil.cl
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/clc_sqrt.cl
M libclc/generic/lib/math/clc_sw_binary.inc
M libclc/generic/lib/math/clc_sw_unary.inc
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/math/clc_tanpi.cl
M libclc/generic/lib/math/copysign.cl
M libclc/generic/lib/math/cos.cl
M libclc/generic/lib/math/cosh.cl
M libclc/generic/lib/math/cospi.cl
M libclc/generic/lib/math/erf.cl
M libclc/generic/lib/math/erfc.cl
M libclc/generic/lib/math/exp.cl
M libclc/generic/lib/math/exp2.cl
M libclc/generic/lib/math/expm1.cl
M libclc/generic/lib/math/fabs.cl
M libclc/generic/lib/math/floor.cl
M libclc/generic/lib/math/fmax.cl
M libclc/generic/lib/math/fmin.cl
M libclc/generic/lib/math/frexp.cl
M libclc/generic/lib/math/frexp.inc
M libclc/generic/lib/math/half_binary.inc
M libclc/generic/lib/math/half_unary.inc
M libclc/generic/lib/math/ilogb.cl
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/lgamma.cl
M libclc/generic/lib/math/lgamma_r.cl
M libclc/generic/lib/math/log.cl
M libclc/generic/lib/math/log10.cl
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/log2.cl
M libclc/generic/lib/math/logb.cl
M libclc/generic/lib/math/maxmag.cl
M libclc/generic/lib/math/minmag.cl
M libclc/generic/lib/math/nan.cl
M libclc/generic/lib/math/native_unary_intrinsic.inc
M libclc/generic/lib/math/rint.cl
M libclc/generic/lib/math/round.cl
M libclc/generic/lib/math/rsqrt.cl
M libclc/generic/lib/math/sin.cl
M libclc/generic/lib/math/sincos_helpers.cl
M libclc/generic/lib/math/sinh.cl
M libclc/generic/lib/math/sinpi.cl
M libclc/generic/lib/math/tables.h
M libclc/generic/lib/math/tanh.cl
M libclc/generic/lib/math/tgamma.cl
M libclc/generic/lib/math/trunc.cl
M libclc/generic/lib/math/unary_builtin.inc
M libclc/generic/lib/relational/all.cl
M libclc/generic/lib/relational/any.cl
A libclc/generic/lib/relational/binary_def.inc
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/isequal.cl
M libclc/generic/lib/relational/isfinite.cl
M libclc/generic/lib/relational/isgreater.cl
M libclc/generic/lib/relational/isgreaterequal.cl
M libclc/generic/lib/relational/isinf.cl
M libclc/generic/lib/relational/isless.cl
M libclc/generic/lib/relational/islessequal.cl
M libclc/generic/lib/relational/islessgreater.cl
M libclc/generic/lib/relational/isnan.cl
M libclc/generic/lib/relational/isnormal.cl
M libclc/generic/lib/relational/isnotequal.cl
M libclc/generic/lib/relational/isordered.cl
M libclc/generic/lib/relational/isunordered.cl
R libclc/generic/lib/relational/relational.h
M libclc/generic/lib/relational/select.cl
M libclc/generic/lib/relational/signbit.cl
A libclc/generic/lib/relational/unary_def.inc
M libclc/ptx/lib/math/nextafter.cl
M libclc/r600/lib/math/fmax.cl
M libclc/r600/lib/math/fmin.cl
M libclc/r600/lib/math/native_rsqrt.cl
M libclc/r600/lib/math/rsqrt.cl
M libcxx/CMakeLists.txt
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
M libcxx/docs/DesignDocs/ThreadingSupportAPI.rst
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Hardening.rst
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/docs/Status/FormatIssues.csv
M libcxx/docs/Status/FormatPaper.csv
M libcxx/include/__algorithm/adjacent_find.h
M libcxx/include/__algorithm/all_of.h
M libcxx/include/__algorithm/any_of.h
M libcxx/include/__algorithm/copy_if.h
M libcxx/include/__algorithm/count_if.h
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/iterator_operations.h
M libcxx/include/__algorithm/lexicographical_compare.h
M libcxx/include/__algorithm/ranges_adjacent_find.h
M libcxx/include/__algorithm/ranges_all_of.h
M libcxx/include/__algorithm/ranges_any_of.h
M libcxx/include/__algorithm/ranges_copy_if.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__algorithm/ranges_count_if.h
M libcxx/include/__algorithm/ranges_fill_n.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__algorithm/unique.h
M libcxx/include/__atomic/aliases.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__atomic/cxx_atomic_impl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/high_resolution_clock.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/parser_std_format_spec.h
M libcxx/include/__chrono/statically_widen.h
M libcxx/include/__chrono/steady_clock.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
M libcxx/include/__config_site.in
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__cstddef/nullptr_t.h
M libcxx/include/__cstddef/ptrdiff_t.h
M libcxx/include/__cstddef/size_t.h
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__filesystem/directory_entry.h
M libcxx/include/__filesystem/directory_iterator.h
M libcxx/include/__filesystem/operations.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__filesystem/recursive_directory_iterator.h
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__format/concepts.h
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__format/format_context.h
M libcxx/include/__format/format_functions.h
M libcxx/include/__format/format_parse_context.h
M libcxx/include/__format/formatter_bool.h
M libcxx/include/__format/formatter_char.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__format/parser_std_format_spec.h
M libcxx/include/__format/unicode.h
M libcxx/include/__format/write_escaped.h
M libcxx/include/__functional/function.h
M libcxx/include/__functional/hash.h
M libcxx/include/__fwd/fstream.h
M libcxx/include/__fwd/ios.h
M libcxx/include/__fwd/istream.h
M libcxx/include/__fwd/ostream.h
M libcxx/include/__fwd/sstream.h
M libcxx/include/__fwd/streambuf.h
M libcxx/include/__fwd/string.h
M libcxx/include/__fwd/string_view.h
M libcxx/include/__hash_table
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/apple.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_defaults.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
M libcxx/include/__locale_dir/locale_base_api/freebsd.h
M libcxx/include/__mbstate_t.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__memory_resource/synchronized_pool_resource.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__ostream/print.h
M libcxx/include/__random/binomial_distribution.h
M libcxx/include/__random/random_device.h
M libcxx/include/__ranges/istream_view.h
M libcxx/include/__split_buffer
M libcxx/include/__stop_token/atomic_unique_lock.h
M libcxx/include/__stop_token/stop_callback.h
M libcxx/include/__stop_token/stop_source.h
M libcxx/include/__stop_token/stop_state.h
M libcxx/include/__stop_token/stop_token.h
M libcxx/include/__string/char_traits.h
M libcxx/include/__support/xlocale/__posix_l_fallback.h
M libcxx/include/__support/xlocale/__strtonum_fallback.h
M libcxx/include/__thread/formatter.h
M libcxx/include/__thread/id.h
M libcxx/include/__thread/jthread.h
M libcxx/include/__thread/support.h
M libcxx/include/__thread/this_thread.h
M libcxx/include/__thread/thread.h
M libcxx/include/__thread/timed_backoff_policy.h
M libcxx/include/__tuple/make_tuple_types.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__utility/pair.h
M libcxx/include/__vector/vector.h
M libcxx/include/barrier
M libcxx/include/chrono
M libcxx/include/clocale
M libcxx/include/codecvt
M libcxx/include/complex
M libcxx/include/condition_variable
M libcxx/include/cstdint
M libcxx/include/cstdlib
M libcxx/include/deque
M libcxx/include/format
M libcxx/include/forward_list
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/iomanip
M libcxx/include/ios
M libcxx/include/iosfwd
M libcxx/include/iostream
M libcxx/include/istream
M libcxx/include/latch
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/mutex
M libcxx/include/new
M libcxx/include/optional
M libcxx/include/ostream
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/regex
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/sstream
M libcxx/include/stdatomic.h
M libcxx/include/stop_token
M libcxx/include/streambuf
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/syncstream
M libcxx/include/thread
M libcxx/include/variant
M libcxx/include/vector
M libcxx/include/version
M libcxx/include/wchar.h
M libcxx/modules/std.compat.cppm.in
M libcxx/modules/std.compat/clocale.inc
M libcxx/modules/std.compat/cstdlib.inc
M libcxx/modules/std.compat/cwchar.inc
M libcxx/modules/std.compat/cwctype.inc
M libcxx/modules/std.cppm.in
M libcxx/modules/std/atomic.inc
M libcxx/modules/std/barrier.inc
M libcxx/modules/std/chrono.inc
M libcxx/modules/std/clocale.inc
M libcxx/modules/std/codecvt.inc
M libcxx/modules/std/complex.inc
M libcxx/modules/std/condition_variable.inc
M libcxx/modules/std/cstdlib.inc
M libcxx/modules/std/cwchar.inc
M libcxx/modules/std/cwctype.inc
M libcxx/modules/std/filesystem.inc
M libcxx/modules/std/format.inc
M libcxx/modules/std/fstream.inc
M libcxx/modules/std/future.inc
M libcxx/modules/std/iomanip.inc
M libcxx/modules/std/ios.inc
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/iostream.inc
M libcxx/modules/std/istream.inc
M libcxx/modules/std/latch.inc
M libcxx/modules/std/locale.inc
M libcxx/modules/std/memory.inc
M libcxx/modules/std/mutex.inc
M libcxx/modules/std/ostream.inc
M libcxx/modules/std/print.inc
M libcxx/modules/std/random.inc
M libcxx/modules/std/ranges.inc
M libcxx/modules/std/regex.inc
M libcxx/modules/std/semaphore.inc
M libcxx/modules/std/shared_mutex.inc
M libcxx/modules/std/spanstream.inc
M libcxx/modules/std/sstream.inc
M libcxx/modules/std/stop_token.inc
M libcxx/modules/std/streambuf.inc
M libcxx/modules/std/string.inc
M libcxx/modules/std/string_view.inc
M libcxx/modules/std/strstream.inc
M libcxx/modules/std/syncstream.inc
M libcxx/modules/std/thread.inc
M libcxx/src/algorithm.cpp
M libcxx/src/call_once.cpp
M libcxx/src/chrono.cpp
M libcxx/src/experimental/include/tzdb/tzdb_list_private.h
M libcxx/src/filesystem/time_utils.h
M libcxx/src/include/atomic_support.h
M libcxx/src/include/config_elast.h
M libcxx/src/ios.cpp
M libcxx/src/ios.instantiations.cpp
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
M libcxx/src/memory.cpp
M libcxx/src/memory_resource.cpp
M libcxx/src/ostream.cpp
M libcxx/src/print.cpp
M libcxx/src/random_shuffle.cpp
M libcxx/src/std_stream.h
M libcxx/src/string.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/CartesianBenchmarks.h
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/VariantBenchmarks.h
M libcxx/test/benchmarks/algorithms.partition_point.bench.cpp
M libcxx/test/benchmarks/algorithms/count.bench.cpp
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
M libcxx/test/benchmarks/algorithms/fill.bench.cpp
M libcxx/test/benchmarks/algorithms/find.bench.cpp
M libcxx/test/benchmarks/algorithms/for_each.bench.cpp
M libcxx/test/benchmarks/algorithms/lexicographical_compare.bench.cpp
M libcxx/test/benchmarks/algorithms/lower_bound.bench.cpp
M libcxx/test/benchmarks/algorithms/make_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/make_heap_then_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/min_max_element.bench.cpp
M libcxx/test/benchmarks/algorithms/minmax.bench.cpp
M libcxx/test/benchmarks/algorithms/mismatch.bench.cpp
M libcxx/test/benchmarks/algorithms/pop_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/pstl.stable_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/push_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_contains.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_ends_with.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_make_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_make_heap_then_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_pop_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_push_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/ranges_stable_sort.bench.cpp
M libcxx/test/benchmarks/algorithms/set_intersection.bench.cpp
M libcxx/test/benchmarks/algorithms/sort.bench.cpp
M libcxx/test/benchmarks/algorithms/sort_heap.bench.cpp
M libcxx/test/benchmarks/algorithms/stable_sort.bench.cpp
M libcxx/test/benchmarks/allocation.bench.cpp
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/deque.bench.cpp
M libcxx/test/benchmarks/deque_iterator.bench.cpp
M libcxx/test/benchmarks/exception_ptr.bench.cpp
M libcxx/test/benchmarks/filesystem.bench.cpp
M libcxx/test/benchmarks/format.bench.cpp
M libcxx/test/benchmarks/format/write_double_comparison.bench.cpp
M libcxx/test/benchmarks/format/write_int_comparison.bench.cpp
M libcxx/test/benchmarks/format/write_string_comparison.bench.cpp
M libcxx/test/benchmarks/format_to.bench.cpp
M libcxx/test/benchmarks/format_to_n.bench.cpp
M libcxx/test/benchmarks/formatted_size.bench.cpp
M libcxx/test/benchmarks/formatter_float.bench.cpp
M libcxx/test/benchmarks/formatter_int.bench.cpp
M libcxx/test/benchmarks/function.bench.cpp
M libcxx/test/benchmarks/hash.bench.cpp
M libcxx/test/benchmarks/join_view.bench.cpp
M libcxx/test/benchmarks/lexicographical_compare_three_way.bench.cpp
M libcxx/test/benchmarks/libcxxabi/dynamic_cast.bench.cpp
M libcxx/test/benchmarks/libcxxabi/dynamic_cast_old_stress.bench.cpp
M libcxx/test/benchmarks/map.bench.cpp
M libcxx/test/benchmarks/monotonic_buffer.bench.cpp
M libcxx/test/benchmarks/numeric/gcd.bench.cpp
M libcxx/test/benchmarks/ordered_set.bench.cpp
M libcxx/test/benchmarks/random.bench.cpp
M libcxx/test/benchmarks/shared_mutex_vs_mutex.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/benchmarks/string.bench.cpp
M libcxx/test/benchmarks/stringstream.bench.cpp
M libcxx/test/benchmarks/system_error.bench.cpp
M libcxx/test/benchmarks/to_chars.bench.cpp
M libcxx/test/benchmarks/unordered_set_operations.bench.cpp
M libcxx/test/benchmarks/variant_visit_1.bench.cpp
M libcxx/test/benchmarks/variant_visit_2.bench.cpp
M libcxx/test/benchmarks/variant_visit_3.bench.cpp
M libcxx/test/benchmarks/vector_operations.bench.cpp
A libcxx/test/configs/amdgpu-libc++-shared.cfg.in
A libcxx/test/configs/nvptx-libc++-shared.cfg.in
M libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
M libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/test_data.json
M libcxx/test/libcxx/feature_test_macro/version_header.sh.py
M libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/test/libcxx/include_as_c.sh.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/libcxx/vendor/apple/availability-with-pedantic-errors.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.tests.h
M libcxx/test/std/containers/sequences/deque/deque.modifiers/insert_range.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
M libcxx/test/std/language.support/support.dynamic/ptr.launder/launder.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/barrier.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/iomanip.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/latch.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/semaphore.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/shared_mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/stop_token.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/thread.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/strings/basic.string/string.modifiers/string_replace/replace_with_range.pass.cpp
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.cmp/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/incomplete.sh.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.observers/assert.subscript.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.special/cmp_nullptr.pass.cpp
R libcxx/test/support/experimental_any_helpers.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/header_information.py
M libcxx/utils/libcxx/test/dsl.py
M libcxx/utils/libcxx/test/features.py
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/src/demangle/README.txt
M libcxxabi/test/test_demangle.pass.cpp
M libunwind/docs/BuildingLibunwind.rst
M lld/COFF/Chunks.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/Common/ErrorHandler.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/MSP430.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/CallGraphSort.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MapFile.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
M lld/include/lld/Common/ErrorHandler.h
M lld/test/COFF/arm64ec-altnames.s
M lld/test/COFF/arm64ec-codemap.test
M lld/test/COFF/arm64ec-delayimport.test
M lld/test/COFF/arm64ec-entry-mangle.test
M lld/test/COFF/arm64ec-export-thunks.test
M lld/test/COFF/arm64ec-import.test
M lld/test/COFF/arm64ec-lib.test
M lld/test/COFF/arm64ec-loadcfg.s
M lld/test/COFF/arm64ec-range-thunks.s
A lld/test/COFF/locally-imported-arm64ec.test
M lld/test/MachO/cgdata-generate.s
M lld/test/Unit/lit.cfg.py
R lld/test/wasm/Inputs/require-feature-foo.yaml
R lld/test/wasm/target-feature-required.yaml
M lld/test/wasm/target-feature-used.yaml
M lld/wasm/Writer.cpp
M lldb/include/lldb/Target/PathMappingList.h
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Symbol/CompileUnit.cpp
M lldb/source/Target/PathMappingList.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/process/launch/TestProcessLaunch.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
A lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpointsSameCUName.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/common.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/optional/TestDataFormatterLibcxxOptionalSimulator.py
M lldb/test/API/functionalities/inline-stepping/TestInlineStepping.py
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
M lldb/test/API/lang/cpp/const_static_integral_member/main.cpp
M lldb/test/API/lang/cpp/dereferencing_references/TestCPPDereferencingReferences.py
M lldb/test/API/lang/cpp/dereferencing_references/main.cpp
M lldb/test/API/lit.cfg.py
M lldb/test/Shell/lit.cfg.py
M lldb/test/Unit/lit.cfg.py
M lldb/test/Unit/lit.site.cfg.py.in
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/unittests/Host/AlarmTest.cpp
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodeReview.rst
M llvm/docs/CommandGuide/llvm-cgdata.rst
M llvm/docs/CommandGuide/llvm-exegesis.rst
M llvm/docs/Contributing.rst
M llvm/docs/HistoricalNotes/2001-05-18-ExceptionHandling.txt
M llvm/docs/HistoricalNotes/2002-05-12-InstListChange.txt
M llvm/docs/HowToBuildWindowsItaniumPrograms.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/ADT/STLFunctionalExtras.h
A llvm/include/llvm/Analysis/LastRunTrackingAnalysis.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/CGData/CodeGenData.h
M llvm/include/llvm/CGData/CodeGenData.inc
M llvm/include/llvm/CGData/CodeGenDataReader.h
M llvm/include/llvm/CGData/CodeGenDataWriter.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/README.txt
M llvm/include/llvm/ExecutionEngine/JITLink/aarch32.h
M llvm/include/llvm/ExecutionEngine/Orc/IndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/MC/MCSchedule.h
M llvm/include/llvm/Object/ObjectFile.h
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/InstrProfWriter.h
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/include/llvm/Transforms/InstCombine/InstCombine.h
M llvm/include/llvm/Transforms/Scalar.h
R llvm/include/llvm/Transforms/Scalar/TLSVariableHoist.h
A llvm/include/llvm/Transforms/Utils/LongestCommonSequence.h
M llvm/include/llvm/Transforms/Utils/LowerAtomic.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CFGPrinter.cpp
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/CycleAnalysis.cpp
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/DemandedBits.cpp
M llvm/lib/Analysis/DomTreeUpdater.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
M llvm/lib/Analysis/IndirectCallPromotionAnalysis.cpp
M llvm/lib/Analysis/InstCount.cpp
A llvm/lib/Analysis/LastRunTrackingAnalysis.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryLocation.cpp
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/CGData/CodeGenDataWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/RedirectionManager.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Type.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCSchedule.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Support/KnownBits.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.td
M llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
M llvm/lib/Target/LoongArch/LoongArchSubtarget.h
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/IPO/StripSymbols.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/KCFI.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Scalar/CMakeLists.txt
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/lib/Transforms/Scalar/EarlyCSE.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/Scalar.cpp
R llvm/lib/Transforms/Scalar/TLSVariableHoist.cpp
M llvm/lib/Transforms/Utils/BypassSlowDivision.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/Evaluator.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/FunctionComparator.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
M llvm/lib/Transforms/Utils/LowerSwitch.cpp
M llvm/lib/Transforms/Utils/MisExpect.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/SplitModule.cpp
M llvm/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp
M llvm/lib/Transforms/Utils/Utils.cpp
M llvm/lib/Transforms/Utils/VNCoercion.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/BasicAA/phi-values-usage.ll
M llvm/test/Analysis/BasicAA/underlying-value.ll
M llvm/test/Analysis/BlockFrequencyInfo/irreducible_loop_crash.ll
M llvm/test/Analysis/BranchProbabilityInfo/deopt-invoke.ll
M llvm/test/Analysis/BranchProbabilityInfo/loop.ll
M llvm/test/Analysis/BranchProbabilityInfo/unreachable.ll
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/logicalop.ll
M llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/div.ll
M llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
M llvm/test/Analysis/CostModel/AMDGPU/fneg.ll
M llvm/test/Analysis/CostModel/AMDGPU/logicalop.ll
M llvm/test/Analysis/CostModel/AMDGPU/mul.ll
M llvm/test/Analysis/CostModel/AMDGPU/rem.ll
M llvm/test/Analysis/CostModel/ARM/divrem.ll
M llvm/test/Analysis/CostModel/ARM/logicalop.ll
M llvm/test/Analysis/CostModel/PowerPC/logicalop.ll
M llvm/test/Analysis/CostModel/RISCV/arith-int.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
M llvm/test/Analysis/CostModel/RISCV/logicalop.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-load-store.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-phi-const.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/CostModel/RISCV/scalable-gather.ll
M llvm/test/Analysis/CostModel/RISCV/scalable-scatter.ll
M llvm/test/Analysis/CostModel/SystemZ/divrem-pow2.ll
M llvm/test/Analysis/CostModel/SystemZ/intrinsic-cost-crash.ll
M llvm/test/Analysis/CostModel/SystemZ/logicalop.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-latency.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/arith-fp.ll
M llvm/test/Analysis/CostModel/X86/div-codesize.ll
M llvm/test/Analysis/CostModel/X86/div-latency.ll
M llvm/test/Analysis/CostModel/X86/div-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/fshl-codesize.ll
M llvm/test/Analysis/CostModel/X86/fshl-latency.ll
M llvm/test/Analysis/CostModel/X86/fshl-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/fshl.ll
M llvm/test/Analysis/CostModel/X86/fshr-codesize.ll
M llvm/test/Analysis/CostModel/X86/fshr-latency.ll
M llvm/test/Analysis/CostModel/X86/fshr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/fshr.ll
M llvm/test/Analysis/CostModel/X86/logicalop.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-codesize.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-latency.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/mul-codesize.ll
M llvm/test/Analysis/CostModel/X86/mul-latency.ll
M llvm/test/Analysis/CostModel/X86/mul-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/mul.ll
M llvm/test/Analysis/CostModel/X86/reduction.ll
M llvm/test/Analysis/CostModel/X86/rem-codesize.ll
M llvm/test/Analysis/CostModel/X86/rem-latency.ll
M llvm/test/Analysis/CostModel/X86/rem-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll
M llvm/test/Analysis/CostModel/X86/slm-arith-costs.ll
M llvm/test/Analysis/CostModel/X86/vdiv-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-sizelatency.ll
M llvm/test/Analysis/CycleInfo/basic.ll
M llvm/test/Analysis/CycleInfo/unreachable-predecessor.ll
M llvm/test/Analysis/Delinearization/type_mismatch.ll
M llvm/test/Analysis/Delinearization/undef.ll
M llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll
M llvm/test/Analysis/DemandedBits/vectors.ll
M llvm/test/Analysis/DependenceAnalysis/MIVCheckConst.ll
M llvm/test/Analysis/DependenceAnalysis/NonAffineExpr.ll
M llvm/test/Analysis/Dominators/basic.ll
M llvm/test/Analysis/Dominators/print-dot-dom.ll
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
M llvm/test/Analysis/MemoryDependenceAnalysis/invariant.group-bug.ll
M llvm/test/Analysis/MemorySSA/cyclicphi.ll
M llvm/test/Analysis/MemorySSA/debugvalue.ll
M llvm/test/Analysis/MemorySSA/debugvalue2.ll
M llvm/test/Analysis/MemorySSA/forward-unreachable.ll
M llvm/test/Analysis/MemorySSA/function-clobber.ll
M llvm/test/Analysis/MemorySSA/invariant-groups.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-disablebasicaa.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-simplified-clone.ll
M llvm/test/Analysis/MemorySSA/loop-rotate-valuemap.ll
M llvm/test/Analysis/MemorySSA/phi-translation.ll
M llvm/test/Analysis/MemorySSA/pr28880.ll
M llvm/test/Analysis/MemorySSA/pr40749_2.ll
M llvm/test/Analysis/MemorySSA/pr41640.ll
M llvm/test/Analysis/MemorySSA/pr41853.ll
M llvm/test/Analysis/MemorySSA/pr42940.ll
M llvm/test/Analysis/MemorySSA/pr43317.ll
M llvm/test/Analysis/MemorySSA/pr43320.ll
M llvm/test/Analysis/MemorySSA/pr43427.ll
M llvm/test/Analysis/MemorySSA/pr43438.ll
M llvm/test/Analysis/MemorySSA/pr43493.ll
M llvm/test/Analysis/MemorySSA/pr43541.ll
M llvm/test/Analysis/MemorySSA/pr43641.ll
M llvm/test/Analysis/MemorySSA/pr45976.ll
M llvm/test/Analysis/MemorySSA/reduce_clobber_limit.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/MemorySSA/unreachable.ll
M llvm/test/Analysis/MemorySSA/update_unroll.ll
M llvm/test/Analysis/PhiValues/basic.ll
M llvm/test/Analysis/PhiValues/long_phi_chain.ll
M llvm/test/Analysis/PostDominators/pr6047_a.ll
M llvm/test/Analysis/PostDominators/pr6047_b.ll
M llvm/test/Analysis/PostDominators/pr6047_c.ll
M llvm/test/Analysis/PostDominators/pr6047_d.ll
M llvm/test/Analysis/ScalarEvolution/2011-04-26-FoldAddRec.ll
M llvm/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll
M llvm/test/Analysis/ScalarEvolution/avoid-infinite-recursion-0.ll
M llvm/test/Analysis/ScalarEvolution/avoid-infinite-recursion-1.ll
M llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
M llvm/test/Analysis/ScalarEvolution/expander-replace-congruent-ivs.ll
M llvm/test/Analysis/ScalarEvolution/how-far-to-zero.ll
M llvm/test/Analysis/ScalarEvolution/overflow-intrinsics-trip-count.ll
M llvm/test/Analysis/ScalarEvolution/pointer-sign-bits.ll
M llvm/test/Analysis/ScalarEvolution/pr22674.ll
M llvm/test/Analysis/ScalarEvolution/pr22856.ll
M llvm/test/Analysis/ScalarEvolution/pr25369.ll
M llvm/test/Analysis/ScalarEvolution/scev-aa.ll
M llvm/test/Analysis/ScalarEvolution/scev-canonical-mode.ll
M llvm/test/Analysis/ScalarEvolution/scev-invalid.ll
M llvm/test/Analysis/ScalarEvolution/shift-recurrences.ll
M llvm/test/Analysis/ValueTracking/known-bits.ll
M llvm/test/Analysis/ValueTracking/known-fpclass.ll
M llvm/test/Analysis/ValueTracking/known-non-equal.ll
M llvm/test/Analysis/ValueTracking/known-non-zero.ll
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
M llvm/test/Analysis/ValueTracking/knownbits-bmi-pattern.ll
M llvm/test/Analysis/ValueTracking/knownbits-sat-addsub.ll
M llvm/test/Analysis/ValueTracking/knownbits-x86-hadd-hsub.ll
M llvm/test/Analysis/ValueTracking/knownzero-shift.ll
M llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
M llvm/test/Analysis/ValueTracking/numsignbits-shl.ll
M llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll
M llvm/test/Assembler/ConstantExprFold.ll
M llvm/test/Assembler/atomicrmw.ll
A llvm/test/Assembler/c-style-comment.ll
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/convergence-control.ll
M llvm/test/Assembler/debug-info.ll
A llvm/test/Assembler/invalid-c-style-comment0.ll
A llvm/test/Assembler/invalid-c-style-comment1.ll
A llvm/test/Assembler/invalid-c-style-comment2.ll
A llvm/test/Assembler/invalid-c-style-comment3.ll
A llvm/test/Assembler/mutually-recursive-types.ll
M llvm/test/Assembler/opaque-ptr.ll
M llvm/test/Assembler/target-type-param-errors.ll
M llvm/test/Assembler/unsized-recursive-type.ll
M llvm/test/Bitcode/constantsTest.3.2.ll
M llvm/test/Bitcode/convergence-control.ll
A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-bitcast-bigendian.mir
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll
M llvm/test/CodeGen/AArch64/i128-fast-isel-fallback.ll
A llvm/test/CodeGen/AArch64/latency.ll
M llvm/test/CodeGen/AArch64/load.ll
M llvm/test/CodeGen/AArch64/neon-perm.ll
M llvm/test/CodeGen/AArch64/neon-scalar-by-elem-fma.ll
M llvm/test/CodeGen/AArch64/srem-lkk.ll
M llvm/test/CodeGen/AArch64/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/AArch64/srem-vector-lkk.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
A llvm/test/CodeGen/AArch64/sve-saturating-arith.ll
A llvm/test/CodeGen/AArch64/trunc-nsw-nuw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
A llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
R llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups.ll
A llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
A llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-p7-in-memory.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
R llvm/test/CodeGen/AMDGPU/promote-alloca-invalid-vector-gep.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-memset.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
A llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/shrink-mad-fma.mir
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir
M llvm/test/CodeGen/ARM/O3-pipeline.ll
A llvm/test/CodeGen/ARM/latency.ll
M llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
M llvm/test/CodeGen/DirectX/atan2.ll
A llvm/test/CodeGen/DirectX/dot4add_i8packed.ll
M llvm/test/CodeGen/DirectX/exp-vec.ll
A llvm/test/CodeGen/DirectX/firstbithigh.ll
A llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
A llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
M llvm/test/CodeGen/DirectX/log-vec.ll
M llvm/test/CodeGen/DirectX/step.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-tbaa.ll
A llvm/test/CodeGen/LoongArch/double-lround.ll
A llvm/test/CodeGen/LoongArch/float-lround.ll
A llvm/test/CodeGen/LoongArch/fp-rounding.ll
A llvm/test/CodeGen/LoongArch/merge-load-store.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-invalid.mir
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-not-a-reg.mir
A llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir
A llvm/test/CodeGen/Mips/data-layout.ll
M llvm/test/CodeGen/Mips/fp16-promote.ll
M llvm/test/CodeGen/Mips/implicit-sret.ll
M llvm/test/CodeGen/Mips/srem-seteq-illegal-types.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
M llvm/test/CodeGen/NVPTX/load-store.ll
M llvm/test/CodeGen/NVPTX/variadics-lowering.ll
M llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
M llvm/test/CodeGen/PowerPC/Frames-dyn-alloca.ll
M llvm/test/CodeGen/PowerPC/Frames-large.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll
M llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
M llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
M llvm/test/CodeGen/PowerPC/aix-dwarf.ll
A llvm/test/CodeGen/PowerPC/aix-inline-asm-clobber-warning.ll
M llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
M llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
M llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
M llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
M llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
M llvm/test/CodeGen/PowerPC/alloca-oversized.ll
M llvm/test/CodeGen/PowerPC/atomic-float.ll
M llvm/test/CodeGen/PowerPC/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/PowerPC/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/PowerPC/atomics-indexed.ll
M llvm/test/CodeGen/PowerPC/atomics.ll
M llvm/test/CodeGen/PowerPC/big-endian-store-forward.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.ll
M llvm/test/CodeGen/PowerPC/f128-arith.ll
M llvm/test/CodeGen/PowerPC/fma-assoc.ll
M llvm/test/CodeGen/PowerPC/fptoui-be-crash.ll
M llvm/test/CodeGen/PowerPC/frounds.ll
M llvm/test/CodeGen/PowerPC/ftrunc-legalize.ll
M llvm/test/CodeGen/PowerPC/hoist-logic.ll
M llvm/test/CodeGen/PowerPC/huge-frame-call.ll
M llvm/test/CodeGen/PowerPC/inc-of-add.ll
M llvm/test/CodeGen/PowerPC/inline-asm-clobber-warning.ll
M llvm/test/CodeGen/PowerPC/kill_flag_verification.ll
M llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
M llvm/test/CodeGen/PowerPC/legalize-vaarg.ll
M llvm/test/CodeGen/PowerPC/licm-tocReg.ll
A llvm/test/CodeGen/PowerPC/llc_default_cpu.ll
M llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll
M llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll
M llvm/test/CodeGen/PowerPC/mflr-store.mir
M llvm/test/CodeGen/PowerPC/noredzone.ll
M llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll
M llvm/test/CodeGen/PowerPC/peephole-replaceInstr-after-eliminate-extsw.mir
M llvm/test/CodeGen/PowerPC/popcnt-zext.ll
M llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll
M llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
M llvm/test/CodeGen/PowerPC/ppc64-nest.ll
M llvm/test/CodeGen/PowerPC/ppc64-stackmap-nops.ll
M llvm/test/CodeGen/PowerPC/ppc64-varargs.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/ppcsoftops.ll
M llvm/test/CodeGen/PowerPC/pr43976.ll
M llvm/test/CodeGen/PowerPC/pr47660.ll
M llvm/test/CodeGen/PowerPC/pr74951.ll
M llvm/test/CodeGen/PowerPC/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/PowerPC/stack-clash-dynamic-alloca.ll
M llvm/test/CodeGen/PowerPC/stack-clash-prologue.ll
M llvm/test/CodeGen/PowerPC/stack-guard-global.ll
M llvm/test/CodeGen/PowerPC/stack-guard-tls.ll
M llvm/test/CodeGen/PowerPC/stack-restore-with-setjmp.ll
M llvm/test/CodeGen/PowerPC/store-forward-be32.ll
M llvm/test/CodeGen/PowerPC/store-forward-be64.ll
M llvm/test/CodeGen/PowerPC/sub-of-not.ll
M llvm/test/CodeGen/PowerPC/toc-data-common.ll
M llvm/test/CodeGen/PowerPC/toc-data-const.ll
M llvm/test/CodeGen/PowerPC/toc-data.ll
M llvm/test/CodeGen/PowerPC/tocdata-non-zero-addend.mir
M llvm/test/CodeGen/PowerPC/uaddo-64.ll
M llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/PowerPC/vec-trunc2.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
A llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64-double-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64-float-convert.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/stacksave-stackrestore.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/O0-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/addrspacecast.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/branch-relaxation.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/fp-fcanonicalize.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/frame-info.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/hwasan-check-memaccess.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
M llvm/test/CodeGen/RISCV/inline-asm-zfh-constraint-f.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/kcfi-mir.ll
M llvm/test/CodeGen/RISCV/large-stack.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
M llvm/test/CodeGen/RISCV/lpad.ll
A llvm/test/CodeGen/RISCV/memcmp-optsize.ll
A llvm/test/CodeGen/RISCV/memcmp.ll
A llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr58025.ll
M llvm/test/CodeGen/RISCV/pr58286.ll
M llvm/test/CodeGen/RISCV/pr63365.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/pr88365.ll
M llvm/test/CodeGen/RISCV/prolog-epilogue.ll
M llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
A llvm/test/CodeGen/RISCV/rv64-double-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-double-convert.ll
A llvm/test/CodeGen/RISCV/rv64-float-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-float-convert.ll
A llvm/test/CodeGen/RISCV/rv64-half-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-half-convert.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64-stackmap-nops.ll
M llvm/test/CodeGen/RISCV/rv64-statepoint-call-lowering.ll
M llvm/test/CodeGen/RISCV/rv64d-double-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64d-double-convert.ll
M llvm/test/CodeGen/RISCV/rv64f-float-convert-strict.ll
M llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-negative.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir
M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr93587.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/stack-folding.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-int.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/stack-inst-compress.mir
M llvm/test/CodeGen/RISCV/stack-offset.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
A llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
A llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
M llvm/test/CodeGen/RISCV/vlenb.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xcvbi.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
M llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir
M llvm/test/CodeGen/RISCV/zcmp-prolog-epilog-crash.mir
M llvm/test/CodeGen/RISCV/zcmp-with-float.ll
M llvm/test/CodeGen/RISCV/zdinx-large-spill.mir
A llvm/test/CodeGen/SPIRV/decoration-order.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
A llvm/test/CodeGen/SPIRV/no-opbitcast-between-identical-types.ll
M llvm/test/CodeGen/SPIRV/optimizations/add-check-overflow.ll
A llvm/test/CodeGen/SPIRV/pointers/OpExtInst-OpenCL_std-ptr-types.ll
A llvm/test/CodeGen/SPIRV/pointers/composite-fun-fix-ptr-arg.ll
M llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
A llvm/test/CodeGen/SystemZ/liverangeedit-kill-memop.mir
A llvm/test/CodeGen/SystemZ/xray.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-const.ll
M llvm/test/CodeGen/Thumb2/mve-doublereduct.ll
M llvm/test/CodeGen/Thumb2/mve-gather-optimisation-deep.ll
A llvm/test/CodeGen/Thumb2/mve-vadc-vsbc-spill.ll
M llvm/test/CodeGen/Thumb2/mve-vcmla.ll
M llvm/test/CodeGen/Thumb2/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
A llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/combine-srem.ll
M llvm/test/CodeGen/X86/combine-udiv.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
A llvm/test/CodeGen/X86/pr114520.ll
M llvm/test/CodeGen/X86/pr62286.ll
M llvm/test/CodeGen/X86/pr67333.ll
M llvm/test/CodeGen/X86/sad.ll
M llvm/test/CodeGen/X86/scmp.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
A llvm/test/CodeGen/X86/tls-function-argument.ll
R llvm/test/CodeGen/X86/tls-loads-control.ll
R llvm/test/CodeGen/X86/tls-loads-control2.ll
R llvm/test/CodeGen/X86/tls-loads-control3.ll
A llvm/test/CodeGen/X86/trunc-nsw-nuw.ll
M llvm/test/CodeGen/X86/vector-bo-select.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
A llvm/test/DebugInfo/AArch64/num_extra_inhabitants.ll
M llvm/test/DebugInfo/ARM/illegal-fragment.ll
M llvm/test/DebugInfo/ARM/machine-cp-updates-dbg-reg.mir
M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
M llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
M llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
M llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
M llvm/test/DebugInfo/X86/dbg-value-terminator.ll
M llvm/test/DebugInfo/X86/deleted-bit-piece.ll
M llvm/test/DebugInfo/X86/earlydup-crash.ll
M llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
M llvm/test/DebugInfo/X86/mem2reg_fp80.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
M llvm/test/DebugInfo/XCOFF/empty.ll
M llvm/test/DebugInfo/XCOFF/explicit-section.ll
M llvm/test/DebugInfo/XCOFF/function-sections.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg2-dead-block-order.ll
M llvm/test/ExecutionEngine/OrcLazy/lit.local.cfg
M llvm/test/ExecutionEngine/OrcLazy/minimal-throw-catch.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vshift.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_tbl.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/reduce.ll
M llvm/test/Instrumentation/MemorySanitizer/vector-track-origins-neon.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/Linker/pr22807.ll
M llvm/test/MC/AArch64/SME/revd-diagnostics.s
M llvm/test/MC/AArch64/SME/revd.s
A llvm/test/MC/AArch64/SME2p2/fmop4a-fp8-fp16-widening-diagnostics.s
A llvm/test/MC/AArch64/SME2p2/fmop4a-fp8-fp16-widening.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vsample.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg_features.txt
R llvm/test/MC/Disassembler/X86/amx-transpose-att.s
R llvm/test/MC/Disassembler/X86/amx-transpose-intel.s
A llvm/test/MC/X86/amx-transpose-att.s
A llvm/test/MC/X86/amx-transpose-intel.s
M llvm/test/MC/X86/intel-syntax-ambiguous.s
M llvm/test/MC/X86/intel-syntax-ptr-sized.s
M llvm/test/ObjectYAML/wasm/target-features-section.yaml
M llvm/test/Other/loop-pass-ordering.ll
M llvm/test/Other/loopnest-pass-ordering.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/Other/opt-bisect-new-pass-manager.ll
M llvm/test/SafepointIRVerifier/from-same-relocation-in-phi-nodes.ll
M llvm/test/SafepointIRVerifier/unrecorded-live-at-sp.ll
M llvm/test/SafepointIRVerifier/uses-in-phi-nodes.ll
A llvm/test/TableGen/ArtificialSubregs.td
A llvm/test/TableGen/x86-instr-mapping.inc
A llvm/test/TableGen/x86-instr-mapping.td
M llvm/test/Transforms/AggressiveInstCombine/ARM/fptosisat.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/fptosisat.ll
M llvm/test/Transforms/AggressiveInstCombine/masked-cmp.ll
M llvm/test/Transforms/AggressiveInstCombine/popcount.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_multi_uses.ll
M llvm/test/Transforms/AggressiveInstCombine/vector-or-load.ll
M llvm/test/Transforms/ArgumentPromotion/pr33641_remove_arg_dbgvalue.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-integer-ops-0-to-add-0.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll
M llvm/test/Transforms/Attributor/nofpclass-powi.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info-vec.ll
M llvm/test/Transforms/BDCE/binops-multiuse.ll
M llvm/test/Transforms/BDCE/dead-uses.ll
M llvm/test/Transforms/BDCE/vectors-inseltpoison.ll
M llvm/test/Transforms/BDCE/vectors.ll
M llvm/test/Transforms/CodeGenPrepare/X86/fold-loop-of-urem.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/large-immediate.ll
A llvm/test/Transforms/ConstantHoisting/ARM/apint-assert.ll
M llvm/test/Transforms/ConstraintElimination/geps-ptrvector.ll
M llvm/test/Transforms/ConstraintElimination/vector-compares.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon.ll
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
M llvm/test/Transforms/CorrelatedValuePropagation/overflows.ll
M llvm/test/Transforms/CorrelatedValuePropagation/urem.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
M llvm/test/Transforms/DeadStoreElimination/X86/gather-null-pointer.ll
M llvm/test/Transforms/DeadStoreElimination/masked-dead-store.ll
M llvm/test/Transforms/DeadStoreElimination/offsetted-overlapping-stores.ll
M llvm/test/Transforms/DivRemPairs/AMDGPU/div-rem-pairs.ll
M llvm/test/Transforms/EarlyCSE/commute.ll
M llvm/test/Transforms/EarlyCSE/gep.ll
A llvm/test/Transforms/FunctionSpecialization/cmp-with-range.ll
A llvm/test/Transforms/FunctionSpecialization/solver-constants.ll
A llvm/test/Transforms/FunctionSpecialization/solver-dead-blocks.ll
A llvm/test/Transforms/FunctionSpecialization/ssa-copy.ll
M llvm/test/Transforms/GVN/edge.ll
M llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll
M llvm/test/Transforms/GVN/non-integral-pointers.ll
M llvm/test/Transforms/IROutliner/included-phi-nodes-end.ll
M llvm/test/Transforms/IROutliner/region-inputs-in-phi-nodes.ll
M llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll
M llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
M llvm/test/Transforms/InferAddressSpaces/masked-gather-scatter.ll
M llvm/test/Transforms/InstCombine/2007-03-21-SignedRangeTest.ll
M llvm/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll
M llvm/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
M llvm/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll
M llvm/test/Transforms/InstCombine/AArch64/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/aes-intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll
M llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
M llvm/test/Transforms/InstCombine/X86/x86-movmsk.ll
M llvm/test/Transforms/InstCombine/X86/x86-muldq-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-muldq.ll
M llvm/test/Transforms/InstCombine/X86/x86-pack-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-pack.ll
M llvm/test/Transforms/InstCombine/X86/x86-pmulh.ll
M llvm/test/Transforms/InstCombine/X86/x86-pmulhrs.ll
M llvm/test/Transforms/InstCombine/X86/x86-ternlog.ll
M llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
M llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-xop.ll
M llvm/test/Transforms/InstCombine/abs-1.ll
M llvm/test/Transforms/InstCombine/abs-intrinsic.ll
M llvm/test/Transforms/InstCombine/add-mask-neg.ll
M llvm/test/Transforms/InstCombine/add-mask.ll
M llvm/test/Transforms/InstCombine/add-shl-sdiv-to-srem.ll
M llvm/test/Transforms/InstCombine/add-sitofp.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/add4.ll
M llvm/test/Transforms/InstCombine/add_or_sub.ll
M llvm/test/Transforms/InstCombine/addsub-constant-folding.ll
M llvm/test/Transforms/InstCombine/adjust-for-minmax.ll
M llvm/test/Transforms/InstCombine/and-compare.ll
M llvm/test/Transforms/InstCombine/and-fcmp.ll
M llvm/test/Transforms/InstCombine/and-or-icmp-const-icmp.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/and-or-not.ll
M llvm/test/Transforms/InstCombine/and-or.ll
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/and.ll
M llvm/test/Transforms/InstCombine/and2.ll
M llvm/test/Transforms/InstCombine/apint-add.ll
M llvm/test/Transforms/InstCombine/apint-mul1.ll
M llvm/test/Transforms/InstCombine/apint-mul2.ll
M llvm/test/Transforms/InstCombine/apint-select.ll
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/ashr-demand.ll
M llvm/test/Transforms/InstCombine/ashr-lshr.ll
M llvm/test/Transforms/InstCombine/avg-lsb.ll
M llvm/test/Transforms/InstCombine/binop-and-shifts.ll
M llvm/test/Transforms/InstCombine/binop-cast.ll
M llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll
M llvm/test/Transforms/InstCombine/binop-select-cast-of-select-cond.ll
M llvm/test/Transforms/InstCombine/binop-select.ll
M llvm/test/Transforms/InstCombine/bit-checks.ll
M llvm/test/Transforms/InstCombine/bit_ceil.ll
M llvm/test/Transforms/InstCombine/bit_floor.ll
M llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll
M llvm/test/Transforms/InstCombine/bitcast.ll
M llvm/test/Transforms/InstCombine/bitreverse.ll
M llvm/test/Transforms/InstCombine/bswap-fold.ll
M llvm/test/Transforms/InstCombine/bswap.ll
M llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll
M llvm/test/Transforms/InstCombine/canonicalize-clamp-like-pattern-between-negative-and-positive-thresholds.ll
M llvm/test/Transforms/InstCombine/canonicalize-clamp-like-pattern-between-zero-and-positive-threshold.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ugt-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ule-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-fcmp-inf.ll
M llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v3-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v3-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll
M llvm/test/Transforms/InstCombine/canonicalize-shl-lshr-to-masking.ll
M llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/canonicalize.ll
M llvm/test/Transforms/InstCombine/cast-int-fcmp-eq-0.ll
M llvm/test/Transforms/InstCombine/cast-int-icmp-eq-0.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
M llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
M llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
M llvm/test/Transforms/InstCombine/compare-signs.ll
M llvm/test/Transforms/InstCombine/compare-udiv.ll
M llvm/test/Transforms/InstCombine/consecutive-ptrmask.ll
M llvm/test/Transforms/InstCombine/copysign-fneg-fabs.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/demorgan.ll
M llvm/test/Transforms/InstCombine/dependent-ivs.ll
M llvm/test/Transforms/InstCombine/div-shift.ll
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/eq-of-parts.ll
M llvm/test/Transforms/InstCombine/exact.ll
M llvm/test/Transforms/InstCombine/exp2-1.ll
M llvm/test/Transforms/InstCombine/exp2-to-ldexp.ll
M llvm/test/Transforms/InstCombine/fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fabs-copysign.ll
M llvm/test/Transforms/InstCombine/fabs-fneg-fold.ll
M llvm/test/Transforms/InstCombine/fadd.ll
M llvm/test/Transforms/InstCombine/fast-math.ll
M llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/fma.ll
M llvm/test/Transforms/InstCombine/fmul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/fmul-sqrt.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fneg-as-int.ll
M llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fold-bin-operand.ll
M llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
M llvm/test/Transforms/InstCombine/fold-select-fmul-if-zero.ll
M llvm/test/Transforms/InstCombine/fold-select-trunc.ll
M llvm/test/Transforms/InstCombine/fold-signbit-test-power2.ll
M llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll
M llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
M llvm/test/Transforms/InstCombine/fsh.ll
M llvm/test/Transforms/InstCombine/funnel.ll
M llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
M llvm/test/Transforms/InstCombine/gep-custom-dl.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/get-lowbitmask-upto-and-including-bit.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/high-bit-signmask-with-trunc.ll
M llvm/test/Transforms/InstCombine/high-bit-signmask.ll
M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation-with-constant.ll
M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation.ll
M llvm/test/Transforms/InstCombine/hoist-not-from-ashr-operand.ll
M llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
M llvm/test/Transforms/InstCombine/icmp-add.ll
M llvm/test/Transforms/InstCombine/icmp-and-shift.ll
M llvm/test/Transforms/InstCombine/icmp-div-constant.ll
M llvm/test/Transforms/InstCombine/icmp-fsh.ll
M llvm/test/Transforms/InstCombine/icmp-logical.ll
M llvm/test/Transforms/InstCombine/icmp-mul-and.ll
M llvm/test/Transforms/InstCombine/icmp-mul.ll
M llvm/test/Transforms/InstCombine/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstCombine/icmp-of-and-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-or-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll
M llvm/test/Transforms/InstCombine/icmp-or.ll
M llvm/test/Transforms/InstCombine/icmp-power2-and-icmp-shifted-mask.ll
M llvm/test/Transforms/InstCombine/icmp-range.ll
M llvm/test/Transforms/InstCombine/icmp-rotate.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
M llvm/test/Transforms/InstCombine/icmp-shl-1-overflow.ll
M llvm/test/Transforms/InstCombine/icmp-shl-nsw.ll
M llvm/test/Transforms/InstCombine/icmp-shl-nuw.ll
M llvm/test/Transforms/InstCombine/icmp-shl.ll
M llvm/test/Transforms/InstCombine/icmp-shr-lt-gt.ll
M llvm/test/Transforms/InstCombine/icmp-shr.ll
M llvm/test/Transforms/InstCombine/icmp-signmask.ll
M llvm/test/Transforms/InstCombine/icmp-sub.ll
M llvm/test/Transforms/InstCombine/icmp-trunc.ll
M llvm/test/Transforms/InstCombine/icmp-uadd-sat.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-usub-sat.ll
M llvm/test/Transforms/InstCombine/icmp-vec-inseltpoison.ll
M llvm/test/Transforms/InstCombine/icmp-vec.ll
M llvm/test/Transforms/InstCombine/icmp-with-selects.ll
M llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll
M llvm/test/Transforms/InstCombine/insertelement.ll
M llvm/test/Transforms/InstCombine/integer-round-up-pow2-alignment.ll
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
M llvm/test/Transforms/InstCombine/intrinsics.ll
M llvm/test/Transforms/InstCombine/invert-variable-mask-in-masked-merge-vector.ll
M llvm/test/Transforms/InstCombine/is_fpclass.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/ldexp-ext.ll
M llvm/test/Transforms/InstCombine/ldexp.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
M llvm/test/Transforms/InstCombine/load-store-masked-constant-array.ll
M llvm/test/Transforms/InstCombine/log-pow.ll
M llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
M llvm/test/Transforms/InstCombine/logical-select.ll
M llvm/test/Transforms/InstCombine/low-bit-splat.ll
M llvm/test/Transforms/InstCombine/lshr-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/lshr-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/lshr-trunc-sext-to-ashr-sext.ll
M llvm/test/Transforms/InstCombine/lshr.ll
M llvm/test/Transforms/InstCombine/masked-merge-add.ll
M llvm/test/Transforms/InstCombine/masked-merge-and-of-ors.ll
M llvm/test/Transforms/InstCombine/masked-merge-or.ll
M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
M llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll
M llvm/test/Transforms/InstCombine/masked_intrinsics.ll
M llvm/test/Transforms/InstCombine/max-of-nots.ll
M llvm/test/Transforms/InstCombine/maximum.ll
M llvm/test/Transforms/InstCombine/maxnum.ll
M llvm/test/Transforms/InstCombine/merge-icmp.ll
M llvm/test/Transforms/InstCombine/min-positive.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
M llvm/test/Transforms/InstCombine/minmax-of-xor-x.ll
M llvm/test/Transforms/InstCombine/modulo.ll
M llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/mul-masked-bits.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/mul_fold.ll
M llvm/test/Transforms/InstCombine/narrow-math.ll
M llvm/test/Transforms/InstCombine/narrow.ll
M llvm/test/Transforms/InstCombine/negated-bitmask.ll
M llvm/test/Transforms/InstCombine/nested-select.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/nsw-inseltpoison.ll
M llvm/test/Transforms/InstCombine/nsw.ll
M llvm/test/Transforms/InstCombine/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
M llvm/test/Transforms/InstCombine/onehot_merge.ll
M llvm/test/Transforms/InstCombine/operand-complexity.ll
M llvm/test/Transforms/InstCombine/or-concat.ll
M llvm/test/Transforms/InstCombine/or-xor.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/overflow-mul.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-a.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-c.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-d.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-e.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-e.ll
M llvm/test/Transforms/InstCombine/pow-0.ll
M llvm/test/Transforms/InstCombine/pow-1.ll
M llvm/test/Transforms/InstCombine/pow-sqrt.ll
M llvm/test/Transforms/InstCombine/pow-to-ldexp.ll
M llvm/test/Transforms/InstCombine/pow_fp_int.ll
M llvm/test/Transforms/InstCombine/pr14365.ll
M llvm/test/Transforms/InstCombine/pr17827.ll
M llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll
M llvm/test/Transforms/InstCombine/pr38984.ll
M llvm/test/Transforms/InstCombine/pr53357.ll
M llvm/test/Transforms/InstCombine/pr98435.ll
M llvm/test/Transforms/InstCombine/ptrmask.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-a.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-c.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-d.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-e.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-f.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll
M llvm/test/Transforms/InstCombine/redundant-right-shift-input-masking.ll
M llvm/test/Transforms/InstCombine/rem-mul-shl.ll
M llvm/test/Transforms/InstCombine/rem.ll
M llvm/test/Transforms/InstCombine/reuse-constant-from-select-in-icmp.ll
M llvm/test/Transforms/InstCombine/rotate.ll
M llvm/test/Transforms/InstCombine/sadd-with-overflow.ll
M llvm/test/Transforms/InstCombine/sadd_sat.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/scalarization.ll
M llvm/test/Transforms/InstCombine/sdiv-canonicalize.ll
M llvm/test/Transforms/InstCombine/sdiv-exact-by-negative-power-of-two.ll
M llvm/test/Transforms/InstCombine/sdiv-exact-by-power-of-two.ll
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-bitext.ll
M llvm/test/Transforms/InstCombine/select-divrem.ll
M llvm/test/Transforms/InstCombine/select-extractelement.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
M llvm/test/Transforms/InstCombine/select-icmp-and-zero-shl.ll
M llvm/test/Transforms/InstCombine/select-icmp-and.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
M llvm/test/Transforms/InstCombine/select-safe-transforms.ll
M llvm/test/Transforms/InstCombine/select-value-equivalence.ll
M llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/select_meta.ll
M llvm/test/Transforms/InstCombine/set-lowbits-mask-canonicalize.ll
M llvm/test/Transforms/InstCombine/set.ll
M llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll
M llvm/test/Transforms/InstCombine/sext.ll
M llvm/test/Transforms/InstCombine/shift-add.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-shl.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-shl.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
M llvm/test/Transforms/InstCombine/shift-logic.ll
M llvm/test/Transforms/InstCombine/shift-shift.ll
M llvm/test/Transforms/InstCombine/shift-sra.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/shl-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/shl-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/shl-bo.ll
M llvm/test/Transforms/InstCombine/shl-demand.ll
M llvm/test/Transforms/InstCombine/shl-sub.ll
M llvm/test/Transforms/InstCombine/shl-unsigned-cmp-const.ll
M llvm/test/Transforms/InstCombine/shuffle_select-inseltpoison.ll
M llvm/test/Transforms/InstCombine/shuffle_select.ll
M llvm/test/Transforms/InstCombine/signbit-lshr-and-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signbit-shl-and-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signed-mul-lack-of-overflow-check-via-mul-sdiv.ll
M llvm/test/Transforms/InstCombine/signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/signext.ll
M llvm/test/Transforms/InstCombine/signmask-of-sext-vs-of-shl-of-zext.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/test/Transforms/InstCombine/smin-icmp.ll
M llvm/test/Transforms/InstCombine/sqrt.ll
M llvm/test/Transforms/InstCombine/ssub-with-overflow.ll
M llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-lshr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible.ll
M llvm/test/Transforms/InstCombine/sub-xor.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
M llvm/test/Transforms/InstCombine/trunc-demand.ll
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
M llvm/test/Transforms/InstCombine/trunc-shl-zext.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
M llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
M llvm/test/Transforms/InstCombine/uaddo.ll
M llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll
M llvm/test/Transforms/InstCombine/umin_cttz_ctlz.ll
M llvm/test/Transforms/InstCombine/unfold-masked-merge-with-const-mask-vector.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-mul-udiv.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/unsigned_saturated_sub.ll
M llvm/test/Transforms/InstCombine/variable-signext-of-variable-high-bit-extraction.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract.ll
M llvm/test/Transforms/InstCombine/vec_sext.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll
M llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vector-casts.ll
M llvm/test/Transforms/InstCombine/vector-mul.ll
M llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll
M llvm/test/Transforms/InstCombine/vector-trunc.ll
M llvm/test/Transforms/InstCombine/vector-udiv.ll
M llvm/test/Transforms/InstCombine/vector-urem.ll
M llvm/test/Transforms/InstCombine/vector-xor.ll
M llvm/test/Transforms/InstCombine/with_overflow.ll
M llvm/test/Transforms/InstCombine/xor-and-or.ll
M llvm/test/Transforms/InstCombine/xor-ashr.ll
M llvm/test/Transforms/InstCombine/xor-icmps.ll
M llvm/test/Transforms/InstCombine/xor-of-or.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/xor2.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/InstCombine/zext.ll
M llvm/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
M llvm/test/Transforms/InstSimplify/ConstProp/2002-03-11-ConstPropCrash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/2002-05-03-DivideByZeroException.ll
M llvm/test/Transforms/InstSimplify/ConstProp/ARM/mve-vctp.ll
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
M llvm/test/Transforms/InstSimplify/ConstProp/bitcast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/cast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
M llvm/test/Transforms/InstSimplify/abs_intrinsic.ll
M llvm/test/Transforms/InstSimplify/add_vp.ll
M llvm/test/Transforms/InstSimplify/addsub.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/InstSimplify/bitreverse-fold.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/InstSimplify/canonicalize.ll
M llvm/test/Transforms/InstSimplify/cast-unsigned-icmp-cmp-0.ll
M llvm/test/Transforms/InstSimplify/cmp-vec-fast-path.ll
M llvm/test/Transforms/InstSimplify/compare.ll
M llvm/test/Transforms/InstSimplify/constantfold-add-nuw-allones-to-allones.ll
M llvm/test/Transforms/InstSimplify/constantfold-shl-nuw-C-to-C.ll
M llvm/test/Transforms/InstSimplify/ctpop-pow2.ll
M llvm/test/Transforms/InstSimplify/div.ll
M llvm/test/Transforms/InstSimplify/exp10.ll
M llvm/test/Transforms/InstSimplify/fast-math-strictfp.ll
M llvm/test/Transforms/InstSimplify/fast-math.ll
M llvm/test/Transforms/InstSimplify/fdiv.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic-strictfp.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic.ll
M llvm/test/Transforms/InstSimplify/floating-point-compare.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/fptoi-range.ll
M llvm/test/Transforms/InstSimplify/frexp.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/icmp-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp.ll
M llvm/test/Transforms/InstSimplify/implies.ll
M llvm/test/Transforms/InstSimplify/insertelement.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-non-zero.ll
M llvm/test/Transforms/InstSimplify/maxmin_intrinsics.ll
M llvm/test/Transforms/InstSimplify/negate.ll
M llvm/test/Transforms/InstSimplify/or-icmps-same-ops.ll
M llvm/test/Transforms/InstSimplify/or.ll
M llvm/test/Transforms/InstSimplify/pr28725.ll
M llvm/test/Transforms/InstSimplify/ptrmask.ll
M llvm/test/Transforms/InstSimplify/rem.ll
M llvm/test/Transforms/InstSimplify/returned.ll
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/sdiv.ll
M llvm/test/Transforms/InstSimplify/select-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/select-logical.ll
M llvm/test/Transforms/InstSimplify/select.ll
M llvm/test/Transforms/InstSimplify/select_or_and.ll
M llvm/test/Transforms/InstSimplify/shift-knownbits.ll
M llvm/test/Transforms/InstSimplify/shift.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
M llvm/test/Transforms/InstSimplify/shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/shufflevector.ll
M llvm/test/Transforms/InstSimplify/strictfp-fadd.ll
M llvm/test/Transforms/InstSimplify/uscmp.ll
M llvm/test/Transforms/InstSimplify/vec-cmp.ll
M llvm/test/Transforms/InstSimplify/vec-icmp-of-cast.ll
M llvm/test/Transforms/InstSimplify/vector_gep.ll
M llvm/test/Transforms/InstSimplify/xor.ll
M llvm/test/Transforms/InterleavedAccess/X86/interleave-load-extract-shuffle-changes.ll
M llvm/test/Transforms/LoopDistribute/scev-inserted-runtime-check.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch-opaque-ptr.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch.ll
M llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
M llvm/test/Transforms/LoopUnroll/ARM/mve-upperbound.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors-inseltpoison.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors.ll
A llvm/test/Transforms/LoopUnroll/pr114879.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/streaming-compatible-sve-no-maximize-bandwidth.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/vplan-native-inner-loop-only.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-not-when-safe.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/induction_plus.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/preserve-or-disjoint.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-versioning.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-int-row-major.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-add-sub-double-row-major.ll
M llvm/test/Transforms/Mem2Reg/UndefValuesMerge.ll
M llvm/test/Transforms/MemCpyOpt/form-memset.ll
M llvm/test/Transforms/NewGVN/completeness.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/predicated-reduction.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/horiz-math-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/horiz-math.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr50555.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr88239.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vec-shift.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
A llvm/test/Transforms/PhaseOrdering/lto-argpromotion-ipsccp.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
M llvm/test/Transforms/Reassociate/fast-ReassociateVector.ll
M llvm/test/Transforms/Reassociate/negation.ll
M llvm/test/Transforms/Reassociate/xor_reassoc.ll
M llvm/test/Transforms/RewriteStatepointsForGC/vector-nonlive-clobber.ll
M llvm/test/Transforms/SCCP/add-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/intrinsics.ll
M llvm/test/Transforms/SCCP/ip-ranges-casts.ll
M llvm/test/Transforms/SCCP/overdefined-ext.ll
M llvm/test/Transforms/SCCP/trunc-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/vector-bitcast.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
Log Message:
-----------
Address @DavidSpickett's comments
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/f9c013ab73c7...fbe8a2f51320
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list