[all-commits] [llvm/llvm-project] 7c8287: [GISel][RISCV][AMDGPU] Add G_SHL, G_LSHR, G_ASHR t...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7c8287586690650ee8bca2282b2a20cc7dc40bde
      https://github.com/llvm/llvm-project/commit/7c8287586690650ee8bca2282b2a20cc7dc40bde
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-11-06 (Wed, 06 Nov 2024)

  Changed paths:
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
    M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll

  Log Message:
  -----------
  [GISel][RISCV][AMDGPU] Add G_SHL, G_LSHR, G_ASHR to binop_left_to_zero. (#115089)

Shifting 0 by any amount is still zero.



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