[all-commits] [llvm/llvm-project] ce067c: AMDGPU: Rename test file
Alexander Richardson via All-commits
all-commits at lists.llvm.org
Wed Nov 6 11:58:54 PST 2024
Branch: refs/heads/users/arichardson/spr/main.compiler-rt-reduce-build-output-for-tests
Home: https://github.com/llvm/llvm-project
Commit: ce067c5a3b96e009964dc60d6b6a0f4b33c345c7
https://github.com/llvm/llvm-project/commit/ce067c5a3b96e009964dc60d6b6a0f4b33c345c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
R llvm/test/CodeGen/AMDGPU/promote-alloca-invalid-vector-gep.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
AMDGPU: Rename test file
Commit: 592c0fe55f6d9a811028b5f3507be91458ab2713
https://github.com/llvm/llvm-project/commit/592c0fe55f6d9a811028b5f3507be91458ab2713
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Evaluate/fold-real.cpp
M flang/test/Evaluate/errors01.f90
Log Message:
-----------
[flang] Tweak a SCALE/IEEE_SCALB folding overflow warning message (#114994)
Commit: 7c3fdcc27603cd2d6b01fa7b057b3099da75bc8d
https://github.com/llvm/llvm-project/commit/7c3fdcc27603cd2d6b01fa7b057b3099da75bc8d
Author: Artem Belevich <tra at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/CodeGenCUDA/Inputs/cuda.h
A clang/test/CodeGenCUDA/grid-constant.cu
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/SemaCUDA/Inputs/cuda.h
A clang/test/SemaCUDA/grid-constant.cu
Log Message:
-----------
[CUDA] Add support for __grid_constant__ attribute (#114589)
LLVM support for the attribute has been implemented already, so it just
plumbs it through to the CUDA front-end.
One notable difference from NVCC is that the attribute can be used
regardless of the targeted GPU. On the older GPUs it will just be
ignored. The attribute is a performance hint, and does not warrant a
hard error if compiler can't benefit from it on a particular GPU
variant.
Commit: a993dfcdbf64ef7a8bd7e5ec4d97287b650d4f50
https://github.com/llvm/llvm-project/commit/a993dfcdbf64ef7a8bd7e5ec4d97287b650d4f50
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
A flang/test/Transforms/debug-assumed-rank-array.fir
Log Message:
-----------
[flang][debug] Support assumed-rank arrays. (#114404)
The assumed-rank array are represented by DIGenericSubrange in debug
metadata. We have to provide 2 things.
1. Expression to get rank value at the runtime from descriptor.
2. Assuming the dimension number for which we want the array information
has been put on the DWARF expression stack, expressions which will
extract the lowerBound, count and stride information from the descriptor
for the said dimension.
With this patch in place, this is how I see an assumed_rank variable
being evaluated by GDB.
```
function mean(x) result(y)
integer, intent(in) :: x(..)
...
end
program main
use mod
implicit none
integer :: x1,xvec(3),xmat(3,3),xtens(3,3,3)
x1 = 5
xvec = 6
xmat = 7
xtens = 8
print *,mean(xvec), mean(xmat), mean(xtens), mean(x1)
end program main
(gdb) p x
$1 = (6, 6, 6)
(gdb) p x
$2 = ((7, 7, 7) (7, 7, 7) (7, 7, 7))
(gdb) p x
$3 = (((8, 8, 8) (8, 8, 8) (8, 8, 8)) ((8, 8, 8) (8, 8, 8) (8, 8, 8)) ((8, 8, 8) (8, 8, 8) (8, 8, 8)))
(gdb) p x
$4 = 5
```
Commit: 9b9369e0bb0131ba0336d9adb4ef098b6dafc7f4
https://github.com/llvm/llvm-project/commit/9b9369e0bb0131ba0336d9adb4ef098b6dafc7f4
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][tensor] Improve `FoldTensorCastProducerOp` (dynamic shapes) (#114559)
Currently, `FoldTensorCastProducerOp` incorrectly folds the following:
```mlir
%pack = tensor.pack %src
padding_value(%pad : i32)
inner_dims_pos = [0, 1]
inner_tiles = [%c8, 1]
into %cast : tensor<7x?xi32> -> tensor<1x1x?x1xi32>
%res = tensor.cast %pack : tensor<1x1x?x1xi32> to tensor<1x1x8x1xi32>
```
as (note the static trailing dim in the result and dynamic tile
dimension that corresponds to that):
```mlir
%res = tensor.pack %src
padding_value(%pad : i32)
inner_dims_pos = [0, 1]
inner_tiles = [%c8, 1]
into %cast : tensor<7x?xi32> -> tensor<1x1x8x1xi32>
```
This triggers an Op verification failure and is due to the fact that the
folder does not update the inner tile sizes in the pack Op. This PR
addresses that.
Note, supporting other Ops with size-like attributes is left as a TODO.
Commit: d02d9ce314f823181430e9f21c89806f9227c95f
https://github.com/llvm/llvm-project/commit/d02d9ce314f823181430e9f21c89806f9227c95f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Tensor/IR/TensorOps.cpp:4781:17: error: unused
variable 'tileSize' [-Werror,-Wunused-variable]
Commit: a33d42ad5f916f5b782076ca84fe565589079c6f
https://github.com/llvm/llvm-project/commit/a33d42ad5f916f5b782076ca84fe565589079c6f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port ff5551cdb07f
Commit: c695a32576525b047f92b90de71eb707c152e29c
https://github.com/llvm/llvm-project/commit/c695a32576525b047f92b90de71eb707c152e29c
Author: David Olsen <dolsen at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/include/clang/CIR/CIRGenerator.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
A clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CIR/hello.c
Log Message:
-----------
[CIR] Call code gen; create empty cir.func op (#113483)
Finish hooking up ClangIR code gen into the Clang control flow,
initializing enough that basic code gen is possible.
Add an almost empty `cir.func` op to the ClangIR dialect. Currently the
only property of the function is its name. Add the code necessary to
code gen a cir.func op.
Create essentially empty files
clang/lib/CIR/Dialect/IR/{CIRAttrs.cpp,CIRTypes.cpp}. These will be
filled in later as attributes and types are defined in the ClangIR
dialect.
(Part of upstreaming the ClangIR incubator project into LLVM.)
Commit: 803f957e87e4083f6d61c8991171eeeaf0e6bd61
https://github.com/llvm/llvm-project/commit/803f957e87e4083f6d61c8991171eeeaf0e6bd61
Author: jimingham <jingham at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/source/Symbol/CompileUnit.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
A lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpoinsSameCUName.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/common.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/main.cpp
Log Message:
-----------
Fix a thinko in the CallSite handling code: (#114896)
I have to check for the sc list size being changed by the call-site
search, not just that it had more than one element.
Added a test for multiple CU's with the same name in a given module,
which would have caught this mistake.
We were also doing all the work to find call sites when the found decl
and specified decl's only difference was a column, but the incoming
specification hadn't specified a column (column number == 0).
Commit: 17d956588a2cc508acf98574f913eaef6d0e1af3
https://github.com/llvm/llvm-project/commit/17d956588a2cc508acf98574f913eaef6d0e1af3
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
Reapply "[tsan] Don't use `enum __tsan_memory_order` in tsan interface"" (#115034)
In C++ it's UB to use undeclared values as enum.
And there is support __ATOMIC_HLE_ACQUIRE and
__ATOMIC_HLE_RELEASE need such values.
So use `int` in TSAN interface, and mask out
irrelevant bits and cast to enum ASAP.
`ThreadSanitizer.cpp` already declare morder parameterd
in these functions as `i32`.
This may looks like a slight change, as we
previously didn't mask out additional bits for `fmo`,
and `NoTsanAtomic` call. But from implementation
it's clear that they are expecting exact enum.
Reverts llvm/llvm-project#115032
Reapply llvm/llvm-project#114724
Commit: db69d6939a93d1e401abe6bfe114e55b69297975
https://github.com/llvm/llvm-project/commit/db69d6939a93d1e401abe6bfe114e55b69297975
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/memory.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Support data transfer from descriptor to a pointer (#115023)
Data transfer from a variable with a descriptor to a pointer. We create
a descriptor for the pointer so we can use the flang runtime to perform
the transfer. The Assign function handles all corner cases. We add a new
entry points `CUFDataTransferDescDescNoRealloc` to avoid reallocation
since the variable on the LHS is not an allocatable.
Commit: e566ae8812af77d4ebfd14f4ebe6055a1f71cc02
https://github.com/llvm/llvm-project/commit/e566ae8812af77d4ebfd14f4ebe6055a1f71cc02
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
Log Message:
-----------
[RISCV][GISel] Remove s32 support for G_ABS on RV64.
I plan to remove s32 as a legal type to match SelectionDAG
and to remove i32 from the GPR regclass on RV64.
Commit: 8b659736f7393314a797b6cf2fa346316a624ecb
https://github.com/llvm/llvm-project/commit/8b659736f7393314a797b6cf2fa346316a624ecb
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
Log Message:
-----------
[SystemZ] Make lit test more specific (#115050)
The lit test fmuladd-soft-float.ll only specifies s390x as platform,
but the test is Linux specific, causing problems when run on z/OS.
This change updates the triple to fix this.
Commit: db1882e2484013066139f0b3f77d968d84a79158
https://github.com/llvm/llvm-project/commit/db1882e2484013066139f0b3f77d968d84a79158
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_interface_internal.h
A compiler-rt/lib/xray/xray_s390x.cpp
A compiler-rt/lib/xray/xray_trampoline_s390x.S
M compiler-rt/lib/xray/xray_tsc.h
Log Message:
-----------
[SystemZ][XRay] XRay runtime support for SystemZ (#113252)
Adds the runtime support routines for XRay on SystemZ. Only function
entry/exit is implemented.
Commit: 4a37799a489d80e505e3e20722570c47673476be
https://github.com/llvm/llvm-project/commit/4a37799a489d80e505e3e20722570c47673476be
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.h
A llvm/test/CodeGen/SystemZ/xray.ll
Log Message:
-----------
[SystemZ][XRay] Implement XRay instrumentation for SystemZ (#113253)
Expands pseudo instructions PATCHABLE_FUNCTION_ENTER and PATCHABLE_RET
into a small instruction sequence which calls into the XRay library.
Commit: 0c60573d1c2d19133d84da092b240f32e0574be5
https://github.com/llvm/llvm-project/commit/0c60573d1c2d19133d84da092b240f32e0574be5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
Log Message:
-----------
clang/AMDGPU: Emit grid size builtins with range metadata (#113038)
These cannot be 0.
Commit: 0b40f979298a2e7d4c3da7c067fc9747d0f93653
https://github.com/llvm/llvm-project/commit/0b40f979298a2e7d4c3da7c067fc9747d0f93653
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
R llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups.ll
Log Message:
-----------
AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (#113751)
0 does not make sense as a value for this to be, much less the default.
Also stop emitting each individual field if it is the default, rather than
if any element was the default. Also fix the name of the test since it didn't
exactly match the real attribute name.
Commit: 0428f2cb5a91cc93897252c9dc4883efea3dbd9a
https://github.com/llvm/llvm-project/commit/0428f2cb5a91cc93897252c9dc4883efea3dbd9a
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Driver/XRayArgs.cpp
M clang/test/Driver/XRay/xray-mode-flags.cpp
Log Message:
-----------
[SystemZ][XRay] Enable XRay for SystemZ in clang (#113254)
With the support for xray for SystemZ in place, the option can now be
enabled in clang.
Commit: e8644e3b474136da43344a5afeeae63268f980e1
https://github.com/llvm/llvm-project/commit/e8644e3b474136da43344a5afeeae63268f980e1
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/shrink-mad-fma.mir
Log Message:
-----------
[AMDGPU][True16][MC] VOP2 update instructions with fake16 format (#114436)
Some old "t16" VOP2 instructions are actually in fake16 format. Correct
and update test file
Commit: fbbd8b0741586794721639715d1d974db56f83ac
https://github.com/llvm/llvm-project/commit/fbbd8b0741586794721639715d1d974db56f83ac
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/lib/Semantics/rewrite-parse-tree.cpp
A flang/test/Semantics/rewrite03.f90
Log Message:
-----------
[flang] Fix rewriting of misparsed statement functions (#112934)
Fortran's syntax is ambiguous for some assignment statements (to array
elements or to the targets of pointers returned by functions) that
appear as the first executable statements in a subprogram or BLOCK
construct. Is A(I)=X a statement function definition at the end of the
specification part, or ar array element assignment statement, or an
assignment to a pointer returned by a function named A?
Since f18 builds a parse tree for the entire source file before
beginning any semantic analysis, we can't tell which is which until
after name resolution, at which point the symbol table has been built.
So we have to walk the parse tree and rewrite some misparsed statement
function definitions that really were assignment statements.
There's a bug in that code, though, due to the fact that the
implementation used state in the parse tree walker to hold a list of
misparsed statement function definitions extracted from one
specification part to be reinserted at the beginning of the next
execution part that is visited; it didn't work for misparsed cases BLOCK
constructs. Their parse tree nodes encapsulate a parser::Block, not an
instance of the wrapper class parser::ExecutionPart. So misparsed
statement functions in BLOCK constructs were being rewritten into
assignment statement that were inserted at the beginning of the
executable part of the following subprogram, if and wherever one
happened to occur. This led to crashes in lowering and much
astonishment.
A simple fix would have been to adjust the rewriting code to always
insert the list at the next visited parser::Block, since
parser::ExecutionPart is just a wrapper around Block anyway; but this
patch goes further to do the "right thing", which is a restructuring of
the rewrite that avoids the use of state and any assumptions about parse
tree walking visitation order.
Fixes https://github.com/llvm/llvm-project/issues/112549.
Commit: 07e053fb95e131244dafab04aae84650de383664
https://github.com/llvm/llvm-project/commit/07e053fb95e131244dafab04aae84650de383664
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/runtime/assign.cpp
Log Message:
-----------
[flang][runtime] Fix finalization case in assignment (#113611)
There were two bugs in derived type array assignment processing that
caused finalization to fail to occur for a test case. The first bug was
an off-by-one error in address overlap testing that caused a false
positive result for the test, whose left-hand side's allocatable's
descriptor was immediately adjacent in memory to the right-hand side's
array's data.
The second bug was that in such overlap cases (even when legitimate)
finalization would fail due to the LHS's descriptor having been copied
to a temporary for deferred deallocation and then nullified.
This patch corrects the overlap analysis for this test, and also
properly finalizes the LHS when overlap does exist. Some nearby dead
code was removed to avoid future confusion.
Fixes https://github.com/llvm/llvm-project/issues/113375.
Commit: 850d42fb145c636a3b56a7616c3e3c5c188c1916
https://github.com/llvm/llvm-project/commit/850d42fb145c636a3b56a7616c3e3c5c188c1916
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Parser/token-sequence.h
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/token-sequence.cpp
A flang/test/Preprocessing/defined-in-macro.F90
Log Message:
-----------
[flang] Handle "defined" in macro expansions (#114844)
The preprocessor implements "defined(X)" and "defined X" in if/elif
directive expressions in such a way that they only work at the top
level, not when they appear in macro expansions. Fix that, which is a
little tricky due to the need to detect the "defined" keyword before
applying any macro expansion to its argument, and add a bunch of tests.
Fixes https://github.com/llvm/llvm-project/issues/114064.
Commit: 97982a8c605fac7c86d02e641a6cd7898b3ca343
https://github.com/llvm/llvm-project/commit/97982a8c605fac7c86d02e641a6cd7898b3ca343
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/stacksave-stackrestore.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/O0-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/addrspacecast.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/branch-relaxation.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/fp-fcanonicalize.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/frame-info.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/hwasan-check-memaccess.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
M llvm/test/CodeGen/RISCV/inline-asm-zfh-constraint-f.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/kcfi-mir.ll
M llvm/test/CodeGen/RISCV/large-stack.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr58025.ll
M llvm/test/CodeGen/RISCV/pr58286.ll
M llvm/test/CodeGen/RISCV/pr63365.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/pr88365.ll
M llvm/test/CodeGen/RISCV/prolog-epilogue.ll
M llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64-stackmap-nops.ll
M llvm/test/CodeGen/RISCV/rv64-statepoint-call-lowering.ll
M llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir
M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr93587.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/stack-folding.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-int.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/stack-inst-compress.mir
M llvm/test/CodeGen/RISCV/stack-offset.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
M llvm/test/CodeGen/RISCV/vlenb.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xcvbi.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
M llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir
M llvm/test/CodeGen/RISCV/zcmp-prolog-epilog-crash.mir
M llvm/test/CodeGen/RISCV/zcmp-with-float.ll
M llvm/test/CodeGen/RISCV/zdinx-large-spill.mir
M llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
Log Message:
-----------
[RISCV][CFI] add function epilogue cfi information (#110810)
This patch adds CFI instructions in the function epilogue.
Before patch:
addi sp, s0, -32
ld ra, 24(sp) # 8-byte Folded Reload
ld s0, 16(sp) # 8-byte Folded Reload
ld s1, 8(sp) # 8-byte Folded Reload
addi sp, sp, 32
ret
After patch:
addi sp, s0, -32
.cfi_def_cfa sp, 32
ld ra, 24(sp) # 8-byte Folded Reload
ld s0, 16(sp) # 8-byte Folded Reload
ld s1, 8(sp) # 8-byte Folded Reload
.cfi_restore ra
.cfi_restore s0
.cfi_restore s1
addi sp, sp, 32
.cfi_def_cfa_offset 0
ret
This functionality is already present in `riscv-gcc`, but it’s not in
`clang` and this slightly impairs the `lldb` debugging experience, e.g.
backtrace.
Commit: b8ac87f34a6f4405bf8d91339a10f188db30aa3b
https://github.com/llvm/llvm-project/commit/b8ac87f34a6f4405bf8d91339a10f188db30aa3b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/lib/AsmParser/LLLexer.cpp
A llvm/test/Assembler/c-style-comment.ll
A llvm/test/Assembler/invalid-c-style-comment0.ll
A llvm/test/Assembler/invalid-c-style-comment1.ll
A llvm/test/Assembler/invalid-c-style-comment2.ll
A llvm/test/Assembler/invalid-c-style-comment3.ll
Log Message:
-----------
[LLVM][AsmParser] Add support for C style comments (#111554)
Add support for C style comments in LLVM assembly.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 97262afa6d78bcf332f26a02834b43ac31f87f94
https://github.com/llvm/llvm-project/commit/97262afa6d78bcf332f26a02834b43ac31f87f94
Author: Eric <eric at efcs.ca>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
Allow specifying libcxx builder image. (#110303)
This change attempts to shift the libc++ builders over to new backend
infrastructure that allows running an arbitrary container for the
libc++ job.
This has been a long time in the making, and support from github
and gke is finally at the point where it's possible (hopefully).
This change should also demonstrate another important property:
No Downtime Upgrades.
If this goes well, we'll be able to test the upgrade as a part
of the PR process, and then commiting it to main should (ideally)
not break anything.
Commit: fedb9fdb98314ff0ddff065dbd6ef8b2b7e6ec96
https://github.com/llvm/llvm-project/commit/fedb9fdb98314ff0ddff065dbd6ef8b2b7e6ec96
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libc/src/sys/socket/linux/recvmsg.cpp
Log Message:
-----------
[libc] Fix sendmsg iovec unpoisoning (#115057)
The unpoisoning for sendmsg had a typo where it would not unpoison all
of the elements in the iovec, causing msan errors. This patch fixes
that.
Commit: a353e258ba495be58263d6cc6e382e6dde298361
https://github.com/llvm/llvm-project/commit/a353e258ba495be58263d6cc6e382e6dde298361
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
M llvm/test/Transforms/LoopDistribute/scev-inserted-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-versioning.ll
Log Message:
-----------
[LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (#113126)
If we have a pointer AddRec, the maximum increment is
2^(pointer-index-wdith - 1) - 1. This means that if incrementing the
AddRec wraps, the distance between the previously accessed location and
the wrapped location is > 2^(pointer-index-wdith - 1), i.e. if the GEP
for the AddRec is inbounds, this would be poison due to the object being
larger than half the pointer index type space. The poison would be
immediate UB when the memory access gets executed..
Similar reasoning can be applied for decrements.
PR: https://github.com/llvm/llvm-project/pull/113126
Commit: 823625cf1d9aba4017a486cfdd3e4b9b94c5ef49
https://github.com/llvm/llvm-project/commit/823625cf1d9aba4017a486cfdd3e4b9b94c5ef49
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Simplify morder conversion (#115075)
All valid values should fit into a byte.
This slightly reduce generated code on x86_64.
Commit: dccb1fe879d6a949884523eab66a8a51cee93d1a
https://github.com/llvm/llvm-project/commit/dccb1fe879d6a949884523eab66a8a51cee93d1a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mul-cpop.s
Log Message:
-----------
[RISCV] Update latency of MUL & CPOP in SiFive P600's scheduling model (#115042)
It should be 2 cycles rather than 3 cycles.
Commit: 6d7e51de5ec46c1fcc7a7e80135f561a88a1296b
https://github.com/llvm/llvm-project/commit/6d7e51de5ec46c1fcc7a7e80135f561a88a1296b
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
Log Message:
-----------
[AMDGPU] Extend type support for update_dpp intrinsic (#114597)
We can split 64-bit DPP as a post-RA pseudo if control values are
supported, but cannot handle other types.
Commit: c1cec8c0dc5b0296f0bc86745b867ff72c0a21e3
https://github.com/llvm/llvm-project/commit/c1cec8c0dc5b0296f0bc86745b867ff72c0a21e3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed splat ordering for loads, NFC
Commit: ce0d085842c652620969001b9d0c12912cec2c24
https://github.com/llvm/llvm-project/commit/ce0d085842c652620969001b9d0c12912cec2c24
Author: vporpo <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Query the scheduler for legality (#114616)
This patch adds the legality check of whether the candidate instructions
can be scheduled together. This uses a Scheduler object.
Commit: 5e75f294f1e2900e75f1f1e2cc4e5abe46366047
https://github.com/llvm/llvm-project/commit/5e75f294f1e2900e75f1f1e2cc4e5abe46366047
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
Log Message:
-----------
[ORC] Replace RedirectionManager::SymbolAddrMap typedef with SymbolMap. NFC.
They're the same type -- no need for a separate typedef here.
Commit: 13b5899c2904ba6b1f5223bf86679d046212da98
https://github.com/llvm/llvm-project/commit/13b5899c2904ba6b1f5223bf86679d046212da98
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/X86/pr114520.ll
Log Message:
-----------
[SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (#114943)
In #70357, I changed a isLegalOrCustom to isLegalOrCustomOrPromote in
visitSelect to enable integer min/max to be formed when the operation
was promoted. Unfortunately, this also affected floating point. For
floating point, fmaxnum may require a libcall so we also need to check
if the operation on the promoted type is legal or custom.
Other changes to RISC-V have seen made the original change untested so
this patch restores the original isLegalOrCustom.
Fixes #114520.
Commit: a20b902b356e84ec4380d324f7c72772fef0c114
https://github.com/llvm/llvm-project/commit/a20b902b356e84ec4380d324f7c72772fef0c114
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Copy some Zbb and Zbkb IR tests. NFC
These are copies of SDAG tests with some of the more specialized
cases removed. We can add them later when we're ready to improve them.
Commit: 339f395ecef9b7f501a4c4d2b54f85c7f723b50c
https://github.com/llvm/llvm-project/commit/339f395ecef9b7f501a4c4d2b54f85c7f723b50c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
Log Message:
-----------
[RISCV][GISel] Enable commute_constant_to_rhs in RISCVPostLegalizerCombiner.
Commit: 3163f8348faf858dec920f303e95dcf48dc1ea72
https://github.com/llvm/llvm-project/commit/3163f8348faf858dec920f303e95dcf48dc1ea72
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Log Message:
-----------
[RISCV][GISel] Use boolean predicated legalization action methods to simplify code. NFC (#115063)
These allow us to pass a subtarget feature to conditionally enable the
legalization action.
These were added by a3010c77910c706be4c51ce4a95d51211e335a1f and are
used by AArch64.
Commit: 332fda86fb20c6c2cdc58976a8739c6a13110734
https://github.com/llvm/llvm-project/commit/332fda86fb20c6c2cdc58976a8739c6a13110734
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__flat_map/flat_map.h
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove <string> and <vector> includes from <flat_map> (#114876)
`<string>` doesn't seem to be required at all and `flat_map` doesn't
support `vector<bool>`, so we can include just `vector<T>`. This cuts
the include time in half on my system.
Commit: a905203b9ea5ff1b68ca5ab760d6101f64ff3362
https://github.com/llvm/llvm-project/commit/a905203b9ea5ff1b68ca5ab760d6101f64ff3362
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Prefer strided load for interleave load with only one lane active (#115069)
If only one of the elements is actually used, then we can legally use a
strided load in place of the segment load. Doing so reduces vector
register pressure, so if both segment and strided are believed to be
element/segment at a time, then prefer the strided load variant.
Note that I've seen the vectorizer emitting wide interleave loads to
represent a strided load, so this does happen in practice. It doesn't
matter much for small LMUL*NF, but at large NF can start causing
problems in register allocation.
Note that this patch only covers the fixed vector formation cases. In
theory, we should do the same patch for scalable, but we can currently
only represent NF2 in scalable IR, and NF2 is assumed to be optimized to
better than segment-at-a-time by default, so there's currently nothing
to do.
Commit: 4d374479bea4b33c5623ccfedc0870e396fc34cd
https://github.com/llvm/llvm-project/commit/4d374479bea4b33c5623ccfedc0870e396fc34cd
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[nfc][tsan] Replace some macros with templates (#114931)
Commit: 320389d4289c9bca579d74e9416bedb7fd4a0ef2
https://github.com/llvm/llvm-project/commit/320389d4289c9bca579d74e9416bedb7fd4a0ef2
Author: vporpo <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Generate vector instructions (#115087)
This patch implements some very basic code generation, for some opcodes.
Commit: d047488d4c4657be401ae01aa985c5a749f15168
https://github.com/llvm/llvm-project/commit/d047488d4c4657be401ae01aa985c5a749f15168
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec] Fix build warnings in VecUtilsTest
Commit: 435e58468a1a99a4bbfad88d060abd37a9bc6928
https://github.com/llvm/llvm-project/commit/435e58468a1a99a4bbfad88d060abd37a9bc6928
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/allocate_allocator_modifier_ast_print.cpp
A clang/test/OpenMP/allocate_allocator_modifier_codegen.cpp
A clang/test/OpenMP/allocate_allocator_modifier_messages.cpp
Log Message:
-----------
[clang][OpenMP] Add 'allocator' modifier for 'allocate' clause. (#114883)
The 'allocator' modifier is now accepted in the 'allocate' clause. Added
LIT tests covering codegen, PCH, template handling, and serialization
for 'allocator' modifier.
Added support for allocator-modifier to release notes.
Testing
- New allocate modifier LIT tests.
- OpenMP LIT tests.
- check-all
- relevant sollve_vv test cases
tests/5.2/scope/test_scope_allocate_construct.c
Commit: 92be2cb08632ea38f6fbc41adfeb475ba27447dd
https://github.com/llvm/llvm-project/commit/92be2cb08632ea38f6fbc41adfeb475ba27447dd
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/fp-rounding.ll
Log Message:
-----------
[LoongArch] Use LSX for scalar FP rounding with explicit rounding mode (#114766)
LoongArch FP base ISA only have frint.{s/d} instruction which reads the
global rounding mode. Utilize LSX for explicit rounding mode for scalar
ceil/floor/trunc/roundeven calls when -mlsx opend. It is faster than
calling the libm library functions.
Same as what gcc did:
https://gcc.gnu.org/pipermail/gcc-cvs/2023-November/394218.html
Commit: 4c3e1e3c4af1d215501a3b42655333a1167f0ab3
https://github.com/llvm/llvm-project/commit/4c3e1e3c4af1d215501a3b42655333a1167f0ab3
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCSchedule.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCSchedule.cpp
A llvm/test/CodeGen/AArch64/latency.ll
A llvm/test/CodeGen/ARM/latency.ll
Log Message:
-----------
[llvm][AsmPrinter] Add an option to print instruction latencies (#113243)
... matching what we have in the disassembler. This isn't turned on by
default since several of the scheduling models are not completely
accurate, and we don't want to be misleading.
Commit: db21dbd12a13c96786669df9142a3061813c47fb
https://github.com/llvm/llvm-project/commit/db21dbd12a13c96786669df9142a3061813c47fb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[RISCV][GISel] Add constant_fold_cast_op to RISCVPostLegalizerCombiner.
Commit: 11b768af3ed672c18c4197bf43273b31ccc3c95e
https://github.com/llvm/llvm-project/commit/11b768af3ed672c18c4197bf43273b31ccc3c95e
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix bug in invalidation of analyses
This makes sure we don't preserve analyses when we modify the IR.
This was causing errors in the EXPENSIVE_CHECKS build.
Commit: 9bc3102bea80f422f4f3b788186f6e1c636e0fba
https://github.com/llvm/llvm-project/commit/9bc3102bea80f422f4f3b788186f6e1c636e0fba
Author: Yun-Fly <yunfei.song at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
Log Message:
-----------
[mlir][scf] Extend consumer fusion to multiple tilable users (#111955)
Before, consumer fusion expects single usage(or others are terminator
op). This patch supports multiple tilable consumers fusion.
E.g.
```
%0 = scf.for {
...
%p = tiledProducer
...
}
%1 = tilableConsumer1 ins(%0 : ...)
%2 = tilableConsumer2 ins(%0 : ...)
```
===>
```
%0:3 = scf.for {
...
%p = tiledProducer
%1 = tiledConsumer1 ins(%p : ...)
%2 = tiledConsumer2 ins(%p : ...)
...
}
```
The key process is ensuring that the first user of loop
should not dominate any define of consumer operand(s).
Commit: 7c20bdf373d6cd7f35dee5c71cf94f0eb1be3200
https://github.com/llvm/llvm-project/commit/7c20bdf373d6cd7f35dee5c71cf94f0eb1be3200
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M lldb/unittests/Host/AlarmTest.cpp
Log Message:
-----------
[lldb] Fix synchronization in AlarmTest (NFC)
ThreadSanitizer detected a data race as if synchronized via sleep.
Commit: 3a26feb607c8cecc13d6ca4ed5213c3f9c10932c
https://github.com/llvm/llvm-project/commit/3a26feb607c8cecc13d6ca4ed5213c3f9c10932c
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
M llvm/test/Analysis/CostModel/RISCV/scalable-gather.ll
M llvm/test/Analysis/CostModel/RISCV/scalable-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
Log Message:
-----------
[RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (#114945)
In preparation for allowing zvfhmin and zvfbfmin in
isLegalElementTypeForRVV, this lowers fixed-length masked gathers and
scatters
We need to mark f16 and bf16 as legal in isLegalMaskedGatherScatter
otherwise ScalarizeMaskedMemIntrin will just scalarize them, but we can
move this back into isLegalElementTypeForRVV afterwards.
The scalarized codegen required #114938, #114927 and #114915 to not
crash.
Commit: 7fb13a934f19797cd722f2a80355690c21d6e3b9
https://github.com/llvm/llvm-project/commit/7fb13a934f19797cd722f2a80355690c21d6e3b9
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/IndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
Log Message:
-----------
[ORC] lazyReexports: Swap IndirectStubsManager for RedirectableSymbolsManager.
RedirectableSymbolsManager is a native SymbolStringPtr API (requires fewer
string operations) and has a narrower interface that permits a wider range of
implementations.
IndirectStubsManager is updated to make it a RedirectableSymbolsManager so that
existing uses continue to work.
Commit: 895a8e66c6d1e42519909981ab1bb0ad41231029
https://github.com/llvm/llvm-project/commit/895a8e66c6d1e42519909981ab1bb0ad41231029
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
Log Message:
-----------
[AArch64][GISel] Support neon.abs intrinsic for vector types (#107226)
This patch lowers the intrinsic to G_ABS and thus supports the intrinsic in GISel.
Commit: 236fda550d36d35a00785938c3e38b0f402aeda6
https://github.com/llvm/llvm-project/commit/236fda550d36d35a00785938c3e38b0f402aeda6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/CycleAnalysis.cpp
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/DemandedBits.cpp
M llvm/lib/Analysis/DomTreeUpdater.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
M llvm/lib/Analysis/IndirectCallPromotionAnalysis.cpp
M llvm/lib/Analysis/InstCount.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryLocation.cpp
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[Analysis] Remove unused includes (NFC) (#114936)
Identified with misc-include-cleaner.
Commit: 9ba0e5c27de210ca04937e87042e5e8541a9ee21
https://github.com/llvm/llvm-project/commit/9ba0e5c27de210ca04937e87042e5e8541a9ee21
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
R llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
Revert "[LoongArch][NFC] Pre-commit tests for codegen with alias analysis"
This reverts commit 445db93844cb50eeb6f587bef0749c2950b46e70.
Commit: a165bbddf9b47c11a0869d09cc32de1d2b19f89f
https://github.com/llvm/llvm-project/commit/a165bbddf9b47c11a0869d09cc32de1d2b19f89f
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
[LoongArch][NFC] Reland "Pre-commit tests for codegen with alias analysis"
Commit: e48d8f9fea69095757d3593a567316197ec70450
https://github.com/llvm/llvm-project/commit/e48d8f9fea69095757d3593a567316197ec70450
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/SemaCXX/cxx2c-placeholder-vars.cpp
Log Message:
-----------
[Clang] Correctly initialize placeholder fields from their initializers (#114196)
We made the incorrect assumption that names of fields are unique when
creating their default initializers.
We fix that by keeping track of the instantiaation pattern for field
decls that are placeholder vars,
like we already do for unamed fields.
Fixes #114069
Commit: d22d63a7855840dd6398b77dcad71f001788ac86
https://github.com/llvm/llvm-project/commit/d22d63a7855840dd6398b77dcad71f001788ac86
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
Log Message:
-----------
[MLIR][Affine] Fix signature of mlir::affine::permuteLoops (#111100)
The method doesn't mutate its argument. A mutable one was being passed
only to get around ArrayRef providing const on elements, which MLIR
doesn't use on IR types.
Commit: cbc7812565b0b0d60c0dadbd3743650f863237d4
https://github.com/llvm/llvm-project/commit/cbc7812565b0b0d60c0dadbd3743650f863237d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64d-double-convert.ll
Log Message:
-----------
[RISCV] Add Zdinx RUN line to rv64d-double-convert.ll. NFC
We already have a Zfinx RUN line for rv64f-float-convert.ll.
Commit: 492812f613280034b7c514d74113750814a3de76
https://github.com/llvm/llvm-project/commit/492812f613280034b7c514d74113750814a3de76
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Fix rethrow's index calculation (#114693)
So far we have assumed that we only rethrow the exception caught in the
innermost EH pad. This is true in code we directly generate, but after
inlining this may not be the case. For example, consider this code:
```ll
ehcleanup:
%0 = cleanuppad ...
call @destructor
cleanupret from %0 unwind label %catch.dispatch
```
If `destructor` gets inlined into this function, the code can be like
```ll
ehcleanup:
%0 = cleanuppad ...
invoke @throwing_func
to label %unreachale unwind label %catch.dispatch.i
catch.dispatch.i:
catchswitch ... [ label %catch.start.i ]
catch.start.i:
%1 = catchpad ...
invoke @some_function
to label %invoke.cont.i unwind label %terminate.i
invoke.cont.i:
catchret from %1 to label %destructor.exit
destructor.exit:
cleanupret from %0 unwind label %catch.dispatch
```
We lower a `cleanupret` into `rethrow`, which assumes it rethrows the
exception caught by the nearest dominating EH pad. But after the
inlining, the nearest dominating EH pad is not `ehcleanup` but
`catch.start.i`.
The problem exists in the same manner in the new (exnref) EH, because it
assumes the exception comes from the nearest EH pad and saves an exnref
from that EH pad and rethrows it (using `throw_ref`).
This problem can be fixed easily if `cleanupret` has the basic block
where its matching `cleanuppad` is. The bitcode instruction `cleanupret`
kind of has that info (it has a token from the `cleanuppad`), but that
info is lost when when we enter ISel, because `TargetSelectionDAG.td`'s
`cleanupret` node does not have any arguments:
https://github.com/llvm/llvm-project/blob/5091a359d9807db8f7d62375696f93fc34226969/llvm/include/llvm/Target/TargetSelectionDAG.td#L700
Note that `catchret` already has two basic block arguments, even though
neither of them means `catchpad`'s BB.
This PR adds the `cleanuppad`'s BB as an argument to `cleanupret` node
in ISel and uses it in the Wasm backend. Because this node is also used
in X86 backend we need to note its argument there too but nothing more
needs to change there as long as X86 doesn't need it.
---
- Details about changes in the Wasm backend:
After this PR, our pseudo `RETHROW` instruction takes a BB, which means
the EH pad whose exception it needs to rethrow. There are currently two
ways to generate a `RETHROW`: one is from `llvm.wasm.rethrow` intrinsic
and the other is from `CLEANUPRET` we discussed above. In case of
`llvm.wasm.rethrow`, we add a '0' as a placeholder argument when it is
lowered to a `RETHROW`, and change it to a BB in LateEHPrepare. As
written in the comments, this PR doesn't change how this BB is computed.
The BB argument will be converted to an immediate argument as with other
control flow instructions in CFGStackify.
In case of `CLEANUPRET`, it already has a BB argument pointing to an EH
pad, so it is just converted to a `RETHROW` with the same BB argument in
LateEHPrepare. This will also be lowered to an immediate in CFGStackify
with other control flow instructions.
---
Fixes #114600.
Commit: f4270045f49d4936cd1d60e49f780ae9b1c18fab
https://github.com/llvm/llvm-project/commit/f4270045f49d4936cd1d60e49f780ae9b1c18fab
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64d-double-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64f-float-convert-strict.ll
Log Message:
-----------
[RISCV] Add Zfinx/Zdinx RUN lines to rv64d-double-convert-strict.ll and rv64f-float-convert-strict.ll. NFC
Commit: 84ce230e4298672bb5247170d6183b31aa06fc4b
https://github.com/llvm/llvm-project/commit/84ce230e4298672bb5247170d6183b31aa06fc4b
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M libcxx/include/__random/binomial_distribution.h
Log Message:
-----------
[libcxx] Use `lgamma` rather than `lgamma_r` with LLVM libc (#109556)
`lgamma_r` is currently only available on GPU targets.
Commit: 4480a22c2b8587c761a44c4290e3fdd9e4be75d3
https://github.com/llvm/llvm-project/commit/4480a22c2b8587c761a44c4290e3fdd9e4be75d3
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
Log Message:
-----------
[LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (#101641)
Following #90184, this patch emits vp.merge intrinsic, which is used to
set the inactive lanes in a select operation to the RHS instead of
undef. Currently, it is applied to out-loop reduction for EVL
vectorization.
This patch performs transformation to convert
select(header_mask, LHS, RHS)
into
vp.merge(all-true, LHS, RHS, EVL)
And always use the predicated reduction select to set the incoming value
of the reduction phi to support out-loop reduction when using tail
folding with EVL.
TODO: Postpone the adjustment of the predicated reduction select to
VPlanTransform. The current adjustment might be too early, which could
lead to a situation where the predicated reduction select is adjusted,
but the EVL recipes cannot be successfully generated during
VPlanTransform.
Commit: 5adb5c05a2e9f31385fbba8b0436cbc07d91a44d
https://github.com/llvm/llvm-project/commit/5adb5c05a2e9f31385fbba8b0436cbc07d91a44d
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/memcmp-optsize.ll
A llvm/test/CodeGen/RISCV/memcmp.ll
Log Message:
-----------
[RISCV] Add tests for memcmp expansion
We add tests for the following cases:
* Length = 0, 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, 31, 32, 63, 64, 127,
128, runtime.
* Comparisons against zero.
* RUN lines for scalar/vector w/ or w/o strict align.
* Optimize for size.
Reviewers: topperc, preames
Reviewed By: topperc, preames
Pull Request: https://github.com/llvm/llvm-project/pull/107824
Commit: 0e907c17214aa3b1a60b66867fea3cc0f0dcbaa0
https://github.com/llvm/llvm-project/commit/0e907c17214aa3b1a60b66867fea3cc0f0dcbaa0
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/include/flang/Common/Fortran-features.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/Inputs/modfile70.mod
M flang/test/Semantics/modfile63.f90
A flang/test/Semantics/modfile70.f90
Log Message:
-----------
[flang] Prevent errors from being suppressed (#114420)
`ModFileReader::Say()` flags all messages as errors, but Flang was
mistakenly suppressing two errors when the `-w` flag was used, as they
were incorrectly conditioned to warning suppression. This fix ensures
that errors are reported regardless of the `-w` flag.
This commit also replaces two uses of `_warn_en_US` with `_err_en_US` to
prevent potential confusion in the future.
Commit: 6d719d9700261283e7f90cdaffb64a62d526f583
https://github.com/llvm/llvm-project/commit/6d719d9700261283e7f90cdaffb64a62d526f583
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/xray/CMakeLists.txt
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_interface_internal.h
R compiler-rt/lib/xray/xray_s390x.cpp
R compiler-rt/lib/xray/xray_trampoline_s390x.S
M compiler-rt/lib/xray/xray_tsc.h
Log Message:
-----------
Revert "[SystemZ][XRay] XRay runtime support for SystemZ (#113252)"
for causing: https://github.com/llvm/llvm-project/issues/115129
This reverts commit db1882e2484013066139f0b3f77d968d84a79158.
Commit: 41248b598b8b18febc62ea61938870def2421126
https://github.com/llvm/llvm-project/commit/41248b598b8b18febc62ea61938870def2421126
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/docs/CodeReview.rst
M llvm/docs/Contributing.rst
Log Message:
-----------
[docs] Update docs on code-review process (#111735)
Clarify expectations for handling new comments post-LGTM but pre-commit.
This change aims to standardize expectations when new comments are added
after a patch has received LGTM but before it has been committed.
Currently, approaches to this vary, and this update seeks to clarify
best practices.
Commit: 7a5b040e20394a4794b4360a56de8a172b5e27f4
https://github.com/llvm/llvm-project/commit/7a5b040e20394a4794b4360a56de8a172b5e27f4
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
Log Message:
-----------
[RISCV] Add initial support of memcmp expansion
There are two passes that have dependency on the implementation
of `TargetTransformInfo::enableMemCmpExpansion` : `MergeICmps` and
`ExpandMemCmp`.
This PR adds the initial implementation of `enableMemCmpExpansion`
so that we can have some basic benefits from these two passes.
We don't enable expansion when there is no unaligned access support
currently because there are some issues about unaligned loads and
stores in `ExpandMemcmp` pass. We should fix these issues and enable
the expansion later.
Vector case hasn't been tested as we don't generate inlined vector
instructions for memcmp currently.
Reviewers: preames, arcbbb, topperc, asb, dtcxzyw
Reviewed By: topperc, preames
Pull Request: https://github.com/llvm/llvm-project/pull/107548
Commit: c96a85abfde822f2eda9076eb40078389b21f23e
https://github.com/llvm/llvm-project/commit/c96a85abfde822f2eda9076eb40078389b21f23e
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][VectorToSPIRV] Add conversion for vector.extract with dynamic indices (#114137)
Commit: dc55d31f4cf5c97b56f6b7e1c24b70674cc15a01
https://github.com/llvm/llvm-project/commit/dc55d31f4cf5c97b56f6b7e1c24b70674cc15a01
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][tensor] Fix a crash in `ExtractOp::fold` (#115001)
This PR fixes a crash when the tensor of `tensor.extract` is a dense
resource elements attribute.
Fixes #114728.
Co-authored-by: jinzhi <jinzhi6 at huawei.com>
Commit: 08411c855f77bd7416725c280ad3dccdc00b7dd6
https://github.com/llvm/llvm-project/commit/08411c855f77bd7416725c280ad3dccdc00b7dd6
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/test/CodeGen/RISCV/copysign-casts.ll
Log Message:
-----------
[RISCV] Correct fcopysign pattern for zdinx (#114954)
Correcting the pattern fixes the following error:
fatal error: error in backend: Cannot select: t17: f64 = fcopysign t5,
t8
Commit: 69d0bab82689d470e3fd68f50ca8b8d28f3e2294
https://github.com/llvm/llvm-project/commit/69d0bab82689d470e3fd68f50ca8b8d28f3e2294
Author: BoyaoWang430 <wangboyao at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
Log Message:
-----------
[RISCV] Add load/store clustering in post machine schedule (#111504)
#73789 added load clustering and #73796 tried to add store clustering.
If post machine schedule is used, previous cluster of load/store which
formed in machine schedule may break. In order to solve this, add
load/sotre clustering to post machine schedule.
Commit: c0a7b60fd1b244782032fefc261c4442c54c3935
https://github.com/llvm/llvm-project/commit/c0a7b60fd1b244782032fefc261c4442c54c3935
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
R flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
R flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
Log Message:
-----------
Revert "[flang][OpenMP] Add alias analysis for omp private" (#115135)
Reverts llvm/llvm-project#113566 (commit id: f3025c8b4fd797d99a8a8117254f93605ec46aa8 )
because of regression in Fujitsu compiler test suite.
Commit: 8431494094c8732d1426763d3e1aae322fa76830
https://github.com/llvm/llvm-project/commit/8431494094c8732d1426763d3e1aae322fa76830
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/Basic/SourceManager.cpp
M clang/test/Lexer/SourceLocationsOverflow.c
M clang/test/Misc/sloc-usage.cpp
Log Message:
-----------
[clang] Make source locations space usage diagnostics numbers easier to read (#114999)
Instead of writing "12345678B", write "12345678B (12.34MB)".
Commit: 37ce18951fded6be1de319b05b968918cb45c00b
https://github.com/llvm/llvm-project/commit/37ce18951fded6be1de319b05b968918cb45c00b
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
Log Message:
-----------
[RISCV] Add requirement of asserts
We forgot to add `REQUIRES: asserts` here.
Commit: 7be30fd5335ca7fe050ee1789ea2648f014daf1b
https://github.com/llvm/llvm-project/commit/7be30fd5335ca7fe050ee1789ea2648f014daf1b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A libclc/clc/include/clc/integer/clc_abs.h
A libclc/clc/include/clc/integer/clc_abs.inc
A libclc/clc/include/clc/integer/clc_abs_diff.h
A libclc/clc/include/clc/integer/clc_abs_diff.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/integer/clc_abs.cl
A libclc/clc/lib/generic/integer/clc_abs.inc
A libclc/clc/lib/generic/integer/clc_abs_diff.cl
A libclc/clc/lib/generic/integer/clc_abs_diff.inc
M libclc/generic/lib/integer/abs.cl
M libclc/generic/lib/integer/abs.inc
M libclc/generic/lib/integer/abs_diff.cl
M libclc/generic/lib/integer/abs_diff.inc
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_hypot.cl
Log Message:
-----------
[libclc] Move abs/abs_diff to CLC library
Commit: b4263ddbe7cbcc9e0b5b0ea07c252056355301d0
https://github.com/llvm/llvm-project/commit/b4263ddbe7cbcc9e0b5b0ea07c252056355301d0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/sincos_helpers.cl
Log Message:
-----------
[libclc] Use __clc_max in CLC functions
Commit: ed9dab67e2932baf11bfa514b07b159c3bffd518
https://github.com/llvm/llvm-project/commit/ed9dab67e2932baf11bfa514b07b159c3bffd518
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
Log Message:
-----------
[ARM] Add extra tests for CVE-2024-7883 with undef/poison
Commit: 8c565de5ec6d49143ba9ae7c73b188314d31e563
https://github.com/llvm/llvm-project/commit/8c565de5ec6d49143ba9ae7c73b188314d31e563
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/double-lround.ll
A llvm/test/CodeGen/LoongArch/float-lround.ll
Log Message:
-----------
[LoongArch] Support llvm.lround intrinsics with i32 return type. (#114733)
This is needed by flang, similar to RISCV-64 in
https://reviews.llvm.org/D147195.
Commit: 5acc4a3dc0e2145d2bfef47f1543bb291c2b866a
https://github.com/llvm/llvm-project/commit/5acc4a3dc0e2145d2bfef47f1543bb291c2b866a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__cstddef/nullptr_t.h
M libcxx/include/__cstddef/ptrdiff_t.h
M libcxx/include/__cstddef/size_t.h
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__functional/function.h
M libcxx/include/__functional/hash.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/forward_list
M libcxx/include/new
M libcxx/include/string_view
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.cmp/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.special/cmp_nullptr.pass.cpp
Log Message:
-----------
[libc++] Remove <stddef.h> includes from the granularized <cstddef> headers (#114788)
We can define some of these aliases without having to include the system
<stddef.h> and there doesn't seem to be much of a reason we shouldn't do
it this way.
Commit: c6f3b7bcd0596d30f8dabecdfb9e44f9a07b6e4c
https://github.com/llvm/llvm-project/commit/c6f3b7bcd0596d30f8dabecdfb9e44f9a07b6e4c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/docs/DesignDocs/ThreadingSupportAPI.rst
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/lexicographical_compare.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__atomic/aliases.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__atomic/cxx_atomic_impl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/high_resolution_clock.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/parser_std_format_spec.h
M libcxx/include/__chrono/statically_widen.h
M libcxx/include/__chrono/steady_clock.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
M libcxx/include/__config_site.in
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__filesystem/directory_entry.h
M libcxx/include/__filesystem/directory_iterator.h
M libcxx/include/__filesystem/operations.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__filesystem/recursive_directory_iterator.h
M libcxx/include/__format/concepts.h
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__format/format_context.h
M libcxx/include/__format/format_functions.h
M libcxx/include/__format/format_parse_context.h
M libcxx/include/__format/formatter_bool.h
M libcxx/include/__format/formatter_char.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__format/parser_std_format_spec.h
M libcxx/include/__format/unicode.h
M libcxx/include/__format/write_escaped.h
M libcxx/include/__functional/hash.h
M libcxx/include/__fwd/fstream.h
M libcxx/include/__fwd/ios.h
M libcxx/include/__fwd/istream.h
M libcxx/include/__fwd/ostream.h
M libcxx/include/__fwd/sstream.h
M libcxx/include/__fwd/streambuf.h
M libcxx/include/__fwd/string.h
M libcxx/include/__fwd/string_view.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_defaults.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
M libcxx/include/__mbstate_t.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory_resource/synchronized_pool_resource.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__ostream/print.h
M libcxx/include/__random/random_device.h
M libcxx/include/__ranges/istream_view.h
M libcxx/include/__stop_token/atomic_unique_lock.h
M libcxx/include/__stop_token/stop_callback.h
M libcxx/include/__stop_token/stop_source.h
M libcxx/include/__stop_token/stop_state.h
M libcxx/include/__stop_token/stop_token.h
M libcxx/include/__string/char_traits.h
M libcxx/include/__support/xlocale/__posix_l_fallback.h
M libcxx/include/__support/xlocale/__strtonum_fallback.h
M libcxx/include/__thread/formatter.h
M libcxx/include/__thread/id.h
M libcxx/include/__thread/jthread.h
M libcxx/include/__thread/support.h
M libcxx/include/__thread/this_thread.h
M libcxx/include/__thread/thread.h
M libcxx/include/__thread/timed_backoff_policy.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__vector/vector.h
M libcxx/include/barrier
M libcxx/include/chrono
M libcxx/include/codecvt
M libcxx/include/complex
M libcxx/include/condition_variable
M libcxx/include/cstdlib
M libcxx/include/deque
M libcxx/include/format
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/iomanip
M libcxx/include/ios
M libcxx/include/iosfwd
M libcxx/include/iostream
M libcxx/include/istream
M libcxx/include/latch
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/mutex
M libcxx/include/ostream
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/regex
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/sstream
M libcxx/include/stdatomic.h
M libcxx/include/stop_token
M libcxx/include/streambuf
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/syncstream
M libcxx/include/thread
M libcxx/include/vector
M libcxx/include/version
M libcxx/include/wchar.h
M libcxx/modules/std.compat.cppm.in
M libcxx/modules/std.compat/clocale.inc
M libcxx/modules/std.compat/cstdlib.inc
M libcxx/modules/std.compat/cwchar.inc
M libcxx/modules/std.compat/cwctype.inc
M libcxx/modules/std.cppm.in
M libcxx/modules/std/atomic.inc
M libcxx/modules/std/barrier.inc
M libcxx/modules/std/chrono.inc
M libcxx/modules/std/clocale.inc
M libcxx/modules/std/codecvt.inc
M libcxx/modules/std/complex.inc
M libcxx/modules/std/condition_variable.inc
M libcxx/modules/std/cstdlib.inc
M libcxx/modules/std/cwchar.inc
M libcxx/modules/std/cwctype.inc
M libcxx/modules/std/filesystem.inc
M libcxx/modules/std/format.inc
M libcxx/modules/std/fstream.inc
M libcxx/modules/std/future.inc
M libcxx/modules/std/iomanip.inc
M libcxx/modules/std/ios.inc
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/iostream.inc
M libcxx/modules/std/istream.inc
M libcxx/modules/std/latch.inc
M libcxx/modules/std/locale.inc
M libcxx/modules/std/memory.inc
M libcxx/modules/std/mutex.inc
M libcxx/modules/std/ostream.inc
M libcxx/modules/std/print.inc
M libcxx/modules/std/random.inc
M libcxx/modules/std/ranges.inc
M libcxx/modules/std/regex.inc
M libcxx/modules/std/semaphore.inc
M libcxx/modules/std/shared_mutex.inc
M libcxx/modules/std/spanstream.inc
M libcxx/modules/std/sstream.inc
M libcxx/modules/std/stop_token.inc
M libcxx/modules/std/streambuf.inc
M libcxx/modules/std/string.inc
M libcxx/modules/std/string_view.inc
M libcxx/modules/std/strstream.inc
M libcxx/modules/std/syncstream.inc
M libcxx/modules/std/thread.inc
M libcxx/src/algorithm.cpp
M libcxx/src/call_once.cpp
M libcxx/src/chrono.cpp
M libcxx/src/experimental/include/tzdb/tzdb_list_private.h
M libcxx/src/filesystem/time_utils.h
M libcxx/src/include/atomic_support.h
M libcxx/src/include/config_elast.h
M libcxx/src/ios.cpp
M libcxx/src/ios.instantiations.cpp
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
M libcxx/src/memory.cpp
M libcxx/src/memory_resource.cpp
M libcxx/src/ostream.cpp
M libcxx/src/print.cpp
M libcxx/src/random_shuffle.cpp
M libcxx/src/std_stream.h
M libcxx/src/string.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
M libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/test_data.json
M libcxx/test/libcxx/feature_test_macro/version_header.sh.py
M libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/test/libcxx/include_as_c.sh.cpp
M libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/libcxx/vendor/apple/availability-with-pedantic-errors.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.tests.h
M libcxx/test/std/language.support/support.limits/support.limits.general/barrier.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/iomanip.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/latch.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/semaphore.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/shared_mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/stop_token.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/thread.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/header_information.py
M libcxx/utils/libcxx/test/dsl.py
M libcxx/utils/libcxx/test/features.py
M runtimes/cmake/Modules/HandleFlags.cmake
Log Message:
-----------
[libc++] Refactor the configuration macros to being always defined (#112094)
This is a follow-up to #89178. This updates the `<__config_site>`
macros.
Commit: e29d092af8b0ed2b15ce1dfd9fc4caef1976eef7
https://github.com/llvm/llvm-project/commit/e29d092af8b0ed2b15ce1dfd9fc4caef1976eef7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-pmuldq.ll
Log Message:
-----------
[X86] getFauxShuffleMask - add ISD::SHL/SRL handling
This is currently mostly the same as the VSHLI/VSRLI handling below, although I've kept them separate as I'm investigating adding non-uniform shift amount handling as a followup
Commit: 270bfb2f2abc48ec916fce7e677fe3cc6f2908d0
https://github.com/llvm/llvm-project/commit/270bfb2f2abc48ec916fce7e677fe3cc6f2908d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
Log Message:
-----------
[X86] Add test coverage for #114959
Commit: 2f48765b45ba87d780caf7d058d416b5dda32d7e
https://github.com/llvm/llvm-project/commit/2f48765b45ba87d780caf7d058d416b5dda32d7e
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Remove -mllvm --tail-merge-threshold=0 from Bazel. (#115061)
Follow-up on the `-mllvm --tail-merge-threshold=0` removal promised in
aeccc16497a84d61200f7ccfa3864096349260d3 (see
b2a9ea4420127d10b18ae648b16757665f8bbd7c commit message on why we don't
need this in Bazel, and will only keep in AArch64-specific compile flags
in CMake build).
Commit: 3d4d033ceaf9e72491a20e9210f396aa3ec52fa5
https://github.com/llvm/llvm-project/commit/3d4d033ceaf9e72491a20e9210f396aa3ec52fa5
Author: David Green <david.green at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/Thumb2/mve-doublereduct.ll
Log Message:
-----------
[AArch64][Arm] Add nested double reduction tests. NFC
Commit: ebfafa2511f92eed484895f3265ced40f4c1fc70
https://github.com/llvm/llvm-project/commit/ebfafa2511f92eed484895f3265ced40f4c1fc70
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
A llvm/test/CodeGen/SPIRV/pointers/composite-fun-fix-ptr-arg.ll
Log Message:
-----------
[SPIR-V] Fix OpFunctionParameter vs. OpTypeFunction types for pointer arguments when there are functions with aggregate arguments (#115044)
The goal of the PR is to ensure that if module contains functions with
mutated signature (due to preprocessing of aggregate types), functions
still are going through re-creating of function type to preserve pointee
type information for arguments.
This fixes a bug when a module with (1) a function having aggregate
arguments and/or return, and (2) at least two functions with signatures
different only wrt. pointee types is translated so that one of two
similar functions gets an incorrect OpFunctionParameter type that is
different from the corresponding OpTypeFunction definition.
A reproducer is attached as a new test case.
Commit: f363f9d61eaff7090a19d226ea8786b2987d4fcc
https://github.com/llvm/llvm-project/commit/f363f9d61eaff7090a19d226ea8786b2987d4fcc
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/lib/orc/dlfcn_wrapper.cpp
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/orc/elfnix_platform.h
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC][Runtime] Add `dlupdate` for elf (#110406)
With the help of @lhames, This pull request introduces the dlupdate
function in the ORC runtime. dlupdate enables incremental execution of
new initializers introduced in the REPL environment. Unlike traditional
dlopen, which manages initializers, code mapping, and library reference
counts, dlupdate focuses exclusively on running new initializers.
Commit: d77a36e01b8fed496b29c3b2c12526f8dc380766
https://github.com/llvm/llvm-project/commit/d77a36e01b8fed496b29c3b2c12526f8dc380766
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorize] Use new getUniqueLatchExitBlock routine (#108231)
With PR #88385 I am introducing support for vectorising more loops with
early exits that don't require a scalar epilogue. As such, if a loop
doesn't have a unique exit block it will not automatically imply we
require a scalar epilogue. Also, in all places in the code today where
we use the variable LoopExitBlock we actually mean the exit block from
the latch. Therefore, it seemed reasonable to add a new
getUniqueLatchExitBlock that allows the caller to determine the exit
block taken from the latch and use this instead of getUniqueExitBlock. I
also renamed LoopExitBlock to be LatchExitBlock. I feel this not only
better reflects how the variable is used today, but also prepares the
code for PR #88385.
While doing this I also noticed that one of the comments in
requiresScalarEpilogue is wrong when we require a scalar epilogue, i.e.
when we're not exiting from the latch block. This doesn't always imply
we have multiple exits, e.g. see the test in
Transforms/LoopVectorize/unroll_nonlatch.ll
where the latch unconditionally branches back to the only exiting block.
Commit: 2d56de9e7e4a3accde42b4d7d329acd007989df8
https://github.com/llvm/llvm-project/commit/2d56de9e7e4a3accde42b4d7d329acd007989df8
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
Log Message:
-----------
Revert "[ARM] Add extra tests for CVE-2024-7883 with undef/poison"
Reverting because this causes a test failure in the expensive-checks
buildbot.
This reverts commit ed9dab67e2932baf11bfa514b07b159c3bffd518.
Commit: 9f8c3d3796ebf7ddd4a85134ff109cf03a0b9b5e
https://github.com/llvm/llvm-project/commit/9f8c3d3796ebf7ddd4a85134ff109cf03a0b9b5e
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
R lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpoinsSameCUName.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpointsSameCUName.py
Log Message:
-----------
[lldb][test] Correct typo in breakpoint test file name
Added by https://github.com/llvm/llvm-project/pull/114896.
Commit: c75353313ed73c6dc04beb322954bb905906f4a1
https://github.com/llvm/llvm-project/commit/c75353313ed73c6dc04beb322954bb905906f4a1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add 256-bit concat(shuffle(),shuffle()) handling
Improve IsConcatFree detection to handle splat vector-loads (which can be folded as X86ISD::SUBV_BROADCAST_LOAD).
Fixes #114959
Commit: 5a16ed96c5362aa8e9610fa266d6f6202b19edc3
https://github.com/llvm/llvm-project/commit/5a16ed96c5362aa8e9610fa266d6f6202b19edc3
Author: Luke Lau <luke at igalia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add +unaligned-scalar-mem to spacemit-x60 (#115125)
I can't find any official documentation on this, but from other
discussions[^1] and my own testing the spacemit-x60 seems to support
unaligned scalar loads and stores.
They seem to be performant, and just from a quick test we get a 2.45%
speedup on 500.perlbench_r on the Banana Pi F3[^2].
This would allow it to take advantage of #107548.
[^1]:
https://github.com/llvm/llvm-project/issues/110454#issuecomment-2382199460
[^2]: https://lnt.lukelau.me/db_default/v4/nts/32
Commit: f87484d5910c1c708bfd93ef588d6ff8307e2477
https://github.com/llvm/llvm-project/commit/f87484d5910c1c708bfd93ef588d6ff8307e2477
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVM/CMakeLists.txt
Log Message:
-----------
Fix libnvptxcompiler_static.a absolute path (#115015)
Now when building llvm-solid with `-DMLIR_ENABLE_NVPTXCOMPILER=ON`,
there will be an absolute path (`/path/to/libnvptxcompiler_static.a`) in
MLIRNVVMTarget dependencies (in
`/build/path/install/lib/cmake/mlir/MLIRTargets.cmake`). For example,
```cmake
set_target_properties(MLIRNVVMTarget PROPERTIES
INTERFACE_LINK_LIBRARIES "MLIRIR;MLIRExecutionEngineUtils;MLIRSupport;MLIRGPUDialect;MLIRTargetLLVM;MLIRNVVMToLLVMIRTranslation;LLVMSupport;/path/to/libnvptxcompiler_static.a"
)
```
If downstream project uses pre-built llvm and depends on MLIRNVVMTarget,
it may fail to build due to the absence of the
`libnvptxcompiler_static.a` absolute path.
After this commit, there will no absolute path in
`/build/path/install/lib/cmake/mlir/MLIRTargets.cmake`
```cmake
set_target_properties(MLIRNVVMTarget PROPERTIES
INTERFACE_LINK_LIBRARIES "MLIRIR;MLIRExecutionEngineUtils;MLIRSupport;MLIRGPUDialect;MLIRTargetLLVM;MLIRNVVMToLLVMIRTranslation;LLVMSupport;\$<LINK_ONLY:MLIR_NVPTXCOMPILER_LIB>"
)
```
Then downstream project can modify `libnvptxcompiler_static.a` path and
use cmake to build. For example,
```cmake
# find_library(...)
add_library(MLIR_NVPTXCOMPILER_LIB STATIC IMPORTED GLOBAL)
set_property(TARGET MLIR_NVPTXCOMPILER_LIB PROPERTY IMPORTED_LOCATION ${...})
```
Commit: 40556d08491f530e03746fb188b38e7f9cb272c7
https://github.com/llvm/llvm-project/commit/40556d08491f530e03746fb188b38e7f9cb272c7
Author: brod4910 <13954100+brod4910 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir
Log Message:
-----------
[MLIR][Tensor] Fix out-of-bounds FoldEmptyTensorWithDimOp crash (#112196)
Fixes #111270
Commit: ea6b8fa4b9b48a11c2657bedf35ad5291b1e2b9c
https://github.com/llvm/llvm-project/commit/ea6b8fa4b9b48a11c2657bedf35ad5291b1e2b9c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/PowerPC/f128-arith.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
Log Message:
-----------
[SDAG] Merge multiple-result libcall expansion into DAG.expandMultipleResultFPLibCall() (#114792)
This merges the logic for expanding both FFREXP and FSINCOS into one
method `DAG.expandMultipleResultFPLibCall()`. This reduces duplication
and also allows FFREXP to benefit from the stack slot elimination
implemented for FSINCOS. This method will also be used in future to
implement more multiple-result intrinsics (such as modf and sincospi).
Commit: 56077e5ac09eb2d6b7ca818abce2bbbcf179f529
https://github.com/llvm/llvm-project/commit/56077e5ac09eb2d6b7ca818abce2bbbcf179f529
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/locally-imported-arm64ec.test
Log Message:
-----------
[LLD][COFF] Add support for locally imported EC symbols (#114985)
Allow imported symbols to be recognized in both mangled and demangled
forms. Support __imp_aux_ symbols in addition to __imp_ symbols.
Commit: eab7be5d42ad30c9992ff72c3be9298702001dc8
https://github.com/llvm/llvm-project/commit/eab7be5d42ad30c9992ff72c3be9298702001dc8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__algorithm/adjacent_find.h
M libcxx/include/__algorithm/all_of.h
M libcxx/include/__algorithm/any_of.h
M libcxx/include/__algorithm/copy_if.h
M libcxx/include/__algorithm/count_if.h
M libcxx/include/__algorithm/iterator_operations.h
M libcxx/include/__algorithm/ranges_adjacent_find.h
M libcxx/include/__algorithm/ranges_all_of.h
M libcxx/include/__algorithm/ranges_any_of.h
M libcxx/include/__algorithm/ranges_copy_if.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__algorithm/ranges_count_if.h
M libcxx/include/__algorithm/ranges_fill_n.h
M libcxx/include/__algorithm/unique.h
Log Message:
-----------
[libc++] Forward more algorithms to the classic algorithms (#114674)
This partially addresses #105687.
Commit: 2bbb6c067020bef50435c2ba5addcd66d1b9a1dd
https://github.com/llvm/llvm-project/commit/2bbb6c067020bef50435c2ba5addcd66d1b9a1dd
Author: Chris Cotter <ccotter14 at bloomberg.net>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
Log Message:
-----------
[clang][NFC] Spell out DynTypedNode instead of auto (#114427)
Commit: 3c4e6c17f066d9cf5a5b065a05bdff472f721bf6
https://github.com/llvm/llvm-project/commit/3c4e6c17f066d9cf5a5b065a05bdff472f721bf6
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M flang/test/Driver/arch-specific-libdir-rpath.f95
Log Message:
-----------
[flang][Driver] When linking with the Fortran runtime, the `addArchSpecificRPath()` should be called too (#114837)
When linking with other runtimes (OpenMP, sanitizers), the
addArchSpecificRPath() is being called. The same thing should happen
when linking with the Fortran runtime, this will improve user experience
massively.
Commit: d8354d63db66e5d67d74b24b1611b578700f1134
https://github.com/llvm/llvm-project/commit/d8354d63db66e5d67d74b24b1611b578700f1134
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] Extend test coverage for #114901 with commuted test case
Commit: cab606c30661a746b2513a8330e0c8eca771913e
https://github.com/llvm/llvm-project/commit/cab606c30661a746b2513a8330e0c8eca771913e
Author: hev <wangrui at loongson.cn>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
M llvm/lib/Target/LoongArch/LoongArchSubtarget.h
M llvm/test/CodeGen/LoongArch/merge-load-store.ll
Log Message:
-----------
[LoongArch] Enable alias analysis by default (#114980)
Enable use of alias analysis during code generation.
Commit: d8139ae50f72046a2fce36055d8dc936b50d20ef
https://github.com/llvm/llvm-project/commit/d8139ae50f72046a2fce36055d8dc936b50d20ef
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
Log Message:
-----------
[lldb][test] Use -gdwarf to fix same CU breakpoint test on Windows on Arm
clang when given -g on Windows produces a PDB file. For whatever reason,
the test doesn't work with that.
-gdwarf produces DWARF regardless of platform.
Fixes 803f957e87e4083f6d61c8991171eeeaf0e6bd61.
Commit: 5a062191f7b9467aaddb6fe4b84c16e60fe85cc8
https://github.com/llvm/llvm-project/commit/5a062191f7b9467aaddb6fe4b84c16e60fe85cc8
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
A llvm/test/CodeGen/SPIRV/pointers/OpExtInst-OpenCL_std-ptr-types.ll
Log Message:
-----------
[SPIR-V] Ensure correct pointee types of some OpenCL Extended Instructions' pointer arguments (#114846)
OpenCL Extended Instruction Set Specification defines relations between
return/operand types and pointee type of pointer arguments in case of
remquo, fract, frexp, lgamma_r, modf, sincos and prefetch instructions
(https://registry.khronos.org/SPIR-V/specs/unified1/OpenCL.ExtendedInstructionSet.100.html).
This PR ensures correct pointee types of those OpenCL Extended
Instructions' pointer arguments.
Commit: 38fffa630ee80163dc65e759392ad29798905679
https://github.com/llvm/llvm-project/commit/38fffa630ee80163dc65e759392ad29798905679
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CodeGen/PowerPC/altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
M clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init-no-parentheses.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init.c
M clang/test/CodeGen/RISCV/rvv-vls-bitwise-ops.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/SystemZ/zvector2.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vbmi2-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
M clang/test/CodeGen/X86/avx512vlvbmi2-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/X86/xop-builtins-cmp.c
M clang/test/CodeGen/X86/xop-builtins.c
M clang/test/CodeGen/aarch64-neon-3v.c
M clang/test/CodeGen/aarch64-neon-intrinsics.c
M clang/test/CodeGen/aarch64-neon-misc.c
M clang/test/CodeGen/aarch64-neon-shifts.c
M clang/test/CodeGen/aarch64-neon-tbl.c
M clang/test/CodeGen/aarch64-poly64.c
M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
M clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-mve-intrinsics/absneg.c
M clang/test/CodeGen/arm-mve-intrinsics/bitwise-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/cplusplus.cpp
M clang/test/CodeGen/arm-mve-intrinsics/vbicq.c
M clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/vornq.c
M clang/test/CodeGen/arm-neon-shifts.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtinshufflevector2.c
M clang/test/CodeGen/const-init.c
M clang/test/CodeGen/matrix-type-operators.c
M clang/test/CodeGen/neon-immediate-ubsan.c
M clang/test/CodeGen/nofpclass.c
M clang/test/CodeGen/ppc-vec_ct-truncate.c
M clang/test/CodeGen/variadic-nvptx.c
M clang/test/CodeGen/vecshift.c
M clang/test/CodeGen/vector-scalar.c
M clang/test/CodeGenCXX/auto-var-init.cpp
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenCXX/ext-vector-type-conditional.cpp
M clang/test/CodeGenCXX/matrix-type-builtins.cpp
M clang/test/CodeGenCXX/matrix-type-operators.cpp
M clang/test/CodeGenCXX/vector-size-conditional.cpp
M clang/test/CodeGenCXX/vector-splat-conversion.cpp
M clang/test/CodeGenHLSL/BasicFeatures/standard_conversion_sequences.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/CodeGenOpenCL/logical-ops.cl
M clang/test/CodeGenOpenCL/partial_initializer.cl
M clang/test/CodeGenOpenCL/shifts.cl
M clang/test/CodeGenOpenCL/vector_literals.cl
M clang/test/Headers/__clang_hip_math_deprecated.hip
M clang/test/Headers/wasm.c
M llvm/lib/IR/AsmWriter.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/logicalop.ll
M llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/div.ll
M llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
M llvm/test/Analysis/CostModel/AMDGPU/fneg.ll
M llvm/test/Analysis/CostModel/AMDGPU/logicalop.ll
M llvm/test/Analysis/CostModel/AMDGPU/mul.ll
M llvm/test/Analysis/CostModel/AMDGPU/rem.ll
M llvm/test/Analysis/CostModel/ARM/divrem.ll
M llvm/test/Analysis/CostModel/ARM/logicalop.ll
M llvm/test/Analysis/CostModel/PowerPC/logicalop.ll
M llvm/test/Analysis/CostModel/RISCV/arith-int.ll
M llvm/test/Analysis/CostModel/RISCV/logicalop.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-load-store.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-phi-const.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/CostModel/SystemZ/divrem-pow2.ll
M llvm/test/Analysis/CostModel/SystemZ/logicalop.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-latency.ll
M llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/arith-fp.ll
M llvm/test/Analysis/CostModel/X86/div-codesize.ll
M llvm/test/Analysis/CostModel/X86/div-latency.ll
M llvm/test/Analysis/CostModel/X86/div-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/fshl-codesize.ll
M llvm/test/Analysis/CostModel/X86/fshl-latency.ll
M llvm/test/Analysis/CostModel/X86/fshl-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/fshl.ll
M llvm/test/Analysis/CostModel/X86/fshr-codesize.ll
M llvm/test/Analysis/CostModel/X86/fshr-latency.ll
M llvm/test/Analysis/CostModel/X86/fshr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/fshr.ll
M llvm/test/Analysis/CostModel/X86/logicalop.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-codesize.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-latency.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/mul-codesize.ll
M llvm/test/Analysis/CostModel/X86/mul-latency.ll
M llvm/test/Analysis/CostModel/X86/mul-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/mul.ll
M llvm/test/Analysis/CostModel/X86/rem-codesize.ll
M llvm/test/Analysis/CostModel/X86/rem-latency.ll
M llvm/test/Analysis/CostModel/X86/rem-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/slm-arith-costs.ll
M llvm/test/Analysis/CostModel/X86/vdiv-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-ashr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-lshr-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-codesize.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-latency.ll
M llvm/test/Analysis/CostModel/X86/vshift-shl-sizelatency.ll
M llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll
M llvm/test/Analysis/DemandedBits/vectors.ll
M llvm/test/Analysis/ValueTracking/known-bits.ll
M llvm/test/Analysis/ValueTracking/known-fpclass.ll
M llvm/test/Analysis/ValueTracking/known-non-zero.ll
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
M llvm/test/Analysis/ValueTracking/knownbits-bmi-pattern.ll
M llvm/test/Analysis/ValueTracking/knownbits-x86-hadd-hsub.ll
M llvm/test/Analysis/ValueTracking/knownzero-shift.ll
M llvm/test/Analysis/ValueTracking/numsignbits-shl.ll
M llvm/test/Assembler/ConstantExprFold.ll
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/opaque-ptr.ll
M llvm/test/Bitcode/constantsTest.3.2.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-p7-in-memory.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-memset.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-tbaa.ll
M llvm/test/CodeGen/NVPTX/variadics-lowering.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-negative.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-const.ll
M llvm/test/CodeGen/Thumb2/mve-gather-optimisation-deep.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vshift.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_tbl.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/reduce.ll
M llvm/test/Instrumentation/MemorySanitizer/vector-track-origins-neon.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/Transforms/AggressiveInstCombine/ARM/fptosisat.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/fptosisat.ll
M llvm/test/Transforms/AggressiveInstCombine/masked-cmp.ll
M llvm/test/Transforms/AggressiveInstCombine/popcount.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_multi_uses.ll
M llvm/test/Transforms/AggressiveInstCombine/vector-or-load.ll
M llvm/test/Transforms/Attributor/nofpclass-powi.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info-vec.ll
M llvm/test/Transforms/BDCE/binops-multiuse.ll
M llvm/test/Transforms/BDCE/dead-uses.ll
M llvm/test/Transforms/BDCE/vectors-inseltpoison.ll
M llvm/test/Transforms/BDCE/vectors.ll
M llvm/test/Transforms/CodeGenPrepare/X86/fold-loop-of-urem.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/large-immediate.ll
M llvm/test/Transforms/ConstraintElimination/geps-ptrvector.ll
M llvm/test/Transforms/ConstraintElimination/vector-compares.ll
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
M llvm/test/Transforms/CorrelatedValuePropagation/overflows.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
M llvm/test/Transforms/DeadStoreElimination/X86/gather-null-pointer.ll
M llvm/test/Transforms/DeadStoreElimination/masked-dead-store.ll
M llvm/test/Transforms/DeadStoreElimination/offsetted-overlapping-stores.ll
M llvm/test/Transforms/DivRemPairs/AMDGPU/div-rem-pairs.ll
M llvm/test/Transforms/EarlyCSE/commute.ll
M llvm/test/Transforms/EarlyCSE/gep.ll
M llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll
M llvm/test/Transforms/GVN/non-integral-pointers.ll
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M llvm/test/Transforms/InstCombine/shift-sra.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/shl-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/shl-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/shl-bo.ll
M llvm/test/Transforms/InstCombine/shl-demand.ll
M llvm/test/Transforms/InstCombine/shl-sub.ll
M llvm/test/Transforms/InstCombine/shl-unsigned-cmp-const.ll
M llvm/test/Transforms/InstCombine/shuffle_select-inseltpoison.ll
M llvm/test/Transforms/InstCombine/shuffle_select.ll
M llvm/test/Transforms/InstCombine/signbit-lshr-and-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signbit-shl-and-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signed-mul-lack-of-overflow-check-via-mul-sdiv.ll
M llvm/test/Transforms/InstCombine/signed-truncation-check.ll
M llvm/test/Transforms/InstCombine/signext.ll
M llvm/test/Transforms/InstCombine/signmask-of-sext-vs-of-shl-of-zext.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/test/Transforms/InstCombine/smin-icmp.ll
M llvm/test/Transforms/InstCombine/sqrt.ll
M llvm/test/Transforms/InstCombine/ssub-with-overflow.ll
M llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-lshr-or-to-icmp-select.ll
M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible.ll
M llvm/test/Transforms/InstCombine/sub-xor.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
M llvm/test/Transforms/InstCombine/trunc-demand.ll
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
M llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
M llvm/test/Transforms/InstCombine/uaddo.ll
M llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll
M llvm/test/Transforms/InstCombine/umin_cttz_ctlz.ll
M llvm/test/Transforms/InstCombine/unfold-masked-merge-with-const-mask-vector.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-mul-udiv.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/unsigned_saturated_sub.ll
M llvm/test/Transforms/InstCombine/variable-signext-of-variable-high-bit-extraction.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract.ll
M llvm/test/Transforms/InstCombine/vec_sext.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll
M llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vector-casts.ll
M llvm/test/Transforms/InstCombine/vector-mul.ll
M llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll
M llvm/test/Transforms/InstCombine/vector-trunc.ll
M llvm/test/Transforms/InstCombine/vector-udiv.ll
M llvm/test/Transforms/InstCombine/vector-urem.ll
M llvm/test/Transforms/InstCombine/vector-xor.ll
M llvm/test/Transforms/InstCombine/with_overflow.ll
M llvm/test/Transforms/InstCombine/xor-and-or.ll
M llvm/test/Transforms/InstCombine/xor-ashr.ll
M llvm/test/Transforms/InstCombine/xor-icmps.ll
M llvm/test/Transforms/InstCombine/xor-of-or.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/xor2.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/InstCombine/zext.ll
M llvm/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
M llvm/test/Transforms/InstSimplify/ConstProp/ARM/mve-vctp.ll
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
M llvm/test/Transforms/InstSimplify/ConstProp/bitcast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/cast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
M llvm/test/Transforms/InstSimplify/abs_intrinsic.ll
M llvm/test/Transforms/InstSimplify/add_vp.ll
M llvm/test/Transforms/InstSimplify/addsub.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/InstSimplify/bitreverse-fold.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/InstSimplify/canonicalize.ll
M llvm/test/Transforms/InstSimplify/cast-unsigned-icmp-cmp-0.ll
M llvm/test/Transforms/InstSimplify/cmp-vec-fast-path.ll
M llvm/test/Transforms/InstSimplify/compare.ll
M llvm/test/Transforms/InstSimplify/constantfold-add-nuw-allones-to-allones.ll
M llvm/test/Transforms/InstSimplify/constantfold-shl-nuw-C-to-C.ll
M llvm/test/Transforms/InstSimplify/ctpop-pow2.ll
M llvm/test/Transforms/InstSimplify/div.ll
M llvm/test/Transforms/InstSimplify/exp10.ll
M llvm/test/Transforms/InstSimplify/fast-math-strictfp.ll
M llvm/test/Transforms/InstSimplify/fast-math.ll
M llvm/test/Transforms/InstSimplify/fdiv.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic-strictfp.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic.ll
M llvm/test/Transforms/InstSimplify/floating-point-compare.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/fptoi-range.ll
M llvm/test/Transforms/InstSimplify/frexp.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/icmp-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp.ll
M llvm/test/Transforms/InstSimplify/implies.ll
M llvm/test/Transforms/InstSimplify/insertelement.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-non-zero.ll
M llvm/test/Transforms/InstSimplify/maxmin_intrinsics.ll
M llvm/test/Transforms/InstSimplify/negate.ll
M llvm/test/Transforms/InstSimplify/or-icmps-same-ops.ll
M llvm/test/Transforms/InstSimplify/or.ll
M llvm/test/Transforms/InstSimplify/pr28725.ll
M llvm/test/Transforms/InstSimplify/ptrmask.ll
M llvm/test/Transforms/InstSimplify/rem.ll
M llvm/test/Transforms/InstSimplify/returned.ll
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/sdiv.ll
M llvm/test/Transforms/InstSimplify/select-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/select-logical.ll
M llvm/test/Transforms/InstSimplify/select.ll
M llvm/test/Transforms/InstSimplify/select_or_and.ll
M llvm/test/Transforms/InstSimplify/shift-knownbits.ll
M llvm/test/Transforms/InstSimplify/shift.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
M llvm/test/Transforms/InstSimplify/shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/shufflevector.ll
M llvm/test/Transforms/InstSimplify/strictfp-fadd.ll
M llvm/test/Transforms/InstSimplify/uscmp.ll
M llvm/test/Transforms/InstSimplify/vec-cmp.ll
M llvm/test/Transforms/InstSimplify/vec-icmp-of-cast.ll
M llvm/test/Transforms/InstSimplify/vector_gep.ll
M llvm/test/Transforms/InstSimplify/xor.ll
M llvm/test/Transforms/InterleavedAccess/X86/interleave-load-extract-shuffle-changes.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch-opaque-ptr.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch.ll
M llvm/test/Transforms/LoopUnroll/ARM/mve-upperbound.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors-inseltpoison.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/streaming-compatible-sve-no-maximize-bandwidth.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/vplan-native-inner-loop-only.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-not-when-safe.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/induction_plus.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/preserve-or-disjoint.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-int-row-major.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-add-sub-double-row-major.ll
M llvm/test/Transforms/MemCpyOpt/form-memset.ll
M llvm/test/Transforms/NewGVN/completeness.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/predicated-reduction.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr50555.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr88239.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vec-shift.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
M llvm/test/Transforms/Reassociate/fast-ReassociateVector.ll
M llvm/test/Transforms/Reassociate/negation.ll
M llvm/test/Transforms/Reassociate/xor_reassoc.ll
M llvm/test/Transforms/RewriteStatepointsForGC/vector-nonlive-clobber.ll
M llvm/test/Transforms/SCCP/add-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/intrinsics.ll
M llvm/test/Transforms/SCCP/ip-ranges-casts.ll
M llvm/test/Transforms/SCCP/overdefined-ext.ll
M llvm/test/Transforms/SCCP/trunc-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/vector-bitcast.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/external-use-icmp.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-root.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/sdiv-pow2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec15-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-min-max.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/widen.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/floating-point.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/getpointerschaincost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/minbw-with-and-and-scalar-trunc.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/phi-const.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduction-extension-after-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/scatter-vectorize-reversed.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-stores-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-bv-multi-uses.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-to-large-than-bw.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-node-trunc-with-signed-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec15-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-not-resized-op-resized.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_2.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-and-const-load.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-div.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_sel.ll
M llvm/test/Transforms/SLPVectorizer/X86/combined-stores-chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_smallpt.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-counter.ll
M llvm/test/Transforms/SLPVectorizer/X86/different-vec-widths.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/external_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep-nodes-with-non-gep-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep.ll
M llvm/test/Transforms/SLPVectorizer/X86/geps-non-pow-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/long_chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-gather-nodes-phi-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/mul64.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi3.ll
M llvm/test/Transforms/SLPVectorizer/X86/powof2div.ll
M llvm/test/Transforms/SLPVectorizer/X86/powof2mul.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr23510.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49933.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-bool-logic-op-inside.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_gather-load-redux-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-scalars-in-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder-non-empty.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/simple-loop.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-minbitwidth-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2_unord_geps.ll
M llvm/test/Transforms/SLPVectorizer/X86/stackrestore-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/stores_vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/unreachable.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/abs-overflow-incorrect-minbws.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
M llvm/test/Transforms/SLPVectorizer/freeze-signedness-missed.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/operand-is-reduced-val.ll
M llvm/test/Transforms/SLPVectorizer/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reduction_loads.ll
M llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
M llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-fix-109835.ll
M llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
M llvm/test/Transforms/SROA/tbaa-struct3.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-store.ll
M llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-select.ll
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
M llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/AArch64/vecreduce-shuffle.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization-shufflevector-splat.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
M llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll
M llvm/test/Transforms/VectorCombine/X86/scalarize-cmp.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle.ll
M llvm/test/tools/llvm-reduce/reduce-opcodes.ll
M llvm/test/tools/llvm-reduce/reduce-operands-fp.ll
M llvm/test/tools/llvm-reduce/reduce-operands-int.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
Commit: e3a0775651190a23d8234615b9fdadd81c1c24bc
https://github.com/llvm/llvm-project/commit/e3a0775651190a23d8234615b9fdadd81c1c24bc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/extract-cmp-binop.ll
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
Log Message:
-----------
[VectorCombine] foldExtractedCmps - (re-)enable fold on non-commutative binops
#114901 exposed that foldExtractedCmps didn't account for non-commutative binops, and were disabled by 05e838f428555bcc4507bd37912da60ea9110ef6
This patch re-enables support for non-commutative binops by ensuring that the LHS/RHS arg order of the binop is retained.
Commit: f1f5220958eb02a7ca4aa21cb95df4746e91bc3b
https://github.com/llvm/llvm-project/commit/f1f5220958eb02a7ca4aa21cb95df4746e91bc3b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/clocale
M libcxx/include/cstdint
Log Message:
-----------
[libc++] Only include the system <stdint.h> and <locale.h> if they exist (#115017)
Prior to aa7f377c96, we only did an #include_next of those system
headers if they existed. After removing those headers from libc++, we
started assuming that the system provided the headers because we
unconditionally started including them. This patch fixes that.
Commit: 28452acac05de8dc64aa7ba76af70ac541667cdd
https://github.com/llvm/llvm-project/commit/28452acac05de8dc64aa7ba76af70ac541667cdd
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] delayed privatisation for TASK (#114785)
This uses essentially an identical implementation to that used for
ParallelOp. The private variable allocation and deallocation use shared
functions to avoid code duplication. FIRSTPRIVATE variable copying uses
duplicated code for now because I anticipate the implementation
diverging in the near future once I store data for firstprivate
variables in the task description structure.
After enabling delayed privatisation for TASK in flang, one more test in
the fujitsu test suite passes (I haven't looked into why).
Commit: 88e9b373c0d7184b08c755024cce0778d18f0306
https://github.com/llvm/llvm-project/commit/88e9b373c0d7184b08c755024cce0778d18f0306
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
A llvm/test/Transforms/FunctionSpecialization/solver-constants.ll
A llvm/test/Transforms/FunctionSpecialization/solver-dead-blocks.ll
Log Message:
-----------
[FuncSpec] Query SCCPSolver in more places (#114964)
When traversing the use-def chain of an Argument in a candidate
specialization, also query the SCCPSolver to see if a Value is constant.
This allows us to better estimate the codesize savings of a candidate in
the presence of instructions that are a user of the argument we are
estimating savings for which also use arguments that have been found
constant by IPSCCP.
Similarly when estimating the dead basic blocks from branch and switch
instructions which become constant, also query the SCCPSolver to see if
a predecessor is unreachable.
Commit: 246b57cb2086b22ad8b41051c77e86ef478053a1
https://github.com/llvm/llvm-project/commit/246b57cb2086b22ad8b41051c77e86ef478053a1
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/test/Lower/PowerPC/ppc-vec-cmp.f90
M flang/test/Lower/PowerPC/ppc-vec-convert.f90
M flang/test/Lower/PowerPC/ppc-vec-perm.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-shift.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
Log Message:
-----------
Fix tests in flang/test/Lower/PowerPC after splat change.
Commit: 79f4d8f0145d72dff8c33745f35d45c74ecb3fdf
https://github.com/llvm/llvm-project/commit/79f4d8f0145d72dff8c33745f35d45c74ecb3fdf
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/AST/DeclTemplate.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/AST/ast-dump-decl.cpp
R clang/test/ASTMerge/class-template-spec/Inputs/class-template-spec.cpp
R clang/test/ASTMerge/class-template-spec/test.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Always use latest redeclaration of primary template" (#114569)" (#115156)
This reverts commit b24650e814e55d90acfc40acf045456c98f32b9c.
Commit: 2904f809cd1bf2651d6eceb2ad86553f407bf530
https://github.com/llvm/llvm-project/commit/2904f809cd1bf2651d6eceb2ad86553f407bf530
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
Log Message:
-----------
Revert "[Clang][Sema] Use the correct injected template arguments for partial specializations when collecting multi-level template argument lists (#112381)" (#115157)
This reverts commit 9381c6fd04cc16a7606633f57c96c11e58181ddb.
Commit: fbd89bcc6647ed611e579d8f9c38c97b8e6f7936
https://github.com/llvm/llvm-project/commit/fbd89bcc6647ed611e579d8f9c38c97b8e6f7936
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Transforms/PhaseOrdering/lto-argpromotion-ipsccp.ll
Log Message:
-----------
Reland "[LTO] Run Argument Promotion before IPSCCP" (#111853)
Run ArgumentPromotion before IPSCCP in the LTO pipeline, to expose more
constants to be propagated. We also run PostOrderFunctionAttrs to
improve the information available to ArgumentPromotion's alias analysis,
and SROA to clean up allocas.
Relands #111163.
Commit: 44ab3805b5a4a1f37e186e79b83c5cdc838312ed
https://github.com/llvm/llvm-project/commit/44ab3805b5a4a1f37e186e79b83c5cdc838312ed
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
R clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
R clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/Modules/cxx-templates.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Refactor collection of multi-level template argument lists (#106585, #111173)" (#111852)" (#115159)
This reverts commit 2bb3d3a3f32ffaef3d9b6a27db7f1941f0cb1136.
Commit: 2f743ac52e945e155ff3cb1f8ca5287b306b831e
https://github.com/llvm/llvm-project/commit/2f743ac52e945e155ff3cb1f8ca5287b306b831e
Author: Ilya Enkovich <ilya.enkovich at intel.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/AMX/AMX.td
M mlir/include/mlir/Dialect/AMX/AMXDialect.h
M mlir/include/mlir/Dialect/AMX/Transforms.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/AMX/IR/AMXDialect.cpp
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
M mlir/test/Dialect/AMX/invalid.mlir
M mlir/test/Dialect/AMX/legalize-for-llvm.mlir
M mlir/test/Dialect/AMX/roundtrip.mlir
Log Message:
-----------
[MLIR] [AMX] Utilize x86_amx type for AMX dialect in MLIR. (#111197)
This patch is intended to resolve #109481 and improve the usability of
the AMX dialect.
In LLVM IR, AMX intrinsics use `x86_amx` which is one of the primitive
types. This type is supposed to be used for AMX intrinsic calls and no
other operations. AMX dialect of MLIR uses regular 2D vector types,
which are then lowered to arrays of vectors in the LLVMIR dialect. This
creates an inconsistency in the types used in the LLVMIR dialect and
LLVMIR. Translation of AMX intrinsic calls to LLVM IR doesn't require
result types to match and that is where tile loads and mul operation
results get `x86_amx` type. This works in very simple cases when mul and
tile store operations directly consume the result of another AMX
intrinsic call, but it doesn't work when an argument is a block argument
(phi node).
In addition to translation problems, this inconsistency between types
used in MLIR and LLVM IR makes MLIR verification and transformation
quite problematic. Both `amx.tileload` and `vector::transfer_read` can
load values of the same type, but only one of them can be used in AMX
operations. In general, by looking at a type of value, we cannot
determine if it can only be used for AMX operations or contrary can be
used in other operations but AMX ones.
To remove this inconsistency and make AMX operations more explicit in
their limitations, I propose to add `LLVMX86AMXType` type to the LLVMIR
dialect to match `x86_amx` type in LLVM IR, and introduce
`amx::TileType` to be used by AMX operations in MLIR. This resolves
translation problems for AMX usage with phi nodes and provides proper
type verification in MLIR for AMX operations.
P.S. This patch also adds missing FP16 support. It's trivial but
unrelated to type system changes, so let me know if I should submit it
separately.
---------
Signed-off-by: Ilya Enkovich <ilya.enkovich at intel.com>
Commit: 9b016e3cb2859ef06f0301ebbc48df294b2356dc
https://github.com/llvm/llvm-project/commit/9b016e3cb2859ef06f0301ebbc48df294b2356dc
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/test/CodeGen/Thumb2/mve-vcmla.ll
Log Message:
-----------
[ARM] Add early-clobber to MVE VCMLA.f32 (#114995)
This instruction (but not the f16 variant) cannot us the same register
for the output as either of the inputs, so it needs to be marked as
early-clobber.
Commit: 5d8be4c036aa5ce4a94f1f37a9155d5c877e23db
https://github.com/llvm/llvm-project/commit/5d8be4c036aa5ce4a94f1f37a9155d5c877e23db
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/apple.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_defaults.h
M libcxx/include/__locale_dir/locale_base_api/freebsd.h
M libcxx/include/locale
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Define an internal locale API as a shim on top of the current one (#114596)
Our current locale base API is a mix of non-reserved system names that
we incorrectly (re)define and internal functions and macros starting
with __libcpp. This patch introduces a function-based internal interface
to isolate the rest of the code base from that mess, so that we can work
on refactoring how each platform implements the base API in subsequent
patches. This makes it possible to refactor how each platform implements
the base localization API without impacting the rest of the code base.
Commit: 86e4beb702fde407a35938a1c37279a61c0291e7
https://github.com/llvm/llvm-project/commit/86e4beb702fde407a35938a1c37279a61c0291e7
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/Mips.h
M clang/test/CodeGen/target-data.c
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
A llvm/test/CodeGen/Mips/data-layout.ll
M llvm/test/CodeGen/Mips/implicit-sret.ll
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (#112084)
Fix parts of #102783.
Commit: f61a8bc305d60f1ab04225e2b210d8b3d9c97eb8
https://github.com/llvm/llvm-project/commit/f61a8bc305d60f1ab04225e2b210d8b3d9c97eb8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CodeGen/X86/builtin_test_helpers.h
Log Message:
-----------
[clang][x86] Prevent signed/unsigned comparison warnings on constexpr m128i/m256i/m512i match helpers.
These matches are here to help match hex patterns so consistently match with unsigned uint64_t types
Commit: 7585e2fd3caee30d5332c93995b7a6f51ab06660
https://github.com/llvm/llvm-project/commit/7585e2fd3caee30d5332c93995b7a6f51ab06660
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_movepi64_pi64 and _mm_move_epi64
Commit: fb90733e196039b0a77f43af98c42c9267a31e07
https://github.com/llvm/llvm-project/commit/fb90733e196039b0a77f43af98c42c9267a31e07
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
A clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/firstbithigh.ll
A llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
A llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
Log Message:
-----------
[HLSL] implement elementwise firstbithigh hlsl builtin (#111082)
Implements elementwise firstbithigh hlsl builtin.
Implements firstbituhigh intrinsic for spirv and directx, which handles
unsigned integers
Implements firstbitshigh intrinsic for spirv and directx, which handles
signed integers.
Fixes #113486
Closes #99115
Commit: b5d8a03de453b79ca3c0bf841931bcaacf2fc830
https://github.com/llvm/llvm-project/commit/b5d8a03de453b79ca3c0bf841931bcaacf2fc830
Author: Rin Dobrescu <irina.dobrescu at arm.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
Log Message:
-----------
[AArch64] Add missing ASIMD FP convert instructions to scheduling model (#115146)
Some ASIMD FP convert instructions have incorrect scheduling
information. These instructions currently have latency 2, throughput 4
and utilise pipeline V. This patch corrects the scheduling models to
match the relevant Software Optimization Guide.
The V1 and V2 Software Optimization Guide show that ASIMD FP convert
instructions should all utilise pipelines V02. Their execution latency
and throughput should also differ depending on form. See section 3.17
"ASIMD floating-point instructions" in the Neoverse-V1 and Neoverse-V2
Software Optimization Guide for characteristics of instruction
performance.
Reference:
- V1 SOG: https://developer.arm.com/documentation/109897/latest/
- V2 SOG: https://developer.arm.com/documentation/109898/latest/
Commit: 8699f301ae70ce402618c061b6c45a99e31c5f5e
https://github.com/llvm/llvm-project/commit/8699f301ae70ce402618c061b6c45a99e31c5f5e
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Add more socket interceptors (#115020)
Adds getaddrinfo, getnameinfo, bind, listen, accept and connect
Commit: 76422385c3081475ed1bf0e23aa2f3913e66c5b8
https://github.com/llvm/llvm-project/commit/76422385c3081475ed1bf0e23aa2f3913e66c5b8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
Log Message:
-----------
[SLP]Support reordered buildvector nodes for better clustering
Patch adds reordering of the buildvector nodes for better clustering of
the compatible operations and future vectorization. Includes basic cost
estimation and if the transformation is not profitable - reverts it.
AVX512, -O3+LTO
Metric: size..text
Program size..text
results results0 diff
test-suite :: External/SPEC/CINT2006/401.bzip2/401.bzip2.test 74565.00 75701.00 1.5%
test-suite :: External/SPEC/CINT2017rate/541.leela_r/541.leela_r.test 75773.00 76397.00 0.8%
test-suite :: External/SPEC/CINT2017speed/641.leela_s/641.leela_s.test 75773.00 76397.00 0.8%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2014462.00 2024494.00 0.5%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 395219.00 396979.00 0.4%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 857795.00 859667.00 0.2%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 800472.00 802440.00 0.2%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 590699.00 591403.00 0.1%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 203006.00 203102.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 42408.00 42424.00 0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12451575.00 12451927.00 0.0%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1396480.00 1396448.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1396480.00 1396448.00 -0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 1047708.00 1047580.00 -0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-jpeg/consumer-jpeg.test 111344.00 111328.00 -0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 1087660.00 1087500.00 -0.0%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 280664.00 280616.00 -0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 502646.00 502006.00 -0.1%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1033135.00 1031567.00 -0.2%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 2070917.00 2065845.00 -0.2%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 2070917.00 2065845.00 -0.2%
test-suite :: External/SPEC/CINT2006/473.astar/473.astar.test 33893.00 33797.00 -0.3%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39677.00 39549.00 -0.3%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39674.00 39546.00 -0.3%
test-suite :: MultiSource/Benchmarks/MiBench/security-blowfish/security-blowfish.test 11560.00 11512.00 -0.4%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 653867.00 649275.00 -0.7%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 653867.00 649275.00 -0.7%
CINT2006/401.bzip2 - extra code vectorized
CINT2017rate/541.leela_r
CINT2017speed/641.leela_s - function
_ZN9FastBoard25get_pattern3_augment_specEiib not inlined anymore, better
vectorization
CFP2017rate/510.parest_r - better vectorization
JM/ldecod - better vectorization
JM/lencod - same
CINT2006/464.h264ref - extra code vectorized
CFP2006/447.dealII - extra vector code
MiBench/consumer-lame - vectorized 2 loops previously scalar
DOE-ProxyApps-C/miniGMG - small changes
Benchmarks/7zip - extra code vectorized, better vectorization
CFP2017rate/526.blender_r - extra vectorization
CFP2017speed/638.imagick_s
CFP2017rate/538.imagick_r - extra vectorization
MiBench/consumer-jpeg - extra vectorization
CINT2006/400.perlbench - extra vectorization
Prolangs-C/TimberWolfMC - small variations
Applications/sqlite3 - extra function vectorized and inlined
Benchmarks/tramp3d-v4 - extra code vectorized
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - extra code vectorized, function digcpy gets
vectorized and inlined
CINT2006/473.astar - extra code vectorized
MiBench/telecomm-gsm - extra code vectorized, better vector code
mediabench/gsm - same
MiBench/security-blowfish - extra code vectorized
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - sub4x4_dct function vectorized and gets
inlined
RISCV-V, SiFive-p670, O3+LTO
CFP2017rate/510.parest_r - extra vectorization
CFP2017rate/526.blender_r - extra vectorization
MiBench/consumer-lame - extra vectorized code
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/114284
Commit: c10d4b492d981c96fa3269bc0fe0b3ea9b1ca486
https://github.com/llvm/llvm-project/commit/c10d4b492d981c96fa3269bc0fe0b3ea9b1ca486
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/AST/SYCLKernelInfo.h
Log Message:
-----------
[clang][SYCL] Add a missing include to make the header standalone
Commit: f548d39c3c751446d124c08769080214680d53ba
https://github.com/llvm/llvm-project/commit/f548d39c3c751446d124c08769080214680d53ba
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
Log Message:
-----------
[Clang][Test] Update test after #115159 (#115172)
After #111852 was reverted in #115159, two tests now fail because they
partially depend on its changes. This patch temporarily fixes the
failing cases by updating the expected output to match the actual
output. Once #111852 is relanded, this can be reverted.
Commit: 3aa2f63822c0d829c875aa41ca2fd0103939dfaf
https://github.com/llvm/llvm-project/commit/3aa2f63822c0d829c875aa41ca2fd0103939dfaf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_castps_pd/_mm_castps_si128/_mm_castsi128_pd/_mm_castsi128_ps intrinsics
Commit: f74aed793819bf9e0509e802f33c5e29c350540c
https://github.com/llvm/llvm-project/commit/f74aed793819bf9e0509e802f33c5e29c350540c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-07 (Thu, 07 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/AArch64/trunc-nsw-nuw.ll
A llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
A llvm/test/CodeGen/X86/trunc-nsw-nuw.ll
Log Message:
-----------
[DAGCombiner] Add basic support for `trunc nsw/nuw` (#113808)
This patch adds basic support for `trunc nsw/nuw` in SDAG. It will allow
DAGCombiner to further eliminate in-reg `zext/sext` instructions.
Commit: 201d7607f87afff999b1257d27569a3053b85143
https://github.com/llvm/llvm-project/commit/201d7607f87afff999b1257d27569a3053b85143
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lld/Common/ErrorHandler.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/include/lld/Common/ErrorHandler.h
Log Message:
-----------
[ELF] Add context-aware diagnostic functions (#112319)
The current diagnostic functions log/warn/error/fatal lack a context
argument and call the global `lld::errorHandler()`, which prevents
multiple lld instances in one process.
This patch introduces context-aware replacements:
* log => Log(ctx)
* warn => Warn(ctx)
* errorOrWarn => Err(ctx)
* error => ErrAlways(ctx)
* fatal => Fatal(ctx)
Example: `errorOrWarn(toString(f) + "xxx")` => `Err(ctx) << f << "xxx"`.
(`toString(f)` is shortened to `f` as a bonus and may access `ctx`
without accessing the global variable (see `Target.cpp`)).
`ctx.e = &context->e;` can be replaced with a non-global Errorhandler
when `ctx` becomes a local variable.
(For the ELF port, the long term goal is to eliminate `error`. Most can
be straightforwardly converted to `Err(ctx)`.)
Commit: 83f92c33a4b4bd703882e7e9bb2c5efd15042b96
https://github.com/llvm/llvm-project/commit/83f92c33a4b4bd703882e7e9bb2c5efd15042b96
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
Log Message:
-----------
[RISCV] fix SP recovery in varargs functions (#114316)
This patch fixes sp recovery in the epilogue in varargs functions when
fp register is presented and second sp adjustment is applied.
Source of the issue: https://github.com/llvm/llvm-project/pull/110809
Commit: 9f3b6adb1508a714dc12aa020a20d813d9ab9f42
https://github.com/llvm/llvm-project/commit/9f3b6adb1508a714dc12aa020a20d813d9ab9f42
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Exit early if the graph is empty, NFC
No need to check anything if the graph is empty, just exit early.
Commit: 6219c8083904b49d09f466b703ca47891f978278
https://github.com/llvm/llvm-project/commit/6219c8083904b49d09f466b703ca47891f978278
Author: Duncan <duncpro at icloud.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/newhdrgen/yaml/unistd.yaml
M libc/spec/linux.td
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/pipe2.cpp
A libc/src/unistd/pipe2.h
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/pipe2_test.cpp
Log Message:
-----------
[libc] [unistd] implement pipe2 syscall wrapper (#114474)
Closes #85289
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: b7ee03ffb8696c4d81a5a97c61cb2149c17e6573
https://github.com/llvm/llvm-project/commit/b7ee03ffb8696c4d81a5a97c61cb2149c17e6573
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.cpp
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.h
Log Message:
-----------
[clang-include-fixer] Use heterogenous lookups with std::map (NFC) (#115113)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
Commit: c4dfa03f9f44fa183daabdd4e6d760a432ef6531
https://github.com/llvm/llvm-project/commit/c4dfa03f9f44fa183daabdd4e6d760a432ef6531
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
Log Message:
-----------
[clang-tidy] Call StringMap::find without constructing std::string (NFC) (#115114)
StringMap::find takes StringRef, so we don't need to allocate
temporary instances of std::string.
Commit: 18d2539ce674c1eabac187403257ae53ed2ee264
https://github.com/llvm/llvm-project/commit/18d2539ce674c1eabac187403257ae53ed2ee264
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
Log Message:
-----------
[StaticAnalyzer] Simplify code with DenseMap::operator[] (NFC) (#115116)
Commit: 4d12a14357b136e996f8789786f1b76348b5582b
https://github.com/llvm/llvm-project/commit/4d12a14357b136e996f8789786f1b76348b5582b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/KCFI.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
Log Message:
-----------
[Instrumentation] Remove unused includes (NFC) (#115117)
Identified with misc-include-cleaner.
Commit: 57ab62a2aa80911391fd9ea49573b39e7e9aa0f0
https://github.com/llvm/llvm-project/commit/57ab62a2aa80911391fd9ea49573b39e7e9aa0f0
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
Log Message:
-----------
[flang] Add FIR AliasAnalysis alias() wrapper to allow external getSource() method (#115073)
Adding a wrapper around alias(mlir::Value lhs, mlir::Value rhs) to allow
user to provide Source objects.
Commit: efe87fbc9d52952dc7ee89579347cbf49ecfa609
https://github.com/llvm/llvm-project/commit/efe87fbc9d52952dc7ee89579347cbf49ecfa609
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (#114144)
Commit: 5dc8d61177225a86266beeedf09baa847f97edf0
https://github.com/llvm/llvm-project/commit/5dc8d61177225a86266beeedf09baa847f97edf0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
Log Message:
-----------
[RISCV][GISel] Implement zexti32/zexti16 ComplexPatterns. (#115097)
Commit: 29e467fc78eb8b4308b57272ca4ad0d1f744f25f
https://github.com/llvm/llvm-project/commit/29e467fc78eb8b4308b57272ca4ad0d1f744f25f
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Type.h
Log Message:
-----------
[llvm] Deprecate Type::getPointerTo() (#113331)
`llvm::Type::getPointerTo()` is no longer needed with opaque pointers in LLVM.
It may rather confuse new contributors to think that LLVM has typed pointers.
Commit: aa7941289ee5b7d9bdf47e1b0ebf2130a86d9522
https://github.com/llvm/llvm-project/commit/aa7941289ee5b7d9bdf47e1b0ebf2130a86d9522
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
Log Message:
-----------
AMDGPU: Fold copy of scalar add of frame index (#115058)
This is a pre-optimization to avoid a regression in a future
commit. Currently we almost always emit frame index with
a v_mov_b32 and use vector adds for the pointer operations. We
need to consider the users of the frame index (or rather, the
transitive users of derived pointer operations) to know whether
the value will be used in a vector or scalar context. This saves
an sgpr->vgpr copy.
This optimization could be more general for any opcode that's
trivially convertible from a scalar to vector form (although this
is a workaround for a proper regbankselect).
Commit: 3b0f506c87cf7cf32604c9592aeca3ede0e1f79e
https://github.com/llvm/llvm-project/commit/3b0f506c87cf7cf32604c9592aeca3ede0e1f79e
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
Log Message:
-----------
[AMDGPU] Support `nuw` and `nusw` in buffer fat pointer lowering (#115039)
This commit usis the `nuw` flag on `getelemnetptr` to set the `nuw` flag
on buffer offset additions, and also moves from `inbounds` to the looser
`nusw` for the existing case.
Commit: 270f7cf68ae64a42d7112c0319f33a1d913e6333
https://github.com/llvm/llvm-project/commit/270f7cf68ae64a42d7112c0319f33a1d913e6333
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP][Docs] Update OpenMP supported features table (#115106)
OpenMP features table: added 'allocator' modifier for 'allocate' clause
as a completed feature in OpenMP 5.1 Implementation Details.
Commit: 8dd9f206b518a97132f3e2489ccc93704e638353
https://github.com/llvm/llvm-project/commit/8dd9f206b518a97132f3e2489ccc93704e638353
Author: Pranav Kant <prka at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix mlir:VectorToSPIRV (#115188)
Commit: 4d4024e1edf354113e8d0d11661d466ae5b0bee7
https://github.com/llvm/llvm-project/commit/4d4024e1edf354113e8d0d11661d466ae5b0bee7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M lldb/test/API/lit.cfg.py
M lldb/test/Shell/lit.cfg.py
M lldb/test/Unit/lit.cfg.py
M lldb/test/Unit/lit.site.cfg.py.in
Log Message:
-----------
[lldb] Set MallocNanoZone for all sanitizers when running tests
Disabling MallocNanoZone is necessary for both ASan and TSan.
Commit: 38cc03f78e3046837d8fc29d729bc2cee0c31e89
https://github.com/llvm/llvm-project/commit/38cc03f78e3046837d8fc29d729bc2cee0c31e89
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Restore whole-archive state when `-fjmc` (#115181)
`--whole-archive` is passed to the linker to have it consume all objects
within the SIE Just My Code library, rather than just those that fulfil
outstanding references.
Prior to this change, `--no-whole-archive` was used to reset the
associated archive handling state in the linker, under the assumption
that `--whole-archive` wasn't already in effect. But that assumption may
be incorrect. So use `--push/pop-state` to restore the previous state,
whatever that may be.
Given the position of these switches on the link line, the problem
described with the outgoing code is unlikely to cause an issue in
practice. But push/pop protect against accidents due to future additions
to and reorderings of arguments.
PS5 only. The proprietary PS4 linker doesn't support `--push/pop-state`,
or an equivalent.
SIE tracker: TOOLCHAIN-16704.
Commit: 5a6cc509215b62e94de3b798ea26944a375ce6cb
https://github.com/llvm/llvm-project/commit/5a6cc509215b62e94de3b798ea26944a375ce6cb
Author: Jingyu Qiu <51221277+SoftJing1 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/newhdrgen/yaml/sys/mman.yaml
M libc/spec/linux.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mremap.cpp
A libc/src/sys/mman/mremap.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/mremap_test.cpp
Log Message:
-----------
[libc] add mremap (#112804)
Commit: 39f2bae2407e08176a453c7c7e6f4888bbf28a4e
https://github.com/llvm/llvm-project/commit/39f2bae2407e08176a453c7c7e6f4888bbf28a4e
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
A clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
Log Message:
-----------
[HLSL] Add RasterizerOrderedStructuredBuffer definition to HLSLExternalSemaSource (#113648)
Adds `RasterizerOrderedStructuredBuffer` definition to
HLSLExternalSemaSource. Adds separate tests for the AST shape and
element types. Adds constructor/handle.fromBinding and subscript test
cases to shared test file for structured buffers. Additional methods
will be added later.
Fixes #112776
Commit: aae5a38e4e5121e340541794404eb62f26e66bf0
https://github.com/llvm/llvm-project/commit/aae5a38e4e5121e340541794404eb62f26e66bf0
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Mark socket functions weak (#115088)
Downstream ther'es a user that needs the syscall wrappers to be weak. I
intend to set up a proper mechanism for just listing which functions
should be weak eventually, but for now this is necessary.
Commit: cb90d5b3ef463f0a471f9c6d39978c3764021dea
https://github.com/llvm/llvm-project/commit/cb90d5b3ef463f0a471f9c6d39978c3764021dea
Author: Evan Wilde <ewilde at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M cmake/Modules/CMakePolicy.cmake
Log Message:
-----------
[CMake] Enable CMP0156 if available (#115046)
Some linkers do not require that libraries are repeated on the command
line. The Apple linker emits warnings when duplicate libraries are
specified, resulting in a wall of warnings.
CMP0156 deduplicates libraries on the command line when the linker
doesn't require them.
This patch enables CMP0156 to quiet the warnings when using a version of
CMake that recognizes it (CMake 3.29 and newer).
Commit: 712c90e479f975f2e0c5ed4554dbf2f3a7a6d9d6
https://github.com/llvm/llvm-project/commit/712c90e479f975f2e0c5ed4554dbf2f3a7a6d9d6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_cvtsi64_sd
Commit: 6ccbf1da6c9225fddaf6911e7bb49ee011e845a6
https://github.com/llvm/llvm-project/commit/6ccbf1da6c9225fddaf6911e7bb49ee011e845a6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineSelect - use SelectableOp helper to match the zero operand as well as the target shuffle
For the "select(mask, extract_subvector(shuffle(x)), zero) --> extract_subvector(select(insert_subvector(mask), shuffle(x), zero))" fold, match the zero operand inside the SelectableOp helper.
Prep work for #113400 - we will be able to relax the zero operand requirement for some target shuffles.
Commit: ffc2233395f0b1a3a0c277d196bb0a0ccae84ab7
https://github.com/llvm/llvm-project/commit/ffc2233395f0b1a3a0c277d196bb0a0ccae84ab7
Author: Amara Emerson <amara at apple.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
Log Message:
-----------
[AArch64][SVE2] Add pattern for constructive EXT instruction. (#115047)
rdar://137214338
Commit: 8c752900dda82115ebb8231e6d5ac703e703547e
https://github.com/llvm/llvm-project/commit/8c752900dda82115ebb8231e6d5ac703e703547e
Author: Gang Chen <gangc at amd.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/Assembler/target-type-param-errors.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
A llvm/test/CodeGen/AMDGPU/s-barrier.ll
Log Message:
-----------
[AMDGPU] modify named barrier builtins and intrinsics (#114550)
Use a local pointer type to represent the named barrier in builtin and
intrinsic. This makes the definitions more user friendly
bacause they do not need to worry about the hardware ID assignment. Also
this approach is more like the other popular GPU programming language.
Named barriers should be represented as global variables of addrspace(3)
in LLVM-IR. Compiler assigns the special LDS offsets for those variables
during AMDGPULowerModuleLDS pass. Those addresses are converted to hw
barrier ID during instruction selection. The rest of the
instruction-selection changes are primarily due to the
intrinsic-definition changes.
Commit: cff2199e0f0e54177997ecf9571ba874231cefe4
https://github.com/llvm/llvm-project/commit/cff2199e0f0e54177997ecf9571ba874231cefe4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-narrow-binop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
Log Message:
-----------
Revert "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"
This reverts commit 999dfb2067eb75609b735944af876279025ac171.
I received a report that his may have increased fallbacks on AArch64.
Commit: b231647475b7fa78ad9382a5505889f1167e9cea
https://github.com/llvm/llvm-project/commit/b231647475b7fa78ad9382a5505889f1167e9cea
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A libclc/clc/include/clc/clc_as_type.h
M libclc/clc/include/clc/internal/clc.h
A libclc/clc/include/clc/relational/binary_decl.inc
A libclc/clc/include/clc/relational/clc_all.h
A libclc/clc/include/clc/relational/clc_any.h
A libclc/clc/include/clc/relational/clc_bitselect.h
A libclc/clc/include/clc/relational/clc_bitselect.inc
A libclc/clc/include/clc/relational/clc_isequal.h
A libclc/clc/include/clc/relational/clc_isfinite.h
A libclc/clc/include/clc/relational/clc_isgreater.h
A libclc/clc/include/clc/relational/clc_isgreaterequal.h
A libclc/clc/include/clc/relational/clc_isinf.h
A libclc/clc/include/clc/relational/clc_isless.h
A libclc/clc/include/clc/relational/clc_islessequal.h
A libclc/clc/include/clc/relational/clc_islessgreater.h
A libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/relational/clc_isnormal.h
A libclc/clc/include/clc/relational/clc_isnotequal.h
A libclc/clc/include/clc/relational/clc_isordered.h
A libclc/clc/include/clc/relational/clc_isunordered.h
A libclc/clc/include/clc/relational/clc_select.h
A libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_signbit.h
A libclc/clc/include/clc/relational/floatn.inc
A libclc/clc/include/clc/relational/relational.h
A libclc/clc/include/clc/relational/unary_decl.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/relational/clc_all.cl
A libclc/clc/lib/generic/relational/clc_any.cl
A libclc/clc/lib/generic/relational/clc_bitselect.cl
A libclc/clc/lib/generic/relational/clc_bitselect.inc
A libclc/clc/lib/generic/relational/clc_isequal.cl
A libclc/clc/lib/generic/relational/clc_isfinite.cl
A libclc/clc/lib/generic/relational/clc_isgreater.cl
A libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
A libclc/clc/lib/generic/relational/clc_isinf.cl
A libclc/clc/lib/generic/relational/clc_isless.cl
A libclc/clc/lib/generic/relational/clc_islessequal.cl
A libclc/clc/lib/generic/relational/clc_islessgreater.cl
A libclc/clc/lib/generic/relational/clc_isnan.cl
A libclc/clc/lib/generic/relational/clc_isnormal.cl
A libclc/clc/lib/generic/relational/clc_isnotequal.cl
A libclc/clc/lib/generic/relational/clc_isordered.cl
A libclc/clc/lib/generic/relational/clc_isunordered.cl
A libclc/clc/lib/generic/relational/clc_select.cl
A libclc/clc/lib/generic/relational/clc_select.inc
A libclc/clc/lib/generic/relational/clc_signbit.cl
M libclc/generic/include/clc/relational/any.h
R libclc/generic/include/clc/relational/binary_decl.inc
R libclc/generic/include/clc/relational/floatn.inc
R libclc/generic/include/clc/relational/unary_decl.inc
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/relational/all.cl
M libclc/generic/lib/relational/any.cl
A libclc/generic/lib/relational/binary_def.inc
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/isequal.cl
M libclc/generic/lib/relational/isfinite.cl
M libclc/generic/lib/relational/isgreater.cl
M libclc/generic/lib/relational/isgreaterequal.cl
M libclc/generic/lib/relational/isinf.cl
M libclc/generic/lib/relational/isless.cl
M libclc/generic/lib/relational/islessequal.cl
M libclc/generic/lib/relational/islessgreater.cl
M libclc/generic/lib/relational/isnan.cl
M libclc/generic/lib/relational/isnormal.cl
M libclc/generic/lib/relational/isnotequal.cl
M libclc/generic/lib/relational/isordered.cl
M libclc/generic/lib/relational/isunordered.cl
R libclc/generic/lib/relational/relational.h
M libclc/generic/lib/relational/signbit.cl
A libclc/generic/lib/relational/unary_def.inc
Log Message:
-----------
[libclc] Move relational functions to the CLC library (#115171)
The OpenCL relational functions now call their CLC counterparts, and the
CLC relational functions are defined identically to how the OpenCL
functions were defined.
As usual, clspv and spir-v targets bypass these.
No observable changes to any libclc target (measured with llvm-diff).
Commit: 381156c130553179fe3499403cf530deb73f1a3f
https://github.com/llvm/llvm-project/commit/381156c130553179fe3499403cf530deb73f1a3f
Author: Tex Riddell <texr at microsoft.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/test/CodeGen/DirectX/atan2.ll
M llvm/test/CodeGen/DirectX/exp-vec.ll
M llvm/test/CodeGen/DirectX/log-vec.ll
M llvm/test/CodeGen/DirectX/step.ll
Log Message:
-----------
[HLSL] Update tests to use splat for vector constants (#115198)
Fixes test failures after splat IR printer change: 38fffa630ee8.
Commit: 768b0b4eb83e8ca62cc504ba3f0f9a0c46eea7b6
https://github.com/llvm/llvm-project/commit/768b0b4eb83e8ca62cc504ba3f0f9a0c46eea7b6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rv64-double-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-double-convert.ll
A llvm/test/CodeGen/RISCV/rv64-float-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-float-convert.ll
A llvm/test/CodeGen/RISCV/rv64-half-convert-strict.ll
A llvm/test/CodeGen/RISCV/rv64-half-convert.ll
Log Message:
-----------
[RISCV] Add test cases for RV64 i128<->half/float/double (#115124)
These emit 'ti' libcalls.
Commit: 3ed4b0b0efca7a9467ce83fc62de9413da38006d
https://github.com/llvm/llvm-project/commit/3ed4b0b0efca7a9467ce83fc62de9413da38006d
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll
Log Message:
-----------
[NVPTX] Emit prmt selection value in hex (#115049)
Commit: a1be09a0f3278ab198ba27c5fb171192758d20db
https://github.com/llvm/llvm-project/commit/a1be09a0f3278ab198ba27c5fb171192758d20db
Author: Javed Absar <106147771+javedabsar1 at users.noreply.github.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
Log Message:
-----------
[mlir][linalg] Fix isAllParallelLoops method implementation. (#115179)
Commit: e7bad34475e2fd72e8a9952ded4bfec68d2d0f5a
https://github.com/llvm/llvm-project/commit/e7bad34475e2fd72e8a9952ded4bfec68d2d0f5a
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/lib/fuzzer/CMakeLists.txt
M compiler-rt/lib/fuzzer/tests/CMakeLists.txt
M compiler-rt/lib/msan/tests/CMakeLists.txt
M compiler-rt/lib/tsan/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Use installed libc++(abi) for tests instead of build tree
Using the build tree is somewhat fragile since the layout is not
guaranteed to be stable and means the tests are tightly coupled to the
libc++/libc++abi build tree layout. Instead update the ExternalProject
to install the library and headers and do not add the build tree to
the include/linker flags.
Pull Request: https://github.com/llvm/llvm-project/pull/115077
Commit: 208f8e6901ec957583e79bc777fb61b9d61c49f3
https://github.com/llvm/llvm-project/commit/208f8e6901ec957583e79bc777fb61b9d61c49f3
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-11-06 (Wed, 06 Nov 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.cpp
M clang-tools-extra/clang-include-fixer/InMemorySymbolIndex.h
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/SYCLKernelInfo.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/CIR/CIRGenerator.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/SourceManager.cpp
M clang/lib/Basic/Targets/Mips.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
A clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/XRayArgs.cpp
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
A clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/ast-dump-decl.cpp
R clang/test/ASTMerge/class-template-spec/Inputs/class-template-spec.cpp
R clang/test/ASTMerge/class-template-spec/test.cpp
M clang/test/CIR/hello.c
R clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
R clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGen/PowerPC/altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
M clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
M clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init-no-parentheses.c
M clang/test/CodeGen/PowerPC/vector-bool-pixel-altivec-init.c
M clang/test/CodeGen/RISCV/rvv-vls-bitwise-ops.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/SystemZ/zvector2.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vbmi2-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
M clang/test/CodeGen/X86/avx512vlvbmi2-builtins.c
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/X86/xop-builtins-cmp.c
M clang/test/CodeGen/X86/xop-builtins.c
M clang/test/CodeGen/aarch64-neon-3v.c
M clang/test/CodeGen/aarch64-neon-intrinsics.c
M clang/test/CodeGen/aarch64-neon-misc.c
M clang/test/CodeGen/aarch64-neon-shifts.c
M clang/test/CodeGen/aarch64-neon-tbl.c
M clang/test/CodeGen/aarch64-poly64.c
M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
M clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-mve-intrinsics/absneg.c
M clang/test/CodeGen/arm-mve-intrinsics/bitwise-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/cplusplus.cpp
M clang/test/CodeGen/arm-mve-intrinsics/vbicq.c
M clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm.c
M clang/test/CodeGen/arm-mve-intrinsics/vornq.c
M clang/test/CodeGen/arm-neon-shifts.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtinshufflevector2.c
M clang/test/CodeGen/const-init.c
M clang/test/CodeGen/matrix-type-operators.c
M clang/test/CodeGen/neon-immediate-ubsan.c
M clang/test/CodeGen/nofpclass.c
M clang/test/CodeGen/ppc-vec_ct-truncate.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGen/variadic-nvptx.c
M clang/test/CodeGen/vecshift.c
M clang/test/CodeGen/vector-scalar.c
M clang/test/CodeGenCUDA/Inputs/cuda.h
A clang/test/CodeGenCUDA/grid-constant.cu
M clang/test/CodeGenCXX/auto-var-init.cpp
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenCXX/ext-vector-type-conditional.cpp
M clang/test/CodeGenCXX/matrix-type-builtins.cpp
M clang/test/CodeGenCXX/matrix-type-operators.cpp
M clang/test/CodeGenCXX/vector-size-conditional.cpp
M clang/test/CodeGenCXX/vector-splat-conversion.cpp
M clang/test/CodeGenHLSL/BasicFeatures/standard_conversion_sequences.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl
A clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/logical-ops.cl
M clang/test/CodeGenOpenCL/partial_initializer.cl
M clang/test/CodeGenOpenCL/shifts.cl
M clang/test/CodeGenOpenCL/vector_literals.cl
M clang/test/Driver/XRay/xray-mode-flags.cpp
M clang/test/Driver/ps5-linker.c
M clang/test/Headers/__clang_hip_math_deprecated.hip
M clang/test/Headers/wasm.c
M clang/test/Lexer/SourceLocationsOverflow.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Misc/sloc-usage.cpp
M clang/test/Modules/cxx-templates.cpp
A clang/test/OpenMP/allocate_allocator_modifier_ast_print.cpp
A clang/test/OpenMP/allocate_allocator_modifier_codegen.cpp
A clang/test/OpenMP/allocate_allocator_modifier_messages.cpp
M clang/test/SemaCUDA/Inputs/cuda.h
A clang/test/SemaCUDA/grid-constant.cu
M clang/test/SemaCXX/cxx2c-placeholder-vars.cpp
A clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
M cmake/Modules/CMakePolicy.cmake
M compiler-rt/include/sanitizer/tsan_interface_atomic.h
M compiler-rt/lib/orc/dlfcn_wrapper.cpp
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/orc/elfnix_platform.h
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Parser/token-sequence.h
M flang/include/flang/Runtime/CUDA/memory.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/token-sequence.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/runtime/CUDA/memory.cpp
M flang/runtime/assign.cpp
R flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
R flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
M flang/test/Driver/arch-specific-libdir-rpath.f95
M flang/test/Evaluate/errors01.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Lower/PowerPC/ppc-vec-cmp.f90
M flang/test/Lower/PowerPC/ppc-vec-convert.f90
M flang/test/Lower/PowerPC/ppc-vec-perm.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-shift.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
A flang/test/Preprocessing/defined-in-macro.F90
A flang/test/Semantics/Inputs/modfile70.mod
M flang/test/Semantics/modfile63.f90
A flang/test/Semantics/modfile70.f90
A flang/test/Semantics/rewrite03.f90
A flang/test/Transforms/debug-assumed-rank-array.fir
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/newhdrgen/yaml/sys/mman.yaml
M libc/newhdrgen/yaml/unistd.yaml
M libc/spec/linux.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mremap.cpp
A libc/src/sys/mman/mremap.h
M libc/src/sys/socket/linux/recvmsg.cpp
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/pipe2.cpp
A libc/src/unistd/pipe2.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/mremap_test.cpp
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/pipe2_test.cpp
A libclc/clc/include/clc/clc_as_type.h
A libclc/clc/include/clc/integer/clc_abs.h
A libclc/clc/include/clc/integer/clc_abs.inc
A libclc/clc/include/clc/integer/clc_abs_diff.h
A libclc/clc/include/clc/integer/clc_abs_diff.inc
M libclc/clc/include/clc/internal/clc.h
A libclc/clc/include/clc/relational/binary_decl.inc
A libclc/clc/include/clc/relational/clc_all.h
A libclc/clc/include/clc/relational/clc_any.h
A libclc/clc/include/clc/relational/clc_bitselect.h
A libclc/clc/include/clc/relational/clc_bitselect.inc
A libclc/clc/include/clc/relational/clc_isequal.h
A libclc/clc/include/clc/relational/clc_isfinite.h
A libclc/clc/include/clc/relational/clc_isgreater.h
A libclc/clc/include/clc/relational/clc_isgreaterequal.h
A libclc/clc/include/clc/relational/clc_isinf.h
A libclc/clc/include/clc/relational/clc_isless.h
A libclc/clc/include/clc/relational/clc_islessequal.h
A libclc/clc/include/clc/relational/clc_islessgreater.h
A libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/relational/clc_isnormal.h
A libclc/clc/include/clc/relational/clc_isnotequal.h
A libclc/clc/include/clc/relational/clc_isordered.h
A libclc/clc/include/clc/relational/clc_isunordered.h
A libclc/clc/include/clc/relational/clc_select.h
A libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_signbit.h
A libclc/clc/include/clc/relational/floatn.inc
A libclc/clc/include/clc/relational/relational.h
A libclc/clc/include/clc/relational/unary_decl.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/integer/clc_abs.cl
A libclc/clc/lib/generic/integer/clc_abs.inc
A libclc/clc/lib/generic/integer/clc_abs_diff.cl
A libclc/clc/lib/generic/integer/clc_abs_diff.inc
A libclc/clc/lib/generic/relational/clc_all.cl
A libclc/clc/lib/generic/relational/clc_any.cl
A libclc/clc/lib/generic/relational/clc_bitselect.cl
A libclc/clc/lib/generic/relational/clc_bitselect.inc
A libclc/clc/lib/generic/relational/clc_isequal.cl
A libclc/clc/lib/generic/relational/clc_isfinite.cl
A libclc/clc/lib/generic/relational/clc_isgreater.cl
A libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
A libclc/clc/lib/generic/relational/clc_isinf.cl
A libclc/clc/lib/generic/relational/clc_isless.cl
A libclc/clc/lib/generic/relational/clc_islessequal.cl
A libclc/clc/lib/generic/relational/clc_islessgreater.cl
A libclc/clc/lib/generic/relational/clc_isnan.cl
A libclc/clc/lib/generic/relational/clc_isnormal.cl
A libclc/clc/lib/generic/relational/clc_isnotequal.cl
A libclc/clc/lib/generic/relational/clc_isordered.cl
A libclc/clc/lib/generic/relational/clc_isunordered.cl
A libclc/clc/lib/generic/relational/clc_select.cl
A libclc/clc/lib/generic/relational/clc_select.inc
A libclc/clc/lib/generic/relational/clc_signbit.cl
M libclc/generic/include/clc/relational/any.h
R libclc/generic/include/clc/relational/binary_decl.inc
R libclc/generic/include/clc/relational/floatn.inc
R libclc/generic/include/clc/relational/unary_decl.inc
M libclc/generic/lib/integer/abs.cl
M libclc/generic/lib/integer/abs.inc
M libclc/generic/lib/integer/abs_diff.cl
M libclc/generic/lib/integer/abs_diff.inc
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/clc_tan.cl
M libclc/generic/lib/math/sincos_helpers.cl
M libclc/generic/lib/relational/all.cl
M libclc/generic/lib/relational/any.cl
A libclc/generic/lib/relational/binary_def.inc
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/isequal.cl
M libclc/generic/lib/relational/isfinite.cl
M libclc/generic/lib/relational/isgreater.cl
M libclc/generic/lib/relational/isgreaterequal.cl
M libclc/generic/lib/relational/isinf.cl
M libclc/generic/lib/relational/isless.cl
M libclc/generic/lib/relational/islessequal.cl
M libclc/generic/lib/relational/islessgreater.cl
M libclc/generic/lib/relational/isnan.cl
M libclc/generic/lib/relational/isnormal.cl
M libclc/generic/lib/relational/isnotequal.cl
M libclc/generic/lib/relational/isordered.cl
M libclc/generic/lib/relational/isunordered.cl
R libclc/generic/lib/relational/relational.h
M libclc/generic/lib/relational/signbit.cl
A libclc/generic/lib/relational/unary_def.inc
M libcxx/CMakeLists.txt
M libcxx/docs/DesignDocs/ThreadingSupportAPI.rst
M libcxx/include/__algorithm/adjacent_find.h
M libcxx/include/__algorithm/all_of.h
M libcxx/include/__algorithm/any_of.h
M libcxx/include/__algorithm/copy_if.h
M libcxx/include/__algorithm/count_if.h
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/iterator_operations.h
M libcxx/include/__algorithm/lexicographical_compare.h
M libcxx/include/__algorithm/ranges_adjacent_find.h
M libcxx/include/__algorithm/ranges_all_of.h
M libcxx/include/__algorithm/ranges_any_of.h
M libcxx/include/__algorithm/ranges_copy_if.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__algorithm/ranges_count_if.h
M libcxx/include/__algorithm/ranges_fill_n.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__algorithm/unique.h
M libcxx/include/__atomic/aliases.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__atomic/cxx_atomic_impl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/high_resolution_clock.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/parser_std_format_spec.h
M libcxx/include/__chrono/statically_widen.h
M libcxx/include/__chrono/steady_clock.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
M libcxx/include/__config_site.in
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__cstddef/nullptr_t.h
M libcxx/include/__cstddef/ptrdiff_t.h
M libcxx/include/__cstddef/size_t.h
M libcxx/include/__exception/exception_ptr.h
M libcxx/include/__filesystem/directory_entry.h
M libcxx/include/__filesystem/directory_iterator.h
M libcxx/include/__filesystem/operations.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__filesystem/recursive_directory_iterator.h
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__format/concepts.h
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__format/format_context.h
M libcxx/include/__format/format_functions.h
M libcxx/include/__format/format_parse_context.h
M libcxx/include/__format/formatter_bool.h
M libcxx/include/__format/formatter_char.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__format/parser_std_format_spec.h
M libcxx/include/__format/unicode.h
M libcxx/include/__format/write_escaped.h
M libcxx/include/__functional/function.h
M libcxx/include/__functional/hash.h
M libcxx/include/__fwd/fstream.h
M libcxx/include/__fwd/ios.h
M libcxx/include/__fwd/istream.h
M libcxx/include/__fwd/ostream.h
M libcxx/include/__fwd/sstream.h
M libcxx/include/__fwd/streambuf.h
M libcxx/include/__fwd/string.h
M libcxx/include/__fwd/string_view.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/apple.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_defaults.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
M libcxx/include/__locale_dir/locale_base_api/freebsd.h
M libcxx/include/__mbstate_t.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory_resource/synchronized_pool_resource.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__ostream/print.h
M libcxx/include/__random/binomial_distribution.h
M libcxx/include/__random/random_device.h
M libcxx/include/__ranges/istream_view.h
M libcxx/include/__stop_token/atomic_unique_lock.h
M libcxx/include/__stop_token/stop_callback.h
M libcxx/include/__stop_token/stop_source.h
M libcxx/include/__stop_token/stop_state.h
M libcxx/include/__stop_token/stop_token.h
M libcxx/include/__string/char_traits.h
M libcxx/include/__support/xlocale/__posix_l_fallback.h
M libcxx/include/__support/xlocale/__strtonum_fallback.h
M libcxx/include/__thread/formatter.h
M libcxx/include/__thread/id.h
M libcxx/include/__thread/jthread.h
M libcxx/include/__thread/support.h
M libcxx/include/__thread/this_thread.h
M libcxx/include/__thread/thread.h
M libcxx/include/__thread/timed_backoff_policy.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__vector/vector.h
M libcxx/include/barrier
M libcxx/include/chrono
M libcxx/include/clocale
M libcxx/include/codecvt
M libcxx/include/complex
M libcxx/include/condition_variable
M libcxx/include/cstdint
M libcxx/include/cstdlib
M libcxx/include/deque
M libcxx/include/format
M libcxx/include/forward_list
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/iomanip
M libcxx/include/ios
M libcxx/include/iosfwd
M libcxx/include/iostream
M libcxx/include/istream
M libcxx/include/latch
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/mutex
M libcxx/include/new
M libcxx/include/ostream
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/regex
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/sstream
M libcxx/include/stdatomic.h
M libcxx/include/stop_token
M libcxx/include/streambuf
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/syncstream
M libcxx/include/thread
M libcxx/include/vector
M libcxx/include/version
M libcxx/include/wchar.h
M libcxx/modules/std.compat.cppm.in
M libcxx/modules/std.compat/clocale.inc
M libcxx/modules/std.compat/cstdlib.inc
M libcxx/modules/std.compat/cwchar.inc
M libcxx/modules/std.compat/cwctype.inc
M libcxx/modules/std.cppm.in
M libcxx/modules/std/atomic.inc
M libcxx/modules/std/barrier.inc
M libcxx/modules/std/chrono.inc
M libcxx/modules/std/clocale.inc
M libcxx/modules/std/codecvt.inc
M libcxx/modules/std/complex.inc
M libcxx/modules/std/condition_variable.inc
M libcxx/modules/std/cstdlib.inc
M libcxx/modules/std/cwchar.inc
M libcxx/modules/std/cwctype.inc
M libcxx/modules/std/filesystem.inc
M libcxx/modules/std/format.inc
M libcxx/modules/std/fstream.inc
M libcxx/modules/std/future.inc
M libcxx/modules/std/iomanip.inc
M libcxx/modules/std/ios.inc
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/iostream.inc
M libcxx/modules/std/istream.inc
M libcxx/modules/std/latch.inc
M libcxx/modules/std/locale.inc
M libcxx/modules/std/memory.inc
M libcxx/modules/std/mutex.inc
M libcxx/modules/std/ostream.inc
M libcxx/modules/std/print.inc
M libcxx/modules/std/random.inc
M libcxx/modules/std/ranges.inc
M libcxx/modules/std/regex.inc
M libcxx/modules/std/semaphore.inc
M libcxx/modules/std/shared_mutex.inc
M libcxx/modules/std/spanstream.inc
M libcxx/modules/std/sstream.inc
M libcxx/modules/std/stop_token.inc
M libcxx/modules/std/streambuf.inc
M libcxx/modules/std/string.inc
M libcxx/modules/std/string_view.inc
M libcxx/modules/std/strstream.inc
M libcxx/modules/std/syncstream.inc
M libcxx/modules/std/thread.inc
M libcxx/src/algorithm.cpp
M libcxx/src/call_once.cpp
M libcxx/src/chrono.cpp
M libcxx/src/experimental/include/tzdb/tzdb_list_private.h
M libcxx/src/filesystem/time_utils.h
M libcxx/src/include/atomic_support.h
M libcxx/src/include/config_elast.h
M libcxx/src/ios.cpp
M libcxx/src/ios.instantiations.cpp
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
M libcxx/src/memory.cpp
M libcxx/src/memory_resource.cpp
M libcxx/src/ostream.cpp
M libcxx/src/print.cpp
M libcxx/src/random_shuffle.cpp
M libcxx/src/std_stream.h
M libcxx/src/string.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
M libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/test_data.json
M libcxx/test/libcxx/feature_test_macro/version_header.sh.py
M libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/test/libcxx/include_as_c.sh.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/libcxx/vendor/apple/availability-with-pedantic-errors.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.tests.h
M libcxx/test/std/language.support/support.limits/support.limits.general/barrier.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/iomanip.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/latch.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/semaphore.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/shared_mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/stop_token.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/thread.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.cmp/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.special/cmp_nullptr.pass.cpp
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/header_information.py
M libcxx/utils/libcxx/test/dsl.py
M libcxx/utils/libcxx/test/features.py
M lld/COFF/SymbolTable.cpp
M lld/Common/ErrorHandler.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/include/lld/Common/ErrorHandler.h
A lld/test/COFF/locally-imported-arm64ec.test
M lldb/source/Symbol/CompileUnit.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
A lldb/test/API/functionalities/breakpoint/same_cu_name/TestFileBreakpointsSameCUName.py
A lldb/test/API/functionalities/breakpoint/same_cu_name/common.cpp
A lldb/test/API/functionalities/breakpoint/same_cu_name/main.cpp
M lldb/test/API/lit.cfg.py
M lldb/test/Shell/lit.cfg.py
M lldb/test/Unit/lit.cfg.py
M lldb/test/Unit/lit.site.cfg.py.in
M lldb/unittests/Host/AlarmTest.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodeReview.rst
M llvm/docs/Contributing.rst
M llvm/docs/LangRef.rst
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/ExecutionEngine/Orc/IndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/LazyReexports.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/MC/MCSchedule.h
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/CycleAnalysis.cpp
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/DemandedBits.cpp
M llvm/lib/Analysis/DomTreeUpdater.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
M llvm/lib/Analysis/IndirectCallPromotionAnalysis.cpp
M llvm/lib/Analysis/InstCount.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryLocation.cpp
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCSchedule.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
M llvm/lib/Target/LoongArch/LoongArchSubtarget.h
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSubtarget.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/KCFI.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
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M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
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M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/logicalop.ll
M llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
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M llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
M llvm/test/Analysis/CostModel/AMDGPU/fneg.ll
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M llvm/test/Analysis/CostModel/AMDGPU/mul.ll
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M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
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M llvm/test/Analysis/ValueTracking/knownbits-bmi-pattern.ll
M llvm/test/Analysis/ValueTracking/knownbits-x86-hadd-hsub.ll
M llvm/test/Analysis/ValueTracking/knownzero-shift.ll
M llvm/test/Analysis/ValueTracking/numsignbits-shl.ll
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M llvm/test/Assembler/constant-splat.ll
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M llvm/test/Assembler/target-type-param-errors.ll
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A llvm/test/CodeGen/AArch64/latency.ll
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M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
A llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
R llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups.ll
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M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
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A llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
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M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
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M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
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M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-p7-in-memory.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
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R llvm/test/CodeGen/AMDGPU/promote-alloca-invalid-vector-gep.ll
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A llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
A llvm/test/CodeGen/AMDGPU/s-barrier.ll
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M llvm/test/CodeGen/AMDGPU/shrink-mad-fma.mir
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M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/DirectX/atan2.ll
M llvm/test/CodeGen/DirectX/exp-vec.ll
A llvm/test/CodeGen/DirectX/firstbithigh.ll
A llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
A llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
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M llvm/test/CodeGen/DirectX/step.ll
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A llvm/test/CodeGen/LoongArch/double-lround.ll
A llvm/test/CodeGen/LoongArch/float-lround.ll
M llvm/test/CodeGen/LoongArch/fp-rounding.ll
M llvm/test/CodeGen/LoongArch/merge-load-store.ll
A llvm/test/CodeGen/Mips/data-layout.ll
M llvm/test/CodeGen/Mips/implicit-sret.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll
M llvm/test/CodeGen/NVPTX/variadics-lowering.ll
M llvm/test/CodeGen/PowerPC/f128-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
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A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
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A llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
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M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/addrspacecast.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/branch-relaxation.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
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M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
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M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
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M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
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M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr93587.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
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M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
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M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
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M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
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A llvm/test/CodeGen/X86/trunc-nsw-nuw.ll
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M llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
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M llvm/test/Instrumentation/MemorySanitizer/reduce.ll
M llvm/test/Instrumentation/MemorySanitizer/vector-track-origins-neon.ll
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M llvm/test/Transforms/CorrelatedValuePropagation/overflows.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
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M llvm/test/Transforms/DeadStoreElimination/offsetted-overlapping-stores.ll
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A llvm/test/Transforms/FunctionSpecialization/solver-constants.ll
A llvm/test/Transforms/FunctionSpecialization/solver-dead-blocks.ll
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M llvm/test/Transforms/InstCombine/2007-03-21-SignedRangeTest.ll
M llvm/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll
M llvm/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
M llvm/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll
M llvm/test/Transforms/InstCombine/AArch64/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll
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M llvm/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll
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M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll
M llvm/test/Transforms/InstCombine/sub-of-negatible.ll
M llvm/test/Transforms/InstCombine/sub-xor.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-binop-ext.ll
M llvm/test/Transforms/InstCombine/trunc-demand.ll
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
M llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
M llvm/test/Transforms/InstCombine/uaddo.ll
M llvm/test/Transforms/InstCombine/udiv_select_to_select_shift.ll
M llvm/test/Transforms/InstCombine/umin_cttz_ctlz.ll
M llvm/test/Transforms/InstCombine/unfold-masked-merge-with-const-mask-vector.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-xor.ll
M llvm/test/Transforms/InstCombine/unsigned-add-overflow-check.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-mul-udiv.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/unsigned_saturated_sub.ll
M llvm/test/Transforms/InstCombine/variable-signext-of-variable-high-bit-extraction.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_phi_extract.ll
M llvm/test/Transforms/InstCombine/vec_sext.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll
M llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vector-casts.ll
M llvm/test/Transforms/InstCombine/vector-mul.ll
M llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll
M llvm/test/Transforms/InstCombine/vector-trunc.ll
M llvm/test/Transforms/InstCombine/vector-udiv.ll
M llvm/test/Transforms/InstCombine/vector-urem.ll
M llvm/test/Transforms/InstCombine/vector-xor.ll
M llvm/test/Transforms/InstCombine/with_overflow.ll
M llvm/test/Transforms/InstCombine/xor-and-or.ll
M llvm/test/Transforms/InstCombine/xor-ashr.ll
M llvm/test/Transforms/InstCombine/xor-icmps.ll
M llvm/test/Transforms/InstCombine/xor-of-or.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/xor2.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/InstCombine/zext.ll
M llvm/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
M llvm/test/Transforms/InstSimplify/ConstProp/ARM/mve-vctp.ll
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
M llvm/test/Transforms/InstSimplify/ConstProp/bitcast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/cast.ll
M llvm/test/Transforms/InstSimplify/ConstProp/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
M llvm/test/Transforms/InstSimplify/abs_intrinsic.ll
M llvm/test/Transforms/InstSimplify/add_vp.ll
M llvm/test/Transforms/InstSimplify/addsub.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/InstSimplify/bitreverse-fold.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/InstSimplify/canonicalize.ll
M llvm/test/Transforms/InstSimplify/cast-unsigned-icmp-cmp-0.ll
M llvm/test/Transforms/InstSimplify/cmp-vec-fast-path.ll
M llvm/test/Transforms/InstSimplify/compare.ll
M llvm/test/Transforms/InstSimplify/constantfold-add-nuw-allones-to-allones.ll
M llvm/test/Transforms/InstSimplify/constantfold-shl-nuw-C-to-C.ll
M llvm/test/Transforms/InstSimplify/ctpop-pow2.ll
M llvm/test/Transforms/InstSimplify/div.ll
M llvm/test/Transforms/InstSimplify/exp10.ll
M llvm/test/Transforms/InstSimplify/fast-math-strictfp.ll
M llvm/test/Transforms/InstSimplify/fast-math.ll
M llvm/test/Transforms/InstSimplify/fdiv.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic-strictfp.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic.ll
M llvm/test/Transforms/InstSimplify/floating-point-compare.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/fptoi-range.ll
M llvm/test/Transforms/InstSimplify/frexp.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/icmp-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp.ll
M llvm/test/Transforms/InstSimplify/implies.ll
M llvm/test/Transforms/InstSimplify/insertelement.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-non-zero.ll
M llvm/test/Transforms/InstSimplify/maxmin_intrinsics.ll
M llvm/test/Transforms/InstSimplify/negate.ll
M llvm/test/Transforms/InstSimplify/or-icmps-same-ops.ll
M llvm/test/Transforms/InstSimplify/or.ll
M llvm/test/Transforms/InstSimplify/pr28725.ll
M llvm/test/Transforms/InstSimplify/ptrmask.ll
M llvm/test/Transforms/InstSimplify/rem.ll
M llvm/test/Transforms/InstSimplify/returned.ll
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/sdiv.ll
M llvm/test/Transforms/InstSimplify/select-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/select-logical.ll
M llvm/test/Transforms/InstSimplify/select.ll
M llvm/test/Transforms/InstSimplify/select_or_and.ll
M llvm/test/Transforms/InstSimplify/shift-knownbits.ll
M llvm/test/Transforms/InstSimplify/shift.ll
M llvm/test/Transforms/InstSimplify/shr-nop.ll
M llvm/test/Transforms/InstSimplify/shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/shufflevector.ll
M llvm/test/Transforms/InstSimplify/strictfp-fadd.ll
M llvm/test/Transforms/InstSimplify/uscmp.ll
M llvm/test/Transforms/InstSimplify/vec-cmp.ll
M llvm/test/Transforms/InstSimplify/vec-icmp-of-cast.ll
M llvm/test/Transforms/InstSimplify/vector_gep.ll
M llvm/test/Transforms/InstSimplify/xor.ll
M llvm/test/Transforms/InterleavedAccess/X86/interleave-load-extract-shuffle-changes.ll
M llvm/test/Transforms/LoopDistribute/scev-inserted-runtime-check.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch-opaque-ptr.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch.ll
M llvm/test/Transforms/LoopUnroll/ARM/mve-upperbound.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors-inseltpoison.ll
M llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-vectors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/streaming-compatible-sve-no-maximize-bandwidth.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/vplan-native-inner-loop-only.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-not-when-safe.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/induction_plus.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/preserve-or-disjoint.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-versioning.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-int-row-major.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-add-sub-double-row-major.ll
M llvm/test/Transforms/MemCpyOpt/form-memset.ll
M llvm/test/Transforms/NewGVN/completeness.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/predicated-reduction.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr50555.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr88239.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vec-shift.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
A llvm/test/Transforms/PhaseOrdering/lto-argpromotion-ipsccp.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
M llvm/test/Transforms/Reassociate/fast-ReassociateVector.ll
M llvm/test/Transforms/Reassociate/negation.ll
M llvm/test/Transforms/Reassociate/xor_reassoc.ll
M llvm/test/Transforms/RewriteStatepointsForGC/vector-nonlive-clobber.ll
M llvm/test/Transforms/SCCP/add-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/intrinsics.ll
M llvm/test/Transforms/SCCP/ip-ranges-casts.ll
M llvm/test/Transforms/SCCP/overdefined-ext.ll
M llvm/test/Transforms/SCCP/trunc-nuw-nsw-flags.ll
M llvm/test/Transforms/SCCP/vector-bitcast.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/external-use-icmp.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-root.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/sdiv-pow2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec15-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-min-max.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/widen.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/floating-point.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/getpointerschaincost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/minbw-with-and-and-scalar-trunc.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/phi-const.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduction-extension-after-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/scatter-vectorize-reversed.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-stores-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-bv-multi-uses.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-to-large-than-bw.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-node-trunc-with-signed-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec15-base.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-not-resized-op-resized.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_2.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-and-const-load.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-div.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_sel.ll
M llvm/test/Transforms/SLPVectorizer/X86/combined-stores-chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_smallpt.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-counter.ll
M llvm/test/Transforms/SLPVectorizer/X86/different-vec-widths.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/external_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep-nodes-with-non-gep-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/gep.ll
M llvm/test/Transforms/SLPVectorizer/X86/geps-non-pow-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/long_chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-gather-nodes-phi-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/mul64.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi3.ll
M llvm/test/Transforms/SLPVectorizer/X86/powof2div.ll
M llvm/test/Transforms/SLPVectorizer/X86/powof2mul.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr23510.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49933.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-bool-logic-op-inside.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_gather-load-redux-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-scalars-in-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder-non-empty.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/simple-loop.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-minbitwidth-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2_unord_geps.ll
M llvm/test/Transforms/SLPVectorizer/X86/stackrestore-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/stores_vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/unreachable.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/abs-overflow-incorrect-minbws.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
M llvm/test/Transforms/SLPVectorizer/freeze-signedness-missed.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/operand-is-reduced-val.ll
M llvm/test/Transforms/SLPVectorizer/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reduction_loads.ll
M llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
M llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-fix-109835.ll
M llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
M llvm/test/Transforms/SROA/tbaa-struct3.ll
A llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-store.ll
M llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-select.ll
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
M llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/AArch64/vecreduce-shuffle.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization-shufflevector-splat.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
M llvm/test/Transforms/VectorCombine/X86/extract-cmp-binop.ll
M llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll
M llvm/test/Transforms/VectorCombine/X86/pr114901.ll
M llvm/test/Transforms/VectorCombine/X86/scalarize-cmp.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle.ll
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mul-cpop.s
M llvm/test/tools/llvm-reduce/reduce-opcodes.ll
M llvm/test/tools/llvm-reduce/reduce-operands-fp.ll
M llvm/test/tools/llvm-reduce/reduce-operands-int.ll
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
M mlir/include/mlir/Dialect/AMX/AMX.td
M mlir/include/mlir/Dialect/AMX/AMXDialect.h
M mlir/include/mlir/Dialect/AMX/Transforms.h
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/AMX/IR/AMXDialect.cpp
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Target/LLVM/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
M mlir/test/Dialect/AMX/invalid.mlir
M mlir/test/Dialect/AMX/legalize-for-llvm.mlir
M mlir/test/Dialect/AMX/roundtrip.mlir
M mlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
M runtimes/cmake/Modules/HandleFlags.cmake
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/491cd1aadc1d...208f8e6901ec
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