[all-commits] [llvm/llvm-project] 768b0b: [RISCV] Add test cases for RV64 i128<->half/float/...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 768b0b4eb83e8ca62cc504ba3f0f9a0c46eea7b6
      https://github.com/llvm/llvm-project/commit/768b0b4eb83e8ca62cc504ba3f0f9a0c46eea7b6
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-11-06 (Wed, 06 Nov 2024)

  Changed paths:
    A llvm/test/CodeGen/RISCV/rv64-double-convert-strict.ll
    A llvm/test/CodeGen/RISCV/rv64-double-convert.ll
    A llvm/test/CodeGen/RISCV/rv64-float-convert-strict.ll
    A llvm/test/CodeGen/RISCV/rv64-float-convert.ll
    A llvm/test/CodeGen/RISCV/rv64-half-convert-strict.ll
    A llvm/test/CodeGen/RISCV/rv64-half-convert.ll

  Log Message:
  -----------
  [RISCV] Add test cases for RV64 i128<->half/float/double (#115124)

These emit 'ti' libcalls.



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