[all-commits] [llvm/llvm-project] 8c7529: [AMDGPU] modify named barrier builtins and intrins...

[Gang Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8c752900dda82115ebb8231e6d5ac703e703547e
      https://github.com/llvm/llvm-project/commit/8c752900dda82115ebb8231e6d5ac703e703547e
  Author: Gang Chen <gangc at amd.com>
  Date:   2024-11-06 (Wed, 06 Nov 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.def
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/SIDefines.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/AMDGPU/SOPInstructions.td
    M llvm/test/Assembler/target-type-param-errors.ll
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
    A llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
    A llvm/test/CodeGen/AMDGPU/s-barrier.ll

  Log Message:
  -----------
  [AMDGPU] modify named barrier builtins and intrinsics (#114550)

Use a local pointer type to represent the named barrier in builtin and
intrinsic. This makes the definitions more user friendly
bacause they do not need to worry about the hardware ID assignment. Also
this approach is more like the other popular GPU programming language.
Named barriers should be represented as global variables of addrspace(3)
in LLVM-IR. Compiler assigns the special LDS offsets for those variables
during AMDGPULowerModuleLDS pass. Those addresses are converted to hw
barrier ID during instruction selection. The rest of the
instruction-selection changes are primarily due to the
intrinsic-definition changes.



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