[all-commits] [llvm/llvm-project] 7cf605: [𝘀𝗽𝗿] changes introduced through rebase

[Pengcheng Wang via All-commits]

  Branch: refs/heads/users/wangpc-pp/spr/riscv-support-non-power-of-2-types-when-expanding-memcmp
  Home:   https://github.com/llvm/llvm-project
  Commit: 7cf605e7f2eaea0f5ea6d96cbcc9a658eff68226
      https://github.com/llvm/llvm-project/commit/7cf605e7f2eaea0f5ea6d96cbcc9a658eff68226
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-11-06 (Wed, 06 Nov 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]


  Commit: e57dde9d85d933d7b75743703957d441cebbf051
      https://github.com/llvm/llvm-project/commit/e57dde9d85d933d7b75743703957d441cebbf051
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-11-06 (Wed, 06 Nov 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
    M llvm/test/CodeGen/RISCV/memcmp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll

  Log Message:
  -----------
  Use VP nodes and rebase on #115162

Created using spr 1.3.6-beta.1


Compare: https://github.com/llvm/llvm-project/compare/5dfa889b2cf4...e57dde9d85d9

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