[all-commits] [llvm/llvm-project] 431ae7: Don't generate vectors if no aligned vector access

[Pengcheng Wang via All-commits]

  Branch: refs/heads/users/wangpc-pp/spr/riscv-support-memcmp-expansion-for-vectors
  Home:   https://github.com/llvm/llvm-project
  Commit: 431ae7e56b12a64a52ec4b966b1dd8b3d8d17ef6
      https://github.com/llvm/llvm-project/commit/431ae7e56b12a64a52ec4b966b1dd8b3d8d17ef6
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-11-06 (Wed, 06 Nov 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

  Log Message:
  -----------
  Don't generate vectors if no aligned vector access

Created using spr 1.3.6-beta.1



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