[all-commits] [llvm/llvm-project] 02e5c2: [X86] SimplifyDemandedBitsForTargetNode - cleanup ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 02e5c25f62d33202be6cca2650d3ae60c896775f
      https://github.com/llvm/llvm-project/commit/02e5c25f62d33202be6cca2650d3ae60c896775f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-11-05 (Tue, 05 Nov 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] SimplifyDemandedBitsForTargetNode - cleanup SSE shift-by-immediate handlers. NFC.

Cleanup the SHLI/SRLI/SRAI handlers to be more consistent - prep for a future patch.


  Commit: 61d5addd942a5ef8128e48d3617419e6320d8280
      https://github.com/llvm/llvm-project/commit/61d5addd942a5ef8128e48d3617419e6320d8280
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-11-05 (Tue, 05 Nov 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/combine-sdiv.ll
    M llvm/test/CodeGen/X86/combine-srem.ll
    M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
    M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
    M llvm/test/CodeGen/X86/vector-bo-select.ll
    M llvm/test/CodeGen/X86/vector-fshr-128.ll
    M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
    M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
    M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
    M llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll

  Log Message:
  -----------
  [X86] SimplifyDemandedBitsForTargetNode - call SimplifyMultipleUseDemandedBits on SSE shift-by-immediate nodes.

Attempt to peek through multiple-use SHLI/SRLI/SRAI source vectors.


Compare: https://github.com/llvm/llvm-project/compare/ff5551cdb07f...61d5addd942a

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