[all-commits] [llvm/llvm-project] 9540a7: [DAG] SimplifyMultipleUseDemandedBits - bypass ADD...
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Tue Nov 5 09:21:04 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 9540a7ae82dfabe551bfef94fc9f29ebebf841da
https://github.com/llvm/llvm-project/commit/9540a7ae82dfabe551bfef94fc9f29ebebf841da
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/srem-lkk.ll
M llvm/test/CodeGen/AArch64/srem-vector-lkk.ll
M llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/combine-udiv.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
M llvm/test/CodeGen/X86/pr62286.ll
M llvm/test/CodeGen/X86/pr67333.ll
M llvm/test/CodeGen/X86/sad.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
Log Message:
-----------
[DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (#112588)
The dpbusd_const.ll test change is due to us losing the expanded add reduction pattern as one of the elements is known to be zero (removing one of the adds from the reduction pyramid). I don't think its of concern.
Noticed while working on #107423
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