[all-commits] [llvm/llvm-project] 75d673: AMDGPU: Fix clobbering temp reg for large frame in...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 75d673718a5d67a7b9a4d622466cd07927549ba8
      https://github.com/llvm/llvm-project/commit/75d673718a5d67a7b9a4d622466cd07927549ba8
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-11-05 (Tue, 05 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir

  Log Message:
  -----------
  AMDGPU: Fix clobbering temp reg for large frame indexes in VOP3 users (#114924)

For a VOP3 instruction that does not permit a literal operand with an
SGPR operand, this would re-use the same scratch register for both
operands,
clobbering the original value.



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