[all-commits] [llvm/llvm-project] aef0e7: [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: aef0e77c76e3fb810852f3d0c79cc4daae52f67e
      https://github.com/llvm/llvm-project/commit/aef0e77c76e3fb810852f3d0c79cc4daae52f67e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-11-05 (Tue, 05 Nov 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/Mips/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/PowerPC/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/div-by-constant.ll
    M llvm/test/CodeGen/RISCV/div.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
    M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/Thumb2/srem-seteq-illegal-types.ll

  Log Message:
  -----------
  [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (#114992)

If we're masking the LSB of a SRL node result and that is shifting down an extended sign bit, see if we can change the SRL to shift down the MSB directly.

These patterns can occur during legalisation when we've sign extended to a wider type but the SRL is still shifting from the subreg.

Alternative to #114967

Fixes the remaining regression in #112588



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications