[all-commits] [llvm/llvm-project] 13fcd8: [𝘀𝗽𝗿] initial version
Pengcheng Wang via All-commits
all-commits at lists.llvm.org
Tue Nov 5 03:58:20 PST 2024
Branch: refs/heads/users/wangpc-pp/spr/riscv-support-non-power-of-2-types-when-expanding-memcmp
Home: https://github.com/llvm/llvm-project
Commit: 13fcd84c9deff5e877c607434c1ffb3bdc084f95
https://github.com/llvm/llvm-project/commit/13fcd84c9deff5e877c607434c1ffb3bdc084f95
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
A llvm/test/CodeGen/RISCV/memcmp-optsize.ll
A llvm/test/CodeGen/RISCV/memcmp.ll
Log Message:
-----------
[𝘀𝗽𝗿] initial version
Created using spr 1.3.6-beta.1
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