[all-commits] [llvm/llvm-project] a7d1d3: [RISCV] Use integer VTypeInfo predicate for vmv_v_...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a7d1d381d2867858ebf4cc6c02c5d71369a6104e
      https://github.com/llvm/llvm-project/commit/a7d1d381d2867858ebf4cc6c02c5d71369a6104e
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-11-05 (Tue, 05 Nov 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll

  Log Message:
  -----------
  [RISCV] Use integer VTypeInfo predicate for vmv_v_v_vl pattern (#114915)

When lowering fixed length f16 insert_subvector nodes at index 0 we
crashed with zvfhmin because we couldn't select vmv_v_v_vl.
This was due to the predicates requiring full zvfh, even though we only
need zve32x. Use the integer VTypeInfo instead similarly to
VPatSlideVL_VX_VI.

The extract_subvector tests aren't related but were just added for
consistency with the insert_subvector tests.



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