[all-commits] [llvm/llvm-project] 3266ee: Reduce CHECK lines

[Sander de Smalen via All-commits]

  Branch: refs/heads/users/sdesmalen-arm/srlt-fix-tablegen-artificial-concat
  Home:   https://github.com/llvm/llvm-project
  Commit: 3266ee2eabb61d570ae9bcfbdd5fee95469b292c
      https://github.com/llvm/llvm-project/commit/3266ee2eabb61d570ae9bcfbdd5fee95469b292c
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-11-04 (Mon, 04 Nov 2024)

  Changed paths:
    M llvm/test/TableGen/ArtificialSubregs.td

  Log Message:
  -----------
  Reduce CHECK lines


  Commit: 7f7736aab222ea3467bce4cc109b6ba6e5801d46
      https://github.com/llvm/llvm-project/commit/7f7736aab222ea3467bce4cc109b6ba6e5801d46
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-11-04 (Mon, 04 Nov 2024)

  Changed paths:
    M llvm/utils/TableGen/Common/CodeGenRegisters.cpp

  Log Message:
  -----------
  Break out of loop early


Compare: https://github.com/llvm/llvm-project/compare/588de8521a2c...7f7736aab222

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